ac97c.c 30 KB

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  1. /*
  2. * Driver for Atmel AC97C
  3. *
  4. * Copyright (C) 2005-2009 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/delay.h>
  12. #include <linux/bitmap.h>
  13. #include <linux/device.h>
  14. #include <linux/dmaengine.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/atmel_pdc.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/mutex.h>
  22. #include <linux/gpio.h>
  23. #include <linux/io.h>
  24. #include <sound/core.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/ac97_codec.h>
  29. #include <sound/atmel-ac97c.h>
  30. #include <sound/memalloc.h>
  31. #include <linux/dw_dmac.h>
  32. #include <mach/cpu.h>
  33. #include <mach/hardware.h>
  34. #include <mach/gpio.h>
  35. #include "ac97c.h"
  36. enum {
  37. DMA_TX_READY = 0,
  38. DMA_RX_READY,
  39. DMA_TX_CHAN_PRESENT,
  40. DMA_RX_CHAN_PRESENT,
  41. };
  42. /* Serialize access to opened variable */
  43. static DEFINE_MUTEX(opened_mutex);
  44. struct atmel_ac97c_dma {
  45. struct dma_chan *rx_chan;
  46. struct dma_chan *tx_chan;
  47. };
  48. struct atmel_ac97c {
  49. struct clk *pclk;
  50. struct platform_device *pdev;
  51. struct atmel_ac97c_dma dma;
  52. struct snd_pcm_substream *playback_substream;
  53. struct snd_pcm_substream *capture_substream;
  54. struct snd_card *card;
  55. struct snd_pcm *pcm;
  56. struct snd_ac97 *ac97;
  57. struct snd_ac97_bus *ac97_bus;
  58. u64 cur_format;
  59. unsigned int cur_rate;
  60. unsigned long flags;
  61. int playback_period, capture_period;
  62. /* Serialize access to opened variable */
  63. spinlock_t lock;
  64. void __iomem *regs;
  65. int irq;
  66. int opened;
  67. int reset_pin;
  68. };
  69. #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
  70. #define ac97c_writel(chip, reg, val) \
  71. __raw_writel((val), (chip)->regs + AC97C_##reg)
  72. #define ac97c_readl(chip, reg) \
  73. __raw_readl((chip)->regs + AC97C_##reg)
  74. /* This function is called by the DMA driver. */
  75. static void atmel_ac97c_dma_playback_period_done(void *arg)
  76. {
  77. struct atmel_ac97c *chip = arg;
  78. snd_pcm_period_elapsed(chip->playback_substream);
  79. }
  80. static void atmel_ac97c_dma_capture_period_done(void *arg)
  81. {
  82. struct atmel_ac97c *chip = arg;
  83. snd_pcm_period_elapsed(chip->capture_substream);
  84. }
  85. static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
  86. struct snd_pcm_substream *substream,
  87. enum dma_data_direction direction)
  88. {
  89. struct dma_chan *chan;
  90. struct dw_cyclic_desc *cdesc;
  91. struct snd_pcm_runtime *runtime = substream->runtime;
  92. unsigned long buffer_len, period_len;
  93. /*
  94. * We don't do DMA on "complex" transfers, i.e. with
  95. * non-halfword-aligned buffers or lengths.
  96. */
  97. if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
  98. dev_dbg(&chip->pdev->dev, "too complex transfer\n");
  99. return -EINVAL;
  100. }
  101. if (direction == DMA_TO_DEVICE)
  102. chan = chip->dma.tx_chan;
  103. else
  104. chan = chip->dma.rx_chan;
  105. buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
  106. period_len = frames_to_bytes(runtime, runtime->period_size);
  107. cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
  108. period_len, direction);
  109. if (IS_ERR(cdesc)) {
  110. dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
  111. return PTR_ERR(cdesc);
  112. }
  113. if (direction == DMA_TO_DEVICE) {
  114. cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
  115. set_bit(DMA_TX_READY, &chip->flags);
  116. } else {
  117. cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
  118. set_bit(DMA_RX_READY, &chip->flags);
  119. }
  120. cdesc->period_callback_param = chip;
  121. return 0;
  122. }
  123. static struct snd_pcm_hardware atmel_ac97c_hw = {
  124. .info = (SNDRV_PCM_INFO_MMAP
  125. | SNDRV_PCM_INFO_MMAP_VALID
  126. | SNDRV_PCM_INFO_INTERLEAVED
  127. | SNDRV_PCM_INFO_BLOCK_TRANSFER
  128. | SNDRV_PCM_INFO_JOINT_DUPLEX
  129. | SNDRV_PCM_INFO_RESUME
  130. | SNDRV_PCM_INFO_PAUSE),
  131. .formats = (SNDRV_PCM_FMTBIT_S16_BE
  132. | SNDRV_PCM_FMTBIT_S16_LE),
  133. .rates = (SNDRV_PCM_RATE_CONTINUOUS),
  134. .rate_min = 4000,
  135. .rate_max = 48000,
  136. .channels_min = 1,
  137. .channels_max = 2,
  138. .buffer_bytes_max = 2 * 2 * 64 * 2048,
  139. .period_bytes_min = 4096,
  140. .period_bytes_max = 4096,
  141. .periods_min = 6,
  142. .periods_max = 64,
  143. };
  144. static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
  145. {
  146. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  147. struct snd_pcm_runtime *runtime = substream->runtime;
  148. mutex_lock(&opened_mutex);
  149. chip->opened++;
  150. runtime->hw = atmel_ac97c_hw;
  151. if (chip->cur_rate) {
  152. runtime->hw.rate_min = chip->cur_rate;
  153. runtime->hw.rate_max = chip->cur_rate;
  154. }
  155. if (chip->cur_format)
  156. runtime->hw.formats = (1ULL << chip->cur_format);
  157. mutex_unlock(&opened_mutex);
  158. chip->playback_substream = substream;
  159. return 0;
  160. }
  161. static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
  162. {
  163. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  164. struct snd_pcm_runtime *runtime = substream->runtime;
  165. mutex_lock(&opened_mutex);
  166. chip->opened++;
  167. runtime->hw = atmel_ac97c_hw;
  168. if (chip->cur_rate) {
  169. runtime->hw.rate_min = chip->cur_rate;
  170. runtime->hw.rate_max = chip->cur_rate;
  171. }
  172. if (chip->cur_format)
  173. runtime->hw.formats = (1ULL << chip->cur_format);
  174. mutex_unlock(&opened_mutex);
  175. chip->capture_substream = substream;
  176. return 0;
  177. }
  178. static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
  179. {
  180. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  181. mutex_lock(&opened_mutex);
  182. chip->opened--;
  183. if (!chip->opened) {
  184. chip->cur_rate = 0;
  185. chip->cur_format = 0;
  186. }
  187. mutex_unlock(&opened_mutex);
  188. chip->playback_substream = NULL;
  189. return 0;
  190. }
  191. static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
  192. {
  193. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  194. mutex_lock(&opened_mutex);
  195. chip->opened--;
  196. if (!chip->opened) {
  197. chip->cur_rate = 0;
  198. chip->cur_format = 0;
  199. }
  200. mutex_unlock(&opened_mutex);
  201. chip->capture_substream = NULL;
  202. return 0;
  203. }
  204. static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
  205. struct snd_pcm_hw_params *hw_params)
  206. {
  207. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  208. int retval;
  209. retval = snd_pcm_lib_malloc_pages(substream,
  210. params_buffer_bytes(hw_params));
  211. if (retval < 0)
  212. return retval;
  213. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  214. if (cpu_is_at32ap7000()) {
  215. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  216. if (retval == 1)
  217. if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
  218. dw_dma_cyclic_free(chip->dma.tx_chan);
  219. }
  220. /* Set restrictions to params. */
  221. mutex_lock(&opened_mutex);
  222. chip->cur_rate = params_rate(hw_params);
  223. chip->cur_format = params_format(hw_params);
  224. mutex_unlock(&opened_mutex);
  225. return retval;
  226. }
  227. static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
  228. struct snd_pcm_hw_params *hw_params)
  229. {
  230. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  231. int retval;
  232. retval = snd_pcm_lib_malloc_pages(substream,
  233. params_buffer_bytes(hw_params));
  234. if (retval < 0)
  235. return retval;
  236. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  237. if (cpu_is_at32ap7000()) {
  238. if (retval < 0)
  239. return retval;
  240. /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
  241. if (retval == 1)
  242. if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
  243. dw_dma_cyclic_free(chip->dma.rx_chan);
  244. }
  245. /* Set restrictions to params. */
  246. mutex_lock(&opened_mutex);
  247. chip->cur_rate = params_rate(hw_params);
  248. chip->cur_format = params_format(hw_params);
  249. mutex_unlock(&opened_mutex);
  250. return retval;
  251. }
  252. static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
  253. {
  254. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  255. if (cpu_is_at32ap7000()) {
  256. if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
  257. dw_dma_cyclic_free(chip->dma.tx_chan);
  258. }
  259. return snd_pcm_lib_free_pages(substream);
  260. }
  261. static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
  262. {
  263. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  264. if (cpu_is_at32ap7000()) {
  265. if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
  266. dw_dma_cyclic_free(chip->dma.rx_chan);
  267. }
  268. return snd_pcm_lib_free_pages(substream);
  269. }
  270. static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
  271. {
  272. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  273. struct snd_pcm_runtime *runtime = substream->runtime;
  274. int block_size = frames_to_bytes(runtime, runtime->period_size);
  275. unsigned long word = ac97c_readl(chip, OCA);
  276. int retval;
  277. chip->playback_period = 0;
  278. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  279. /* assign channels to AC97C channel A */
  280. switch (runtime->channels) {
  281. case 1:
  282. word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
  283. break;
  284. case 2:
  285. word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
  286. | AC97C_CH_ASSIGN(PCM_RIGHT, A);
  287. break;
  288. default:
  289. /* TODO: support more than two channels */
  290. return -EINVAL;
  291. }
  292. ac97c_writel(chip, OCA, word);
  293. /* configure sample format and size */
  294. word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  295. switch (runtime->format) {
  296. case SNDRV_PCM_FORMAT_S16_LE:
  297. if (cpu_is_at32ap7000())
  298. word |= AC97C_CMR_CEM_LITTLE;
  299. break;
  300. case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
  301. word &= ~(AC97C_CMR_CEM_LITTLE);
  302. break;
  303. default:
  304. word = ac97c_readl(chip, OCA);
  305. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  306. ac97c_writel(chip, OCA, word);
  307. return -EINVAL;
  308. }
  309. /* Enable underrun interrupt on channel A */
  310. word |= AC97C_CSR_UNRUN;
  311. ac97c_writel(chip, CAMR, word);
  312. /* Enable channel A event interrupt */
  313. word = ac97c_readl(chip, IMR);
  314. word |= AC97C_SR_CAEVT;
  315. ac97c_writel(chip, IER, word);
  316. /* set variable rate if needed */
  317. if (runtime->rate != 48000) {
  318. word = ac97c_readl(chip, MR);
  319. word |= AC97C_MR_VRA;
  320. ac97c_writel(chip, MR, word);
  321. } else {
  322. word = ac97c_readl(chip, MR);
  323. word &= ~(AC97C_MR_VRA);
  324. ac97c_writel(chip, MR, word);
  325. }
  326. retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
  327. runtime->rate);
  328. if (retval)
  329. dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
  330. runtime->rate);
  331. if (cpu_is_at32ap7000()) {
  332. if (!test_bit(DMA_TX_READY, &chip->flags))
  333. retval = atmel_ac97c_prepare_dma(chip, substream,
  334. DMA_TO_DEVICE);
  335. } else {
  336. /* Initialize and start the PDC */
  337. writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
  338. writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
  339. writel(runtime->dma_addr + block_size,
  340. chip->regs + ATMEL_PDC_TNPR);
  341. writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
  342. }
  343. return retval;
  344. }
  345. static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
  346. {
  347. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  348. struct snd_pcm_runtime *runtime = substream->runtime;
  349. int block_size = frames_to_bytes(runtime, runtime->period_size);
  350. unsigned long word = ac97c_readl(chip, ICA);
  351. int retval;
  352. chip->capture_period = 0;
  353. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  354. /* assign channels to AC97C channel A */
  355. switch (runtime->channels) {
  356. case 1:
  357. word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
  358. break;
  359. case 2:
  360. word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
  361. | AC97C_CH_ASSIGN(PCM_RIGHT, A);
  362. break;
  363. default:
  364. /* TODO: support more than two channels */
  365. return -EINVAL;
  366. }
  367. ac97c_writel(chip, ICA, word);
  368. /* configure sample format and size */
  369. word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
  370. switch (runtime->format) {
  371. case SNDRV_PCM_FORMAT_S16_LE:
  372. if (cpu_is_at32ap7000())
  373. word |= AC97C_CMR_CEM_LITTLE;
  374. break;
  375. case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
  376. word &= ~(AC97C_CMR_CEM_LITTLE);
  377. break;
  378. default:
  379. word = ac97c_readl(chip, ICA);
  380. word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
  381. ac97c_writel(chip, ICA, word);
  382. return -EINVAL;
  383. }
  384. /* Enable overrun interrupt on channel A */
  385. word |= AC97C_CSR_OVRUN;
  386. ac97c_writel(chip, CAMR, word);
  387. /* Enable channel A event interrupt */
  388. word = ac97c_readl(chip, IMR);
  389. word |= AC97C_SR_CAEVT;
  390. ac97c_writel(chip, IER, word);
  391. /* set variable rate if needed */
  392. if (runtime->rate != 48000) {
  393. word = ac97c_readl(chip, MR);
  394. word |= AC97C_MR_VRA;
  395. ac97c_writel(chip, MR, word);
  396. } else {
  397. word = ac97c_readl(chip, MR);
  398. word &= ~(AC97C_MR_VRA);
  399. ac97c_writel(chip, MR, word);
  400. }
  401. retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
  402. runtime->rate);
  403. if (retval)
  404. dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
  405. runtime->rate);
  406. if (cpu_is_at32ap7000()) {
  407. if (!test_bit(DMA_RX_READY, &chip->flags))
  408. retval = atmel_ac97c_prepare_dma(chip, substream,
  409. DMA_FROM_DEVICE);
  410. } else {
  411. /* Initialize and start the PDC */
  412. writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
  413. writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
  414. writel(runtime->dma_addr + block_size,
  415. chip->regs + ATMEL_PDC_RNPR);
  416. writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
  417. }
  418. return retval;
  419. }
  420. static int
  421. atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  422. {
  423. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  424. unsigned long camr, ptcr = 0;
  425. int retval = 0;
  426. camr = ac97c_readl(chip, CAMR);
  427. switch (cmd) {
  428. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
  429. case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
  430. case SNDRV_PCM_TRIGGER_START:
  431. if (cpu_is_at32ap7000()) {
  432. retval = dw_dma_cyclic_start(chip->dma.tx_chan);
  433. if (retval)
  434. goto out;
  435. } else {
  436. ptcr = ATMEL_PDC_TXTEN;
  437. }
  438. camr |= AC97C_CMR_CENA;
  439. break;
  440. case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
  441. case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
  442. case SNDRV_PCM_TRIGGER_STOP:
  443. if (cpu_is_at32ap7000())
  444. dw_dma_cyclic_stop(chip->dma.tx_chan);
  445. else
  446. ptcr |= ATMEL_PDC_TXTDIS;
  447. if (chip->opened <= 1)
  448. camr &= ~AC97C_CMR_CENA;
  449. break;
  450. default:
  451. retval = -EINVAL;
  452. goto out;
  453. }
  454. ac97c_writel(chip, CAMR, camr);
  455. if (!cpu_is_at32ap7000())
  456. writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
  457. out:
  458. return retval;
  459. }
  460. static int
  461. atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  462. {
  463. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  464. unsigned long camr, ptcr = 0;
  465. int retval = 0;
  466. camr = ac97c_readl(chip, CAMR);
  467. ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
  468. switch (cmd) {
  469. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
  470. case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
  471. case SNDRV_PCM_TRIGGER_START:
  472. if (cpu_is_at32ap7000()) {
  473. retval = dw_dma_cyclic_start(chip->dma.rx_chan);
  474. if (retval)
  475. goto out;
  476. } else {
  477. ptcr = ATMEL_PDC_RXTEN;
  478. }
  479. camr |= AC97C_CMR_CENA;
  480. break;
  481. case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
  482. case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
  483. case SNDRV_PCM_TRIGGER_STOP:
  484. if (cpu_is_at32ap7000())
  485. dw_dma_cyclic_stop(chip->dma.rx_chan);
  486. else
  487. ptcr |= (ATMEL_PDC_RXTDIS);
  488. if (chip->opened <= 1)
  489. camr &= ~AC97C_CMR_CENA;
  490. break;
  491. default:
  492. retval = -EINVAL;
  493. break;
  494. }
  495. ac97c_writel(chip, CAMR, camr);
  496. if (!cpu_is_at32ap7000())
  497. writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
  498. out:
  499. return retval;
  500. }
  501. static snd_pcm_uframes_t
  502. atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
  503. {
  504. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  505. struct snd_pcm_runtime *runtime = substream->runtime;
  506. snd_pcm_uframes_t frames;
  507. unsigned long bytes;
  508. if (cpu_is_at32ap7000())
  509. bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
  510. else
  511. bytes = readl(chip->regs + ATMEL_PDC_TPR);
  512. bytes -= runtime->dma_addr;
  513. frames = bytes_to_frames(runtime, bytes);
  514. if (frames >= runtime->buffer_size)
  515. frames -= runtime->buffer_size;
  516. return frames;
  517. }
  518. static snd_pcm_uframes_t
  519. atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
  520. {
  521. struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
  522. struct snd_pcm_runtime *runtime = substream->runtime;
  523. snd_pcm_uframes_t frames;
  524. unsigned long bytes;
  525. if (cpu_is_at32ap7000())
  526. bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
  527. else
  528. bytes = readl(chip->regs + ATMEL_PDC_RPR);
  529. bytes -= runtime->dma_addr;
  530. frames = bytes_to_frames(runtime, bytes);
  531. if (frames >= runtime->buffer_size)
  532. frames -= runtime->buffer_size;
  533. return frames;
  534. }
  535. static struct snd_pcm_ops atmel_ac97_playback_ops = {
  536. .open = atmel_ac97c_playback_open,
  537. .close = atmel_ac97c_playback_close,
  538. .ioctl = snd_pcm_lib_ioctl,
  539. .hw_params = atmel_ac97c_playback_hw_params,
  540. .hw_free = atmel_ac97c_playback_hw_free,
  541. .prepare = atmel_ac97c_playback_prepare,
  542. .trigger = atmel_ac97c_playback_trigger,
  543. .pointer = atmel_ac97c_playback_pointer,
  544. };
  545. static struct snd_pcm_ops atmel_ac97_capture_ops = {
  546. .open = atmel_ac97c_capture_open,
  547. .close = atmel_ac97c_capture_close,
  548. .ioctl = snd_pcm_lib_ioctl,
  549. .hw_params = atmel_ac97c_capture_hw_params,
  550. .hw_free = atmel_ac97c_capture_hw_free,
  551. .prepare = atmel_ac97c_capture_prepare,
  552. .trigger = atmel_ac97c_capture_trigger,
  553. .pointer = atmel_ac97c_capture_pointer,
  554. };
  555. static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
  556. {
  557. struct atmel_ac97c *chip = (struct atmel_ac97c *)dev;
  558. irqreturn_t retval = IRQ_NONE;
  559. u32 sr = ac97c_readl(chip, SR);
  560. u32 casr = ac97c_readl(chip, CASR);
  561. u32 cosr = ac97c_readl(chip, COSR);
  562. u32 camr = ac97c_readl(chip, CAMR);
  563. if (sr & AC97C_SR_CAEVT) {
  564. struct snd_pcm_runtime *runtime;
  565. int offset, next_period, block_size;
  566. dev_info(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
  567. casr & AC97C_CSR_OVRUN ? " OVRUN" : "",
  568. casr & AC97C_CSR_RXRDY ? " RXRDY" : "",
  569. casr & AC97C_CSR_UNRUN ? " UNRUN" : "",
  570. casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
  571. casr & AC97C_CSR_TXRDY ? " TXRDY" : "",
  572. !casr ? " NONE" : "");
  573. if (!cpu_is_at32ap7000()) {
  574. if ((casr & camr) & AC97C_CSR_ENDTX) {
  575. runtime = chip->playback_substream->runtime;
  576. block_size = frames_to_bytes(runtime,
  577. runtime->period_size);
  578. chip->playback_period++;
  579. if (chip->playback_period == runtime->periods)
  580. chip->playback_period = 0;
  581. next_period = chip->playback_period + 1;
  582. if (next_period == runtime->periods)
  583. next_period = 0;
  584. offset = block_size * next_period;
  585. writel(runtime->dma_addr + offset,
  586. chip->regs + ATMEL_PDC_TNPR);
  587. writel(block_size / 2,
  588. chip->regs + ATMEL_PDC_TNCR);
  589. snd_pcm_period_elapsed(
  590. chip->playback_substream);
  591. }
  592. if ((casr & camr) & AC97C_CSR_ENDRX) {
  593. runtime = chip->capture_substream->runtime;
  594. block_size = frames_to_bytes(runtime,
  595. runtime->period_size);
  596. chip->capture_period++;
  597. if (chip->capture_period == runtime->periods)
  598. chip->capture_period = 0;
  599. next_period = chip->capture_period + 1;
  600. if (next_period == runtime->periods)
  601. next_period = 0;
  602. offset = block_size * next_period;
  603. writel(runtime->dma_addr + offset,
  604. chip->regs + ATMEL_PDC_RNPR);
  605. writel(block_size / 2,
  606. chip->regs + ATMEL_PDC_RNCR);
  607. snd_pcm_period_elapsed(chip->capture_substream);
  608. }
  609. }
  610. retval = IRQ_HANDLED;
  611. }
  612. if (sr & AC97C_SR_COEVT) {
  613. dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
  614. cosr & AC97C_CSR_OVRUN ? " OVRUN" : "",
  615. cosr & AC97C_CSR_RXRDY ? " RXRDY" : "",
  616. cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
  617. cosr & AC97C_CSR_TXRDY ? " TXRDY" : "",
  618. !cosr ? " NONE" : "");
  619. retval = IRQ_HANDLED;
  620. }
  621. if (retval == IRQ_NONE) {
  622. dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
  623. "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
  624. }
  625. return retval;
  626. }
  627. static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
  628. /* Playback */
  629. {
  630. .exclusive = 1,
  631. .r = { {
  632. .slots = ((1 << AC97_SLOT_PCM_LEFT)
  633. | (1 << AC97_SLOT_PCM_RIGHT)),
  634. } },
  635. },
  636. /* PCM in */
  637. {
  638. .stream = 1,
  639. .exclusive = 1,
  640. .r = { {
  641. .slots = ((1 << AC97_SLOT_PCM_LEFT)
  642. | (1 << AC97_SLOT_PCM_RIGHT)),
  643. } }
  644. },
  645. /* Mic in */
  646. {
  647. .stream = 1,
  648. .exclusive = 1,
  649. .r = { {
  650. .slots = (1<<AC97_SLOT_MIC),
  651. } }
  652. },
  653. };
  654. static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
  655. {
  656. struct snd_pcm *pcm;
  657. struct snd_pcm_hardware hw = atmel_ac97c_hw;
  658. int capture, playback, retval, err;
  659. capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  660. playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  661. if (!cpu_is_at32ap7000()) {
  662. err = snd_ac97_pcm_assign(chip->ac97_bus,
  663. ARRAY_SIZE(at91_ac97_pcm_defs),
  664. at91_ac97_pcm_defs);
  665. if (err)
  666. return err;
  667. }
  668. retval = snd_pcm_new(chip->card, chip->card->shortname,
  669. chip->pdev->id, playback, capture, &pcm);
  670. if (retval)
  671. return retval;
  672. if (capture)
  673. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  674. &atmel_ac97_capture_ops);
  675. if (playback)
  676. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  677. &atmel_ac97_playback_ops);
  678. retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  679. &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
  680. hw.buffer_bytes_max);
  681. if (retval)
  682. return retval;
  683. pcm->private_data = chip;
  684. pcm->info_flags = 0;
  685. strcpy(pcm->name, chip->card->shortname);
  686. chip->pcm = pcm;
  687. return 0;
  688. }
  689. static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
  690. {
  691. struct snd_ac97_template template;
  692. memset(&template, 0, sizeof(template));
  693. template.private_data = chip;
  694. return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
  695. }
  696. static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
  697. unsigned short val)
  698. {
  699. struct atmel_ac97c *chip = get_chip(ac97);
  700. unsigned long word;
  701. int timeout = 40;
  702. word = (reg & 0x7f) << 16 | val;
  703. do {
  704. if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
  705. ac97c_writel(chip, COTHR, word);
  706. return;
  707. }
  708. udelay(1);
  709. } while (--timeout);
  710. dev_dbg(&chip->pdev->dev, "codec write timeout\n");
  711. }
  712. static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
  713. unsigned short reg)
  714. {
  715. struct atmel_ac97c *chip = get_chip(ac97);
  716. unsigned long word;
  717. int timeout = 40;
  718. int write = 10;
  719. word = (0x80 | (reg & 0x7f)) << 16;
  720. if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
  721. ac97c_readl(chip, CORHR);
  722. retry_write:
  723. timeout = 40;
  724. do {
  725. if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
  726. ac97c_writel(chip, COTHR, word);
  727. goto read_reg;
  728. }
  729. udelay(10);
  730. } while (--timeout);
  731. if (!--write)
  732. goto timed_out;
  733. goto retry_write;
  734. read_reg:
  735. do {
  736. if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
  737. unsigned short val = ac97c_readl(chip, CORHR);
  738. return val;
  739. }
  740. udelay(10);
  741. } while (--timeout);
  742. if (!--write)
  743. goto timed_out;
  744. goto retry_write;
  745. timed_out:
  746. dev_dbg(&chip->pdev->dev, "codec read timeout\n");
  747. return 0xffff;
  748. }
  749. static bool filter(struct dma_chan *chan, void *slave)
  750. {
  751. struct dw_dma_slave *dws = slave;
  752. if (dws->dma_dev == chan->device->dev) {
  753. chan->private = dws;
  754. return true;
  755. } else
  756. return false;
  757. }
  758. static void atmel_ac97c_reset(struct atmel_ac97c *chip)
  759. {
  760. ac97c_writel(chip, MR, 0);
  761. ac97c_writel(chip, MR, AC97C_MR_ENA);
  762. ac97c_writel(chip, CAMR, 0);
  763. ac97c_writel(chip, COMR, 0);
  764. if (gpio_is_valid(chip->reset_pin)) {
  765. gpio_set_value(chip->reset_pin, 0);
  766. /* AC97 v2.2 specifications says minimum 1 us. */
  767. udelay(2);
  768. gpio_set_value(chip->reset_pin, 1);
  769. }
  770. }
  771. static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
  772. {
  773. struct snd_card *card;
  774. struct atmel_ac97c *chip;
  775. struct resource *regs;
  776. struct ac97c_platform_data *pdata;
  777. struct clk *pclk;
  778. static struct snd_ac97_bus_ops ops = {
  779. .write = atmel_ac97c_write,
  780. .read = atmel_ac97c_read,
  781. };
  782. int retval;
  783. int irq;
  784. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  785. if (!regs) {
  786. dev_dbg(&pdev->dev, "no memory resource\n");
  787. return -ENXIO;
  788. }
  789. pdata = pdev->dev.platform_data;
  790. if (!pdata) {
  791. dev_dbg(&pdev->dev, "no platform data\n");
  792. return -ENXIO;
  793. }
  794. irq = platform_get_irq(pdev, 0);
  795. if (irq < 0) {
  796. dev_dbg(&pdev->dev, "could not get irq\n");
  797. return -ENXIO;
  798. }
  799. if (cpu_is_at32ap7000()) {
  800. pclk = clk_get(&pdev->dev, "pclk");
  801. } else {
  802. pclk = clk_get(&pdev->dev, "ac97_clk");
  803. }
  804. if (IS_ERR(pclk)) {
  805. dev_dbg(&pdev->dev, "no peripheral clock\n");
  806. return PTR_ERR(pclk);
  807. }
  808. clk_enable(pclk);
  809. retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
  810. THIS_MODULE, sizeof(struct atmel_ac97c), &card);
  811. if (retval) {
  812. dev_dbg(&pdev->dev, "could not create sound card device\n");
  813. goto err_snd_card_new;
  814. }
  815. chip = get_chip(card);
  816. retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
  817. if (retval) {
  818. dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
  819. goto err_request_irq;
  820. }
  821. chip->irq = irq;
  822. spin_lock_init(&chip->lock);
  823. strcpy(card->driver, "Atmel AC97C");
  824. strcpy(card->shortname, "Atmel AC97C");
  825. sprintf(card->longname, "Atmel AC97 controller");
  826. chip->card = card;
  827. chip->pclk = pclk;
  828. chip->pdev = pdev;
  829. chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
  830. if (!chip->regs) {
  831. dev_dbg(&pdev->dev, "could not remap register memory\n");
  832. goto err_ioremap;
  833. }
  834. if (gpio_is_valid(pdata->reset_pin)) {
  835. if (gpio_request(pdata->reset_pin, "reset_pin")) {
  836. dev_dbg(&pdev->dev, "reset pin not available\n");
  837. chip->reset_pin = -ENODEV;
  838. } else {
  839. gpio_direction_output(pdata->reset_pin, 1);
  840. chip->reset_pin = pdata->reset_pin;
  841. }
  842. }
  843. snd_card_set_dev(card, &pdev->dev);
  844. atmel_ac97c_reset(chip);
  845. /* Enable overrun interrupt from codec channel */
  846. ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
  847. ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
  848. retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
  849. if (retval) {
  850. dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
  851. goto err_ac97_bus;
  852. }
  853. retval = atmel_ac97c_mixer_new(chip);
  854. if (retval) {
  855. dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
  856. goto err_ac97_bus;
  857. }
  858. if (cpu_is_at32ap7000()) {
  859. if (pdata->rx_dws.dma_dev) {
  860. struct dw_dma_slave *dws = &pdata->rx_dws;
  861. dma_cap_mask_t mask;
  862. dws->rx_reg = regs->start + AC97C_CARHR + 2;
  863. dma_cap_zero(mask);
  864. dma_cap_set(DMA_SLAVE, mask);
  865. chip->dma.rx_chan = dma_request_channel(mask, filter,
  866. dws);
  867. dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
  868. dev_name(&chip->dma.rx_chan->dev->device));
  869. set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  870. }
  871. if (pdata->tx_dws.dma_dev) {
  872. struct dw_dma_slave *dws = &pdata->tx_dws;
  873. dma_cap_mask_t mask;
  874. dws->tx_reg = regs->start + AC97C_CATHR + 2;
  875. dma_cap_zero(mask);
  876. dma_cap_set(DMA_SLAVE, mask);
  877. chip->dma.tx_chan = dma_request_channel(mask, filter,
  878. dws);
  879. dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
  880. dev_name(&chip->dma.tx_chan->dev->device));
  881. set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  882. }
  883. if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
  884. !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
  885. dev_dbg(&pdev->dev, "DMA not available\n");
  886. retval = -ENODEV;
  887. goto err_dma;
  888. }
  889. } else {
  890. /* Just pretend that we have DMA channel(for at91 i is actually
  891. * the PDC) */
  892. set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  893. set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  894. }
  895. retval = atmel_ac97c_pcm_new(chip);
  896. if (retval) {
  897. dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
  898. goto err_dma;
  899. }
  900. retval = snd_card_register(card);
  901. if (retval) {
  902. dev_dbg(&pdev->dev, "could not register sound card\n");
  903. goto err_dma;
  904. }
  905. platform_set_drvdata(pdev, card);
  906. dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
  907. chip->regs, irq);
  908. return 0;
  909. err_dma:
  910. if (cpu_is_at32ap7000()) {
  911. if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
  912. dma_release_channel(chip->dma.rx_chan);
  913. if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
  914. dma_release_channel(chip->dma.tx_chan);
  915. clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  916. clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  917. chip->dma.rx_chan = NULL;
  918. chip->dma.tx_chan = NULL;
  919. }
  920. err_ac97_bus:
  921. snd_card_set_dev(card, NULL);
  922. if (gpio_is_valid(chip->reset_pin))
  923. gpio_free(chip->reset_pin);
  924. iounmap(chip->regs);
  925. err_ioremap:
  926. free_irq(irq, chip);
  927. err_request_irq:
  928. snd_card_free(card);
  929. err_snd_card_new:
  930. clk_disable(pclk);
  931. clk_put(pclk);
  932. return retval;
  933. }
  934. #ifdef CONFIG_PM
  935. static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg)
  936. {
  937. struct snd_card *card = platform_get_drvdata(pdev);
  938. struct atmel_ac97c *chip = card->private_data;
  939. if (cpu_is_at32ap7000()) {
  940. if (test_bit(DMA_RX_READY, &chip->flags))
  941. dw_dma_cyclic_stop(chip->dma.rx_chan);
  942. if (test_bit(DMA_TX_READY, &chip->flags))
  943. dw_dma_cyclic_stop(chip->dma.tx_chan);
  944. }
  945. clk_disable(chip->pclk);
  946. return 0;
  947. }
  948. static int atmel_ac97c_resume(struct platform_device *pdev)
  949. {
  950. struct snd_card *card = platform_get_drvdata(pdev);
  951. struct atmel_ac97c *chip = card->private_data;
  952. clk_enable(chip->pclk);
  953. if (cpu_is_at32ap7000()) {
  954. if (test_bit(DMA_RX_READY, &chip->flags))
  955. dw_dma_cyclic_start(chip->dma.rx_chan);
  956. if (test_bit(DMA_TX_READY, &chip->flags))
  957. dw_dma_cyclic_start(chip->dma.tx_chan);
  958. }
  959. return 0;
  960. }
  961. #else
  962. #define atmel_ac97c_suspend NULL
  963. #define atmel_ac97c_resume NULL
  964. #endif
  965. static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
  966. {
  967. struct snd_card *card = platform_get_drvdata(pdev);
  968. struct atmel_ac97c *chip = get_chip(card);
  969. if (gpio_is_valid(chip->reset_pin))
  970. gpio_free(chip->reset_pin);
  971. ac97c_writel(chip, CAMR, 0);
  972. ac97c_writel(chip, COMR, 0);
  973. ac97c_writel(chip, MR, 0);
  974. clk_disable(chip->pclk);
  975. clk_put(chip->pclk);
  976. iounmap(chip->regs);
  977. free_irq(chip->irq, chip);
  978. if (cpu_is_at32ap7000()) {
  979. if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
  980. dma_release_channel(chip->dma.rx_chan);
  981. if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
  982. dma_release_channel(chip->dma.tx_chan);
  983. clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
  984. clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
  985. chip->dma.rx_chan = NULL;
  986. chip->dma.tx_chan = NULL;
  987. }
  988. snd_card_set_dev(card, NULL);
  989. snd_card_free(card);
  990. platform_set_drvdata(pdev, NULL);
  991. return 0;
  992. }
  993. static struct platform_driver atmel_ac97c_driver = {
  994. .remove = __devexit_p(atmel_ac97c_remove),
  995. .driver = {
  996. .name = "atmel_ac97c",
  997. },
  998. .suspend = atmel_ac97c_suspend,
  999. .resume = atmel_ac97c_resume,
  1000. };
  1001. static int __init atmel_ac97c_init(void)
  1002. {
  1003. return platform_driver_probe(&atmel_ac97c_driver,
  1004. atmel_ac97c_probe);
  1005. }
  1006. module_init(atmel_ac97c_init);
  1007. static void __exit atmel_ac97c_exit(void)
  1008. {
  1009. platform_driver_unregister(&atmel_ac97c_driver);
  1010. }
  1011. module_exit(atmel_ac97c_exit);
  1012. MODULE_LICENSE("GPL");
  1013. MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
  1014. MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");