intel_sdvo.c 84 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include "intel_drv.h"
  36. #include <drm/i915_drm.h>
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  47. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  48. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  49. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  50. static const char *tv_format_names[] = {
  51. "NTSC_M" , "NTSC_J" , "NTSC_443",
  52. "PAL_B" , "PAL_D" , "PAL_G" ,
  53. "PAL_H" , "PAL_I" , "PAL_M" ,
  54. "PAL_N" , "PAL_NC" , "PAL_60" ,
  55. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  56. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  57. "SECAM_60"
  58. };
  59. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  60. struct intel_sdvo {
  61. struct intel_encoder base;
  62. struct i2c_adapter *i2c;
  63. u8 slave_addr;
  64. struct i2c_adapter ddc;
  65. /* Register for the SDVO device: SDVOB or SDVOC */
  66. uint32_t sdvo_reg;
  67. /* Active outputs controlled by this SDVO output */
  68. uint16_t controlled_output;
  69. /*
  70. * Capabilities of the SDVO device returned by
  71. * i830_sdvo_get_capabilities()
  72. */
  73. struct intel_sdvo_caps caps;
  74. /* Pixel clock limitations reported by the SDVO device, in kHz */
  75. int pixel_clock_min, pixel_clock_max;
  76. /*
  77. * For multiple function SDVO device,
  78. * this is for current attached outputs.
  79. */
  80. uint16_t attached_output;
  81. /*
  82. * Hotplug activation bits for this device
  83. */
  84. uint16_t hotplug_active;
  85. /**
  86. * This is used to select the color range of RBG outputs in HDMI mode.
  87. * It is only valid when using TMDS encoding and 8 bit per color mode.
  88. */
  89. uint32_t color_range;
  90. /**
  91. * This is set if we're going to treat the device as TV-out.
  92. *
  93. * While we have these nice friendly flags for output types that ought
  94. * to decide this for us, the S-Video output on our HDMI+S-Video card
  95. * shows up as RGB1 (VGA).
  96. */
  97. bool is_tv;
  98. /* On different gens SDVOB is at different places. */
  99. bool is_sdvob;
  100. /* This is for current tv format name */
  101. int tv_format_index;
  102. /**
  103. * This is set if we treat the device as HDMI, instead of DVI.
  104. */
  105. bool is_hdmi;
  106. bool has_hdmi_monitor;
  107. bool has_hdmi_audio;
  108. /**
  109. * This is set if we detect output of sdvo device as LVDS and
  110. * have a valid fixed mode to use with the panel.
  111. */
  112. bool is_lvds;
  113. /**
  114. * This is sdvo fixed pannel mode pointer
  115. */
  116. struct drm_display_mode *sdvo_lvds_fixed_mode;
  117. /* DDC bus used by this SDVO encoder */
  118. uint8_t ddc_bus;
  119. /*
  120. * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
  121. */
  122. uint8_t dtd_sdvo_flags;
  123. };
  124. struct intel_sdvo_connector {
  125. struct intel_connector base;
  126. /* Mark the type of connector */
  127. uint16_t output_flag;
  128. enum hdmi_force_audio force_audio;
  129. /* This contains all current supported TV format */
  130. u8 tv_format_supported[TV_FORMAT_NUM];
  131. int format_supported_num;
  132. struct drm_property *tv_format;
  133. /* add the property for the SDVO-TV */
  134. struct drm_property *left;
  135. struct drm_property *right;
  136. struct drm_property *top;
  137. struct drm_property *bottom;
  138. struct drm_property *hpos;
  139. struct drm_property *vpos;
  140. struct drm_property *contrast;
  141. struct drm_property *saturation;
  142. struct drm_property *hue;
  143. struct drm_property *sharpness;
  144. struct drm_property *flicker_filter;
  145. struct drm_property *flicker_filter_adaptive;
  146. struct drm_property *flicker_filter_2d;
  147. struct drm_property *tv_chroma_filter;
  148. struct drm_property *tv_luma_filter;
  149. struct drm_property *dot_crawl;
  150. /* add the property for the SDVO-TV/LVDS */
  151. struct drm_property *brightness;
  152. /* Add variable to record current setting for the above property */
  153. u32 left_margin, right_margin, top_margin, bottom_margin;
  154. /* this is to get the range of margin.*/
  155. u32 max_hscan, max_vscan;
  156. u32 max_hpos, cur_hpos;
  157. u32 max_vpos, cur_vpos;
  158. u32 cur_brightness, max_brightness;
  159. u32 cur_contrast, max_contrast;
  160. u32 cur_saturation, max_saturation;
  161. u32 cur_hue, max_hue;
  162. u32 cur_sharpness, max_sharpness;
  163. u32 cur_flicker_filter, max_flicker_filter;
  164. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  165. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  166. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  167. u32 cur_tv_luma_filter, max_tv_luma_filter;
  168. u32 cur_dot_crawl, max_dot_crawl;
  169. };
  170. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  171. {
  172. return container_of(encoder, struct intel_sdvo, base.base);
  173. }
  174. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  175. {
  176. return container_of(intel_attached_encoder(connector),
  177. struct intel_sdvo, base);
  178. }
  179. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  180. {
  181. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  182. }
  183. static bool
  184. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  185. static bool
  186. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  187. struct intel_sdvo_connector *intel_sdvo_connector,
  188. int type);
  189. static bool
  190. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  191. struct intel_sdvo_connector *intel_sdvo_connector);
  192. /**
  193. * Writes the SDVOB or SDVOC with the given value, but always writes both
  194. * SDVOB and SDVOC to work around apparent hardware issues (according to
  195. * comments in the BIOS).
  196. */
  197. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  198. {
  199. struct drm_device *dev = intel_sdvo->base.base.dev;
  200. struct drm_i915_private *dev_priv = dev->dev_private;
  201. u32 bval = val, cval = val;
  202. int i;
  203. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  204. I915_WRITE(intel_sdvo->sdvo_reg, val);
  205. I915_READ(intel_sdvo->sdvo_reg);
  206. return;
  207. }
  208. if (intel_sdvo->sdvo_reg == SDVOB) {
  209. cval = I915_READ(SDVOC);
  210. } else {
  211. bval = I915_READ(SDVOB);
  212. }
  213. /*
  214. * Write the registers twice for luck. Sometimes,
  215. * writing them only once doesn't appear to 'stick'.
  216. * The BIOS does this too. Yay, magic
  217. */
  218. for (i = 0; i < 2; i++)
  219. {
  220. I915_WRITE(SDVOB, bval);
  221. I915_READ(SDVOB);
  222. I915_WRITE(SDVOC, cval);
  223. I915_READ(SDVOC);
  224. }
  225. }
  226. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  227. {
  228. struct i2c_msg msgs[] = {
  229. {
  230. .addr = intel_sdvo->slave_addr,
  231. .flags = 0,
  232. .len = 1,
  233. .buf = &addr,
  234. },
  235. {
  236. .addr = intel_sdvo->slave_addr,
  237. .flags = I2C_M_RD,
  238. .len = 1,
  239. .buf = ch,
  240. }
  241. };
  242. int ret;
  243. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  244. return true;
  245. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  246. return false;
  247. }
  248. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  249. /** Mapping of command numbers to names, for debug output */
  250. static const struct _sdvo_cmd_name {
  251. u8 cmd;
  252. const char *name;
  253. } sdvo_cmd_names[] = {
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  297. /* Add the op code for SDVO enhancements */
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  342. /* HDMI op code */
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  360. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  361. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  362. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  363. };
  364. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  365. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  366. const void *args, int args_len)
  367. {
  368. int i;
  369. DRM_DEBUG_KMS("%s: W: %02X ",
  370. SDVO_NAME(intel_sdvo), cmd);
  371. for (i = 0; i < args_len; i++)
  372. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  373. for (; i < 8; i++)
  374. DRM_LOG_KMS(" ");
  375. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  376. if (cmd == sdvo_cmd_names[i].cmd) {
  377. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  378. break;
  379. }
  380. }
  381. if (i == ARRAY_SIZE(sdvo_cmd_names))
  382. DRM_LOG_KMS("(%02X)", cmd);
  383. DRM_LOG_KMS("\n");
  384. }
  385. static const char *cmd_status_names[] = {
  386. "Power on",
  387. "Success",
  388. "Not supported",
  389. "Invalid arg",
  390. "Pending",
  391. "Target not specified",
  392. "Scaling not supported"
  393. };
  394. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  395. const void *args, int args_len)
  396. {
  397. u8 *buf, status;
  398. struct i2c_msg *msgs;
  399. int i, ret = true;
  400. /* Would be simpler to allocate both in one go ? */
  401. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  402. if (!buf)
  403. return false;
  404. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  405. if (!msgs) {
  406. kfree(buf);
  407. return false;
  408. }
  409. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  410. for (i = 0; i < args_len; i++) {
  411. msgs[i].addr = intel_sdvo->slave_addr;
  412. msgs[i].flags = 0;
  413. msgs[i].len = 2;
  414. msgs[i].buf = buf + 2 *i;
  415. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  416. buf[2*i + 1] = ((u8*)args)[i];
  417. }
  418. msgs[i].addr = intel_sdvo->slave_addr;
  419. msgs[i].flags = 0;
  420. msgs[i].len = 2;
  421. msgs[i].buf = buf + 2*i;
  422. buf[2*i + 0] = SDVO_I2C_OPCODE;
  423. buf[2*i + 1] = cmd;
  424. /* the following two are to read the response */
  425. status = SDVO_I2C_CMD_STATUS;
  426. msgs[i+1].addr = intel_sdvo->slave_addr;
  427. msgs[i+1].flags = 0;
  428. msgs[i+1].len = 1;
  429. msgs[i+1].buf = &status;
  430. msgs[i+2].addr = intel_sdvo->slave_addr;
  431. msgs[i+2].flags = I2C_M_RD;
  432. msgs[i+2].len = 1;
  433. msgs[i+2].buf = &status;
  434. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  435. if (ret < 0) {
  436. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  437. ret = false;
  438. goto out;
  439. }
  440. if (ret != i+3) {
  441. /* failure in I2C transfer */
  442. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  443. ret = false;
  444. }
  445. out:
  446. kfree(msgs);
  447. kfree(buf);
  448. return ret;
  449. }
  450. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  451. void *response, int response_len)
  452. {
  453. u8 retry = 5;
  454. u8 status;
  455. int i;
  456. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  457. /*
  458. * The documentation states that all commands will be
  459. * processed within 15µs, and that we need only poll
  460. * the status byte a maximum of 3 times in order for the
  461. * command to be complete.
  462. *
  463. * Check 5 times in case the hardware failed to read the docs.
  464. */
  465. if (!intel_sdvo_read_byte(intel_sdvo,
  466. SDVO_I2C_CMD_STATUS,
  467. &status))
  468. goto log_fail;
  469. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  470. udelay(15);
  471. if (!intel_sdvo_read_byte(intel_sdvo,
  472. SDVO_I2C_CMD_STATUS,
  473. &status))
  474. goto log_fail;
  475. }
  476. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  477. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  478. else
  479. DRM_LOG_KMS("(??? %d)", status);
  480. if (status != SDVO_CMD_STATUS_SUCCESS)
  481. goto log_fail;
  482. /* Read the command response */
  483. for (i = 0; i < response_len; i++) {
  484. if (!intel_sdvo_read_byte(intel_sdvo,
  485. SDVO_I2C_RETURN_0 + i,
  486. &((u8 *)response)[i]))
  487. goto log_fail;
  488. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  489. }
  490. DRM_LOG_KMS("\n");
  491. return true;
  492. log_fail:
  493. DRM_LOG_KMS("... failed\n");
  494. return false;
  495. }
  496. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  497. {
  498. if (mode->clock >= 100000)
  499. return 1;
  500. else if (mode->clock >= 50000)
  501. return 2;
  502. else
  503. return 4;
  504. }
  505. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  506. u8 ddc_bus)
  507. {
  508. /* This must be the immediately preceding write before the i2c xfer */
  509. return intel_sdvo_write_cmd(intel_sdvo,
  510. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  511. &ddc_bus, 1);
  512. }
  513. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  514. {
  515. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  516. return false;
  517. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  518. }
  519. static bool
  520. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  521. {
  522. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  523. return false;
  524. return intel_sdvo_read_response(intel_sdvo, value, len);
  525. }
  526. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  527. {
  528. struct intel_sdvo_set_target_input_args targets = {0};
  529. return intel_sdvo_set_value(intel_sdvo,
  530. SDVO_CMD_SET_TARGET_INPUT,
  531. &targets, sizeof(targets));
  532. }
  533. /**
  534. * Return whether each input is trained.
  535. *
  536. * This function is making an assumption about the layout of the response,
  537. * which should be checked against the docs.
  538. */
  539. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  540. {
  541. struct intel_sdvo_get_trained_inputs_response response;
  542. BUILD_BUG_ON(sizeof(response) != 1);
  543. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  544. &response, sizeof(response)))
  545. return false;
  546. *input_1 = response.input0_trained;
  547. *input_2 = response.input1_trained;
  548. return true;
  549. }
  550. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  551. u16 outputs)
  552. {
  553. return intel_sdvo_set_value(intel_sdvo,
  554. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  555. &outputs, sizeof(outputs));
  556. }
  557. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  558. u16 *outputs)
  559. {
  560. return intel_sdvo_get_value(intel_sdvo,
  561. SDVO_CMD_GET_ACTIVE_OUTPUTS,
  562. outputs, sizeof(*outputs));
  563. }
  564. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  565. int mode)
  566. {
  567. u8 state = SDVO_ENCODER_STATE_ON;
  568. switch (mode) {
  569. case DRM_MODE_DPMS_ON:
  570. state = SDVO_ENCODER_STATE_ON;
  571. break;
  572. case DRM_MODE_DPMS_STANDBY:
  573. state = SDVO_ENCODER_STATE_STANDBY;
  574. break;
  575. case DRM_MODE_DPMS_SUSPEND:
  576. state = SDVO_ENCODER_STATE_SUSPEND;
  577. break;
  578. case DRM_MODE_DPMS_OFF:
  579. state = SDVO_ENCODER_STATE_OFF;
  580. break;
  581. }
  582. return intel_sdvo_set_value(intel_sdvo,
  583. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  584. }
  585. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  586. int *clock_min,
  587. int *clock_max)
  588. {
  589. struct intel_sdvo_pixel_clock_range clocks;
  590. BUILD_BUG_ON(sizeof(clocks) != 4);
  591. if (!intel_sdvo_get_value(intel_sdvo,
  592. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  593. &clocks, sizeof(clocks)))
  594. return false;
  595. /* Convert the values from units of 10 kHz to kHz. */
  596. *clock_min = clocks.min * 10;
  597. *clock_max = clocks.max * 10;
  598. return true;
  599. }
  600. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  601. u16 outputs)
  602. {
  603. return intel_sdvo_set_value(intel_sdvo,
  604. SDVO_CMD_SET_TARGET_OUTPUT,
  605. &outputs, sizeof(outputs));
  606. }
  607. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  608. struct intel_sdvo_dtd *dtd)
  609. {
  610. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  611. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  612. }
  613. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  614. struct intel_sdvo_dtd *dtd)
  615. {
  616. return intel_sdvo_set_timing(intel_sdvo,
  617. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  618. }
  619. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  620. struct intel_sdvo_dtd *dtd)
  621. {
  622. return intel_sdvo_set_timing(intel_sdvo,
  623. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  624. }
  625. static bool
  626. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  627. uint16_t clock,
  628. uint16_t width,
  629. uint16_t height)
  630. {
  631. struct intel_sdvo_preferred_input_timing_args args;
  632. memset(&args, 0, sizeof(args));
  633. args.clock = clock;
  634. args.width = width;
  635. args.height = height;
  636. args.interlace = 0;
  637. if (intel_sdvo->is_lvds &&
  638. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  639. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  640. args.scaled = 1;
  641. return intel_sdvo_set_value(intel_sdvo,
  642. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  643. &args, sizeof(args));
  644. }
  645. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  646. struct intel_sdvo_dtd *dtd)
  647. {
  648. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  649. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  650. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  651. &dtd->part1, sizeof(dtd->part1)) &&
  652. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  653. &dtd->part2, sizeof(dtd->part2));
  654. }
  655. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  656. {
  657. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  658. }
  659. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  660. const struct drm_display_mode *mode)
  661. {
  662. uint16_t width, height;
  663. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  664. uint16_t h_sync_offset, v_sync_offset;
  665. int mode_clock;
  666. width = mode->hdisplay;
  667. height = mode->vdisplay;
  668. /* do some mode translations */
  669. h_blank_len = mode->htotal - mode->hdisplay;
  670. h_sync_len = mode->hsync_end - mode->hsync_start;
  671. v_blank_len = mode->vtotal - mode->vdisplay;
  672. v_sync_len = mode->vsync_end - mode->vsync_start;
  673. h_sync_offset = mode->hsync_start - mode->hdisplay;
  674. v_sync_offset = mode->vsync_start - mode->vdisplay;
  675. mode_clock = mode->clock;
  676. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  677. mode_clock /= 10;
  678. dtd->part1.clock = mode_clock;
  679. dtd->part1.h_active = width & 0xff;
  680. dtd->part1.h_blank = h_blank_len & 0xff;
  681. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  682. ((h_blank_len >> 8) & 0xf);
  683. dtd->part1.v_active = height & 0xff;
  684. dtd->part1.v_blank = v_blank_len & 0xff;
  685. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  686. ((v_blank_len >> 8) & 0xf);
  687. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  688. dtd->part2.h_sync_width = h_sync_len & 0xff;
  689. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  690. (v_sync_len & 0xf);
  691. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  692. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  693. ((v_sync_len & 0x30) >> 4);
  694. dtd->part2.dtd_flags = 0x18;
  695. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  696. dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  697. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  698. dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  699. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  700. dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  701. dtd->part2.sdvo_flags = 0;
  702. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  703. dtd->part2.reserved = 0;
  704. }
  705. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  706. const struct intel_sdvo_dtd *dtd)
  707. {
  708. mode->hdisplay = dtd->part1.h_active;
  709. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  710. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  711. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  712. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  713. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  714. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  715. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  716. mode->vdisplay = dtd->part1.v_active;
  717. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  718. mode->vsync_start = mode->vdisplay;
  719. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  720. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  721. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  722. mode->vsync_end = mode->vsync_start +
  723. (dtd->part2.v_sync_off_width & 0xf);
  724. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  725. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  726. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  727. mode->clock = dtd->part1.clock * 10;
  728. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  729. if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  730. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  731. if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  732. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  733. if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  734. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  735. }
  736. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  737. {
  738. struct intel_sdvo_encode encode;
  739. BUILD_BUG_ON(sizeof(encode) != 2);
  740. return intel_sdvo_get_value(intel_sdvo,
  741. SDVO_CMD_GET_SUPP_ENCODE,
  742. &encode, sizeof(encode));
  743. }
  744. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  745. uint8_t mode)
  746. {
  747. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  748. }
  749. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  750. uint8_t mode)
  751. {
  752. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  753. }
  754. #if 0
  755. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  756. {
  757. int i, j;
  758. uint8_t set_buf_index[2];
  759. uint8_t av_split;
  760. uint8_t buf_size;
  761. uint8_t buf[48];
  762. uint8_t *pos;
  763. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  764. for (i = 0; i <= av_split; i++) {
  765. set_buf_index[0] = i; set_buf_index[1] = 0;
  766. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  767. set_buf_index, 2);
  768. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  769. intel_sdvo_read_response(encoder, &buf_size, 1);
  770. pos = buf;
  771. for (j = 0; j <= buf_size; j += 8) {
  772. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  773. NULL, 0);
  774. intel_sdvo_read_response(encoder, pos, 8);
  775. pos += 8;
  776. }
  777. }
  778. }
  779. #endif
  780. static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
  781. unsigned if_index, uint8_t tx_rate,
  782. uint8_t *data, unsigned length)
  783. {
  784. uint8_t set_buf_index[2] = { if_index, 0 };
  785. uint8_t hbuf_size, tmp[8];
  786. int i;
  787. if (!intel_sdvo_set_value(intel_sdvo,
  788. SDVO_CMD_SET_HBUF_INDEX,
  789. set_buf_index, 2))
  790. return false;
  791. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
  792. &hbuf_size, 1))
  793. return false;
  794. /* Buffer size is 0 based, hooray! */
  795. hbuf_size++;
  796. DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
  797. if_index, length, hbuf_size);
  798. for (i = 0; i < hbuf_size; i += 8) {
  799. memset(tmp, 0, 8);
  800. if (i < length)
  801. memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
  802. if (!intel_sdvo_set_value(intel_sdvo,
  803. SDVO_CMD_SET_HBUF_DATA,
  804. tmp, 8))
  805. return false;
  806. }
  807. return intel_sdvo_set_value(intel_sdvo,
  808. SDVO_CMD_SET_HBUF_TXRATE,
  809. &tx_rate, 1);
  810. }
  811. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  812. {
  813. struct dip_infoframe avi_if = {
  814. .type = DIP_TYPE_AVI,
  815. .ver = DIP_VERSION_AVI,
  816. .len = DIP_LEN_AVI,
  817. };
  818. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  819. intel_dip_infoframe_csum(&avi_if);
  820. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  821. * we must not send the ecc field, either. */
  822. memcpy(sdvo_data, &avi_if, 3);
  823. sdvo_data[3] = avi_if.checksum;
  824. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  825. return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
  826. SDVO_HBUF_TX_VSYNC,
  827. sdvo_data, sizeof(sdvo_data));
  828. }
  829. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  830. {
  831. struct intel_sdvo_tv_format format;
  832. uint32_t format_map;
  833. format_map = 1 << intel_sdvo->tv_format_index;
  834. memset(&format, 0, sizeof(format));
  835. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  836. BUILD_BUG_ON(sizeof(format) != 6);
  837. return intel_sdvo_set_value(intel_sdvo,
  838. SDVO_CMD_SET_TV_FORMAT,
  839. &format, sizeof(format));
  840. }
  841. static bool
  842. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  843. const struct drm_display_mode *mode)
  844. {
  845. struct intel_sdvo_dtd output_dtd;
  846. if (!intel_sdvo_set_target_output(intel_sdvo,
  847. intel_sdvo->attached_output))
  848. return false;
  849. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  850. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  851. return false;
  852. return true;
  853. }
  854. /* Asks the sdvo controller for the preferred input mode given the output mode.
  855. * Unfortunately we have to set up the full output mode to do that. */
  856. static bool
  857. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  858. const struct drm_display_mode *mode,
  859. struct drm_display_mode *adjusted_mode)
  860. {
  861. struct intel_sdvo_dtd input_dtd;
  862. /* Reset the input timing to the screen. Assume always input 0. */
  863. if (!intel_sdvo_set_target_input(intel_sdvo))
  864. return false;
  865. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  866. mode->clock / 10,
  867. mode->hdisplay,
  868. mode->vdisplay))
  869. return false;
  870. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  871. &input_dtd))
  872. return false;
  873. intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  874. intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
  875. return true;
  876. }
  877. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  878. const struct drm_display_mode *mode,
  879. struct drm_display_mode *adjusted_mode)
  880. {
  881. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  882. int multiplier;
  883. /* We need to construct preferred input timings based on our
  884. * output timings. To do that, we have to set the output
  885. * timings, even though this isn't really the right place in
  886. * the sequence to do it. Oh well.
  887. */
  888. if (intel_sdvo->is_tv) {
  889. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  890. return false;
  891. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  892. mode,
  893. adjusted_mode);
  894. } else if (intel_sdvo->is_lvds) {
  895. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  896. intel_sdvo->sdvo_lvds_fixed_mode))
  897. return false;
  898. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  899. mode,
  900. adjusted_mode);
  901. }
  902. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  903. * SDVO device will factor out the multiplier during mode_set.
  904. */
  905. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  906. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  907. return true;
  908. }
  909. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  910. struct drm_display_mode *mode,
  911. struct drm_display_mode *adjusted_mode)
  912. {
  913. struct drm_device *dev = encoder->dev;
  914. struct drm_i915_private *dev_priv = dev->dev_private;
  915. struct drm_crtc *crtc = encoder->crtc;
  916. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  917. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  918. u32 sdvox;
  919. struct intel_sdvo_in_out_map in_out;
  920. struct intel_sdvo_dtd input_dtd, output_dtd;
  921. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  922. int rate;
  923. if (!mode)
  924. return;
  925. /* First, set the input mapping for the first input to our controlled
  926. * output. This is only correct if we're a single-input device, in
  927. * which case the first input is the output from the appropriate SDVO
  928. * channel on the motherboard. In a two-input device, the first input
  929. * will be SDVOB and the second SDVOC.
  930. */
  931. in_out.in0 = intel_sdvo->attached_output;
  932. in_out.in1 = 0;
  933. intel_sdvo_set_value(intel_sdvo,
  934. SDVO_CMD_SET_IN_OUT_MAP,
  935. &in_out, sizeof(in_out));
  936. /* Set the output timings to the screen */
  937. if (!intel_sdvo_set_target_output(intel_sdvo,
  938. intel_sdvo->attached_output))
  939. return;
  940. /* lvds has a special fixed output timing. */
  941. if (intel_sdvo->is_lvds)
  942. intel_sdvo_get_dtd_from_mode(&output_dtd,
  943. intel_sdvo->sdvo_lvds_fixed_mode);
  944. else
  945. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  946. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  947. DRM_INFO("Setting output timings on %s failed\n",
  948. SDVO_NAME(intel_sdvo));
  949. /* Set the input timing to the screen. Assume always input 0. */
  950. if (!intel_sdvo_set_target_input(intel_sdvo))
  951. return;
  952. if (intel_sdvo->has_hdmi_monitor) {
  953. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  954. intel_sdvo_set_colorimetry(intel_sdvo,
  955. SDVO_COLORIMETRY_RGB256);
  956. intel_sdvo_set_avi_infoframe(intel_sdvo);
  957. } else
  958. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  959. if (intel_sdvo->is_tv &&
  960. !intel_sdvo_set_tv_format(intel_sdvo))
  961. return;
  962. /* We have tried to get input timing in mode_fixup, and filled into
  963. * adjusted_mode.
  964. */
  965. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  966. if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
  967. input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
  968. if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  969. DRM_INFO("Setting input timings on %s failed\n",
  970. SDVO_NAME(intel_sdvo));
  971. switch (pixel_multiplier) {
  972. default:
  973. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  974. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  975. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  976. }
  977. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  978. return;
  979. /* Set the SDVO control regs. */
  980. if (INTEL_INFO(dev)->gen >= 4) {
  981. /* The real mode polarity is set by the SDVO commands, using
  982. * struct intel_sdvo_dtd. */
  983. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  984. if (intel_sdvo->is_hdmi)
  985. sdvox |= intel_sdvo->color_range;
  986. if (INTEL_INFO(dev)->gen < 5)
  987. sdvox |= SDVO_BORDER_ENABLE;
  988. } else {
  989. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  990. switch (intel_sdvo->sdvo_reg) {
  991. case SDVOB:
  992. sdvox &= SDVOB_PRESERVE_MASK;
  993. break;
  994. case SDVOC:
  995. sdvox &= SDVOC_PRESERVE_MASK;
  996. break;
  997. }
  998. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  999. }
  1000. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  1001. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  1002. else
  1003. sdvox |= TRANSCODER(intel_crtc->pipe);
  1004. if (intel_sdvo->has_hdmi_audio)
  1005. sdvox |= SDVO_AUDIO_ENABLE;
  1006. if (INTEL_INFO(dev)->gen >= 4) {
  1007. /* done in crtc_mode_set as the dpll_md reg must be written early */
  1008. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  1009. /* done in crtc_mode_set as it lives inside the dpll register */
  1010. } else {
  1011. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  1012. }
  1013. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  1014. INTEL_INFO(dev)->gen < 5)
  1015. sdvox |= SDVO_STALL_SELECT;
  1016. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1017. }
  1018. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  1019. {
  1020. struct intel_sdvo_connector *intel_sdvo_connector =
  1021. to_intel_sdvo_connector(&connector->base);
  1022. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1023. u16 active_outputs;
  1024. intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1025. if (active_outputs & intel_sdvo_connector->output_flag)
  1026. return true;
  1027. else
  1028. return false;
  1029. }
  1030. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1031. enum pipe *pipe)
  1032. {
  1033. struct drm_device *dev = encoder->base.dev;
  1034. struct drm_i915_private *dev_priv = dev->dev_private;
  1035. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1036. u32 tmp;
  1037. tmp = I915_READ(intel_sdvo->sdvo_reg);
  1038. if (!(tmp & SDVO_ENABLE))
  1039. return false;
  1040. if (HAS_PCH_CPT(dev))
  1041. *pipe = PORT_TO_PIPE_CPT(tmp);
  1042. else
  1043. *pipe = PORT_TO_PIPE(tmp);
  1044. return true;
  1045. }
  1046. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1047. {
  1048. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1049. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1050. u32 temp;
  1051. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1052. if (0)
  1053. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1054. DRM_MODE_DPMS_OFF);
  1055. temp = I915_READ(intel_sdvo->sdvo_reg);
  1056. if ((temp & SDVO_ENABLE) != 0) {
  1057. /* HW workaround for IBX, we need to move the port to
  1058. * transcoder A before disabling it. */
  1059. if (HAS_PCH_IBX(encoder->base.dev)) {
  1060. struct drm_crtc *crtc = encoder->base.crtc;
  1061. int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1062. if (temp & SDVO_PIPE_B_SELECT) {
  1063. temp &= ~SDVO_PIPE_B_SELECT;
  1064. I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1065. POSTING_READ(intel_sdvo->sdvo_reg);
  1066. /* Again we need to write this twice. */
  1067. I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1068. POSTING_READ(intel_sdvo->sdvo_reg);
  1069. /* Transcoder selection bits only update
  1070. * effectively on vblank. */
  1071. if (crtc)
  1072. intel_wait_for_vblank(encoder->base.dev, pipe);
  1073. else
  1074. msleep(50);
  1075. }
  1076. }
  1077. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1078. }
  1079. }
  1080. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1081. {
  1082. struct drm_device *dev = encoder->base.dev;
  1083. struct drm_i915_private *dev_priv = dev->dev_private;
  1084. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1085. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1086. u32 temp;
  1087. bool input1, input2;
  1088. int i;
  1089. u8 status;
  1090. temp = I915_READ(intel_sdvo->sdvo_reg);
  1091. if ((temp & SDVO_ENABLE) == 0) {
  1092. /* HW workaround for IBX, we need to move the port
  1093. * to transcoder A before disabling it. */
  1094. if (HAS_PCH_IBX(dev)) {
  1095. struct drm_crtc *crtc = encoder->base.crtc;
  1096. int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1097. /* Restore the transcoder select bit. */
  1098. if (pipe == PIPE_B)
  1099. temp |= SDVO_PIPE_B_SELECT;
  1100. }
  1101. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1102. }
  1103. for (i = 0; i < 2; i++)
  1104. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1105. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1106. /* Warn if the device reported failure to sync.
  1107. * A lot of SDVO devices fail to notify of sync, but it's
  1108. * a given it the status is a success, we succeeded.
  1109. */
  1110. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1111. DRM_DEBUG_KMS("First %s output reported failure to "
  1112. "sync\n", SDVO_NAME(intel_sdvo));
  1113. }
  1114. if (0)
  1115. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1116. DRM_MODE_DPMS_ON);
  1117. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1118. }
  1119. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1120. {
  1121. struct drm_crtc *crtc;
  1122. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1123. /* dvo supports only 2 dpms states. */
  1124. if (mode != DRM_MODE_DPMS_ON)
  1125. mode = DRM_MODE_DPMS_OFF;
  1126. if (mode == connector->dpms)
  1127. return;
  1128. connector->dpms = mode;
  1129. /* Only need to change hw state when actually enabled */
  1130. crtc = intel_sdvo->base.base.crtc;
  1131. if (!crtc) {
  1132. intel_sdvo->base.connectors_active = false;
  1133. return;
  1134. }
  1135. if (mode != DRM_MODE_DPMS_ON) {
  1136. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1137. if (0)
  1138. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1139. intel_sdvo->base.connectors_active = false;
  1140. intel_crtc_update_dpms(crtc);
  1141. } else {
  1142. intel_sdvo->base.connectors_active = true;
  1143. intel_crtc_update_dpms(crtc);
  1144. if (0)
  1145. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1146. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1147. }
  1148. intel_modeset_check_state(connector->dev);
  1149. }
  1150. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1151. struct drm_display_mode *mode)
  1152. {
  1153. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1154. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1155. return MODE_NO_DBLESCAN;
  1156. if (intel_sdvo->pixel_clock_min > mode->clock)
  1157. return MODE_CLOCK_LOW;
  1158. if (intel_sdvo->pixel_clock_max < mode->clock)
  1159. return MODE_CLOCK_HIGH;
  1160. if (intel_sdvo->is_lvds) {
  1161. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1162. return MODE_PANEL;
  1163. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1164. return MODE_PANEL;
  1165. }
  1166. return MODE_OK;
  1167. }
  1168. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1169. {
  1170. BUILD_BUG_ON(sizeof(*caps) != 8);
  1171. if (!intel_sdvo_get_value(intel_sdvo,
  1172. SDVO_CMD_GET_DEVICE_CAPS,
  1173. caps, sizeof(*caps)))
  1174. return false;
  1175. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1176. " vendor_id: %d\n"
  1177. " device_id: %d\n"
  1178. " device_rev_id: %d\n"
  1179. " sdvo_version_major: %d\n"
  1180. " sdvo_version_minor: %d\n"
  1181. " sdvo_inputs_mask: %d\n"
  1182. " smooth_scaling: %d\n"
  1183. " sharp_scaling: %d\n"
  1184. " up_scaling: %d\n"
  1185. " down_scaling: %d\n"
  1186. " stall_support: %d\n"
  1187. " output_flags: %d\n",
  1188. caps->vendor_id,
  1189. caps->device_id,
  1190. caps->device_rev_id,
  1191. caps->sdvo_version_major,
  1192. caps->sdvo_version_minor,
  1193. caps->sdvo_inputs_mask,
  1194. caps->smooth_scaling,
  1195. caps->sharp_scaling,
  1196. caps->up_scaling,
  1197. caps->down_scaling,
  1198. caps->stall_support,
  1199. caps->output_flags);
  1200. return true;
  1201. }
  1202. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1203. {
  1204. struct drm_device *dev = intel_sdvo->base.base.dev;
  1205. uint16_t hotplug;
  1206. /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1207. * on the line. */
  1208. if (IS_I945G(dev) || IS_I945GM(dev))
  1209. return 0;
  1210. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1211. &hotplug, sizeof(hotplug)))
  1212. return 0;
  1213. return hotplug;
  1214. }
  1215. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1216. {
  1217. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1218. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1219. &intel_sdvo->hotplug_active, 2);
  1220. }
  1221. static bool
  1222. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1223. {
  1224. /* Is there more than one type of output? */
  1225. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1226. }
  1227. static struct edid *
  1228. intel_sdvo_get_edid(struct drm_connector *connector)
  1229. {
  1230. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1231. return drm_get_edid(connector, &sdvo->ddc);
  1232. }
  1233. /* Mac mini hack -- use the same DDC as the analog connector */
  1234. static struct edid *
  1235. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1236. {
  1237. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1238. return drm_get_edid(connector,
  1239. intel_gmbus_get_adapter(dev_priv,
  1240. dev_priv->crt_ddc_pin));
  1241. }
  1242. static enum drm_connector_status
  1243. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1244. {
  1245. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1246. enum drm_connector_status status;
  1247. struct edid *edid;
  1248. edid = intel_sdvo_get_edid(connector);
  1249. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1250. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1251. /*
  1252. * Don't use the 1 as the argument of DDC bus switch to get
  1253. * the EDID. It is used for SDVO SPD ROM.
  1254. */
  1255. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1256. intel_sdvo->ddc_bus = ddc;
  1257. edid = intel_sdvo_get_edid(connector);
  1258. if (edid)
  1259. break;
  1260. }
  1261. /*
  1262. * If we found the EDID on the other bus,
  1263. * assume that is the correct DDC bus.
  1264. */
  1265. if (edid == NULL)
  1266. intel_sdvo->ddc_bus = saved_ddc;
  1267. }
  1268. /*
  1269. * When there is no edid and no monitor is connected with VGA
  1270. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1271. */
  1272. if (edid == NULL)
  1273. edid = intel_sdvo_get_analog_edid(connector);
  1274. status = connector_status_unknown;
  1275. if (edid != NULL) {
  1276. /* DDC bus is shared, match EDID to connector type */
  1277. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1278. status = connector_status_connected;
  1279. if (intel_sdvo->is_hdmi) {
  1280. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1281. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1282. }
  1283. } else
  1284. status = connector_status_disconnected;
  1285. kfree(edid);
  1286. }
  1287. if (status == connector_status_connected) {
  1288. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1289. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1290. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1291. }
  1292. return status;
  1293. }
  1294. static bool
  1295. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1296. struct edid *edid)
  1297. {
  1298. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1299. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1300. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1301. connector_is_digital, monitor_is_digital);
  1302. return connector_is_digital == monitor_is_digital;
  1303. }
  1304. static enum drm_connector_status
  1305. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1306. {
  1307. uint16_t response;
  1308. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1309. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1310. enum drm_connector_status ret;
  1311. if (!intel_sdvo_write_cmd(intel_sdvo,
  1312. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1313. return connector_status_unknown;
  1314. /* add 30ms delay when the output type might be TV */
  1315. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1316. msleep(30);
  1317. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1318. return connector_status_unknown;
  1319. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1320. response & 0xff, response >> 8,
  1321. intel_sdvo_connector->output_flag);
  1322. if (response == 0)
  1323. return connector_status_disconnected;
  1324. intel_sdvo->attached_output = response;
  1325. intel_sdvo->has_hdmi_monitor = false;
  1326. intel_sdvo->has_hdmi_audio = false;
  1327. if ((intel_sdvo_connector->output_flag & response) == 0)
  1328. ret = connector_status_disconnected;
  1329. else if (IS_TMDS(intel_sdvo_connector))
  1330. ret = intel_sdvo_tmds_sink_detect(connector);
  1331. else {
  1332. struct edid *edid;
  1333. /* if we have an edid check it matches the connection */
  1334. edid = intel_sdvo_get_edid(connector);
  1335. if (edid == NULL)
  1336. edid = intel_sdvo_get_analog_edid(connector);
  1337. if (edid != NULL) {
  1338. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1339. edid))
  1340. ret = connector_status_connected;
  1341. else
  1342. ret = connector_status_disconnected;
  1343. kfree(edid);
  1344. } else
  1345. ret = connector_status_connected;
  1346. }
  1347. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1348. if (ret == connector_status_connected) {
  1349. intel_sdvo->is_tv = false;
  1350. intel_sdvo->is_lvds = false;
  1351. intel_sdvo->base.needs_tv_clock = false;
  1352. if (response & SDVO_TV_MASK) {
  1353. intel_sdvo->is_tv = true;
  1354. intel_sdvo->base.needs_tv_clock = true;
  1355. }
  1356. if (response & SDVO_LVDS_MASK)
  1357. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1358. }
  1359. return ret;
  1360. }
  1361. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1362. {
  1363. struct edid *edid;
  1364. /* set the bus switch and get the modes */
  1365. edid = intel_sdvo_get_edid(connector);
  1366. /*
  1367. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1368. * link between analog and digital outputs. So, if the regular SDVO
  1369. * DDC fails, check to see if the analog output is disconnected, in
  1370. * which case we'll look there for the digital DDC data.
  1371. */
  1372. if (edid == NULL)
  1373. edid = intel_sdvo_get_analog_edid(connector);
  1374. if (edid != NULL) {
  1375. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1376. edid)) {
  1377. drm_mode_connector_update_edid_property(connector, edid);
  1378. drm_add_edid_modes(connector, edid);
  1379. }
  1380. kfree(edid);
  1381. }
  1382. }
  1383. /*
  1384. * Set of SDVO TV modes.
  1385. * Note! This is in reply order (see loop in get_tv_modes).
  1386. * XXX: all 60Hz refresh?
  1387. */
  1388. static const struct drm_display_mode sdvo_tv_modes[] = {
  1389. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1390. 416, 0, 200, 201, 232, 233, 0,
  1391. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1392. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1393. 416, 0, 240, 241, 272, 273, 0,
  1394. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1395. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1396. 496, 0, 300, 301, 332, 333, 0,
  1397. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1398. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1399. 736, 0, 350, 351, 382, 383, 0,
  1400. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1401. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1402. 736, 0, 400, 401, 432, 433, 0,
  1403. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1404. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1405. 736, 0, 480, 481, 512, 513, 0,
  1406. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1407. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1408. 800, 0, 480, 481, 512, 513, 0,
  1409. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1410. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1411. 800, 0, 576, 577, 608, 609, 0,
  1412. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1413. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1414. 816, 0, 350, 351, 382, 383, 0,
  1415. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1416. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1417. 816, 0, 400, 401, 432, 433, 0,
  1418. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1419. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1420. 816, 0, 480, 481, 512, 513, 0,
  1421. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1422. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1423. 816, 0, 540, 541, 572, 573, 0,
  1424. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1425. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1426. 816, 0, 576, 577, 608, 609, 0,
  1427. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1428. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1429. 864, 0, 576, 577, 608, 609, 0,
  1430. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1431. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1432. 896, 0, 600, 601, 632, 633, 0,
  1433. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1434. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1435. 928, 0, 624, 625, 656, 657, 0,
  1436. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1437. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1438. 1016, 0, 766, 767, 798, 799, 0,
  1439. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1440. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1441. 1120, 0, 768, 769, 800, 801, 0,
  1442. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1443. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1444. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1445. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1446. };
  1447. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1448. {
  1449. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1450. struct intel_sdvo_sdtv_resolution_request tv_res;
  1451. uint32_t reply = 0, format_map = 0;
  1452. int i;
  1453. /* Read the list of supported input resolutions for the selected TV
  1454. * format.
  1455. */
  1456. format_map = 1 << intel_sdvo->tv_format_index;
  1457. memcpy(&tv_res, &format_map,
  1458. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1459. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1460. return;
  1461. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1462. if (!intel_sdvo_write_cmd(intel_sdvo,
  1463. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1464. &tv_res, sizeof(tv_res)))
  1465. return;
  1466. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1467. return;
  1468. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1469. if (reply & (1 << i)) {
  1470. struct drm_display_mode *nmode;
  1471. nmode = drm_mode_duplicate(connector->dev,
  1472. &sdvo_tv_modes[i]);
  1473. if (nmode)
  1474. drm_mode_probed_add(connector, nmode);
  1475. }
  1476. }
  1477. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1478. {
  1479. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1480. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1481. struct drm_display_mode *newmode;
  1482. /*
  1483. * Attempt to get the mode list from DDC.
  1484. * Assume that the preferred modes are
  1485. * arranged in priority order.
  1486. */
  1487. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1488. if (list_empty(&connector->probed_modes) == false)
  1489. goto end;
  1490. /* Fetch modes from VBT */
  1491. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1492. newmode = drm_mode_duplicate(connector->dev,
  1493. dev_priv->sdvo_lvds_vbt_mode);
  1494. if (newmode != NULL) {
  1495. /* Guarantee the mode is preferred */
  1496. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1497. DRM_MODE_TYPE_DRIVER);
  1498. drm_mode_probed_add(connector, newmode);
  1499. }
  1500. }
  1501. end:
  1502. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1503. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1504. intel_sdvo->sdvo_lvds_fixed_mode =
  1505. drm_mode_duplicate(connector->dev, newmode);
  1506. intel_sdvo->is_lvds = true;
  1507. break;
  1508. }
  1509. }
  1510. }
  1511. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1512. {
  1513. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1514. if (IS_TV(intel_sdvo_connector))
  1515. intel_sdvo_get_tv_modes(connector);
  1516. else if (IS_LVDS(intel_sdvo_connector))
  1517. intel_sdvo_get_lvds_modes(connector);
  1518. else
  1519. intel_sdvo_get_ddc_modes(connector);
  1520. return !list_empty(&connector->probed_modes);
  1521. }
  1522. static void
  1523. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1524. {
  1525. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1526. struct drm_device *dev = connector->dev;
  1527. if (intel_sdvo_connector->left)
  1528. drm_property_destroy(dev, intel_sdvo_connector->left);
  1529. if (intel_sdvo_connector->right)
  1530. drm_property_destroy(dev, intel_sdvo_connector->right);
  1531. if (intel_sdvo_connector->top)
  1532. drm_property_destroy(dev, intel_sdvo_connector->top);
  1533. if (intel_sdvo_connector->bottom)
  1534. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1535. if (intel_sdvo_connector->hpos)
  1536. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1537. if (intel_sdvo_connector->vpos)
  1538. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1539. if (intel_sdvo_connector->saturation)
  1540. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1541. if (intel_sdvo_connector->contrast)
  1542. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1543. if (intel_sdvo_connector->hue)
  1544. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1545. if (intel_sdvo_connector->sharpness)
  1546. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1547. if (intel_sdvo_connector->flicker_filter)
  1548. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1549. if (intel_sdvo_connector->flicker_filter_2d)
  1550. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1551. if (intel_sdvo_connector->flicker_filter_adaptive)
  1552. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1553. if (intel_sdvo_connector->tv_luma_filter)
  1554. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1555. if (intel_sdvo_connector->tv_chroma_filter)
  1556. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1557. if (intel_sdvo_connector->dot_crawl)
  1558. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1559. if (intel_sdvo_connector->brightness)
  1560. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1561. }
  1562. static void intel_sdvo_destroy(struct drm_connector *connector)
  1563. {
  1564. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1565. if (intel_sdvo_connector->tv_format)
  1566. drm_property_destroy(connector->dev,
  1567. intel_sdvo_connector->tv_format);
  1568. intel_sdvo_destroy_enhance_property(connector);
  1569. drm_sysfs_connector_remove(connector);
  1570. drm_connector_cleanup(connector);
  1571. kfree(intel_sdvo_connector);
  1572. }
  1573. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1574. {
  1575. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1576. struct edid *edid;
  1577. bool has_audio = false;
  1578. if (!intel_sdvo->is_hdmi)
  1579. return false;
  1580. edid = intel_sdvo_get_edid(connector);
  1581. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1582. has_audio = drm_detect_monitor_audio(edid);
  1583. kfree(edid);
  1584. return has_audio;
  1585. }
  1586. static int
  1587. intel_sdvo_set_property(struct drm_connector *connector,
  1588. struct drm_property *property,
  1589. uint64_t val)
  1590. {
  1591. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1592. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1593. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1594. uint16_t temp_value;
  1595. uint8_t cmd;
  1596. int ret;
  1597. ret = drm_object_property_set_value(&connector->base, property, val);
  1598. if (ret)
  1599. return ret;
  1600. if (property == dev_priv->force_audio_property) {
  1601. int i = val;
  1602. bool has_audio;
  1603. if (i == intel_sdvo_connector->force_audio)
  1604. return 0;
  1605. intel_sdvo_connector->force_audio = i;
  1606. if (i == HDMI_AUDIO_AUTO)
  1607. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1608. else
  1609. has_audio = (i == HDMI_AUDIO_ON);
  1610. if (has_audio == intel_sdvo->has_hdmi_audio)
  1611. return 0;
  1612. intel_sdvo->has_hdmi_audio = has_audio;
  1613. goto done;
  1614. }
  1615. if (property == dev_priv->broadcast_rgb_property) {
  1616. if (val == !!intel_sdvo->color_range)
  1617. return 0;
  1618. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1619. goto done;
  1620. }
  1621. #define CHECK_PROPERTY(name, NAME) \
  1622. if (intel_sdvo_connector->name == property) { \
  1623. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1624. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1625. cmd = SDVO_CMD_SET_##NAME; \
  1626. intel_sdvo_connector->cur_##name = temp_value; \
  1627. goto set_value; \
  1628. }
  1629. if (property == intel_sdvo_connector->tv_format) {
  1630. if (val >= TV_FORMAT_NUM)
  1631. return -EINVAL;
  1632. if (intel_sdvo->tv_format_index ==
  1633. intel_sdvo_connector->tv_format_supported[val])
  1634. return 0;
  1635. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1636. goto done;
  1637. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1638. temp_value = val;
  1639. if (intel_sdvo_connector->left == property) {
  1640. drm_object_property_set_value(&connector->base,
  1641. intel_sdvo_connector->right, val);
  1642. if (intel_sdvo_connector->left_margin == temp_value)
  1643. return 0;
  1644. intel_sdvo_connector->left_margin = temp_value;
  1645. intel_sdvo_connector->right_margin = temp_value;
  1646. temp_value = intel_sdvo_connector->max_hscan -
  1647. intel_sdvo_connector->left_margin;
  1648. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1649. goto set_value;
  1650. } else if (intel_sdvo_connector->right == property) {
  1651. drm_object_property_set_value(&connector->base,
  1652. intel_sdvo_connector->left, val);
  1653. if (intel_sdvo_connector->right_margin == temp_value)
  1654. return 0;
  1655. intel_sdvo_connector->left_margin = temp_value;
  1656. intel_sdvo_connector->right_margin = temp_value;
  1657. temp_value = intel_sdvo_connector->max_hscan -
  1658. intel_sdvo_connector->left_margin;
  1659. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1660. goto set_value;
  1661. } else if (intel_sdvo_connector->top == property) {
  1662. drm_object_property_set_value(&connector->base,
  1663. intel_sdvo_connector->bottom, val);
  1664. if (intel_sdvo_connector->top_margin == temp_value)
  1665. return 0;
  1666. intel_sdvo_connector->top_margin = temp_value;
  1667. intel_sdvo_connector->bottom_margin = temp_value;
  1668. temp_value = intel_sdvo_connector->max_vscan -
  1669. intel_sdvo_connector->top_margin;
  1670. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1671. goto set_value;
  1672. } else if (intel_sdvo_connector->bottom == property) {
  1673. drm_object_property_set_value(&connector->base,
  1674. intel_sdvo_connector->top, val);
  1675. if (intel_sdvo_connector->bottom_margin == temp_value)
  1676. return 0;
  1677. intel_sdvo_connector->top_margin = temp_value;
  1678. intel_sdvo_connector->bottom_margin = temp_value;
  1679. temp_value = intel_sdvo_connector->max_vscan -
  1680. intel_sdvo_connector->top_margin;
  1681. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1682. goto set_value;
  1683. }
  1684. CHECK_PROPERTY(hpos, HPOS)
  1685. CHECK_PROPERTY(vpos, VPOS)
  1686. CHECK_PROPERTY(saturation, SATURATION)
  1687. CHECK_PROPERTY(contrast, CONTRAST)
  1688. CHECK_PROPERTY(hue, HUE)
  1689. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1690. CHECK_PROPERTY(sharpness, SHARPNESS)
  1691. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1692. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1693. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1694. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1695. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1696. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1697. }
  1698. return -EINVAL; /* unknown property */
  1699. set_value:
  1700. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1701. return -EIO;
  1702. done:
  1703. if (intel_sdvo->base.base.crtc) {
  1704. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1705. intel_set_mode(crtc, &crtc->mode,
  1706. crtc->x, crtc->y, crtc->fb);
  1707. }
  1708. return 0;
  1709. #undef CHECK_PROPERTY
  1710. }
  1711. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1712. .mode_fixup = intel_sdvo_mode_fixup,
  1713. .mode_set = intel_sdvo_mode_set,
  1714. .disable = intel_encoder_noop,
  1715. };
  1716. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1717. .dpms = intel_sdvo_dpms,
  1718. .detect = intel_sdvo_detect,
  1719. .fill_modes = drm_helper_probe_single_connector_modes,
  1720. .set_property = intel_sdvo_set_property,
  1721. .destroy = intel_sdvo_destroy,
  1722. };
  1723. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1724. .get_modes = intel_sdvo_get_modes,
  1725. .mode_valid = intel_sdvo_mode_valid,
  1726. .best_encoder = intel_best_encoder,
  1727. };
  1728. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1729. {
  1730. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1731. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1732. drm_mode_destroy(encoder->dev,
  1733. intel_sdvo->sdvo_lvds_fixed_mode);
  1734. i2c_del_adapter(&intel_sdvo->ddc);
  1735. intel_encoder_destroy(encoder);
  1736. }
  1737. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1738. .destroy = intel_sdvo_enc_destroy,
  1739. };
  1740. static void
  1741. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1742. {
  1743. uint16_t mask = 0;
  1744. unsigned int num_bits;
  1745. /* Make a mask of outputs less than or equal to our own priority in the
  1746. * list.
  1747. */
  1748. switch (sdvo->controlled_output) {
  1749. case SDVO_OUTPUT_LVDS1:
  1750. mask |= SDVO_OUTPUT_LVDS1;
  1751. case SDVO_OUTPUT_LVDS0:
  1752. mask |= SDVO_OUTPUT_LVDS0;
  1753. case SDVO_OUTPUT_TMDS1:
  1754. mask |= SDVO_OUTPUT_TMDS1;
  1755. case SDVO_OUTPUT_TMDS0:
  1756. mask |= SDVO_OUTPUT_TMDS0;
  1757. case SDVO_OUTPUT_RGB1:
  1758. mask |= SDVO_OUTPUT_RGB1;
  1759. case SDVO_OUTPUT_RGB0:
  1760. mask |= SDVO_OUTPUT_RGB0;
  1761. break;
  1762. }
  1763. /* Count bits to find what number we are in the priority list. */
  1764. mask &= sdvo->caps.output_flags;
  1765. num_bits = hweight16(mask);
  1766. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1767. if (num_bits > 3)
  1768. num_bits = 3;
  1769. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1770. sdvo->ddc_bus = 1 << num_bits;
  1771. }
  1772. /**
  1773. * Choose the appropriate DDC bus for control bus switch command for this
  1774. * SDVO output based on the controlled output.
  1775. *
  1776. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1777. * outputs, then LVDS outputs.
  1778. */
  1779. static void
  1780. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1781. struct intel_sdvo *sdvo, u32 reg)
  1782. {
  1783. struct sdvo_device_mapping *mapping;
  1784. if (sdvo->is_sdvob)
  1785. mapping = &(dev_priv->sdvo_mappings[0]);
  1786. else
  1787. mapping = &(dev_priv->sdvo_mappings[1]);
  1788. if (mapping->initialized)
  1789. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1790. else
  1791. intel_sdvo_guess_ddc_bus(sdvo);
  1792. }
  1793. static void
  1794. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1795. struct intel_sdvo *sdvo, u32 reg)
  1796. {
  1797. struct sdvo_device_mapping *mapping;
  1798. u8 pin;
  1799. if (sdvo->is_sdvob)
  1800. mapping = &dev_priv->sdvo_mappings[0];
  1801. else
  1802. mapping = &dev_priv->sdvo_mappings[1];
  1803. if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
  1804. pin = mapping->i2c_pin;
  1805. else
  1806. pin = GMBUS_PORT_DPB;
  1807. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1808. /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
  1809. * our code totally fails once we start using gmbus. Hence fall back to
  1810. * bit banging for now. */
  1811. intel_gmbus_force_bit(sdvo->i2c, true);
  1812. }
  1813. /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
  1814. static void
  1815. intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
  1816. {
  1817. intel_gmbus_force_bit(sdvo->i2c, false);
  1818. }
  1819. static bool
  1820. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1821. {
  1822. return intel_sdvo_check_supp_encode(intel_sdvo);
  1823. }
  1824. static u8
  1825. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1826. {
  1827. struct drm_i915_private *dev_priv = dev->dev_private;
  1828. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1829. if (sdvo->is_sdvob) {
  1830. my_mapping = &dev_priv->sdvo_mappings[0];
  1831. other_mapping = &dev_priv->sdvo_mappings[1];
  1832. } else {
  1833. my_mapping = &dev_priv->sdvo_mappings[1];
  1834. other_mapping = &dev_priv->sdvo_mappings[0];
  1835. }
  1836. /* If the BIOS described our SDVO device, take advantage of it. */
  1837. if (my_mapping->slave_addr)
  1838. return my_mapping->slave_addr;
  1839. /* If the BIOS only described a different SDVO device, use the
  1840. * address that it isn't using.
  1841. */
  1842. if (other_mapping->slave_addr) {
  1843. if (other_mapping->slave_addr == 0x70)
  1844. return 0x72;
  1845. else
  1846. return 0x70;
  1847. }
  1848. /* No SDVO device info is found for another DVO port,
  1849. * so use mapping assumption we had before BIOS parsing.
  1850. */
  1851. if (sdvo->is_sdvob)
  1852. return 0x70;
  1853. else
  1854. return 0x72;
  1855. }
  1856. static void
  1857. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1858. struct intel_sdvo *encoder)
  1859. {
  1860. drm_connector_init(encoder->base.base.dev,
  1861. &connector->base.base,
  1862. &intel_sdvo_connector_funcs,
  1863. connector->base.base.connector_type);
  1864. drm_connector_helper_add(&connector->base.base,
  1865. &intel_sdvo_connector_helper_funcs);
  1866. connector->base.base.interlace_allowed = 1;
  1867. connector->base.base.doublescan_allowed = 0;
  1868. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1869. connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  1870. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1871. drm_sysfs_connector_add(&connector->base.base);
  1872. }
  1873. static void
  1874. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1875. {
  1876. struct drm_device *dev = connector->base.base.dev;
  1877. intel_attach_force_audio_property(&connector->base.base);
  1878. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1879. intel_attach_broadcast_rgb_property(&connector->base.base);
  1880. }
  1881. static bool
  1882. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1883. {
  1884. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1885. struct drm_connector *connector;
  1886. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1887. struct intel_connector *intel_connector;
  1888. struct intel_sdvo_connector *intel_sdvo_connector;
  1889. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1890. if (!intel_sdvo_connector)
  1891. return false;
  1892. if (device == 0) {
  1893. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1894. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1895. } else if (device == 1) {
  1896. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1897. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1898. }
  1899. intel_connector = &intel_sdvo_connector->base;
  1900. connector = &intel_connector->base;
  1901. if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  1902. intel_sdvo_connector->output_flag) {
  1903. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1904. intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  1905. /* Some SDVO devices have one-shot hotplug interrupts.
  1906. * Ensure that they get re-enabled when an interrupt happens.
  1907. */
  1908. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1909. intel_sdvo_enable_hotplug(intel_encoder);
  1910. } else {
  1911. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1912. }
  1913. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1914. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1915. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1916. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1917. intel_sdvo->is_hdmi = true;
  1918. }
  1919. intel_sdvo->base.cloneable = true;
  1920. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1921. if (intel_sdvo->is_hdmi)
  1922. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1923. return true;
  1924. }
  1925. static bool
  1926. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1927. {
  1928. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1929. struct drm_connector *connector;
  1930. struct intel_connector *intel_connector;
  1931. struct intel_sdvo_connector *intel_sdvo_connector;
  1932. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1933. if (!intel_sdvo_connector)
  1934. return false;
  1935. intel_connector = &intel_sdvo_connector->base;
  1936. connector = &intel_connector->base;
  1937. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1938. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1939. intel_sdvo->controlled_output |= type;
  1940. intel_sdvo_connector->output_flag = type;
  1941. intel_sdvo->is_tv = true;
  1942. intel_sdvo->base.needs_tv_clock = true;
  1943. intel_sdvo->base.cloneable = false;
  1944. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1945. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1946. goto err;
  1947. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1948. goto err;
  1949. return true;
  1950. err:
  1951. intel_sdvo_destroy(connector);
  1952. return false;
  1953. }
  1954. static bool
  1955. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1956. {
  1957. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1958. struct drm_connector *connector;
  1959. struct intel_connector *intel_connector;
  1960. struct intel_sdvo_connector *intel_sdvo_connector;
  1961. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1962. if (!intel_sdvo_connector)
  1963. return false;
  1964. intel_connector = &intel_sdvo_connector->base;
  1965. connector = &intel_connector->base;
  1966. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1967. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1968. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1969. if (device == 0) {
  1970. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1971. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1972. } else if (device == 1) {
  1973. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1974. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1975. }
  1976. intel_sdvo->base.cloneable = true;
  1977. intel_sdvo_connector_init(intel_sdvo_connector,
  1978. intel_sdvo);
  1979. return true;
  1980. }
  1981. static bool
  1982. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1983. {
  1984. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1985. struct drm_connector *connector;
  1986. struct intel_connector *intel_connector;
  1987. struct intel_sdvo_connector *intel_sdvo_connector;
  1988. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1989. if (!intel_sdvo_connector)
  1990. return false;
  1991. intel_connector = &intel_sdvo_connector->base;
  1992. connector = &intel_connector->base;
  1993. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1994. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1995. if (device == 0) {
  1996. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1997. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1998. } else if (device == 1) {
  1999. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  2000. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  2001. }
  2002. /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
  2003. intel_sdvo->base.cloneable = false;
  2004. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2005. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2006. goto err;
  2007. return true;
  2008. err:
  2009. intel_sdvo_destroy(connector);
  2010. return false;
  2011. }
  2012. static bool
  2013. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  2014. {
  2015. intel_sdvo->is_tv = false;
  2016. intel_sdvo->base.needs_tv_clock = false;
  2017. intel_sdvo->is_lvds = false;
  2018. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  2019. if (flags & SDVO_OUTPUT_TMDS0)
  2020. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  2021. return false;
  2022. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  2023. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  2024. return false;
  2025. /* TV has no XXX1 function block */
  2026. if (flags & SDVO_OUTPUT_SVID0)
  2027. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  2028. return false;
  2029. if (flags & SDVO_OUTPUT_CVBS0)
  2030. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  2031. return false;
  2032. if (flags & SDVO_OUTPUT_YPRPB0)
  2033. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  2034. return false;
  2035. if (flags & SDVO_OUTPUT_RGB0)
  2036. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  2037. return false;
  2038. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  2039. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  2040. return false;
  2041. if (flags & SDVO_OUTPUT_LVDS0)
  2042. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  2043. return false;
  2044. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  2045. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  2046. return false;
  2047. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  2048. unsigned char bytes[2];
  2049. intel_sdvo->controlled_output = 0;
  2050. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2051. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2052. SDVO_NAME(intel_sdvo),
  2053. bytes[0], bytes[1]);
  2054. return false;
  2055. }
  2056. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2057. return true;
  2058. }
  2059. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2060. struct intel_sdvo_connector *intel_sdvo_connector,
  2061. int type)
  2062. {
  2063. struct drm_device *dev = intel_sdvo->base.base.dev;
  2064. struct intel_sdvo_tv_format format;
  2065. uint32_t format_map, i;
  2066. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2067. return false;
  2068. BUILD_BUG_ON(sizeof(format) != 6);
  2069. if (!intel_sdvo_get_value(intel_sdvo,
  2070. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2071. &format, sizeof(format)))
  2072. return false;
  2073. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2074. if (format_map == 0)
  2075. return false;
  2076. intel_sdvo_connector->format_supported_num = 0;
  2077. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2078. if (format_map & (1 << i))
  2079. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2080. intel_sdvo_connector->tv_format =
  2081. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2082. "mode", intel_sdvo_connector->format_supported_num);
  2083. if (!intel_sdvo_connector->tv_format)
  2084. return false;
  2085. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2086. drm_property_add_enum(
  2087. intel_sdvo_connector->tv_format, i,
  2088. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2089. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2090. drm_object_attach_property(&intel_sdvo_connector->base.base.base,
  2091. intel_sdvo_connector->tv_format, 0);
  2092. return true;
  2093. }
  2094. #define ENHANCEMENT(name, NAME) do { \
  2095. if (enhancements.name) { \
  2096. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2097. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2098. return false; \
  2099. intel_sdvo_connector->max_##name = data_value[0]; \
  2100. intel_sdvo_connector->cur_##name = response; \
  2101. intel_sdvo_connector->name = \
  2102. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2103. if (!intel_sdvo_connector->name) return false; \
  2104. drm_object_attach_property(&connector->base, \
  2105. intel_sdvo_connector->name, \
  2106. intel_sdvo_connector->cur_##name); \
  2107. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2108. data_value[0], data_value[1], response); \
  2109. } \
  2110. } while (0)
  2111. static bool
  2112. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2113. struct intel_sdvo_connector *intel_sdvo_connector,
  2114. struct intel_sdvo_enhancements_reply enhancements)
  2115. {
  2116. struct drm_device *dev = intel_sdvo->base.base.dev;
  2117. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2118. uint16_t response, data_value[2];
  2119. /* when horizontal overscan is supported, Add the left/right property */
  2120. if (enhancements.overscan_h) {
  2121. if (!intel_sdvo_get_value(intel_sdvo,
  2122. SDVO_CMD_GET_MAX_OVERSCAN_H,
  2123. &data_value, 4))
  2124. return false;
  2125. if (!intel_sdvo_get_value(intel_sdvo,
  2126. SDVO_CMD_GET_OVERSCAN_H,
  2127. &response, 2))
  2128. return false;
  2129. intel_sdvo_connector->max_hscan = data_value[0];
  2130. intel_sdvo_connector->left_margin = data_value[0] - response;
  2131. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2132. intel_sdvo_connector->left =
  2133. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2134. if (!intel_sdvo_connector->left)
  2135. return false;
  2136. drm_object_attach_property(&connector->base,
  2137. intel_sdvo_connector->left,
  2138. intel_sdvo_connector->left_margin);
  2139. intel_sdvo_connector->right =
  2140. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2141. if (!intel_sdvo_connector->right)
  2142. return false;
  2143. drm_object_attach_property(&connector->base,
  2144. intel_sdvo_connector->right,
  2145. intel_sdvo_connector->right_margin);
  2146. DRM_DEBUG_KMS("h_overscan: max %d, "
  2147. "default %d, current %d\n",
  2148. data_value[0], data_value[1], response);
  2149. }
  2150. if (enhancements.overscan_v) {
  2151. if (!intel_sdvo_get_value(intel_sdvo,
  2152. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2153. &data_value, 4))
  2154. return false;
  2155. if (!intel_sdvo_get_value(intel_sdvo,
  2156. SDVO_CMD_GET_OVERSCAN_V,
  2157. &response, 2))
  2158. return false;
  2159. intel_sdvo_connector->max_vscan = data_value[0];
  2160. intel_sdvo_connector->top_margin = data_value[0] - response;
  2161. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2162. intel_sdvo_connector->top =
  2163. drm_property_create_range(dev, 0,
  2164. "top_margin", 0, data_value[0]);
  2165. if (!intel_sdvo_connector->top)
  2166. return false;
  2167. drm_object_attach_property(&connector->base,
  2168. intel_sdvo_connector->top,
  2169. intel_sdvo_connector->top_margin);
  2170. intel_sdvo_connector->bottom =
  2171. drm_property_create_range(dev, 0,
  2172. "bottom_margin", 0, data_value[0]);
  2173. if (!intel_sdvo_connector->bottom)
  2174. return false;
  2175. drm_object_attach_property(&connector->base,
  2176. intel_sdvo_connector->bottom,
  2177. intel_sdvo_connector->bottom_margin);
  2178. DRM_DEBUG_KMS("v_overscan: max %d, "
  2179. "default %d, current %d\n",
  2180. data_value[0], data_value[1], response);
  2181. }
  2182. ENHANCEMENT(hpos, HPOS);
  2183. ENHANCEMENT(vpos, VPOS);
  2184. ENHANCEMENT(saturation, SATURATION);
  2185. ENHANCEMENT(contrast, CONTRAST);
  2186. ENHANCEMENT(hue, HUE);
  2187. ENHANCEMENT(sharpness, SHARPNESS);
  2188. ENHANCEMENT(brightness, BRIGHTNESS);
  2189. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2190. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2191. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2192. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2193. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2194. if (enhancements.dot_crawl) {
  2195. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2196. return false;
  2197. intel_sdvo_connector->max_dot_crawl = 1;
  2198. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2199. intel_sdvo_connector->dot_crawl =
  2200. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2201. if (!intel_sdvo_connector->dot_crawl)
  2202. return false;
  2203. drm_object_attach_property(&connector->base,
  2204. intel_sdvo_connector->dot_crawl,
  2205. intel_sdvo_connector->cur_dot_crawl);
  2206. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2207. }
  2208. return true;
  2209. }
  2210. static bool
  2211. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2212. struct intel_sdvo_connector *intel_sdvo_connector,
  2213. struct intel_sdvo_enhancements_reply enhancements)
  2214. {
  2215. struct drm_device *dev = intel_sdvo->base.base.dev;
  2216. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2217. uint16_t response, data_value[2];
  2218. ENHANCEMENT(brightness, BRIGHTNESS);
  2219. return true;
  2220. }
  2221. #undef ENHANCEMENT
  2222. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2223. struct intel_sdvo_connector *intel_sdvo_connector)
  2224. {
  2225. union {
  2226. struct intel_sdvo_enhancements_reply reply;
  2227. uint16_t response;
  2228. } enhancements;
  2229. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2230. enhancements.response = 0;
  2231. intel_sdvo_get_value(intel_sdvo,
  2232. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2233. &enhancements, sizeof(enhancements));
  2234. if (enhancements.response == 0) {
  2235. DRM_DEBUG_KMS("No enhancement is supported\n");
  2236. return true;
  2237. }
  2238. if (IS_TV(intel_sdvo_connector))
  2239. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2240. else if (IS_LVDS(intel_sdvo_connector))
  2241. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2242. else
  2243. return true;
  2244. }
  2245. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2246. struct i2c_msg *msgs,
  2247. int num)
  2248. {
  2249. struct intel_sdvo *sdvo = adapter->algo_data;
  2250. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2251. return -EIO;
  2252. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2253. }
  2254. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2255. {
  2256. struct intel_sdvo *sdvo = adapter->algo_data;
  2257. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2258. }
  2259. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2260. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2261. .functionality = intel_sdvo_ddc_proxy_func
  2262. };
  2263. static bool
  2264. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2265. struct drm_device *dev)
  2266. {
  2267. sdvo->ddc.owner = THIS_MODULE;
  2268. sdvo->ddc.class = I2C_CLASS_DDC;
  2269. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2270. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2271. sdvo->ddc.algo_data = sdvo;
  2272. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2273. return i2c_add_adapter(&sdvo->ddc) == 0;
  2274. }
  2275. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2276. {
  2277. struct drm_i915_private *dev_priv = dev->dev_private;
  2278. struct intel_encoder *intel_encoder;
  2279. struct intel_sdvo *intel_sdvo;
  2280. u32 hotplug_mask;
  2281. int i;
  2282. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2283. if (!intel_sdvo)
  2284. return false;
  2285. intel_sdvo->sdvo_reg = sdvo_reg;
  2286. intel_sdvo->is_sdvob = is_sdvob;
  2287. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2288. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2289. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
  2290. goto err_i2c_bus;
  2291. /* encoder type will be decided later */
  2292. intel_encoder = &intel_sdvo->base;
  2293. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2294. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2295. /* Read the regs to test if we can talk to the device */
  2296. for (i = 0; i < 0x40; i++) {
  2297. u8 byte;
  2298. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2299. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2300. SDVO_NAME(intel_sdvo));
  2301. goto err;
  2302. }
  2303. }
  2304. hotplug_mask = 0;
  2305. if (IS_G4X(dev)) {
  2306. hotplug_mask = intel_sdvo->is_sdvob ?
  2307. SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2308. } else if (IS_GEN4(dev)) {
  2309. hotplug_mask = intel_sdvo->is_sdvob ?
  2310. SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2311. } else {
  2312. hotplug_mask = intel_sdvo->is_sdvob ?
  2313. SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2314. }
  2315. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2316. intel_encoder->disable = intel_disable_sdvo;
  2317. intel_encoder->enable = intel_enable_sdvo;
  2318. intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2319. /* In default case sdvo lvds is false */
  2320. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2321. goto err;
  2322. if (intel_sdvo_output_setup(intel_sdvo,
  2323. intel_sdvo->caps.output_flags) != true) {
  2324. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2325. SDVO_NAME(intel_sdvo));
  2326. goto err;
  2327. }
  2328. /* Only enable the hotplug irq if we need it, to work around noisy
  2329. * hotplug lines.
  2330. */
  2331. if (intel_sdvo->hotplug_active)
  2332. dev_priv->hotplug_supported_mask |= hotplug_mask;
  2333. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2334. /* Set the input timing to the screen. Assume always input 0. */
  2335. if (!intel_sdvo_set_target_input(intel_sdvo))
  2336. goto err;
  2337. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2338. &intel_sdvo->pixel_clock_min,
  2339. &intel_sdvo->pixel_clock_max))
  2340. goto err;
  2341. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2342. "clock range %dMHz - %dMHz, "
  2343. "input 1: %c, input 2: %c, "
  2344. "output 1: %c, output 2: %c\n",
  2345. SDVO_NAME(intel_sdvo),
  2346. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2347. intel_sdvo->caps.device_rev_id,
  2348. intel_sdvo->pixel_clock_min / 1000,
  2349. intel_sdvo->pixel_clock_max / 1000,
  2350. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2351. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2352. /* check currently supported outputs */
  2353. intel_sdvo->caps.output_flags &
  2354. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2355. intel_sdvo->caps.output_flags &
  2356. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2357. return true;
  2358. err:
  2359. drm_encoder_cleanup(&intel_encoder->base);
  2360. i2c_del_adapter(&intel_sdvo->ddc);
  2361. err_i2c_bus:
  2362. intel_sdvo_unselect_i2c_bus(intel_sdvo);
  2363. kfree(intel_sdvo);
  2364. return false;
  2365. }