mpt2sas_base.c 131 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. static int missing_delay[2] = {-1, -1};
  72. module_param_array(missing_delay, int, NULL, 0);
  73. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  74. static int mpt2sas_fwfault_debug;
  75. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  76. "and halt firmware - (default=0)");
  77. static int disable_discovery = -1;
  78. module_param(disable_discovery, int, 0);
  79. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  80. /* diag_buffer_enable is bitwise
  81. * bit 0 set = TRACE
  82. * bit 1 set = SNAPSHOT
  83. * bit 2 set = EXTENDED
  84. *
  85. * Either bit can be set, or both
  86. */
  87. static int diag_buffer_enable;
  88. module_param(diag_buffer_enable, int, 0);
  89. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  90. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  91. /**
  92. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  93. *
  94. */
  95. static int
  96. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  97. {
  98. int ret = param_set_int(val, kp);
  99. struct MPT2SAS_ADAPTER *ioc;
  100. if (ret)
  101. return ret;
  102. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  103. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  104. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  105. return 0;
  106. }
  107. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  108. param_get_int, &mpt2sas_fwfault_debug, 0644);
  109. /**
  110. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  111. * @arg: input argument, used to derive ioc
  112. *
  113. * Return 0 if controller is removed from pci subsystem.
  114. * Return -1 for other case.
  115. */
  116. static int mpt2sas_remove_dead_ioc_func(void *arg)
  117. {
  118. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  119. struct pci_dev *pdev;
  120. if ((ioc == NULL))
  121. return -1;
  122. pdev = ioc->pdev;
  123. if ((pdev == NULL))
  124. return -1;
  125. pci_remove_bus_device(pdev);
  126. return 0;
  127. }
  128. /**
  129. * _base_fault_reset_work - workq handling ioc fault conditions
  130. * @work: input argument, used to derive ioc
  131. * Context: sleep.
  132. *
  133. * Return nothing.
  134. */
  135. static void
  136. _base_fault_reset_work(struct work_struct *work)
  137. {
  138. struct MPT2SAS_ADAPTER *ioc =
  139. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  140. unsigned long flags;
  141. u32 doorbell;
  142. int rc;
  143. struct task_struct *p;
  144. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  145. if (ioc->shost_recovery)
  146. goto rearm_timer;
  147. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  148. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  149. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  150. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  151. ioc->name, __func__);
  152. /*
  153. * Call _scsih_flush_pending_cmds callback so that we flush all
  154. * pending commands back to OS. This call is required to aovid
  155. * deadlock at block layer. Dead IOC will fail to do diag reset,
  156. * and this call is safe since dead ioc will never return any
  157. * command back from HW.
  158. */
  159. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  160. /*
  161. * Set remove_host flag early since kernel thread will
  162. * take some time to execute.
  163. */
  164. ioc->remove_host = 1;
  165. /*Remove the Dead Host */
  166. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  167. "mpt2sas_dead_ioc_%d", ioc->id);
  168. if (IS_ERR(p)) {
  169. printk(MPT2SAS_ERR_FMT
  170. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  171. ioc->name, __func__);
  172. } else {
  173. printk(MPT2SAS_ERR_FMT
  174. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  175. ioc->name, __func__);
  176. }
  177. return; /* don't rearm timer */
  178. }
  179. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  180. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  181. FORCE_BIG_HAMMER);
  182. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  183. __func__, (rc == 0) ? "success" : "failed");
  184. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  185. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  186. mpt2sas_base_fault_info(ioc, doorbell &
  187. MPI2_DOORBELL_DATA_MASK);
  188. }
  189. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  190. rearm_timer:
  191. if (ioc->fault_reset_work_q)
  192. queue_delayed_work(ioc->fault_reset_work_q,
  193. &ioc->fault_reset_work,
  194. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  195. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  196. }
  197. /**
  198. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  199. * @ioc: per adapter object
  200. * Context: sleep.
  201. *
  202. * Return nothing.
  203. */
  204. void
  205. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  206. {
  207. unsigned long flags;
  208. if (ioc->fault_reset_work_q)
  209. return;
  210. /* initialize fault polling */
  211. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  212. snprintf(ioc->fault_reset_work_q_name,
  213. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  214. ioc->fault_reset_work_q =
  215. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  216. if (!ioc->fault_reset_work_q) {
  217. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  218. ioc->name, __func__, __LINE__);
  219. return;
  220. }
  221. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  222. if (ioc->fault_reset_work_q)
  223. queue_delayed_work(ioc->fault_reset_work_q,
  224. &ioc->fault_reset_work,
  225. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  226. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  227. }
  228. /**
  229. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  230. * @ioc: per adapter object
  231. * Context: sleep.
  232. *
  233. * Return nothing.
  234. */
  235. void
  236. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  237. {
  238. unsigned long flags;
  239. struct workqueue_struct *wq;
  240. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  241. wq = ioc->fault_reset_work_q;
  242. ioc->fault_reset_work_q = NULL;
  243. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  244. if (wq) {
  245. if (!cancel_delayed_work(&ioc->fault_reset_work))
  246. flush_workqueue(wq);
  247. destroy_workqueue(wq);
  248. }
  249. }
  250. /**
  251. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  252. * @ioc: per adapter object
  253. * @fault_code: fault code
  254. *
  255. * Return nothing.
  256. */
  257. void
  258. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  259. {
  260. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  261. ioc->name, fault_code);
  262. }
  263. /**
  264. * mpt2sas_halt_firmware - halt's mpt controller firmware
  265. * @ioc: per adapter object
  266. *
  267. * For debugging timeout related issues. Writing 0xCOFFEE00
  268. * to the doorbell register will halt controller firmware. With
  269. * the purpose to stop both driver and firmware, the enduser can
  270. * obtain a ring buffer from controller UART.
  271. */
  272. void
  273. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  274. {
  275. u32 doorbell;
  276. if (!ioc->fwfault_debug)
  277. return;
  278. dump_stack();
  279. doorbell = readl(&ioc->chip->Doorbell);
  280. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  281. mpt2sas_base_fault_info(ioc , doorbell);
  282. else {
  283. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  284. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  285. "timeout\n", ioc->name);
  286. }
  287. panic("panic in %s\n", __func__);
  288. }
  289. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  290. /**
  291. * _base_sas_ioc_info - verbose translation of the ioc status
  292. * @ioc: per adapter object
  293. * @mpi_reply: reply mf payload returned from firmware
  294. * @request_hdr: request mf
  295. *
  296. * Return nothing.
  297. */
  298. static void
  299. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  300. MPI2RequestHeader_t *request_hdr)
  301. {
  302. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  303. MPI2_IOCSTATUS_MASK;
  304. char *desc = NULL;
  305. u16 frame_sz;
  306. char *func_str = NULL;
  307. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  308. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  309. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  310. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  311. return;
  312. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  313. return;
  314. switch (ioc_status) {
  315. /****************************************************************************
  316. * Common IOCStatus values for all replies
  317. ****************************************************************************/
  318. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  319. desc = "invalid function";
  320. break;
  321. case MPI2_IOCSTATUS_BUSY:
  322. desc = "busy";
  323. break;
  324. case MPI2_IOCSTATUS_INVALID_SGL:
  325. desc = "invalid sgl";
  326. break;
  327. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  328. desc = "internal error";
  329. break;
  330. case MPI2_IOCSTATUS_INVALID_VPID:
  331. desc = "invalid vpid";
  332. break;
  333. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  334. desc = "insufficient resources";
  335. break;
  336. case MPI2_IOCSTATUS_INVALID_FIELD:
  337. desc = "invalid field";
  338. break;
  339. case MPI2_IOCSTATUS_INVALID_STATE:
  340. desc = "invalid state";
  341. break;
  342. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  343. desc = "op state not supported";
  344. break;
  345. /****************************************************************************
  346. * Config IOCStatus values
  347. ****************************************************************************/
  348. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  349. desc = "config invalid action";
  350. break;
  351. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  352. desc = "config invalid type";
  353. break;
  354. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  355. desc = "config invalid page";
  356. break;
  357. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  358. desc = "config invalid data";
  359. break;
  360. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  361. desc = "config no defaults";
  362. break;
  363. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  364. desc = "config cant commit";
  365. break;
  366. /****************************************************************************
  367. * SCSI IO Reply
  368. ****************************************************************************/
  369. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  370. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  371. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  372. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  373. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  374. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  375. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  376. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  377. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  378. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  379. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  380. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  381. break;
  382. /****************************************************************************
  383. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  384. ****************************************************************************/
  385. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  386. desc = "eedp guard error";
  387. break;
  388. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  389. desc = "eedp ref tag error";
  390. break;
  391. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  392. desc = "eedp app tag error";
  393. break;
  394. /****************************************************************************
  395. * SCSI Target values
  396. ****************************************************************************/
  397. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  398. desc = "target invalid io index";
  399. break;
  400. case MPI2_IOCSTATUS_TARGET_ABORTED:
  401. desc = "target aborted";
  402. break;
  403. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  404. desc = "target no conn retryable";
  405. break;
  406. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  407. desc = "target no connection";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  410. desc = "target xfer count mismatch";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  413. desc = "target data offset error";
  414. break;
  415. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  416. desc = "target too much write data";
  417. break;
  418. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  419. desc = "target iu too short";
  420. break;
  421. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  422. desc = "target ack nak timeout";
  423. break;
  424. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  425. desc = "target nak received";
  426. break;
  427. /****************************************************************************
  428. * Serial Attached SCSI values
  429. ****************************************************************************/
  430. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  431. desc = "smp request failed";
  432. break;
  433. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  434. desc = "smp data overrun";
  435. break;
  436. /****************************************************************************
  437. * Diagnostic Buffer Post / Diagnostic Release values
  438. ****************************************************************************/
  439. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  440. desc = "diagnostic released";
  441. break;
  442. default:
  443. break;
  444. }
  445. if (!desc)
  446. return;
  447. switch (request_hdr->Function) {
  448. case MPI2_FUNCTION_CONFIG:
  449. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  450. func_str = "config_page";
  451. break;
  452. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  453. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  454. func_str = "task_mgmt";
  455. break;
  456. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  457. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  458. func_str = "sas_iounit_ctl";
  459. break;
  460. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  461. frame_sz = sizeof(Mpi2SepRequest_t);
  462. func_str = "enclosure";
  463. break;
  464. case MPI2_FUNCTION_IOC_INIT:
  465. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  466. func_str = "ioc_init";
  467. break;
  468. case MPI2_FUNCTION_PORT_ENABLE:
  469. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  470. func_str = "port_enable";
  471. break;
  472. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  473. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  474. func_str = "smp_passthru";
  475. break;
  476. default:
  477. frame_sz = 32;
  478. func_str = "unknown";
  479. break;
  480. }
  481. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  482. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  483. _debug_dump_mf(request_hdr, frame_sz/4);
  484. }
  485. /**
  486. * _base_display_event_data - verbose translation of firmware asyn events
  487. * @ioc: per adapter object
  488. * @mpi_reply: reply mf payload returned from firmware
  489. *
  490. * Return nothing.
  491. */
  492. static void
  493. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  494. Mpi2EventNotificationReply_t *mpi_reply)
  495. {
  496. char *desc = NULL;
  497. u16 event;
  498. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  499. return;
  500. event = le16_to_cpu(mpi_reply->Event);
  501. switch (event) {
  502. case MPI2_EVENT_LOG_DATA:
  503. desc = "Log Data";
  504. break;
  505. case MPI2_EVENT_STATE_CHANGE:
  506. desc = "Status Change";
  507. break;
  508. case MPI2_EVENT_HARD_RESET_RECEIVED:
  509. desc = "Hard Reset Received";
  510. break;
  511. case MPI2_EVENT_EVENT_CHANGE:
  512. desc = "Event Change";
  513. break;
  514. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  515. desc = "Device Status Change";
  516. break;
  517. case MPI2_EVENT_IR_OPERATION_STATUS:
  518. if (!ioc->hide_ir_msg)
  519. desc = "IR Operation Status";
  520. break;
  521. case MPI2_EVENT_SAS_DISCOVERY:
  522. {
  523. Mpi2EventDataSasDiscovery_t *event_data =
  524. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  525. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  526. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  527. "start" : "stop");
  528. if (event_data->DiscoveryStatus)
  529. printk("discovery_status(0x%08x)",
  530. le32_to_cpu(event_data->DiscoveryStatus));
  531. printk("\n");
  532. return;
  533. }
  534. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  535. desc = "SAS Broadcast Primitive";
  536. break;
  537. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  538. desc = "SAS Init Device Status Change";
  539. break;
  540. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  541. desc = "SAS Init Table Overflow";
  542. break;
  543. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  544. desc = "SAS Topology Change List";
  545. break;
  546. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  547. desc = "SAS Enclosure Device Status Change";
  548. break;
  549. case MPI2_EVENT_IR_VOLUME:
  550. if (!ioc->hide_ir_msg)
  551. desc = "IR Volume";
  552. break;
  553. case MPI2_EVENT_IR_PHYSICAL_DISK:
  554. if (!ioc->hide_ir_msg)
  555. desc = "IR Physical Disk";
  556. break;
  557. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  558. if (!ioc->hide_ir_msg)
  559. desc = "IR Configuration Change List";
  560. break;
  561. case MPI2_EVENT_LOG_ENTRY_ADDED:
  562. if (!ioc->hide_ir_msg)
  563. desc = "Log Entry Added";
  564. break;
  565. }
  566. if (!desc)
  567. return;
  568. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  569. }
  570. #endif
  571. /**
  572. * _base_sas_log_info - verbose translation of firmware log info
  573. * @ioc: per adapter object
  574. * @log_info: log info
  575. *
  576. * Return nothing.
  577. */
  578. static void
  579. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  580. {
  581. union loginfo_type {
  582. u32 loginfo;
  583. struct {
  584. u32 subcode:16;
  585. u32 code:8;
  586. u32 originator:4;
  587. u32 bus_type:4;
  588. } dw;
  589. };
  590. union loginfo_type sas_loginfo;
  591. char *originator_str = NULL;
  592. sas_loginfo.loginfo = log_info;
  593. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  594. return;
  595. /* each nexus loss loginfo */
  596. if (log_info == 0x31170000)
  597. return;
  598. /* eat the loginfos associated with task aborts */
  599. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  600. 0x31140000 || log_info == 0x31130000))
  601. return;
  602. switch (sas_loginfo.dw.originator) {
  603. case 0:
  604. originator_str = "IOP";
  605. break;
  606. case 1:
  607. originator_str = "PL";
  608. break;
  609. case 2:
  610. if (!ioc->hide_ir_msg)
  611. originator_str = "IR";
  612. else
  613. originator_str = "WarpDrive";
  614. break;
  615. }
  616. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  617. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  618. originator_str, sas_loginfo.dw.code,
  619. sas_loginfo.dw.subcode);
  620. }
  621. /**
  622. * _base_display_reply_info -
  623. * @ioc: per adapter object
  624. * @smid: system request message index
  625. * @msix_index: MSIX table index supplied by the OS
  626. * @reply: reply message frame(lower 32bit addr)
  627. *
  628. * Return nothing.
  629. */
  630. static void
  631. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  632. u32 reply)
  633. {
  634. MPI2DefaultReply_t *mpi_reply;
  635. u16 ioc_status;
  636. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  637. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  638. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  639. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  640. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  641. _base_sas_ioc_info(ioc , mpi_reply,
  642. mpt2sas_base_get_msg_frame(ioc, smid));
  643. }
  644. #endif
  645. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  646. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  647. }
  648. /**
  649. * mpt2sas_base_done - base internal command completion routine
  650. * @ioc: per adapter object
  651. * @smid: system request message index
  652. * @msix_index: MSIX table index supplied by the OS
  653. * @reply: reply message frame(lower 32bit addr)
  654. *
  655. * Return 1 meaning mf should be freed from _base_interrupt
  656. * 0 means the mf is freed from this function.
  657. */
  658. u8
  659. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  660. u32 reply)
  661. {
  662. MPI2DefaultReply_t *mpi_reply;
  663. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  664. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  665. return 1;
  666. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  667. return 1;
  668. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  669. if (mpi_reply) {
  670. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  671. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  672. }
  673. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  674. complete(&ioc->base_cmds.done);
  675. return 1;
  676. }
  677. /**
  678. * _base_async_event - main callback handler for firmware asyn events
  679. * @ioc: per adapter object
  680. * @msix_index: MSIX table index supplied by the OS
  681. * @reply: reply message frame(lower 32bit addr)
  682. *
  683. * Return 1 meaning mf should be freed from _base_interrupt
  684. * 0 means the mf is freed from this function.
  685. */
  686. static u8
  687. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  688. {
  689. Mpi2EventNotificationReply_t *mpi_reply;
  690. Mpi2EventAckRequest_t *ack_request;
  691. u16 smid;
  692. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  693. if (!mpi_reply)
  694. return 1;
  695. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  696. return 1;
  697. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  698. _base_display_event_data(ioc, mpi_reply);
  699. #endif
  700. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  701. goto out;
  702. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  703. if (!smid) {
  704. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  705. ioc->name, __func__);
  706. goto out;
  707. }
  708. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  709. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  710. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  711. ack_request->Event = mpi_reply->Event;
  712. ack_request->EventContext = mpi_reply->EventContext;
  713. ack_request->VF_ID = 0; /* TODO */
  714. ack_request->VP_ID = 0;
  715. mpt2sas_base_put_smid_default(ioc, smid);
  716. out:
  717. /* scsih callback handler */
  718. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  719. /* ctl callback handler */
  720. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  721. return 1;
  722. }
  723. /**
  724. * _base_get_cb_idx - obtain the callback index
  725. * @ioc: per adapter object
  726. * @smid: system request message index
  727. *
  728. * Return callback index.
  729. */
  730. static u8
  731. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  732. {
  733. int i;
  734. u8 cb_idx;
  735. if (smid < ioc->hi_priority_smid) {
  736. i = smid - 1;
  737. cb_idx = ioc->scsi_lookup[i].cb_idx;
  738. } else if (smid < ioc->internal_smid) {
  739. i = smid - ioc->hi_priority_smid;
  740. cb_idx = ioc->hpr_lookup[i].cb_idx;
  741. } else if (smid <= ioc->hba_queue_depth) {
  742. i = smid - ioc->internal_smid;
  743. cb_idx = ioc->internal_lookup[i].cb_idx;
  744. } else
  745. cb_idx = 0xFF;
  746. return cb_idx;
  747. }
  748. /**
  749. * _base_mask_interrupts - disable interrupts
  750. * @ioc: per adapter object
  751. *
  752. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  753. *
  754. * Return nothing.
  755. */
  756. static void
  757. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  758. {
  759. u32 him_register;
  760. ioc->mask_interrupts = 1;
  761. him_register = readl(&ioc->chip->HostInterruptMask);
  762. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  763. writel(him_register, &ioc->chip->HostInterruptMask);
  764. readl(&ioc->chip->HostInterruptMask);
  765. }
  766. /**
  767. * _base_unmask_interrupts - enable interrupts
  768. * @ioc: per adapter object
  769. *
  770. * Enabling only Reply Interrupts
  771. *
  772. * Return nothing.
  773. */
  774. static void
  775. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  776. {
  777. u32 him_register;
  778. him_register = readl(&ioc->chip->HostInterruptMask);
  779. him_register &= ~MPI2_HIM_RIM;
  780. writel(him_register, &ioc->chip->HostInterruptMask);
  781. ioc->mask_interrupts = 0;
  782. }
  783. union reply_descriptor {
  784. u64 word;
  785. struct {
  786. u32 low;
  787. u32 high;
  788. } u;
  789. };
  790. /**
  791. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  792. * @irq: irq number (not used)
  793. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  794. * @r: pt_regs pointer (not used)
  795. *
  796. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  797. */
  798. static irqreturn_t
  799. _base_interrupt(int irq, void *bus_id)
  800. {
  801. struct adapter_reply_queue *reply_q = bus_id;
  802. union reply_descriptor rd;
  803. u32 completed_cmds;
  804. u8 request_desript_type;
  805. u16 smid;
  806. u8 cb_idx;
  807. u32 reply;
  808. u8 msix_index = reply_q->msix_index;
  809. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  810. Mpi2ReplyDescriptorsUnion_t *rpf;
  811. u8 rc;
  812. if (ioc->mask_interrupts)
  813. return IRQ_NONE;
  814. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  815. return IRQ_NONE;
  816. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  817. request_desript_type = rpf->Default.ReplyFlags
  818. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  819. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  820. atomic_dec(&reply_q->busy);
  821. return IRQ_NONE;
  822. }
  823. completed_cmds = 0;
  824. cb_idx = 0xFF;
  825. do {
  826. rd.word = le64_to_cpu(rpf->Words);
  827. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  828. goto out;
  829. reply = 0;
  830. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  831. if (request_desript_type ==
  832. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  833. reply = le32_to_cpu
  834. (rpf->AddressReply.ReplyFrameAddress);
  835. if (reply > ioc->reply_dma_max_address ||
  836. reply < ioc->reply_dma_min_address)
  837. reply = 0;
  838. } else if (request_desript_type ==
  839. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  840. goto next;
  841. else if (request_desript_type ==
  842. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  843. goto next;
  844. if (smid)
  845. cb_idx = _base_get_cb_idx(ioc, smid);
  846. if (smid && cb_idx != 0xFF) {
  847. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  848. reply);
  849. if (reply)
  850. _base_display_reply_info(ioc, smid, msix_index,
  851. reply);
  852. if (rc)
  853. mpt2sas_base_free_smid(ioc, smid);
  854. }
  855. if (!smid)
  856. _base_async_event(ioc, msix_index, reply);
  857. /* reply free queue handling */
  858. if (reply) {
  859. ioc->reply_free_host_index =
  860. (ioc->reply_free_host_index ==
  861. (ioc->reply_free_queue_depth - 1)) ?
  862. 0 : ioc->reply_free_host_index + 1;
  863. ioc->reply_free[ioc->reply_free_host_index] =
  864. cpu_to_le32(reply);
  865. wmb();
  866. writel(ioc->reply_free_host_index,
  867. &ioc->chip->ReplyFreeHostIndex);
  868. }
  869. next:
  870. rpf->Words = cpu_to_le64(ULLONG_MAX);
  871. reply_q->reply_post_host_index =
  872. (reply_q->reply_post_host_index ==
  873. (ioc->reply_post_queue_depth - 1)) ? 0 :
  874. reply_q->reply_post_host_index + 1;
  875. request_desript_type =
  876. reply_q->reply_post_free[reply_q->reply_post_host_index].
  877. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  878. completed_cmds++;
  879. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  880. goto out;
  881. if (!reply_q->reply_post_host_index)
  882. rpf = reply_q->reply_post_free;
  883. else
  884. rpf++;
  885. } while (1);
  886. out:
  887. if (!completed_cmds) {
  888. atomic_dec(&reply_q->busy);
  889. return IRQ_NONE;
  890. }
  891. wmb();
  892. if (ioc->is_warpdrive) {
  893. writel(reply_q->reply_post_host_index,
  894. ioc->reply_post_host_index[msix_index]);
  895. atomic_dec(&reply_q->busy);
  896. return IRQ_HANDLED;
  897. }
  898. writel(reply_q->reply_post_host_index | (msix_index <<
  899. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  900. atomic_dec(&reply_q->busy);
  901. return IRQ_HANDLED;
  902. }
  903. /**
  904. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  905. * @ioc: per adapter object
  906. *
  907. */
  908. static inline int
  909. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  910. {
  911. return (ioc->facts.IOCCapabilities &
  912. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  913. }
  914. /**
  915. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  916. * @ioc: per adapter object
  917. * Context: ISR conext
  918. *
  919. * Called when a Task Management request has completed. We want
  920. * to flush the other reply queues so all the outstanding IO has been
  921. * completed back to OS before we process the TM completetion.
  922. *
  923. * Return nothing.
  924. */
  925. void
  926. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  927. {
  928. struct adapter_reply_queue *reply_q;
  929. /* If MSIX capability is turned off
  930. * then multi-queues are not enabled
  931. */
  932. if (!_base_is_controller_msix_enabled(ioc))
  933. return;
  934. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  935. if (ioc->shost_recovery)
  936. return;
  937. /* TMs are on msix_index == 0 */
  938. if (reply_q->msix_index == 0)
  939. continue;
  940. _base_interrupt(reply_q->vector, (void *)reply_q);
  941. }
  942. }
  943. /**
  944. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  945. * @cb_idx: callback index
  946. *
  947. * Return nothing.
  948. */
  949. void
  950. mpt2sas_base_release_callback_handler(u8 cb_idx)
  951. {
  952. mpt_callbacks[cb_idx] = NULL;
  953. }
  954. /**
  955. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  956. * @cb_func: callback function
  957. *
  958. * Returns cb_func.
  959. */
  960. u8
  961. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  962. {
  963. u8 cb_idx;
  964. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  965. if (mpt_callbacks[cb_idx] == NULL)
  966. break;
  967. mpt_callbacks[cb_idx] = cb_func;
  968. return cb_idx;
  969. }
  970. /**
  971. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  972. *
  973. * Return nothing.
  974. */
  975. void
  976. mpt2sas_base_initialize_callback_handler(void)
  977. {
  978. u8 cb_idx;
  979. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  980. mpt2sas_base_release_callback_handler(cb_idx);
  981. }
  982. /**
  983. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  984. * @ioc: per adapter object
  985. * @paddr: virtual address for SGE
  986. *
  987. * Create a zero length scatter gather entry to insure the IOCs hardware has
  988. * something to use if the target device goes brain dead and tries
  989. * to send data even when none is asked for.
  990. *
  991. * Return nothing.
  992. */
  993. void
  994. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  995. {
  996. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  997. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  998. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  999. MPI2_SGE_FLAGS_SHIFT);
  1000. ioc->base_add_sg_single(paddr, flags_length, -1);
  1001. }
  1002. /**
  1003. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1004. * @paddr: virtual address for SGE
  1005. * @flags_length: SGE flags and data transfer length
  1006. * @dma_addr: Physical address
  1007. *
  1008. * Return nothing.
  1009. */
  1010. static void
  1011. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1012. {
  1013. Mpi2SGESimple32_t *sgel = paddr;
  1014. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1015. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1016. sgel->FlagsLength = cpu_to_le32(flags_length);
  1017. sgel->Address = cpu_to_le32(dma_addr);
  1018. }
  1019. /**
  1020. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1021. * @paddr: virtual address for SGE
  1022. * @flags_length: SGE flags and data transfer length
  1023. * @dma_addr: Physical address
  1024. *
  1025. * Return nothing.
  1026. */
  1027. static void
  1028. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1029. {
  1030. Mpi2SGESimple64_t *sgel = paddr;
  1031. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1032. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1033. sgel->FlagsLength = cpu_to_le32(flags_length);
  1034. sgel->Address = cpu_to_le64(dma_addr);
  1035. }
  1036. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1037. /**
  1038. * _base_config_dma_addressing - set dma addressing
  1039. * @ioc: per adapter object
  1040. * @pdev: PCI device struct
  1041. *
  1042. * Returns 0 for success, non-zero for failure.
  1043. */
  1044. static int
  1045. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1046. {
  1047. struct sysinfo s;
  1048. char *desc = NULL;
  1049. if (sizeof(dma_addr_t) > 4) {
  1050. const uint64_t required_mask =
  1051. dma_get_required_mask(&pdev->dev);
  1052. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1053. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1054. DMA_BIT_MASK(64))) {
  1055. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1056. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1057. desc = "64";
  1058. goto out;
  1059. }
  1060. }
  1061. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1062. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1063. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1064. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1065. desc = "32";
  1066. } else
  1067. return -ENODEV;
  1068. out:
  1069. si_meminfo(&s);
  1070. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1071. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1072. return 0;
  1073. }
  1074. /**
  1075. * _base_check_enable_msix - checks MSIX capabable.
  1076. * @ioc: per adapter object
  1077. *
  1078. * Check to see if card is capable of MSIX, and set number
  1079. * of available msix vectors
  1080. */
  1081. static int
  1082. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1083. {
  1084. int base;
  1085. u16 message_control;
  1086. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1087. if (!base) {
  1088. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1089. "supported\n", ioc->name));
  1090. return -EINVAL;
  1091. }
  1092. /* get msix vector count */
  1093. /* NUMA_IO not supported for older controllers */
  1094. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1095. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1096. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1097. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1098. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1099. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1100. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1101. ioc->msix_vector_count = 1;
  1102. else {
  1103. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1104. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1105. }
  1106. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1107. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1108. return 0;
  1109. }
  1110. /**
  1111. * _base_free_irq - free irq
  1112. * @ioc: per adapter object
  1113. *
  1114. * Freeing respective reply_queue from the list.
  1115. */
  1116. static void
  1117. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1118. {
  1119. struct adapter_reply_queue *reply_q, *next;
  1120. if (list_empty(&ioc->reply_queue_list))
  1121. return;
  1122. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1123. list_del(&reply_q->list);
  1124. synchronize_irq(reply_q->vector);
  1125. free_irq(reply_q->vector, reply_q);
  1126. kfree(reply_q);
  1127. }
  1128. }
  1129. /**
  1130. * _base_request_irq - request irq
  1131. * @ioc: per adapter object
  1132. * @index: msix index into vector table
  1133. * @vector: irq vector
  1134. *
  1135. * Inserting respective reply_queue into the list.
  1136. */
  1137. static int
  1138. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1139. {
  1140. struct adapter_reply_queue *reply_q;
  1141. int r;
  1142. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1143. if (!reply_q) {
  1144. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1145. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1146. return -ENOMEM;
  1147. }
  1148. reply_q->ioc = ioc;
  1149. reply_q->msix_index = index;
  1150. reply_q->vector = vector;
  1151. atomic_set(&reply_q->busy, 0);
  1152. if (ioc->msix_enable)
  1153. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1154. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1155. else
  1156. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1157. MPT2SAS_DRIVER_NAME, ioc->id);
  1158. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1159. reply_q);
  1160. if (r) {
  1161. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1162. reply_q->name, vector);
  1163. kfree(reply_q);
  1164. return -EBUSY;
  1165. }
  1166. INIT_LIST_HEAD(&reply_q->list);
  1167. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1168. return 0;
  1169. }
  1170. /**
  1171. * _base_assign_reply_queues - assigning msix index for each cpu
  1172. * @ioc: per adapter object
  1173. *
  1174. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1175. *
  1176. * It would nice if we could call irq_set_affinity, however it is not
  1177. * an exported symbol
  1178. */
  1179. static void
  1180. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1181. {
  1182. struct adapter_reply_queue *reply_q;
  1183. int cpu_id;
  1184. int cpu_grouping, loop, grouping, grouping_mod;
  1185. if (!_base_is_controller_msix_enabled(ioc))
  1186. return;
  1187. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1188. /* when there are more cpus than available msix vectors,
  1189. * then group cpus togeather on same irq
  1190. */
  1191. if (ioc->cpu_count > ioc->msix_vector_count) {
  1192. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1193. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1194. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1195. cpu_grouping = 2;
  1196. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1197. cpu_grouping = 4;
  1198. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1199. cpu_grouping = 8;
  1200. else
  1201. cpu_grouping = 16;
  1202. } else
  1203. cpu_grouping = 0;
  1204. loop = 0;
  1205. reply_q = list_entry(ioc->reply_queue_list.next,
  1206. struct adapter_reply_queue, list);
  1207. for_each_online_cpu(cpu_id) {
  1208. if (!cpu_grouping) {
  1209. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1210. reply_q = list_entry(reply_q->list.next,
  1211. struct adapter_reply_queue, list);
  1212. } else {
  1213. if (loop < cpu_grouping) {
  1214. ioc->cpu_msix_table[cpu_id] =
  1215. reply_q->msix_index;
  1216. loop++;
  1217. } else {
  1218. reply_q = list_entry(reply_q->list.next,
  1219. struct adapter_reply_queue, list);
  1220. ioc->cpu_msix_table[cpu_id] =
  1221. reply_q->msix_index;
  1222. loop = 1;
  1223. }
  1224. }
  1225. }
  1226. }
  1227. /**
  1228. * _base_disable_msix - disables msix
  1229. * @ioc: per adapter object
  1230. *
  1231. */
  1232. static void
  1233. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1234. {
  1235. if (ioc->msix_enable) {
  1236. pci_disable_msix(ioc->pdev);
  1237. ioc->msix_enable = 0;
  1238. }
  1239. }
  1240. /**
  1241. * _base_enable_msix - enables msix, failback to io_apic
  1242. * @ioc: per adapter object
  1243. *
  1244. */
  1245. static int
  1246. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1247. {
  1248. struct msix_entry *entries, *a;
  1249. int r;
  1250. int i;
  1251. u8 try_msix = 0;
  1252. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1253. if (msix_disable == -1 || msix_disable == 0)
  1254. try_msix = 1;
  1255. if (!try_msix)
  1256. goto try_ioapic;
  1257. if (_base_check_enable_msix(ioc) != 0)
  1258. goto try_ioapic;
  1259. ioc->reply_queue_count = min_t(u8, ioc->cpu_count,
  1260. ioc->msix_vector_count);
  1261. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1262. GFP_KERNEL);
  1263. if (!entries) {
  1264. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1265. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1266. __LINE__, __func__));
  1267. goto try_ioapic;
  1268. }
  1269. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1270. a->entry = i;
  1271. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1272. if (r) {
  1273. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1274. "failed (r=%d) !!!\n", ioc->name, r));
  1275. kfree(entries);
  1276. goto try_ioapic;
  1277. }
  1278. ioc->msix_enable = 1;
  1279. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1280. r = _base_request_irq(ioc, i, a->vector);
  1281. if (r) {
  1282. _base_free_irq(ioc);
  1283. _base_disable_msix(ioc);
  1284. kfree(entries);
  1285. goto try_ioapic;
  1286. }
  1287. }
  1288. kfree(entries);
  1289. return 0;
  1290. /* failback to io_apic interrupt routing */
  1291. try_ioapic:
  1292. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1293. return r;
  1294. }
  1295. /**
  1296. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1297. * @ioc: per adapter object
  1298. *
  1299. * Returns 0 for success, non-zero for failure.
  1300. */
  1301. int
  1302. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1303. {
  1304. struct pci_dev *pdev = ioc->pdev;
  1305. u32 memap_sz;
  1306. u32 pio_sz;
  1307. int i, r = 0;
  1308. u64 pio_chip = 0;
  1309. u64 chip_phys = 0;
  1310. struct adapter_reply_queue *reply_q;
  1311. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1312. ioc->name, __func__));
  1313. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1314. if (pci_enable_device_mem(pdev)) {
  1315. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1316. "failed\n", ioc->name);
  1317. return -ENODEV;
  1318. }
  1319. if (pci_request_selected_regions(pdev, ioc->bars,
  1320. MPT2SAS_DRIVER_NAME)) {
  1321. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1322. "failed\n", ioc->name);
  1323. r = -ENODEV;
  1324. goto out_fail;
  1325. }
  1326. /* AER (Advanced Error Reporting) hooks */
  1327. pci_enable_pcie_error_reporting(pdev);
  1328. pci_set_master(pdev);
  1329. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1330. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1331. ioc->name, pci_name(pdev));
  1332. r = -ENODEV;
  1333. goto out_fail;
  1334. }
  1335. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1336. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1337. if (pio_sz)
  1338. continue;
  1339. pio_chip = (u64)pci_resource_start(pdev, i);
  1340. pio_sz = pci_resource_len(pdev, i);
  1341. } else {
  1342. if (memap_sz)
  1343. continue;
  1344. /* verify memory resource is valid before using */
  1345. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1346. ioc->chip_phys = pci_resource_start(pdev, i);
  1347. chip_phys = (u64)ioc->chip_phys;
  1348. memap_sz = pci_resource_len(pdev, i);
  1349. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1350. if (ioc->chip == NULL) {
  1351. printk(MPT2SAS_ERR_FMT "unable to map "
  1352. "adapter memory!\n", ioc->name);
  1353. r = -EINVAL;
  1354. goto out_fail;
  1355. }
  1356. }
  1357. }
  1358. }
  1359. _base_mask_interrupts(ioc);
  1360. r = _base_enable_msix(ioc);
  1361. if (r)
  1362. goto out_fail;
  1363. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1364. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1365. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1366. "IO-APIC enabled"), reply_q->vector);
  1367. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1368. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1369. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1370. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1371. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1372. pci_save_state(pdev);
  1373. return 0;
  1374. out_fail:
  1375. if (ioc->chip_phys)
  1376. iounmap(ioc->chip);
  1377. ioc->chip_phys = 0;
  1378. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1379. pci_disable_pcie_error_reporting(pdev);
  1380. pci_disable_device(pdev);
  1381. return r;
  1382. }
  1383. /**
  1384. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1385. * @ioc: per adapter object
  1386. * @smid: system request message index(smid zero is invalid)
  1387. *
  1388. * Returns virt pointer to message frame.
  1389. */
  1390. void *
  1391. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1392. {
  1393. return (void *)(ioc->request + (smid * ioc->request_sz));
  1394. }
  1395. /**
  1396. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1397. * @ioc: per adapter object
  1398. * @smid: system request message index
  1399. *
  1400. * Returns virt pointer to sense buffer.
  1401. */
  1402. void *
  1403. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1404. {
  1405. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1406. }
  1407. /**
  1408. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1409. * @ioc: per adapter object
  1410. * @smid: system request message index
  1411. *
  1412. * Returns phys pointer to the low 32bit address of the sense buffer.
  1413. */
  1414. __le32
  1415. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1416. {
  1417. return cpu_to_le32(ioc->sense_dma +
  1418. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1419. }
  1420. /**
  1421. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1422. * @ioc: per adapter object
  1423. * @phys_addr: lower 32 physical addr of the reply
  1424. *
  1425. * Converts 32bit lower physical addr into a virt address.
  1426. */
  1427. void *
  1428. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1429. {
  1430. if (!phys_addr)
  1431. return NULL;
  1432. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1433. }
  1434. /**
  1435. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1436. * @ioc: per adapter object
  1437. * @cb_idx: callback index
  1438. *
  1439. * Returns smid (zero is invalid)
  1440. */
  1441. u16
  1442. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1443. {
  1444. unsigned long flags;
  1445. struct request_tracker *request;
  1446. u16 smid;
  1447. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1448. if (list_empty(&ioc->internal_free_list)) {
  1449. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1450. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1451. ioc->name, __func__);
  1452. return 0;
  1453. }
  1454. request = list_entry(ioc->internal_free_list.next,
  1455. struct request_tracker, tracker_list);
  1456. request->cb_idx = cb_idx;
  1457. smid = request->smid;
  1458. list_del(&request->tracker_list);
  1459. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1460. return smid;
  1461. }
  1462. /**
  1463. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1464. * @ioc: per adapter object
  1465. * @cb_idx: callback index
  1466. * @scmd: pointer to scsi command object
  1467. *
  1468. * Returns smid (zero is invalid)
  1469. */
  1470. u16
  1471. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1472. struct scsi_cmnd *scmd)
  1473. {
  1474. unsigned long flags;
  1475. struct scsiio_tracker *request;
  1476. u16 smid;
  1477. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1478. if (list_empty(&ioc->free_list)) {
  1479. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1480. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1481. ioc->name, __func__);
  1482. return 0;
  1483. }
  1484. request = list_entry(ioc->free_list.next,
  1485. struct scsiio_tracker, tracker_list);
  1486. request->scmd = scmd;
  1487. request->cb_idx = cb_idx;
  1488. smid = request->smid;
  1489. list_del(&request->tracker_list);
  1490. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1491. return smid;
  1492. }
  1493. /**
  1494. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1495. * @ioc: per adapter object
  1496. * @cb_idx: callback index
  1497. *
  1498. * Returns smid (zero is invalid)
  1499. */
  1500. u16
  1501. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1502. {
  1503. unsigned long flags;
  1504. struct request_tracker *request;
  1505. u16 smid;
  1506. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1507. if (list_empty(&ioc->hpr_free_list)) {
  1508. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1509. return 0;
  1510. }
  1511. request = list_entry(ioc->hpr_free_list.next,
  1512. struct request_tracker, tracker_list);
  1513. request->cb_idx = cb_idx;
  1514. smid = request->smid;
  1515. list_del(&request->tracker_list);
  1516. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1517. return smid;
  1518. }
  1519. /**
  1520. * mpt2sas_base_free_smid - put smid back on free_list
  1521. * @ioc: per adapter object
  1522. * @smid: system request message index
  1523. *
  1524. * Return nothing.
  1525. */
  1526. void
  1527. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1528. {
  1529. unsigned long flags;
  1530. int i;
  1531. struct chain_tracker *chain_req, *next;
  1532. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1533. if (smid < ioc->hi_priority_smid) {
  1534. /* scsiio queue */
  1535. i = smid - 1;
  1536. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1537. list_for_each_entry_safe(chain_req, next,
  1538. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1539. list_del_init(&chain_req->tracker_list);
  1540. list_add_tail(&chain_req->tracker_list,
  1541. &ioc->free_chain_list);
  1542. }
  1543. }
  1544. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1545. ioc->scsi_lookup[i].scmd = NULL;
  1546. ioc->scsi_lookup[i].direct_io = 0;
  1547. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1548. &ioc->free_list);
  1549. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1550. /*
  1551. * See _wait_for_commands_to_complete() call with regards
  1552. * to this code.
  1553. */
  1554. if (ioc->shost_recovery && ioc->pending_io_count) {
  1555. if (ioc->pending_io_count == 1)
  1556. wake_up(&ioc->reset_wq);
  1557. ioc->pending_io_count--;
  1558. }
  1559. return;
  1560. } else if (smid < ioc->internal_smid) {
  1561. /* hi-priority */
  1562. i = smid - ioc->hi_priority_smid;
  1563. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1564. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1565. &ioc->hpr_free_list);
  1566. } else if (smid <= ioc->hba_queue_depth) {
  1567. /* internal queue */
  1568. i = smid - ioc->internal_smid;
  1569. ioc->internal_lookup[i].cb_idx = 0xFF;
  1570. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1571. &ioc->internal_free_list);
  1572. }
  1573. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1574. }
  1575. /**
  1576. * _base_writeq - 64 bit write to MMIO
  1577. * @ioc: per adapter object
  1578. * @b: data payload
  1579. * @addr: address in MMIO space
  1580. * @writeq_lock: spin lock
  1581. *
  1582. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1583. * care of 32 bit environment where its not quarenteed to send the entire word
  1584. * in one transfer.
  1585. */
  1586. #ifndef writeq
  1587. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1588. spinlock_t *writeq_lock)
  1589. {
  1590. unsigned long flags;
  1591. __u64 data_out = cpu_to_le64(b);
  1592. spin_lock_irqsave(writeq_lock, flags);
  1593. writel((u32)(data_out), addr);
  1594. writel((u32)(data_out >> 32), (addr + 4));
  1595. spin_unlock_irqrestore(writeq_lock, flags);
  1596. }
  1597. #else
  1598. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1599. spinlock_t *writeq_lock)
  1600. {
  1601. writeq(cpu_to_le64(b), addr);
  1602. }
  1603. #endif
  1604. static inline u8
  1605. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1606. {
  1607. return ioc->cpu_msix_table[smp_processor_id()];
  1608. }
  1609. /**
  1610. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1611. * @ioc: per adapter object
  1612. * @smid: system request message index
  1613. * @handle: device handle
  1614. *
  1615. * Return nothing.
  1616. */
  1617. void
  1618. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1619. {
  1620. Mpi2RequestDescriptorUnion_t descriptor;
  1621. u64 *request = (u64 *)&descriptor;
  1622. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1623. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1624. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1625. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1626. descriptor.SCSIIO.LMID = 0;
  1627. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1628. &ioc->scsi_lookup_lock);
  1629. }
  1630. /**
  1631. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1632. * @ioc: per adapter object
  1633. * @smid: system request message index
  1634. *
  1635. * Return nothing.
  1636. */
  1637. void
  1638. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1639. {
  1640. Mpi2RequestDescriptorUnion_t descriptor;
  1641. u64 *request = (u64 *)&descriptor;
  1642. descriptor.HighPriority.RequestFlags =
  1643. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1644. descriptor.HighPriority.MSIxIndex = 0;
  1645. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1646. descriptor.HighPriority.LMID = 0;
  1647. descriptor.HighPriority.Reserved1 = 0;
  1648. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1649. &ioc->scsi_lookup_lock);
  1650. }
  1651. /**
  1652. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1653. * @ioc: per adapter object
  1654. * @smid: system request message index
  1655. *
  1656. * Return nothing.
  1657. */
  1658. void
  1659. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1660. {
  1661. Mpi2RequestDescriptorUnion_t descriptor;
  1662. u64 *request = (u64 *)&descriptor;
  1663. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1664. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1665. descriptor.Default.SMID = cpu_to_le16(smid);
  1666. descriptor.Default.LMID = 0;
  1667. descriptor.Default.DescriptorTypeDependent = 0;
  1668. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1669. &ioc->scsi_lookup_lock);
  1670. }
  1671. /**
  1672. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1673. * @ioc: per adapter object
  1674. * @smid: system request message index
  1675. * @io_index: value used to track the IO
  1676. *
  1677. * Return nothing.
  1678. */
  1679. void
  1680. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1681. u16 io_index)
  1682. {
  1683. Mpi2RequestDescriptorUnion_t descriptor;
  1684. u64 *request = (u64 *)&descriptor;
  1685. descriptor.SCSITarget.RequestFlags =
  1686. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1687. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1688. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1689. descriptor.SCSITarget.LMID = 0;
  1690. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1691. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1692. &ioc->scsi_lookup_lock);
  1693. }
  1694. /**
  1695. * _base_display_dell_branding - Disply branding string
  1696. * @ioc: per adapter object
  1697. *
  1698. * Return nothing.
  1699. */
  1700. static void
  1701. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1702. {
  1703. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1704. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1705. return;
  1706. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1707. switch (ioc->pdev->subsystem_device) {
  1708. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1709. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1710. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1711. break;
  1712. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1713. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1714. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1715. break;
  1716. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1717. strncpy(dell_branding,
  1718. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1719. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1720. break;
  1721. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1722. strncpy(dell_branding,
  1723. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1724. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1725. break;
  1726. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1727. strncpy(dell_branding,
  1728. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1729. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1730. break;
  1731. case MPT2SAS_DELL_PERC_H200_SSDID:
  1732. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1733. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1734. break;
  1735. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1736. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1737. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1738. break;
  1739. default:
  1740. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1741. break;
  1742. }
  1743. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1744. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1745. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1746. ioc->pdev->subsystem_device);
  1747. }
  1748. /**
  1749. * _base_display_intel_branding - Display branding string
  1750. * @ioc: per adapter object
  1751. *
  1752. * Return nothing.
  1753. */
  1754. static void
  1755. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1756. {
  1757. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1758. return;
  1759. switch (ioc->pdev->device) {
  1760. case MPI2_MFGPAGE_DEVID_SAS2008:
  1761. switch (ioc->pdev->subsystem_device) {
  1762. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1763. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1764. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1765. break;
  1766. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1767. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1768. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1769. break;
  1770. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1771. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1772. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1773. break;
  1774. default:
  1775. break;
  1776. }
  1777. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1778. switch (ioc->pdev->subsystem_device) {
  1779. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1780. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1781. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1782. break;
  1783. default:
  1784. break;
  1785. }
  1786. default:
  1787. break;
  1788. }
  1789. }
  1790. /**
  1791. * _base_display_hp_branding - Display branding string
  1792. * @ioc: per adapter object
  1793. *
  1794. * Return nothing.
  1795. */
  1796. static void
  1797. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1798. {
  1799. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1800. return;
  1801. switch (ioc->pdev->device) {
  1802. case MPI2_MFGPAGE_DEVID_SAS2004:
  1803. switch (ioc->pdev->subsystem_device) {
  1804. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1805. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1806. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1807. break;
  1808. default:
  1809. break;
  1810. }
  1811. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1812. switch (ioc->pdev->subsystem_device) {
  1813. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1814. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1815. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1816. break;
  1817. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1818. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1819. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1820. break;
  1821. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1822. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1823. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1824. break;
  1825. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1826. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1827. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1828. break;
  1829. default:
  1830. break;
  1831. }
  1832. default:
  1833. break;
  1834. }
  1835. }
  1836. /**
  1837. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1838. * @ioc: per adapter object
  1839. *
  1840. * Return nothing.
  1841. */
  1842. static void
  1843. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1844. {
  1845. int i = 0;
  1846. char desc[16];
  1847. u8 revision;
  1848. u32 iounit_pg1_flags;
  1849. u32 bios_version;
  1850. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1851. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1852. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1853. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1854. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1855. ioc->name, desc,
  1856. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1857. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1858. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1859. ioc->facts.FWVersion.Word & 0x000000FF,
  1860. revision,
  1861. (bios_version & 0xFF000000) >> 24,
  1862. (bios_version & 0x00FF0000) >> 16,
  1863. (bios_version & 0x0000FF00) >> 8,
  1864. bios_version & 0x000000FF);
  1865. _base_display_dell_branding(ioc);
  1866. _base_display_intel_branding(ioc);
  1867. _base_display_hp_branding(ioc);
  1868. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1869. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1870. printk("Initiator");
  1871. i++;
  1872. }
  1873. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1874. printk("%sTarget", i ? "," : "");
  1875. i++;
  1876. }
  1877. i = 0;
  1878. printk("), ");
  1879. printk("Capabilities=(");
  1880. if (!ioc->hide_ir_msg) {
  1881. if (ioc->facts.IOCCapabilities &
  1882. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1883. printk("Raid");
  1884. i++;
  1885. }
  1886. }
  1887. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1888. printk("%sTLR", i ? "," : "");
  1889. i++;
  1890. }
  1891. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1892. printk("%sMulticast", i ? "," : "");
  1893. i++;
  1894. }
  1895. if (ioc->facts.IOCCapabilities &
  1896. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1897. printk("%sBIDI Target", i ? "," : "");
  1898. i++;
  1899. }
  1900. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1901. printk("%sEEDP", i ? "," : "");
  1902. i++;
  1903. }
  1904. if (ioc->facts.IOCCapabilities &
  1905. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1906. printk("%sSnapshot Buffer", i ? "," : "");
  1907. i++;
  1908. }
  1909. if (ioc->facts.IOCCapabilities &
  1910. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1911. printk("%sDiag Trace Buffer", i ? "," : "");
  1912. i++;
  1913. }
  1914. if (ioc->facts.IOCCapabilities &
  1915. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1916. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1917. i++;
  1918. }
  1919. if (ioc->facts.IOCCapabilities &
  1920. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1921. printk("%sTask Set Full", i ? "," : "");
  1922. i++;
  1923. }
  1924. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1925. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1926. printk("%sNCQ", i ? "," : "");
  1927. i++;
  1928. }
  1929. printk(")\n");
  1930. }
  1931. /**
  1932. * _base_update_missing_delay - change the missing delay timers
  1933. * @ioc: per adapter object
  1934. * @device_missing_delay: amount of time till device is reported missing
  1935. * @io_missing_delay: interval IO is returned when there is a missing device
  1936. *
  1937. * Return nothing.
  1938. *
  1939. * Passed on the command line, this function will modify the device missing
  1940. * delay, as well as the io missing delay. This should be called at driver
  1941. * load time.
  1942. */
  1943. static void
  1944. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1945. u16 device_missing_delay, u8 io_missing_delay)
  1946. {
  1947. u16 dmd, dmd_new, dmd_orignal;
  1948. u8 io_missing_delay_original;
  1949. u16 sz;
  1950. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1951. Mpi2ConfigReply_t mpi_reply;
  1952. u8 num_phys = 0;
  1953. u16 ioc_status;
  1954. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1955. if (!num_phys)
  1956. return;
  1957. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1958. sizeof(Mpi2SasIOUnit1PhyData_t));
  1959. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1960. if (!sas_iounit_pg1) {
  1961. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1962. ioc->name, __FILE__, __LINE__, __func__);
  1963. goto out;
  1964. }
  1965. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1966. sas_iounit_pg1, sz))) {
  1967. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1968. ioc->name, __FILE__, __LINE__, __func__);
  1969. goto out;
  1970. }
  1971. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1972. MPI2_IOCSTATUS_MASK;
  1973. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1974. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1975. ioc->name, __FILE__, __LINE__, __func__);
  1976. goto out;
  1977. }
  1978. /* device missing delay */
  1979. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1980. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1981. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1982. else
  1983. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1984. dmd_orignal = dmd;
  1985. if (device_missing_delay > 0x7F) {
  1986. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1987. device_missing_delay;
  1988. dmd = dmd / 16;
  1989. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1990. } else
  1991. dmd = device_missing_delay;
  1992. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1993. /* io missing delay */
  1994. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1995. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1996. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1997. sz)) {
  1998. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1999. dmd_new = (dmd &
  2000. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2001. else
  2002. dmd_new =
  2003. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2004. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2005. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2006. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2007. "new(%d)\n", ioc->name, io_missing_delay_original,
  2008. io_missing_delay);
  2009. ioc->device_missing_delay = dmd_new;
  2010. ioc->io_missing_delay = io_missing_delay;
  2011. }
  2012. out:
  2013. kfree(sas_iounit_pg1);
  2014. }
  2015. /**
  2016. * _base_static_config_pages - static start of day config pages
  2017. * @ioc: per adapter object
  2018. *
  2019. * Return nothing.
  2020. */
  2021. static void
  2022. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2023. {
  2024. Mpi2ConfigReply_t mpi_reply;
  2025. u32 iounit_pg1_flags;
  2026. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2027. if (ioc->ir_firmware)
  2028. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2029. &ioc->manu_pg10);
  2030. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2031. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2032. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2033. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2034. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2035. _base_display_ioc_capabilities(ioc);
  2036. /*
  2037. * Enable task_set_full handling in iounit_pg1 when the
  2038. * facts capabilities indicate that its supported.
  2039. */
  2040. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2041. if ((ioc->facts.IOCCapabilities &
  2042. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2043. iounit_pg1_flags &=
  2044. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2045. else
  2046. iounit_pg1_flags |=
  2047. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2048. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2049. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2050. }
  2051. /**
  2052. * _base_release_memory_pools - release memory
  2053. * @ioc: per adapter object
  2054. *
  2055. * Free memory allocated from _base_allocate_memory_pools.
  2056. *
  2057. * Return nothing.
  2058. */
  2059. static void
  2060. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2061. {
  2062. int i;
  2063. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2064. __func__));
  2065. if (ioc->request) {
  2066. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2067. ioc->request, ioc->request_dma);
  2068. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2069. ": free\n", ioc->name, ioc->request));
  2070. ioc->request = NULL;
  2071. }
  2072. if (ioc->sense) {
  2073. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2074. if (ioc->sense_dma_pool)
  2075. pci_pool_destroy(ioc->sense_dma_pool);
  2076. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2077. ": free\n", ioc->name, ioc->sense));
  2078. ioc->sense = NULL;
  2079. }
  2080. if (ioc->reply) {
  2081. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2082. if (ioc->reply_dma_pool)
  2083. pci_pool_destroy(ioc->reply_dma_pool);
  2084. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2085. ": free\n", ioc->name, ioc->reply));
  2086. ioc->reply = NULL;
  2087. }
  2088. if (ioc->reply_free) {
  2089. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2090. ioc->reply_free_dma);
  2091. if (ioc->reply_free_dma_pool)
  2092. pci_pool_destroy(ioc->reply_free_dma_pool);
  2093. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2094. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2095. ioc->reply_free = NULL;
  2096. }
  2097. if (ioc->reply_post_free) {
  2098. pci_pool_free(ioc->reply_post_free_dma_pool,
  2099. ioc->reply_post_free, ioc->reply_post_free_dma);
  2100. if (ioc->reply_post_free_dma_pool)
  2101. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2102. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2103. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2104. ioc->reply_post_free));
  2105. ioc->reply_post_free = NULL;
  2106. }
  2107. if (ioc->config_page) {
  2108. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2109. "config_page(0x%p): free\n", ioc->name,
  2110. ioc->config_page));
  2111. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2112. ioc->config_page, ioc->config_page_dma);
  2113. }
  2114. if (ioc->scsi_lookup) {
  2115. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2116. ioc->scsi_lookup = NULL;
  2117. }
  2118. kfree(ioc->hpr_lookup);
  2119. kfree(ioc->internal_lookup);
  2120. if (ioc->chain_lookup) {
  2121. for (i = 0; i < ioc->chain_depth; i++) {
  2122. if (ioc->chain_lookup[i].chain_buffer)
  2123. pci_pool_free(ioc->chain_dma_pool,
  2124. ioc->chain_lookup[i].chain_buffer,
  2125. ioc->chain_lookup[i].chain_buffer_dma);
  2126. }
  2127. if (ioc->chain_dma_pool)
  2128. pci_pool_destroy(ioc->chain_dma_pool);
  2129. }
  2130. if (ioc->chain_lookup) {
  2131. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2132. ioc->chain_lookup = NULL;
  2133. }
  2134. }
  2135. /**
  2136. * _base_allocate_memory_pools - allocate start of day memory pools
  2137. * @ioc: per adapter object
  2138. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2139. *
  2140. * Returns 0 success, anything else error
  2141. */
  2142. static int
  2143. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2144. {
  2145. struct mpt2sas_facts *facts;
  2146. u32 queue_size, queue_diff;
  2147. u16 max_sge_elements;
  2148. u16 num_of_reply_frames;
  2149. u16 chains_needed_per_io;
  2150. u32 sz, total_sz, reply_post_free_sz;
  2151. u32 retry_sz;
  2152. u16 max_request_credit;
  2153. int i;
  2154. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2155. __func__));
  2156. retry_sz = 0;
  2157. facts = &ioc->facts;
  2158. /* command line tunables for max sgl entries */
  2159. if (max_sgl_entries != -1) {
  2160. ioc->shost->sg_tablesize = (max_sgl_entries <
  2161. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2162. MPT2SAS_SG_DEPTH;
  2163. } else {
  2164. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2165. }
  2166. /* command line tunables for max controller queue depth */
  2167. if (max_queue_depth != -1)
  2168. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2169. ? max_queue_depth : facts->RequestCredit;
  2170. else
  2171. max_request_credit = facts->RequestCredit;
  2172. ioc->hba_queue_depth = max_request_credit;
  2173. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2174. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2175. /* request frame size */
  2176. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2177. /* reply frame size */
  2178. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2179. retry_allocation:
  2180. total_sz = 0;
  2181. /* calculate number of sg elements left over in the 1st frame */
  2182. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2183. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2184. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2185. /* now do the same for a chain buffer */
  2186. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2187. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2188. ioc->chain_offset_value_for_main_message =
  2189. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2190. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2191. /*
  2192. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2193. */
  2194. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2195. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2196. + 1;
  2197. if (chains_needed_per_io > facts->MaxChainDepth) {
  2198. chains_needed_per_io = facts->MaxChainDepth;
  2199. ioc->shost->sg_tablesize = min_t(u16,
  2200. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2201. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2202. }
  2203. ioc->chains_needed_per_io = chains_needed_per_io;
  2204. /* reply free queue sizing - taking into account for events */
  2205. num_of_reply_frames = ioc->hba_queue_depth + 32;
  2206. /* number of replies frames can't be a multiple of 16 */
  2207. /* decrease number of reply frames by 1 */
  2208. if (!(num_of_reply_frames % 16))
  2209. num_of_reply_frames--;
  2210. /* calculate number of reply free queue entries
  2211. * (must be multiple of 16)
  2212. */
  2213. /* (we know reply_free_queue_depth is not a multiple of 16) */
  2214. queue_size = num_of_reply_frames;
  2215. queue_size += 16 - (queue_size % 16);
  2216. ioc->reply_free_queue_depth = queue_size;
  2217. /* reply descriptor post queue sizing */
  2218. /* this size should be the number of request frames + number of reply
  2219. * frames
  2220. */
  2221. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  2222. /* round up to 16 byte boundary */
  2223. if (queue_size % 16)
  2224. queue_size += 16 - (queue_size % 16);
  2225. /* check against IOC maximum reply post queue depth */
  2226. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  2227. queue_diff = queue_size -
  2228. facts->MaxReplyDescriptorPostQueueDepth;
  2229. /* round queue_diff up to multiple of 16 */
  2230. if (queue_diff % 16)
  2231. queue_diff += 16 - (queue_diff % 16);
  2232. /* adjust hba_queue_depth, reply_free_queue_depth,
  2233. * and queue_size
  2234. */
  2235. ioc->hba_queue_depth -= (queue_diff / 2);
  2236. ioc->reply_free_queue_depth -= (queue_diff / 2);
  2237. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  2238. }
  2239. ioc->reply_post_queue_depth = queue_size;
  2240. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2241. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2242. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2243. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2244. ioc->chains_needed_per_io));
  2245. ioc->scsiio_depth = ioc->hba_queue_depth -
  2246. ioc->hi_priority_depth - ioc->internal_depth;
  2247. /* set the scsi host can_queue depth
  2248. * with some internal commands that could be outstanding
  2249. */
  2250. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2251. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2252. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2253. /* contiguous pool for request and chains, 16 byte align, one extra "
  2254. * "frame for smid=0
  2255. */
  2256. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2257. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2258. /* hi-priority queue */
  2259. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2260. /* internal queue */
  2261. sz += (ioc->internal_depth * ioc->request_sz);
  2262. ioc->request_dma_sz = sz;
  2263. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2264. if (!ioc->request) {
  2265. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2266. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2267. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2268. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2269. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2270. goto out;
  2271. retry_sz += 64;
  2272. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2273. goto retry_allocation;
  2274. }
  2275. if (retry_sz)
  2276. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2277. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2278. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2279. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2280. /* hi-priority queue */
  2281. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2282. ioc->request_sz);
  2283. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2284. ioc->request_sz);
  2285. /* internal queue */
  2286. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2287. ioc->request_sz);
  2288. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2289. ioc->request_sz);
  2290. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2291. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2292. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2293. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2294. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2295. ioc->name, (unsigned long long) ioc->request_dma));
  2296. total_sz += sz;
  2297. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2298. ioc->scsi_lookup_pages = get_order(sz);
  2299. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2300. GFP_KERNEL, ioc->scsi_lookup_pages);
  2301. if (!ioc->scsi_lookup) {
  2302. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2303. "sz(%d)\n", ioc->name, (int)sz);
  2304. goto out;
  2305. }
  2306. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2307. "depth(%d)\n", ioc->name, ioc->request,
  2308. ioc->scsiio_depth));
  2309. /* loop till the allocation succeeds */
  2310. do {
  2311. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2312. ioc->chain_pages = get_order(sz);
  2313. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2314. GFP_KERNEL, ioc->chain_pages);
  2315. if (ioc->chain_lookup == NULL)
  2316. ioc->chain_depth -= 100;
  2317. } while (ioc->chain_lookup == NULL);
  2318. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2319. ioc->request_sz, 16, 0);
  2320. if (!ioc->chain_dma_pool) {
  2321. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2322. "failed\n", ioc->name);
  2323. goto out;
  2324. }
  2325. for (i = 0; i < ioc->chain_depth; i++) {
  2326. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2327. ioc->chain_dma_pool , GFP_KERNEL,
  2328. &ioc->chain_lookup[i].chain_buffer_dma);
  2329. if (!ioc->chain_lookup[i].chain_buffer) {
  2330. ioc->chain_depth = i;
  2331. goto chain_done;
  2332. }
  2333. total_sz += ioc->request_sz;
  2334. }
  2335. chain_done:
  2336. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2337. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2338. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2339. ioc->request_sz))/1024));
  2340. /* initialize hi-priority queue smid's */
  2341. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2342. sizeof(struct request_tracker), GFP_KERNEL);
  2343. if (!ioc->hpr_lookup) {
  2344. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2345. ioc->name);
  2346. goto out;
  2347. }
  2348. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2349. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2350. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2351. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2352. /* initialize internal queue smid's */
  2353. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2354. sizeof(struct request_tracker), GFP_KERNEL);
  2355. if (!ioc->internal_lookup) {
  2356. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2357. ioc->name);
  2358. goto out;
  2359. }
  2360. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2361. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2362. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2363. ioc->internal_depth, ioc->internal_smid));
  2364. /* sense buffers, 4 byte align */
  2365. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2366. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2367. 0);
  2368. if (!ioc->sense_dma_pool) {
  2369. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2370. ioc->name);
  2371. goto out;
  2372. }
  2373. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2374. &ioc->sense_dma);
  2375. if (!ioc->sense) {
  2376. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2377. ioc->name);
  2378. goto out;
  2379. }
  2380. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2381. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2382. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2383. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2384. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2385. ioc->name, (unsigned long long)ioc->sense_dma));
  2386. total_sz += sz;
  2387. /* reply pool, 4 byte align */
  2388. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2389. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2390. 0);
  2391. if (!ioc->reply_dma_pool) {
  2392. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2393. ioc->name);
  2394. goto out;
  2395. }
  2396. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2397. &ioc->reply_dma);
  2398. if (!ioc->reply) {
  2399. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2400. ioc->name);
  2401. goto out;
  2402. }
  2403. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2404. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2405. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2406. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2407. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2408. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2409. ioc->name, (unsigned long long)ioc->reply_dma));
  2410. total_sz += sz;
  2411. /* reply free queue, 16 byte align */
  2412. sz = ioc->reply_free_queue_depth * 4;
  2413. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2414. ioc->pdev, sz, 16, 0);
  2415. if (!ioc->reply_free_dma_pool) {
  2416. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2417. "failed\n", ioc->name);
  2418. goto out;
  2419. }
  2420. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2421. &ioc->reply_free_dma);
  2422. if (!ioc->reply_free) {
  2423. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2424. "failed\n", ioc->name);
  2425. goto out;
  2426. }
  2427. memset(ioc->reply_free, 0, sz);
  2428. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2429. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2430. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2431. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2432. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2433. total_sz += sz;
  2434. /* reply post queue, 16 byte align */
  2435. reply_post_free_sz = ioc->reply_post_queue_depth *
  2436. sizeof(Mpi2DefaultReplyDescriptor_t);
  2437. if (_base_is_controller_msix_enabled(ioc))
  2438. sz = reply_post_free_sz * ioc->reply_queue_count;
  2439. else
  2440. sz = reply_post_free_sz;
  2441. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2442. ioc->pdev, sz, 16, 0);
  2443. if (!ioc->reply_post_free_dma_pool) {
  2444. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2445. "failed\n", ioc->name);
  2446. goto out;
  2447. }
  2448. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2449. GFP_KERNEL, &ioc->reply_post_free_dma);
  2450. if (!ioc->reply_post_free) {
  2451. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2452. "failed\n", ioc->name);
  2453. goto out;
  2454. }
  2455. memset(ioc->reply_post_free, 0, sz);
  2456. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2457. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2458. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2459. sz/1024));
  2460. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2461. "(0x%llx)\n", ioc->name, (unsigned long long)
  2462. ioc->reply_post_free_dma));
  2463. total_sz += sz;
  2464. ioc->config_page_sz = 512;
  2465. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2466. ioc->config_page_sz, &ioc->config_page_dma);
  2467. if (!ioc->config_page) {
  2468. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2469. "failed\n", ioc->name);
  2470. goto out;
  2471. }
  2472. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2473. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2474. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2475. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2476. total_sz += ioc->config_page_sz;
  2477. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2478. ioc->name, total_sz/1024);
  2479. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2480. "Max Controller Queue Depth(%d)\n",
  2481. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2482. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2483. ioc->name, ioc->shost->sg_tablesize);
  2484. return 0;
  2485. out:
  2486. return -ENOMEM;
  2487. }
  2488. /**
  2489. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2490. * @ioc: Pointer to MPT_ADAPTER structure
  2491. * @cooked: Request raw or cooked IOC state
  2492. *
  2493. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2494. * Doorbell bits in MPI_IOC_STATE_MASK.
  2495. */
  2496. u32
  2497. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2498. {
  2499. u32 s, sc;
  2500. s = readl(&ioc->chip->Doorbell);
  2501. sc = s & MPI2_IOC_STATE_MASK;
  2502. return cooked ? sc : s;
  2503. }
  2504. /**
  2505. * _base_wait_on_iocstate - waiting on a particular ioc state
  2506. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2507. * @timeout: timeout in second
  2508. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2509. *
  2510. * Returns 0 for success, non-zero for failure.
  2511. */
  2512. static int
  2513. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2514. int sleep_flag)
  2515. {
  2516. u32 count, cntdn;
  2517. u32 current_state;
  2518. count = 0;
  2519. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2520. do {
  2521. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2522. if (current_state == ioc_state)
  2523. return 0;
  2524. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2525. break;
  2526. if (sleep_flag == CAN_SLEEP)
  2527. msleep(1);
  2528. else
  2529. udelay(500);
  2530. count++;
  2531. } while (--cntdn);
  2532. return current_state;
  2533. }
  2534. /**
  2535. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2536. * a write to the doorbell)
  2537. * @ioc: per adapter object
  2538. * @timeout: timeout in second
  2539. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2540. *
  2541. * Returns 0 for success, non-zero for failure.
  2542. *
  2543. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2544. */
  2545. static int
  2546. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2547. int sleep_flag)
  2548. {
  2549. u32 cntdn, count;
  2550. u32 int_status;
  2551. count = 0;
  2552. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2553. do {
  2554. int_status = readl(&ioc->chip->HostInterruptStatus);
  2555. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2556. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2557. "successful count(%d), timeout(%d)\n", ioc->name,
  2558. __func__, count, timeout));
  2559. return 0;
  2560. }
  2561. if (sleep_flag == CAN_SLEEP)
  2562. msleep(1);
  2563. else
  2564. udelay(500);
  2565. count++;
  2566. } while (--cntdn);
  2567. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2568. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2569. return -EFAULT;
  2570. }
  2571. /**
  2572. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2573. * @ioc: per adapter object
  2574. * @timeout: timeout in second
  2575. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2576. *
  2577. * Returns 0 for success, non-zero for failure.
  2578. *
  2579. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2580. * doorbell.
  2581. */
  2582. static int
  2583. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2584. int sleep_flag)
  2585. {
  2586. u32 cntdn, count;
  2587. u32 int_status;
  2588. u32 doorbell;
  2589. count = 0;
  2590. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2591. do {
  2592. int_status = readl(&ioc->chip->HostInterruptStatus);
  2593. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2594. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2595. "successful count(%d), timeout(%d)\n", ioc->name,
  2596. __func__, count, timeout));
  2597. return 0;
  2598. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2599. doorbell = readl(&ioc->chip->Doorbell);
  2600. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2601. MPI2_IOC_STATE_FAULT) {
  2602. mpt2sas_base_fault_info(ioc , doorbell);
  2603. return -EFAULT;
  2604. }
  2605. } else if (int_status == 0xFFFFFFFF)
  2606. goto out;
  2607. if (sleep_flag == CAN_SLEEP)
  2608. msleep(1);
  2609. else
  2610. udelay(500);
  2611. count++;
  2612. } while (--cntdn);
  2613. out:
  2614. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2615. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2616. return -EFAULT;
  2617. }
  2618. /**
  2619. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2620. * @ioc: per adapter object
  2621. * @timeout: timeout in second
  2622. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2623. *
  2624. * Returns 0 for success, non-zero for failure.
  2625. *
  2626. */
  2627. static int
  2628. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2629. int sleep_flag)
  2630. {
  2631. u32 cntdn, count;
  2632. u32 doorbell_reg;
  2633. count = 0;
  2634. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2635. do {
  2636. doorbell_reg = readl(&ioc->chip->Doorbell);
  2637. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2638. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2639. "successful count(%d), timeout(%d)\n", ioc->name,
  2640. __func__, count, timeout));
  2641. return 0;
  2642. }
  2643. if (sleep_flag == CAN_SLEEP)
  2644. msleep(1);
  2645. else
  2646. udelay(500);
  2647. count++;
  2648. } while (--cntdn);
  2649. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2650. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2651. return -EFAULT;
  2652. }
  2653. /**
  2654. * _base_send_ioc_reset - send doorbell reset
  2655. * @ioc: per adapter object
  2656. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2657. * @timeout: timeout in second
  2658. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2659. *
  2660. * Returns 0 for success, non-zero for failure.
  2661. */
  2662. static int
  2663. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2664. int sleep_flag)
  2665. {
  2666. u32 ioc_state;
  2667. int r = 0;
  2668. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2669. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2670. ioc->name, __func__);
  2671. return -EFAULT;
  2672. }
  2673. if (!(ioc->facts.IOCCapabilities &
  2674. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2675. return -EFAULT;
  2676. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2677. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2678. &ioc->chip->Doorbell);
  2679. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2680. r = -EFAULT;
  2681. goto out;
  2682. }
  2683. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2684. timeout, sleep_flag);
  2685. if (ioc_state) {
  2686. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2687. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2688. r = -EFAULT;
  2689. goto out;
  2690. }
  2691. out:
  2692. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2693. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2694. return r;
  2695. }
  2696. /**
  2697. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2698. * @ioc: per adapter object
  2699. * @request_bytes: request length
  2700. * @request: pointer having request payload
  2701. * @reply_bytes: reply length
  2702. * @reply: pointer to reply payload
  2703. * @timeout: timeout in second
  2704. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2705. *
  2706. * Returns 0 for success, non-zero for failure.
  2707. */
  2708. static int
  2709. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2710. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2711. {
  2712. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2713. int i;
  2714. u8 failed;
  2715. u16 dummy;
  2716. __le32 *mfp;
  2717. /* make sure doorbell is not in use */
  2718. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2719. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2720. " (line=%d)\n", ioc->name, __LINE__);
  2721. return -EFAULT;
  2722. }
  2723. /* clear pending doorbell interrupts from previous state changes */
  2724. if (readl(&ioc->chip->HostInterruptStatus) &
  2725. MPI2_HIS_IOC2SYS_DB_STATUS)
  2726. writel(0, &ioc->chip->HostInterruptStatus);
  2727. /* send message to ioc */
  2728. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2729. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2730. &ioc->chip->Doorbell);
  2731. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2732. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2733. "int failed (line=%d)\n", ioc->name, __LINE__);
  2734. return -EFAULT;
  2735. }
  2736. writel(0, &ioc->chip->HostInterruptStatus);
  2737. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2738. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2739. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2740. return -EFAULT;
  2741. }
  2742. /* send message 32-bits at a time */
  2743. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2744. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2745. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2746. failed = 1;
  2747. }
  2748. if (failed) {
  2749. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2750. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2751. return -EFAULT;
  2752. }
  2753. /* now wait for the reply */
  2754. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2755. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2756. "int failed (line=%d)\n", ioc->name, __LINE__);
  2757. return -EFAULT;
  2758. }
  2759. /* read the first two 16-bits, it gives the total length of the reply */
  2760. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2761. & MPI2_DOORBELL_DATA_MASK);
  2762. writel(0, &ioc->chip->HostInterruptStatus);
  2763. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2764. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2765. "int failed (line=%d)\n", ioc->name, __LINE__);
  2766. return -EFAULT;
  2767. }
  2768. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2769. & MPI2_DOORBELL_DATA_MASK);
  2770. writel(0, &ioc->chip->HostInterruptStatus);
  2771. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2772. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2773. printk(MPT2SAS_ERR_FMT "doorbell "
  2774. "handshake int failed (line=%d)\n", ioc->name,
  2775. __LINE__);
  2776. return -EFAULT;
  2777. }
  2778. if (i >= reply_bytes/2) /* overflow case */
  2779. dummy = readl(&ioc->chip->Doorbell);
  2780. else
  2781. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2782. & MPI2_DOORBELL_DATA_MASK);
  2783. writel(0, &ioc->chip->HostInterruptStatus);
  2784. }
  2785. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2786. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2787. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2788. " (line=%d)\n", ioc->name, __LINE__));
  2789. }
  2790. writel(0, &ioc->chip->HostInterruptStatus);
  2791. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2792. mfp = (__le32 *)reply;
  2793. printk(KERN_INFO "\toffset:data\n");
  2794. for (i = 0; i < reply_bytes/4; i++)
  2795. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2796. le32_to_cpu(mfp[i]));
  2797. }
  2798. return 0;
  2799. }
  2800. /**
  2801. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2802. * @ioc: per adapter object
  2803. * @mpi_reply: the reply payload from FW
  2804. * @mpi_request: the request payload sent to FW
  2805. *
  2806. * The SAS IO Unit Control Request message allows the host to perform low-level
  2807. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2808. * to obtain the IOC assigned device handles for a device if it has other
  2809. * identifying information about the device, in addition allows the host to
  2810. * remove IOC resources associated with the device.
  2811. *
  2812. * Returns 0 for success, non-zero for failure.
  2813. */
  2814. int
  2815. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2816. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2817. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2818. {
  2819. u16 smid;
  2820. u32 ioc_state;
  2821. unsigned long timeleft;
  2822. u8 issue_reset;
  2823. int rc;
  2824. void *request;
  2825. u16 wait_state_count;
  2826. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2827. __func__));
  2828. mutex_lock(&ioc->base_cmds.mutex);
  2829. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2830. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2831. ioc->name, __func__);
  2832. rc = -EAGAIN;
  2833. goto out;
  2834. }
  2835. wait_state_count = 0;
  2836. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2837. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2838. if (wait_state_count++ == 10) {
  2839. printk(MPT2SAS_ERR_FMT
  2840. "%s: failed due to ioc not operational\n",
  2841. ioc->name, __func__);
  2842. rc = -EFAULT;
  2843. goto out;
  2844. }
  2845. ssleep(1);
  2846. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2847. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2848. "operational state(count=%d)\n", ioc->name,
  2849. __func__, wait_state_count);
  2850. }
  2851. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2852. if (!smid) {
  2853. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2854. ioc->name, __func__);
  2855. rc = -EAGAIN;
  2856. goto out;
  2857. }
  2858. rc = 0;
  2859. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2860. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2861. ioc->base_cmds.smid = smid;
  2862. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2863. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2864. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2865. ioc->ioc_link_reset_in_progress = 1;
  2866. mpt2sas_base_put_smid_default(ioc, smid);
  2867. init_completion(&ioc->base_cmds.done);
  2868. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2869. msecs_to_jiffies(10000));
  2870. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2871. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2872. ioc->ioc_link_reset_in_progress)
  2873. ioc->ioc_link_reset_in_progress = 0;
  2874. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2875. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2876. ioc->name, __func__);
  2877. _debug_dump_mf(mpi_request,
  2878. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2879. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2880. issue_reset = 1;
  2881. goto issue_host_reset;
  2882. }
  2883. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2884. memcpy(mpi_reply, ioc->base_cmds.reply,
  2885. sizeof(Mpi2SasIoUnitControlReply_t));
  2886. else
  2887. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2888. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2889. goto out;
  2890. issue_host_reset:
  2891. if (issue_reset)
  2892. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2893. FORCE_BIG_HAMMER);
  2894. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2895. rc = -EFAULT;
  2896. out:
  2897. mutex_unlock(&ioc->base_cmds.mutex);
  2898. return rc;
  2899. }
  2900. /**
  2901. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2902. * @ioc: per adapter object
  2903. * @mpi_reply: the reply payload from FW
  2904. * @mpi_request: the request payload sent to FW
  2905. *
  2906. * The SCSI Enclosure Processor request message causes the IOC to
  2907. * communicate with SES devices to control LED status signals.
  2908. *
  2909. * Returns 0 for success, non-zero for failure.
  2910. */
  2911. int
  2912. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2913. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2914. {
  2915. u16 smid;
  2916. u32 ioc_state;
  2917. unsigned long timeleft;
  2918. u8 issue_reset;
  2919. int rc;
  2920. void *request;
  2921. u16 wait_state_count;
  2922. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2923. __func__));
  2924. mutex_lock(&ioc->base_cmds.mutex);
  2925. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2926. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2927. ioc->name, __func__);
  2928. rc = -EAGAIN;
  2929. goto out;
  2930. }
  2931. wait_state_count = 0;
  2932. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2933. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2934. if (wait_state_count++ == 10) {
  2935. printk(MPT2SAS_ERR_FMT
  2936. "%s: failed due to ioc not operational\n",
  2937. ioc->name, __func__);
  2938. rc = -EFAULT;
  2939. goto out;
  2940. }
  2941. ssleep(1);
  2942. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2943. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2944. "operational state(count=%d)\n", ioc->name,
  2945. __func__, wait_state_count);
  2946. }
  2947. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2948. if (!smid) {
  2949. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2950. ioc->name, __func__);
  2951. rc = -EAGAIN;
  2952. goto out;
  2953. }
  2954. rc = 0;
  2955. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2956. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2957. ioc->base_cmds.smid = smid;
  2958. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2959. mpt2sas_base_put_smid_default(ioc, smid);
  2960. init_completion(&ioc->base_cmds.done);
  2961. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2962. msecs_to_jiffies(10000));
  2963. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2964. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2965. ioc->name, __func__);
  2966. _debug_dump_mf(mpi_request,
  2967. sizeof(Mpi2SepRequest_t)/4);
  2968. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2969. issue_reset = 1;
  2970. goto issue_host_reset;
  2971. }
  2972. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2973. memcpy(mpi_reply, ioc->base_cmds.reply,
  2974. sizeof(Mpi2SepReply_t));
  2975. else
  2976. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2977. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2978. goto out;
  2979. issue_host_reset:
  2980. if (issue_reset)
  2981. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2982. FORCE_BIG_HAMMER);
  2983. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2984. rc = -EFAULT;
  2985. out:
  2986. mutex_unlock(&ioc->base_cmds.mutex);
  2987. return rc;
  2988. }
  2989. /**
  2990. * _base_get_port_facts - obtain port facts reply and save in ioc
  2991. * @ioc: per adapter object
  2992. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2993. *
  2994. * Returns 0 for success, non-zero for failure.
  2995. */
  2996. static int
  2997. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2998. {
  2999. Mpi2PortFactsRequest_t mpi_request;
  3000. Mpi2PortFactsReply_t mpi_reply;
  3001. struct mpt2sas_port_facts *pfacts;
  3002. int mpi_reply_sz, mpi_request_sz, r;
  3003. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3004. __func__));
  3005. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3006. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3007. memset(&mpi_request, 0, mpi_request_sz);
  3008. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3009. mpi_request.PortNumber = port;
  3010. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3011. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3012. if (r != 0) {
  3013. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3014. ioc->name, __func__, r);
  3015. return r;
  3016. }
  3017. pfacts = &ioc->pfacts[port];
  3018. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  3019. pfacts->PortNumber = mpi_reply.PortNumber;
  3020. pfacts->VP_ID = mpi_reply.VP_ID;
  3021. pfacts->VF_ID = mpi_reply.VF_ID;
  3022. pfacts->MaxPostedCmdBuffers =
  3023. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3024. return 0;
  3025. }
  3026. /**
  3027. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3028. * @ioc: per adapter object
  3029. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3030. *
  3031. * Returns 0 for success, non-zero for failure.
  3032. */
  3033. static int
  3034. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3035. {
  3036. Mpi2IOCFactsRequest_t mpi_request;
  3037. Mpi2IOCFactsReply_t mpi_reply;
  3038. struct mpt2sas_facts *facts;
  3039. int mpi_reply_sz, mpi_request_sz, r;
  3040. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3041. __func__));
  3042. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3043. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3044. memset(&mpi_request, 0, mpi_request_sz);
  3045. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3046. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3047. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3048. if (r != 0) {
  3049. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3050. ioc->name, __func__, r);
  3051. return r;
  3052. }
  3053. facts = &ioc->facts;
  3054. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3055. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3056. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3057. facts->VP_ID = mpi_reply.VP_ID;
  3058. facts->VF_ID = mpi_reply.VF_ID;
  3059. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3060. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3061. facts->WhoInit = mpi_reply.WhoInit;
  3062. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3063. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3064. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3065. facts->MaxReplyDescriptorPostQueueDepth =
  3066. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3067. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3068. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3069. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3070. ioc->ir_firmware = 1;
  3071. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3072. facts->IOCRequestFrameSize =
  3073. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3074. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3075. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3076. ioc->shost->max_id = -1;
  3077. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3078. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3079. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3080. facts->HighPriorityCredit =
  3081. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3082. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3083. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3084. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3085. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3086. facts->MaxChainDepth));
  3087. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3088. "reply frame size(%d)\n", ioc->name,
  3089. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3090. return 0;
  3091. }
  3092. /**
  3093. * _base_send_ioc_init - send ioc_init to firmware
  3094. * @ioc: per adapter object
  3095. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3096. *
  3097. * Returns 0 for success, non-zero for failure.
  3098. */
  3099. static int
  3100. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3101. {
  3102. Mpi2IOCInitRequest_t mpi_request;
  3103. Mpi2IOCInitReply_t mpi_reply;
  3104. int r;
  3105. struct timeval current_time;
  3106. u16 ioc_status;
  3107. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3108. __func__));
  3109. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3110. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3111. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3112. mpi_request.VF_ID = 0; /* TODO */
  3113. mpi_request.VP_ID = 0;
  3114. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3115. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3116. if (_base_is_controller_msix_enabled(ioc))
  3117. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3118. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3119. mpi_request.ReplyDescriptorPostQueueDepth =
  3120. cpu_to_le16(ioc->reply_post_queue_depth);
  3121. mpi_request.ReplyFreeQueueDepth =
  3122. cpu_to_le16(ioc->reply_free_queue_depth);
  3123. mpi_request.SenseBufferAddressHigh =
  3124. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3125. mpi_request.SystemReplyAddressHigh =
  3126. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3127. mpi_request.SystemRequestFrameBaseAddress =
  3128. cpu_to_le64((u64)ioc->request_dma);
  3129. mpi_request.ReplyFreeQueueAddress =
  3130. cpu_to_le64((u64)ioc->reply_free_dma);
  3131. mpi_request.ReplyDescriptorPostQueueAddress =
  3132. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3133. /* This time stamp specifies number of milliseconds
  3134. * since epoch ~ midnight January 1, 1970.
  3135. */
  3136. do_gettimeofday(&current_time);
  3137. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3138. (current_time.tv_usec / 1000));
  3139. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3140. __le32 *mfp;
  3141. int i;
  3142. mfp = (__le32 *)&mpi_request;
  3143. printk(KERN_INFO "\toffset:data\n");
  3144. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3145. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3146. le32_to_cpu(mfp[i]));
  3147. }
  3148. r = _base_handshake_req_reply_wait(ioc,
  3149. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3150. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3151. sleep_flag);
  3152. if (r != 0) {
  3153. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3154. ioc->name, __func__, r);
  3155. return r;
  3156. }
  3157. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3158. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3159. mpi_reply.IOCLogInfo) {
  3160. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3161. r = -EIO;
  3162. }
  3163. return 0;
  3164. }
  3165. /**
  3166. * mpt2sas_port_enable_done - command completion routine for port enable
  3167. * @ioc: per adapter object
  3168. * @smid: system request message index
  3169. * @msix_index: MSIX table index supplied by the OS
  3170. * @reply: reply message frame(lower 32bit addr)
  3171. *
  3172. * Return 1 meaning mf should be freed from _base_interrupt
  3173. * 0 means the mf is freed from this function.
  3174. */
  3175. u8
  3176. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3177. u32 reply)
  3178. {
  3179. MPI2DefaultReply_t *mpi_reply;
  3180. u16 ioc_status;
  3181. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3182. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3183. return 1;
  3184. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3185. return 1;
  3186. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3187. if (mpi_reply) {
  3188. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3189. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3190. mpi_reply->MsgLength*4);
  3191. }
  3192. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3193. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3194. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3195. ioc->port_enable_failed = 1;
  3196. if (ioc->is_driver_loading) {
  3197. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3198. mpt2sas_port_enable_complete(ioc);
  3199. return 1;
  3200. } else {
  3201. ioc->start_scan_failed = ioc_status;
  3202. ioc->start_scan = 0;
  3203. return 1;
  3204. }
  3205. }
  3206. complete(&ioc->port_enable_cmds.done);
  3207. return 1;
  3208. }
  3209. /**
  3210. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3211. * @ioc: per adapter object
  3212. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3213. *
  3214. * Returns 0 for success, non-zero for failure.
  3215. */
  3216. static int
  3217. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3218. {
  3219. Mpi2PortEnableRequest_t *mpi_request;
  3220. Mpi2PortEnableReply_t *mpi_reply;
  3221. unsigned long timeleft;
  3222. int r = 0;
  3223. u16 smid;
  3224. u16 ioc_status;
  3225. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3226. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3227. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3228. ioc->name, __func__);
  3229. return -EAGAIN;
  3230. }
  3231. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3232. if (!smid) {
  3233. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3234. ioc->name, __func__);
  3235. return -EAGAIN;
  3236. }
  3237. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3238. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3239. ioc->port_enable_cmds.smid = smid;
  3240. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3241. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3242. init_completion(&ioc->port_enable_cmds.done);
  3243. mpt2sas_base_put_smid_default(ioc, smid);
  3244. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3245. 300*HZ);
  3246. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3247. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3248. ioc->name, __func__);
  3249. _debug_dump_mf(mpi_request,
  3250. sizeof(Mpi2PortEnableRequest_t)/4);
  3251. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3252. r = -EFAULT;
  3253. else
  3254. r = -ETIME;
  3255. goto out;
  3256. }
  3257. mpi_reply = ioc->port_enable_cmds.reply;
  3258. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3259. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3260. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3261. ioc->name, __func__, ioc_status);
  3262. r = -EFAULT;
  3263. goto out;
  3264. }
  3265. out:
  3266. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3267. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3268. "SUCCESS" : "FAILED"));
  3269. return r;
  3270. }
  3271. /**
  3272. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3273. * @ioc: per adapter object
  3274. *
  3275. * Returns 0 for success, non-zero for failure.
  3276. */
  3277. int
  3278. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3279. {
  3280. Mpi2PortEnableRequest_t *mpi_request;
  3281. u16 smid;
  3282. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3283. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3284. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3285. ioc->name, __func__);
  3286. return -EAGAIN;
  3287. }
  3288. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3289. if (!smid) {
  3290. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3291. ioc->name, __func__);
  3292. return -EAGAIN;
  3293. }
  3294. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3295. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3296. ioc->port_enable_cmds.smid = smid;
  3297. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3298. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3299. mpt2sas_base_put_smid_default(ioc, smid);
  3300. return 0;
  3301. }
  3302. /**
  3303. * _base_determine_wait_on_discovery - desposition
  3304. * @ioc: per adapter object
  3305. *
  3306. * Decide whether to wait on discovery to complete. Used to either
  3307. * locate boot device, or report volumes ahead of physical devices.
  3308. *
  3309. * Returns 1 for wait, 0 for don't wait
  3310. */
  3311. static int
  3312. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3313. {
  3314. /* We wait for discovery to complete if IR firmware is loaded.
  3315. * The sas topology events arrive before PD events, so we need time to
  3316. * turn on the bit in ioc->pd_handles to indicate PD
  3317. * Also, it maybe required to report Volumes ahead of physical
  3318. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3319. */
  3320. if (ioc->ir_firmware)
  3321. return 1;
  3322. /* if no Bios, then we don't need to wait */
  3323. if (!ioc->bios_pg3.BiosVersion)
  3324. return 0;
  3325. /* Bios is present, then we drop down here.
  3326. *
  3327. * If there any entries in the Bios Page 2, then we wait
  3328. * for discovery to complete.
  3329. */
  3330. /* Current Boot Device */
  3331. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3332. MPI2_BIOSPAGE2_FORM_MASK) ==
  3333. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3334. /* Request Boot Device */
  3335. (ioc->bios_pg2.ReqBootDeviceForm &
  3336. MPI2_BIOSPAGE2_FORM_MASK) ==
  3337. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3338. /* Alternate Request Boot Device */
  3339. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3340. MPI2_BIOSPAGE2_FORM_MASK) ==
  3341. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3342. return 0;
  3343. return 1;
  3344. }
  3345. /**
  3346. * _base_unmask_events - turn on notification for this event
  3347. * @ioc: per adapter object
  3348. * @event: firmware event
  3349. *
  3350. * The mask is stored in ioc->event_masks.
  3351. */
  3352. static void
  3353. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3354. {
  3355. u32 desired_event;
  3356. if (event >= 128)
  3357. return;
  3358. desired_event = (1 << (event % 32));
  3359. if (event < 32)
  3360. ioc->event_masks[0] &= ~desired_event;
  3361. else if (event < 64)
  3362. ioc->event_masks[1] &= ~desired_event;
  3363. else if (event < 96)
  3364. ioc->event_masks[2] &= ~desired_event;
  3365. else if (event < 128)
  3366. ioc->event_masks[3] &= ~desired_event;
  3367. }
  3368. /**
  3369. * _base_event_notification - send event notification
  3370. * @ioc: per adapter object
  3371. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3372. *
  3373. * Returns 0 for success, non-zero for failure.
  3374. */
  3375. static int
  3376. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3377. {
  3378. Mpi2EventNotificationRequest_t *mpi_request;
  3379. unsigned long timeleft;
  3380. u16 smid;
  3381. int r = 0;
  3382. int i;
  3383. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3384. __func__));
  3385. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3386. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3387. ioc->name, __func__);
  3388. return -EAGAIN;
  3389. }
  3390. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3391. if (!smid) {
  3392. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3393. ioc->name, __func__);
  3394. return -EAGAIN;
  3395. }
  3396. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3397. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3398. ioc->base_cmds.smid = smid;
  3399. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3400. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3401. mpi_request->VF_ID = 0; /* TODO */
  3402. mpi_request->VP_ID = 0;
  3403. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3404. mpi_request->EventMasks[i] =
  3405. cpu_to_le32(ioc->event_masks[i]);
  3406. mpt2sas_base_put_smid_default(ioc, smid);
  3407. init_completion(&ioc->base_cmds.done);
  3408. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3409. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3410. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3411. ioc->name, __func__);
  3412. _debug_dump_mf(mpi_request,
  3413. sizeof(Mpi2EventNotificationRequest_t)/4);
  3414. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3415. r = -EFAULT;
  3416. else
  3417. r = -ETIME;
  3418. } else
  3419. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3420. ioc->name, __func__));
  3421. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3422. return r;
  3423. }
  3424. /**
  3425. * mpt2sas_base_validate_event_type - validating event types
  3426. * @ioc: per adapter object
  3427. * @event: firmware event
  3428. *
  3429. * This will turn on firmware event notification when application
  3430. * ask for that event. We don't mask events that are already enabled.
  3431. */
  3432. void
  3433. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3434. {
  3435. int i, j;
  3436. u32 event_mask, desired_event;
  3437. u8 send_update_to_fw;
  3438. for (i = 0, send_update_to_fw = 0; i <
  3439. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3440. event_mask = ~event_type[i];
  3441. desired_event = 1;
  3442. for (j = 0; j < 32; j++) {
  3443. if (!(event_mask & desired_event) &&
  3444. (ioc->event_masks[i] & desired_event)) {
  3445. ioc->event_masks[i] &= ~desired_event;
  3446. send_update_to_fw = 1;
  3447. }
  3448. desired_event = (desired_event << 1);
  3449. }
  3450. }
  3451. if (!send_update_to_fw)
  3452. return;
  3453. mutex_lock(&ioc->base_cmds.mutex);
  3454. _base_event_notification(ioc, CAN_SLEEP);
  3455. mutex_unlock(&ioc->base_cmds.mutex);
  3456. }
  3457. /**
  3458. * _base_diag_reset - the "big hammer" start of day reset
  3459. * @ioc: per adapter object
  3460. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3461. *
  3462. * Returns 0 for success, non-zero for failure.
  3463. */
  3464. static int
  3465. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3466. {
  3467. u32 host_diagnostic;
  3468. u32 ioc_state;
  3469. u32 count;
  3470. u32 hcb_size;
  3471. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3472. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3473. ioc->name));
  3474. count = 0;
  3475. do {
  3476. /* Write magic sequence to WriteSequence register
  3477. * Loop until in diagnostic mode
  3478. */
  3479. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3480. "sequence\n", ioc->name));
  3481. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3482. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3483. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3484. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3485. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3486. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3487. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3488. /* wait 100 msec */
  3489. if (sleep_flag == CAN_SLEEP)
  3490. msleep(100);
  3491. else
  3492. mdelay(100);
  3493. if (count++ > 20)
  3494. goto out;
  3495. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3496. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3497. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3498. ioc->name, count, host_diagnostic));
  3499. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3500. hcb_size = readl(&ioc->chip->HCBSize);
  3501. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3502. ioc->name));
  3503. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3504. &ioc->chip->HostDiagnostic);
  3505. /* don't access any registers for 50 milliseconds */
  3506. msleep(50);
  3507. /* 300 second max wait */
  3508. for (count = 0; count < 3000000 ; count++) {
  3509. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3510. if (host_diagnostic == 0xFFFFFFFF)
  3511. goto out;
  3512. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3513. break;
  3514. /* wait 100 msec */
  3515. if (sleep_flag == CAN_SLEEP)
  3516. msleep(1);
  3517. else
  3518. mdelay(1);
  3519. }
  3520. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3521. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3522. "assuming the HCB Address points to good F/W\n",
  3523. ioc->name));
  3524. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3525. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3526. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3527. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3528. "re-enable the HCDW\n", ioc->name));
  3529. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3530. &ioc->chip->HCBSize);
  3531. }
  3532. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3533. ioc->name));
  3534. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3535. &ioc->chip->HostDiagnostic);
  3536. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3537. "diagnostic register\n", ioc->name));
  3538. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3539. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3540. "READY state\n", ioc->name));
  3541. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3542. sleep_flag);
  3543. if (ioc_state) {
  3544. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3545. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3546. goto out;
  3547. }
  3548. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3549. return 0;
  3550. out:
  3551. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3552. return -EFAULT;
  3553. }
  3554. /**
  3555. * _base_make_ioc_ready - put controller in READY state
  3556. * @ioc: per adapter object
  3557. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3558. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3559. *
  3560. * Returns 0 for success, non-zero for failure.
  3561. */
  3562. static int
  3563. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3564. enum reset_type type)
  3565. {
  3566. u32 ioc_state;
  3567. int rc;
  3568. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3569. __func__));
  3570. if (ioc->pci_error_recovery)
  3571. return 0;
  3572. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3573. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3574. ioc->name, __func__, ioc_state));
  3575. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3576. return 0;
  3577. if (ioc_state & MPI2_DOORBELL_USED) {
  3578. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3579. "active!\n", ioc->name));
  3580. goto issue_diag_reset;
  3581. }
  3582. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3583. mpt2sas_base_fault_info(ioc, ioc_state &
  3584. MPI2_DOORBELL_DATA_MASK);
  3585. goto issue_diag_reset;
  3586. }
  3587. if (type == FORCE_BIG_HAMMER)
  3588. goto issue_diag_reset;
  3589. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3590. if (!(_base_send_ioc_reset(ioc,
  3591. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3592. ioc->ioc_reset_count++;
  3593. return 0;
  3594. }
  3595. issue_diag_reset:
  3596. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3597. ioc->ioc_reset_count++;
  3598. return rc;
  3599. }
  3600. /**
  3601. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3602. * @ioc: per adapter object
  3603. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3604. *
  3605. * Returns 0 for success, non-zero for failure.
  3606. */
  3607. static int
  3608. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3609. {
  3610. int r, i;
  3611. unsigned long flags;
  3612. u32 reply_address;
  3613. u16 smid;
  3614. struct _tr_list *delayed_tr, *delayed_tr_next;
  3615. u8 hide_flag;
  3616. struct adapter_reply_queue *reply_q;
  3617. long reply_post_free;
  3618. u32 reply_post_free_sz;
  3619. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3620. __func__));
  3621. /* clean the delayed target reset list */
  3622. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3623. &ioc->delayed_tr_list, list) {
  3624. list_del(&delayed_tr->list);
  3625. kfree(delayed_tr);
  3626. }
  3627. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3628. &ioc->delayed_tr_volume_list, list) {
  3629. list_del(&delayed_tr->list);
  3630. kfree(delayed_tr);
  3631. }
  3632. /* initialize the scsi lookup free list */
  3633. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3634. INIT_LIST_HEAD(&ioc->free_list);
  3635. smid = 1;
  3636. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3637. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3638. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3639. ioc->scsi_lookup[i].smid = smid;
  3640. ioc->scsi_lookup[i].scmd = NULL;
  3641. ioc->scsi_lookup[i].direct_io = 0;
  3642. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3643. &ioc->free_list);
  3644. }
  3645. /* hi-priority queue */
  3646. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3647. smid = ioc->hi_priority_smid;
  3648. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3649. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3650. ioc->hpr_lookup[i].smid = smid;
  3651. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3652. &ioc->hpr_free_list);
  3653. }
  3654. /* internal queue */
  3655. INIT_LIST_HEAD(&ioc->internal_free_list);
  3656. smid = ioc->internal_smid;
  3657. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3658. ioc->internal_lookup[i].cb_idx = 0xFF;
  3659. ioc->internal_lookup[i].smid = smid;
  3660. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3661. &ioc->internal_free_list);
  3662. }
  3663. /* chain pool */
  3664. INIT_LIST_HEAD(&ioc->free_chain_list);
  3665. for (i = 0; i < ioc->chain_depth; i++)
  3666. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3667. &ioc->free_chain_list);
  3668. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3669. /* initialize Reply Free Queue */
  3670. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3671. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3672. ioc->reply_sz)
  3673. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3674. /* initialize reply queues */
  3675. _base_assign_reply_queues(ioc);
  3676. /* initialize Reply Post Free Queue */
  3677. reply_post_free = (long)ioc->reply_post_free;
  3678. reply_post_free_sz = ioc->reply_post_queue_depth *
  3679. sizeof(Mpi2DefaultReplyDescriptor_t);
  3680. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3681. reply_q->reply_post_host_index = 0;
  3682. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3683. reply_post_free;
  3684. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3685. reply_q->reply_post_free[i].Words =
  3686. cpu_to_le64(ULLONG_MAX);
  3687. if (!_base_is_controller_msix_enabled(ioc))
  3688. goto skip_init_reply_post_free_queue;
  3689. reply_post_free += reply_post_free_sz;
  3690. }
  3691. skip_init_reply_post_free_queue:
  3692. r = _base_send_ioc_init(ioc, sleep_flag);
  3693. if (r)
  3694. return r;
  3695. /* initialize reply free host index */
  3696. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3697. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3698. /* initialize reply post host index */
  3699. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3700. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3701. &ioc->chip->ReplyPostHostIndex);
  3702. if (!_base_is_controller_msix_enabled(ioc))
  3703. goto skip_init_reply_post_host_index;
  3704. }
  3705. skip_init_reply_post_host_index:
  3706. _base_unmask_interrupts(ioc);
  3707. r = _base_event_notification(ioc, sleep_flag);
  3708. if (r)
  3709. return r;
  3710. if (sleep_flag == CAN_SLEEP)
  3711. _base_static_config_pages(ioc);
  3712. if (ioc->is_driver_loading) {
  3713. ioc->wait_for_discovery_to_complete =
  3714. _base_determine_wait_on_discovery(ioc);
  3715. return r; /* scan_start and scan_finished support */
  3716. }
  3717. if (ioc->wait_for_discovery_to_complete && ioc->is_warpdrive) {
  3718. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3719. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3720. MFG_PAGE10_HIDE_SSDS_MASK);
  3721. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3722. ioc->mfg_pg10_hide_flag = hide_flag;
  3723. }
  3724. }
  3725. r = _base_send_port_enable(ioc, sleep_flag);
  3726. if (r)
  3727. return r;
  3728. return r;
  3729. }
  3730. /**
  3731. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3732. * @ioc: per adapter object
  3733. *
  3734. * Return nothing.
  3735. */
  3736. void
  3737. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3738. {
  3739. struct pci_dev *pdev = ioc->pdev;
  3740. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3741. __func__));
  3742. _base_mask_interrupts(ioc);
  3743. ioc->shost_recovery = 1;
  3744. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3745. ioc->shost_recovery = 0;
  3746. _base_free_irq(ioc);
  3747. _base_disable_msix(ioc);
  3748. if (ioc->chip_phys)
  3749. iounmap(ioc->chip);
  3750. ioc->chip_phys = 0;
  3751. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3752. pci_disable_pcie_error_reporting(pdev);
  3753. pci_disable_device(pdev);
  3754. return;
  3755. }
  3756. /**
  3757. * mpt2sas_base_attach - attach controller instance
  3758. * @ioc: per adapter object
  3759. *
  3760. * Returns 0 for success, non-zero for failure.
  3761. */
  3762. int
  3763. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3764. {
  3765. int r, i;
  3766. int cpu_id, last_cpu_id = 0;
  3767. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3768. __func__));
  3769. /* setup cpu_msix_table */
  3770. ioc->cpu_count = num_online_cpus();
  3771. for_each_online_cpu(cpu_id)
  3772. last_cpu_id = cpu_id;
  3773. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3774. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3775. ioc->reply_queue_count = 1;
  3776. if (!ioc->cpu_msix_table) {
  3777. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3778. "cpu_msix_table failed!!!\n", ioc->name));
  3779. r = -ENOMEM;
  3780. goto out_free_resources;
  3781. }
  3782. if (ioc->is_warpdrive) {
  3783. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3784. sizeof(resource_size_t *), GFP_KERNEL);
  3785. if (!ioc->reply_post_host_index) {
  3786. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3787. "for cpu_msix_table failed!!!\n", ioc->name));
  3788. r = -ENOMEM;
  3789. goto out_free_resources;
  3790. }
  3791. }
  3792. r = mpt2sas_base_map_resources(ioc);
  3793. if (r)
  3794. return r;
  3795. if (ioc->is_warpdrive) {
  3796. ioc->reply_post_host_index[0] =
  3797. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3798. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3799. ioc->reply_post_host_index[i] = (resource_size_t *)
  3800. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3801. * 4)));
  3802. }
  3803. pci_set_drvdata(ioc->pdev, ioc->shost);
  3804. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3805. if (r)
  3806. goto out_free_resources;
  3807. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3808. if (r)
  3809. goto out_free_resources;
  3810. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3811. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3812. if (!ioc->pfacts) {
  3813. r = -ENOMEM;
  3814. goto out_free_resources;
  3815. }
  3816. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3817. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3818. if (r)
  3819. goto out_free_resources;
  3820. }
  3821. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3822. if (r)
  3823. goto out_free_resources;
  3824. init_waitqueue_head(&ioc->reset_wq);
  3825. /* allocate memory pd handle bitmask list */
  3826. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3827. if (ioc->facts.MaxDevHandle % 8)
  3828. ioc->pd_handles_sz++;
  3829. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3830. GFP_KERNEL);
  3831. if (!ioc->pd_handles) {
  3832. r = -ENOMEM;
  3833. goto out_free_resources;
  3834. }
  3835. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3836. /* base internal command bits */
  3837. mutex_init(&ioc->base_cmds.mutex);
  3838. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3839. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3840. /* port_enable command bits */
  3841. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3842. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3843. /* transport internal command bits */
  3844. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3845. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3846. mutex_init(&ioc->transport_cmds.mutex);
  3847. /* scsih internal command bits */
  3848. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3849. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3850. mutex_init(&ioc->scsih_cmds.mutex);
  3851. /* task management internal command bits */
  3852. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3853. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3854. mutex_init(&ioc->tm_cmds.mutex);
  3855. /* config page internal command bits */
  3856. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3857. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3858. mutex_init(&ioc->config_cmds.mutex);
  3859. /* ctl module internal command bits */
  3860. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3861. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3862. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3863. mutex_init(&ioc->ctl_cmds.mutex);
  3864. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3865. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3866. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3867. !ioc->ctl_cmds.sense) {
  3868. r = -ENOMEM;
  3869. goto out_free_resources;
  3870. }
  3871. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3872. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3873. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3874. r = -ENOMEM;
  3875. goto out_free_resources;
  3876. }
  3877. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3878. ioc->event_masks[i] = -1;
  3879. /* here we enable the events we care about */
  3880. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3881. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3882. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3883. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3884. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3885. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3886. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3887. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3888. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3889. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3890. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3891. if (r)
  3892. goto out_free_resources;
  3893. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3894. _base_update_missing_delay(ioc, missing_delay[0],
  3895. missing_delay[1]);
  3896. return 0;
  3897. out_free_resources:
  3898. ioc->remove_host = 1;
  3899. mpt2sas_base_free_resources(ioc);
  3900. _base_release_memory_pools(ioc);
  3901. pci_set_drvdata(ioc->pdev, NULL);
  3902. kfree(ioc->cpu_msix_table);
  3903. if (ioc->is_warpdrive)
  3904. kfree(ioc->reply_post_host_index);
  3905. kfree(ioc->pd_handles);
  3906. kfree(ioc->tm_cmds.reply);
  3907. kfree(ioc->transport_cmds.reply);
  3908. kfree(ioc->scsih_cmds.reply);
  3909. kfree(ioc->config_cmds.reply);
  3910. kfree(ioc->base_cmds.reply);
  3911. kfree(ioc->port_enable_cmds.reply);
  3912. kfree(ioc->ctl_cmds.reply);
  3913. kfree(ioc->ctl_cmds.sense);
  3914. kfree(ioc->pfacts);
  3915. ioc->ctl_cmds.reply = NULL;
  3916. ioc->base_cmds.reply = NULL;
  3917. ioc->tm_cmds.reply = NULL;
  3918. ioc->scsih_cmds.reply = NULL;
  3919. ioc->transport_cmds.reply = NULL;
  3920. ioc->config_cmds.reply = NULL;
  3921. ioc->pfacts = NULL;
  3922. return r;
  3923. }
  3924. /**
  3925. * mpt2sas_base_detach - remove controller instance
  3926. * @ioc: per adapter object
  3927. *
  3928. * Return nothing.
  3929. */
  3930. void
  3931. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3932. {
  3933. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3934. __func__));
  3935. mpt2sas_base_stop_watchdog(ioc);
  3936. mpt2sas_base_free_resources(ioc);
  3937. _base_release_memory_pools(ioc);
  3938. pci_set_drvdata(ioc->pdev, NULL);
  3939. kfree(ioc->cpu_msix_table);
  3940. if (ioc->is_warpdrive)
  3941. kfree(ioc->reply_post_host_index);
  3942. kfree(ioc->pd_handles);
  3943. kfree(ioc->pfacts);
  3944. kfree(ioc->ctl_cmds.reply);
  3945. kfree(ioc->ctl_cmds.sense);
  3946. kfree(ioc->base_cmds.reply);
  3947. kfree(ioc->port_enable_cmds.reply);
  3948. kfree(ioc->tm_cmds.reply);
  3949. kfree(ioc->transport_cmds.reply);
  3950. kfree(ioc->scsih_cmds.reply);
  3951. kfree(ioc->config_cmds.reply);
  3952. }
  3953. /**
  3954. * _base_reset_handler - reset callback handler (for base)
  3955. * @ioc: per adapter object
  3956. * @reset_phase: phase
  3957. *
  3958. * The handler for doing any required cleanup or initialization.
  3959. *
  3960. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3961. * MPT2_IOC_DONE_RESET
  3962. *
  3963. * Return nothing.
  3964. */
  3965. static void
  3966. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3967. {
  3968. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3969. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3970. switch (reset_phase) {
  3971. case MPT2_IOC_PRE_RESET:
  3972. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3973. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3974. break;
  3975. case MPT2_IOC_AFTER_RESET:
  3976. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3977. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3978. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3979. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3980. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3981. complete(&ioc->transport_cmds.done);
  3982. }
  3983. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3984. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3985. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3986. complete(&ioc->base_cmds.done);
  3987. }
  3988. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3989. ioc->port_enable_failed = 1;
  3990. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  3991. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  3992. if (ioc->is_driver_loading) {
  3993. ioc->start_scan_failed =
  3994. MPI2_IOCSTATUS_INTERNAL_ERROR;
  3995. ioc->start_scan = 0;
  3996. ioc->port_enable_cmds.status =
  3997. MPT2_CMD_NOT_USED;
  3998. } else
  3999. complete(&ioc->port_enable_cmds.done);
  4000. }
  4001. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4002. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4003. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4004. ioc->config_cmds.smid = USHRT_MAX;
  4005. complete(&ioc->config_cmds.done);
  4006. }
  4007. break;
  4008. case MPT2_IOC_DONE_RESET:
  4009. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4010. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4011. break;
  4012. }
  4013. }
  4014. /**
  4015. * _wait_for_commands_to_complete - reset controller
  4016. * @ioc: Pointer to MPT_ADAPTER structure
  4017. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4018. *
  4019. * This function waiting(3s) for all pending commands to complete
  4020. * prior to putting controller in reset.
  4021. */
  4022. static void
  4023. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4024. {
  4025. u32 ioc_state;
  4026. unsigned long flags;
  4027. u16 i;
  4028. ioc->pending_io_count = 0;
  4029. if (sleep_flag != CAN_SLEEP)
  4030. return;
  4031. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4032. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4033. return;
  4034. /* pending command count */
  4035. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4036. for (i = 0; i < ioc->scsiio_depth; i++)
  4037. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4038. ioc->pending_io_count++;
  4039. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4040. if (!ioc->pending_io_count)
  4041. return;
  4042. /* wait for pending commands to complete */
  4043. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4044. }
  4045. /**
  4046. * mpt2sas_base_hard_reset_handler - reset controller
  4047. * @ioc: Pointer to MPT_ADAPTER structure
  4048. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4049. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4050. *
  4051. * Returns 0 for success, non-zero for failure.
  4052. */
  4053. int
  4054. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4055. enum reset_type type)
  4056. {
  4057. int r;
  4058. unsigned long flags;
  4059. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4060. __func__));
  4061. if (ioc->pci_error_recovery) {
  4062. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4063. ioc->name, __func__);
  4064. r = 0;
  4065. goto out;
  4066. }
  4067. if (mpt2sas_fwfault_debug)
  4068. mpt2sas_halt_firmware(ioc);
  4069. /* TODO - What we really should be doing is pulling
  4070. * out all the code associated with NO_SLEEP; its never used.
  4071. * That is legacy code from mpt fusion driver, ported over.
  4072. * I will leave this BUG_ON here for now till its been resolved.
  4073. */
  4074. BUG_ON(sleep_flag == NO_SLEEP);
  4075. /* wait for an active reset in progress to complete */
  4076. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4077. do {
  4078. ssleep(1);
  4079. } while (ioc->shost_recovery == 1);
  4080. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4081. __func__));
  4082. return ioc->ioc_reset_in_progress_status;
  4083. }
  4084. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4085. ioc->shost_recovery = 1;
  4086. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4087. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4088. _wait_for_commands_to_complete(ioc, sleep_flag);
  4089. _base_mask_interrupts(ioc);
  4090. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4091. if (r)
  4092. goto out;
  4093. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4094. /* If this hard reset is called while port enable is active, then
  4095. * there is no reason to call make_ioc_operational
  4096. */
  4097. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4098. ioc->remove_host = 1;
  4099. r = -EFAULT;
  4100. goto out;
  4101. }
  4102. r = _base_make_ioc_operational(ioc, sleep_flag);
  4103. if (!r)
  4104. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4105. out:
  4106. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4107. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4108. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4109. ioc->ioc_reset_in_progress_status = r;
  4110. ioc->shost_recovery = 0;
  4111. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4112. mutex_unlock(&ioc->reset_in_progress_mutex);
  4113. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4114. __func__));
  4115. return r;
  4116. }