88pm800.c 14 KB

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  1. /*
  2. * Base driver for Marvell 88PM800
  3. *
  4. * Copyright (C) 2012 Marvell International Ltd.
  5. * Haojian Zhuang <haojian.zhuang@marvell.com>
  6. * Joseph(Yossi) Hanin <yhanin@marvell.com>
  7. * Qiao Zhou <zhouqiao@marvell.com>
  8. *
  9. * This file is subject to the terms and conditions of the GNU General
  10. * Public License. See the file "COPYING" in the main directory of this
  11. * archive for more details.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/i2c.h>
  25. #include <linux/mfd/core.h>
  26. #include <linux/mfd/88pm80x.h>
  27. #include <linux/slab.h>
  28. #define PM800_CHIP_ID (0x00)
  29. /* Interrupt Registers */
  30. #define PM800_INT_STATUS1 (0x05)
  31. #define PM800_ONKEY_INT_STS1 (1 << 0)
  32. #define PM800_EXTON_INT_STS1 (1 << 1)
  33. #define PM800_CHG_INT_STS1 (1 << 2)
  34. #define PM800_BAT_INT_STS1 (1 << 3)
  35. #define PM800_RTC_INT_STS1 (1 << 4)
  36. #define PM800_CLASSD_OC_INT_STS1 (1 << 5)
  37. #define PM800_INT_STATUS2 (0x06)
  38. #define PM800_VBAT_INT_STS2 (1 << 0)
  39. #define PM800_VSYS_INT_STS2 (1 << 1)
  40. #define PM800_VCHG_INT_STS2 (1 << 2)
  41. #define PM800_TINT_INT_STS2 (1 << 3)
  42. #define PM800_GPADC0_INT_STS2 (1 << 4)
  43. #define PM800_TBAT_INT_STS2 (1 << 5)
  44. #define PM800_GPADC2_INT_STS2 (1 << 6)
  45. #define PM800_GPADC3_INT_STS2 (1 << 7)
  46. #define PM800_INT_STATUS3 (0x07)
  47. #define PM800_INT_STATUS4 (0x08)
  48. #define PM800_GPIO0_INT_STS4 (1 << 0)
  49. #define PM800_GPIO1_INT_STS4 (1 << 1)
  50. #define PM800_GPIO2_INT_STS4 (1 << 2)
  51. #define PM800_GPIO3_INT_STS4 (1 << 3)
  52. #define PM800_GPIO4_INT_STS4 (1 << 4)
  53. #define PM800_INT_ENA_1 (0x09)
  54. #define PM800_ONKEY_INT_ENA1 (1 << 0)
  55. #define PM800_EXTON_INT_ENA1 (1 << 1)
  56. #define PM800_CHG_INT_ENA1 (1 << 2)
  57. #define PM800_BAT_INT_ENA1 (1 << 3)
  58. #define PM800_RTC_INT_ENA1 (1 << 4)
  59. #define PM800_CLASSD_OC_INT_ENA1 (1 << 5)
  60. #define PM800_INT_ENA_2 (0x0A)
  61. #define PM800_VBAT_INT_ENA2 (1 << 0)
  62. #define PM800_VSYS_INT_ENA2 (1 << 1)
  63. #define PM800_VCHG_INT_ENA2 (1 << 2)
  64. #define PM800_TINT_INT_ENA2 (1 << 3)
  65. #define PM800_INT_ENA_3 (0x0B)
  66. #define PM800_GPADC0_INT_ENA3 (1 << 0)
  67. #define PM800_GPADC1_INT_ENA3 (1 << 1)
  68. #define PM800_GPADC2_INT_ENA3 (1 << 2)
  69. #define PM800_GPADC3_INT_ENA3 (1 << 3)
  70. #define PM800_GPADC4_INT_ENA3 (1 << 4)
  71. #define PM800_INT_ENA_4 (0x0C)
  72. #define PM800_GPIO0_INT_ENA4 (1 << 0)
  73. #define PM800_GPIO1_INT_ENA4 (1 << 1)
  74. #define PM800_GPIO2_INT_ENA4 (1 << 2)
  75. #define PM800_GPIO3_INT_ENA4 (1 << 3)
  76. #define PM800_GPIO4_INT_ENA4 (1 << 4)
  77. /* number of INT_ENA & INT_STATUS regs */
  78. #define PM800_INT_REG_NUM (4)
  79. /* Interrupt Number in 88PM800 */
  80. enum {
  81. PM800_IRQ_ONKEY, /*EN1b0 *//*0 */
  82. PM800_IRQ_EXTON, /*EN1b1 */
  83. PM800_IRQ_CHG, /*EN1b2 */
  84. PM800_IRQ_BAT, /*EN1b3 */
  85. PM800_IRQ_RTC, /*EN1b4 */
  86. PM800_IRQ_CLASSD, /*EN1b5 *//*5 */
  87. PM800_IRQ_VBAT, /*EN2b0 */
  88. PM800_IRQ_VSYS, /*EN2b1 */
  89. PM800_IRQ_VCHG, /*EN2b2 */
  90. PM800_IRQ_TINT, /*EN2b3 */
  91. PM800_IRQ_GPADC0, /*EN3b0 *//*10 */
  92. PM800_IRQ_GPADC1, /*EN3b1 */
  93. PM800_IRQ_GPADC2, /*EN3b2 */
  94. PM800_IRQ_GPADC3, /*EN3b3 */
  95. PM800_IRQ_GPADC4, /*EN3b4 */
  96. PM800_IRQ_GPIO0, /*EN4b0 *//*15 */
  97. PM800_IRQ_GPIO1, /*EN4b1 */
  98. PM800_IRQ_GPIO2, /*EN4b2 */
  99. PM800_IRQ_GPIO3, /*EN4b3 */
  100. PM800_IRQ_GPIO4, /*EN4b4 *//*19 */
  101. PM800_MAX_IRQ,
  102. };
  103. enum {
  104. /* Procida */
  105. PM800_CHIP_A0 = 0x60,
  106. PM800_CHIP_A1 = 0x61,
  107. PM800_CHIP_B0 = 0x62,
  108. PM800_CHIP_C0 = 0x63,
  109. PM800_CHIP_END = PM800_CHIP_C0,
  110. /* Make sure to update this to the last stepping */
  111. PM8XXX_CHIP_END = PM800_CHIP_END
  112. };
  113. static const struct i2c_device_id pm80x_id_table[] = {
  114. {"88PM800", CHIP_PM800},
  115. };
  116. MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
  117. static struct resource rtc_resources[] = {
  118. {
  119. .name = "88pm80x-rtc",
  120. .start = PM800_IRQ_RTC,
  121. .end = PM800_IRQ_RTC,
  122. .flags = IORESOURCE_IRQ,
  123. },
  124. };
  125. static struct mfd_cell rtc_devs[] = {
  126. {
  127. .name = "88pm80x-rtc",
  128. .num_resources = ARRAY_SIZE(rtc_resources),
  129. .resources = &rtc_resources[0],
  130. .id = -1,
  131. },
  132. };
  133. static struct resource onkey_resources[] = {
  134. {
  135. .name = "88pm80x-onkey",
  136. .start = PM800_IRQ_ONKEY,
  137. .end = PM800_IRQ_ONKEY,
  138. .flags = IORESOURCE_IRQ,
  139. },
  140. };
  141. static struct mfd_cell onkey_devs[] = {
  142. {
  143. .name = "88pm80x-onkey",
  144. .num_resources = 1,
  145. .resources = &onkey_resources[0],
  146. .id = -1,
  147. },
  148. };
  149. static const struct regmap_irq pm800_irqs[] = {
  150. /* INT0 */
  151. [PM800_IRQ_ONKEY] = {
  152. .mask = PM800_ONKEY_INT_ENA1,
  153. },
  154. [PM800_IRQ_EXTON] = {
  155. .mask = PM800_EXTON_INT_ENA1,
  156. },
  157. [PM800_IRQ_CHG] = {
  158. .mask = PM800_CHG_INT_ENA1,
  159. },
  160. [PM800_IRQ_BAT] = {
  161. .mask = PM800_BAT_INT_ENA1,
  162. },
  163. [PM800_IRQ_RTC] = {
  164. .mask = PM800_RTC_INT_ENA1,
  165. },
  166. [PM800_IRQ_CLASSD] = {
  167. .mask = PM800_CLASSD_OC_INT_ENA1,
  168. },
  169. /* INT1 */
  170. [PM800_IRQ_VBAT] = {
  171. .reg_offset = 1,
  172. .mask = PM800_VBAT_INT_ENA2,
  173. },
  174. [PM800_IRQ_VSYS] = {
  175. .reg_offset = 1,
  176. .mask = PM800_VSYS_INT_ENA2,
  177. },
  178. [PM800_IRQ_VCHG] = {
  179. .reg_offset = 1,
  180. .mask = PM800_VCHG_INT_ENA2,
  181. },
  182. [PM800_IRQ_TINT] = {
  183. .reg_offset = 1,
  184. .mask = PM800_TINT_INT_ENA2,
  185. },
  186. /* INT2 */
  187. [PM800_IRQ_GPADC0] = {
  188. .reg_offset = 2,
  189. .mask = PM800_GPADC0_INT_ENA3,
  190. },
  191. [PM800_IRQ_GPADC1] = {
  192. .reg_offset = 2,
  193. .mask = PM800_GPADC1_INT_ENA3,
  194. },
  195. [PM800_IRQ_GPADC2] = {
  196. .reg_offset = 2,
  197. .mask = PM800_GPADC2_INT_ENA3,
  198. },
  199. [PM800_IRQ_GPADC3] = {
  200. .reg_offset = 2,
  201. .mask = PM800_GPADC3_INT_ENA3,
  202. },
  203. [PM800_IRQ_GPADC4] = {
  204. .reg_offset = 2,
  205. .mask = PM800_GPADC4_INT_ENA3,
  206. },
  207. /* INT3 */
  208. [PM800_IRQ_GPIO0] = {
  209. .reg_offset = 3,
  210. .mask = PM800_GPIO0_INT_ENA4,
  211. },
  212. [PM800_IRQ_GPIO1] = {
  213. .reg_offset = 3,
  214. .mask = PM800_GPIO1_INT_ENA4,
  215. },
  216. [PM800_IRQ_GPIO2] = {
  217. .reg_offset = 3,
  218. .mask = PM800_GPIO2_INT_ENA4,
  219. },
  220. [PM800_IRQ_GPIO3] = {
  221. .reg_offset = 3,
  222. .mask = PM800_GPIO3_INT_ENA4,
  223. },
  224. [PM800_IRQ_GPIO4] = {
  225. .reg_offset = 3,
  226. .mask = PM800_GPIO4_INT_ENA4,
  227. },
  228. };
  229. static int __devinit device_gpadc_init(struct pm80x_chip *chip,
  230. struct pm80x_platform_data *pdata)
  231. {
  232. struct pm80x_subchip *subchip = chip->subchip;
  233. struct regmap *map = subchip->regmap_gpadc;
  234. int data = 0, mask = 0, ret = 0;
  235. if (!map) {
  236. dev_warn(chip->dev,
  237. "Warning: gpadc regmap is not available!\n");
  238. return -EINVAL;
  239. }
  240. /*
  241. * initialize GPADC without activating it turn on GPADC
  242. * measurments
  243. */
  244. ret = regmap_update_bits(map,
  245. PM800_GPADC_MISC_CONFIG2,
  246. PM800_GPADC_MISC_GPFSM_EN,
  247. PM800_GPADC_MISC_GPFSM_EN);
  248. if (ret < 0)
  249. goto out;
  250. /*
  251. * This function configures the ADC as requires for
  252. * CP implementation.CP does not "own" the ADC configuration
  253. * registers and relies on AP.
  254. * Reason: enable automatic ADC measurements needed
  255. * for CP to get VBAT and RF temperature readings.
  256. */
  257. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN1,
  258. PM800_MEAS_EN1_VBAT, PM800_MEAS_EN1_VBAT);
  259. if (ret < 0)
  260. goto out;
  261. ret = regmap_update_bits(map, PM800_GPADC_MEAS_EN2,
  262. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN),
  263. (PM800_MEAS_EN2_RFTMP | PM800_MEAS_GP0_EN));
  264. if (ret < 0)
  265. goto out;
  266. /*
  267. * the defult of PM800 is GPADC operates at 100Ks/s rate
  268. * and Number of GPADC slots with active current bias prior
  269. * to GPADC sampling = 1 slot for all GPADCs set for
  270. * Temprature mesurmants
  271. */
  272. mask = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  273. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  274. if (pdata && (pdata->batt_det == 0))
  275. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN1 |
  276. PM800_GPADC_GP_BIAS_EN2 | PM800_GPADC_GP_BIAS_EN3);
  277. else
  278. data = (PM800_GPADC_GP_BIAS_EN0 | PM800_GPADC_GP_BIAS_EN2 |
  279. PM800_GPADC_GP_BIAS_EN3);
  280. ret = regmap_update_bits(map, PM800_GP_BIAS_ENA1, mask, data);
  281. if (ret < 0)
  282. goto out;
  283. dev_info(chip->dev, "pm800 device_gpadc_init: Done\n");
  284. return 0;
  285. out:
  286. dev_info(chip->dev, "pm800 device_gpadc_init: Failed!\n");
  287. return ret;
  288. }
  289. static int __devinit device_irq_init_800(struct pm80x_chip *chip)
  290. {
  291. struct regmap *map = chip->regmap;
  292. unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
  293. int data, mask, ret = -EINVAL;
  294. if (!map || !chip->irq) {
  295. dev_err(chip->dev, "incorrect parameters\n");
  296. return -EINVAL;
  297. }
  298. /*
  299. * irq_mode defines the way of clearing interrupt. it's read-clear by
  300. * default.
  301. */
  302. mask =
  303. PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR |
  304. PM800_WAKEUP2_INT_MASK;
  305. data = PM800_WAKEUP2_INT_CLEAR;
  306. ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data);
  307. if (ret < 0)
  308. goto out;
  309. ret =
  310. regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
  311. chip->regmap_irq_chip, &chip->irq_data);
  312. out:
  313. return ret;
  314. }
  315. static void device_irq_exit_800(struct pm80x_chip *chip)
  316. {
  317. regmap_del_irq_chip(chip->irq, chip->irq_data);
  318. }
  319. static struct regmap_irq_chip pm800_irq_chip = {
  320. .name = "88pm800",
  321. .irqs = pm800_irqs,
  322. .num_irqs = ARRAY_SIZE(pm800_irqs),
  323. .num_regs = 4,
  324. .status_base = PM800_INT_STATUS1,
  325. .mask_base = PM800_INT_ENA_1,
  326. .ack_base = PM800_INT_STATUS1,
  327. };
  328. static int pm800_pages_init(struct pm80x_chip *chip)
  329. {
  330. struct pm80x_subchip *subchip;
  331. struct i2c_client *client = chip->client;
  332. subchip = chip->subchip;
  333. /* PM800 block power: i2c addr 0x31 */
  334. if (subchip->power_page_addr) {
  335. subchip->power_page =
  336. i2c_new_dummy(client->adapter, subchip->power_page_addr);
  337. subchip->regmap_power =
  338. devm_regmap_init_i2c(subchip->power_page,
  339. &pm80x_regmap_config);
  340. i2c_set_clientdata(subchip->power_page, chip);
  341. } else
  342. dev_info(chip->dev,
  343. "PM800 block power 0x31: No power_page_addr\n");
  344. /* PM800 block GPADC: i2c addr 0x32 */
  345. if (subchip->gpadc_page_addr) {
  346. subchip->gpadc_page = i2c_new_dummy(client->adapter,
  347. subchip->gpadc_page_addr);
  348. subchip->regmap_gpadc =
  349. devm_regmap_init_i2c(subchip->gpadc_page,
  350. &pm80x_regmap_config);
  351. i2c_set_clientdata(subchip->gpadc_page, chip);
  352. } else
  353. dev_info(chip->dev,
  354. "PM800 block GPADC 0x32: No gpadc_page_addr\n");
  355. return 0;
  356. }
  357. static void pm800_pages_exit(struct pm80x_chip *chip)
  358. {
  359. struct pm80x_subchip *subchip;
  360. regmap_exit(chip->regmap);
  361. i2c_unregister_device(chip->client);
  362. subchip = chip->subchip;
  363. if (subchip->power_page) {
  364. regmap_exit(subchip->regmap_power);
  365. i2c_unregister_device(subchip->power_page);
  366. }
  367. if (subchip->gpadc_page) {
  368. regmap_exit(subchip->regmap_gpadc);
  369. i2c_unregister_device(subchip->gpadc_page);
  370. }
  371. }
  372. static int __devinit device_800_init(struct pm80x_chip *chip,
  373. struct pm80x_platform_data *pdata)
  374. {
  375. int ret, pmic_id;
  376. regmap_read(chip->regmap, PM800_CHIP_ID, &ret);
  377. if (ret < 0) {
  378. dev_err(chip->dev, "Failed to read CHIP ID: %d\n", ret);
  379. goto out;
  380. }
  381. pmic_id = ret & PM80X_VERSION_MASK;
  382. if ((pmic_id >= PM800_CHIP_A0) && (pmic_id <= PM800_CHIP_END)) {
  383. chip->version = ret;
  384. dev_info(chip->dev,
  385. "88PM80x:Marvell 88PM800 (ID:0x%x) detected\n", ret);
  386. } else {
  387. dev_err(chip->dev,
  388. "Failed to detect Marvell 88PM800:ChipID[0x%x]\n", ret);
  389. goto out;
  390. }
  391. /*
  392. * alarm wake up bit will be clear in device_irq_init(),
  393. * read before that
  394. */
  395. regmap_read(chip->regmap, PM800_RTC_CONTROL, &ret);
  396. if (ret < 0) {
  397. dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
  398. goto out;
  399. }
  400. if (ret & PM800_ALARM_WAKEUP) {
  401. if (pdata && pdata->rtc)
  402. pdata->rtc->rtc_wakeup = 1;
  403. }
  404. ret = device_gpadc_init(chip, pdata);
  405. if (ret < 0) {
  406. dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
  407. goto out;
  408. }
  409. chip->regmap_irq_chip = &pm800_irq_chip;
  410. ret = device_irq_init_800(chip);
  411. if (ret < 0) {
  412. dev_err(chip->dev, "[%s]Failed to init pm800 irq\n", __func__);
  413. goto out;
  414. }
  415. ret =
  416. mfd_add_devices(chip->dev, 0, &onkey_devs[0],
  417. ARRAY_SIZE(onkey_devs), &onkey_resources[0], 0);
  418. if (ret < 0) {
  419. dev_err(chip->dev, "Failed to add onkey subdev\n");
  420. goto out_dev;
  421. } else
  422. dev_info(chip->dev, "[%s]:Added mfd onkey_devs\n", __func__);
  423. if (pdata && pdata->rtc) {
  424. rtc_devs[0].platform_data = pdata->rtc;
  425. rtc_devs[0].pdata_size = sizeof(struct pm80x_rtc_pdata);
  426. ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
  427. ARRAY_SIZE(rtc_devs), NULL, 0);
  428. if (ret < 0) {
  429. dev_err(chip->dev, "Failed to add rtc subdev\n");
  430. goto out_dev;
  431. } else
  432. dev_info(chip->dev,
  433. "[%s]:Added mfd rtc_devs\n", __func__);
  434. }
  435. return 0;
  436. out_dev:
  437. mfd_remove_devices(chip->dev);
  438. device_irq_exit_800(chip);
  439. out:
  440. return ret;
  441. }
  442. static int __devinit pm800_probe(struct i2c_client *client,
  443. const struct i2c_device_id *id)
  444. {
  445. int ret = 0;
  446. struct pm80x_chip *chip;
  447. struct pm80x_platform_data *pdata = client->dev.platform_data;
  448. struct pm80x_subchip *subchip;
  449. ret = pm80x_init(client, id);
  450. if (ret) {
  451. dev_err(&client->dev, "pm800_init fail\n");
  452. goto out_init;
  453. }
  454. chip = i2c_get_clientdata(client);
  455. /* init subchip for PM800 */
  456. subchip =
  457. devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
  458. GFP_KERNEL);
  459. if (!subchip) {
  460. ret = -ENOMEM;
  461. goto err_subchip_alloc;
  462. }
  463. subchip->power_page_addr = pdata->power_page_addr;
  464. subchip->gpadc_page_addr = pdata->gpadc_page_addr;
  465. chip->subchip = subchip;
  466. ret = device_800_init(chip, pdata);
  467. if (ret) {
  468. dev_err(chip->dev, "%s id 0x%x failed!\n", __func__, chip->id);
  469. goto err_800_init;
  470. }
  471. ret = pm800_pages_init(chip);
  472. if (ret) {
  473. dev_err(&client->dev, "pm800_pages_init failed!\n");
  474. goto err_page_init;
  475. }
  476. if (pdata->plat_config)
  477. pdata->plat_config(chip, pdata);
  478. err_page_init:
  479. mfd_remove_devices(chip->dev);
  480. device_irq_exit_800(chip);
  481. err_800_init:
  482. devm_kfree(&client->dev, subchip);
  483. err_subchip_alloc:
  484. pm80x_deinit(client);
  485. out_init:
  486. return ret;
  487. }
  488. static int __devexit pm800_remove(struct i2c_client *client)
  489. {
  490. struct pm80x_chip *chip = i2c_get_clientdata(client);
  491. mfd_remove_devices(chip->dev);
  492. device_irq_exit_800(chip);
  493. pm800_pages_exit(chip);
  494. devm_kfree(&client->dev, chip->subchip);
  495. pm80x_deinit(client);
  496. return 0;
  497. }
  498. static struct i2c_driver pm800_driver = {
  499. .driver = {
  500. .name = "88PM80X",
  501. .owner = THIS_MODULE,
  502. .pm = &pm80x_pm_ops,
  503. },
  504. .probe = pm800_probe,
  505. .remove = __devexit_p(pm800_remove),
  506. .id_table = pm80x_id_table,
  507. };
  508. static int __init pm800_i2c_init(void)
  509. {
  510. return i2c_add_driver(&pm800_driver);
  511. }
  512. subsys_initcall(pm800_i2c_init);
  513. static void __exit pm800_i2c_exit(void)
  514. {
  515. i2c_del_driver(&pm800_driver);
  516. }
  517. module_exit(pm800_i2c_exit);
  518. MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM800");
  519. MODULE_AUTHOR("Qiao Zhou <zhouqiao@marvell.com>");
  520. MODULE_LICENSE("GPL");