gpio-pcf857x.c 12 KB

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  1. /*
  2. * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
  3. *
  4. * Copyright (C) 2007 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/gpio.h>
  21. #include <linux/i2c.h>
  22. #include <linux/i2c/pcf857x.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/irqdomain.h>
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/slab.h>
  31. #include <linux/spinlock.h>
  32. static const struct i2c_device_id pcf857x_id[] = {
  33. { "pcf8574", 8 },
  34. { "pcf8574a", 8 },
  35. { "pca8574", 8 },
  36. { "pca9670", 8 },
  37. { "pca9672", 8 },
  38. { "pca9674", 8 },
  39. { "pcf8575", 16 },
  40. { "pca8575", 16 },
  41. { "pca9671", 16 },
  42. { "pca9673", 16 },
  43. { "pca9675", 16 },
  44. { "max7328", 8 },
  45. { "max7329", 8 },
  46. { "tca9554", 8 },
  47. { }
  48. };
  49. MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  50. #ifdef CONFIG_OF
  51. static const struct of_device_id pcf857x_of_table[] = {
  52. { .compatible = "nxp,pcf8574" },
  53. { .compatible = "nxp,pcf8574a" },
  54. { .compatible = "nxp,pca8574" },
  55. { .compatible = "nxp,pca9670" },
  56. { .compatible = "nxp,pca9672" },
  57. { .compatible = "nxp,pca9674" },
  58. { .compatible = "nxp,pcf8575" },
  59. { .compatible = "nxp,pca8575" },
  60. { .compatible = "nxp,pca9671" },
  61. { .compatible = "nxp,pca9673" },
  62. { .compatible = "nxp,pca9675" },
  63. { .compatible = "maxim,max7328" },
  64. { .compatible = "maxim,max7329" },
  65. { .compatible = "ti,tca9554" },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(of, pcf857x_of_table);
  69. #endif
  70. /*
  71. * The pcf857x, pca857x, and pca967x chips only expose one read and one
  72. * write register. Writing a "one" bit (to match the reset state) lets
  73. * that pin be used as an input; it's not an open-drain model, but acts
  74. * a bit like one. This is described as "quasi-bidirectional"; read the
  75. * chip documentation for details.
  76. *
  77. * Many other I2C GPIO expander chips (like the pca953x models) have
  78. * more complex register models and more conventional circuitry using
  79. * push/pull drivers. They often use the same 0x20..0x27 addresses as
  80. * pcf857x parts, making the "legacy" I2C driver model problematic.
  81. */
  82. struct pcf857x {
  83. struct gpio_chip chip;
  84. struct i2c_client *client;
  85. struct mutex lock; /* protect 'out' */
  86. struct irq_domain *irq_domain; /* for irq demux */
  87. spinlock_t slock; /* protect irq demux */
  88. unsigned out; /* software latch */
  89. unsigned status; /* current status */
  90. unsigned irq_mapped; /* mapped gpio irqs */
  91. int (*write)(struct i2c_client *client, unsigned data);
  92. int (*read)(struct i2c_client *client);
  93. };
  94. /*-------------------------------------------------------------------------*/
  95. /* Talk to 8-bit I/O expander */
  96. static int i2c_write_le8(struct i2c_client *client, unsigned data)
  97. {
  98. return i2c_smbus_write_byte(client, data);
  99. }
  100. static int i2c_read_le8(struct i2c_client *client)
  101. {
  102. return (int)i2c_smbus_read_byte(client);
  103. }
  104. /* Talk to 16-bit I/O expander */
  105. static int i2c_write_le16(struct i2c_client *client, unsigned word)
  106. {
  107. u8 buf[2] = { word & 0xff, word >> 8, };
  108. int status;
  109. status = i2c_master_send(client, buf, 2);
  110. return (status < 0) ? status : 0;
  111. }
  112. static int i2c_read_le16(struct i2c_client *client)
  113. {
  114. u8 buf[2];
  115. int status;
  116. status = i2c_master_recv(client, buf, 2);
  117. if (status < 0)
  118. return status;
  119. return (buf[1] << 8) | buf[0];
  120. }
  121. /*-------------------------------------------------------------------------*/
  122. static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
  123. {
  124. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  125. int status;
  126. mutex_lock(&gpio->lock);
  127. gpio->out |= (1 << offset);
  128. status = gpio->write(gpio->client, gpio->out);
  129. mutex_unlock(&gpio->lock);
  130. return status;
  131. }
  132. static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
  133. {
  134. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  135. int value;
  136. value = gpio->read(gpio->client);
  137. return (value < 0) ? 0 : (value & (1 << offset));
  138. }
  139. static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
  140. {
  141. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  142. unsigned bit = 1 << offset;
  143. int status;
  144. mutex_lock(&gpio->lock);
  145. if (value)
  146. gpio->out |= bit;
  147. else
  148. gpio->out &= ~bit;
  149. status = gpio->write(gpio->client, gpio->out);
  150. mutex_unlock(&gpio->lock);
  151. return status;
  152. }
  153. static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
  154. {
  155. pcf857x_output(chip, offset, value);
  156. }
  157. /*-------------------------------------------------------------------------*/
  158. static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
  159. {
  160. struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
  161. int ret;
  162. ret = irq_create_mapping(gpio->irq_domain, offset);
  163. if (ret > 0)
  164. gpio->irq_mapped |= (1 << offset);
  165. return ret;
  166. }
  167. static irqreturn_t pcf857x_irq(int irq, void *data)
  168. {
  169. struct pcf857x *gpio = data;
  170. unsigned long change, i, status, flags;
  171. status = gpio->read(gpio->client);
  172. spin_lock_irqsave(&gpio->slock, flags);
  173. /*
  174. * call the interrupt handler iff gpio is used as
  175. * interrupt source, just to avoid bad irqs
  176. */
  177. change = ((gpio->status ^ status) & gpio->irq_mapped);
  178. for_each_set_bit(i, &change, gpio->chip.ngpio)
  179. generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
  180. gpio->status = status;
  181. spin_unlock_irqrestore(&gpio->slock, flags);
  182. return IRQ_HANDLED;
  183. }
  184. static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int irq,
  185. irq_hw_number_t hw)
  186. {
  187. struct pcf857x *gpio = domain->host_data;
  188. irq_set_chip_and_handler(irq,
  189. &dummy_irq_chip,
  190. handle_level_irq);
  191. #ifdef CONFIG_ARM
  192. set_irq_flags(irq, IRQF_VALID);
  193. #else
  194. irq_set_noprobe(irq);
  195. #endif
  196. gpio->irq_mapped |= (1 << hw);
  197. return 0;
  198. }
  199. static struct irq_domain_ops pcf857x_irq_domain_ops = {
  200. .map = pcf857x_irq_domain_map,
  201. };
  202. static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
  203. {
  204. if (gpio->irq_domain)
  205. irq_domain_remove(gpio->irq_domain);
  206. }
  207. static int pcf857x_irq_domain_init(struct pcf857x *gpio,
  208. struct i2c_client *client)
  209. {
  210. int status;
  211. gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
  212. gpio->chip.ngpio,
  213. &pcf857x_irq_domain_ops,
  214. gpio);
  215. if (!gpio->irq_domain)
  216. goto fail;
  217. /* enable real irq */
  218. status = devm_request_threaded_irq(&client->dev, client->irq,
  219. NULL, pcf857x_irq, IRQF_ONESHOT |
  220. IRQF_TRIGGER_FALLING,
  221. dev_name(&client->dev), gpio);
  222. if (status)
  223. goto fail;
  224. /* enable gpio_to_irq() */
  225. gpio->chip.to_irq = pcf857x_to_irq;
  226. return 0;
  227. fail:
  228. pcf857x_irq_domain_cleanup(gpio);
  229. return -EINVAL;
  230. }
  231. /*-------------------------------------------------------------------------*/
  232. static int pcf857x_probe(struct i2c_client *client,
  233. const struct i2c_device_id *id)
  234. {
  235. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  236. struct device_node *np = client->dev.of_node;
  237. struct pcf857x *gpio;
  238. unsigned int n_latch = 0;
  239. int status;
  240. if (IS_ENABLED(CONFIG_OF) && np)
  241. of_property_read_u32(np, "lines-initial-states", &n_latch);
  242. else if (pdata)
  243. n_latch = pdata->n_latch;
  244. else
  245. dev_dbg(&client->dev, "no platform data\n");
  246. /* Allocate, initialize, and register this gpio_chip. */
  247. gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
  248. if (!gpio)
  249. return -ENOMEM;
  250. mutex_init(&gpio->lock);
  251. spin_lock_init(&gpio->slock);
  252. gpio->chip.base = pdata ? pdata->gpio_base : -1;
  253. gpio->chip.can_sleep = 1;
  254. gpio->chip.dev = &client->dev;
  255. gpio->chip.owner = THIS_MODULE;
  256. gpio->chip.get = pcf857x_get;
  257. gpio->chip.set = pcf857x_set;
  258. gpio->chip.direction_input = pcf857x_input;
  259. gpio->chip.direction_output = pcf857x_output;
  260. gpio->chip.ngpio = id->driver_data;
  261. /* enable gpio_to_irq() if platform has settings */
  262. if (client->irq) {
  263. status = pcf857x_irq_domain_init(gpio, client);
  264. if (status < 0) {
  265. dev_err(&client->dev, "irq_domain init failed\n");
  266. goto fail;
  267. }
  268. }
  269. /* NOTE: the OnSemi jlc1562b is also largely compatible with
  270. * these parts, notably for output. It has a low-resolution
  271. * DAC instead of pin change IRQs; and its inputs can be the
  272. * result of comparators.
  273. */
  274. /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
  275. * 9670, 9672, 9764, and 9764a use quite a variety.
  276. *
  277. * NOTE: we don't distinguish here between *4 and *4a parts.
  278. */
  279. if (gpio->chip.ngpio == 8) {
  280. gpio->write = i2c_write_le8;
  281. gpio->read = i2c_read_le8;
  282. if (!i2c_check_functionality(client->adapter,
  283. I2C_FUNC_SMBUS_BYTE))
  284. status = -EIO;
  285. /* fail if there's no chip present */
  286. else
  287. status = i2c_smbus_read_byte(client);
  288. /* '75/'75c addresses are 0x20..0x27, just like the '74;
  289. * the '75c doesn't have a current source pulling high.
  290. * 9671, 9673, and 9765 use quite a variety of addresses.
  291. *
  292. * NOTE: we don't distinguish here between '75 and '75c parts.
  293. */
  294. } else if (gpio->chip.ngpio == 16) {
  295. gpio->write = i2c_write_le16;
  296. gpio->read = i2c_read_le16;
  297. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  298. status = -EIO;
  299. /* fail if there's no chip present */
  300. else
  301. status = i2c_read_le16(client);
  302. } else {
  303. dev_dbg(&client->dev, "unsupported number of gpios\n");
  304. status = -EINVAL;
  305. }
  306. if (status < 0)
  307. goto fail;
  308. gpio->chip.label = client->name;
  309. gpio->client = client;
  310. i2c_set_clientdata(client, gpio);
  311. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  312. * We can't actually know whether a pin is configured (a) as output
  313. * and driving the signal low, or (b) as input and reporting a low
  314. * value ... without knowing the last value written since the chip
  315. * came out of reset (if any). We can't read the latched output.
  316. *
  317. * In short, the only reliable solution for setting up pin direction
  318. * is to do it explicitly. The setup() method can do that, but it
  319. * may cause transient glitching since it can't know the last value
  320. * written (some pins may need to be driven low).
  321. *
  322. * Using n_latch avoids that trouble. When left initialized to zero,
  323. * our software copy of the "latch" then matches the chip's all-ones
  324. * reset state. Otherwise it flags pins to be driven low.
  325. */
  326. gpio->out = ~n_latch;
  327. gpio->status = gpio->out;
  328. status = gpiochip_add(&gpio->chip);
  329. if (status < 0)
  330. goto fail;
  331. /* Let platform code set up the GPIOs and their users.
  332. * Now is the first time anyone could use them.
  333. */
  334. if (pdata && pdata->setup) {
  335. status = pdata->setup(client,
  336. gpio->chip.base, gpio->chip.ngpio,
  337. pdata->context);
  338. if (status < 0)
  339. dev_warn(&client->dev, "setup --> %d\n", status);
  340. }
  341. dev_info(&client->dev, "probed\n");
  342. return 0;
  343. fail:
  344. dev_dbg(&client->dev, "probe error %d for '%s'\n",
  345. status, client->name);
  346. if (client->irq)
  347. pcf857x_irq_domain_cleanup(gpio);
  348. return status;
  349. }
  350. static int pcf857x_remove(struct i2c_client *client)
  351. {
  352. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  353. struct pcf857x *gpio = i2c_get_clientdata(client);
  354. int status = 0;
  355. if (pdata && pdata->teardown) {
  356. status = pdata->teardown(client,
  357. gpio->chip.base, gpio->chip.ngpio,
  358. pdata->context);
  359. if (status < 0) {
  360. dev_err(&client->dev, "%s --> %d\n",
  361. "teardown", status);
  362. return status;
  363. }
  364. }
  365. if (client->irq)
  366. pcf857x_irq_domain_cleanup(gpio);
  367. status = gpiochip_remove(&gpio->chip);
  368. if (status)
  369. dev_err(&client->dev, "%s --> %d\n", "remove", status);
  370. return status;
  371. }
  372. static struct i2c_driver pcf857x_driver = {
  373. .driver = {
  374. .name = "pcf857x",
  375. .owner = THIS_MODULE,
  376. .of_match_table = of_match_ptr(pcf857x_of_table),
  377. },
  378. .probe = pcf857x_probe,
  379. .remove = pcf857x_remove,
  380. .id_table = pcf857x_id,
  381. };
  382. static int __init pcf857x_init(void)
  383. {
  384. return i2c_add_driver(&pcf857x_driver);
  385. }
  386. /* register after i2c postcore initcall and before
  387. * subsys initcalls that may rely on these GPIOs
  388. */
  389. subsys_initcall(pcf857x_init);
  390. static void __exit pcf857x_exit(void)
  391. {
  392. i2c_del_driver(&pcf857x_driver);
  393. }
  394. module_exit(pcf857x_exit);
  395. MODULE_LICENSE("GPL");
  396. MODULE_AUTHOR("David Brownell");