mach-exynos5-dt.c 4.8 KB

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  1. /*
  2. * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/of_platform.h>
  12. #include <linux/serial_core.h>
  13. #include <linux/io.h>
  14. #include <asm/mach/arch.h>
  15. #include <asm/hardware/gic.h>
  16. #include <mach/map.h>
  17. #include <mach/regs-pmu.h>
  18. #include <plat/cpu.h>
  19. #include <plat/regs-serial.h>
  20. #include "common.h"
  21. /*
  22. * The following lookup table is used to override device names when devices
  23. * are registered from device tree. This is temporarily added to enable
  24. * device tree support addition for the EXYNOS5 architecture.
  25. *
  26. * For drivers that require platform data to be provided from the machine
  27. * file, a platform data pointer can also be supplied along with the
  28. * devices names. Usually, the platform data elements that cannot be parsed
  29. * from the device tree by the drivers (example: function pointers) are
  30. * supplied. But it should be noted that this is a temporary mechanism and
  31. * at some point, the drivers should be capable of parsing all the platform
  32. * data from the device tree.
  33. */
  34. static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
  35. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
  36. "exynos4210-uart.0", NULL),
  37. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
  38. "exynos4210-uart.1", NULL),
  39. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
  40. "exynos4210-uart.2", NULL),
  41. OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
  42. "exynos4210-uart.3", NULL),
  43. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
  44. "s3c2440-i2c.0", NULL),
  45. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
  46. "s3c2440-i2c.1", NULL),
  47. OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
  48. "s3c2440-i2c.2", NULL),
  49. OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
  50. "s3c2440-hdmiphy-i2c", NULL),
  51. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
  52. "dw_mmc.0", NULL),
  53. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
  54. "dw_mmc.1", NULL),
  55. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
  56. "dw_mmc.2", NULL),
  57. OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
  58. "dw_mmc.3", NULL),
  59. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
  60. "exynos4210-spi.0", NULL),
  61. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
  62. "exynos4210-spi.1", NULL),
  63. OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
  64. "exynos4210-spi.2", NULL),
  65. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
  66. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
  67. OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
  68. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
  69. "exynos-gsc.0", NULL),
  70. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
  71. "exynos-gsc.1", NULL),
  72. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
  73. "exynos-gsc.2", NULL),
  74. OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
  75. "exynos-gsc.3", NULL),
  76. OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
  77. "exynos5-hdmi", NULL),
  78. OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
  79. "exynos5-mixer", NULL),
  80. {},
  81. };
  82. static void __init exynos5250_dt_map_io(void)
  83. {
  84. exynos_init_io(NULL, 0);
  85. s3c24xx_init_clocks(24000000);
  86. }
  87. static void __init exynos5250_dt_machine_init(void)
  88. {
  89. struct device_node *i2c_np;
  90. const char *i2c_compat = "samsung,s3c2440-i2c";
  91. unsigned int tmp;
  92. /*
  93. * Exynos5's legacy i2c controller and new high speed i2c
  94. * controller have muxed interrupt sources. By default the
  95. * interrupts for 4-channel HS-I2C controller are enabled.
  96. * If node for first four channels of legacy i2c controller
  97. * are available then re-configure the interrupts via the
  98. * system register.
  99. */
  100. for_each_compatible_node(i2c_np, NULL, i2c_compat) {
  101. if (of_device_is_available(i2c_np)) {
  102. if (of_alias_get_id(i2c_np, "i2c") < 4) {
  103. tmp = readl(EXYNOS5_SYS_I2C_CFG);
  104. writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
  105. EXYNOS5_SYS_I2C_CFG);
  106. }
  107. }
  108. }
  109. of_platform_populate(NULL, of_default_bus_match_table,
  110. exynos5250_auxdata_lookup, NULL);
  111. }
  112. static char const *exynos5250_dt_compat[] __initdata = {
  113. "samsung,exynos5250",
  114. NULL
  115. };
  116. DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
  117. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  118. .init_irq = exynos5_init_irq,
  119. .smp = smp_ops(exynos_smp_ops),
  120. .map_io = exynos5250_dt_map_io,
  121. .handle_irq = gic_handle_irq,
  122. .init_machine = exynos5250_dt_machine_init,
  123. .init_late = exynos_init_late,
  124. .timer = &exynos4_timer,
  125. .dt_compat = exynos5250_dt_compat,
  126. .restart = exynos5_restart,
  127. MACHINE_END