cx23885.h 16 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/i2c.h>
  23. #include <linux/i2c-algo-bit.h>
  24. #include <linux/kdev_t.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/tuner.h>
  27. #include <media/tveeprom.h>
  28. #include <media/videobuf-dma-sg.h>
  29. #include <media/videobuf-dvb.h>
  30. #include "btcx-risc.h"
  31. #include "cx23885-reg.h"
  32. #include "media/cx2341x.h"
  33. #include <linux/version.h>
  34. #include <linux/mutex.h>
  35. #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
  36. #define UNSET (-1U)
  37. #define CX23885_MAXBOARDS 8
  38. /* Max number of inputs by card */
  39. #define MAX_CX23885_INPUT 8
  40. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  41. #define RESOURCE_OVERLAY 1
  42. #define RESOURCE_VIDEO 2
  43. #define RESOURCE_VBI 4
  44. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  45. #define CX23885_BOARD_NOAUTO UNSET
  46. #define CX23885_BOARD_UNKNOWN 0
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  50. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  51. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  52. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  53. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  54. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  55. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  56. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  57. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  58. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  59. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  60. #define CX23885_BOARD_TBS_6920 14
  61. #define CX23885_BOARD_TEVII_S470 15
  62. #define CX23885_BOARD_DVBWORLD_2005 16
  63. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  64. #define GPIO_0 0x00000001
  65. #define GPIO_1 0x00000002
  66. #define GPIO_2 0x00000004
  67. #define GPIO_3 0x00000008
  68. #define GPIO_4 0x00000010
  69. #define GPIO_5 0x00000020
  70. #define GPIO_6 0x00000040
  71. #define GPIO_7 0x00000080
  72. #define GPIO_8 0x00000100
  73. #define GPIO_9 0x00000200
  74. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  75. #define CX23885_NORMS (\
  76. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  77. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  78. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  79. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  80. struct cx23885_fmt {
  81. char *name;
  82. u32 fourcc; /* v4l2 format id */
  83. int depth;
  84. int flags;
  85. u32 cxformat;
  86. };
  87. struct cx23885_ctrl {
  88. struct v4l2_queryctrl v;
  89. u32 off;
  90. u32 reg;
  91. u32 mask;
  92. u32 shift;
  93. };
  94. struct cx23885_tvnorm {
  95. char *name;
  96. v4l2_std_id id;
  97. u32 cxiformat;
  98. u32 cxoformat;
  99. };
  100. struct cx23885_fh {
  101. struct cx23885_dev *dev;
  102. enum v4l2_buf_type type;
  103. int radio;
  104. u32 resources;
  105. /* video overlay */
  106. struct v4l2_window win;
  107. struct v4l2_clip *clips;
  108. unsigned int nclips;
  109. /* video capture */
  110. struct cx23885_fmt *fmt;
  111. unsigned int width, height;
  112. /* vbi capture */
  113. struct videobuf_queue vidq;
  114. struct videobuf_queue vbiq;
  115. /* MPEG Encoder specifics ONLY */
  116. struct videobuf_queue mpegq;
  117. atomic_t v4l_reading;
  118. };
  119. enum cx23885_itype {
  120. CX23885_VMUX_COMPOSITE1 = 1,
  121. CX23885_VMUX_COMPOSITE2,
  122. CX23885_VMUX_COMPOSITE3,
  123. CX23885_VMUX_COMPOSITE4,
  124. CX23885_VMUX_SVIDEO,
  125. CX23885_VMUX_TELEVISION,
  126. CX23885_VMUX_CABLE,
  127. CX23885_VMUX_DVB,
  128. CX23885_VMUX_DEBUG,
  129. CX23885_RADIO,
  130. };
  131. enum cx23885_src_sel_type {
  132. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  133. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  134. };
  135. /* buffer for one video frame */
  136. struct cx23885_buffer {
  137. /* common v4l buffer stuff -- must be first */
  138. struct videobuf_buffer vb;
  139. /* cx23885 specific */
  140. unsigned int bpl;
  141. struct btcx_riscmem risc;
  142. struct cx23885_fmt *fmt;
  143. u32 count;
  144. };
  145. struct cx23885_input {
  146. enum cx23885_itype type;
  147. unsigned int vmux;
  148. u32 gpio0, gpio1, gpio2, gpio3;
  149. };
  150. typedef enum {
  151. CX23885_MPEG_UNDEFINED = 0,
  152. CX23885_MPEG_DVB,
  153. CX23885_ANALOG_VIDEO,
  154. CX23885_MPEG_ENCODER,
  155. } port_t;
  156. struct cx23885_board {
  157. char *name;
  158. port_t porta, portb, portc;
  159. unsigned int tuner_type;
  160. unsigned int radio_type;
  161. unsigned char tuner_addr;
  162. unsigned char radio_addr;
  163. /* Vendors can and do run the PCIe bridge at different
  164. * clock rates, driven physically by crystals on the PCBs.
  165. * The core has to accomodate this. This allows the user
  166. * to add new boards with new frequencys. The value is
  167. * expressed in Hz.
  168. *
  169. * The core framework will default this value based on
  170. * current designs, but it can vary.
  171. */
  172. u32 clk_freq;
  173. struct cx23885_input input[MAX_CX23885_INPUT];
  174. int cimax; /* for NetUP */
  175. };
  176. struct cx23885_subid {
  177. u16 subvendor;
  178. u16 subdevice;
  179. u32 card;
  180. };
  181. struct cx23885_i2c {
  182. struct cx23885_dev *dev;
  183. int nr;
  184. /* i2c i/o */
  185. struct i2c_adapter i2c_adap;
  186. struct i2c_algo_bit_data i2c_algo;
  187. struct i2c_client i2c_client;
  188. u32 i2c_rc;
  189. /* 885 registers used for raw addess */
  190. u32 i2c_period;
  191. u32 reg_ctrl;
  192. u32 reg_stat;
  193. u32 reg_addr;
  194. u32 reg_rdata;
  195. u32 reg_wdata;
  196. };
  197. struct cx23885_dmaqueue {
  198. struct list_head active;
  199. struct list_head queued;
  200. struct timer_list timeout;
  201. struct btcx_riscmem stopper;
  202. u32 count;
  203. };
  204. struct cx23885_tsport {
  205. struct cx23885_dev *dev;
  206. int nr;
  207. int sram_chno;
  208. struct videobuf_dvb_frontends frontends;
  209. /* dma queues */
  210. struct cx23885_dmaqueue mpegq;
  211. u32 ts_packet_size;
  212. u32 ts_packet_count;
  213. int width;
  214. int height;
  215. spinlock_t slock;
  216. /* registers */
  217. u32 reg_gpcnt;
  218. u32 reg_gpcnt_ctl;
  219. u32 reg_dma_ctl;
  220. u32 reg_lngth;
  221. u32 reg_hw_sop_ctrl;
  222. u32 reg_gen_ctrl;
  223. u32 reg_bd_pkt_status;
  224. u32 reg_sop_status;
  225. u32 reg_fifo_ovfl_stat;
  226. u32 reg_vld_misc;
  227. u32 reg_ts_clk_en;
  228. u32 reg_ts_int_msk;
  229. u32 reg_ts_int_stat;
  230. u32 reg_src_sel;
  231. /* Default register vals */
  232. int pci_irqmask;
  233. u32 dma_ctl_val;
  234. u32 ts_int_msk_val;
  235. u32 gen_ctrl_val;
  236. u32 ts_clk_en_val;
  237. u32 src_sel_val;
  238. u32 vld_misc_val;
  239. u32 hw_sop_ctrl_val;
  240. /* Allow a single tsport to have multiple frontends */
  241. u32 num_frontends;
  242. void *port_priv;
  243. };
  244. struct cx23885_dev {
  245. struct list_head devlist;
  246. atomic_t refcount;
  247. struct v4l2_device v4l2_dev;
  248. /* pci stuff */
  249. struct pci_dev *pci;
  250. unsigned char pci_rev, pci_lat;
  251. int pci_bus, pci_slot;
  252. u32 __iomem *lmmio;
  253. u8 __iomem *bmmio;
  254. int pci_irqmask;
  255. int hwrevision;
  256. /* This valud is board specific and is used to configure the
  257. * AV core so we see nice clean and stable video and audio. */
  258. u32 clk_freq;
  259. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  260. struct cx23885_i2c i2c_bus[3];
  261. int nr;
  262. struct mutex lock;
  263. /* board details */
  264. unsigned int board;
  265. char name[32];
  266. struct cx23885_tsport ts1, ts2;
  267. /* sram configuration */
  268. struct sram_channel *sram_channels;
  269. enum {
  270. CX23885_BRIDGE_UNDEFINED = 0,
  271. CX23885_BRIDGE_885 = 885,
  272. CX23885_BRIDGE_887 = 887,
  273. } bridge;
  274. /* Analog video */
  275. u32 resources;
  276. unsigned int input;
  277. u32 tvaudio;
  278. v4l2_std_id tvnorm;
  279. unsigned int tuner_type;
  280. unsigned char tuner_addr;
  281. unsigned int radio_type;
  282. unsigned char radio_addr;
  283. unsigned int has_radio;
  284. struct v4l2_subdev *sd_cx25840;
  285. /* V4l */
  286. u32 freq;
  287. struct video_device *video_dev;
  288. struct video_device *vbi_dev;
  289. struct video_device *radio_dev;
  290. struct cx23885_dmaqueue vidq;
  291. struct cx23885_dmaqueue vbiq;
  292. spinlock_t slock;
  293. /* MPEG Encoder ONLY settings */
  294. u32 cx23417_mailbox;
  295. struct cx2341x_mpeg_params mpeg_params;
  296. struct video_device *v4l_device;
  297. atomic_t v4l_reader_count;
  298. struct cx23885_tvnorm encodernorm;
  299. };
  300. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  301. {
  302. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  303. }
  304. #define call_all(dev, o, f, args...) \
  305. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  306. extern struct list_head cx23885_devlist;
  307. #define SRAM_CH01 0 /* Video A */
  308. #define SRAM_CH02 1 /* VBI A */
  309. #define SRAM_CH03 2 /* Video B */
  310. #define SRAM_CH04 3 /* Transport via B */
  311. #define SRAM_CH05 4 /* VBI B */
  312. #define SRAM_CH06 5 /* Video C */
  313. #define SRAM_CH07 6 /* Transport via C */
  314. #define SRAM_CH08 7 /* Audio Internal A */
  315. #define SRAM_CH09 8 /* Audio Internal B */
  316. #define SRAM_CH10 9 /* Audio External */
  317. #define SRAM_CH11 10 /* COMB_3D_N */
  318. #define SRAM_CH12 11 /* Comb 3D N1 */
  319. #define SRAM_CH13 12 /* Comb 3D N2 */
  320. #define SRAM_CH14 13 /* MOE Vid */
  321. #define SRAM_CH15 14 /* MOE RSLT */
  322. struct sram_channel {
  323. char *name;
  324. u32 cmds_start;
  325. u32 ctrl_start;
  326. u32 cdt;
  327. u32 fifo_start;;
  328. u32 fifo_size;
  329. u32 ptr1_reg;
  330. u32 ptr2_reg;
  331. u32 cnt1_reg;
  332. u32 cnt2_reg;
  333. u32 jumponly;
  334. };
  335. /* ----------------------------------------------------------- */
  336. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  337. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  338. #define cx_andor(reg, mask, value) \
  339. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  340. ((value) & (mask)), dev->lmmio+((reg)>>2))
  341. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  342. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  343. /* ----------------------------------------------------------- */
  344. /* cx23885-core.c */
  345. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  346. struct sram_channel *ch,
  347. unsigned int bpl, u32 risc);
  348. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  349. struct sram_channel *ch);
  350. extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
  351. u32 reg, u32 mask, u32 value);
  352. extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
  353. struct scatterlist *sglist,
  354. unsigned int top_offset, unsigned int bottom_offset,
  355. unsigned int bpl, unsigned int padding, unsigned int lines);
  356. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  357. extern int cx23885_restart_queue(struct cx23885_tsport *port,
  358. struct cx23885_dmaqueue *q);
  359. extern void cx23885_wakeup(struct cx23885_tsport *port,
  360. struct cx23885_dmaqueue *q, u32 count);
  361. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  362. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  363. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  364. int asoutput);
  365. /* ----------------------------------------------------------- */
  366. /* cx23885-cards.c */
  367. extern struct cx23885_board cx23885_boards[];
  368. extern const unsigned int cx23885_bcount;
  369. extern struct cx23885_subid cx23885_subids[];
  370. extern const unsigned int cx23885_idcount;
  371. extern int cx23885_tuner_callback(void *priv, int component,
  372. int command, int arg);
  373. extern void cx23885_card_list(struct cx23885_dev *dev);
  374. extern int cx23885_ir_init(struct cx23885_dev *dev);
  375. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  376. extern void cx23885_card_setup(struct cx23885_dev *dev);
  377. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  378. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  379. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  380. extern int cx23885_buf_prepare(struct videobuf_queue *q,
  381. struct cx23885_tsport *port,
  382. struct cx23885_buffer *buf,
  383. enum v4l2_field field);
  384. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  385. struct cx23885_buffer *buf);
  386. extern void cx23885_free_buffer(struct videobuf_queue *q,
  387. struct cx23885_buffer *buf);
  388. /* ----------------------------------------------------------- */
  389. /* cx23885-video.c */
  390. /* Video */
  391. extern int cx23885_video_register(struct cx23885_dev *dev);
  392. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  393. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  394. /* ----------------------------------------------------------- */
  395. /* cx23885-vbi.c */
  396. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  397. struct v4l2_format *f);
  398. extern void cx23885_vbi_timeout(unsigned long data);
  399. extern struct videobuf_queue_ops cx23885_vbi_qops;
  400. /* cx23885-i2c.c */
  401. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  402. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  403. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  404. /* ----------------------------------------------------------- */
  405. /* cx23885-417.c */
  406. extern int cx23885_417_register(struct cx23885_dev *dev);
  407. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  408. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  409. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  410. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  411. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  412. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  413. /* ----------------------------------------------------------- */
  414. /* tv norms */
  415. static inline unsigned int norm_maxw(v4l2_std_id norm)
  416. {
  417. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
  418. }
  419. static inline unsigned int norm_maxh(v4l2_std_id norm)
  420. {
  421. return (norm & V4L2_STD_625_50) ? 576 : 480;
  422. }
  423. static inline unsigned int norm_swidth(v4l2_std_id norm)
  424. {
  425. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
  426. }