nouveau_drv.c 13 KB

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  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include "drmP.h"
  26. #include "drm.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_fb.h"
  31. #include "nouveau_fbcon.h"
  32. #include "nv50_display.h"
  33. #include "drm_pciids.h"
  34. MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
  35. int nouveau_agpmode = -1;
  36. module_param_named(agpmode, nouveau_agpmode, int, 0400);
  37. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  38. static int nouveau_modeset = -1; /* kms */
  39. module_param_named(modeset, nouveau_modeset, int, 0400);
  40. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  41. char *nouveau_vbios;
  42. module_param_named(vbios, nouveau_vbios, charp, 0400);
  43. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  44. int nouveau_vram_pushbuf;
  45. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  46. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  47. int nouveau_vram_notify = 0;
  48. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  49. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  50. int nouveau_duallink = 1;
  51. module_param_named(duallink, nouveau_duallink, int, 0400);
  52. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  53. int nouveau_uscript_lvds = -1;
  54. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  55. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  56. int nouveau_uscript_tmds = -1;
  57. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  58. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  59. int nouveau_ignorelid = 0;
  60. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  61. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  62. int nouveau_noaccel = 0;
  63. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  64. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  65. int nouveau_nofbaccel = 0;
  66. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  67. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  68. int nouveau_override_conntype = 0;
  69. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  70. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  71. int nouveau_tv_disable = 0;
  72. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  73. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  74. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  75. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  76. "\t\tDefault: PAL\n"
  77. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  78. char *nouveau_tv_norm;
  79. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  80. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  81. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  82. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  83. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  84. int nouveau_reg_debug;
  85. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  86. MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
  87. char *nouveau_perflvl;
  88. module_param_named(perflvl, nouveau_perflvl, charp, 0400);
  89. MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
  90. int nouveau_perflvl_wr;
  91. module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
  92. int nouveau_fbpercrtc;
  93. #if 0
  94. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  95. #endif
  96. static struct pci_device_id pciidlist[] = {
  97. {
  98. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  99. .class = PCI_BASE_CLASS_DISPLAY << 16,
  100. .class_mask = 0xff << 16,
  101. },
  102. {
  103. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  104. .class = PCI_BASE_CLASS_DISPLAY << 16,
  105. .class_mask = 0xff << 16,
  106. },
  107. {}
  108. };
  109. MODULE_DEVICE_TABLE(pci, pciidlist);
  110. static struct drm_driver driver;
  111. static int __devinit
  112. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  113. {
  114. return drm_get_pci_dev(pdev, ent, &driver);
  115. }
  116. static void
  117. nouveau_pci_remove(struct pci_dev *pdev)
  118. {
  119. struct drm_device *dev = pci_get_drvdata(pdev);
  120. drm_put_dev(dev);
  121. }
  122. int
  123. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  124. {
  125. struct drm_device *dev = pci_get_drvdata(pdev);
  126. struct drm_nouveau_private *dev_priv = dev->dev_private;
  127. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  128. struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
  129. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  130. struct nouveau_channel *chan;
  131. struct drm_crtc *crtc;
  132. int ret, i;
  133. if (pm_state.event == PM_EVENT_PRETHAW)
  134. return 0;
  135. NV_INFO(dev, "Disabling fbcon acceleration...\n");
  136. nouveau_fbcon_save_disable_accel(dev);
  137. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  138. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  139. struct nouveau_framebuffer *nouveau_fb;
  140. nouveau_fb = nouveau_framebuffer(crtc->fb);
  141. if (!nouveau_fb || !nouveau_fb->nvbo)
  142. continue;
  143. nouveau_bo_unpin(nouveau_fb->nvbo);
  144. }
  145. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  146. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  147. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  148. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  149. }
  150. NV_INFO(dev, "Evicting buffers...\n");
  151. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  152. NV_INFO(dev, "Idling channels...\n");
  153. for (i = 0; i < pfifo->channels; i++) {
  154. struct nouveau_fence *fence = NULL;
  155. chan = dev_priv->fifos[i];
  156. if (!chan || (dev_priv->card_type >= NV_50 &&
  157. chan == dev_priv->fifos[0]))
  158. continue;
  159. ret = nouveau_fence_new(chan, &fence, true);
  160. if (ret == 0) {
  161. ret = nouveau_fence_wait(fence, NULL, false, false);
  162. nouveau_fence_unref((void *)&fence);
  163. }
  164. if (ret) {
  165. NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
  166. chan->id);
  167. }
  168. }
  169. pgraph->fifo_access(dev, false);
  170. nouveau_wait_for_idle(dev);
  171. pfifo->reassign(dev, false);
  172. pfifo->disable(dev);
  173. pfifo->unload_context(dev);
  174. pgraph->unload_context(dev);
  175. NV_INFO(dev, "Suspending GPU objects...\n");
  176. ret = nouveau_gpuobj_suspend(dev);
  177. if (ret) {
  178. NV_ERROR(dev, "... failed: %d\n", ret);
  179. goto out_abort;
  180. }
  181. ret = pinstmem->suspend(dev);
  182. if (ret) {
  183. NV_ERROR(dev, "... failed: %d\n", ret);
  184. nouveau_gpuobj_suspend_cleanup(dev);
  185. goto out_abort;
  186. }
  187. NV_INFO(dev, "And we're gone!\n");
  188. pci_save_state(pdev);
  189. if (pm_state.event == PM_EVENT_SUSPEND) {
  190. pci_disable_device(pdev);
  191. pci_set_power_state(pdev, PCI_D3hot);
  192. }
  193. acquire_console_sem();
  194. nouveau_fbcon_set_suspend(dev, 1);
  195. release_console_sem();
  196. nouveau_fbcon_restore_accel(dev);
  197. return 0;
  198. out_abort:
  199. NV_INFO(dev, "Re-enabling acceleration..\n");
  200. pfifo->enable(dev);
  201. pfifo->reassign(dev, true);
  202. pgraph->fifo_access(dev, true);
  203. return ret;
  204. }
  205. int
  206. nouveau_pci_resume(struct pci_dev *pdev)
  207. {
  208. struct drm_device *dev = pci_get_drvdata(pdev);
  209. struct drm_nouveau_private *dev_priv = dev->dev_private;
  210. struct nouveau_engine *engine = &dev_priv->engine;
  211. struct drm_crtc *crtc;
  212. int ret, i;
  213. nouveau_fbcon_save_disable_accel(dev);
  214. NV_INFO(dev, "We're back, enabling device...\n");
  215. pci_set_power_state(pdev, PCI_D0);
  216. pci_restore_state(pdev);
  217. if (pci_enable_device(pdev))
  218. return -1;
  219. pci_set_master(dev->pdev);
  220. /* Make sure the AGP controller is in a consistent state */
  221. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
  222. nouveau_mem_reset_agp(dev);
  223. /* Make the CRTCs accessible */
  224. engine->display.early_init(dev);
  225. NV_INFO(dev, "POSTing device...\n");
  226. ret = nouveau_run_vbios_init(dev);
  227. if (ret)
  228. return ret;
  229. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  230. ret = nouveau_mem_init_agp(dev);
  231. if (ret) {
  232. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  233. return ret;
  234. }
  235. }
  236. NV_INFO(dev, "Reinitialising engines...\n");
  237. engine->instmem.resume(dev);
  238. engine->mc.init(dev);
  239. engine->timer.init(dev);
  240. engine->fb.init(dev);
  241. engine->graph.init(dev);
  242. engine->fifo.init(dev);
  243. NV_INFO(dev, "Restoring GPU objects...\n");
  244. nouveau_gpuobj_resume(dev);
  245. nouveau_irq_postinstall(dev);
  246. /* Re-write SKIPS, they'll have been lost over the suspend */
  247. if (nouveau_vram_pushbuf) {
  248. struct nouveau_channel *chan;
  249. int j;
  250. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  251. chan = dev_priv->fifos[i];
  252. if (!chan || !chan->pushbuf_bo)
  253. continue;
  254. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  255. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  256. }
  257. }
  258. NV_INFO(dev, "Restoring mode...\n");
  259. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  260. struct nouveau_framebuffer *nouveau_fb;
  261. nouveau_fb = nouveau_framebuffer(crtc->fb);
  262. if (!nouveau_fb || !nouveau_fb->nvbo)
  263. continue;
  264. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  265. }
  266. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  267. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  268. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  269. if (!ret)
  270. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  271. if (ret)
  272. NV_ERROR(dev, "Could not pin/map cursor.\n");
  273. }
  274. engine->display.init(dev);
  275. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  276. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  277. nv_crtc->cursor.set_offset(nv_crtc,
  278. nv_crtc->cursor.nvbo->bo.offset -
  279. dev_priv->vm_vram_base);
  280. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  281. nv_crtc->cursor_saved_y);
  282. }
  283. /* Force CLUT to get re-loaded during modeset */
  284. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  285. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  286. nv_crtc->lut.depth = 0;
  287. }
  288. acquire_console_sem();
  289. nouveau_fbcon_set_suspend(dev, 0);
  290. release_console_sem();
  291. nouveau_fbcon_zfill_all(dev);
  292. drm_helper_resume_force_mode(dev);
  293. nouveau_fbcon_restore_accel(dev);
  294. return 0;
  295. }
  296. static struct drm_driver driver = {
  297. .driver_features =
  298. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  299. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  300. DRIVER_MODESET,
  301. .load = nouveau_load,
  302. .firstopen = nouveau_firstopen,
  303. .lastclose = nouveau_lastclose,
  304. .unload = nouveau_unload,
  305. .preclose = nouveau_preclose,
  306. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  307. .debugfs_init = nouveau_debugfs_init,
  308. .debugfs_cleanup = nouveau_debugfs_takedown,
  309. #endif
  310. .irq_preinstall = nouveau_irq_preinstall,
  311. .irq_postinstall = nouveau_irq_postinstall,
  312. .irq_uninstall = nouveau_irq_uninstall,
  313. .irq_handler = nouveau_irq_handler,
  314. .reclaim_buffers = drm_core_reclaim_buffers,
  315. .ioctls = nouveau_ioctls,
  316. .fops = {
  317. .owner = THIS_MODULE,
  318. .open = drm_open,
  319. .release = drm_release,
  320. .unlocked_ioctl = drm_ioctl,
  321. .mmap = nouveau_ttm_mmap,
  322. .poll = drm_poll,
  323. .fasync = drm_fasync,
  324. #if defined(CONFIG_COMPAT)
  325. .compat_ioctl = nouveau_compat_ioctl,
  326. #endif
  327. },
  328. .pci_driver = {
  329. .name = DRIVER_NAME,
  330. .id_table = pciidlist,
  331. .probe = nouveau_pci_probe,
  332. .remove = nouveau_pci_remove,
  333. .suspend = nouveau_pci_suspend,
  334. .resume = nouveau_pci_resume
  335. },
  336. .gem_init_object = nouveau_gem_object_new,
  337. .gem_free_object = nouveau_gem_object_del,
  338. .name = DRIVER_NAME,
  339. .desc = DRIVER_DESC,
  340. #ifdef GIT_REVISION
  341. .date = GIT_REVISION,
  342. #else
  343. .date = DRIVER_DATE,
  344. #endif
  345. .major = DRIVER_MAJOR,
  346. .minor = DRIVER_MINOR,
  347. .patchlevel = DRIVER_PATCHLEVEL,
  348. };
  349. static int __init nouveau_init(void)
  350. {
  351. driver.num_ioctls = nouveau_max_ioctl;
  352. if (nouveau_modeset == -1) {
  353. #ifdef CONFIG_VGA_CONSOLE
  354. if (vgacon_text_force())
  355. nouveau_modeset = 0;
  356. else
  357. #endif
  358. nouveau_modeset = 1;
  359. }
  360. if (!nouveau_modeset)
  361. return 0;
  362. nouveau_register_dsm_handler();
  363. return drm_init(&driver);
  364. }
  365. static void __exit nouveau_exit(void)
  366. {
  367. if (!nouveau_modeset)
  368. return;
  369. drm_exit(&driver);
  370. nouveau_unregister_dsm_handler();
  371. }
  372. module_init(nouveau_init);
  373. module_exit(nouveau_exit);
  374. MODULE_AUTHOR(DRIVER_AUTHOR);
  375. MODULE_DESCRIPTION(DRIVER_DESC);
  376. MODULE_LICENSE("GPL and additional rights");