iwl4965-base.c 254 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.26k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, enum ieee80211_band band)
  102. {
  103. return priv->hw->wiphy->bands[band];
  104. }
  105. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  106. {
  107. /* Single white space is for Linksys APs */
  108. if (essid_len == 1 && essid[0] == ' ')
  109. return 1;
  110. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  111. while (essid_len) {
  112. essid_len--;
  113. if (essid[essid_len] != '\0')
  114. return 0;
  115. }
  116. return 1;
  117. }
  118. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  119. {
  120. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  121. const char *s = essid;
  122. char *d = escaped;
  123. if (iwl4965_is_empty_essid(essid, essid_len)) {
  124. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  125. return escaped;
  126. }
  127. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  128. while (essid_len--) {
  129. if (*s == '\0') {
  130. *d++ = '\\';
  131. *d++ = '0';
  132. s++;
  133. } else
  134. *d++ = *s++;
  135. }
  136. *d = '\0';
  137. return escaped;
  138. }
  139. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  140. * DMA services
  141. *
  142. * Theory of operation
  143. *
  144. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  145. * of buffer descriptors, each of which points to one or more data buffers for
  146. * the device to read from or fill. Driver and device exchange status of each
  147. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  148. * entries in each circular buffer, to protect against confusing empty and full
  149. * queue states.
  150. *
  151. * The device reads or writes the data in the queues via the device's several
  152. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  153. *
  154. * For Tx queue, there are low mark and high mark limits. If, after queuing
  155. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  156. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  157. * Tx queue resumed.
  158. *
  159. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  160. * queue (#4) for sending commands to the device firmware, and 15 other
  161. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  162. *
  163. * See more detailed info in iwl-4965-hw.h.
  164. ***************************************************/
  165. int iwl4965_queue_space(const struct iwl4965_queue *q)
  166. {
  167. int s = q->read_ptr - q->write_ptr;
  168. if (q->read_ptr > q->write_ptr)
  169. s -= q->n_bd;
  170. if (s <= 0)
  171. s += q->n_window;
  172. /* keep some reserve to not confuse empty and full situations */
  173. s -= 2;
  174. if (s < 0)
  175. s = 0;
  176. return s;
  177. }
  178. /**
  179. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  180. * @index -- current index
  181. * @n_bd -- total number of entries in queue (must be power of 2)
  182. */
  183. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  184. {
  185. return ++index & (n_bd - 1);
  186. }
  187. /**
  188. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  189. * @index -- current index
  190. * @n_bd -- total number of entries in queue (must be power of 2)
  191. */
  192. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  193. {
  194. return --index & (n_bd - 1);
  195. }
  196. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  197. {
  198. return q->write_ptr > q->read_ptr ?
  199. (i >= q->read_ptr && i < q->write_ptr) :
  200. !(i < q->read_ptr && i >= q->write_ptr);
  201. }
  202. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  203. {
  204. /* This is for scan command, the big buffer at end of command array */
  205. if (is_huge)
  206. return q->n_window; /* must be power of 2 */
  207. /* Otherwise, use normal size buffers */
  208. return index & (q->n_window - 1);
  209. }
  210. /**
  211. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  212. */
  213. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  214. int count, int slots_num, u32 id)
  215. {
  216. q->n_bd = count;
  217. q->n_window = slots_num;
  218. q->id = id;
  219. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  220. * and iwl4965_queue_dec_wrap are broken. */
  221. BUG_ON(!is_power_of_2(count));
  222. /* slots_num must be power-of-two size, otherwise
  223. * get_cmd_index is broken. */
  224. BUG_ON(!is_power_of_2(slots_num));
  225. q->low_mark = q->n_window / 4;
  226. if (q->low_mark < 4)
  227. q->low_mark = 4;
  228. q->high_mark = q->n_window / 8;
  229. if (q->high_mark < 2)
  230. q->high_mark = 2;
  231. q->write_ptr = q->read_ptr = 0;
  232. return 0;
  233. }
  234. /**
  235. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  236. */
  237. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  238. struct iwl4965_tx_queue *txq, u32 id)
  239. {
  240. struct pci_dev *dev = priv->pci_dev;
  241. /* Driver private data, only for Tx (not command) queues,
  242. * not shared with device. */
  243. if (id != IWL_CMD_QUEUE_NUM) {
  244. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  245. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  246. if (!txq->txb) {
  247. IWL_ERROR("kmalloc for auxiliary BD "
  248. "structures failed\n");
  249. goto error;
  250. }
  251. } else
  252. txq->txb = NULL;
  253. /* Circular buffer of transmit frame descriptors (TFDs),
  254. * shared with device */
  255. txq->bd = pci_alloc_consistent(dev,
  256. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  257. &txq->q.dma_addr);
  258. if (!txq->bd) {
  259. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  260. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  261. goto error;
  262. }
  263. txq->q.id = id;
  264. return 0;
  265. error:
  266. if (txq->txb) {
  267. kfree(txq->txb);
  268. txq->txb = NULL;
  269. }
  270. return -ENOMEM;
  271. }
  272. /**
  273. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  274. */
  275. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  276. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  277. {
  278. struct pci_dev *dev = priv->pci_dev;
  279. int len;
  280. int rc = 0;
  281. /*
  282. * Alloc buffer array for commands (Tx or other types of commands).
  283. * For the command queue (#4), allocate command space + one big
  284. * command for scan, since scan command is very huge; the system will
  285. * not have two scans at the same time, so only one is needed.
  286. * For normal Tx queues (all other queues), no super-size command
  287. * space is needed.
  288. */
  289. len = sizeof(struct iwl4965_cmd) * slots_num;
  290. if (txq_id == IWL_CMD_QUEUE_NUM)
  291. len += IWL_MAX_SCAN_SIZE;
  292. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  293. if (!txq->cmd)
  294. return -ENOMEM;
  295. /* Alloc driver data array and TFD circular buffer */
  296. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  297. if (rc) {
  298. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  299. return -ENOMEM;
  300. }
  301. txq->need_update = 0;
  302. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  303. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  304. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  305. /* Initialize queue's high/low-water marks, and head/tail indexes */
  306. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  307. /* Tell device where to find queue */
  308. iwl4965_hw_tx_queue_init(priv, txq);
  309. return 0;
  310. }
  311. /**
  312. * iwl4965_tx_queue_free - Deallocate DMA queue.
  313. * @txq: Transmit queue to deallocate.
  314. *
  315. * Empty queue by removing and destroying all BD's.
  316. * Free all buffers.
  317. * 0-fill, but do not free "txq" descriptor structure.
  318. */
  319. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  320. {
  321. struct iwl4965_queue *q = &txq->q;
  322. struct pci_dev *dev = priv->pci_dev;
  323. int len;
  324. if (q->n_bd == 0)
  325. return;
  326. /* first, empty all BD's */
  327. for (; q->write_ptr != q->read_ptr;
  328. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  329. iwl4965_hw_txq_free_tfd(priv, txq);
  330. len = sizeof(struct iwl4965_cmd) * q->n_window;
  331. if (q->id == IWL_CMD_QUEUE_NUM)
  332. len += IWL_MAX_SCAN_SIZE;
  333. /* De-alloc array of command/tx buffers */
  334. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  335. /* De-alloc circular buffer of TFDs */
  336. if (txq->q.n_bd)
  337. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  338. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  339. /* De-alloc array of per-TFD driver data */
  340. if (txq->txb) {
  341. kfree(txq->txb);
  342. txq->txb = NULL;
  343. }
  344. /* 0-fill queue descriptor structure */
  345. memset(txq, 0, sizeof(*txq));
  346. }
  347. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  348. /*************** STATION TABLE MANAGEMENT ****
  349. * mac80211 should be examined to determine if sta_info is duplicating
  350. * the functionality provided here
  351. */
  352. /**************************************************************/
  353. #if 0 /* temporary disable till we add real remove station */
  354. /**
  355. * iwl4965_remove_station - Remove driver's knowledge of station.
  356. *
  357. * NOTE: This does not remove station from device's station table.
  358. */
  359. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  360. {
  361. int index = IWL_INVALID_STATION;
  362. int i;
  363. unsigned long flags;
  364. spin_lock_irqsave(&priv->sta_lock, flags);
  365. if (is_ap)
  366. index = IWL_AP_ID;
  367. else if (is_broadcast_ether_addr(addr))
  368. index = priv->hw_setting.bcast_sta_id;
  369. else
  370. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  371. if (priv->stations[i].used &&
  372. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  373. addr)) {
  374. index = i;
  375. break;
  376. }
  377. if (unlikely(index == IWL_INVALID_STATION))
  378. goto out;
  379. if (priv->stations[index].used) {
  380. priv->stations[index].used = 0;
  381. priv->num_stations--;
  382. }
  383. BUG_ON(priv->num_stations < 0);
  384. out:
  385. spin_unlock_irqrestore(&priv->sta_lock, flags);
  386. return 0;
  387. }
  388. #endif
  389. /**
  390. * iwl4965_clear_stations_table - Clear the driver's station table
  391. *
  392. * NOTE: This does not clear or otherwise alter the device's station table.
  393. */
  394. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  395. {
  396. unsigned long flags;
  397. spin_lock_irqsave(&priv->sta_lock, flags);
  398. priv->num_stations = 0;
  399. memset(priv->stations, 0, sizeof(priv->stations));
  400. spin_unlock_irqrestore(&priv->sta_lock, flags);
  401. }
  402. /**
  403. * iwl4965_add_station_flags - Add station to tables in driver and device
  404. */
  405. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  406. int is_ap, u8 flags, void *ht_data)
  407. {
  408. int i;
  409. int index = IWL_INVALID_STATION;
  410. struct iwl4965_station_entry *station;
  411. unsigned long flags_spin;
  412. DECLARE_MAC_BUF(mac);
  413. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  414. if (is_ap)
  415. index = IWL_AP_ID;
  416. else if (is_broadcast_ether_addr(addr))
  417. index = priv->hw_setting.bcast_sta_id;
  418. else
  419. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  420. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  421. addr)) {
  422. index = i;
  423. break;
  424. }
  425. if (!priv->stations[i].used &&
  426. index == IWL_INVALID_STATION)
  427. index = i;
  428. }
  429. /* These two conditions have the same outcome, but keep them separate
  430. since they have different meanings */
  431. if (unlikely(index == IWL_INVALID_STATION)) {
  432. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  433. return index;
  434. }
  435. if (priv->stations[index].used &&
  436. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  437. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  438. return index;
  439. }
  440. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  441. station = &priv->stations[index];
  442. station->used = 1;
  443. priv->num_stations++;
  444. /* Set up the REPLY_ADD_STA command to send to device */
  445. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  446. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  447. station->sta.mode = 0;
  448. station->sta.sta.sta_id = index;
  449. station->sta.station_flags = 0;
  450. #ifdef CONFIG_IWL4965_HT
  451. /* BCAST station and IBSS stations do not work in HT mode */
  452. if (index != priv->hw_setting.bcast_sta_id &&
  453. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  454. iwl4965_set_ht_add_station(priv, index,
  455. (struct ieee80211_ht_info *) ht_data);
  456. #endif /*CONFIG_IWL4965_HT*/
  457. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  458. /* Add station to device's station table */
  459. iwl4965_send_add_station(priv, &station->sta, flags);
  460. return index;
  461. }
  462. /*************** DRIVER STATUS FUNCTIONS *****/
  463. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  464. {
  465. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  466. * set but EXIT_PENDING is not */
  467. return test_bit(STATUS_READY, &priv->status) &&
  468. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  469. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  470. }
  471. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  472. {
  473. return test_bit(STATUS_ALIVE, &priv->status);
  474. }
  475. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  476. {
  477. return test_bit(STATUS_INIT, &priv->status);
  478. }
  479. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  480. {
  481. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  482. test_bit(STATUS_RF_KILL_SW, &priv->status);
  483. }
  484. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  485. {
  486. if (iwl4965_is_rfkill(priv))
  487. return 0;
  488. return iwl4965_is_ready(priv);
  489. }
  490. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  491. #define IWL_CMD(x) case x : return #x
  492. static const char *get_cmd_string(u8 cmd)
  493. {
  494. switch (cmd) {
  495. IWL_CMD(REPLY_ALIVE);
  496. IWL_CMD(REPLY_ERROR);
  497. IWL_CMD(REPLY_RXON);
  498. IWL_CMD(REPLY_RXON_ASSOC);
  499. IWL_CMD(REPLY_QOS_PARAM);
  500. IWL_CMD(REPLY_RXON_TIMING);
  501. IWL_CMD(REPLY_ADD_STA);
  502. IWL_CMD(REPLY_REMOVE_STA);
  503. IWL_CMD(REPLY_REMOVE_ALL_STA);
  504. IWL_CMD(REPLY_TX);
  505. IWL_CMD(REPLY_RATE_SCALE);
  506. IWL_CMD(REPLY_LEDS_CMD);
  507. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  508. IWL_CMD(RADAR_NOTIFICATION);
  509. IWL_CMD(REPLY_QUIET_CMD);
  510. IWL_CMD(REPLY_CHANNEL_SWITCH);
  511. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  512. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  513. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  514. IWL_CMD(POWER_TABLE_CMD);
  515. IWL_CMD(PM_SLEEP_NOTIFICATION);
  516. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  517. IWL_CMD(REPLY_SCAN_CMD);
  518. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  519. IWL_CMD(SCAN_START_NOTIFICATION);
  520. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  521. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  522. IWL_CMD(BEACON_NOTIFICATION);
  523. IWL_CMD(REPLY_TX_BEACON);
  524. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  525. IWL_CMD(QUIET_NOTIFICATION);
  526. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  527. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  528. IWL_CMD(REPLY_BT_CONFIG);
  529. IWL_CMD(REPLY_STATISTICS_CMD);
  530. IWL_CMD(STATISTICS_NOTIFICATION);
  531. IWL_CMD(REPLY_CARD_STATE_CMD);
  532. IWL_CMD(CARD_STATE_NOTIFICATION);
  533. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  534. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  535. IWL_CMD(SENSITIVITY_CMD);
  536. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  537. IWL_CMD(REPLY_RX_PHY_CMD);
  538. IWL_CMD(REPLY_RX_MPDU_CMD);
  539. IWL_CMD(REPLY_4965_RX);
  540. IWL_CMD(REPLY_COMPRESSED_BA);
  541. default:
  542. return "UNKNOWN";
  543. }
  544. }
  545. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  546. /**
  547. * iwl4965_enqueue_hcmd - enqueue a uCode command
  548. * @priv: device private data point
  549. * @cmd: a point to the ucode command structure
  550. *
  551. * The function returns < 0 values to indicate the operation is
  552. * failed. On success, it turns the index (> 0) of command in the
  553. * command queue.
  554. */
  555. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  556. {
  557. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  558. struct iwl4965_queue *q = &txq->q;
  559. struct iwl4965_tfd_frame *tfd;
  560. u32 *control_flags;
  561. struct iwl4965_cmd *out_cmd;
  562. u32 idx;
  563. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  564. dma_addr_t phys_addr;
  565. int ret;
  566. unsigned long flags;
  567. /* If any of the command structures end up being larger than
  568. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  569. * we will need to increase the size of the TFD entries */
  570. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  571. !(cmd->meta.flags & CMD_SIZE_HUGE));
  572. if (iwl4965_is_rfkill(priv)) {
  573. IWL_DEBUG_INFO("Not sending command - RF KILL");
  574. return -EIO;
  575. }
  576. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  577. IWL_ERROR("No space for Tx\n");
  578. return -ENOSPC;
  579. }
  580. spin_lock_irqsave(&priv->hcmd_lock, flags);
  581. tfd = &txq->bd[q->write_ptr];
  582. memset(tfd, 0, sizeof(*tfd));
  583. control_flags = (u32 *) tfd;
  584. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  585. out_cmd = &txq->cmd[idx];
  586. out_cmd->hdr.cmd = cmd->id;
  587. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  588. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  589. /* At this point, the out_cmd now has all of the incoming cmd
  590. * information */
  591. out_cmd->hdr.flags = 0;
  592. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  593. INDEX_TO_SEQ(q->write_ptr));
  594. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  595. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  596. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  597. offsetof(struct iwl4965_cmd, hdr);
  598. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  599. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  600. "%d bytes at %d[%d]:%d\n",
  601. get_cmd_string(out_cmd->hdr.cmd),
  602. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  603. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  604. txq->need_update = 1;
  605. /* Set up entry in queue's byte count circular buffer */
  606. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  607. /* Increment and update queue's write index */
  608. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  609. iwl4965_tx_queue_update_write_ptr(priv, txq);
  610. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  611. return ret ? ret : idx;
  612. }
  613. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  614. {
  615. int ret;
  616. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  617. /* An asynchronous command can not expect an SKB to be set. */
  618. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  619. /* An asynchronous command MUST have a callback. */
  620. BUG_ON(!cmd->meta.u.callback);
  621. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  622. return -EBUSY;
  623. ret = iwl4965_enqueue_hcmd(priv, cmd);
  624. if (ret < 0) {
  625. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  626. get_cmd_string(cmd->id), ret);
  627. return ret;
  628. }
  629. return 0;
  630. }
  631. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  632. {
  633. int cmd_idx;
  634. int ret;
  635. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  636. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  637. /* A synchronous command can not have a callback set. */
  638. BUG_ON(cmd->meta.u.callback != NULL);
  639. if (atomic_xchg(&entry, 1)) {
  640. IWL_ERROR("Error sending %s: Already sending a host command\n",
  641. get_cmd_string(cmd->id));
  642. return -EBUSY;
  643. }
  644. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  645. if (cmd->meta.flags & CMD_WANT_SKB)
  646. cmd->meta.source = &cmd->meta;
  647. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  648. if (cmd_idx < 0) {
  649. ret = cmd_idx;
  650. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  651. get_cmd_string(cmd->id), ret);
  652. goto out;
  653. }
  654. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  655. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  656. HOST_COMPLETE_TIMEOUT);
  657. if (!ret) {
  658. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  659. IWL_ERROR("Error sending %s: time out after %dms.\n",
  660. get_cmd_string(cmd->id),
  661. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  662. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  663. ret = -ETIMEDOUT;
  664. goto cancel;
  665. }
  666. }
  667. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  668. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  669. get_cmd_string(cmd->id));
  670. ret = -ECANCELED;
  671. goto fail;
  672. }
  673. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  674. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  675. get_cmd_string(cmd->id));
  676. ret = -EIO;
  677. goto fail;
  678. }
  679. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  680. IWL_ERROR("Error: Response NULL in '%s'\n",
  681. get_cmd_string(cmd->id));
  682. ret = -EIO;
  683. goto out;
  684. }
  685. ret = 0;
  686. goto out;
  687. cancel:
  688. if (cmd->meta.flags & CMD_WANT_SKB) {
  689. struct iwl4965_cmd *qcmd;
  690. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  691. * TX cmd queue. Otherwise in case the cmd comes
  692. * in later, it will possibly set an invalid
  693. * address (cmd->meta.source). */
  694. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  695. qcmd->meta.flags &= ~CMD_WANT_SKB;
  696. }
  697. fail:
  698. if (cmd->meta.u.skb) {
  699. dev_kfree_skb_any(cmd->meta.u.skb);
  700. cmd->meta.u.skb = NULL;
  701. }
  702. out:
  703. atomic_set(&entry, 0);
  704. return ret;
  705. }
  706. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  707. {
  708. if (cmd->meta.flags & CMD_ASYNC)
  709. return iwl4965_send_cmd_async(priv, cmd);
  710. return iwl4965_send_cmd_sync(priv, cmd);
  711. }
  712. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  713. {
  714. struct iwl4965_host_cmd cmd = {
  715. .id = id,
  716. .len = len,
  717. .data = data,
  718. };
  719. return iwl4965_send_cmd_sync(priv, &cmd);
  720. }
  721. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = sizeof(val),
  726. .data = &val,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  731. {
  732. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  733. }
  734. /**
  735. * iwl4965_rxon_add_station - add station into station table.
  736. *
  737. * there is only one AP station with id= IWL_AP_ID
  738. * NOTE: mutex must be held before calling this fnction
  739. */
  740. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  741. const u8 *addr, int is_ap)
  742. {
  743. u8 sta_id;
  744. /* Add station to device's station table */
  745. #ifdef CONFIG_IWL4965_HT
  746. struct ieee80211_conf *conf = &priv->hw->conf;
  747. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  748. if ((is_ap) &&
  749. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  750. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  751. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  752. 0, cur_ht_config);
  753. else
  754. #endif /* CONFIG_IWL4965_HT */
  755. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  756. 0, NULL);
  757. /* Set up default rate scaling table in device's station table */
  758. iwl4965_add_station(priv, addr, is_ap);
  759. return sta_id;
  760. }
  761. /**
  762. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  763. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  764. * @channel: Any channel valid for the requested phymode
  765. * In addition to setting the staging RXON, priv->phymode is also set.
  766. *
  767. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  768. * in the staging RXON flag structure based on the phymode
  769. */
  770. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  771. enum ieee80211_band band,
  772. u16 channel)
  773. {
  774. if (!iwl4965_get_channel_info(priv, band, channel)) {
  775. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  776. channel, band);
  777. return -EINVAL;
  778. }
  779. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  780. (priv->band == band))
  781. return 0;
  782. priv->staging_rxon.channel = cpu_to_le16(channel);
  783. if (band == IEEE80211_BAND_5GHZ)
  784. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  785. else
  786. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  787. priv->band = band;
  788. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  789. return 0;
  790. }
  791. /**
  792. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  793. *
  794. * NOTE: This is really only useful during development and can eventually
  795. * be #ifdef'd out once the driver is stable and folks aren't actively
  796. * making changes
  797. */
  798. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  799. {
  800. int error = 0;
  801. int counter = 1;
  802. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  803. error |= le32_to_cpu(rxon->flags &
  804. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  805. RXON_FLG_RADAR_DETECT_MSK));
  806. if (error)
  807. IWL_WARNING("check 24G fields %d | %d\n",
  808. counter++, error);
  809. } else {
  810. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  811. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  812. if (error)
  813. IWL_WARNING("check 52 fields %d | %d\n",
  814. counter++, error);
  815. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  816. if (error)
  817. IWL_WARNING("check 52 CCK %d | %d\n",
  818. counter++, error);
  819. }
  820. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  821. if (error)
  822. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  823. /* make sure basic rates 6Mbps and 1Mbps are supported */
  824. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  825. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  826. if (error)
  827. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  828. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  829. if (error)
  830. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  831. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  832. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  833. if (error)
  834. IWL_WARNING("check CCK and short slot %d | %d\n",
  835. counter++, error);
  836. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  837. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  838. if (error)
  839. IWL_WARNING("check CCK & auto detect %d | %d\n",
  840. counter++, error);
  841. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  842. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  843. if (error)
  844. IWL_WARNING("check TGG and auto detect %d | %d\n",
  845. counter++, error);
  846. if (error)
  847. IWL_WARNING("Tuning to channel %d\n",
  848. le16_to_cpu(rxon->channel));
  849. if (error) {
  850. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  851. return -1;
  852. }
  853. return 0;
  854. }
  855. /**
  856. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  857. * @priv: staging_rxon is compared to active_rxon
  858. *
  859. * If the RXON structure is changing enough to require a new tune,
  860. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  861. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  862. */
  863. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  864. {
  865. /* These items are only settable from the full RXON command */
  866. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  867. compare_ether_addr(priv->staging_rxon.bssid_addr,
  868. priv->active_rxon.bssid_addr) ||
  869. compare_ether_addr(priv->staging_rxon.node_addr,
  870. priv->active_rxon.node_addr) ||
  871. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  872. priv->active_rxon.wlap_bssid_addr) ||
  873. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  874. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  875. (priv->staging_rxon.air_propagation !=
  876. priv->active_rxon.air_propagation) ||
  877. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  878. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  879. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  880. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  881. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  882. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  883. return 1;
  884. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  885. * be updated with the RXON_ASSOC command -- however only some
  886. * flag transitions are allowed using RXON_ASSOC */
  887. /* Check if we are not switching bands */
  888. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  889. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  890. return 1;
  891. /* Check if we are switching association toggle */
  892. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  893. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  894. return 1;
  895. return 0;
  896. }
  897. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  898. {
  899. int rc = 0;
  900. struct iwl4965_rx_packet *res = NULL;
  901. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  902. struct iwl4965_host_cmd cmd = {
  903. .id = REPLY_RXON_ASSOC,
  904. .len = sizeof(rxon_assoc),
  905. .meta.flags = CMD_WANT_SKB,
  906. .data = &rxon_assoc,
  907. };
  908. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  909. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  910. if ((rxon1->flags == rxon2->flags) &&
  911. (rxon1->filter_flags == rxon2->filter_flags) &&
  912. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  913. (rxon1->ofdm_ht_single_stream_basic_rates ==
  914. rxon2->ofdm_ht_single_stream_basic_rates) &&
  915. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  916. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  917. (rxon1->rx_chain == rxon2->rx_chain) &&
  918. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  919. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  920. return 0;
  921. }
  922. rxon_assoc.flags = priv->staging_rxon.flags;
  923. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  924. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  925. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  926. rxon_assoc.reserved = 0;
  927. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  928. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  929. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  930. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  931. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  932. rc = iwl4965_send_cmd_sync(priv, &cmd);
  933. if (rc)
  934. return rc;
  935. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  936. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  937. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  938. rc = -EIO;
  939. }
  940. priv->alloc_rxb_skb--;
  941. dev_kfree_skb_any(cmd.meta.u.skb);
  942. return rc;
  943. }
  944. /**
  945. * iwl4965_commit_rxon - commit staging_rxon to hardware
  946. *
  947. * The RXON command in staging_rxon is committed to the hardware and
  948. * the active_rxon structure is updated with the new data. This
  949. * function correctly transitions out of the RXON_ASSOC_MSK state if
  950. * a HW tune is required based on the RXON structure changes.
  951. */
  952. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  953. {
  954. /* cast away the const for active_rxon in this function */
  955. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  956. DECLARE_MAC_BUF(mac);
  957. int rc = 0;
  958. if (!iwl4965_is_alive(priv))
  959. return -1;
  960. /* always get timestamp with Rx frame */
  961. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  962. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  963. if (rc) {
  964. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  965. return -EINVAL;
  966. }
  967. /* If we don't need to send a full RXON, we can use
  968. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  969. * and other flags for the current radio configuration. */
  970. if (!iwl4965_full_rxon_required(priv)) {
  971. rc = iwl4965_send_rxon_assoc(priv);
  972. if (rc) {
  973. IWL_ERROR("Error setting RXON_ASSOC "
  974. "configuration (%d).\n", rc);
  975. return rc;
  976. }
  977. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  978. return 0;
  979. }
  980. /* station table will be cleared */
  981. priv->assoc_station_added = 0;
  982. #ifdef CONFIG_IWL4965_SENSITIVITY
  983. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  984. if (!priv->error_recovering)
  985. priv->start_calib = 0;
  986. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  987. #endif /* CONFIG_IWL4965_SENSITIVITY */
  988. /* If we are currently associated and the new config requires
  989. * an RXON_ASSOC and the new config wants the associated mask enabled,
  990. * we must clear the associated from the active configuration
  991. * before we apply the new config */
  992. if (iwl4965_is_associated(priv) &&
  993. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  994. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  995. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  996. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  997. sizeof(struct iwl4965_rxon_cmd),
  998. &priv->active_rxon);
  999. /* If the mask clearing failed then we set
  1000. * active_rxon back to what it was previously */
  1001. if (rc) {
  1002. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1003. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1004. "configuration (%d).\n", rc);
  1005. return rc;
  1006. }
  1007. }
  1008. IWL_DEBUG_INFO("Sending RXON\n"
  1009. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1010. "* channel = %d\n"
  1011. "* bssid = %s\n",
  1012. ((priv->staging_rxon.filter_flags &
  1013. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1014. le16_to_cpu(priv->staging_rxon.channel),
  1015. print_mac(mac, priv->staging_rxon.bssid_addr));
  1016. /* Apply the new configuration */
  1017. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1018. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1019. if (rc) {
  1020. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1021. return rc;
  1022. }
  1023. iwl4965_clear_stations_table(priv);
  1024. #ifdef CONFIG_IWL4965_SENSITIVITY
  1025. if (!priv->error_recovering)
  1026. priv->start_calib = 0;
  1027. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1028. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1029. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1030. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1031. /* If we issue a new RXON command which required a tune then we must
  1032. * send a new TXPOWER command or we won't be able to Tx any frames */
  1033. rc = iwl4965_hw_reg_send_txpower(priv);
  1034. if (rc) {
  1035. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1036. return rc;
  1037. }
  1038. /* Add the broadcast address so we can send broadcast frames */
  1039. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1040. IWL_INVALID_STATION) {
  1041. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1042. return -EIO;
  1043. }
  1044. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1045. * add the IWL_AP_ID to the station rate table */
  1046. if (iwl4965_is_associated(priv) &&
  1047. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1048. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1049. == IWL_INVALID_STATION) {
  1050. IWL_ERROR("Error adding AP address for transmit.\n");
  1051. return -EIO;
  1052. }
  1053. priv->assoc_station_added = 1;
  1054. }
  1055. return 0;
  1056. }
  1057. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1058. {
  1059. struct iwl4965_bt_cmd bt_cmd = {
  1060. .flags = 3,
  1061. .lead_time = 0xAA,
  1062. .max_kill = 1,
  1063. .kill_ack_mask = 0,
  1064. .kill_cts_mask = 0,
  1065. };
  1066. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1067. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1068. }
  1069. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1070. {
  1071. int rc = 0;
  1072. struct iwl4965_rx_packet *res;
  1073. struct iwl4965_host_cmd cmd = {
  1074. .id = REPLY_SCAN_ABORT_CMD,
  1075. .meta.flags = CMD_WANT_SKB,
  1076. };
  1077. /* If there isn't a scan actively going on in the hardware
  1078. * then we are in between scan bands and not actually
  1079. * actively scanning, so don't send the abort command */
  1080. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1081. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1082. return 0;
  1083. }
  1084. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1085. if (rc) {
  1086. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1087. return rc;
  1088. }
  1089. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1090. if (res->u.status != CAN_ABORT_STATUS) {
  1091. /* The scan abort will return 1 for success or
  1092. * 2 for "failure". A failure condition can be
  1093. * due to simply not being in an active scan which
  1094. * can occur if we send the scan abort before we
  1095. * the microcode has notified us that a scan is
  1096. * completed. */
  1097. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1098. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1099. clear_bit(STATUS_SCAN_HW, &priv->status);
  1100. }
  1101. dev_kfree_skb_any(cmd.meta.u.skb);
  1102. return rc;
  1103. }
  1104. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1105. struct iwl4965_cmd *cmd,
  1106. struct sk_buff *skb)
  1107. {
  1108. return 1;
  1109. }
  1110. /*
  1111. * CARD_STATE_CMD
  1112. *
  1113. * Use: Sets the device's internal card state to enable, disable, or halt
  1114. *
  1115. * When in the 'enable' state the card operates as normal.
  1116. * When in the 'disable' state, the card enters into a low power mode.
  1117. * When in the 'halt' state, the card is shut down and must be fully
  1118. * restarted to come back on.
  1119. */
  1120. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1121. {
  1122. struct iwl4965_host_cmd cmd = {
  1123. .id = REPLY_CARD_STATE_CMD,
  1124. .len = sizeof(u32),
  1125. .data = &flags,
  1126. .meta.flags = meta_flag,
  1127. };
  1128. if (meta_flag & CMD_ASYNC)
  1129. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1130. return iwl4965_send_cmd(priv, &cmd);
  1131. }
  1132. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1133. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1134. {
  1135. struct iwl4965_rx_packet *res = NULL;
  1136. if (!skb) {
  1137. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1138. return 1;
  1139. }
  1140. res = (struct iwl4965_rx_packet *)skb->data;
  1141. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1142. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1143. res->hdr.flags);
  1144. return 1;
  1145. }
  1146. switch (res->u.add_sta.status) {
  1147. case ADD_STA_SUCCESS_MSK:
  1148. break;
  1149. default:
  1150. break;
  1151. }
  1152. /* We didn't cache the SKB; let the caller free it */
  1153. return 1;
  1154. }
  1155. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1156. struct iwl4965_addsta_cmd *sta, u8 flags)
  1157. {
  1158. struct iwl4965_rx_packet *res = NULL;
  1159. int rc = 0;
  1160. struct iwl4965_host_cmd cmd = {
  1161. .id = REPLY_ADD_STA,
  1162. .len = sizeof(struct iwl4965_addsta_cmd),
  1163. .meta.flags = flags,
  1164. .data = sta,
  1165. };
  1166. if (flags & CMD_ASYNC)
  1167. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1168. else
  1169. cmd.meta.flags |= CMD_WANT_SKB;
  1170. rc = iwl4965_send_cmd(priv, &cmd);
  1171. if (rc || (flags & CMD_ASYNC))
  1172. return rc;
  1173. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1174. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1175. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1176. res->hdr.flags);
  1177. rc = -EIO;
  1178. }
  1179. if (rc == 0) {
  1180. switch (res->u.add_sta.status) {
  1181. case ADD_STA_SUCCESS_MSK:
  1182. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1183. break;
  1184. default:
  1185. rc = -EIO;
  1186. IWL_WARNING("REPLY_ADD_STA failed\n");
  1187. break;
  1188. }
  1189. }
  1190. priv->alloc_rxb_skb--;
  1191. dev_kfree_skb_any(cmd.meta.u.skb);
  1192. return rc;
  1193. }
  1194. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1195. struct ieee80211_key_conf *keyconf,
  1196. u8 sta_id)
  1197. {
  1198. unsigned long flags;
  1199. __le16 key_flags = 0;
  1200. switch (keyconf->alg) {
  1201. case ALG_CCMP:
  1202. key_flags |= STA_KEY_FLG_CCMP;
  1203. key_flags |= cpu_to_le16(
  1204. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1205. key_flags &= ~STA_KEY_FLG_INVALID;
  1206. break;
  1207. case ALG_TKIP:
  1208. case ALG_WEP:
  1209. default:
  1210. return -EINVAL;
  1211. }
  1212. spin_lock_irqsave(&priv->sta_lock, flags);
  1213. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1214. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1215. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1216. keyconf->keylen);
  1217. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1218. keyconf->keylen);
  1219. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1220. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1221. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1222. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1223. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1224. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1225. return 0;
  1226. }
  1227. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1228. {
  1229. unsigned long flags;
  1230. spin_lock_irqsave(&priv->sta_lock, flags);
  1231. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1232. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1233. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1234. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1235. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1236. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1237. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1238. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1239. return 0;
  1240. }
  1241. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1242. {
  1243. struct list_head *element;
  1244. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1245. priv->frames_count);
  1246. while (!list_empty(&priv->free_frames)) {
  1247. element = priv->free_frames.next;
  1248. list_del(element);
  1249. kfree(list_entry(element, struct iwl4965_frame, list));
  1250. priv->frames_count--;
  1251. }
  1252. if (priv->frames_count) {
  1253. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1254. priv->frames_count);
  1255. priv->frames_count = 0;
  1256. }
  1257. }
  1258. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1259. {
  1260. struct iwl4965_frame *frame;
  1261. struct list_head *element;
  1262. if (list_empty(&priv->free_frames)) {
  1263. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1264. if (!frame) {
  1265. IWL_ERROR("Could not allocate frame!\n");
  1266. return NULL;
  1267. }
  1268. priv->frames_count++;
  1269. return frame;
  1270. }
  1271. element = priv->free_frames.next;
  1272. list_del(element);
  1273. return list_entry(element, struct iwl4965_frame, list);
  1274. }
  1275. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1276. {
  1277. memset(frame, 0, sizeof(*frame));
  1278. list_add(&frame->list, &priv->free_frames);
  1279. }
  1280. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1281. struct ieee80211_hdr *hdr,
  1282. const u8 *dest, int left)
  1283. {
  1284. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1285. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1286. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1287. return 0;
  1288. if (priv->ibss_beacon->len > left)
  1289. return 0;
  1290. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1291. return priv->ibss_beacon->len;
  1292. }
  1293. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1294. {
  1295. u8 i;
  1296. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1297. i = iwl4965_rates[i].next_ieee) {
  1298. if (rate_mask & (1 << i))
  1299. return iwl4965_rates[i].plcp;
  1300. }
  1301. return IWL_RATE_INVALID;
  1302. }
  1303. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1304. {
  1305. struct iwl4965_frame *frame;
  1306. unsigned int frame_size;
  1307. int rc;
  1308. u8 rate;
  1309. frame = iwl4965_get_free_frame(priv);
  1310. if (!frame) {
  1311. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1312. "command.\n");
  1313. return -ENOMEM;
  1314. }
  1315. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1316. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1317. 0xFF0);
  1318. if (rate == IWL_INVALID_RATE)
  1319. rate = IWL_RATE_6M_PLCP;
  1320. } else {
  1321. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1322. if (rate == IWL_INVALID_RATE)
  1323. rate = IWL_RATE_1M_PLCP;
  1324. }
  1325. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1326. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1327. &frame->u.cmd[0]);
  1328. iwl4965_free_frame(priv, frame);
  1329. return rc;
  1330. }
  1331. /******************************************************************************
  1332. *
  1333. * EEPROM related functions
  1334. *
  1335. ******************************************************************************/
  1336. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1337. {
  1338. memcpy(mac, priv->eeprom.mac_address, 6);
  1339. }
  1340. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1341. {
  1342. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1343. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1344. }
  1345. /**
  1346. * iwl4965_eeprom_init - read EEPROM contents
  1347. *
  1348. * Load the EEPROM contents from adapter into priv->eeprom
  1349. *
  1350. * NOTE: This routine uses the non-debug IO access functions.
  1351. */
  1352. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1353. {
  1354. u16 *e = (u16 *)&priv->eeprom;
  1355. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1356. u32 r;
  1357. int sz = sizeof(priv->eeprom);
  1358. int rc;
  1359. int i;
  1360. u16 addr;
  1361. /* The EEPROM structure has several padding buffers within it
  1362. * and when adding new EEPROM maps is subject to programmer errors
  1363. * which may be very difficult to identify without explicitly
  1364. * checking the resulting size of the eeprom map. */
  1365. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1366. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1367. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1368. return -ENOENT;
  1369. }
  1370. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1371. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1372. if (rc < 0) {
  1373. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1374. return -ENOENT;
  1375. }
  1376. /* eeprom is an array of 16bit values */
  1377. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1378. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1379. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1380. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1381. i += IWL_EEPROM_ACCESS_DELAY) {
  1382. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1383. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1384. break;
  1385. udelay(IWL_EEPROM_ACCESS_DELAY);
  1386. }
  1387. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1388. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1389. rc = -ETIMEDOUT;
  1390. goto done;
  1391. }
  1392. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1393. }
  1394. rc = 0;
  1395. done:
  1396. iwl4965_eeprom_release_semaphore(priv);
  1397. return rc;
  1398. }
  1399. /******************************************************************************
  1400. *
  1401. * Misc. internal state and helper functions
  1402. *
  1403. ******************************************************************************/
  1404. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1405. {
  1406. if (priv->hw_setting.shared_virt)
  1407. pci_free_consistent(priv->pci_dev,
  1408. sizeof(struct iwl4965_shared),
  1409. priv->hw_setting.shared_virt,
  1410. priv->hw_setting.shared_phys);
  1411. }
  1412. /**
  1413. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1414. *
  1415. * return : set the bit for each supported rate insert in ie
  1416. */
  1417. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1418. u16 basic_rate, int *left)
  1419. {
  1420. u16 ret_rates = 0, bit;
  1421. int i;
  1422. u8 *cnt = ie;
  1423. u8 *rates = ie + 1;
  1424. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1425. if (bit & supported_rate) {
  1426. ret_rates |= bit;
  1427. rates[*cnt] = iwl4965_rates[i].ieee |
  1428. ((bit & basic_rate) ? 0x80 : 0x00);
  1429. (*cnt)++;
  1430. (*left)--;
  1431. if ((*left <= 0) ||
  1432. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1433. break;
  1434. }
  1435. }
  1436. return ret_rates;
  1437. }
  1438. /**
  1439. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1440. */
  1441. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1442. enum ieee80211_band band,
  1443. struct ieee80211_mgmt *frame,
  1444. int left, int is_direct)
  1445. {
  1446. int len = 0;
  1447. u8 *pos = NULL;
  1448. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1449. #ifdef CONFIG_IWL4965_HT
  1450. const struct ieee80211_supported_band *sband =
  1451. iwl4965_get_hw_mode(priv, band);
  1452. #endif /* CONFIG_IWL4965_HT */
  1453. /* Make sure there is enough space for the probe request,
  1454. * two mandatory IEs and the data */
  1455. left -= 24;
  1456. if (left < 0)
  1457. return 0;
  1458. len += 24;
  1459. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1460. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1461. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1462. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1463. frame->seq_ctrl = 0;
  1464. /* fill in our indirect SSID IE */
  1465. /* ...next IE... */
  1466. left -= 2;
  1467. if (left < 0)
  1468. return 0;
  1469. len += 2;
  1470. pos = &(frame->u.probe_req.variable[0]);
  1471. *pos++ = WLAN_EID_SSID;
  1472. *pos++ = 0;
  1473. /* fill in our direct SSID IE... */
  1474. if (is_direct) {
  1475. /* ...next IE... */
  1476. left -= 2 + priv->essid_len;
  1477. if (left < 0)
  1478. return 0;
  1479. /* ... fill it in... */
  1480. *pos++ = WLAN_EID_SSID;
  1481. *pos++ = priv->essid_len;
  1482. memcpy(pos, priv->essid, priv->essid_len);
  1483. pos += priv->essid_len;
  1484. len += 2 + priv->essid_len;
  1485. }
  1486. /* fill in supported rate */
  1487. /* ...next IE... */
  1488. left -= 2;
  1489. if (left < 0)
  1490. return 0;
  1491. /* ... fill it in... */
  1492. *pos++ = WLAN_EID_SUPP_RATES;
  1493. *pos = 0;
  1494. /* exclude 60M rate */
  1495. active_rates = priv->rates_mask;
  1496. active_rates &= ~IWL_RATE_60M_MASK;
  1497. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1498. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1499. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1500. active_rate_basic, &left);
  1501. active_rates &= ~ret_rates;
  1502. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1503. active_rate_basic, &left);
  1504. active_rates &= ~ret_rates;
  1505. len += 2 + *pos;
  1506. pos += (*pos) + 1;
  1507. if (active_rates == 0)
  1508. goto fill_end;
  1509. /* fill in supported extended rate */
  1510. /* ...next IE... */
  1511. left -= 2;
  1512. if (left < 0)
  1513. return 0;
  1514. /* ... fill it in... */
  1515. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1516. *pos = 0;
  1517. iwl4965_supported_rate_to_ie(pos, active_rates,
  1518. active_rate_basic, &left);
  1519. if (*pos > 0)
  1520. len += 2 + *pos;
  1521. #ifdef CONFIG_IWL4965_HT
  1522. if (sband && sband->ht_info.ht_supported) {
  1523. struct ieee80211_ht_cap *ht_cap;
  1524. pos += (*pos) + 1;
  1525. *pos++ = WLAN_EID_HT_CAPABILITY;
  1526. *pos++ = sizeof(struct ieee80211_ht_cap);
  1527. ht_cap = (struct ieee80211_ht_cap *)pos;
  1528. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1529. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1530. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1531. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1532. ((sband->ht_info.ampdu_density << 2) &
  1533. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1534. len += 2 + sizeof(struct ieee80211_ht_cap);
  1535. }
  1536. #endif /*CONFIG_IWL4965_HT */
  1537. fill_end:
  1538. return (u16)len;
  1539. }
  1540. /*
  1541. * QoS support
  1542. */
  1543. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1544. struct iwl4965_qosparam_cmd *qos)
  1545. {
  1546. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1547. sizeof(struct iwl4965_qosparam_cmd), qos);
  1548. }
  1549. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1550. {
  1551. u16 cw_min = 15;
  1552. u16 cw_max = 1023;
  1553. u8 aifs = 2;
  1554. u8 is_legacy = 0;
  1555. unsigned long flags;
  1556. int i;
  1557. spin_lock_irqsave(&priv->lock, flags);
  1558. priv->qos_data.qos_active = 0;
  1559. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1560. if (priv->qos_data.qos_enable)
  1561. priv->qos_data.qos_active = 1;
  1562. if (!(priv->active_rate & 0xfff0)) {
  1563. cw_min = 31;
  1564. is_legacy = 1;
  1565. }
  1566. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1567. if (priv->qos_data.qos_enable)
  1568. priv->qos_data.qos_active = 1;
  1569. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1570. cw_min = 31;
  1571. is_legacy = 1;
  1572. }
  1573. if (priv->qos_data.qos_active)
  1574. aifs = 3;
  1575. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1576. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1577. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1578. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1579. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1580. if (priv->qos_data.qos_active) {
  1581. i = 1;
  1582. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1583. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1584. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1585. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1586. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1587. i = 2;
  1588. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1589. cpu_to_le16((cw_min + 1) / 2 - 1);
  1590. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1591. cpu_to_le16(cw_max);
  1592. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1593. if (is_legacy)
  1594. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1595. cpu_to_le16(6016);
  1596. else
  1597. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1598. cpu_to_le16(3008);
  1599. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1600. i = 3;
  1601. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1602. cpu_to_le16((cw_min + 1) / 4 - 1);
  1603. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1604. cpu_to_le16((cw_max + 1) / 2 - 1);
  1605. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1606. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1607. if (is_legacy)
  1608. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1609. cpu_to_le16(3264);
  1610. else
  1611. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1612. cpu_to_le16(1504);
  1613. } else {
  1614. for (i = 1; i < 4; i++) {
  1615. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1616. cpu_to_le16(cw_min);
  1617. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1618. cpu_to_le16(cw_max);
  1619. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1620. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1621. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1622. }
  1623. }
  1624. IWL_DEBUG_QOS("set QoS to default \n");
  1625. spin_unlock_irqrestore(&priv->lock, flags);
  1626. }
  1627. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1628. {
  1629. unsigned long flags;
  1630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1631. return;
  1632. if (!priv->qos_data.qos_enable)
  1633. return;
  1634. spin_lock_irqsave(&priv->lock, flags);
  1635. priv->qos_data.def_qos_parm.qos_flags = 0;
  1636. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1637. !priv->qos_data.qos_cap.q_AP.txop_request)
  1638. priv->qos_data.def_qos_parm.qos_flags |=
  1639. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1640. if (priv->qos_data.qos_active)
  1641. priv->qos_data.def_qos_parm.qos_flags |=
  1642. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1643. #ifdef CONFIG_IWL4965_HT
  1644. if (priv->current_ht_config.is_ht)
  1645. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1646. #endif /* CONFIG_IWL4965_HT */
  1647. spin_unlock_irqrestore(&priv->lock, flags);
  1648. if (force || iwl4965_is_associated(priv)) {
  1649. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1650. priv->qos_data.qos_active,
  1651. priv->qos_data.def_qos_parm.qos_flags);
  1652. iwl4965_send_qos_params_command(priv,
  1653. &(priv->qos_data.def_qos_parm));
  1654. }
  1655. }
  1656. /*
  1657. * Power management (not Tx power!) functions
  1658. */
  1659. #define MSEC_TO_USEC 1024
  1660. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1661. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1662. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1663. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1664. __constant_cpu_to_le32(X1), \
  1665. __constant_cpu_to_le32(X2), \
  1666. __constant_cpu_to_le32(X3), \
  1667. __constant_cpu_to_le32(X4)}
  1668. /* default power management (not Tx power) table values */
  1669. /* for tim 0-10 */
  1670. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1671. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1672. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1673. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1674. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1675. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1676. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1677. };
  1678. /* for tim > 10 */
  1679. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1680. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1681. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1682. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1683. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1684. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1685. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1686. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1687. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1688. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1689. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1690. };
  1691. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1692. {
  1693. int rc = 0, i;
  1694. struct iwl4965_power_mgr *pow_data;
  1695. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1696. u16 pci_pm;
  1697. IWL_DEBUG_POWER("Initialize power \n");
  1698. pow_data = &(priv->power_data);
  1699. memset(pow_data, 0, sizeof(*pow_data));
  1700. pow_data->active_index = IWL_POWER_RANGE_0;
  1701. pow_data->dtim_val = 0xffff;
  1702. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1703. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1704. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1705. if (rc != 0)
  1706. return 0;
  1707. else {
  1708. struct iwl4965_powertable_cmd *cmd;
  1709. IWL_DEBUG_POWER("adjust power command flags\n");
  1710. for (i = 0; i < IWL_POWER_AC; i++) {
  1711. cmd = &pow_data->pwr_range_0[i].cmd;
  1712. if (pci_pm & 0x1)
  1713. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1714. else
  1715. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1716. }
  1717. }
  1718. return rc;
  1719. }
  1720. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1721. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1722. {
  1723. int rc = 0, i;
  1724. u8 skip;
  1725. u32 max_sleep = 0;
  1726. struct iwl4965_power_vec_entry *range;
  1727. u8 period = 0;
  1728. struct iwl4965_power_mgr *pow_data;
  1729. if (mode > IWL_POWER_INDEX_5) {
  1730. IWL_DEBUG_POWER("Error invalid power mode \n");
  1731. return -1;
  1732. }
  1733. pow_data = &(priv->power_data);
  1734. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1735. range = &pow_data->pwr_range_0[0];
  1736. else
  1737. range = &pow_data->pwr_range_1[1];
  1738. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1739. #ifdef IWL_MAC80211_DISABLE
  1740. if (priv->assoc_network != NULL) {
  1741. unsigned long flags;
  1742. period = priv->assoc_network->tim.tim_period;
  1743. }
  1744. #endif /*IWL_MAC80211_DISABLE */
  1745. skip = range[mode].no_dtim;
  1746. if (period == 0) {
  1747. period = 1;
  1748. skip = 0;
  1749. }
  1750. if (skip == 0) {
  1751. max_sleep = period;
  1752. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1753. } else {
  1754. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1755. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1756. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1757. }
  1758. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1759. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1760. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1761. }
  1762. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1763. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1764. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1765. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1766. le32_to_cpu(cmd->sleep_interval[0]),
  1767. le32_to_cpu(cmd->sleep_interval[1]),
  1768. le32_to_cpu(cmd->sleep_interval[2]),
  1769. le32_to_cpu(cmd->sleep_interval[3]),
  1770. le32_to_cpu(cmd->sleep_interval[4]));
  1771. return rc;
  1772. }
  1773. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1774. {
  1775. u32 uninitialized_var(final_mode);
  1776. int rc;
  1777. struct iwl4965_powertable_cmd cmd;
  1778. /* If on battery, set to 3,
  1779. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1780. * else user level */
  1781. switch (mode) {
  1782. case IWL_POWER_BATTERY:
  1783. final_mode = IWL_POWER_INDEX_3;
  1784. break;
  1785. case IWL_POWER_AC:
  1786. final_mode = IWL_POWER_MODE_CAM;
  1787. break;
  1788. default:
  1789. final_mode = mode;
  1790. break;
  1791. }
  1792. cmd.keep_alive_beacons = 0;
  1793. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1794. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1795. if (final_mode == IWL_POWER_MODE_CAM)
  1796. clear_bit(STATUS_POWER_PMI, &priv->status);
  1797. else
  1798. set_bit(STATUS_POWER_PMI, &priv->status);
  1799. return rc;
  1800. }
  1801. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1802. {
  1803. /* Filter incoming packets to determine if they are targeted toward
  1804. * this network, discarding packets coming from ourselves */
  1805. switch (priv->iw_mode) {
  1806. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1807. /* packets from our adapter are dropped (echo) */
  1808. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1809. return 0;
  1810. /* {broad,multi}cast packets to our IBSS go through */
  1811. if (is_multicast_ether_addr(header->addr1))
  1812. return !compare_ether_addr(header->addr3, priv->bssid);
  1813. /* packets to our adapter go through */
  1814. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1815. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1816. /* packets from our adapter are dropped (echo) */
  1817. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1818. return 0;
  1819. /* {broad,multi}cast packets to our BSS go through */
  1820. if (is_multicast_ether_addr(header->addr1))
  1821. return !compare_ether_addr(header->addr2, priv->bssid);
  1822. /* packets to our adapter go through */
  1823. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1824. }
  1825. return 1;
  1826. }
  1827. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1828. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1829. {
  1830. switch (status & TX_STATUS_MSK) {
  1831. case TX_STATUS_SUCCESS:
  1832. return "SUCCESS";
  1833. TX_STATUS_ENTRY(SHORT_LIMIT);
  1834. TX_STATUS_ENTRY(LONG_LIMIT);
  1835. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1836. TX_STATUS_ENTRY(MGMNT_ABORT);
  1837. TX_STATUS_ENTRY(NEXT_FRAG);
  1838. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1839. TX_STATUS_ENTRY(DEST_PS);
  1840. TX_STATUS_ENTRY(ABORTED);
  1841. TX_STATUS_ENTRY(BT_RETRY);
  1842. TX_STATUS_ENTRY(STA_INVALID);
  1843. TX_STATUS_ENTRY(FRAG_DROPPED);
  1844. TX_STATUS_ENTRY(TID_DISABLE);
  1845. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1846. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1847. TX_STATUS_ENTRY(TX_LOCKED);
  1848. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1849. }
  1850. return "UNKNOWN";
  1851. }
  1852. /**
  1853. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1854. *
  1855. * NOTE: priv->mutex is not required before calling this function
  1856. */
  1857. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1858. {
  1859. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1860. clear_bit(STATUS_SCANNING, &priv->status);
  1861. return 0;
  1862. }
  1863. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1864. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1865. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1866. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1867. queue_work(priv->workqueue, &priv->abort_scan);
  1868. } else
  1869. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1870. return test_bit(STATUS_SCANNING, &priv->status);
  1871. }
  1872. return 0;
  1873. }
  1874. /**
  1875. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1876. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1877. *
  1878. * NOTE: priv->mutex must be held before calling this function
  1879. */
  1880. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1881. {
  1882. unsigned long now = jiffies;
  1883. int ret;
  1884. ret = iwl4965_scan_cancel(priv);
  1885. if (ret && ms) {
  1886. mutex_unlock(&priv->mutex);
  1887. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1888. test_bit(STATUS_SCANNING, &priv->status))
  1889. msleep(1);
  1890. mutex_lock(&priv->mutex);
  1891. return test_bit(STATUS_SCANNING, &priv->status);
  1892. }
  1893. return ret;
  1894. }
  1895. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1896. {
  1897. /* Reset ieee stats */
  1898. /* We don't reset the net_device_stats (ieee->stats) on
  1899. * re-association */
  1900. priv->last_seq_num = -1;
  1901. priv->last_frag_num = -1;
  1902. priv->last_packet_time = 0;
  1903. iwl4965_scan_cancel(priv);
  1904. }
  1905. #define MAX_UCODE_BEACON_INTERVAL 4096
  1906. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1907. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1908. {
  1909. u16 new_val = 0;
  1910. u16 beacon_factor = 0;
  1911. beacon_factor =
  1912. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1913. / MAX_UCODE_BEACON_INTERVAL;
  1914. new_val = beacon_val / beacon_factor;
  1915. return cpu_to_le16(new_val);
  1916. }
  1917. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1918. {
  1919. u64 interval_tm_unit;
  1920. u64 tsf, result;
  1921. unsigned long flags;
  1922. struct ieee80211_conf *conf = NULL;
  1923. u16 beacon_int = 0;
  1924. conf = ieee80211_get_hw_conf(priv->hw);
  1925. spin_lock_irqsave(&priv->lock, flags);
  1926. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1927. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1928. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1929. tsf = priv->timestamp1;
  1930. tsf = ((tsf << 32) | priv->timestamp0);
  1931. beacon_int = priv->beacon_int;
  1932. spin_unlock_irqrestore(&priv->lock, flags);
  1933. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1934. if (beacon_int == 0) {
  1935. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1936. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1937. } else {
  1938. priv->rxon_timing.beacon_interval =
  1939. cpu_to_le16(beacon_int);
  1940. priv->rxon_timing.beacon_interval =
  1941. iwl4965_adjust_beacon_interval(
  1942. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1943. }
  1944. priv->rxon_timing.atim_window = 0;
  1945. } else {
  1946. priv->rxon_timing.beacon_interval =
  1947. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1948. /* TODO: we need to get atim_window from upper stack
  1949. * for now we set to 0 */
  1950. priv->rxon_timing.atim_window = 0;
  1951. }
  1952. interval_tm_unit =
  1953. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1954. result = do_div(tsf, interval_tm_unit);
  1955. priv->rxon_timing.beacon_init_val =
  1956. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1957. IWL_DEBUG_ASSOC
  1958. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1959. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1960. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1961. le16_to_cpu(priv->rxon_timing.atim_window));
  1962. }
  1963. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1964. {
  1965. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1966. IWL_ERROR("APs don't scan.\n");
  1967. return 0;
  1968. }
  1969. if (!iwl4965_is_ready_rf(priv)) {
  1970. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1971. return -EIO;
  1972. }
  1973. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1974. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1975. return -EAGAIN;
  1976. }
  1977. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1978. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1979. "Queuing.\n");
  1980. return -EAGAIN;
  1981. }
  1982. IWL_DEBUG_INFO("Starting scan...\n");
  1983. priv->scan_bands = 2;
  1984. set_bit(STATUS_SCANNING, &priv->status);
  1985. priv->scan_start = jiffies;
  1986. priv->scan_pass_start = priv->scan_start;
  1987. queue_work(priv->workqueue, &priv->request_scan);
  1988. return 0;
  1989. }
  1990. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1991. {
  1992. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1993. if (hw_decrypt)
  1994. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1995. else
  1996. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1997. return 0;
  1998. }
  1999. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  2000. enum ieee80211_band band)
  2001. {
  2002. if (band == IEEE80211_BAND_5GHZ) {
  2003. priv->staging_rxon.flags &=
  2004. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2005. | RXON_FLG_CCK_MSK);
  2006. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2007. } else {
  2008. /* Copied from iwl4965_bg_post_associate() */
  2009. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2010. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2011. else
  2012. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2013. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2014. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2015. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2016. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2017. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2018. }
  2019. }
  2020. /*
  2021. * initialize rxon structure with default values from eeprom
  2022. */
  2023. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2024. {
  2025. const struct iwl4965_channel_info *ch_info;
  2026. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2027. switch (priv->iw_mode) {
  2028. case IEEE80211_IF_TYPE_AP:
  2029. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2030. break;
  2031. case IEEE80211_IF_TYPE_STA:
  2032. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2033. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2034. break;
  2035. case IEEE80211_IF_TYPE_IBSS:
  2036. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2037. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2038. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2039. RXON_FILTER_ACCEPT_GRP_MSK;
  2040. break;
  2041. case IEEE80211_IF_TYPE_MNTR:
  2042. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2043. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2044. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2045. break;
  2046. }
  2047. #if 0
  2048. /* TODO: Figure out when short_preamble would be set and cache from
  2049. * that */
  2050. if (!hw_to_local(priv->hw)->short_preamble)
  2051. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2052. else
  2053. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2054. #endif
  2055. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2056. le16_to_cpu(priv->staging_rxon.channel));
  2057. if (!ch_info)
  2058. ch_info = &priv->channel_info[0];
  2059. /*
  2060. * in some case A channels are all non IBSS
  2061. * in this case force B/G channel
  2062. */
  2063. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2064. !(is_channel_ibss(ch_info)))
  2065. ch_info = &priv->channel_info[0];
  2066. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2067. priv->band = ch_info->band;
  2068. iwl4965_set_flags_for_phymode(priv, priv->band);
  2069. priv->staging_rxon.ofdm_basic_rates =
  2070. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2071. priv->staging_rxon.cck_basic_rates =
  2072. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2073. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2074. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2075. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2076. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2077. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2078. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2079. iwl4965_set_rxon_chain(priv);
  2080. }
  2081. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2082. {
  2083. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2084. const struct iwl4965_channel_info *ch_info;
  2085. ch_info = iwl4965_get_channel_info(priv,
  2086. priv->band,
  2087. le16_to_cpu(priv->staging_rxon.channel));
  2088. if (!ch_info || !is_channel_ibss(ch_info)) {
  2089. IWL_ERROR("channel %d not IBSS channel\n",
  2090. le16_to_cpu(priv->staging_rxon.channel));
  2091. return -EINVAL;
  2092. }
  2093. }
  2094. priv->iw_mode = mode;
  2095. iwl4965_connection_init_rx_config(priv);
  2096. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2097. iwl4965_clear_stations_table(priv);
  2098. /* dont commit rxon if rf-kill is on*/
  2099. if (!iwl4965_is_ready_rf(priv))
  2100. return -EAGAIN;
  2101. cancel_delayed_work(&priv->scan_check);
  2102. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2103. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2104. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2105. return -EAGAIN;
  2106. }
  2107. iwl4965_commit_rxon(priv);
  2108. return 0;
  2109. }
  2110. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2111. struct ieee80211_tx_control *ctl,
  2112. struct iwl4965_cmd *cmd,
  2113. struct sk_buff *skb_frag,
  2114. int last_frag)
  2115. {
  2116. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2117. switch (keyinfo->alg) {
  2118. case ALG_CCMP:
  2119. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2120. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2121. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2122. break;
  2123. case ALG_TKIP:
  2124. #if 0
  2125. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2126. if (last_frag)
  2127. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2128. 8);
  2129. else
  2130. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2131. #endif
  2132. break;
  2133. case ALG_WEP:
  2134. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2135. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2136. if (keyinfo->keylen == 13)
  2137. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2138. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2139. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2140. "with key %d\n", ctl->key_idx);
  2141. break;
  2142. default:
  2143. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2144. break;
  2145. }
  2146. }
  2147. /*
  2148. * handle build REPLY_TX command notification.
  2149. */
  2150. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2151. struct iwl4965_cmd *cmd,
  2152. struct ieee80211_tx_control *ctrl,
  2153. struct ieee80211_hdr *hdr,
  2154. int is_unicast, u8 std_id)
  2155. {
  2156. __le16 *qc;
  2157. u16 fc = le16_to_cpu(hdr->frame_control);
  2158. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2159. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2160. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2161. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2162. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2163. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2164. if (ieee80211_is_probe_response(fc) &&
  2165. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2166. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2167. } else {
  2168. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2169. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2170. }
  2171. if (ieee80211_is_back_request(fc))
  2172. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2173. cmd->cmd.tx.sta_id = std_id;
  2174. if (ieee80211_get_morefrag(hdr))
  2175. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2176. qc = ieee80211_get_qos_ctrl(hdr);
  2177. if (qc) {
  2178. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2179. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2180. } else
  2181. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2182. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2183. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2184. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2185. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2186. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2187. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2188. }
  2189. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2190. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2191. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2192. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2193. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2194. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2195. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2196. else
  2197. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2198. } else
  2199. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2200. cmd->cmd.tx.driver_txop = 0;
  2201. cmd->cmd.tx.tx_flags = tx_flags;
  2202. cmd->cmd.tx.next_frame_len = 0;
  2203. }
  2204. /**
  2205. * iwl4965_get_sta_id - Find station's index within station table
  2206. *
  2207. * If new IBSS station, create new entry in station table
  2208. */
  2209. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2210. struct ieee80211_hdr *hdr)
  2211. {
  2212. int sta_id;
  2213. u16 fc = le16_to_cpu(hdr->frame_control);
  2214. DECLARE_MAC_BUF(mac);
  2215. /* If this frame is broadcast or management, use broadcast station id */
  2216. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2217. is_multicast_ether_addr(hdr->addr1))
  2218. return priv->hw_setting.bcast_sta_id;
  2219. switch (priv->iw_mode) {
  2220. /* If we are a client station in a BSS network, use the special
  2221. * AP station entry (that's the only station we communicate with) */
  2222. case IEEE80211_IF_TYPE_STA:
  2223. return IWL_AP_ID;
  2224. /* If we are an AP, then find the station, or use BCAST */
  2225. case IEEE80211_IF_TYPE_AP:
  2226. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2227. if (sta_id != IWL_INVALID_STATION)
  2228. return sta_id;
  2229. return priv->hw_setting.bcast_sta_id;
  2230. /* If this frame is going out to an IBSS network, find the station,
  2231. * or create a new station table entry */
  2232. case IEEE80211_IF_TYPE_IBSS:
  2233. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2234. if (sta_id != IWL_INVALID_STATION)
  2235. return sta_id;
  2236. /* Create new station table entry */
  2237. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2238. 0, CMD_ASYNC, NULL);
  2239. if (sta_id != IWL_INVALID_STATION)
  2240. return sta_id;
  2241. IWL_DEBUG_DROP("Station %s not in station map. "
  2242. "Defaulting to broadcast...\n",
  2243. print_mac(mac, hdr->addr1));
  2244. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2245. return priv->hw_setting.bcast_sta_id;
  2246. default:
  2247. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2248. return priv->hw_setting.bcast_sta_id;
  2249. }
  2250. }
  2251. /*
  2252. * start REPLY_TX command process
  2253. */
  2254. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2255. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2256. {
  2257. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2258. struct iwl4965_tfd_frame *tfd;
  2259. u32 *control_flags;
  2260. int txq_id = ctl->queue;
  2261. struct iwl4965_tx_queue *txq = NULL;
  2262. struct iwl4965_queue *q = NULL;
  2263. dma_addr_t phys_addr;
  2264. dma_addr_t txcmd_phys;
  2265. dma_addr_t scratch_phys;
  2266. struct iwl4965_cmd *out_cmd = NULL;
  2267. u16 len, idx, len_org;
  2268. u8 id, hdr_len, unicast;
  2269. u8 sta_id;
  2270. u16 seq_number = 0;
  2271. u16 fc;
  2272. __le16 *qc;
  2273. u8 wait_write_ptr = 0;
  2274. unsigned long flags;
  2275. int rc;
  2276. spin_lock_irqsave(&priv->lock, flags);
  2277. if (iwl4965_is_rfkill(priv)) {
  2278. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2279. goto drop_unlock;
  2280. }
  2281. if (!priv->vif) {
  2282. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2283. goto drop_unlock;
  2284. }
  2285. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2286. IWL_ERROR("ERROR: No TX rate available.\n");
  2287. goto drop_unlock;
  2288. }
  2289. unicast = !is_multicast_ether_addr(hdr->addr1);
  2290. id = 0;
  2291. fc = le16_to_cpu(hdr->frame_control);
  2292. #ifdef CONFIG_IWL4965_DEBUG
  2293. if (ieee80211_is_auth(fc))
  2294. IWL_DEBUG_TX("Sending AUTH frame\n");
  2295. else if (ieee80211_is_assoc_request(fc))
  2296. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2297. else if (ieee80211_is_reassoc_request(fc))
  2298. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2299. #endif
  2300. /* drop all data frame if we are not associated */
  2301. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2302. (!iwl4965_is_associated(priv) ||
  2303. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2304. !priv->assoc_station_added)) {
  2305. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2306. goto drop_unlock;
  2307. }
  2308. spin_unlock_irqrestore(&priv->lock, flags);
  2309. hdr_len = ieee80211_get_hdrlen(fc);
  2310. /* Find (or create) index into station table for destination station */
  2311. sta_id = iwl4965_get_sta_id(priv, hdr);
  2312. if (sta_id == IWL_INVALID_STATION) {
  2313. DECLARE_MAC_BUF(mac);
  2314. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2315. print_mac(mac, hdr->addr1));
  2316. goto drop;
  2317. }
  2318. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2319. qc = ieee80211_get_qos_ctrl(hdr);
  2320. if (qc) {
  2321. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2322. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2323. IEEE80211_SCTL_SEQ;
  2324. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2325. (hdr->seq_ctrl &
  2326. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2327. seq_number += 0x10;
  2328. #ifdef CONFIG_IWL4965_HT
  2329. /* aggregation is on for this <sta,tid> */
  2330. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2331. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2332. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2333. #endif /* CONFIG_IWL4965_HT */
  2334. }
  2335. /* Descriptor for chosen Tx queue */
  2336. txq = &priv->txq[txq_id];
  2337. q = &txq->q;
  2338. spin_lock_irqsave(&priv->lock, flags);
  2339. /* Set up first empty TFD within this queue's circular TFD buffer */
  2340. tfd = &txq->bd[q->write_ptr];
  2341. memset(tfd, 0, sizeof(*tfd));
  2342. control_flags = (u32 *) tfd;
  2343. idx = get_cmd_index(q, q->write_ptr, 0);
  2344. /* Set up driver data for this TFD */
  2345. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2346. txq->txb[q->write_ptr].skb[0] = skb;
  2347. memcpy(&(txq->txb[q->write_ptr].status.control),
  2348. ctl, sizeof(struct ieee80211_tx_control));
  2349. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2350. out_cmd = &txq->cmd[idx];
  2351. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2352. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2353. /*
  2354. * Set up the Tx-command (not MAC!) header.
  2355. * Store the chosen Tx queue and TFD index within the sequence field;
  2356. * after Tx, uCode's Tx response will return this value so driver can
  2357. * locate the frame within the tx queue and do post-tx processing.
  2358. */
  2359. out_cmd->hdr.cmd = REPLY_TX;
  2360. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2361. INDEX_TO_SEQ(q->write_ptr)));
  2362. /* Copy MAC header from skb into command buffer */
  2363. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2364. /*
  2365. * Use the first empty entry in this queue's command buffer array
  2366. * to contain the Tx command and MAC header concatenated together
  2367. * (payload data will be in another buffer).
  2368. * Size of this varies, due to varying MAC header length.
  2369. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2370. * of the MAC header (device reads on dword boundaries).
  2371. * We'll tell device about this padding later.
  2372. */
  2373. len = priv->hw_setting.tx_cmd_len +
  2374. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2375. len_org = len;
  2376. len = (len + 3) & ~3;
  2377. if (len_org != len)
  2378. len_org = 1;
  2379. else
  2380. len_org = 0;
  2381. /* Physical address of this Tx command's header (not MAC header!),
  2382. * within command buffer array. */
  2383. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2384. offsetof(struct iwl4965_cmd, hdr);
  2385. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2386. * first entry */
  2387. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2388. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2389. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2390. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2391. * if any (802.11 null frames have no payload). */
  2392. len = skb->len - hdr_len;
  2393. if (len) {
  2394. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2395. len, PCI_DMA_TODEVICE);
  2396. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2397. }
  2398. /* Tell 4965 about any 2-byte padding after MAC header */
  2399. if (len_org)
  2400. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2401. /* Total # bytes to be transmitted */
  2402. len = (u16)skb->len;
  2403. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2404. /* TODO need this for burst mode later on */
  2405. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2406. /* set is_hcca to 0; it probably will never be implemented */
  2407. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2408. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2409. offsetof(struct iwl4965_tx_cmd, scratch);
  2410. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2411. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2412. if (!ieee80211_get_morefrag(hdr)) {
  2413. txq->need_update = 1;
  2414. if (qc) {
  2415. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2416. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2417. }
  2418. } else {
  2419. wait_write_ptr = 1;
  2420. txq->need_update = 0;
  2421. }
  2422. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2423. sizeof(out_cmd->cmd.tx));
  2424. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2425. ieee80211_get_hdrlen(fc));
  2426. /* Set up entry for this TFD in Tx byte-count array */
  2427. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2428. /* Tell device the write index *just past* this latest filled TFD */
  2429. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2430. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2431. spin_unlock_irqrestore(&priv->lock, flags);
  2432. if (rc)
  2433. return rc;
  2434. if ((iwl4965_queue_space(q) < q->high_mark)
  2435. && priv->mac80211_registered) {
  2436. if (wait_write_ptr) {
  2437. spin_lock_irqsave(&priv->lock, flags);
  2438. txq->need_update = 1;
  2439. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2440. spin_unlock_irqrestore(&priv->lock, flags);
  2441. }
  2442. ieee80211_stop_queue(priv->hw, ctl->queue);
  2443. }
  2444. return 0;
  2445. drop_unlock:
  2446. spin_unlock_irqrestore(&priv->lock, flags);
  2447. drop:
  2448. return -1;
  2449. }
  2450. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2451. {
  2452. const struct ieee80211_supported_band *hw = NULL;
  2453. struct ieee80211_rate *rate;
  2454. int i;
  2455. hw = iwl4965_get_hw_mode(priv, priv->band);
  2456. if (!hw) {
  2457. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2458. return;
  2459. }
  2460. priv->active_rate = 0;
  2461. priv->active_rate_basic = 0;
  2462. for (i = 0; i < hw->n_bitrates; i++) {
  2463. rate = &(hw->bitrates[i]);
  2464. if (rate->hw_value < IWL_RATE_COUNT)
  2465. priv->active_rate |= (1 << rate->hw_value);
  2466. }
  2467. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2468. priv->active_rate, priv->active_rate_basic);
  2469. /*
  2470. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2471. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2472. * OFDM
  2473. */
  2474. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2475. priv->staging_rxon.cck_basic_rates =
  2476. ((priv->active_rate_basic &
  2477. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2478. else
  2479. priv->staging_rxon.cck_basic_rates =
  2480. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2481. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2482. priv->staging_rxon.ofdm_basic_rates =
  2483. ((priv->active_rate_basic &
  2484. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2485. IWL_FIRST_OFDM_RATE) & 0xFF;
  2486. else
  2487. priv->staging_rxon.ofdm_basic_rates =
  2488. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2489. }
  2490. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2491. {
  2492. unsigned long flags;
  2493. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2494. return;
  2495. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2496. disable_radio ? "OFF" : "ON");
  2497. if (disable_radio) {
  2498. iwl4965_scan_cancel(priv);
  2499. /* FIXME: This is a workaround for AP */
  2500. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2501. spin_lock_irqsave(&priv->lock, flags);
  2502. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2503. CSR_UCODE_SW_BIT_RFKILL);
  2504. spin_unlock_irqrestore(&priv->lock, flags);
  2505. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2506. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2507. }
  2508. return;
  2509. }
  2510. spin_lock_irqsave(&priv->lock, flags);
  2511. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2512. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2513. spin_unlock_irqrestore(&priv->lock, flags);
  2514. /* wake up ucode */
  2515. msleep(10);
  2516. spin_lock_irqsave(&priv->lock, flags);
  2517. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2518. if (!iwl4965_grab_nic_access(priv))
  2519. iwl4965_release_nic_access(priv);
  2520. spin_unlock_irqrestore(&priv->lock, flags);
  2521. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2522. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2523. "disabled by HW switch\n");
  2524. return;
  2525. }
  2526. queue_work(priv->workqueue, &priv->restart);
  2527. return;
  2528. }
  2529. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2530. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2531. {
  2532. u16 fc =
  2533. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2534. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2535. return;
  2536. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2537. return;
  2538. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2539. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2540. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2541. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2542. RX_RES_STATUS_BAD_ICV_MIC)
  2543. stats->flag |= RX_FLAG_MMIC_ERROR;
  2544. case RX_RES_STATUS_SEC_TYPE_WEP:
  2545. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2546. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2547. RX_RES_STATUS_DECRYPT_OK) {
  2548. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2549. stats->flag |= RX_FLAG_DECRYPTED;
  2550. }
  2551. break;
  2552. default:
  2553. break;
  2554. }
  2555. }
  2556. #define IWL_PACKET_RETRY_TIME HZ
  2557. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2558. {
  2559. u16 sc = le16_to_cpu(header->seq_ctrl);
  2560. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2561. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2562. u16 *last_seq, *last_frag;
  2563. unsigned long *last_time;
  2564. switch (priv->iw_mode) {
  2565. case IEEE80211_IF_TYPE_IBSS:{
  2566. struct list_head *p;
  2567. struct iwl4965_ibss_seq *entry = NULL;
  2568. u8 *mac = header->addr2;
  2569. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2570. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2571. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2572. if (!compare_ether_addr(entry->mac, mac))
  2573. break;
  2574. }
  2575. if (p == &priv->ibss_mac_hash[index]) {
  2576. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2577. if (!entry) {
  2578. IWL_ERROR("Cannot malloc new mac entry\n");
  2579. return 0;
  2580. }
  2581. memcpy(entry->mac, mac, ETH_ALEN);
  2582. entry->seq_num = seq;
  2583. entry->frag_num = frag;
  2584. entry->packet_time = jiffies;
  2585. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2586. return 0;
  2587. }
  2588. last_seq = &entry->seq_num;
  2589. last_frag = &entry->frag_num;
  2590. last_time = &entry->packet_time;
  2591. break;
  2592. }
  2593. case IEEE80211_IF_TYPE_STA:
  2594. last_seq = &priv->last_seq_num;
  2595. last_frag = &priv->last_frag_num;
  2596. last_time = &priv->last_packet_time;
  2597. break;
  2598. default:
  2599. return 0;
  2600. }
  2601. if ((*last_seq == seq) &&
  2602. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2603. if (*last_frag == frag)
  2604. goto drop;
  2605. if (*last_frag + 1 != frag)
  2606. /* out-of-order fragment */
  2607. goto drop;
  2608. } else
  2609. *last_seq = seq;
  2610. *last_frag = frag;
  2611. *last_time = jiffies;
  2612. return 0;
  2613. drop:
  2614. return 1;
  2615. }
  2616. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2617. #include "iwl-spectrum.h"
  2618. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2619. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2620. #define TIME_UNIT 1024
  2621. /*
  2622. * extended beacon time format
  2623. * time in usec will be changed into a 32-bit value in 8:24 format
  2624. * the high 1 byte is the beacon counts
  2625. * the lower 3 bytes is the time in usec within one beacon interval
  2626. */
  2627. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2628. {
  2629. u32 quot;
  2630. u32 rem;
  2631. u32 interval = beacon_interval * 1024;
  2632. if (!interval || !usec)
  2633. return 0;
  2634. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2635. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2636. return (quot << 24) + rem;
  2637. }
  2638. /* base is usually what we get from ucode with each received frame,
  2639. * the same as HW timer counter counting down
  2640. */
  2641. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2642. {
  2643. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2644. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2645. u32 interval = beacon_interval * TIME_UNIT;
  2646. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2647. (addon & BEACON_TIME_MASK_HIGH);
  2648. if (base_low > addon_low)
  2649. res += base_low - addon_low;
  2650. else if (base_low < addon_low) {
  2651. res += interval + base_low - addon_low;
  2652. res += (1 << 24);
  2653. } else
  2654. res += (1 << 24);
  2655. return cpu_to_le32(res);
  2656. }
  2657. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2658. struct ieee80211_measurement_params *params,
  2659. u8 type)
  2660. {
  2661. struct iwl4965_spectrum_cmd spectrum;
  2662. struct iwl4965_rx_packet *res;
  2663. struct iwl4965_host_cmd cmd = {
  2664. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2665. .data = (void *)&spectrum,
  2666. .meta.flags = CMD_WANT_SKB,
  2667. };
  2668. u32 add_time = le64_to_cpu(params->start_time);
  2669. int rc;
  2670. int spectrum_resp_status;
  2671. int duration = le16_to_cpu(params->duration);
  2672. if (iwl4965_is_associated(priv))
  2673. add_time =
  2674. iwl4965_usecs_to_beacons(
  2675. le64_to_cpu(params->start_time) - priv->last_tsf,
  2676. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2677. memset(&spectrum, 0, sizeof(spectrum));
  2678. spectrum.channel_count = cpu_to_le16(1);
  2679. spectrum.flags =
  2680. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2681. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2682. cmd.len = sizeof(spectrum);
  2683. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2684. if (iwl4965_is_associated(priv))
  2685. spectrum.start_time =
  2686. iwl4965_add_beacon_time(priv->last_beacon_time,
  2687. add_time,
  2688. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2689. else
  2690. spectrum.start_time = 0;
  2691. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2692. spectrum.channels[0].channel = params->channel;
  2693. spectrum.channels[0].type = type;
  2694. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2695. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2696. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2697. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2698. if (rc)
  2699. return rc;
  2700. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2701. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2702. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2703. rc = -EIO;
  2704. }
  2705. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2706. switch (spectrum_resp_status) {
  2707. case 0: /* Command will be handled */
  2708. if (res->u.spectrum.id != 0xff) {
  2709. IWL_DEBUG_INFO
  2710. ("Replaced existing measurement: %d\n",
  2711. res->u.spectrum.id);
  2712. priv->measurement_status &= ~MEASUREMENT_READY;
  2713. }
  2714. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2715. rc = 0;
  2716. break;
  2717. case 1: /* Command will not be handled */
  2718. rc = -EAGAIN;
  2719. break;
  2720. }
  2721. dev_kfree_skb_any(cmd.meta.u.skb);
  2722. return rc;
  2723. }
  2724. #endif
  2725. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2726. struct iwl4965_tx_info *tx_sta)
  2727. {
  2728. tx_sta->status.ack_signal = 0;
  2729. tx_sta->status.excessive_retries = 0;
  2730. tx_sta->status.queue_length = 0;
  2731. tx_sta->status.queue_number = 0;
  2732. if (in_interrupt())
  2733. ieee80211_tx_status_irqsafe(priv->hw,
  2734. tx_sta->skb[0], &(tx_sta->status));
  2735. else
  2736. ieee80211_tx_status(priv->hw,
  2737. tx_sta->skb[0], &(tx_sta->status));
  2738. tx_sta->skb[0] = NULL;
  2739. }
  2740. /**
  2741. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2742. *
  2743. * When FW advances 'R' index, all entries between old and new 'R' index
  2744. * need to be reclaimed. As result, some free space forms. If there is
  2745. * enough free space (> low mark), wake the stack that feeds us.
  2746. */
  2747. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2748. {
  2749. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2750. struct iwl4965_queue *q = &txq->q;
  2751. int nfreed = 0;
  2752. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2753. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2754. "is out of range [0-%d] %d %d.\n", txq_id,
  2755. index, q->n_bd, q->write_ptr, q->read_ptr);
  2756. return 0;
  2757. }
  2758. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2759. q->read_ptr != index;
  2760. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2761. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2762. iwl4965_txstatus_to_ieee(priv,
  2763. &(txq->txb[txq->q.read_ptr]));
  2764. iwl4965_hw_txq_free_tfd(priv, txq);
  2765. } else if (nfreed > 1) {
  2766. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2767. q->write_ptr, q->read_ptr);
  2768. queue_work(priv->workqueue, &priv->restart);
  2769. }
  2770. nfreed++;
  2771. }
  2772. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2773. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2774. priv->mac80211_registered)
  2775. ieee80211_wake_queue(priv->hw, txq_id); */
  2776. return nfreed;
  2777. }
  2778. static int iwl4965_is_tx_success(u32 status)
  2779. {
  2780. status &= TX_STATUS_MSK;
  2781. return (status == TX_STATUS_SUCCESS)
  2782. || (status == TX_STATUS_DIRECT_DONE);
  2783. }
  2784. /******************************************************************************
  2785. *
  2786. * Generic RX handler implementations
  2787. *
  2788. ******************************************************************************/
  2789. #ifdef CONFIG_IWL4965_HT
  2790. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2791. struct ieee80211_hdr *hdr)
  2792. {
  2793. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2794. return IWL_AP_ID;
  2795. else {
  2796. u8 *da = ieee80211_get_DA(hdr);
  2797. return iwl4965_hw_find_station(priv, da);
  2798. }
  2799. }
  2800. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2801. struct iwl4965_priv *priv, int txq_id, int idx)
  2802. {
  2803. if (priv->txq[txq_id].txb[idx].skb[0])
  2804. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2805. txb[idx].skb[0]->data;
  2806. return NULL;
  2807. }
  2808. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2809. {
  2810. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2811. tx_resp->frame_count);
  2812. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2813. }
  2814. /**
  2815. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2816. */
  2817. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2818. struct iwl4965_ht_agg *agg,
  2819. struct iwl4965_tx_resp_agg *tx_resp,
  2820. u16 start_idx)
  2821. {
  2822. u16 status;
  2823. struct agg_tx_status *frame_status = &tx_resp->status;
  2824. struct ieee80211_tx_status *tx_status = NULL;
  2825. struct ieee80211_hdr *hdr = NULL;
  2826. int i, sh;
  2827. int txq_id, idx;
  2828. u16 seq;
  2829. if (agg->wait_for_ba)
  2830. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2831. agg->frame_count = tx_resp->frame_count;
  2832. agg->start_idx = start_idx;
  2833. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2834. agg->bitmap = 0;
  2835. /* # frames attempted by Tx command */
  2836. if (agg->frame_count == 1) {
  2837. /* Only one frame was attempted; no block-ack will arrive */
  2838. status = le16_to_cpu(frame_status[0].status);
  2839. seq = le16_to_cpu(frame_status[0].sequence);
  2840. idx = SEQ_TO_INDEX(seq);
  2841. txq_id = SEQ_TO_QUEUE(seq);
  2842. /* FIXME: code repetition */
  2843. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2844. agg->frame_count, agg->start_idx, idx);
  2845. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2846. tx_status->retry_count = tx_resp->failure_frame;
  2847. tx_status->queue_number = status & 0xff;
  2848. tx_status->queue_length = tx_resp->failure_rts;
  2849. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2850. tx_status->flags = iwl4965_is_tx_success(status)?
  2851. IEEE80211_TX_STATUS_ACK : 0;
  2852. iwl4965_hwrate_to_tx_control(priv,
  2853. le32_to_cpu(tx_resp->rate_n_flags),
  2854. &tx_status->control);
  2855. /* FIXME: code repetition end */
  2856. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2857. status & 0xff, tx_resp->failure_frame);
  2858. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2859. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2860. agg->wait_for_ba = 0;
  2861. } else {
  2862. /* Two or more frames were attempted; expect block-ack */
  2863. u64 bitmap = 0;
  2864. int start = agg->start_idx;
  2865. /* Construct bit-map of pending frames within Tx window */
  2866. for (i = 0; i < agg->frame_count; i++) {
  2867. u16 sc;
  2868. status = le16_to_cpu(frame_status[i].status);
  2869. seq = le16_to_cpu(frame_status[i].sequence);
  2870. idx = SEQ_TO_INDEX(seq);
  2871. txq_id = SEQ_TO_QUEUE(seq);
  2872. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2873. AGG_TX_STATE_ABORT_MSK))
  2874. continue;
  2875. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2876. agg->frame_count, txq_id, idx);
  2877. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2878. sc = le16_to_cpu(hdr->seq_ctrl);
  2879. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2880. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2881. " idx=%d, seq_idx=%d, seq=%d\n",
  2882. idx, SEQ_TO_SN(sc),
  2883. hdr->seq_ctrl);
  2884. return -1;
  2885. }
  2886. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2887. i, idx, SEQ_TO_SN(sc));
  2888. sh = idx - start;
  2889. if (sh > 64) {
  2890. sh = (start - idx) + 0xff;
  2891. bitmap = bitmap << sh;
  2892. sh = 0;
  2893. start = idx;
  2894. } else if (sh < -64)
  2895. sh = 0xff - (start - idx);
  2896. else if (sh < 0) {
  2897. sh = start - idx;
  2898. start = idx;
  2899. bitmap = bitmap << sh;
  2900. sh = 0;
  2901. }
  2902. bitmap |= (1 << sh);
  2903. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2904. start, (u32)(bitmap & 0xFFFFFFFF));
  2905. }
  2906. agg->bitmap = bitmap;
  2907. agg->start_idx = start;
  2908. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2909. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2910. agg->frame_count, agg->start_idx,
  2911. agg->bitmap);
  2912. if (bitmap)
  2913. agg->wait_for_ba = 1;
  2914. }
  2915. return 0;
  2916. }
  2917. #endif
  2918. /**
  2919. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2920. */
  2921. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2922. struct iwl4965_rx_mem_buffer *rxb)
  2923. {
  2924. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2925. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2926. int txq_id = SEQ_TO_QUEUE(sequence);
  2927. int index = SEQ_TO_INDEX(sequence);
  2928. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2929. struct ieee80211_tx_status *tx_status;
  2930. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2931. u32 status = le32_to_cpu(tx_resp->status);
  2932. #ifdef CONFIG_IWL4965_HT
  2933. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2934. struct ieee80211_hdr *hdr;
  2935. __le16 *qc;
  2936. #endif
  2937. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2938. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2939. "is out of range [0-%d] %d %d\n", txq_id,
  2940. index, txq->q.n_bd, txq->q.write_ptr,
  2941. txq->q.read_ptr);
  2942. return;
  2943. }
  2944. #ifdef CONFIG_IWL4965_HT
  2945. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2946. qc = ieee80211_get_qos_ctrl(hdr);
  2947. if (qc)
  2948. tid = le16_to_cpu(*qc) & 0xf;
  2949. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2950. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2951. IWL_ERROR("Station not known\n");
  2952. return;
  2953. }
  2954. if (txq->sched_retry) {
  2955. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2956. struct iwl4965_ht_agg *agg = NULL;
  2957. if (!qc)
  2958. return;
  2959. agg = &priv->stations[sta_id].tid[tid].agg;
  2960. iwl4965_tx_status_reply_tx(priv, agg,
  2961. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2962. if ((tx_resp->frame_count == 1) &&
  2963. !iwl4965_is_tx_success(status)) {
  2964. /* TODO: send BAR */
  2965. }
  2966. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2967. int freed;
  2968. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2969. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2970. "%d index %d\n", scd_ssn , index);
  2971. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2972. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2973. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2974. txq_id >= 0 && priv->mac80211_registered &&
  2975. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2976. ieee80211_wake_queue(priv->hw, txq_id);
  2977. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2978. }
  2979. } else {
  2980. #endif /* CONFIG_IWL4965_HT */
  2981. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2982. tx_status->retry_count = tx_resp->failure_frame;
  2983. tx_status->queue_number = status;
  2984. tx_status->queue_length = tx_resp->bt_kill_count;
  2985. tx_status->queue_length |= tx_resp->failure_rts;
  2986. tx_status->flags =
  2987. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2988. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2989. &tx_status->control);
  2990. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2991. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2992. status, le32_to_cpu(tx_resp->rate_n_flags),
  2993. tx_resp->failure_frame);
  2994. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2995. if (index != -1) {
  2996. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2997. #ifdef CONFIG_IWL4965_HT
  2998. if (tid != MAX_TID_COUNT)
  2999. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3000. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3001. (txq_id >= 0) &&
  3002. priv->mac80211_registered)
  3003. ieee80211_wake_queue(priv->hw, txq_id);
  3004. if (tid != MAX_TID_COUNT)
  3005. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3006. #endif
  3007. }
  3008. #ifdef CONFIG_IWL4965_HT
  3009. }
  3010. #endif /* CONFIG_IWL4965_HT */
  3011. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3012. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3013. }
  3014. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3015. struct iwl4965_rx_mem_buffer *rxb)
  3016. {
  3017. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3018. struct iwl4965_alive_resp *palive;
  3019. struct delayed_work *pwork;
  3020. palive = &pkt->u.alive_frame;
  3021. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3022. "0x%01X 0x%01X\n",
  3023. palive->is_valid, palive->ver_type,
  3024. palive->ver_subtype);
  3025. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3026. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3027. memcpy(&priv->card_alive_init,
  3028. &pkt->u.alive_frame,
  3029. sizeof(struct iwl4965_init_alive_resp));
  3030. pwork = &priv->init_alive_start;
  3031. } else {
  3032. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3033. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3034. sizeof(struct iwl4965_alive_resp));
  3035. pwork = &priv->alive_start;
  3036. }
  3037. /* We delay the ALIVE response by 5ms to
  3038. * give the HW RF Kill time to activate... */
  3039. if (palive->is_valid == UCODE_VALID_OK)
  3040. queue_delayed_work(priv->workqueue, pwork,
  3041. msecs_to_jiffies(5));
  3042. else
  3043. IWL_WARNING("uCode did not respond OK.\n");
  3044. }
  3045. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3046. struct iwl4965_rx_mem_buffer *rxb)
  3047. {
  3048. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3049. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3050. return;
  3051. }
  3052. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3053. struct iwl4965_rx_mem_buffer *rxb)
  3054. {
  3055. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3056. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3057. "seq 0x%04X ser 0x%08X\n",
  3058. le32_to_cpu(pkt->u.err_resp.error_type),
  3059. get_cmd_string(pkt->u.err_resp.cmd_id),
  3060. pkt->u.err_resp.cmd_id,
  3061. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3062. le32_to_cpu(pkt->u.err_resp.error_info));
  3063. }
  3064. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3065. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3066. {
  3067. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3068. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3069. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3070. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3071. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3072. rxon->channel = csa->channel;
  3073. priv->staging_rxon.channel = csa->channel;
  3074. }
  3075. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3076. struct iwl4965_rx_mem_buffer *rxb)
  3077. {
  3078. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3079. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3080. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3081. if (!report->state) {
  3082. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3083. "Spectrum Measure Notification: Start\n");
  3084. return;
  3085. }
  3086. memcpy(&priv->measure_report, report, sizeof(*report));
  3087. priv->measurement_status |= MEASUREMENT_READY;
  3088. #endif
  3089. }
  3090. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3091. struct iwl4965_rx_mem_buffer *rxb)
  3092. {
  3093. #ifdef CONFIG_IWL4965_DEBUG
  3094. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3095. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3096. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3097. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3098. #endif
  3099. }
  3100. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3101. struct iwl4965_rx_mem_buffer *rxb)
  3102. {
  3103. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3104. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3105. "notification for %s:\n",
  3106. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3107. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3108. }
  3109. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3110. {
  3111. struct iwl4965_priv *priv =
  3112. container_of(work, struct iwl4965_priv, beacon_update);
  3113. struct sk_buff *beacon;
  3114. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3115. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3116. if (!beacon) {
  3117. IWL_ERROR("update beacon failed\n");
  3118. return;
  3119. }
  3120. mutex_lock(&priv->mutex);
  3121. /* new beacon skb is allocated every time; dispose previous.*/
  3122. if (priv->ibss_beacon)
  3123. dev_kfree_skb(priv->ibss_beacon);
  3124. priv->ibss_beacon = beacon;
  3125. mutex_unlock(&priv->mutex);
  3126. iwl4965_send_beacon_cmd(priv);
  3127. }
  3128. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3129. struct iwl4965_rx_mem_buffer *rxb)
  3130. {
  3131. #ifdef CONFIG_IWL4965_DEBUG
  3132. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3133. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3134. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3135. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3136. "tsf %d %d rate %d\n",
  3137. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3138. beacon->beacon_notify_hdr.failure_frame,
  3139. le32_to_cpu(beacon->ibss_mgr_status),
  3140. le32_to_cpu(beacon->high_tsf),
  3141. le32_to_cpu(beacon->low_tsf), rate);
  3142. #endif
  3143. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3144. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3145. queue_work(priv->workqueue, &priv->beacon_update);
  3146. }
  3147. /* Service response to REPLY_SCAN_CMD (0x80) */
  3148. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3149. struct iwl4965_rx_mem_buffer *rxb)
  3150. {
  3151. #ifdef CONFIG_IWL4965_DEBUG
  3152. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3153. struct iwl4965_scanreq_notification *notif =
  3154. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3155. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3156. #endif
  3157. }
  3158. /* Service SCAN_START_NOTIFICATION (0x82) */
  3159. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3160. struct iwl4965_rx_mem_buffer *rxb)
  3161. {
  3162. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3163. struct iwl4965_scanstart_notification *notif =
  3164. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3165. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3166. IWL_DEBUG_SCAN("Scan start: "
  3167. "%d [802.11%s] "
  3168. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3169. notif->channel,
  3170. notif->band ? "bg" : "a",
  3171. notif->tsf_high,
  3172. notif->tsf_low, notif->status, notif->beacon_timer);
  3173. }
  3174. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3175. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3176. struct iwl4965_rx_mem_buffer *rxb)
  3177. {
  3178. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3179. struct iwl4965_scanresults_notification *notif =
  3180. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3181. IWL_DEBUG_SCAN("Scan ch.res: "
  3182. "%d [802.11%s] "
  3183. "(TSF: 0x%08X:%08X) - %d "
  3184. "elapsed=%lu usec (%dms since last)\n",
  3185. notif->channel,
  3186. notif->band ? "bg" : "a",
  3187. le32_to_cpu(notif->tsf_high),
  3188. le32_to_cpu(notif->tsf_low),
  3189. le32_to_cpu(notif->statistics[0]),
  3190. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3191. jiffies_to_msecs(elapsed_jiffies
  3192. (priv->last_scan_jiffies, jiffies)));
  3193. priv->last_scan_jiffies = jiffies;
  3194. priv->next_scan_jiffies = 0;
  3195. }
  3196. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3197. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3198. struct iwl4965_rx_mem_buffer *rxb)
  3199. {
  3200. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3201. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3202. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3203. scan_notif->scanned_channels,
  3204. scan_notif->tsf_low,
  3205. scan_notif->tsf_high, scan_notif->status);
  3206. /* The HW is no longer scanning */
  3207. clear_bit(STATUS_SCAN_HW, &priv->status);
  3208. /* The scan completion notification came in, so kill that timer... */
  3209. cancel_delayed_work(&priv->scan_check);
  3210. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3211. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3212. jiffies_to_msecs(elapsed_jiffies
  3213. (priv->scan_pass_start, jiffies)));
  3214. /* Remove this scanned band from the list
  3215. * of pending bands to scan */
  3216. priv->scan_bands--;
  3217. /* If a request to abort was given, or the scan did not succeed
  3218. * then we reset the scan state machine and terminate,
  3219. * re-queuing another scan if one has been requested */
  3220. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3221. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3222. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3223. } else {
  3224. /* If there are more bands on this scan pass reschedule */
  3225. if (priv->scan_bands > 0)
  3226. goto reschedule;
  3227. }
  3228. priv->last_scan_jiffies = jiffies;
  3229. priv->next_scan_jiffies = 0;
  3230. IWL_DEBUG_INFO("Setting scan to off\n");
  3231. clear_bit(STATUS_SCANNING, &priv->status);
  3232. IWL_DEBUG_INFO("Scan took %dms\n",
  3233. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3234. queue_work(priv->workqueue, &priv->scan_completed);
  3235. return;
  3236. reschedule:
  3237. priv->scan_pass_start = jiffies;
  3238. queue_work(priv->workqueue, &priv->request_scan);
  3239. }
  3240. /* Handle notification from uCode that card's power state is changing
  3241. * due to software, hardware, or critical temperature RFKILL */
  3242. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3243. struct iwl4965_rx_mem_buffer *rxb)
  3244. {
  3245. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3246. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3247. unsigned long status = priv->status;
  3248. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3249. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3250. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3251. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3252. RF_CARD_DISABLED)) {
  3253. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3254. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3255. if (!iwl4965_grab_nic_access(priv)) {
  3256. iwl4965_write_direct32(
  3257. priv, HBUS_TARG_MBX_C,
  3258. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3259. iwl4965_release_nic_access(priv);
  3260. }
  3261. if (!(flags & RXON_CARD_DISABLED)) {
  3262. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3263. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3264. if (!iwl4965_grab_nic_access(priv)) {
  3265. iwl4965_write_direct32(
  3266. priv, HBUS_TARG_MBX_C,
  3267. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3268. iwl4965_release_nic_access(priv);
  3269. }
  3270. }
  3271. if (flags & RF_CARD_DISABLED) {
  3272. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3273. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3274. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3275. if (!iwl4965_grab_nic_access(priv))
  3276. iwl4965_release_nic_access(priv);
  3277. }
  3278. }
  3279. if (flags & HW_CARD_DISABLED)
  3280. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3281. else
  3282. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3283. if (flags & SW_CARD_DISABLED)
  3284. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3285. else
  3286. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3287. if (!(flags & RXON_CARD_DISABLED))
  3288. iwl4965_scan_cancel(priv);
  3289. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3290. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3291. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3292. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3293. queue_work(priv->workqueue, &priv->rf_kill);
  3294. else
  3295. wake_up_interruptible(&priv->wait_command_queue);
  3296. }
  3297. /**
  3298. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3299. *
  3300. * Setup the RX handlers for each of the reply types sent from the uCode
  3301. * to the host.
  3302. *
  3303. * This function chains into the hardware specific files for them to setup
  3304. * any hardware specific handlers as well.
  3305. */
  3306. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3307. {
  3308. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3309. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3310. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3311. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3312. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3313. iwl4965_rx_spectrum_measure_notif;
  3314. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3315. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3316. iwl4965_rx_pm_debug_statistics_notif;
  3317. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3318. /*
  3319. * The same handler is used for both the REPLY to a discrete
  3320. * statistics request from the host as well as for the periodic
  3321. * statistics notifications (after received beacons) from the uCode.
  3322. */
  3323. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3324. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3325. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3326. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3327. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3328. iwl4965_rx_scan_results_notif;
  3329. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3330. iwl4965_rx_scan_complete_notif;
  3331. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3332. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3333. /* Set up hardware specific Rx handlers */
  3334. iwl4965_hw_rx_handler_setup(priv);
  3335. }
  3336. /**
  3337. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3338. * @rxb: Rx buffer to reclaim
  3339. *
  3340. * If an Rx buffer has an async callback associated with it the callback
  3341. * will be executed. The attached skb (if present) will only be freed
  3342. * if the callback returns 1
  3343. */
  3344. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3345. struct iwl4965_rx_mem_buffer *rxb)
  3346. {
  3347. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3348. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3349. int txq_id = SEQ_TO_QUEUE(sequence);
  3350. int index = SEQ_TO_INDEX(sequence);
  3351. int huge = sequence & SEQ_HUGE_FRAME;
  3352. int cmd_index;
  3353. struct iwl4965_cmd *cmd;
  3354. /* If a Tx command is being handled and it isn't in the actual
  3355. * command queue then there a command routing bug has been introduced
  3356. * in the queue management code. */
  3357. if (txq_id != IWL_CMD_QUEUE_NUM)
  3358. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3359. txq_id, pkt->hdr.cmd);
  3360. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3361. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3362. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3363. /* Input error checking is done when commands are added to queue. */
  3364. if (cmd->meta.flags & CMD_WANT_SKB) {
  3365. cmd->meta.source->u.skb = rxb->skb;
  3366. rxb->skb = NULL;
  3367. } else if (cmd->meta.u.callback &&
  3368. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3369. rxb->skb = NULL;
  3370. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3371. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3372. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3373. wake_up_interruptible(&priv->wait_command_queue);
  3374. }
  3375. }
  3376. /************************** RX-FUNCTIONS ****************************/
  3377. /*
  3378. * Rx theory of operation
  3379. *
  3380. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3381. * each of which point to Receive Buffers to be filled by 4965. These get
  3382. * used not only for Rx frames, but for any command response or notification
  3383. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3384. * of indexes into the circular buffer.
  3385. *
  3386. * Rx Queue Indexes
  3387. * The host/firmware share two index registers for managing the Rx buffers.
  3388. *
  3389. * The READ index maps to the first position that the firmware may be writing
  3390. * to -- the driver can read up to (but not including) this position and get
  3391. * good data.
  3392. * The READ index is managed by the firmware once the card is enabled.
  3393. *
  3394. * The WRITE index maps to the last position the driver has read from -- the
  3395. * position preceding WRITE is the last slot the firmware can place a packet.
  3396. *
  3397. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3398. * WRITE = READ.
  3399. *
  3400. * During initialization, the host sets up the READ queue position to the first
  3401. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3402. *
  3403. * When the firmware places a packet in a buffer, it will advance the READ index
  3404. * and fire the RX interrupt. The driver can then query the READ index and
  3405. * process as many packets as possible, moving the WRITE index forward as it
  3406. * resets the Rx queue buffers with new memory.
  3407. *
  3408. * The management in the driver is as follows:
  3409. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3410. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3411. * to replenish the iwl->rxq->rx_free.
  3412. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3413. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3414. * 'processed' and 'read' driver indexes as well)
  3415. * + A received packet is processed and handed to the kernel network stack,
  3416. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3417. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3418. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3419. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3420. * were enough free buffers and RX_STALLED is set it is cleared.
  3421. *
  3422. *
  3423. * Driver sequence:
  3424. *
  3425. * iwl4965_rx_queue_alloc() Allocates rx_free
  3426. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3427. * iwl4965_rx_queue_restock
  3428. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3429. * queue, updates firmware pointers, and updates
  3430. * the WRITE index. If insufficient rx_free buffers
  3431. * are available, schedules iwl4965_rx_replenish
  3432. *
  3433. * -- enable interrupts --
  3434. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3435. * READ INDEX, detaching the SKB from the pool.
  3436. * Moves the packet buffer from queue to rx_used.
  3437. * Calls iwl4965_rx_queue_restock to refill any empty
  3438. * slots.
  3439. * ...
  3440. *
  3441. */
  3442. /**
  3443. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3444. */
  3445. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3446. {
  3447. int s = q->read - q->write;
  3448. if (s <= 0)
  3449. s += RX_QUEUE_SIZE;
  3450. /* keep some buffer to not confuse full and empty queue */
  3451. s -= 2;
  3452. if (s < 0)
  3453. s = 0;
  3454. return s;
  3455. }
  3456. /**
  3457. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3458. */
  3459. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3460. {
  3461. u32 reg = 0;
  3462. int rc = 0;
  3463. unsigned long flags;
  3464. spin_lock_irqsave(&q->lock, flags);
  3465. if (q->need_update == 0)
  3466. goto exit_unlock;
  3467. /* If power-saving is in use, make sure device is awake */
  3468. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3469. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3470. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3471. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3472. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3473. goto exit_unlock;
  3474. }
  3475. rc = iwl4965_grab_nic_access(priv);
  3476. if (rc)
  3477. goto exit_unlock;
  3478. /* Device expects a multiple of 8 */
  3479. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3480. q->write & ~0x7);
  3481. iwl4965_release_nic_access(priv);
  3482. /* Else device is assumed to be awake */
  3483. } else
  3484. /* Device expects a multiple of 8 */
  3485. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3486. q->need_update = 0;
  3487. exit_unlock:
  3488. spin_unlock_irqrestore(&q->lock, flags);
  3489. return rc;
  3490. }
  3491. /**
  3492. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3493. */
  3494. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3495. dma_addr_t dma_addr)
  3496. {
  3497. return cpu_to_le32((u32)(dma_addr >> 8));
  3498. }
  3499. /**
  3500. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3501. *
  3502. * If there are slots in the RX queue that need to be restocked,
  3503. * and we have free pre-allocated buffers, fill the ranks as much
  3504. * as we can, pulling from rx_free.
  3505. *
  3506. * This moves the 'write' index forward to catch up with 'processed', and
  3507. * also updates the memory address in the firmware to reference the new
  3508. * target buffer.
  3509. */
  3510. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3511. {
  3512. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3513. struct list_head *element;
  3514. struct iwl4965_rx_mem_buffer *rxb;
  3515. unsigned long flags;
  3516. int write, rc;
  3517. spin_lock_irqsave(&rxq->lock, flags);
  3518. write = rxq->write & ~0x7;
  3519. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3520. /* Get next free Rx buffer, remove from free list */
  3521. element = rxq->rx_free.next;
  3522. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3523. list_del(element);
  3524. /* Point to Rx buffer via next RBD in circular buffer */
  3525. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3526. rxq->queue[rxq->write] = rxb;
  3527. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3528. rxq->free_count--;
  3529. }
  3530. spin_unlock_irqrestore(&rxq->lock, flags);
  3531. /* If the pre-allocated buffer pool is dropping low, schedule to
  3532. * refill it */
  3533. if (rxq->free_count <= RX_LOW_WATERMARK)
  3534. queue_work(priv->workqueue, &priv->rx_replenish);
  3535. /* If we've added more space for the firmware to place data, tell it.
  3536. * Increment device's write pointer in multiples of 8. */
  3537. if ((write != (rxq->write & ~0x7))
  3538. || (abs(rxq->write - rxq->read) > 7)) {
  3539. spin_lock_irqsave(&rxq->lock, flags);
  3540. rxq->need_update = 1;
  3541. spin_unlock_irqrestore(&rxq->lock, flags);
  3542. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3543. if (rc)
  3544. return rc;
  3545. }
  3546. return 0;
  3547. }
  3548. /**
  3549. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3550. *
  3551. * When moving to rx_free an SKB is allocated for the slot.
  3552. *
  3553. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3554. * This is called as a scheduled work item (except for during initialization)
  3555. */
  3556. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3557. {
  3558. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3559. struct list_head *element;
  3560. struct iwl4965_rx_mem_buffer *rxb;
  3561. unsigned long flags;
  3562. spin_lock_irqsave(&rxq->lock, flags);
  3563. while (!list_empty(&rxq->rx_used)) {
  3564. element = rxq->rx_used.next;
  3565. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3566. /* Alloc a new receive buffer */
  3567. rxb->skb =
  3568. alloc_skb(priv->hw_setting.rx_buf_size,
  3569. __GFP_NOWARN | GFP_ATOMIC);
  3570. if (!rxb->skb) {
  3571. if (net_ratelimit())
  3572. printk(KERN_CRIT DRV_NAME
  3573. ": Can not allocate SKB buffers\n");
  3574. /* We don't reschedule replenish work here -- we will
  3575. * call the restock method and if it still needs
  3576. * more buffers it will schedule replenish */
  3577. break;
  3578. }
  3579. priv->alloc_rxb_skb++;
  3580. list_del(element);
  3581. /* Get physical address of RB/SKB */
  3582. rxb->dma_addr =
  3583. pci_map_single(priv->pci_dev, rxb->skb->data,
  3584. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3585. list_add_tail(&rxb->list, &rxq->rx_free);
  3586. rxq->free_count++;
  3587. }
  3588. spin_unlock_irqrestore(&rxq->lock, flags);
  3589. }
  3590. /*
  3591. * this should be called while priv->lock is locked
  3592. */
  3593. static void __iwl4965_rx_replenish(void *data)
  3594. {
  3595. struct iwl4965_priv *priv = data;
  3596. iwl4965_rx_allocate(priv);
  3597. iwl4965_rx_queue_restock(priv);
  3598. }
  3599. void iwl4965_rx_replenish(void *data)
  3600. {
  3601. struct iwl4965_priv *priv = data;
  3602. unsigned long flags;
  3603. iwl4965_rx_allocate(priv);
  3604. spin_lock_irqsave(&priv->lock, flags);
  3605. iwl4965_rx_queue_restock(priv);
  3606. spin_unlock_irqrestore(&priv->lock, flags);
  3607. }
  3608. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3609. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3610. * This free routine walks the list of POOL entries and if SKB is set to
  3611. * non NULL it is unmapped and freed
  3612. */
  3613. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3614. {
  3615. int i;
  3616. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3617. if (rxq->pool[i].skb != NULL) {
  3618. pci_unmap_single(priv->pci_dev,
  3619. rxq->pool[i].dma_addr,
  3620. priv->hw_setting.rx_buf_size,
  3621. PCI_DMA_FROMDEVICE);
  3622. dev_kfree_skb(rxq->pool[i].skb);
  3623. }
  3624. }
  3625. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3626. rxq->dma_addr);
  3627. rxq->bd = NULL;
  3628. }
  3629. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3630. {
  3631. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3632. struct pci_dev *dev = priv->pci_dev;
  3633. int i;
  3634. spin_lock_init(&rxq->lock);
  3635. INIT_LIST_HEAD(&rxq->rx_free);
  3636. INIT_LIST_HEAD(&rxq->rx_used);
  3637. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3638. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3639. if (!rxq->bd)
  3640. return -ENOMEM;
  3641. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3642. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3643. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3644. /* Set us so that we have processed and used all buffers, but have
  3645. * not restocked the Rx queue with fresh buffers */
  3646. rxq->read = rxq->write = 0;
  3647. rxq->free_count = 0;
  3648. rxq->need_update = 0;
  3649. return 0;
  3650. }
  3651. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3652. {
  3653. unsigned long flags;
  3654. int i;
  3655. spin_lock_irqsave(&rxq->lock, flags);
  3656. INIT_LIST_HEAD(&rxq->rx_free);
  3657. INIT_LIST_HEAD(&rxq->rx_used);
  3658. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3659. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3660. /* In the reset function, these buffers may have been allocated
  3661. * to an SKB, so we need to unmap and free potential storage */
  3662. if (rxq->pool[i].skb != NULL) {
  3663. pci_unmap_single(priv->pci_dev,
  3664. rxq->pool[i].dma_addr,
  3665. priv->hw_setting.rx_buf_size,
  3666. PCI_DMA_FROMDEVICE);
  3667. priv->alloc_rxb_skb--;
  3668. dev_kfree_skb(rxq->pool[i].skb);
  3669. rxq->pool[i].skb = NULL;
  3670. }
  3671. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3672. }
  3673. /* Set us so that we have processed and used all buffers, but have
  3674. * not restocked the Rx queue with fresh buffers */
  3675. rxq->read = rxq->write = 0;
  3676. rxq->free_count = 0;
  3677. spin_unlock_irqrestore(&rxq->lock, flags);
  3678. }
  3679. /* Convert linear signal-to-noise ratio into dB */
  3680. static u8 ratio2dB[100] = {
  3681. /* 0 1 2 3 4 5 6 7 8 9 */
  3682. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3683. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3684. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3685. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3686. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3687. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3688. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3689. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3690. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3691. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3692. };
  3693. /* Calculates a relative dB value from a ratio of linear
  3694. * (i.e. not dB) signal levels.
  3695. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3696. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3697. {
  3698. /* 1000:1 or higher just report as 60 dB */
  3699. if (sig_ratio >= 1000)
  3700. return 60;
  3701. /* 100:1 or higher, divide by 10 and use table,
  3702. * add 20 dB to make up for divide by 10 */
  3703. if (sig_ratio >= 100)
  3704. return (20 + (int)ratio2dB[sig_ratio/10]);
  3705. /* We shouldn't see this */
  3706. if (sig_ratio < 1)
  3707. return 0;
  3708. /* Use table for ratios 1:1 - 99:1 */
  3709. return (int)ratio2dB[sig_ratio];
  3710. }
  3711. #define PERFECT_RSSI (-20) /* dBm */
  3712. #define WORST_RSSI (-95) /* dBm */
  3713. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3714. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3715. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3716. * about formulas used below. */
  3717. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3718. {
  3719. int sig_qual;
  3720. int degradation = PERFECT_RSSI - rssi_dbm;
  3721. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3722. * as indicator; formula is (signal dbm - noise dbm).
  3723. * SNR at or above 40 is a great signal (100%).
  3724. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3725. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3726. if (noise_dbm) {
  3727. if (rssi_dbm - noise_dbm >= 40)
  3728. return 100;
  3729. else if (rssi_dbm < noise_dbm)
  3730. return 0;
  3731. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3732. /* Else use just the signal level.
  3733. * This formula is a least squares fit of data points collected and
  3734. * compared with a reference system that had a percentage (%) display
  3735. * for signal quality. */
  3736. } else
  3737. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3738. (15 * RSSI_RANGE + 62 * degradation)) /
  3739. (RSSI_RANGE * RSSI_RANGE);
  3740. if (sig_qual > 100)
  3741. sig_qual = 100;
  3742. else if (sig_qual < 1)
  3743. sig_qual = 0;
  3744. return sig_qual;
  3745. }
  3746. /**
  3747. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3748. *
  3749. * Uses the priv->rx_handlers callback function array to invoke
  3750. * the appropriate handlers, including command responses,
  3751. * frame-received notifications, and other notifications.
  3752. */
  3753. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3754. {
  3755. struct iwl4965_rx_mem_buffer *rxb;
  3756. struct iwl4965_rx_packet *pkt;
  3757. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3758. u32 r, i;
  3759. int reclaim;
  3760. unsigned long flags;
  3761. u8 fill_rx = 0;
  3762. u32 count = 8;
  3763. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3764. * buffer that the driver may process (last buffer filled by ucode). */
  3765. r = iwl4965_hw_get_rx_read(priv);
  3766. i = rxq->read;
  3767. /* Rx interrupt, but nothing sent from uCode */
  3768. if (i == r)
  3769. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3770. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3771. fill_rx = 1;
  3772. while (i != r) {
  3773. rxb = rxq->queue[i];
  3774. /* If an RXB doesn't have a Rx queue slot associated with it,
  3775. * then a bug has been introduced in the queue refilling
  3776. * routines -- catch it here */
  3777. BUG_ON(rxb == NULL);
  3778. rxq->queue[i] = NULL;
  3779. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3780. priv->hw_setting.rx_buf_size,
  3781. PCI_DMA_FROMDEVICE);
  3782. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3783. /* Reclaim a command buffer only if this packet is a response
  3784. * to a (driver-originated) command.
  3785. * If the packet (e.g. Rx frame) originated from uCode,
  3786. * there is no command buffer to reclaim.
  3787. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3788. * but apparently a few don't get set; catch them here. */
  3789. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3790. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3791. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3792. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3793. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3794. (pkt->hdr.cmd != REPLY_TX);
  3795. /* Based on type of command response or notification,
  3796. * handle those that need handling via function in
  3797. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3798. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3799. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3800. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3801. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3802. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3803. } else {
  3804. /* No handling needed */
  3805. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3806. "r %d i %d No handler needed for %s, 0x%02x\n",
  3807. r, i, get_cmd_string(pkt->hdr.cmd),
  3808. pkt->hdr.cmd);
  3809. }
  3810. if (reclaim) {
  3811. /* Invoke any callbacks, transfer the skb to caller, and
  3812. * fire off the (possibly) blocking iwl4965_send_cmd()
  3813. * as we reclaim the driver command queue */
  3814. if (rxb && rxb->skb)
  3815. iwl4965_tx_cmd_complete(priv, rxb);
  3816. else
  3817. IWL_WARNING("Claim null rxb?\n");
  3818. }
  3819. /* For now we just don't re-use anything. We can tweak this
  3820. * later to try and re-use notification packets and SKBs that
  3821. * fail to Rx correctly */
  3822. if (rxb->skb != NULL) {
  3823. priv->alloc_rxb_skb--;
  3824. dev_kfree_skb_any(rxb->skb);
  3825. rxb->skb = NULL;
  3826. }
  3827. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3828. priv->hw_setting.rx_buf_size,
  3829. PCI_DMA_FROMDEVICE);
  3830. spin_lock_irqsave(&rxq->lock, flags);
  3831. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3832. spin_unlock_irqrestore(&rxq->lock, flags);
  3833. i = (i + 1) & RX_QUEUE_MASK;
  3834. /* If there are a lot of unused frames,
  3835. * restock the Rx queue so ucode wont assert. */
  3836. if (fill_rx) {
  3837. count++;
  3838. if (count >= 8) {
  3839. priv->rxq.read = i;
  3840. __iwl4965_rx_replenish(priv);
  3841. count = 0;
  3842. }
  3843. }
  3844. }
  3845. /* Backtrack one entry */
  3846. priv->rxq.read = i;
  3847. iwl4965_rx_queue_restock(priv);
  3848. }
  3849. /**
  3850. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3851. */
  3852. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3853. struct iwl4965_tx_queue *txq)
  3854. {
  3855. u32 reg = 0;
  3856. int rc = 0;
  3857. int txq_id = txq->q.id;
  3858. if (txq->need_update == 0)
  3859. return rc;
  3860. /* if we're trying to save power */
  3861. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3862. /* wake up nic if it's powered down ...
  3863. * uCode will wake up, and interrupt us again, so next
  3864. * time we'll skip this part. */
  3865. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3866. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3867. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3868. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3869. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3870. return rc;
  3871. }
  3872. /* restore this queue's parameters in nic hardware. */
  3873. rc = iwl4965_grab_nic_access(priv);
  3874. if (rc)
  3875. return rc;
  3876. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3877. txq->q.write_ptr | (txq_id << 8));
  3878. iwl4965_release_nic_access(priv);
  3879. /* else not in power-save mode, uCode will never sleep when we're
  3880. * trying to tx (during RFKILL, we're not trying to tx). */
  3881. } else
  3882. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3883. txq->q.write_ptr | (txq_id << 8));
  3884. txq->need_update = 0;
  3885. return rc;
  3886. }
  3887. #ifdef CONFIG_IWL4965_DEBUG
  3888. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3889. {
  3890. DECLARE_MAC_BUF(mac);
  3891. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3892. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3893. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3894. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3895. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3896. le32_to_cpu(rxon->filter_flags));
  3897. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3898. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3899. rxon->ofdm_basic_rates);
  3900. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3901. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3902. print_mac(mac, rxon->node_addr));
  3903. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3904. print_mac(mac, rxon->bssid_addr));
  3905. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3906. }
  3907. #endif
  3908. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3909. {
  3910. IWL_DEBUG_ISR("Enabling interrupts\n");
  3911. set_bit(STATUS_INT_ENABLED, &priv->status);
  3912. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3913. }
  3914. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3915. {
  3916. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3917. /* disable interrupts from uCode/NIC to host */
  3918. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3919. /* acknowledge/clear/reset any interrupts still pending
  3920. * from uCode or flow handler (Rx/Tx DMA) */
  3921. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3922. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3923. IWL_DEBUG_ISR("Disabled interrupts\n");
  3924. }
  3925. static const char *desc_lookup(int i)
  3926. {
  3927. switch (i) {
  3928. case 1:
  3929. return "FAIL";
  3930. case 2:
  3931. return "BAD_PARAM";
  3932. case 3:
  3933. return "BAD_CHECKSUM";
  3934. case 4:
  3935. return "NMI_INTERRUPT";
  3936. case 5:
  3937. return "SYSASSERT";
  3938. case 6:
  3939. return "FATAL_ERROR";
  3940. }
  3941. return "UNKNOWN";
  3942. }
  3943. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3944. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3945. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3946. {
  3947. u32 data2, line;
  3948. u32 desc, time, count, base, data1;
  3949. u32 blink1, blink2, ilink1, ilink2;
  3950. int rc;
  3951. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3952. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3953. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3954. return;
  3955. }
  3956. rc = iwl4965_grab_nic_access(priv);
  3957. if (rc) {
  3958. IWL_WARNING("Can not read from adapter at this time.\n");
  3959. return;
  3960. }
  3961. count = iwl4965_read_targ_mem(priv, base);
  3962. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3963. IWL_ERROR("Start IWL Error Log Dump:\n");
  3964. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3965. }
  3966. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3967. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3968. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3969. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3970. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3971. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3972. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3973. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3974. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3975. IWL_ERROR("Desc Time "
  3976. "data1 data2 line\n");
  3977. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3978. desc_lookup(desc), desc, time, data1, data2, line);
  3979. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3980. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3981. ilink1, ilink2);
  3982. iwl4965_release_nic_access(priv);
  3983. }
  3984. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3985. /**
  3986. * iwl4965_print_event_log - Dump error event log to syslog
  3987. *
  3988. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3989. */
  3990. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3991. u32 num_events, u32 mode)
  3992. {
  3993. u32 i;
  3994. u32 base; /* SRAM byte address of event log header */
  3995. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3996. u32 ptr; /* SRAM byte address of log data */
  3997. u32 ev, time, data; /* event log data */
  3998. if (num_events == 0)
  3999. return;
  4000. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4001. if (mode == 0)
  4002. event_size = 2 * sizeof(u32);
  4003. else
  4004. event_size = 3 * sizeof(u32);
  4005. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4006. /* "time" is actually "data" for mode 0 (no timestamp).
  4007. * place event id # at far right for easier visual parsing. */
  4008. for (i = 0; i < num_events; i++) {
  4009. ev = iwl4965_read_targ_mem(priv, ptr);
  4010. ptr += sizeof(u32);
  4011. time = iwl4965_read_targ_mem(priv, ptr);
  4012. ptr += sizeof(u32);
  4013. if (mode == 0)
  4014. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4015. else {
  4016. data = iwl4965_read_targ_mem(priv, ptr);
  4017. ptr += sizeof(u32);
  4018. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4019. }
  4020. }
  4021. }
  4022. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4023. {
  4024. int rc;
  4025. u32 base; /* SRAM byte address of event log header */
  4026. u32 capacity; /* event log capacity in # entries */
  4027. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4028. u32 num_wraps; /* # times uCode wrapped to top of log */
  4029. u32 next_entry; /* index of next entry to be written by uCode */
  4030. u32 size; /* # entries that we'll print */
  4031. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4032. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4033. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4034. return;
  4035. }
  4036. rc = iwl4965_grab_nic_access(priv);
  4037. if (rc) {
  4038. IWL_WARNING("Can not read from adapter at this time.\n");
  4039. return;
  4040. }
  4041. /* event log header */
  4042. capacity = iwl4965_read_targ_mem(priv, base);
  4043. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4044. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4045. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4046. size = num_wraps ? capacity : next_entry;
  4047. /* bail out if nothing in log */
  4048. if (size == 0) {
  4049. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4050. iwl4965_release_nic_access(priv);
  4051. return;
  4052. }
  4053. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4054. size, num_wraps);
  4055. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4056. * i.e the next one that uCode would fill. */
  4057. if (num_wraps)
  4058. iwl4965_print_event_log(priv, next_entry,
  4059. capacity - next_entry, mode);
  4060. /* (then/else) start at top of log */
  4061. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4062. iwl4965_release_nic_access(priv);
  4063. }
  4064. /**
  4065. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4066. */
  4067. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4068. {
  4069. /* Set the FW error flag -- cleared on iwl4965_down */
  4070. set_bit(STATUS_FW_ERROR, &priv->status);
  4071. /* Cancel currently queued command. */
  4072. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4073. #ifdef CONFIG_IWL4965_DEBUG
  4074. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4075. iwl4965_dump_nic_error_log(priv);
  4076. iwl4965_dump_nic_event_log(priv);
  4077. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4078. }
  4079. #endif
  4080. wake_up_interruptible(&priv->wait_command_queue);
  4081. /* Keep the restart process from trying to send host
  4082. * commands by clearing the INIT status bit */
  4083. clear_bit(STATUS_READY, &priv->status);
  4084. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4085. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4086. "Restarting adapter due to uCode error.\n");
  4087. if (iwl4965_is_associated(priv)) {
  4088. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4089. sizeof(priv->recovery_rxon));
  4090. priv->error_recovering = 1;
  4091. }
  4092. queue_work(priv->workqueue, &priv->restart);
  4093. }
  4094. }
  4095. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4096. {
  4097. unsigned long flags;
  4098. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4099. sizeof(priv->staging_rxon));
  4100. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4101. iwl4965_commit_rxon(priv);
  4102. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4103. spin_lock_irqsave(&priv->lock, flags);
  4104. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4105. priv->error_recovering = 0;
  4106. spin_unlock_irqrestore(&priv->lock, flags);
  4107. }
  4108. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4109. {
  4110. u32 inta, handled = 0;
  4111. u32 inta_fh;
  4112. unsigned long flags;
  4113. #ifdef CONFIG_IWL4965_DEBUG
  4114. u32 inta_mask;
  4115. #endif
  4116. spin_lock_irqsave(&priv->lock, flags);
  4117. /* Ack/clear/reset pending uCode interrupts.
  4118. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4119. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4120. inta = iwl4965_read32(priv, CSR_INT);
  4121. iwl4965_write32(priv, CSR_INT, inta);
  4122. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4123. * Any new interrupts that happen after this, either while we're
  4124. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4125. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4126. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4127. #ifdef CONFIG_IWL4965_DEBUG
  4128. if (iwl4965_debug_level & IWL_DL_ISR) {
  4129. /* just for debug */
  4130. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4131. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4132. inta, inta_mask, inta_fh);
  4133. }
  4134. #endif
  4135. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4136. * atomic, make sure that inta covers all the interrupts that
  4137. * we've discovered, even if FH interrupt came in just after
  4138. * reading CSR_INT. */
  4139. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4140. inta |= CSR_INT_BIT_FH_RX;
  4141. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4142. inta |= CSR_INT_BIT_FH_TX;
  4143. /* Now service all interrupt bits discovered above. */
  4144. if (inta & CSR_INT_BIT_HW_ERR) {
  4145. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4146. /* Tell the device to stop sending interrupts */
  4147. iwl4965_disable_interrupts(priv);
  4148. iwl4965_irq_handle_error(priv);
  4149. handled |= CSR_INT_BIT_HW_ERR;
  4150. spin_unlock_irqrestore(&priv->lock, flags);
  4151. return;
  4152. }
  4153. #ifdef CONFIG_IWL4965_DEBUG
  4154. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4155. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4156. if (inta & CSR_INT_BIT_SCD)
  4157. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4158. "the frame/frames.\n");
  4159. /* Alive notification via Rx interrupt will do the real work */
  4160. if (inta & CSR_INT_BIT_ALIVE)
  4161. IWL_DEBUG_ISR("Alive interrupt\n");
  4162. }
  4163. #endif
  4164. /* Safely ignore these bits for debug checks below */
  4165. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4166. /* HW RF KILL switch toggled */
  4167. if (inta & CSR_INT_BIT_RF_KILL) {
  4168. int hw_rf_kill = 0;
  4169. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4170. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4171. hw_rf_kill = 1;
  4172. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4173. "RF_KILL bit toggled to %s.\n",
  4174. hw_rf_kill ? "disable radio":"enable radio");
  4175. /* Queue restart only if RF_KILL switch was set to "kill"
  4176. * when we loaded driver, and is now set to "enable".
  4177. * After we're Alive, RF_KILL gets handled by
  4178. * iwl4965_rx_card_state_notif() */
  4179. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4180. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4181. queue_work(priv->workqueue, &priv->restart);
  4182. }
  4183. handled |= CSR_INT_BIT_RF_KILL;
  4184. }
  4185. /* Chip got too hot and stopped itself */
  4186. if (inta & CSR_INT_BIT_CT_KILL) {
  4187. IWL_ERROR("Microcode CT kill error detected.\n");
  4188. handled |= CSR_INT_BIT_CT_KILL;
  4189. }
  4190. /* Error detected by uCode */
  4191. if (inta & CSR_INT_BIT_SW_ERR) {
  4192. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4193. inta);
  4194. iwl4965_irq_handle_error(priv);
  4195. handled |= CSR_INT_BIT_SW_ERR;
  4196. }
  4197. /* uCode wakes up after power-down sleep */
  4198. if (inta & CSR_INT_BIT_WAKEUP) {
  4199. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4200. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4201. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4202. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4203. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4204. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4205. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4206. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4207. handled |= CSR_INT_BIT_WAKEUP;
  4208. }
  4209. /* All uCode command responses, including Tx command responses,
  4210. * Rx "responses" (frame-received notification), and other
  4211. * notifications from uCode come through here*/
  4212. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4213. iwl4965_rx_handle(priv);
  4214. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4215. }
  4216. if (inta & CSR_INT_BIT_FH_TX) {
  4217. IWL_DEBUG_ISR("Tx interrupt\n");
  4218. handled |= CSR_INT_BIT_FH_TX;
  4219. }
  4220. if (inta & ~handled)
  4221. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4222. if (inta & ~CSR_INI_SET_MASK) {
  4223. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4224. inta & ~CSR_INI_SET_MASK);
  4225. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4226. }
  4227. /* Re-enable all interrupts */
  4228. iwl4965_enable_interrupts(priv);
  4229. #ifdef CONFIG_IWL4965_DEBUG
  4230. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4231. inta = iwl4965_read32(priv, CSR_INT);
  4232. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4233. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4234. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4235. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4236. }
  4237. #endif
  4238. spin_unlock_irqrestore(&priv->lock, flags);
  4239. }
  4240. static irqreturn_t iwl4965_isr(int irq, void *data)
  4241. {
  4242. struct iwl4965_priv *priv = data;
  4243. u32 inta, inta_mask;
  4244. u32 inta_fh;
  4245. if (!priv)
  4246. return IRQ_NONE;
  4247. spin_lock(&priv->lock);
  4248. /* Disable (but don't clear!) interrupts here to avoid
  4249. * back-to-back ISRs and sporadic interrupts from our NIC.
  4250. * If we have something to service, the tasklet will re-enable ints.
  4251. * If we *don't* have something, we'll re-enable before leaving here. */
  4252. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4253. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4254. /* Discover which interrupts are active/pending */
  4255. inta = iwl4965_read32(priv, CSR_INT);
  4256. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4257. /* Ignore interrupt if there's nothing in NIC to service.
  4258. * This may be due to IRQ shared with another device,
  4259. * or due to sporadic interrupts thrown from our NIC. */
  4260. if (!inta && !inta_fh) {
  4261. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4262. goto none;
  4263. }
  4264. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4265. /* Hardware disappeared. It might have already raised
  4266. * an interrupt */
  4267. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4268. goto unplugged;
  4269. }
  4270. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4271. inta, inta_mask, inta_fh);
  4272. inta &= ~CSR_INT_BIT_SCD;
  4273. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4274. if (likely(inta || inta_fh))
  4275. tasklet_schedule(&priv->irq_tasklet);
  4276. unplugged:
  4277. spin_unlock(&priv->lock);
  4278. return IRQ_HANDLED;
  4279. none:
  4280. /* re-enable interrupts here since we don't have anything to service. */
  4281. iwl4965_enable_interrupts(priv);
  4282. spin_unlock(&priv->lock);
  4283. return IRQ_NONE;
  4284. }
  4285. /************************** EEPROM BANDS ****************************
  4286. *
  4287. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4288. * EEPROM contents to the specific channel number supported for each
  4289. * band.
  4290. *
  4291. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4292. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4293. * The specific geography and calibration information for that channel
  4294. * is contained in the eeprom map itself.
  4295. *
  4296. * During init, we copy the eeprom information and channel map
  4297. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4298. *
  4299. * channel_map_24/52 provides the index in the channel_info array for a
  4300. * given channel. We have to have two separate maps as there is channel
  4301. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4302. * band_2
  4303. *
  4304. * A value of 0xff stored in the channel_map indicates that the channel
  4305. * is not supported by the hardware at all.
  4306. *
  4307. * A value of 0xfe in the channel_map indicates that the channel is not
  4308. * valid for Tx with the current hardware. This means that
  4309. * while the system can tune and receive on a given channel, it may not
  4310. * be able to associate or transmit any frames on that
  4311. * channel. There is no corresponding channel information for that
  4312. * entry.
  4313. *
  4314. *********************************************************************/
  4315. /* 2.4 GHz */
  4316. static const u8 iwl4965_eeprom_band_1[14] = {
  4317. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4318. };
  4319. /* 5.2 GHz bands */
  4320. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4321. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4322. };
  4323. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4324. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4325. };
  4326. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4327. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4328. };
  4329. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4330. 145, 149, 153, 157, 161, 165
  4331. };
  4332. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4333. 1, 2, 3, 4, 5, 6, 7
  4334. };
  4335. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4336. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4337. };
  4338. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4339. int band,
  4340. int *eeprom_ch_count,
  4341. const struct iwl4965_eeprom_channel
  4342. **eeprom_ch_info,
  4343. const u8 **eeprom_ch_index)
  4344. {
  4345. switch (band) {
  4346. case 1: /* 2.4GHz band */
  4347. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4348. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4349. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4350. break;
  4351. case 2: /* 4.9GHz band */
  4352. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4353. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4354. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4355. break;
  4356. case 3: /* 5.2GHz band */
  4357. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4358. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4359. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4360. break;
  4361. case 4: /* 5.5GHz band */
  4362. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4363. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4364. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4365. break;
  4366. case 5: /* 5.7GHz band */
  4367. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4368. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4369. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4370. break;
  4371. case 6: /* 2.4GHz FAT channels */
  4372. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4373. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4374. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4375. break;
  4376. case 7: /* 5 GHz FAT channels */
  4377. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4378. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4379. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4380. break;
  4381. default:
  4382. BUG();
  4383. return;
  4384. }
  4385. }
  4386. /**
  4387. * iwl4965_get_channel_info - Find driver's private channel info
  4388. *
  4389. * Based on band and channel number.
  4390. */
  4391. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4392. enum ieee80211_band band, u16 channel)
  4393. {
  4394. int i;
  4395. switch (band) {
  4396. case IEEE80211_BAND_5GHZ:
  4397. for (i = 14; i < priv->channel_count; i++) {
  4398. if (priv->channel_info[i].channel == channel)
  4399. return &priv->channel_info[i];
  4400. }
  4401. break;
  4402. case IEEE80211_BAND_2GHZ:
  4403. if (channel >= 1 && channel <= 14)
  4404. return &priv->channel_info[channel - 1];
  4405. break;
  4406. default:
  4407. BUG();
  4408. }
  4409. return NULL;
  4410. }
  4411. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4412. ? # x " " : "")
  4413. /**
  4414. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4415. */
  4416. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4417. {
  4418. int eeprom_ch_count = 0;
  4419. const u8 *eeprom_ch_index = NULL;
  4420. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4421. int band, ch;
  4422. struct iwl4965_channel_info *ch_info;
  4423. if (priv->channel_count) {
  4424. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4425. return 0;
  4426. }
  4427. if (priv->eeprom.version < 0x2f) {
  4428. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4429. priv->eeprom.version);
  4430. return -EINVAL;
  4431. }
  4432. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4433. priv->channel_count =
  4434. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4435. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4436. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4437. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4438. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4439. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4440. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4441. priv->channel_count, GFP_KERNEL);
  4442. if (!priv->channel_info) {
  4443. IWL_ERROR("Could not allocate channel_info\n");
  4444. priv->channel_count = 0;
  4445. return -ENOMEM;
  4446. }
  4447. ch_info = priv->channel_info;
  4448. /* Loop through the 5 EEPROM bands adding them in order to the
  4449. * channel map we maintain (that contains additional information than
  4450. * what just in the EEPROM) */
  4451. for (band = 1; band <= 5; band++) {
  4452. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4453. &eeprom_ch_info, &eeprom_ch_index);
  4454. /* Loop through each band adding each of the channels */
  4455. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4456. ch_info->channel = eeprom_ch_index[ch];
  4457. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4458. IEEE80211_BAND_5GHZ;
  4459. /* permanently store EEPROM's channel regulatory flags
  4460. * and max power in channel info database. */
  4461. ch_info->eeprom = eeprom_ch_info[ch];
  4462. /* Copy the run-time flags so they are there even on
  4463. * invalid channels */
  4464. ch_info->flags = eeprom_ch_info[ch].flags;
  4465. if (!(is_channel_valid(ch_info))) {
  4466. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4467. "No traffic\n",
  4468. ch_info->channel,
  4469. ch_info->flags,
  4470. is_channel_a_band(ch_info) ?
  4471. "5.2" : "2.4");
  4472. ch_info++;
  4473. continue;
  4474. }
  4475. /* Initialize regulatory-based run-time data */
  4476. ch_info->max_power_avg = ch_info->curr_txpow =
  4477. eeprom_ch_info[ch].max_power_avg;
  4478. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4479. ch_info->min_power = 0;
  4480. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4481. " %ddBm): Ad-Hoc %ssupported\n",
  4482. ch_info->channel,
  4483. is_channel_a_band(ch_info) ?
  4484. "5.2" : "2.4",
  4485. CHECK_AND_PRINT(VALID),
  4486. CHECK_AND_PRINT(IBSS),
  4487. CHECK_AND_PRINT(ACTIVE),
  4488. CHECK_AND_PRINT(RADAR),
  4489. CHECK_AND_PRINT(WIDE),
  4490. CHECK_AND_PRINT(NARROW),
  4491. CHECK_AND_PRINT(DFS),
  4492. eeprom_ch_info[ch].flags,
  4493. eeprom_ch_info[ch].max_power_avg,
  4494. ((eeprom_ch_info[ch].
  4495. flags & EEPROM_CHANNEL_IBSS)
  4496. && !(eeprom_ch_info[ch].
  4497. flags & EEPROM_CHANNEL_RADAR))
  4498. ? "" : "not ");
  4499. /* Set the user_txpower_limit to the highest power
  4500. * supported by any channel */
  4501. if (eeprom_ch_info[ch].max_power_avg >
  4502. priv->user_txpower_limit)
  4503. priv->user_txpower_limit =
  4504. eeprom_ch_info[ch].max_power_avg;
  4505. ch_info++;
  4506. }
  4507. }
  4508. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4509. for (band = 6; band <= 7; band++) {
  4510. enum ieee80211_band ieeeband;
  4511. u8 fat_extension_chan;
  4512. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4513. &eeprom_ch_info, &eeprom_ch_index);
  4514. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4515. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4516. /* Loop through each band adding each of the channels */
  4517. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4518. if ((band == 6) &&
  4519. ((eeprom_ch_index[ch] == 5) ||
  4520. (eeprom_ch_index[ch] == 6) ||
  4521. (eeprom_ch_index[ch] == 7)))
  4522. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4523. else
  4524. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4525. /* Set up driver's info for lower half */
  4526. iwl4965_set_fat_chan_info(priv, ieeeband,
  4527. eeprom_ch_index[ch],
  4528. &(eeprom_ch_info[ch]),
  4529. fat_extension_chan);
  4530. /* Set up driver's info for upper half */
  4531. iwl4965_set_fat_chan_info(priv, ieeeband,
  4532. (eeprom_ch_index[ch] + 4),
  4533. &(eeprom_ch_info[ch]),
  4534. HT_IE_EXT_CHANNEL_BELOW);
  4535. }
  4536. }
  4537. return 0;
  4538. }
  4539. /*
  4540. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4541. */
  4542. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4543. {
  4544. kfree(priv->channel_info);
  4545. priv->channel_count = 0;
  4546. }
  4547. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4548. * sending probe req. This should be set long enough to hear probe responses
  4549. * from more than one AP. */
  4550. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4551. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4552. /* For faster active scanning, scan will move to the next channel if fewer than
  4553. * PLCP_QUIET_THRESH packets are heard on this channel within
  4554. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4555. * time if it's a quiet channel (nothing responded to our probe, and there's
  4556. * no other traffic).
  4557. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4558. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4559. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4560. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4561. * Must be set longer than active dwell time.
  4562. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4563. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4564. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4565. #define IWL_PASSIVE_DWELL_BASE (100)
  4566. #define IWL_CHANNEL_TUNE_TIME 5
  4567. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4568. enum ieee80211_band band)
  4569. {
  4570. if (band == IEEE80211_BAND_5GHZ)
  4571. return IWL_ACTIVE_DWELL_TIME_52;
  4572. else
  4573. return IWL_ACTIVE_DWELL_TIME_24;
  4574. }
  4575. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4576. enum ieee80211_band band)
  4577. {
  4578. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4579. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4580. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4581. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4582. if (iwl4965_is_associated(priv)) {
  4583. /* If we're associated, we clamp the maximum passive
  4584. * dwell time to be 98% of the beacon interval (minus
  4585. * 2 * channel tune time) */
  4586. passive = priv->beacon_int;
  4587. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4588. passive = IWL_PASSIVE_DWELL_BASE;
  4589. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4590. }
  4591. if (passive <= active)
  4592. passive = active + 1;
  4593. return passive;
  4594. }
  4595. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4596. enum ieee80211_band band,
  4597. u8 is_active, u8 direct_mask,
  4598. struct iwl4965_scan_channel *scan_ch)
  4599. {
  4600. const struct ieee80211_channel *channels = NULL;
  4601. const struct ieee80211_supported_band *sband;
  4602. const struct iwl4965_channel_info *ch_info;
  4603. u16 passive_dwell = 0;
  4604. u16 active_dwell = 0;
  4605. int added, i;
  4606. sband = iwl4965_get_hw_mode(priv, band);
  4607. if (!sband)
  4608. return 0;
  4609. channels = sband->channels;
  4610. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4611. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4612. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4613. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4614. le16_to_cpu(priv->active_rxon.channel)) {
  4615. if (iwl4965_is_associated(priv)) {
  4616. IWL_DEBUG_SCAN
  4617. ("Skipping current channel %d\n",
  4618. le16_to_cpu(priv->active_rxon.channel));
  4619. continue;
  4620. }
  4621. } else if (priv->only_active_channel)
  4622. continue;
  4623. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4624. ch_info = iwl4965_get_channel_info(priv, band,
  4625. scan_ch->channel);
  4626. if (!is_channel_valid(ch_info)) {
  4627. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4628. scan_ch->channel);
  4629. continue;
  4630. }
  4631. if (!is_active || is_channel_passive(ch_info) ||
  4632. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4633. scan_ch->type = 0; /* passive */
  4634. else
  4635. scan_ch->type = 1; /* active */
  4636. if (scan_ch->type & 1)
  4637. scan_ch->type |= (direct_mask << 1);
  4638. if (is_channel_narrow(ch_info))
  4639. scan_ch->type |= (1 << 7);
  4640. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4641. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4642. /* Set txpower levels to defaults */
  4643. scan_ch->tpc.dsp_atten = 110;
  4644. /* scan_pwr_info->tpc.dsp_atten; */
  4645. /*scan_pwr_info->tpc.tx_gain; */
  4646. if (band == IEEE80211_BAND_5GHZ)
  4647. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4648. else {
  4649. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4650. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4651. * power level:
  4652. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4653. */
  4654. }
  4655. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4656. scan_ch->channel,
  4657. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4658. (scan_ch->type & 1) ?
  4659. active_dwell : passive_dwell);
  4660. scan_ch++;
  4661. added++;
  4662. }
  4663. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4664. return added;
  4665. }
  4666. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4667. struct ieee80211_rate *rates)
  4668. {
  4669. int i;
  4670. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4671. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4672. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4673. rates[i].hw_value_short = i;
  4674. rates[i].flags = 0;
  4675. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4676. /*
  4677. * If CCK != 1M then set short preamble rate flag.
  4678. */
  4679. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4680. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4681. }
  4682. }
  4683. }
  4684. /**
  4685. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4686. */
  4687. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4688. {
  4689. struct iwl4965_channel_info *ch;
  4690. struct ieee80211_supported_band *sband;
  4691. struct ieee80211_channel *channels;
  4692. struct ieee80211_channel *geo_ch;
  4693. struct ieee80211_rate *rates;
  4694. int i = 0;
  4695. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4696. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4697. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4698. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4699. return 0;
  4700. }
  4701. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4702. priv->channel_count, GFP_KERNEL);
  4703. if (!channels)
  4704. return -ENOMEM;
  4705. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4706. GFP_KERNEL);
  4707. if (!rates) {
  4708. kfree(channels);
  4709. return -ENOMEM;
  4710. }
  4711. /* 5.2GHz channels start after the 2.4GHz channels */
  4712. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4713. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4714. /* just OFDM */
  4715. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4716. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4717. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4718. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4719. sband->channels = channels;
  4720. /* OFDM & CCK */
  4721. sband->bitrates = rates;
  4722. sband->n_bitrates = IWL_RATE_COUNT;
  4723. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4724. priv->ieee_channels = channels;
  4725. priv->ieee_rates = rates;
  4726. iwl4965_init_hw_rates(priv, rates);
  4727. for (i = 0; i < priv->channel_count; i++) {
  4728. ch = &priv->channel_info[i];
  4729. /* FIXME: might be removed if scan is OK */
  4730. if (!is_channel_valid(ch))
  4731. continue;
  4732. if (is_channel_a_band(ch))
  4733. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4734. else
  4735. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4736. geo_ch = &sband->channels[sband->n_channels++];
  4737. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4738. geo_ch->max_power = ch->max_power_avg;
  4739. geo_ch->max_antenna_gain = 0xff;
  4740. geo_ch->hw_value = ch->channel;
  4741. if (is_channel_valid(ch)) {
  4742. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4743. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4744. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4745. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4746. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4747. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4748. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4749. priv->max_channel_txpower_limit =
  4750. ch->max_power_avg;
  4751. } else {
  4752. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4753. }
  4754. /* Save flags for reg domain usage */
  4755. geo_ch->orig_flags = geo_ch->flags;
  4756. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4757. ch->channel, geo_ch->center_freq,
  4758. is_channel_a_band(ch) ? "5.2" : "2.4",
  4759. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4760. "restricted" : "valid",
  4761. geo_ch->flags);
  4762. }
  4763. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
  4764. printk(KERN_INFO DRV_NAME
  4765. ": Incorrectly detected BG card as ABG. Please send "
  4766. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4767. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4768. priv->is_abg = 0;
  4769. }
  4770. printk(KERN_INFO DRV_NAME
  4771. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4772. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4773. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4774. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4775. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4776. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4777. return 0;
  4778. }
  4779. /*
  4780. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4781. */
  4782. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4783. {
  4784. kfree(priv->ieee_channels);
  4785. kfree(priv->ieee_rates);
  4786. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4787. }
  4788. /******************************************************************************
  4789. *
  4790. * uCode download functions
  4791. *
  4792. ******************************************************************************/
  4793. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4794. {
  4795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4797. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4798. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4799. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4800. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4801. }
  4802. /**
  4803. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4804. * looking at all data.
  4805. */
  4806. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4807. u32 len)
  4808. {
  4809. u32 val;
  4810. u32 save_len = len;
  4811. int rc = 0;
  4812. u32 errcnt;
  4813. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4814. rc = iwl4965_grab_nic_access(priv);
  4815. if (rc)
  4816. return rc;
  4817. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4818. errcnt = 0;
  4819. for (; len > 0; len -= sizeof(u32), image++) {
  4820. /* read data comes through single port, auto-incr addr */
  4821. /* NOTE: Use the debugless read so we don't flood kernel log
  4822. * if IWL_DL_IO is set */
  4823. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4824. if (val != le32_to_cpu(*image)) {
  4825. IWL_ERROR("uCode INST section is invalid at "
  4826. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4827. save_len - len, val, le32_to_cpu(*image));
  4828. rc = -EIO;
  4829. errcnt++;
  4830. if (errcnt >= 20)
  4831. break;
  4832. }
  4833. }
  4834. iwl4965_release_nic_access(priv);
  4835. if (!errcnt)
  4836. IWL_DEBUG_INFO
  4837. ("ucode image in INSTRUCTION memory is good\n");
  4838. return rc;
  4839. }
  4840. /**
  4841. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4842. * using sample data 100 bytes apart. If these sample points are good,
  4843. * it's a pretty good bet that everything between them is good, too.
  4844. */
  4845. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4846. {
  4847. u32 val;
  4848. int rc = 0;
  4849. u32 errcnt = 0;
  4850. u32 i;
  4851. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4852. rc = iwl4965_grab_nic_access(priv);
  4853. if (rc)
  4854. return rc;
  4855. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4856. /* read data comes through single port, auto-incr addr */
  4857. /* NOTE: Use the debugless read so we don't flood kernel log
  4858. * if IWL_DL_IO is set */
  4859. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4860. i + RTC_INST_LOWER_BOUND);
  4861. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4862. if (val != le32_to_cpu(*image)) {
  4863. #if 0 /* Enable this if you want to see details */
  4864. IWL_ERROR("uCode INST section is invalid at "
  4865. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4866. i, val, *image);
  4867. #endif
  4868. rc = -EIO;
  4869. errcnt++;
  4870. if (errcnt >= 3)
  4871. break;
  4872. }
  4873. }
  4874. iwl4965_release_nic_access(priv);
  4875. return rc;
  4876. }
  4877. /**
  4878. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4879. * and verify its contents
  4880. */
  4881. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4882. {
  4883. __le32 *image;
  4884. u32 len;
  4885. int rc = 0;
  4886. /* Try bootstrap */
  4887. image = (__le32 *)priv->ucode_boot.v_addr;
  4888. len = priv->ucode_boot.len;
  4889. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4890. if (rc == 0) {
  4891. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4892. return 0;
  4893. }
  4894. /* Try initialize */
  4895. image = (__le32 *)priv->ucode_init.v_addr;
  4896. len = priv->ucode_init.len;
  4897. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4898. if (rc == 0) {
  4899. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4900. return 0;
  4901. }
  4902. /* Try runtime/protocol */
  4903. image = (__le32 *)priv->ucode_code.v_addr;
  4904. len = priv->ucode_code.len;
  4905. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4906. if (rc == 0) {
  4907. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4908. return 0;
  4909. }
  4910. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4911. /* Since nothing seems to match, show first several data entries in
  4912. * instruction SRAM, so maybe visual inspection will give a clue.
  4913. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4914. image = (__le32 *)priv->ucode_boot.v_addr;
  4915. len = priv->ucode_boot.len;
  4916. rc = iwl4965_verify_inst_full(priv, image, len);
  4917. return rc;
  4918. }
  4919. /* check contents of special bootstrap uCode SRAM */
  4920. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4921. {
  4922. __le32 *image = priv->ucode_boot.v_addr;
  4923. u32 len = priv->ucode_boot.len;
  4924. u32 reg;
  4925. u32 val;
  4926. IWL_DEBUG_INFO("Begin verify bsm\n");
  4927. /* verify BSM SRAM contents */
  4928. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4929. for (reg = BSM_SRAM_LOWER_BOUND;
  4930. reg < BSM_SRAM_LOWER_BOUND + len;
  4931. reg += sizeof(u32), image ++) {
  4932. val = iwl4965_read_prph(priv, reg);
  4933. if (val != le32_to_cpu(*image)) {
  4934. IWL_ERROR("BSM uCode verification failed at "
  4935. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4936. BSM_SRAM_LOWER_BOUND,
  4937. reg - BSM_SRAM_LOWER_BOUND, len,
  4938. val, le32_to_cpu(*image));
  4939. return -EIO;
  4940. }
  4941. }
  4942. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4943. return 0;
  4944. }
  4945. /**
  4946. * iwl4965_load_bsm - Load bootstrap instructions
  4947. *
  4948. * BSM operation:
  4949. *
  4950. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4951. * in special SRAM that does not power down during RFKILL. When powering back
  4952. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4953. * the bootstrap program into the on-board processor, and starts it.
  4954. *
  4955. * The bootstrap program loads (via DMA) instructions and data for a new
  4956. * program from host DRAM locations indicated by the host driver in the
  4957. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4958. * automatically.
  4959. *
  4960. * When initializing the NIC, the host driver points the BSM to the
  4961. * "initialize" uCode image. This uCode sets up some internal data, then
  4962. * notifies host via "initialize alive" that it is complete.
  4963. *
  4964. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4965. * normal runtime uCode instructions and a backup uCode data cache buffer
  4966. * (filled initially with starting data values for the on-board processor),
  4967. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4968. * which begins normal operation.
  4969. *
  4970. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4971. * the backup data cache in DRAM before SRAM is powered down.
  4972. *
  4973. * When powering back up, the BSM loads the bootstrap program. This reloads
  4974. * the runtime uCode instructions and the backup data cache into SRAM,
  4975. * and re-launches the runtime uCode from where it left off.
  4976. */
  4977. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4978. {
  4979. __le32 *image = priv->ucode_boot.v_addr;
  4980. u32 len = priv->ucode_boot.len;
  4981. dma_addr_t pinst;
  4982. dma_addr_t pdata;
  4983. u32 inst_len;
  4984. u32 data_len;
  4985. int rc;
  4986. int i;
  4987. u32 done;
  4988. u32 reg_offset;
  4989. IWL_DEBUG_INFO("Begin load bsm\n");
  4990. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4991. if (len > IWL_MAX_BSM_SIZE)
  4992. return -EINVAL;
  4993. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4994. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4995. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4996. * after the "initialize" uCode has run, to point to
  4997. * runtime/protocol instructions and backup data cache. */
  4998. pinst = priv->ucode_init.p_addr >> 4;
  4999. pdata = priv->ucode_init_data.p_addr >> 4;
  5000. inst_len = priv->ucode_init.len;
  5001. data_len = priv->ucode_init_data.len;
  5002. rc = iwl4965_grab_nic_access(priv);
  5003. if (rc)
  5004. return rc;
  5005. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5006. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5007. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5008. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5009. /* Fill BSM memory with bootstrap instructions */
  5010. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5011. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5012. reg_offset += sizeof(u32), image++)
  5013. _iwl4965_write_prph(priv, reg_offset,
  5014. le32_to_cpu(*image));
  5015. rc = iwl4965_verify_bsm(priv);
  5016. if (rc) {
  5017. iwl4965_release_nic_access(priv);
  5018. return rc;
  5019. }
  5020. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5021. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5022. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5023. RTC_INST_LOWER_BOUND);
  5024. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5025. /* Load bootstrap code into instruction SRAM now,
  5026. * to prepare to load "initialize" uCode */
  5027. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5028. BSM_WR_CTRL_REG_BIT_START);
  5029. /* Wait for load of bootstrap uCode to finish */
  5030. for (i = 0; i < 100; i++) {
  5031. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5032. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5033. break;
  5034. udelay(10);
  5035. }
  5036. if (i < 100)
  5037. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5038. else {
  5039. IWL_ERROR("BSM write did not complete!\n");
  5040. return -EIO;
  5041. }
  5042. /* Enable future boot loads whenever power management unit triggers it
  5043. * (e.g. when powering back up after power-save shutdown) */
  5044. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5045. BSM_WR_CTRL_REG_BIT_START_EN);
  5046. iwl4965_release_nic_access(priv);
  5047. return 0;
  5048. }
  5049. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5050. {
  5051. /* Remove all resets to allow NIC to operate */
  5052. iwl4965_write32(priv, CSR_RESET, 0);
  5053. }
  5054. /**
  5055. * iwl4965_read_ucode - Read uCode images from disk file.
  5056. *
  5057. * Copy into buffers for card to fetch via bus-mastering
  5058. */
  5059. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5060. {
  5061. struct iwl4965_ucode *ucode;
  5062. int ret;
  5063. const struct firmware *ucode_raw;
  5064. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5065. u8 *src;
  5066. size_t len;
  5067. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5068. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5069. * request_firmware() is synchronous, file is in memory on return. */
  5070. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5071. if (ret < 0) {
  5072. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5073. name, ret);
  5074. goto error;
  5075. }
  5076. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5077. name, ucode_raw->size);
  5078. /* Make sure that we got at least our header! */
  5079. if (ucode_raw->size < sizeof(*ucode)) {
  5080. IWL_ERROR("File size way too small!\n");
  5081. ret = -EINVAL;
  5082. goto err_release;
  5083. }
  5084. /* Data from ucode file: header followed by uCode images */
  5085. ucode = (void *)ucode_raw->data;
  5086. ver = le32_to_cpu(ucode->ver);
  5087. inst_size = le32_to_cpu(ucode->inst_size);
  5088. data_size = le32_to_cpu(ucode->data_size);
  5089. init_size = le32_to_cpu(ucode->init_size);
  5090. init_data_size = le32_to_cpu(ucode->init_data_size);
  5091. boot_size = le32_to_cpu(ucode->boot_size);
  5092. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5093. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5094. inst_size);
  5095. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5096. data_size);
  5097. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5098. init_size);
  5099. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5100. init_data_size);
  5101. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5102. boot_size);
  5103. /* Verify size of file vs. image size info in file's header */
  5104. if (ucode_raw->size < sizeof(*ucode) +
  5105. inst_size + data_size + init_size +
  5106. init_data_size + boot_size) {
  5107. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5108. (int)ucode_raw->size);
  5109. ret = -EINVAL;
  5110. goto err_release;
  5111. }
  5112. /* Verify that uCode images will fit in card's SRAM */
  5113. if (inst_size > IWL_MAX_INST_SIZE) {
  5114. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5115. inst_size);
  5116. ret = -EINVAL;
  5117. goto err_release;
  5118. }
  5119. if (data_size > IWL_MAX_DATA_SIZE) {
  5120. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5121. data_size);
  5122. ret = -EINVAL;
  5123. goto err_release;
  5124. }
  5125. if (init_size > IWL_MAX_INST_SIZE) {
  5126. IWL_DEBUG_INFO
  5127. ("uCode init instr len %d too large to fit in\n",
  5128. init_size);
  5129. ret = -EINVAL;
  5130. goto err_release;
  5131. }
  5132. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5133. IWL_DEBUG_INFO
  5134. ("uCode init data len %d too large to fit in\n",
  5135. init_data_size);
  5136. ret = -EINVAL;
  5137. goto err_release;
  5138. }
  5139. if (boot_size > IWL_MAX_BSM_SIZE) {
  5140. IWL_DEBUG_INFO
  5141. ("uCode boot instr len %d too large to fit in\n",
  5142. boot_size);
  5143. ret = -EINVAL;
  5144. goto err_release;
  5145. }
  5146. /* Allocate ucode buffers for card's bus-master loading ... */
  5147. /* Runtime instructions and 2 copies of data:
  5148. * 1) unmodified from disk
  5149. * 2) backup cache for save/restore during power-downs */
  5150. priv->ucode_code.len = inst_size;
  5151. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5152. priv->ucode_data.len = data_size;
  5153. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5154. priv->ucode_data_backup.len = data_size;
  5155. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5156. /* Initialization instructions and data */
  5157. if (init_size && init_data_size) {
  5158. priv->ucode_init.len = init_size;
  5159. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5160. priv->ucode_init_data.len = init_data_size;
  5161. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5162. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5163. goto err_pci_alloc;
  5164. }
  5165. /* Bootstrap (instructions only, no data) */
  5166. if (boot_size) {
  5167. priv->ucode_boot.len = boot_size;
  5168. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5169. if (!priv->ucode_boot.v_addr)
  5170. goto err_pci_alloc;
  5171. }
  5172. /* Copy images into buffers for card's bus-master reads ... */
  5173. /* Runtime instructions (first block of data in file) */
  5174. src = &ucode->data[0];
  5175. len = priv->ucode_code.len;
  5176. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5177. memcpy(priv->ucode_code.v_addr, src, len);
  5178. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5179. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5180. /* Runtime data (2nd block)
  5181. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5182. src = &ucode->data[inst_size];
  5183. len = priv->ucode_data.len;
  5184. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5185. memcpy(priv->ucode_data.v_addr, src, len);
  5186. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5187. /* Initialization instructions (3rd block) */
  5188. if (init_size) {
  5189. src = &ucode->data[inst_size + data_size];
  5190. len = priv->ucode_init.len;
  5191. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5192. len);
  5193. memcpy(priv->ucode_init.v_addr, src, len);
  5194. }
  5195. /* Initialization data (4th block) */
  5196. if (init_data_size) {
  5197. src = &ucode->data[inst_size + data_size + init_size];
  5198. len = priv->ucode_init_data.len;
  5199. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5200. len);
  5201. memcpy(priv->ucode_init_data.v_addr, src, len);
  5202. }
  5203. /* Bootstrap instructions (5th block) */
  5204. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5205. len = priv->ucode_boot.len;
  5206. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5207. memcpy(priv->ucode_boot.v_addr, src, len);
  5208. /* We have our copies now, allow OS release its copies */
  5209. release_firmware(ucode_raw);
  5210. return 0;
  5211. err_pci_alloc:
  5212. IWL_ERROR("failed to allocate pci memory\n");
  5213. ret = -ENOMEM;
  5214. iwl4965_dealloc_ucode_pci(priv);
  5215. err_release:
  5216. release_firmware(ucode_raw);
  5217. error:
  5218. return ret;
  5219. }
  5220. /**
  5221. * iwl4965_set_ucode_ptrs - Set uCode address location
  5222. *
  5223. * Tell initialization uCode where to find runtime uCode.
  5224. *
  5225. * BSM registers initially contain pointers to initialization uCode.
  5226. * We need to replace them to load runtime uCode inst and data,
  5227. * and to save runtime data when powering down.
  5228. */
  5229. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5230. {
  5231. dma_addr_t pinst;
  5232. dma_addr_t pdata;
  5233. int rc = 0;
  5234. unsigned long flags;
  5235. /* bits 35:4 for 4965 */
  5236. pinst = priv->ucode_code.p_addr >> 4;
  5237. pdata = priv->ucode_data_backup.p_addr >> 4;
  5238. spin_lock_irqsave(&priv->lock, flags);
  5239. rc = iwl4965_grab_nic_access(priv);
  5240. if (rc) {
  5241. spin_unlock_irqrestore(&priv->lock, flags);
  5242. return rc;
  5243. }
  5244. /* Tell bootstrap uCode where to find image to load */
  5245. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5246. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5247. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5248. priv->ucode_data.len);
  5249. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5250. * that all new ptr/size info is in place */
  5251. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5252. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5253. iwl4965_release_nic_access(priv);
  5254. spin_unlock_irqrestore(&priv->lock, flags);
  5255. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5256. return rc;
  5257. }
  5258. /**
  5259. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5260. *
  5261. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5262. *
  5263. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5264. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5265. * (3945 does not contain this data).
  5266. *
  5267. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5268. */
  5269. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5270. {
  5271. /* Check alive response for "valid" sign from uCode */
  5272. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5273. /* We had an error bringing up the hardware, so take it
  5274. * all the way back down so we can try again */
  5275. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5276. goto restart;
  5277. }
  5278. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5279. * This is a paranoid check, because we would not have gotten the
  5280. * "initialize" alive if code weren't properly loaded. */
  5281. if (iwl4965_verify_ucode(priv)) {
  5282. /* Runtime instruction load was bad;
  5283. * take it all the way back down so we can try again */
  5284. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5285. goto restart;
  5286. }
  5287. /* Calculate temperature */
  5288. priv->temperature = iwl4965_get_temperature(priv);
  5289. /* Send pointers to protocol/runtime uCode image ... init code will
  5290. * load and launch runtime uCode, which will send us another "Alive"
  5291. * notification. */
  5292. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5293. if (iwl4965_set_ucode_ptrs(priv)) {
  5294. /* Runtime instruction load won't happen;
  5295. * take it all the way back down so we can try again */
  5296. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5297. goto restart;
  5298. }
  5299. return;
  5300. restart:
  5301. queue_work(priv->workqueue, &priv->restart);
  5302. }
  5303. /**
  5304. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5305. * from protocol/runtime uCode (initialization uCode's
  5306. * Alive gets handled by iwl4965_init_alive_start()).
  5307. */
  5308. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5309. {
  5310. int rc = 0;
  5311. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5312. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5313. /* We had an error bringing up the hardware, so take it
  5314. * all the way back down so we can try again */
  5315. IWL_DEBUG_INFO("Alive failed.\n");
  5316. goto restart;
  5317. }
  5318. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5319. * This is a paranoid check, because we would not have gotten the
  5320. * "runtime" alive if code weren't properly loaded. */
  5321. if (iwl4965_verify_ucode(priv)) {
  5322. /* Runtime instruction load was bad;
  5323. * take it all the way back down so we can try again */
  5324. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5325. goto restart;
  5326. }
  5327. iwl4965_clear_stations_table(priv);
  5328. rc = iwl4965_alive_notify(priv);
  5329. if (rc) {
  5330. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5331. rc);
  5332. goto restart;
  5333. }
  5334. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5335. set_bit(STATUS_ALIVE, &priv->status);
  5336. /* Clear out the uCode error bit if it is set */
  5337. clear_bit(STATUS_FW_ERROR, &priv->status);
  5338. if (iwl4965_is_rfkill(priv))
  5339. return;
  5340. ieee80211_start_queues(priv->hw);
  5341. priv->active_rate = priv->rates_mask;
  5342. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5343. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5344. if (iwl4965_is_associated(priv)) {
  5345. struct iwl4965_rxon_cmd *active_rxon =
  5346. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5347. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5348. sizeof(priv->staging_rxon));
  5349. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5350. } else {
  5351. /* Initialize our rx_config data */
  5352. iwl4965_connection_init_rx_config(priv);
  5353. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5354. }
  5355. /* Configure Bluetooth device coexistence support */
  5356. iwl4965_send_bt_config(priv);
  5357. /* Configure the adapter for unassociated operation */
  5358. iwl4965_commit_rxon(priv);
  5359. /* At this point, the NIC is initialized and operational */
  5360. priv->notif_missed_beacons = 0;
  5361. set_bit(STATUS_READY, &priv->status);
  5362. iwl4965_rf_kill_ct_config(priv);
  5363. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5364. wake_up_interruptible(&priv->wait_command_queue);
  5365. if (priv->error_recovering)
  5366. iwl4965_error_recovery(priv);
  5367. return;
  5368. restart:
  5369. queue_work(priv->workqueue, &priv->restart);
  5370. }
  5371. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5372. static void __iwl4965_down(struct iwl4965_priv *priv)
  5373. {
  5374. unsigned long flags;
  5375. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5376. struct ieee80211_conf *conf = NULL;
  5377. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5378. conf = ieee80211_get_hw_conf(priv->hw);
  5379. if (!exit_pending)
  5380. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5381. iwl4965_clear_stations_table(priv);
  5382. /* Unblock any waiting calls */
  5383. wake_up_interruptible_all(&priv->wait_command_queue);
  5384. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5385. * exiting the module */
  5386. if (!exit_pending)
  5387. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5388. /* stop and reset the on-board processor */
  5389. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5390. /* tell the device to stop sending interrupts */
  5391. iwl4965_disable_interrupts(priv);
  5392. if (priv->mac80211_registered)
  5393. ieee80211_stop_queues(priv->hw);
  5394. /* If we have not previously called iwl4965_init() then
  5395. * clear all bits but the RF Kill and SUSPEND bits and return */
  5396. if (!iwl4965_is_init(priv)) {
  5397. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5398. STATUS_RF_KILL_HW |
  5399. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5400. STATUS_RF_KILL_SW |
  5401. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5402. STATUS_GEO_CONFIGURED |
  5403. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5404. STATUS_IN_SUSPEND;
  5405. goto exit;
  5406. }
  5407. /* ...otherwise clear out all the status bits but the RF Kill and
  5408. * SUSPEND bits and continue taking the NIC down. */
  5409. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5410. STATUS_RF_KILL_HW |
  5411. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5412. STATUS_RF_KILL_SW |
  5413. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5414. STATUS_GEO_CONFIGURED |
  5415. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5416. STATUS_IN_SUSPEND |
  5417. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5418. STATUS_FW_ERROR;
  5419. spin_lock_irqsave(&priv->lock, flags);
  5420. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5421. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5422. spin_unlock_irqrestore(&priv->lock, flags);
  5423. iwl4965_hw_txq_ctx_stop(priv);
  5424. iwl4965_hw_rxq_stop(priv);
  5425. spin_lock_irqsave(&priv->lock, flags);
  5426. if (!iwl4965_grab_nic_access(priv)) {
  5427. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5428. APMG_CLK_VAL_DMA_CLK_RQT);
  5429. iwl4965_release_nic_access(priv);
  5430. }
  5431. spin_unlock_irqrestore(&priv->lock, flags);
  5432. udelay(5);
  5433. iwl4965_hw_nic_stop_master(priv);
  5434. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5435. iwl4965_hw_nic_reset(priv);
  5436. exit:
  5437. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5438. if (priv->ibss_beacon)
  5439. dev_kfree_skb(priv->ibss_beacon);
  5440. priv->ibss_beacon = NULL;
  5441. /* clear out any free frames */
  5442. iwl4965_clear_free_frames(priv);
  5443. }
  5444. static void iwl4965_down(struct iwl4965_priv *priv)
  5445. {
  5446. mutex_lock(&priv->mutex);
  5447. __iwl4965_down(priv);
  5448. mutex_unlock(&priv->mutex);
  5449. iwl4965_cancel_deferred_work(priv);
  5450. }
  5451. #define MAX_HW_RESTARTS 5
  5452. static int __iwl4965_up(struct iwl4965_priv *priv)
  5453. {
  5454. int rc, i;
  5455. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5456. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5457. return -EIO;
  5458. }
  5459. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5460. IWL_WARNING("Radio disabled by SW RF kill (module "
  5461. "parameter)\n");
  5462. return -ENODEV;
  5463. }
  5464. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5465. IWL_ERROR("ucode not available for device bringup\n");
  5466. return -EIO;
  5467. }
  5468. /* If platform's RF_KILL switch is NOT set to KILL */
  5469. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5470. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5471. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5472. else {
  5473. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5474. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5475. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5476. return -ENODEV;
  5477. }
  5478. }
  5479. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5480. rc = iwl4965_hw_nic_init(priv);
  5481. if (rc) {
  5482. IWL_ERROR("Unable to int nic\n");
  5483. return rc;
  5484. }
  5485. /* make sure rfkill handshake bits are cleared */
  5486. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5487. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5488. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5489. /* clear (again), then enable host interrupts */
  5490. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5491. iwl4965_enable_interrupts(priv);
  5492. /* really make sure rfkill handshake bits are cleared */
  5493. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5494. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5495. /* Copy original ucode data image from disk into backup cache.
  5496. * This will be used to initialize the on-board processor's
  5497. * data SRAM for a clean start when the runtime program first loads. */
  5498. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5499. priv->ucode_data.len);
  5500. /* We return success when we resume from suspend and rf_kill is on. */
  5501. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5502. return 0;
  5503. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5504. iwl4965_clear_stations_table(priv);
  5505. /* load bootstrap state machine,
  5506. * load bootstrap program into processor's memory,
  5507. * prepare to load the "initialize" uCode */
  5508. rc = iwl4965_load_bsm(priv);
  5509. if (rc) {
  5510. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5511. continue;
  5512. }
  5513. /* start card; "initialize" will load runtime ucode */
  5514. iwl4965_nic_start(priv);
  5515. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5516. return 0;
  5517. }
  5518. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5519. __iwl4965_down(priv);
  5520. /* tried to restart and config the device for as long as our
  5521. * patience could withstand */
  5522. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5523. return -EIO;
  5524. }
  5525. /*****************************************************************************
  5526. *
  5527. * Workqueue callbacks
  5528. *
  5529. *****************************************************************************/
  5530. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5531. {
  5532. struct iwl4965_priv *priv =
  5533. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5534. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5535. return;
  5536. mutex_lock(&priv->mutex);
  5537. iwl4965_init_alive_start(priv);
  5538. mutex_unlock(&priv->mutex);
  5539. }
  5540. static void iwl4965_bg_alive_start(struct work_struct *data)
  5541. {
  5542. struct iwl4965_priv *priv =
  5543. container_of(data, struct iwl4965_priv, alive_start.work);
  5544. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5545. return;
  5546. mutex_lock(&priv->mutex);
  5547. iwl4965_alive_start(priv);
  5548. mutex_unlock(&priv->mutex);
  5549. }
  5550. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5551. {
  5552. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5553. wake_up_interruptible(&priv->wait_command_queue);
  5554. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5555. return;
  5556. mutex_lock(&priv->mutex);
  5557. if (!iwl4965_is_rfkill(priv)) {
  5558. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5559. "HW and/or SW RF Kill no longer active, restarting "
  5560. "device\n");
  5561. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5562. queue_work(priv->workqueue, &priv->restart);
  5563. } else {
  5564. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5565. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5566. "disabled by SW switch\n");
  5567. else
  5568. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5569. "Kill switch must be turned off for "
  5570. "wireless networking to work.\n");
  5571. }
  5572. mutex_unlock(&priv->mutex);
  5573. }
  5574. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5575. static void iwl4965_bg_scan_check(struct work_struct *data)
  5576. {
  5577. struct iwl4965_priv *priv =
  5578. container_of(data, struct iwl4965_priv, scan_check.work);
  5579. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5580. return;
  5581. mutex_lock(&priv->mutex);
  5582. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5583. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5584. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5585. "Scan completion watchdog resetting adapter (%dms)\n",
  5586. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5587. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5588. iwl4965_send_scan_abort(priv);
  5589. }
  5590. mutex_unlock(&priv->mutex);
  5591. }
  5592. static void iwl4965_bg_request_scan(struct work_struct *data)
  5593. {
  5594. struct iwl4965_priv *priv =
  5595. container_of(data, struct iwl4965_priv, request_scan);
  5596. struct iwl4965_host_cmd cmd = {
  5597. .id = REPLY_SCAN_CMD,
  5598. .len = sizeof(struct iwl4965_scan_cmd),
  5599. .meta.flags = CMD_SIZE_HUGE,
  5600. };
  5601. int rc = 0;
  5602. struct iwl4965_scan_cmd *scan;
  5603. struct ieee80211_conf *conf = NULL;
  5604. u16 cmd_len;
  5605. enum ieee80211_band band;
  5606. u8 direct_mask;
  5607. conf = ieee80211_get_hw_conf(priv->hw);
  5608. mutex_lock(&priv->mutex);
  5609. if (!iwl4965_is_ready(priv)) {
  5610. IWL_WARNING("request scan called when driver not ready.\n");
  5611. goto done;
  5612. }
  5613. /* Make sure the scan wasn't cancelled before this queued work
  5614. * was given the chance to run... */
  5615. if (!test_bit(STATUS_SCANNING, &priv->status))
  5616. goto done;
  5617. /* This should never be called or scheduled if there is currently
  5618. * a scan active in the hardware. */
  5619. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5620. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5621. "Ignoring second request.\n");
  5622. rc = -EIO;
  5623. goto done;
  5624. }
  5625. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5626. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5627. goto done;
  5628. }
  5629. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5630. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5631. goto done;
  5632. }
  5633. if (iwl4965_is_rfkill(priv)) {
  5634. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5635. goto done;
  5636. }
  5637. if (!test_bit(STATUS_READY, &priv->status)) {
  5638. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5639. goto done;
  5640. }
  5641. if (!priv->scan_bands) {
  5642. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5643. goto done;
  5644. }
  5645. if (!priv->scan) {
  5646. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5647. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5648. if (!priv->scan) {
  5649. rc = -ENOMEM;
  5650. goto done;
  5651. }
  5652. }
  5653. scan = priv->scan;
  5654. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5655. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5656. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5657. if (iwl4965_is_associated(priv)) {
  5658. u16 interval = 0;
  5659. u32 extra;
  5660. u32 suspend_time = 100;
  5661. u32 scan_suspend_time = 100;
  5662. unsigned long flags;
  5663. IWL_DEBUG_INFO("Scanning while associated...\n");
  5664. spin_lock_irqsave(&priv->lock, flags);
  5665. interval = priv->beacon_int;
  5666. spin_unlock_irqrestore(&priv->lock, flags);
  5667. scan->suspend_time = 0;
  5668. scan->max_out_time = cpu_to_le32(200 * 1024);
  5669. if (!interval)
  5670. interval = suspend_time;
  5671. extra = (suspend_time / interval) << 22;
  5672. scan_suspend_time = (extra |
  5673. ((suspend_time % interval) * 1024));
  5674. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5675. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5676. scan_suspend_time, interval);
  5677. }
  5678. /* We should add the ability for user to lock to PASSIVE ONLY */
  5679. if (priv->one_direct_scan) {
  5680. IWL_DEBUG_SCAN
  5681. ("Kicking off one direct scan for '%s'\n",
  5682. iwl4965_escape_essid(priv->direct_ssid,
  5683. priv->direct_ssid_len));
  5684. scan->direct_scan[0].id = WLAN_EID_SSID;
  5685. scan->direct_scan[0].len = priv->direct_ssid_len;
  5686. memcpy(scan->direct_scan[0].ssid,
  5687. priv->direct_ssid, priv->direct_ssid_len);
  5688. direct_mask = 1;
  5689. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5690. scan->direct_scan[0].id = WLAN_EID_SSID;
  5691. scan->direct_scan[0].len = priv->essid_len;
  5692. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5693. direct_mask = 1;
  5694. } else
  5695. direct_mask = 0;
  5696. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5697. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5698. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5699. switch (priv->scan_bands) {
  5700. case 2:
  5701. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5702. scan->tx_cmd.rate_n_flags =
  5703. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5704. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5705. scan->good_CRC_th = 0;
  5706. band = IEEE80211_BAND_2GHZ;
  5707. break;
  5708. case 1:
  5709. scan->tx_cmd.rate_n_flags =
  5710. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5711. RATE_MCS_ANT_B_MSK);
  5712. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5713. band = IEEE80211_BAND_5GHZ;
  5714. break;
  5715. default:
  5716. IWL_WARNING("Invalid scan band count\n");
  5717. goto done;
  5718. }
  5719. /* We don't build a direct scan probe request; the uCode will do
  5720. * that based on the direct_mask added to each channel entry */
  5721. cmd_len = iwl4965_fill_probe_req(priv, band,
  5722. (struct ieee80211_mgmt *)scan->data,
  5723. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5724. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5725. /* select Rx chains */
  5726. /* Force use of chains B and C (0x6) for scan Rx.
  5727. * Avoid A (0x1) because of its off-channel reception on A-band.
  5728. * MIMO is not used here, but value is required to make uCode happy. */
  5729. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5730. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5731. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5732. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5733. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5734. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5735. if (direct_mask)
  5736. IWL_DEBUG_SCAN
  5737. ("Initiating direct scan for %s.\n",
  5738. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5739. else
  5740. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5741. scan->channel_count =
  5742. iwl4965_get_channels_for_scan(
  5743. priv, band, 1, /* active */
  5744. direct_mask,
  5745. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5746. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5747. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5748. cmd.data = scan;
  5749. scan->len = cpu_to_le16(cmd.len);
  5750. set_bit(STATUS_SCAN_HW, &priv->status);
  5751. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5752. if (rc)
  5753. goto done;
  5754. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5755. IWL_SCAN_CHECK_WATCHDOG);
  5756. mutex_unlock(&priv->mutex);
  5757. return;
  5758. done:
  5759. /* inform mac80211 scan aborted */
  5760. queue_work(priv->workqueue, &priv->scan_completed);
  5761. mutex_unlock(&priv->mutex);
  5762. }
  5763. static void iwl4965_bg_up(struct work_struct *data)
  5764. {
  5765. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5766. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5767. return;
  5768. mutex_lock(&priv->mutex);
  5769. __iwl4965_up(priv);
  5770. mutex_unlock(&priv->mutex);
  5771. }
  5772. static void iwl4965_bg_restart(struct work_struct *data)
  5773. {
  5774. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5775. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5776. return;
  5777. iwl4965_down(priv);
  5778. queue_work(priv->workqueue, &priv->up);
  5779. }
  5780. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5781. {
  5782. struct iwl4965_priv *priv =
  5783. container_of(data, struct iwl4965_priv, rx_replenish);
  5784. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5785. return;
  5786. mutex_lock(&priv->mutex);
  5787. iwl4965_rx_replenish(priv);
  5788. mutex_unlock(&priv->mutex);
  5789. }
  5790. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5791. static void iwl4965_bg_post_associate(struct work_struct *data)
  5792. {
  5793. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5794. post_associate.work);
  5795. int rc = 0;
  5796. struct ieee80211_conf *conf = NULL;
  5797. DECLARE_MAC_BUF(mac);
  5798. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5799. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5800. return;
  5801. }
  5802. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5803. priv->assoc_id,
  5804. print_mac(mac, priv->active_rxon.bssid_addr));
  5805. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5806. return;
  5807. mutex_lock(&priv->mutex);
  5808. if (!priv->vif || !priv->is_open) {
  5809. mutex_unlock(&priv->mutex);
  5810. return;
  5811. }
  5812. iwl4965_scan_cancel_timeout(priv, 200);
  5813. conf = ieee80211_get_hw_conf(priv->hw);
  5814. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5815. iwl4965_commit_rxon(priv);
  5816. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5817. iwl4965_setup_rxon_timing(priv);
  5818. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5819. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5820. if (rc)
  5821. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5822. "Attempting to continue.\n");
  5823. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5824. #ifdef CONFIG_IWL4965_HT
  5825. if (priv->current_ht_config.is_ht)
  5826. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5827. #endif /* CONFIG_IWL4965_HT*/
  5828. iwl4965_set_rxon_chain(priv);
  5829. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5830. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5831. priv->assoc_id, priv->beacon_int);
  5832. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5833. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5834. else
  5835. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5836. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5837. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5838. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5839. else
  5840. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5841. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5842. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5843. }
  5844. iwl4965_commit_rxon(priv);
  5845. switch (priv->iw_mode) {
  5846. case IEEE80211_IF_TYPE_STA:
  5847. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5848. break;
  5849. case IEEE80211_IF_TYPE_IBSS:
  5850. /* clear out the station table */
  5851. iwl4965_clear_stations_table(priv);
  5852. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5853. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5854. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5855. iwl4965_send_beacon_cmd(priv);
  5856. break;
  5857. default:
  5858. IWL_ERROR("%s Should not be called in %d mode\n",
  5859. __FUNCTION__, priv->iw_mode);
  5860. break;
  5861. }
  5862. iwl4965_sequence_reset(priv);
  5863. #ifdef CONFIG_IWL4965_SENSITIVITY
  5864. /* Enable Rx differential gain and sensitivity calibrations */
  5865. iwl4965_chain_noise_reset(priv);
  5866. priv->start_calib = 1;
  5867. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5868. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5869. priv->assoc_station_added = 1;
  5870. iwl4965_activate_qos(priv, 0);
  5871. /* we have just associated, don't start scan too early */
  5872. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5873. mutex_unlock(&priv->mutex);
  5874. }
  5875. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5876. {
  5877. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5878. if (!iwl4965_is_ready(priv))
  5879. return;
  5880. mutex_lock(&priv->mutex);
  5881. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5882. iwl4965_send_scan_abort(priv);
  5883. mutex_unlock(&priv->mutex);
  5884. }
  5885. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5886. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5887. {
  5888. struct iwl4965_priv *priv =
  5889. container_of(work, struct iwl4965_priv, scan_completed);
  5890. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5891. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5892. return;
  5893. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5894. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5895. ieee80211_scan_completed(priv->hw);
  5896. /* Since setting the TXPOWER may have been deferred while
  5897. * performing the scan, fire one off */
  5898. mutex_lock(&priv->mutex);
  5899. iwl4965_hw_reg_send_txpower(priv);
  5900. mutex_unlock(&priv->mutex);
  5901. }
  5902. /*****************************************************************************
  5903. *
  5904. * mac80211 entry point functions
  5905. *
  5906. *****************************************************************************/
  5907. #define UCODE_READY_TIMEOUT (2 * HZ)
  5908. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5909. {
  5910. struct iwl4965_priv *priv = hw->priv;
  5911. int ret;
  5912. IWL_DEBUG_MAC80211("enter\n");
  5913. if (pci_enable_device(priv->pci_dev)) {
  5914. IWL_ERROR("Fail to pci_enable_device\n");
  5915. return -ENODEV;
  5916. }
  5917. pci_restore_state(priv->pci_dev);
  5918. pci_enable_msi(priv->pci_dev);
  5919. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5920. DRV_NAME, priv);
  5921. if (ret) {
  5922. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5923. goto out_disable_msi;
  5924. }
  5925. /* we should be verifying the device is ready to be opened */
  5926. mutex_lock(&priv->mutex);
  5927. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5928. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5929. * ucode filename and max sizes are card-specific. */
  5930. if (!priv->ucode_code.len) {
  5931. ret = iwl4965_read_ucode(priv);
  5932. if (ret) {
  5933. IWL_ERROR("Could not read microcode: %d\n", ret);
  5934. mutex_unlock(&priv->mutex);
  5935. goto out_release_irq;
  5936. }
  5937. }
  5938. ret = __iwl4965_up(priv);
  5939. mutex_unlock(&priv->mutex);
  5940. if (ret)
  5941. goto out_release_irq;
  5942. IWL_DEBUG_INFO("Start UP work done.\n");
  5943. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5944. return 0;
  5945. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5946. * mac80211 will not be run successfully. */
  5947. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5948. test_bit(STATUS_READY, &priv->status),
  5949. UCODE_READY_TIMEOUT);
  5950. if (!ret) {
  5951. if (!test_bit(STATUS_READY, &priv->status)) {
  5952. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5953. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5954. ret = -ETIMEDOUT;
  5955. goto out_release_irq;
  5956. }
  5957. }
  5958. priv->is_open = 1;
  5959. IWL_DEBUG_MAC80211("leave\n");
  5960. return 0;
  5961. out_release_irq:
  5962. free_irq(priv->pci_dev->irq, priv);
  5963. out_disable_msi:
  5964. pci_disable_msi(priv->pci_dev);
  5965. pci_disable_device(priv->pci_dev);
  5966. priv->is_open = 0;
  5967. IWL_DEBUG_MAC80211("leave - failed\n");
  5968. return ret;
  5969. }
  5970. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5971. {
  5972. struct iwl4965_priv *priv = hw->priv;
  5973. IWL_DEBUG_MAC80211("enter\n");
  5974. if (!priv->is_open) {
  5975. IWL_DEBUG_MAC80211("leave - skip\n");
  5976. return;
  5977. }
  5978. priv->is_open = 0;
  5979. if (iwl4965_is_ready_rf(priv)) {
  5980. /* stop mac, cancel any scan request and clear
  5981. * RXON_FILTER_ASSOC_MSK BIT
  5982. */
  5983. mutex_lock(&priv->mutex);
  5984. iwl4965_scan_cancel_timeout(priv, 100);
  5985. cancel_delayed_work(&priv->post_associate);
  5986. mutex_unlock(&priv->mutex);
  5987. }
  5988. iwl4965_down(priv);
  5989. flush_workqueue(priv->workqueue);
  5990. free_irq(priv->pci_dev->irq, priv);
  5991. pci_disable_msi(priv->pci_dev);
  5992. pci_save_state(priv->pci_dev);
  5993. pci_disable_device(priv->pci_dev);
  5994. IWL_DEBUG_MAC80211("leave\n");
  5995. }
  5996. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5997. struct ieee80211_tx_control *ctl)
  5998. {
  5999. struct iwl4965_priv *priv = hw->priv;
  6000. IWL_DEBUG_MAC80211("enter\n");
  6001. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6002. IWL_DEBUG_MAC80211("leave - monitor\n");
  6003. return -1;
  6004. }
  6005. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6006. ctl->tx_rate->bitrate);
  6007. if (iwl4965_tx_skb(priv, skb, ctl))
  6008. dev_kfree_skb_any(skb);
  6009. IWL_DEBUG_MAC80211("leave\n");
  6010. return 0;
  6011. }
  6012. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6013. struct ieee80211_if_init_conf *conf)
  6014. {
  6015. struct iwl4965_priv *priv = hw->priv;
  6016. unsigned long flags;
  6017. DECLARE_MAC_BUF(mac);
  6018. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6019. if (priv->vif) {
  6020. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6021. return -EOPNOTSUPP;
  6022. }
  6023. spin_lock_irqsave(&priv->lock, flags);
  6024. priv->vif = conf->vif;
  6025. spin_unlock_irqrestore(&priv->lock, flags);
  6026. mutex_lock(&priv->mutex);
  6027. if (conf->mac_addr) {
  6028. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6029. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6030. }
  6031. if (iwl4965_is_ready(priv))
  6032. iwl4965_set_mode(priv, conf->type);
  6033. mutex_unlock(&priv->mutex);
  6034. IWL_DEBUG_MAC80211("leave\n");
  6035. return 0;
  6036. }
  6037. /**
  6038. * iwl4965_mac_config - mac80211 config callback
  6039. *
  6040. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6041. * be set inappropriately and the driver currently sets the hardware up to
  6042. * use it whenever needed.
  6043. */
  6044. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6045. {
  6046. struct iwl4965_priv *priv = hw->priv;
  6047. const struct iwl4965_channel_info *ch_info;
  6048. unsigned long flags;
  6049. int ret = 0;
  6050. mutex_lock(&priv->mutex);
  6051. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6052. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6053. if (!iwl4965_is_ready(priv)) {
  6054. IWL_DEBUG_MAC80211("leave - not ready\n");
  6055. ret = -EIO;
  6056. goto out;
  6057. }
  6058. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6059. test_bit(STATUS_SCANNING, &priv->status))) {
  6060. IWL_DEBUG_MAC80211("leave - scanning\n");
  6061. set_bit(STATUS_CONF_PENDING, &priv->status);
  6062. mutex_unlock(&priv->mutex);
  6063. return 0;
  6064. }
  6065. spin_lock_irqsave(&priv->lock, flags);
  6066. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6067. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6068. if (!is_channel_valid(ch_info)) {
  6069. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6070. spin_unlock_irqrestore(&priv->lock, flags);
  6071. ret = -EINVAL;
  6072. goto out;
  6073. }
  6074. #ifdef CONFIG_IWL4965_HT
  6075. /* if we are switching from ht to 2.4 clear flags
  6076. * from any ht related info since 2.4 does not
  6077. * support ht */
  6078. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6079. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6080. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6081. #endif
  6082. )
  6083. priv->staging_rxon.flags = 0;
  6084. #endif /* CONFIG_IWL4965_HT */
  6085. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6086. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6087. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6088. /* The list of supported rates and rate mask can be different
  6089. * for each band; since the band may have changed, reset
  6090. * the rate mask to what mac80211 lists */
  6091. iwl4965_set_rate(priv);
  6092. spin_unlock_irqrestore(&priv->lock, flags);
  6093. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6094. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6095. iwl4965_hw_channel_switch(priv, conf->channel);
  6096. goto out;
  6097. }
  6098. #endif
  6099. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6100. if (!conf->radio_enabled) {
  6101. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6102. goto out;
  6103. }
  6104. if (iwl4965_is_rfkill(priv)) {
  6105. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6106. ret = -EIO;
  6107. goto out;
  6108. }
  6109. iwl4965_set_rate(priv);
  6110. if (memcmp(&priv->active_rxon,
  6111. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6112. iwl4965_commit_rxon(priv);
  6113. else
  6114. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6115. IWL_DEBUG_MAC80211("leave\n");
  6116. out:
  6117. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6118. mutex_unlock(&priv->mutex);
  6119. return ret;
  6120. }
  6121. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6122. {
  6123. int rc = 0;
  6124. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6125. return;
  6126. /* The following should be done only at AP bring up */
  6127. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6128. /* RXON - unassoc (to set timing command) */
  6129. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6130. iwl4965_commit_rxon(priv);
  6131. /* RXON Timing */
  6132. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6133. iwl4965_setup_rxon_timing(priv);
  6134. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6135. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6136. if (rc)
  6137. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6138. "Attempting to continue.\n");
  6139. iwl4965_set_rxon_chain(priv);
  6140. /* FIXME: what should be the assoc_id for AP? */
  6141. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6142. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6143. priv->staging_rxon.flags |=
  6144. RXON_FLG_SHORT_PREAMBLE_MSK;
  6145. else
  6146. priv->staging_rxon.flags &=
  6147. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6148. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6149. if (priv->assoc_capability &
  6150. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6151. priv->staging_rxon.flags |=
  6152. RXON_FLG_SHORT_SLOT_MSK;
  6153. else
  6154. priv->staging_rxon.flags &=
  6155. ~RXON_FLG_SHORT_SLOT_MSK;
  6156. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6157. priv->staging_rxon.flags &=
  6158. ~RXON_FLG_SHORT_SLOT_MSK;
  6159. }
  6160. /* restore RXON assoc */
  6161. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6162. iwl4965_commit_rxon(priv);
  6163. iwl4965_activate_qos(priv, 1);
  6164. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6165. }
  6166. iwl4965_send_beacon_cmd(priv);
  6167. /* FIXME - we need to add code here to detect a totally new
  6168. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6169. * clear sta table, add BCAST sta... */
  6170. }
  6171. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6172. struct ieee80211_vif *vif,
  6173. struct ieee80211_if_conf *conf)
  6174. {
  6175. struct iwl4965_priv *priv = hw->priv;
  6176. DECLARE_MAC_BUF(mac);
  6177. unsigned long flags;
  6178. int rc;
  6179. if (conf == NULL)
  6180. return -EIO;
  6181. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6182. (!conf->beacon || !conf->ssid_len)) {
  6183. IWL_DEBUG_MAC80211
  6184. ("Leaving in AP mode because HostAPD is not ready.\n");
  6185. return 0;
  6186. }
  6187. if (!iwl4965_is_alive(priv))
  6188. return -EAGAIN;
  6189. mutex_lock(&priv->mutex);
  6190. if (conf->bssid)
  6191. IWL_DEBUG_MAC80211("bssid: %s\n",
  6192. print_mac(mac, conf->bssid));
  6193. /*
  6194. * very dubious code was here; the probe filtering flag is never set:
  6195. *
  6196. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6197. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6198. */
  6199. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6200. IWL_DEBUG_MAC80211("leave - scanning\n");
  6201. mutex_unlock(&priv->mutex);
  6202. return 0;
  6203. }
  6204. if (priv->vif != vif) {
  6205. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6206. mutex_unlock(&priv->mutex);
  6207. return 0;
  6208. }
  6209. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6210. if (!conf->bssid) {
  6211. conf->bssid = priv->mac_addr;
  6212. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6213. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6214. print_mac(mac, conf->bssid));
  6215. }
  6216. if (priv->ibss_beacon)
  6217. dev_kfree_skb(priv->ibss_beacon);
  6218. priv->ibss_beacon = conf->beacon;
  6219. }
  6220. if (iwl4965_is_rfkill(priv))
  6221. goto done;
  6222. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6223. !is_multicast_ether_addr(conf->bssid)) {
  6224. /* If there is currently a HW scan going on in the background
  6225. * then we need to cancel it else the RXON below will fail. */
  6226. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6227. IWL_WARNING("Aborted scan still in progress "
  6228. "after 100ms\n");
  6229. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6230. mutex_unlock(&priv->mutex);
  6231. return -EAGAIN;
  6232. }
  6233. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6234. /* TODO: Audit driver for usage of these members and see
  6235. * if mac80211 deprecates them (priv->bssid looks like it
  6236. * shouldn't be there, but I haven't scanned the IBSS code
  6237. * to verify) - jpk */
  6238. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6239. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6240. iwl4965_config_ap(priv);
  6241. else {
  6242. rc = iwl4965_commit_rxon(priv);
  6243. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6244. iwl4965_rxon_add_station(
  6245. priv, priv->active_rxon.bssid_addr, 1);
  6246. }
  6247. } else {
  6248. iwl4965_scan_cancel_timeout(priv, 100);
  6249. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6250. iwl4965_commit_rxon(priv);
  6251. }
  6252. done:
  6253. spin_lock_irqsave(&priv->lock, flags);
  6254. if (!conf->ssid_len)
  6255. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6256. else
  6257. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6258. priv->essid_len = conf->ssid_len;
  6259. spin_unlock_irqrestore(&priv->lock, flags);
  6260. IWL_DEBUG_MAC80211("leave\n");
  6261. mutex_unlock(&priv->mutex);
  6262. return 0;
  6263. }
  6264. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6265. unsigned int changed_flags,
  6266. unsigned int *total_flags,
  6267. int mc_count, struct dev_addr_list *mc_list)
  6268. {
  6269. /*
  6270. * XXX: dummy
  6271. * see also iwl4965_connection_init_rx_config
  6272. */
  6273. *total_flags = 0;
  6274. }
  6275. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6276. struct ieee80211_if_init_conf *conf)
  6277. {
  6278. struct iwl4965_priv *priv = hw->priv;
  6279. IWL_DEBUG_MAC80211("enter\n");
  6280. mutex_lock(&priv->mutex);
  6281. if (iwl4965_is_ready_rf(priv)) {
  6282. iwl4965_scan_cancel_timeout(priv, 100);
  6283. cancel_delayed_work(&priv->post_associate);
  6284. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6285. iwl4965_commit_rxon(priv);
  6286. }
  6287. if (priv->vif == conf->vif) {
  6288. priv->vif = NULL;
  6289. memset(priv->bssid, 0, ETH_ALEN);
  6290. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6291. priv->essid_len = 0;
  6292. }
  6293. mutex_unlock(&priv->mutex);
  6294. IWL_DEBUG_MAC80211("leave\n");
  6295. }
  6296. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6297. struct ieee80211_vif *vif,
  6298. struct ieee80211_bss_conf *bss_conf,
  6299. u32 changes)
  6300. {
  6301. struct iwl4965_priv *priv = hw->priv;
  6302. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6303. if (bss_conf->use_short_preamble)
  6304. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6305. else
  6306. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6307. }
  6308. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6309. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6310. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6311. else
  6312. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6313. }
  6314. if (changes & BSS_CHANGED_ASSOC) {
  6315. /*
  6316. * TODO:
  6317. * do stuff instead of sniffing assoc resp
  6318. */
  6319. }
  6320. if (iwl4965_is_associated(priv))
  6321. iwl4965_send_rxon_assoc(priv);
  6322. }
  6323. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6324. {
  6325. int rc = 0;
  6326. unsigned long flags;
  6327. struct iwl4965_priv *priv = hw->priv;
  6328. IWL_DEBUG_MAC80211("enter\n");
  6329. mutex_lock(&priv->mutex);
  6330. spin_lock_irqsave(&priv->lock, flags);
  6331. if (!iwl4965_is_ready_rf(priv)) {
  6332. rc = -EIO;
  6333. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6334. goto out_unlock;
  6335. }
  6336. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6337. rc = -EIO;
  6338. IWL_ERROR("ERROR: APs don't scan\n");
  6339. goto out_unlock;
  6340. }
  6341. /* we don't schedule scan within next_scan_jiffies period */
  6342. if (priv->next_scan_jiffies &&
  6343. time_after(priv->next_scan_jiffies, jiffies)) {
  6344. rc = -EAGAIN;
  6345. goto out_unlock;
  6346. }
  6347. /* if we just finished scan ask for delay */
  6348. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6349. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6350. rc = -EAGAIN;
  6351. goto out_unlock;
  6352. }
  6353. if (len) {
  6354. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6355. iwl4965_escape_essid(ssid, len), (int)len);
  6356. priv->one_direct_scan = 1;
  6357. priv->direct_ssid_len = (u8)
  6358. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6359. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6360. } else
  6361. priv->one_direct_scan = 0;
  6362. rc = iwl4965_scan_initiate(priv);
  6363. IWL_DEBUG_MAC80211("leave\n");
  6364. out_unlock:
  6365. spin_unlock_irqrestore(&priv->lock, flags);
  6366. mutex_unlock(&priv->mutex);
  6367. return rc;
  6368. }
  6369. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6370. const u8 *local_addr, const u8 *addr,
  6371. struct ieee80211_key_conf *key)
  6372. {
  6373. struct iwl4965_priv *priv = hw->priv;
  6374. DECLARE_MAC_BUF(mac);
  6375. int rc = 0;
  6376. u8 sta_id;
  6377. IWL_DEBUG_MAC80211("enter\n");
  6378. if (!iwl4965_param_hwcrypto) {
  6379. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6380. return -EOPNOTSUPP;
  6381. }
  6382. if (is_zero_ether_addr(addr))
  6383. /* only support pairwise keys */
  6384. return -EOPNOTSUPP;
  6385. sta_id = iwl4965_hw_find_station(priv, addr);
  6386. if (sta_id == IWL_INVALID_STATION) {
  6387. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6388. print_mac(mac, addr));
  6389. return -EINVAL;
  6390. }
  6391. mutex_lock(&priv->mutex);
  6392. iwl4965_scan_cancel_timeout(priv, 100);
  6393. switch (cmd) {
  6394. case SET_KEY:
  6395. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6396. if (!rc) {
  6397. iwl4965_set_rxon_hwcrypto(priv, 1);
  6398. iwl4965_commit_rxon(priv);
  6399. key->hw_key_idx = sta_id;
  6400. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6401. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6402. }
  6403. break;
  6404. case DISABLE_KEY:
  6405. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6406. if (!rc) {
  6407. iwl4965_set_rxon_hwcrypto(priv, 0);
  6408. iwl4965_commit_rxon(priv);
  6409. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6410. }
  6411. break;
  6412. default:
  6413. rc = -EINVAL;
  6414. }
  6415. IWL_DEBUG_MAC80211("leave\n");
  6416. mutex_unlock(&priv->mutex);
  6417. return rc;
  6418. }
  6419. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6420. const struct ieee80211_tx_queue_params *params)
  6421. {
  6422. struct iwl4965_priv *priv = hw->priv;
  6423. unsigned long flags;
  6424. int q;
  6425. IWL_DEBUG_MAC80211("enter\n");
  6426. if (!iwl4965_is_ready_rf(priv)) {
  6427. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6428. return -EIO;
  6429. }
  6430. if (queue >= AC_NUM) {
  6431. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6432. return 0;
  6433. }
  6434. if (!priv->qos_data.qos_enable) {
  6435. priv->qos_data.qos_active = 0;
  6436. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6437. return 0;
  6438. }
  6439. q = AC_NUM - 1 - queue;
  6440. spin_lock_irqsave(&priv->lock, flags);
  6441. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6442. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6443. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6444. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6445. cpu_to_le16((params->txop * 32));
  6446. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6447. priv->qos_data.qos_active = 1;
  6448. spin_unlock_irqrestore(&priv->lock, flags);
  6449. mutex_lock(&priv->mutex);
  6450. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6451. iwl4965_activate_qos(priv, 1);
  6452. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6453. iwl4965_activate_qos(priv, 0);
  6454. mutex_unlock(&priv->mutex);
  6455. IWL_DEBUG_MAC80211("leave\n");
  6456. return 0;
  6457. }
  6458. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6459. struct ieee80211_tx_queue_stats *stats)
  6460. {
  6461. struct iwl4965_priv *priv = hw->priv;
  6462. int i, avail;
  6463. struct iwl4965_tx_queue *txq;
  6464. struct iwl4965_queue *q;
  6465. unsigned long flags;
  6466. IWL_DEBUG_MAC80211("enter\n");
  6467. if (!iwl4965_is_ready_rf(priv)) {
  6468. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6469. return -EIO;
  6470. }
  6471. spin_lock_irqsave(&priv->lock, flags);
  6472. for (i = 0; i < AC_NUM; i++) {
  6473. txq = &priv->txq[i];
  6474. q = &txq->q;
  6475. avail = iwl4965_queue_space(q);
  6476. stats->data[i].len = q->n_window - avail;
  6477. stats->data[i].limit = q->n_window - q->high_mark;
  6478. stats->data[i].count = q->n_window;
  6479. }
  6480. spin_unlock_irqrestore(&priv->lock, flags);
  6481. IWL_DEBUG_MAC80211("leave\n");
  6482. return 0;
  6483. }
  6484. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6485. struct ieee80211_low_level_stats *stats)
  6486. {
  6487. IWL_DEBUG_MAC80211("enter\n");
  6488. IWL_DEBUG_MAC80211("leave\n");
  6489. return 0;
  6490. }
  6491. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6492. {
  6493. IWL_DEBUG_MAC80211("enter\n");
  6494. IWL_DEBUG_MAC80211("leave\n");
  6495. return 0;
  6496. }
  6497. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6498. {
  6499. struct iwl4965_priv *priv = hw->priv;
  6500. unsigned long flags;
  6501. mutex_lock(&priv->mutex);
  6502. IWL_DEBUG_MAC80211("enter\n");
  6503. priv->lq_mngr.lq_ready = 0;
  6504. #ifdef CONFIG_IWL4965_HT
  6505. spin_lock_irqsave(&priv->lock, flags);
  6506. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6507. spin_unlock_irqrestore(&priv->lock, flags);
  6508. #endif /* CONFIG_IWL4965_HT */
  6509. iwl4965_reset_qos(priv);
  6510. cancel_delayed_work(&priv->post_associate);
  6511. spin_lock_irqsave(&priv->lock, flags);
  6512. priv->assoc_id = 0;
  6513. priv->assoc_capability = 0;
  6514. priv->call_post_assoc_from_beacon = 0;
  6515. priv->assoc_station_added = 0;
  6516. /* new association get rid of ibss beacon skb */
  6517. if (priv->ibss_beacon)
  6518. dev_kfree_skb(priv->ibss_beacon);
  6519. priv->ibss_beacon = NULL;
  6520. priv->beacon_int = priv->hw->conf.beacon_int;
  6521. priv->timestamp1 = 0;
  6522. priv->timestamp0 = 0;
  6523. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6524. priv->beacon_int = 0;
  6525. spin_unlock_irqrestore(&priv->lock, flags);
  6526. if (!iwl4965_is_ready_rf(priv)) {
  6527. IWL_DEBUG_MAC80211("leave - not ready\n");
  6528. mutex_unlock(&priv->mutex);
  6529. return;
  6530. }
  6531. /* we are restarting association process
  6532. * clear RXON_FILTER_ASSOC_MSK bit
  6533. */
  6534. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6535. iwl4965_scan_cancel_timeout(priv, 100);
  6536. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6537. iwl4965_commit_rxon(priv);
  6538. }
  6539. /* Per mac80211.h: This is only used in IBSS mode... */
  6540. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6541. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6542. mutex_unlock(&priv->mutex);
  6543. return;
  6544. }
  6545. priv->only_active_channel = 0;
  6546. iwl4965_set_rate(priv);
  6547. mutex_unlock(&priv->mutex);
  6548. IWL_DEBUG_MAC80211("leave\n");
  6549. }
  6550. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6551. struct ieee80211_tx_control *control)
  6552. {
  6553. struct iwl4965_priv *priv = hw->priv;
  6554. unsigned long flags;
  6555. mutex_lock(&priv->mutex);
  6556. IWL_DEBUG_MAC80211("enter\n");
  6557. if (!iwl4965_is_ready_rf(priv)) {
  6558. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6559. mutex_unlock(&priv->mutex);
  6560. return -EIO;
  6561. }
  6562. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6563. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6564. mutex_unlock(&priv->mutex);
  6565. return -EIO;
  6566. }
  6567. spin_lock_irqsave(&priv->lock, flags);
  6568. if (priv->ibss_beacon)
  6569. dev_kfree_skb(priv->ibss_beacon);
  6570. priv->ibss_beacon = skb;
  6571. priv->assoc_id = 0;
  6572. IWL_DEBUG_MAC80211("leave\n");
  6573. spin_unlock_irqrestore(&priv->lock, flags);
  6574. iwl4965_reset_qos(priv);
  6575. queue_work(priv->workqueue, &priv->post_associate.work);
  6576. mutex_unlock(&priv->mutex);
  6577. return 0;
  6578. }
  6579. #ifdef CONFIG_IWL4965_HT
  6580. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6581. struct iwl4965_priv *priv)
  6582. {
  6583. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6584. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6585. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6586. IWL_DEBUG_MAC80211("enter: \n");
  6587. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6588. iwl_conf->is_ht = 0;
  6589. return;
  6590. }
  6591. iwl_conf->is_ht = 1;
  6592. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6593. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6594. iwl_conf->sgf |= 0x1;
  6595. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6596. iwl_conf->sgf |= 0x2;
  6597. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6598. iwl_conf->max_amsdu_size =
  6599. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6600. iwl_conf->supported_chan_width =
  6601. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6602. iwl_conf->extension_chan_offset =
  6603. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6604. /* If no above or below channel supplied disable FAT channel */
  6605. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6606. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6607. iwl_conf->supported_chan_width = 0;
  6608. iwl_conf->tx_mimo_ps_mode =
  6609. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6610. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6611. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6612. iwl_conf->tx_chan_width =
  6613. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6614. iwl_conf->ht_protection =
  6615. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6616. iwl_conf->non_GF_STA_present =
  6617. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6618. IWL_DEBUG_MAC80211("control channel %d\n",
  6619. iwl_conf->control_channel);
  6620. IWL_DEBUG_MAC80211("leave\n");
  6621. }
  6622. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6623. struct ieee80211_conf *conf)
  6624. {
  6625. struct iwl4965_priv *priv = hw->priv;
  6626. IWL_DEBUG_MAC80211("enter: \n");
  6627. iwl4965_ht_info_fill(conf, priv);
  6628. iwl4965_set_rxon_chain(priv);
  6629. if (priv && priv->assoc_id &&
  6630. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6631. unsigned long flags;
  6632. spin_lock_irqsave(&priv->lock, flags);
  6633. if (priv->beacon_int)
  6634. queue_work(priv->workqueue, &priv->post_associate.work);
  6635. else
  6636. priv->call_post_assoc_from_beacon = 1;
  6637. spin_unlock_irqrestore(&priv->lock, flags);
  6638. }
  6639. IWL_DEBUG_MAC80211("leave:\n");
  6640. return 0;
  6641. }
  6642. #endif /*CONFIG_IWL4965_HT*/
  6643. /*****************************************************************************
  6644. *
  6645. * sysfs attributes
  6646. *
  6647. *****************************************************************************/
  6648. #ifdef CONFIG_IWL4965_DEBUG
  6649. /*
  6650. * The following adds a new attribute to the sysfs representation
  6651. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6652. * used for controlling the debug level.
  6653. *
  6654. * See the level definitions in iwl for details.
  6655. */
  6656. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6657. {
  6658. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6659. }
  6660. static ssize_t store_debug_level(struct device_driver *d,
  6661. const char *buf, size_t count)
  6662. {
  6663. char *p = (char *)buf;
  6664. u32 val;
  6665. val = simple_strtoul(p, &p, 0);
  6666. if (p == buf)
  6667. printk(KERN_INFO DRV_NAME
  6668. ": %s is not in hex or decimal form.\n", buf);
  6669. else
  6670. iwl4965_debug_level = val;
  6671. return strnlen(buf, count);
  6672. }
  6673. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6674. show_debug_level, store_debug_level);
  6675. #endif /* CONFIG_IWL4965_DEBUG */
  6676. static ssize_t show_rf_kill(struct device *d,
  6677. struct device_attribute *attr, char *buf)
  6678. {
  6679. /*
  6680. * 0 - RF kill not enabled
  6681. * 1 - SW based RF kill active (sysfs)
  6682. * 2 - HW based RF kill active
  6683. * 3 - Both HW and SW based RF kill active
  6684. */
  6685. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6686. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6687. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6688. return sprintf(buf, "%i\n", val);
  6689. }
  6690. static ssize_t store_rf_kill(struct device *d,
  6691. struct device_attribute *attr,
  6692. const char *buf, size_t count)
  6693. {
  6694. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6695. mutex_lock(&priv->mutex);
  6696. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6697. mutex_unlock(&priv->mutex);
  6698. return count;
  6699. }
  6700. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6701. static ssize_t show_temperature(struct device *d,
  6702. struct device_attribute *attr, char *buf)
  6703. {
  6704. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6705. if (!iwl4965_is_alive(priv))
  6706. return -EAGAIN;
  6707. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6708. }
  6709. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6710. static ssize_t show_rs_window(struct device *d,
  6711. struct device_attribute *attr,
  6712. char *buf)
  6713. {
  6714. struct iwl4965_priv *priv = d->driver_data;
  6715. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6716. }
  6717. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6718. static ssize_t show_tx_power(struct device *d,
  6719. struct device_attribute *attr, char *buf)
  6720. {
  6721. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6722. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6723. }
  6724. static ssize_t store_tx_power(struct device *d,
  6725. struct device_attribute *attr,
  6726. const char *buf, size_t count)
  6727. {
  6728. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6729. char *p = (char *)buf;
  6730. u32 val;
  6731. val = simple_strtoul(p, &p, 10);
  6732. if (p == buf)
  6733. printk(KERN_INFO DRV_NAME
  6734. ": %s is not in decimal form.\n", buf);
  6735. else
  6736. iwl4965_hw_reg_set_txpower(priv, val);
  6737. return count;
  6738. }
  6739. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6740. static ssize_t show_flags(struct device *d,
  6741. struct device_attribute *attr, char *buf)
  6742. {
  6743. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6744. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6745. }
  6746. static ssize_t store_flags(struct device *d,
  6747. struct device_attribute *attr,
  6748. const char *buf, size_t count)
  6749. {
  6750. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6751. u32 flags = simple_strtoul(buf, NULL, 0);
  6752. mutex_lock(&priv->mutex);
  6753. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6754. /* Cancel any currently running scans... */
  6755. if (iwl4965_scan_cancel_timeout(priv, 100))
  6756. IWL_WARNING("Could not cancel scan.\n");
  6757. else {
  6758. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6759. flags);
  6760. priv->staging_rxon.flags = cpu_to_le32(flags);
  6761. iwl4965_commit_rxon(priv);
  6762. }
  6763. }
  6764. mutex_unlock(&priv->mutex);
  6765. return count;
  6766. }
  6767. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6768. static ssize_t show_filter_flags(struct device *d,
  6769. struct device_attribute *attr, char *buf)
  6770. {
  6771. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6772. return sprintf(buf, "0x%04X\n",
  6773. le32_to_cpu(priv->active_rxon.filter_flags));
  6774. }
  6775. static ssize_t store_filter_flags(struct device *d,
  6776. struct device_attribute *attr,
  6777. const char *buf, size_t count)
  6778. {
  6779. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6780. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6781. mutex_lock(&priv->mutex);
  6782. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6783. /* Cancel any currently running scans... */
  6784. if (iwl4965_scan_cancel_timeout(priv, 100))
  6785. IWL_WARNING("Could not cancel scan.\n");
  6786. else {
  6787. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6788. "0x%04X\n", filter_flags);
  6789. priv->staging_rxon.filter_flags =
  6790. cpu_to_le32(filter_flags);
  6791. iwl4965_commit_rxon(priv);
  6792. }
  6793. }
  6794. mutex_unlock(&priv->mutex);
  6795. return count;
  6796. }
  6797. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6798. store_filter_flags);
  6799. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6800. static ssize_t show_measurement(struct device *d,
  6801. struct device_attribute *attr, char *buf)
  6802. {
  6803. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6804. struct iwl4965_spectrum_notification measure_report;
  6805. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6806. u8 *data = (u8 *) & measure_report;
  6807. unsigned long flags;
  6808. spin_lock_irqsave(&priv->lock, flags);
  6809. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6810. spin_unlock_irqrestore(&priv->lock, flags);
  6811. return 0;
  6812. }
  6813. memcpy(&measure_report, &priv->measure_report, size);
  6814. priv->measurement_status = 0;
  6815. spin_unlock_irqrestore(&priv->lock, flags);
  6816. while (size && (PAGE_SIZE - len)) {
  6817. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6818. PAGE_SIZE - len, 1);
  6819. len = strlen(buf);
  6820. if (PAGE_SIZE - len)
  6821. buf[len++] = '\n';
  6822. ofs += 16;
  6823. size -= min(size, 16U);
  6824. }
  6825. return len;
  6826. }
  6827. static ssize_t store_measurement(struct device *d,
  6828. struct device_attribute *attr,
  6829. const char *buf, size_t count)
  6830. {
  6831. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6832. struct ieee80211_measurement_params params = {
  6833. .channel = le16_to_cpu(priv->active_rxon.channel),
  6834. .start_time = cpu_to_le64(priv->last_tsf),
  6835. .duration = cpu_to_le16(1),
  6836. };
  6837. u8 type = IWL_MEASURE_BASIC;
  6838. u8 buffer[32];
  6839. u8 channel;
  6840. if (count) {
  6841. char *p = buffer;
  6842. strncpy(buffer, buf, min(sizeof(buffer), count));
  6843. channel = simple_strtoul(p, NULL, 0);
  6844. if (channel)
  6845. params.channel = channel;
  6846. p = buffer;
  6847. while (*p && *p != ' ')
  6848. p++;
  6849. if (*p)
  6850. type = simple_strtoul(p + 1, NULL, 0);
  6851. }
  6852. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6853. "channel %d (for '%s')\n", type, params.channel, buf);
  6854. iwl4965_get_measurement(priv, &params, type);
  6855. return count;
  6856. }
  6857. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6858. show_measurement, store_measurement);
  6859. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6860. static ssize_t store_retry_rate(struct device *d,
  6861. struct device_attribute *attr,
  6862. const char *buf, size_t count)
  6863. {
  6864. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6865. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6866. if (priv->retry_rate <= 0)
  6867. priv->retry_rate = 1;
  6868. return count;
  6869. }
  6870. static ssize_t show_retry_rate(struct device *d,
  6871. struct device_attribute *attr, char *buf)
  6872. {
  6873. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6874. return sprintf(buf, "%d", priv->retry_rate);
  6875. }
  6876. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6877. store_retry_rate);
  6878. static ssize_t store_power_level(struct device *d,
  6879. struct device_attribute *attr,
  6880. const char *buf, size_t count)
  6881. {
  6882. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6883. int rc;
  6884. int mode;
  6885. mode = simple_strtoul(buf, NULL, 0);
  6886. mutex_lock(&priv->mutex);
  6887. if (!iwl4965_is_ready(priv)) {
  6888. rc = -EAGAIN;
  6889. goto out;
  6890. }
  6891. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6892. mode = IWL_POWER_AC;
  6893. else
  6894. mode |= IWL_POWER_ENABLED;
  6895. if (mode != priv->power_mode) {
  6896. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6897. if (rc) {
  6898. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6899. goto out;
  6900. }
  6901. priv->power_mode = mode;
  6902. }
  6903. rc = count;
  6904. out:
  6905. mutex_unlock(&priv->mutex);
  6906. return rc;
  6907. }
  6908. #define MAX_WX_STRING 80
  6909. /* Values are in microsecond */
  6910. static const s32 timeout_duration[] = {
  6911. 350000,
  6912. 250000,
  6913. 75000,
  6914. 37000,
  6915. 25000,
  6916. };
  6917. static const s32 period_duration[] = {
  6918. 400000,
  6919. 700000,
  6920. 1000000,
  6921. 1000000,
  6922. 1000000
  6923. };
  6924. static ssize_t show_power_level(struct device *d,
  6925. struct device_attribute *attr, char *buf)
  6926. {
  6927. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6928. int level = IWL_POWER_LEVEL(priv->power_mode);
  6929. char *p = buf;
  6930. p += sprintf(p, "%d ", level);
  6931. switch (level) {
  6932. case IWL_POWER_MODE_CAM:
  6933. case IWL_POWER_AC:
  6934. p += sprintf(p, "(AC)");
  6935. break;
  6936. case IWL_POWER_BATTERY:
  6937. p += sprintf(p, "(BATTERY)");
  6938. break;
  6939. default:
  6940. p += sprintf(p,
  6941. "(Timeout %dms, Period %dms)",
  6942. timeout_duration[level - 1] / 1000,
  6943. period_duration[level - 1] / 1000);
  6944. }
  6945. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6946. p += sprintf(p, " OFF\n");
  6947. else
  6948. p += sprintf(p, " \n");
  6949. return (p - buf + 1);
  6950. }
  6951. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6952. store_power_level);
  6953. static ssize_t show_channels(struct device *d,
  6954. struct device_attribute *attr, char *buf)
  6955. {
  6956. /* all this shit doesn't belong into sysfs anyway */
  6957. return 0;
  6958. }
  6959. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6960. static ssize_t show_statistics(struct device *d,
  6961. struct device_attribute *attr, char *buf)
  6962. {
  6963. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6964. u32 size = sizeof(struct iwl4965_notif_statistics);
  6965. u32 len = 0, ofs = 0;
  6966. u8 *data = (u8 *) & priv->statistics;
  6967. int rc = 0;
  6968. if (!iwl4965_is_alive(priv))
  6969. return -EAGAIN;
  6970. mutex_lock(&priv->mutex);
  6971. rc = iwl4965_send_statistics_request(priv);
  6972. mutex_unlock(&priv->mutex);
  6973. if (rc) {
  6974. len = sprintf(buf,
  6975. "Error sending statistics request: 0x%08X\n", rc);
  6976. return len;
  6977. }
  6978. while (size && (PAGE_SIZE - len)) {
  6979. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6980. PAGE_SIZE - len, 1);
  6981. len = strlen(buf);
  6982. if (PAGE_SIZE - len)
  6983. buf[len++] = '\n';
  6984. ofs += 16;
  6985. size -= min(size, 16U);
  6986. }
  6987. return len;
  6988. }
  6989. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6990. static ssize_t show_antenna(struct device *d,
  6991. struct device_attribute *attr, char *buf)
  6992. {
  6993. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6994. if (!iwl4965_is_alive(priv))
  6995. return -EAGAIN;
  6996. return sprintf(buf, "%d\n", priv->antenna);
  6997. }
  6998. static ssize_t store_antenna(struct device *d,
  6999. struct device_attribute *attr,
  7000. const char *buf, size_t count)
  7001. {
  7002. int ant;
  7003. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7004. if (count == 0)
  7005. return 0;
  7006. if (sscanf(buf, "%1i", &ant) != 1) {
  7007. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7008. return count;
  7009. }
  7010. if ((ant >= 0) && (ant <= 2)) {
  7011. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7012. priv->antenna = (enum iwl4965_antenna)ant;
  7013. } else
  7014. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7015. return count;
  7016. }
  7017. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7018. static ssize_t show_status(struct device *d,
  7019. struct device_attribute *attr, char *buf)
  7020. {
  7021. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7022. if (!iwl4965_is_alive(priv))
  7023. return -EAGAIN;
  7024. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7025. }
  7026. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7027. static ssize_t dump_error_log(struct device *d,
  7028. struct device_attribute *attr,
  7029. const char *buf, size_t count)
  7030. {
  7031. char *p = (char *)buf;
  7032. if (p[0] == '1')
  7033. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7034. return strnlen(buf, count);
  7035. }
  7036. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7037. static ssize_t dump_event_log(struct device *d,
  7038. struct device_attribute *attr,
  7039. const char *buf, size_t count)
  7040. {
  7041. char *p = (char *)buf;
  7042. if (p[0] == '1')
  7043. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7044. return strnlen(buf, count);
  7045. }
  7046. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7047. /*****************************************************************************
  7048. *
  7049. * driver setup and teardown
  7050. *
  7051. *****************************************************************************/
  7052. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7053. {
  7054. priv->workqueue = create_workqueue(DRV_NAME);
  7055. init_waitqueue_head(&priv->wait_command_queue);
  7056. INIT_WORK(&priv->up, iwl4965_bg_up);
  7057. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7058. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7059. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7060. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7061. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7062. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7063. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7064. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7065. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7066. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7067. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7068. iwl4965_hw_setup_deferred_work(priv);
  7069. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7070. iwl4965_irq_tasklet, (unsigned long)priv);
  7071. }
  7072. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7073. {
  7074. iwl4965_hw_cancel_deferred_work(priv);
  7075. cancel_delayed_work_sync(&priv->init_alive_start);
  7076. cancel_delayed_work(&priv->scan_check);
  7077. cancel_delayed_work(&priv->alive_start);
  7078. cancel_delayed_work(&priv->post_associate);
  7079. cancel_work_sync(&priv->beacon_update);
  7080. }
  7081. static struct attribute *iwl4965_sysfs_entries[] = {
  7082. &dev_attr_antenna.attr,
  7083. &dev_attr_channels.attr,
  7084. &dev_attr_dump_errors.attr,
  7085. &dev_attr_dump_events.attr,
  7086. &dev_attr_flags.attr,
  7087. &dev_attr_filter_flags.attr,
  7088. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7089. &dev_attr_measurement.attr,
  7090. #endif
  7091. &dev_attr_power_level.attr,
  7092. &dev_attr_retry_rate.attr,
  7093. &dev_attr_rf_kill.attr,
  7094. &dev_attr_rs_window.attr,
  7095. &dev_attr_statistics.attr,
  7096. &dev_attr_status.attr,
  7097. &dev_attr_temperature.attr,
  7098. &dev_attr_tx_power.attr,
  7099. NULL
  7100. };
  7101. static struct attribute_group iwl4965_attribute_group = {
  7102. .name = NULL, /* put in device directory */
  7103. .attrs = iwl4965_sysfs_entries,
  7104. };
  7105. static struct ieee80211_ops iwl4965_hw_ops = {
  7106. .tx = iwl4965_mac_tx,
  7107. .start = iwl4965_mac_start,
  7108. .stop = iwl4965_mac_stop,
  7109. .add_interface = iwl4965_mac_add_interface,
  7110. .remove_interface = iwl4965_mac_remove_interface,
  7111. .config = iwl4965_mac_config,
  7112. .config_interface = iwl4965_mac_config_interface,
  7113. .configure_filter = iwl4965_configure_filter,
  7114. .set_key = iwl4965_mac_set_key,
  7115. .get_stats = iwl4965_mac_get_stats,
  7116. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7117. .conf_tx = iwl4965_mac_conf_tx,
  7118. .get_tsf = iwl4965_mac_get_tsf,
  7119. .reset_tsf = iwl4965_mac_reset_tsf,
  7120. .beacon_update = iwl4965_mac_beacon_update,
  7121. .bss_info_changed = iwl4965_bss_info_changed,
  7122. #ifdef CONFIG_IWL4965_HT
  7123. .conf_ht = iwl4965_mac_conf_ht,
  7124. .ampdu_action = iwl4965_mac_ampdu_action,
  7125. #endif /* CONFIG_IWL4965_HT */
  7126. .hw_scan = iwl4965_mac_hw_scan
  7127. };
  7128. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7129. {
  7130. int err = 0;
  7131. struct iwl4965_priv *priv;
  7132. struct ieee80211_hw *hw;
  7133. int i;
  7134. DECLARE_MAC_BUF(mac);
  7135. /* Disabling hardware scan means that mac80211 will perform scans
  7136. * "the hard way", rather than using device's scan. */
  7137. if (iwl4965_param_disable_hw_scan) {
  7138. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7139. iwl4965_hw_ops.hw_scan = NULL;
  7140. }
  7141. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7142. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7143. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7144. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7145. err = -EINVAL;
  7146. goto out;
  7147. }
  7148. /* mac80211 allocates memory for this device instance, including
  7149. * space for this driver's private structure */
  7150. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7151. if (hw == NULL) {
  7152. IWL_ERROR("Can not allocate network device\n");
  7153. err = -ENOMEM;
  7154. goto out;
  7155. }
  7156. SET_IEEE80211_DEV(hw, &pdev->dev);
  7157. hw->rate_control_algorithm = "iwl-4965-rs";
  7158. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7159. priv = hw->priv;
  7160. priv->hw = hw;
  7161. priv->pci_dev = pdev;
  7162. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7163. #ifdef CONFIG_IWL4965_DEBUG
  7164. iwl4965_debug_level = iwl4965_param_debug;
  7165. atomic_set(&priv->restrict_refcnt, 0);
  7166. #endif
  7167. priv->retry_rate = 1;
  7168. priv->ibss_beacon = NULL;
  7169. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7170. * the range of signal quality values that we'll provide.
  7171. * Negative values for level/noise indicate that we'll provide dBm.
  7172. * For WE, at least, non-0 values here *enable* display of values
  7173. * in app (iwconfig). */
  7174. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7175. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7176. hw->max_signal = 100; /* link quality indication (%) */
  7177. /* Tell mac80211 our Tx characteristics */
  7178. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7179. /* Default value; 4 EDCA QOS priorities */
  7180. hw->queues = 4;
  7181. #ifdef CONFIG_IWL4965_HT
  7182. /* Enhanced value; more queues, to support 11n aggregation */
  7183. hw->queues = 16;
  7184. #endif /* CONFIG_IWL4965_HT */
  7185. spin_lock_init(&priv->lock);
  7186. spin_lock_init(&priv->power_data.lock);
  7187. spin_lock_init(&priv->sta_lock);
  7188. spin_lock_init(&priv->hcmd_lock);
  7189. spin_lock_init(&priv->lq_mngr.lock);
  7190. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7191. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7192. INIT_LIST_HEAD(&priv->free_frames);
  7193. mutex_init(&priv->mutex);
  7194. if (pci_enable_device(pdev)) {
  7195. err = -ENODEV;
  7196. goto out_ieee80211_free_hw;
  7197. }
  7198. pci_set_master(pdev);
  7199. /* Clear the driver's (not device's) station table */
  7200. iwl4965_clear_stations_table(priv);
  7201. priv->data_retry_limit = -1;
  7202. priv->ieee_channels = NULL;
  7203. priv->ieee_rates = NULL;
  7204. priv->band = IEEE80211_BAND_2GHZ;
  7205. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7206. if (!err)
  7207. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7208. if (err) {
  7209. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7210. goto out_pci_disable_device;
  7211. }
  7212. pci_set_drvdata(pdev, priv);
  7213. err = pci_request_regions(pdev, DRV_NAME);
  7214. if (err)
  7215. goto out_pci_disable_device;
  7216. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7217. * PCI Tx retries from interfering with C3 CPU state */
  7218. pci_write_config_byte(pdev, 0x41, 0x00);
  7219. priv->hw_base = pci_iomap(pdev, 0, 0);
  7220. if (!priv->hw_base) {
  7221. err = -ENODEV;
  7222. goto out_pci_release_regions;
  7223. }
  7224. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7225. (unsigned long long) pci_resource_len(pdev, 0));
  7226. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7227. /* Initialize module parameter values here */
  7228. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7229. if (iwl4965_param_disable) {
  7230. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7231. IWL_DEBUG_INFO("Radio disabled.\n");
  7232. }
  7233. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7234. priv->ps_mode = 0;
  7235. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7236. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7237. priv->ps_mode = IWL_MIMO_PS_NONE;
  7238. /* Choose which receivers/antennas to use */
  7239. iwl4965_set_rxon_chain(priv);
  7240. printk(KERN_INFO DRV_NAME
  7241. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7242. /* Device-specific setup */
  7243. if (iwl4965_hw_set_hw_setting(priv)) {
  7244. IWL_ERROR("failed to set hw settings\n");
  7245. goto out_iounmap;
  7246. }
  7247. if (iwl4965_param_qos_enable)
  7248. priv->qos_data.qos_enable = 1;
  7249. iwl4965_reset_qos(priv);
  7250. priv->qos_data.qos_active = 0;
  7251. priv->qos_data.qos_cap.val = 0;
  7252. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7253. iwl4965_setup_deferred_work(priv);
  7254. iwl4965_setup_rx_handlers(priv);
  7255. priv->rates_mask = IWL_RATES_MASK;
  7256. /* If power management is turned on, default to AC mode */
  7257. priv->power_mode = IWL_POWER_AC;
  7258. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7259. iwl4965_disable_interrupts(priv);
  7260. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7261. if (err) {
  7262. IWL_ERROR("failed to create sysfs device attributes\n");
  7263. goto out_release_irq;
  7264. }
  7265. /* nic init */
  7266. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7267. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7268. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7269. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7270. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7271. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7272. if (err < 0) {
  7273. IWL_DEBUG_INFO("Failed to init the card\n");
  7274. goto out_remove_sysfs;
  7275. }
  7276. /* Read the EEPROM */
  7277. err = iwl4965_eeprom_init(priv);
  7278. if (err) {
  7279. IWL_ERROR("Unable to init EEPROM\n");
  7280. goto out_remove_sysfs;
  7281. }
  7282. /* MAC Address location in EEPROM same for 3945/4965 */
  7283. get_eeprom_mac(priv, priv->mac_addr);
  7284. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7285. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7286. err = iwl4965_init_channel_map(priv);
  7287. if (err) {
  7288. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7289. goto out_remove_sysfs;
  7290. }
  7291. err = iwl4965_init_geos(priv);
  7292. if (err) {
  7293. IWL_ERROR("initializing geos failed: %d\n", err);
  7294. goto out_free_channel_map;
  7295. }
  7296. iwl4965_rate_control_register(priv->hw);
  7297. err = ieee80211_register_hw(priv->hw);
  7298. if (err) {
  7299. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7300. goto out_free_geos;
  7301. }
  7302. priv->hw->conf.beacon_int = 100;
  7303. priv->mac80211_registered = 1;
  7304. pci_save_state(pdev);
  7305. pci_disable_device(pdev);
  7306. return 0;
  7307. out_free_geos:
  7308. iwl4965_free_geos(priv);
  7309. out_free_channel_map:
  7310. iwl4965_free_channel_map(priv);
  7311. out_remove_sysfs:
  7312. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7313. out_release_irq:
  7314. destroy_workqueue(priv->workqueue);
  7315. priv->workqueue = NULL;
  7316. iwl4965_unset_hw_setting(priv);
  7317. out_iounmap:
  7318. pci_iounmap(pdev, priv->hw_base);
  7319. out_pci_release_regions:
  7320. pci_release_regions(pdev);
  7321. out_pci_disable_device:
  7322. pci_disable_device(pdev);
  7323. pci_set_drvdata(pdev, NULL);
  7324. out_ieee80211_free_hw:
  7325. ieee80211_free_hw(priv->hw);
  7326. out:
  7327. return err;
  7328. }
  7329. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7330. {
  7331. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7332. struct list_head *p, *q;
  7333. int i;
  7334. if (!priv)
  7335. return;
  7336. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7337. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7338. iwl4965_down(priv);
  7339. /* Free MAC hash list for ADHOC */
  7340. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7341. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7342. list_del(p);
  7343. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7344. }
  7345. }
  7346. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7347. iwl4965_dealloc_ucode_pci(priv);
  7348. if (priv->rxq.bd)
  7349. iwl4965_rx_queue_free(priv, &priv->rxq);
  7350. iwl4965_hw_txq_ctx_free(priv);
  7351. iwl4965_unset_hw_setting(priv);
  7352. iwl4965_clear_stations_table(priv);
  7353. if (priv->mac80211_registered) {
  7354. ieee80211_unregister_hw(priv->hw);
  7355. iwl4965_rate_control_unregister(priv->hw);
  7356. }
  7357. /*netif_stop_queue(dev); */
  7358. flush_workqueue(priv->workqueue);
  7359. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7360. * priv->workqueue... so we can't take down the workqueue
  7361. * until now... */
  7362. destroy_workqueue(priv->workqueue);
  7363. priv->workqueue = NULL;
  7364. pci_iounmap(pdev, priv->hw_base);
  7365. pci_release_regions(pdev);
  7366. pci_disable_device(pdev);
  7367. pci_set_drvdata(pdev, NULL);
  7368. iwl4965_free_channel_map(priv);
  7369. iwl4965_free_geos(priv);
  7370. if (priv->ibss_beacon)
  7371. dev_kfree_skb(priv->ibss_beacon);
  7372. ieee80211_free_hw(priv->hw);
  7373. }
  7374. #ifdef CONFIG_PM
  7375. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7376. {
  7377. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7378. if (priv->is_open) {
  7379. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7380. iwl4965_mac_stop(priv->hw);
  7381. priv->is_open = 1;
  7382. }
  7383. pci_set_power_state(pdev, PCI_D3hot);
  7384. return 0;
  7385. }
  7386. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7387. {
  7388. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7389. pci_set_power_state(pdev, PCI_D0);
  7390. if (priv->is_open)
  7391. iwl4965_mac_start(priv->hw);
  7392. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7393. return 0;
  7394. }
  7395. #endif /* CONFIG_PM */
  7396. /*****************************************************************************
  7397. *
  7398. * driver and module entry point
  7399. *
  7400. *****************************************************************************/
  7401. static struct pci_driver iwl4965_driver = {
  7402. .name = DRV_NAME,
  7403. .id_table = iwl4965_hw_card_ids,
  7404. .probe = iwl4965_pci_probe,
  7405. .remove = __devexit_p(iwl4965_pci_remove),
  7406. #ifdef CONFIG_PM
  7407. .suspend = iwl4965_pci_suspend,
  7408. .resume = iwl4965_pci_resume,
  7409. #endif
  7410. };
  7411. static int __init iwl4965_init(void)
  7412. {
  7413. int ret;
  7414. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7415. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7416. ret = pci_register_driver(&iwl4965_driver);
  7417. if (ret) {
  7418. IWL_ERROR("Unable to initialize PCI module\n");
  7419. return ret;
  7420. }
  7421. #ifdef CONFIG_IWL4965_DEBUG
  7422. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7423. if (ret) {
  7424. IWL_ERROR("Unable to create driver sysfs file\n");
  7425. pci_unregister_driver(&iwl4965_driver);
  7426. return ret;
  7427. }
  7428. #endif
  7429. return ret;
  7430. }
  7431. static void __exit iwl4965_exit(void)
  7432. {
  7433. #ifdef CONFIG_IWL4965_DEBUG
  7434. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7435. #endif
  7436. pci_unregister_driver(&iwl4965_driver);
  7437. }
  7438. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7439. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7440. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7441. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7442. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7443. MODULE_PARM_DESC(hwcrypto,
  7444. "using hardware crypto engine (default 0 [software])\n");
  7445. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7446. MODULE_PARM_DESC(debug, "debug output mask");
  7447. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7448. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7449. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7450. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7451. /* QoS */
  7452. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7453. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7454. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7455. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7456. module_exit(iwl4965_exit);
  7457. module_init(iwl4965_init);