rx.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290
  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/gfp.h>
  24. #include <linux/sched.h>
  25. #include "wlcore.h"
  26. #include "debug.h"
  27. #include "acx.h"
  28. #include "rx.h"
  29. #include "tx.h"
  30. #include "io.h"
  31. /*
  32. * TODO: this is here just for now, it must be removed when the data
  33. * operations are in place.
  34. */
  35. #include "../wl12xx/reg.h"
  36. static u8 wl12xx_rx_get_mem_block(struct wl12xx_fw_status *status,
  37. u32 drv_rx_counter)
  38. {
  39. return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  40. RX_MEM_BLOCK_MASK;
  41. }
  42. static u32 wl12xx_rx_get_buf_size(struct wl12xx_fw_status *status,
  43. u32 drv_rx_counter)
  44. {
  45. return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  46. RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
  47. }
  48. static bool wl12xx_rx_get_unaligned(struct wl12xx_fw_status *status,
  49. u32 drv_rx_counter)
  50. {
  51. /* Convert the value to bool */
  52. return !!(le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
  53. RX_BUF_UNALIGNED_PAYLOAD);
  54. }
  55. static void wl1271_rx_status(struct wl1271 *wl,
  56. struct wl1271_rx_descriptor *desc,
  57. struct ieee80211_rx_status *status,
  58. u8 beacon)
  59. {
  60. memset(status, 0, sizeof(struct ieee80211_rx_status));
  61. if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
  62. status->band = IEEE80211_BAND_2GHZ;
  63. else
  64. status->band = IEEE80211_BAND_5GHZ;
  65. status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);
  66. /* 11n support */
  67. if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
  68. status->flag |= RX_FLAG_HT;
  69. status->signal = desc->rssi;
  70. /*
  71. * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
  72. * need to divide by two for now, but TI has been discussing about
  73. * changing it. This needs to be rechecked.
  74. */
  75. wl->noise = desc->rssi - (desc->snr >> 1);
  76. status->freq = ieee80211_channel_to_frequency(desc->channel,
  77. status->band);
  78. if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
  79. u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
  80. status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
  81. RX_FLAG_DECRYPTED;
  82. if (unlikely(desc_err_code == WL1271_RX_DESC_MIC_FAIL)) {
  83. status->flag |= RX_FLAG_MMIC_ERROR;
  84. wl1271_warning("Michael MIC error");
  85. }
  86. }
  87. }
  88. static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
  89. bool unaligned, u8 *hlid)
  90. {
  91. struct wl1271_rx_descriptor *desc;
  92. struct sk_buff *skb;
  93. struct ieee80211_hdr *hdr;
  94. u8 *buf;
  95. u8 beacon = 0;
  96. u8 is_data = 0;
  97. u8 reserved = unaligned ? NET_IP_ALIGN : 0;
  98. u16 seq_num;
  99. /*
  100. * In PLT mode we seem to get frames and mac80211 warns about them,
  101. * workaround this by not retrieving them at all.
  102. */
  103. if (unlikely(wl->plt))
  104. return -EINVAL;
  105. /* the data read starts with the descriptor */
  106. desc = (struct wl1271_rx_descriptor *) data;
  107. if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
  108. size_t len = length - sizeof(*desc);
  109. wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
  110. wake_up_interruptible(&wl->fwlog_waitq);
  111. return 0;
  112. }
  113. switch (desc->status & WL1271_RX_DESC_STATUS_MASK) {
  114. /* discard corrupted packets */
  115. case WL1271_RX_DESC_DRIVER_RX_Q_FAIL:
  116. case WL1271_RX_DESC_DECRYPT_FAIL:
  117. wl1271_warning("corrupted packet in RX with status: 0x%x",
  118. desc->status & WL1271_RX_DESC_STATUS_MASK);
  119. return -EINVAL;
  120. case WL1271_RX_DESC_SUCCESS:
  121. case WL1271_RX_DESC_MIC_FAIL:
  122. break;
  123. default:
  124. wl1271_error("invalid RX descriptor status: 0x%x",
  125. desc->status & WL1271_RX_DESC_STATUS_MASK);
  126. return -EINVAL;
  127. }
  128. /* skb length not included rx descriptor */
  129. skb = __dev_alloc_skb(length + reserved - sizeof(*desc), GFP_KERNEL);
  130. if (!skb) {
  131. wl1271_error("Couldn't allocate RX frame");
  132. return -ENOMEM;
  133. }
  134. /* reserve the unaligned payload(if any) */
  135. skb_reserve(skb, reserved);
  136. buf = skb_put(skb, length - sizeof(*desc));
  137. /*
  138. * Copy packets from aggregation buffer to the skbs without rx
  139. * descriptor and with packet payload aligned care. In case of unaligned
  140. * packets copy the packets in offset of 2 bytes guarantee IP header
  141. * payload aligned to 4 bytes.
  142. */
  143. memcpy(buf, data + sizeof(*desc), length - sizeof(*desc));
  144. *hlid = desc->hlid;
  145. hdr = (struct ieee80211_hdr *)skb->data;
  146. if (ieee80211_is_beacon(hdr->frame_control))
  147. beacon = 1;
  148. if (ieee80211_is_data_present(hdr->frame_control))
  149. is_data = 1;
  150. wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
  151. seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  152. wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
  153. skb->len - desc->pad_len,
  154. beacon ? "beacon" : "",
  155. seq_num, *hlid);
  156. skb_trim(skb, skb->len - desc->pad_len);
  157. skb_queue_tail(&wl->deferred_rx_queue, skb);
  158. queue_work(wl->freezable_wq, &wl->netstack_work);
  159. return is_data;
  160. }
  161. void wl12xx_rx(struct wl1271 *wl, struct wl12xx_fw_status *status)
  162. {
  163. struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
  164. unsigned long active_hlids[BITS_TO_LONGS(WL12XX_MAX_LINKS)] = {0};
  165. u32 buf_size;
  166. u32 fw_rx_counter = status->fw_rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
  167. u32 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
  168. u32 rx_counter;
  169. u32 mem_block;
  170. u32 pkt_length;
  171. u32 pkt_offset;
  172. u8 hlid;
  173. bool unaligned = false;
  174. while (drv_rx_counter != fw_rx_counter) {
  175. buf_size = 0;
  176. rx_counter = drv_rx_counter;
  177. while (rx_counter != fw_rx_counter) {
  178. pkt_length = wl12xx_rx_get_buf_size(status, rx_counter);
  179. if (buf_size + pkt_length > WL1271_AGGR_BUFFER_SIZE)
  180. break;
  181. buf_size += pkt_length;
  182. rx_counter++;
  183. rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
  184. }
  185. if (buf_size == 0) {
  186. wl1271_warning("received empty data");
  187. break;
  188. }
  189. if (wl->chip.id != CHIP_ID_1283_PG20) {
  190. /*
  191. * Choose the block we want to read
  192. * For aggregated packets, only the first memory block
  193. * should be retrieved. The FW takes care of the rest.
  194. */
  195. mem_block = wl12xx_rx_get_mem_block(status,
  196. drv_rx_counter);
  197. wl->rx_mem_pool_addr.addr = (mem_block << 8) +
  198. le32_to_cpu(wl_mem_map->packet_memory_pool_start);
  199. wl->rx_mem_pool_addr.addr_extra =
  200. wl->rx_mem_pool_addr.addr + 4;
  201. wlcore_write_data(wl, REG_SLV_REG_DATA,
  202. &wl->rx_mem_pool_addr,
  203. sizeof(wl->rx_mem_pool_addr), false);
  204. }
  205. /* Read all available packets at once */
  206. wlcore_read_data(wl, REG_SLV_MEM_DATA, wl->aggr_buf,
  207. buf_size, true);
  208. /* Split data into separate packets */
  209. pkt_offset = 0;
  210. while (pkt_offset < buf_size) {
  211. pkt_length = wl12xx_rx_get_buf_size(status,
  212. drv_rx_counter);
  213. unaligned = wl12xx_rx_get_unaligned(status,
  214. drv_rx_counter);
  215. /*
  216. * the handle data call can only fail in memory-outage
  217. * conditions, in that case the received frame will just
  218. * be dropped.
  219. */
  220. if (wl1271_rx_handle_data(wl,
  221. wl->aggr_buf + pkt_offset,
  222. pkt_length, unaligned,
  223. &hlid) == 1) {
  224. if (hlid < WL12XX_MAX_LINKS)
  225. __set_bit(hlid, active_hlids);
  226. else
  227. WARN(1,
  228. "hlid exceeded WL12XX_MAX_LINKS "
  229. "(%d)\n", hlid);
  230. }
  231. wl->rx_counter++;
  232. drv_rx_counter++;
  233. drv_rx_counter &= NUM_RX_PKT_DESC_MOD_MASK;
  234. pkt_offset += pkt_length;
  235. }
  236. }
  237. /*
  238. * Write the driver's packet counter to the FW. This is only required
  239. * for older hardware revisions
  240. */
  241. if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION)
  242. wl1271_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,
  243. wl->rx_counter);
  244. wl12xx_rearm_rx_streaming(wl, active_hlids);
  245. }