dmaengine.c 21 KB

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  1. /*
  2. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59
  16. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called COPYING.
  20. */
  21. /*
  22. * This code implements the DMA subsystem. It provides a HW-neutral interface
  23. * for other kernel code to use asynchronous memory copy capabilities,
  24. * if present, and allows different HW DMA drivers to register as providing
  25. * this capability.
  26. *
  27. * Due to the fact we are accelerating what is already a relatively fast
  28. * operation, the code goes to great lengths to avoid additional overhead,
  29. * such as locking.
  30. *
  31. * LOCKING:
  32. *
  33. * The subsystem keeps two global lists, dma_device_list and dma_client_list.
  34. * Both of these are protected by a mutex, dma_list_mutex.
  35. *
  36. * Each device has a channels list, which runs unlocked but is never modified
  37. * once the device is registered, it's just setup by the driver.
  38. *
  39. * Each client is responsible for keeping track of the channels it uses. See
  40. * the definition of dma_event_callback in dmaengine.h.
  41. *
  42. * Each device has a kref, which is initialized to 1 when the device is
  43. * registered. A kref_get is done for each device registered. When the
  44. * device is released, the corresponding kref_put is done in the release
  45. * method. Every time one of the device's channels is allocated to a client,
  46. * a kref_get occurs. When the channel is freed, the corresponding kref_put
  47. * happens. The device's release function does a completion, so
  48. * unregister_device does a remove event, device_unregister, a kref_put
  49. * for the first reference, then waits on the completion for all other
  50. * references to finish.
  51. *
  52. * Each channel has an open-coded implementation of Rusty Russell's "bigref,"
  53. * with a kref and a per_cpu local_t. A dma_chan_get is called when a client
  54. * signals that it wants to use a channel, and dma_chan_put is called when
  55. * a channel is removed or a client using it is unregistered. A client can
  56. * take extra references per outstanding transaction, as is the case with
  57. * the NET DMA client. The release function does a kref_put on the device.
  58. * -ChrisL, DanW
  59. */
  60. #include <linux/init.h>
  61. #include <linux/module.h>
  62. #include <linux/mm.h>
  63. #include <linux/device.h>
  64. #include <linux/dmaengine.h>
  65. #include <linux/hardirq.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/percpu.h>
  68. #include <linux/rcupdate.h>
  69. #include <linux/mutex.h>
  70. #include <linux/jiffies.h>
  71. static DEFINE_MUTEX(dma_list_mutex);
  72. static LIST_HEAD(dma_device_list);
  73. static LIST_HEAD(dma_client_list);
  74. static long dmaengine_ref_count;
  75. /* --- sysfs implementation --- */
  76. static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf)
  77. {
  78. struct dma_chan *chan = to_dma_chan(dev);
  79. unsigned long count = 0;
  80. int i;
  81. for_each_possible_cpu(i)
  82. count += per_cpu_ptr(chan->local, i)->memcpy_count;
  83. return sprintf(buf, "%lu\n", count);
  84. }
  85. static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr,
  86. char *buf)
  87. {
  88. struct dma_chan *chan = to_dma_chan(dev);
  89. unsigned long count = 0;
  90. int i;
  91. for_each_possible_cpu(i)
  92. count += per_cpu_ptr(chan->local, i)->bytes_transferred;
  93. return sprintf(buf, "%lu\n", count);
  94. }
  95. static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf)
  96. {
  97. struct dma_chan *chan = to_dma_chan(dev);
  98. return sprintf(buf, "%d\n", chan->client_count);
  99. }
  100. static struct device_attribute dma_attrs[] = {
  101. __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL),
  102. __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL),
  103. __ATTR(in_use, S_IRUGO, show_in_use, NULL),
  104. __ATTR_NULL
  105. };
  106. static void dma_async_device_cleanup(struct kref *kref);
  107. static void dma_dev_release(struct device *dev)
  108. {
  109. struct dma_chan *chan = to_dma_chan(dev);
  110. kref_put(&chan->device->refcount, dma_async_device_cleanup);
  111. }
  112. static struct class dma_devclass = {
  113. .name = "dma",
  114. .dev_attrs = dma_attrs,
  115. .dev_release = dma_dev_release,
  116. };
  117. /* --- client and device registration --- */
  118. #define dma_chan_satisfies_mask(chan, mask) \
  119. __dma_chan_satisfies_mask((chan), &(mask))
  120. static int
  121. __dma_chan_satisfies_mask(struct dma_chan *chan, dma_cap_mask_t *want)
  122. {
  123. dma_cap_mask_t has;
  124. bitmap_and(has.bits, want->bits, chan->device->cap_mask.bits,
  125. DMA_TX_TYPE_END);
  126. return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
  127. }
  128. static struct module *dma_chan_to_owner(struct dma_chan *chan)
  129. {
  130. return chan->device->dev->driver->owner;
  131. }
  132. /**
  133. * balance_ref_count - catch up the channel reference count
  134. * @chan - channel to balance ->client_count versus dmaengine_ref_count
  135. *
  136. * balance_ref_count must be called under dma_list_mutex
  137. */
  138. static void balance_ref_count(struct dma_chan *chan)
  139. {
  140. struct module *owner = dma_chan_to_owner(chan);
  141. while (chan->client_count < dmaengine_ref_count) {
  142. __module_get(owner);
  143. chan->client_count++;
  144. }
  145. }
  146. /**
  147. * dma_chan_get - try to grab a dma channel's parent driver module
  148. * @chan - channel to grab
  149. *
  150. * Must be called under dma_list_mutex
  151. */
  152. static int dma_chan_get(struct dma_chan *chan)
  153. {
  154. int err = -ENODEV;
  155. struct module *owner = dma_chan_to_owner(chan);
  156. if (chan->client_count) {
  157. __module_get(owner);
  158. err = 0;
  159. } else if (try_module_get(owner))
  160. err = 0;
  161. if (err == 0)
  162. chan->client_count++;
  163. /* allocate upon first client reference */
  164. if (chan->client_count == 1 && err == 0) {
  165. int desc_cnt = chan->device->device_alloc_chan_resources(chan, NULL);
  166. if (desc_cnt < 0) {
  167. err = desc_cnt;
  168. chan->client_count = 0;
  169. module_put(owner);
  170. } else
  171. balance_ref_count(chan);
  172. }
  173. return err;
  174. }
  175. /**
  176. * dma_chan_put - drop a reference to a dma channel's parent driver module
  177. * @chan - channel to release
  178. *
  179. * Must be called under dma_list_mutex
  180. */
  181. static void dma_chan_put(struct dma_chan *chan)
  182. {
  183. if (!chan->client_count)
  184. return; /* this channel failed alloc_chan_resources */
  185. chan->client_count--;
  186. module_put(dma_chan_to_owner(chan));
  187. if (chan->client_count == 0)
  188. chan->device->device_free_chan_resources(chan);
  189. }
  190. /**
  191. * dma_client_chan_alloc - try to allocate channels to a client
  192. * @client: &dma_client
  193. *
  194. * Called with dma_list_mutex held.
  195. */
  196. static void dma_client_chan_alloc(struct dma_client *client)
  197. {
  198. struct dma_device *device;
  199. struct dma_chan *chan;
  200. enum dma_state_client ack;
  201. /* Find a channel */
  202. list_for_each_entry(device, &dma_device_list, global_node) {
  203. /* Does the client require a specific DMA controller? */
  204. if (client->slave && client->slave->dma_dev
  205. && client->slave->dma_dev != device->dev)
  206. continue;
  207. list_for_each_entry(chan, &device->channels, device_node) {
  208. if (!dma_chan_satisfies_mask(chan, client->cap_mask))
  209. continue;
  210. if (!chan->client_count)
  211. continue;
  212. ack = client->event_callback(client, chan,
  213. DMA_RESOURCE_AVAILABLE);
  214. /* we are done once this client rejects
  215. * an available resource
  216. */
  217. if (ack == DMA_NAK)
  218. return;
  219. }
  220. }
  221. }
  222. enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
  223. {
  224. enum dma_status status;
  225. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  226. dma_async_issue_pending(chan);
  227. do {
  228. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  229. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  230. printk(KERN_ERR "dma_sync_wait_timeout!\n");
  231. return DMA_ERROR;
  232. }
  233. } while (status == DMA_IN_PROGRESS);
  234. return status;
  235. }
  236. EXPORT_SYMBOL(dma_sync_wait);
  237. /**
  238. * dma_chan_cleanup - release a DMA channel's resources
  239. * @kref: kernel reference structure that contains the DMA channel device
  240. */
  241. void dma_chan_cleanup(struct kref *kref)
  242. {
  243. struct dma_chan *chan = container_of(kref, struct dma_chan, refcount);
  244. kref_put(&chan->device->refcount, dma_async_device_cleanup);
  245. }
  246. EXPORT_SYMBOL(dma_chan_cleanup);
  247. static void dma_chan_free_rcu(struct rcu_head *rcu)
  248. {
  249. struct dma_chan *chan = container_of(rcu, struct dma_chan, rcu);
  250. kref_put(&chan->refcount, dma_chan_cleanup);
  251. }
  252. static void dma_chan_release(struct dma_chan *chan)
  253. {
  254. call_rcu(&chan->rcu, dma_chan_free_rcu);
  255. }
  256. /**
  257. * dma_chans_notify_available - broadcast available channels to the clients
  258. */
  259. static void dma_clients_notify_available(void)
  260. {
  261. struct dma_client *client;
  262. mutex_lock(&dma_list_mutex);
  263. list_for_each_entry(client, &dma_client_list, global_node)
  264. dma_client_chan_alloc(client);
  265. mutex_unlock(&dma_list_mutex);
  266. }
  267. /**
  268. * dma_async_client_register - register a &dma_client
  269. * @client: ptr to a client structure with valid 'event_callback' and 'cap_mask'
  270. */
  271. void dma_async_client_register(struct dma_client *client)
  272. {
  273. struct dma_device *device, *_d;
  274. struct dma_chan *chan;
  275. int err;
  276. /* validate client data */
  277. BUG_ON(dma_has_cap(DMA_SLAVE, client->cap_mask) &&
  278. !client->slave);
  279. mutex_lock(&dma_list_mutex);
  280. dmaengine_ref_count++;
  281. /* try to grab channels */
  282. list_for_each_entry_safe(device, _d, &dma_device_list, global_node)
  283. list_for_each_entry(chan, &device->channels, device_node) {
  284. err = dma_chan_get(chan);
  285. if (err == -ENODEV) {
  286. /* module removed before we could use it */
  287. list_del_init(&device->global_node);
  288. break;
  289. } else if (err)
  290. pr_err("dmaengine: failed to get %s: (%d)\n",
  291. dev_name(&chan->dev), err);
  292. }
  293. list_add_tail(&client->global_node, &dma_client_list);
  294. mutex_unlock(&dma_list_mutex);
  295. }
  296. EXPORT_SYMBOL(dma_async_client_register);
  297. /**
  298. * dma_async_client_unregister - unregister a client and free the &dma_client
  299. * @client: &dma_client to free
  300. *
  301. * Force frees any allocated DMA channels, frees the &dma_client memory
  302. */
  303. void dma_async_client_unregister(struct dma_client *client)
  304. {
  305. struct dma_device *device;
  306. struct dma_chan *chan;
  307. if (!client)
  308. return;
  309. mutex_lock(&dma_list_mutex);
  310. dmaengine_ref_count--;
  311. BUG_ON(dmaengine_ref_count < 0);
  312. /* drop channel references */
  313. list_for_each_entry(device, &dma_device_list, global_node)
  314. list_for_each_entry(chan, &device->channels, device_node)
  315. dma_chan_put(chan);
  316. list_del(&client->global_node);
  317. mutex_unlock(&dma_list_mutex);
  318. }
  319. EXPORT_SYMBOL(dma_async_client_unregister);
  320. /**
  321. * dma_async_client_chan_request - send all available channels to the
  322. * client that satisfy the capability mask
  323. * @client - requester
  324. */
  325. void dma_async_client_chan_request(struct dma_client *client)
  326. {
  327. mutex_lock(&dma_list_mutex);
  328. dma_client_chan_alloc(client);
  329. mutex_unlock(&dma_list_mutex);
  330. }
  331. EXPORT_SYMBOL(dma_async_client_chan_request);
  332. /**
  333. * dma_async_device_register - registers DMA devices found
  334. * @device: &dma_device
  335. */
  336. int dma_async_device_register(struct dma_device *device)
  337. {
  338. static int id;
  339. int chancnt = 0, rc;
  340. struct dma_chan* chan;
  341. if (!device)
  342. return -ENODEV;
  343. /* validate device routines */
  344. BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
  345. !device->device_prep_dma_memcpy);
  346. BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
  347. !device->device_prep_dma_xor);
  348. BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) &&
  349. !device->device_prep_dma_zero_sum);
  350. BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
  351. !device->device_prep_dma_memset);
  352. BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
  353. !device->device_prep_dma_interrupt);
  354. BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
  355. !device->device_prep_slave_sg);
  356. BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
  357. !device->device_terminate_all);
  358. BUG_ON(!device->device_alloc_chan_resources);
  359. BUG_ON(!device->device_free_chan_resources);
  360. BUG_ON(!device->device_is_tx_complete);
  361. BUG_ON(!device->device_issue_pending);
  362. BUG_ON(!device->dev);
  363. init_completion(&device->done);
  364. kref_init(&device->refcount);
  365. mutex_lock(&dma_list_mutex);
  366. device->dev_id = id++;
  367. mutex_unlock(&dma_list_mutex);
  368. /* represent channels in sysfs. Probably want devs too */
  369. list_for_each_entry(chan, &device->channels, device_node) {
  370. chan->local = alloc_percpu(typeof(*chan->local));
  371. if (chan->local == NULL)
  372. continue;
  373. chan->chan_id = chancnt++;
  374. chan->dev.class = &dma_devclass;
  375. chan->dev.parent = device->dev;
  376. dev_set_name(&chan->dev, "dma%dchan%d",
  377. device->dev_id, chan->chan_id);
  378. rc = device_register(&chan->dev);
  379. if (rc) {
  380. chancnt--;
  381. free_percpu(chan->local);
  382. chan->local = NULL;
  383. goto err_out;
  384. }
  385. /* One for the channel, one of the class device */
  386. kref_get(&device->refcount);
  387. kref_get(&device->refcount);
  388. kref_init(&chan->refcount);
  389. chan->client_count = 0;
  390. chan->slow_ref = 0;
  391. INIT_RCU_HEAD(&chan->rcu);
  392. }
  393. mutex_lock(&dma_list_mutex);
  394. if (dmaengine_ref_count)
  395. list_for_each_entry(chan, &device->channels, device_node) {
  396. /* if clients are already waiting for channels we need
  397. * to take references on their behalf
  398. */
  399. if (dma_chan_get(chan) == -ENODEV) {
  400. /* note we can only get here for the first
  401. * channel as the remaining channels are
  402. * guaranteed to get a reference
  403. */
  404. rc = -ENODEV;
  405. mutex_unlock(&dma_list_mutex);
  406. goto err_out;
  407. }
  408. }
  409. list_add_tail(&device->global_node, &dma_device_list);
  410. mutex_unlock(&dma_list_mutex);
  411. dma_clients_notify_available();
  412. return 0;
  413. err_out:
  414. list_for_each_entry(chan, &device->channels, device_node) {
  415. if (chan->local == NULL)
  416. continue;
  417. kref_put(&device->refcount, dma_async_device_cleanup);
  418. device_unregister(&chan->dev);
  419. chancnt--;
  420. free_percpu(chan->local);
  421. }
  422. return rc;
  423. }
  424. EXPORT_SYMBOL(dma_async_device_register);
  425. /**
  426. * dma_async_device_cleanup - function called when all references are released
  427. * @kref: kernel reference object
  428. */
  429. static void dma_async_device_cleanup(struct kref *kref)
  430. {
  431. struct dma_device *device;
  432. device = container_of(kref, struct dma_device, refcount);
  433. complete(&device->done);
  434. }
  435. /**
  436. * dma_async_device_unregister - unregister a DMA device
  437. * @device: &dma_device
  438. */
  439. void dma_async_device_unregister(struct dma_device *device)
  440. {
  441. struct dma_chan *chan;
  442. mutex_lock(&dma_list_mutex);
  443. list_del(&device->global_node);
  444. mutex_unlock(&dma_list_mutex);
  445. list_for_each_entry(chan, &device->channels, device_node) {
  446. WARN_ONCE(chan->client_count,
  447. "%s called while %d clients hold a reference\n",
  448. __func__, chan->client_count);
  449. device_unregister(&chan->dev);
  450. dma_chan_release(chan);
  451. }
  452. kref_put(&device->refcount, dma_async_device_cleanup);
  453. wait_for_completion(&device->done);
  454. }
  455. EXPORT_SYMBOL(dma_async_device_unregister);
  456. /**
  457. * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
  458. * @chan: DMA channel to offload copy to
  459. * @dest: destination address (virtual)
  460. * @src: source address (virtual)
  461. * @len: length
  462. *
  463. * Both @dest and @src must be mappable to a bus address according to the
  464. * DMA mapping API rules for streaming mappings.
  465. * Both @dest and @src must stay memory resident (kernel memory or locked
  466. * user space pages).
  467. */
  468. dma_cookie_t
  469. dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
  470. void *src, size_t len)
  471. {
  472. struct dma_device *dev = chan->device;
  473. struct dma_async_tx_descriptor *tx;
  474. dma_addr_t dma_dest, dma_src;
  475. dma_cookie_t cookie;
  476. int cpu;
  477. dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE);
  478. dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE);
  479. tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
  480. DMA_CTRL_ACK);
  481. if (!tx) {
  482. dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
  483. dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
  484. return -ENOMEM;
  485. }
  486. tx->callback = NULL;
  487. cookie = tx->tx_submit(tx);
  488. cpu = get_cpu();
  489. per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
  490. per_cpu_ptr(chan->local, cpu)->memcpy_count++;
  491. put_cpu();
  492. return cookie;
  493. }
  494. EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
  495. /**
  496. * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
  497. * @chan: DMA channel to offload copy to
  498. * @page: destination page
  499. * @offset: offset in page to copy to
  500. * @kdata: source address (virtual)
  501. * @len: length
  502. *
  503. * Both @page/@offset and @kdata must be mappable to a bus address according
  504. * to the DMA mapping API rules for streaming mappings.
  505. * Both @page/@offset and @kdata must stay memory resident (kernel memory or
  506. * locked user space pages)
  507. */
  508. dma_cookie_t
  509. dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
  510. unsigned int offset, void *kdata, size_t len)
  511. {
  512. struct dma_device *dev = chan->device;
  513. struct dma_async_tx_descriptor *tx;
  514. dma_addr_t dma_dest, dma_src;
  515. dma_cookie_t cookie;
  516. int cpu;
  517. dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE);
  518. dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE);
  519. tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
  520. DMA_CTRL_ACK);
  521. if (!tx) {
  522. dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
  523. dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
  524. return -ENOMEM;
  525. }
  526. tx->callback = NULL;
  527. cookie = tx->tx_submit(tx);
  528. cpu = get_cpu();
  529. per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
  530. per_cpu_ptr(chan->local, cpu)->memcpy_count++;
  531. put_cpu();
  532. return cookie;
  533. }
  534. EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
  535. /**
  536. * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
  537. * @chan: DMA channel to offload copy to
  538. * @dest_pg: destination page
  539. * @dest_off: offset in page to copy to
  540. * @src_pg: source page
  541. * @src_off: offset in page to copy from
  542. * @len: length
  543. *
  544. * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
  545. * address according to the DMA mapping API rules for streaming mappings.
  546. * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
  547. * (kernel memory or locked user space pages).
  548. */
  549. dma_cookie_t
  550. dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
  551. unsigned int dest_off, struct page *src_pg, unsigned int src_off,
  552. size_t len)
  553. {
  554. struct dma_device *dev = chan->device;
  555. struct dma_async_tx_descriptor *tx;
  556. dma_addr_t dma_dest, dma_src;
  557. dma_cookie_t cookie;
  558. int cpu;
  559. dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE);
  560. dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len,
  561. DMA_FROM_DEVICE);
  562. tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
  563. DMA_CTRL_ACK);
  564. if (!tx) {
  565. dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE);
  566. dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
  567. return -ENOMEM;
  568. }
  569. tx->callback = NULL;
  570. cookie = tx->tx_submit(tx);
  571. cpu = get_cpu();
  572. per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
  573. per_cpu_ptr(chan->local, cpu)->memcpy_count++;
  574. put_cpu();
  575. return cookie;
  576. }
  577. EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
  578. void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
  579. struct dma_chan *chan)
  580. {
  581. tx->chan = chan;
  582. spin_lock_init(&tx->lock);
  583. }
  584. EXPORT_SYMBOL(dma_async_tx_descriptor_init);
  585. /* dma_wait_for_async_tx - spin wait for a transaction to complete
  586. * @tx: in-flight transaction to wait on
  587. *
  588. * This routine assumes that tx was obtained from a call to async_memcpy,
  589. * async_xor, async_memset, etc which ensures that tx is "in-flight" (prepped
  590. * and submitted). Walking the parent chain is only meant to cover for DMA
  591. * drivers that do not implement the DMA_INTERRUPT capability and may race with
  592. * the driver's descriptor cleanup routine.
  593. */
  594. enum dma_status
  595. dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
  596. {
  597. enum dma_status status;
  598. struct dma_async_tx_descriptor *iter;
  599. struct dma_async_tx_descriptor *parent;
  600. if (!tx)
  601. return DMA_SUCCESS;
  602. WARN_ONCE(tx->parent, "%s: speculatively walking dependency chain for"
  603. " %s\n", __func__, dev_name(&tx->chan->dev));
  604. /* poll through the dependency chain, return when tx is complete */
  605. do {
  606. iter = tx;
  607. /* find the root of the unsubmitted dependency chain */
  608. do {
  609. parent = iter->parent;
  610. if (!parent)
  611. break;
  612. else
  613. iter = parent;
  614. } while (parent);
  615. /* there is a small window for ->parent == NULL and
  616. * ->cookie == -EBUSY
  617. */
  618. while (iter->cookie == -EBUSY)
  619. cpu_relax();
  620. status = dma_sync_wait(iter->chan, iter->cookie);
  621. } while (status == DMA_IN_PROGRESS || (iter != tx));
  622. return status;
  623. }
  624. EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  625. /* dma_run_dependencies - helper routine for dma drivers to process
  626. * (start) dependent operations on their target channel
  627. * @tx: transaction with dependencies
  628. */
  629. void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
  630. {
  631. struct dma_async_tx_descriptor *dep = tx->next;
  632. struct dma_async_tx_descriptor *dep_next;
  633. struct dma_chan *chan;
  634. if (!dep)
  635. return;
  636. chan = dep->chan;
  637. /* keep submitting up until a channel switch is detected
  638. * in that case we will be called again as a result of
  639. * processing the interrupt from async_tx_channel_switch
  640. */
  641. for (; dep; dep = dep_next) {
  642. spin_lock_bh(&dep->lock);
  643. dep->parent = NULL;
  644. dep_next = dep->next;
  645. if (dep_next && dep_next->chan == chan)
  646. dep->next = NULL; /* ->next will be submitted */
  647. else
  648. dep_next = NULL; /* submit current dep and terminate */
  649. spin_unlock_bh(&dep->lock);
  650. dep->tx_submit(dep);
  651. }
  652. chan->device->device_issue_pending(chan);
  653. }
  654. EXPORT_SYMBOL_GPL(dma_run_dependencies);
  655. static int __init dma_bus_init(void)
  656. {
  657. mutex_init(&dma_list_mutex);
  658. return class_register(&dma_devclass);
  659. }
  660. subsys_initcall(dma_bus_init);