synclink_cs.c 116 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <linux/delay.h>
  58. #include <linux/ioctl.h>
  59. #include <asm/system.h>
  60. #include <asm/io.h>
  61. #include <asm/irq.h>
  62. #include <asm/dma.h>
  63. #include <linux/bitops.h>
  64. #include <asm/types.h>
  65. #include <linux/termios.h>
  66. #include <linux/workqueue.h>
  67. #include <linux/hdlc.h>
  68. #include <pcmcia/cs_types.h>
  69. #include <pcmcia/cs.h>
  70. #include <pcmcia/cistpl.h>
  71. #include <pcmcia/cisreg.h>
  72. #include <pcmcia/ds.h>
  73. #ifdef CONFIG_HDLC_MODULE
  74. #define CONFIG_HDLC 1
  75. #endif
  76. #define GET_USER(error,value,addr) error = get_user(value,addr)
  77. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  78. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  79. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  80. #include <asm/uaccess.h>
  81. #include "linux/synclink.h"
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. int bh_running;
  163. int bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. int rx_enabled;
  169. int rx_overflow;
  170. int tx_enabled;
  171. int tx_active;
  172. int tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. char irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. BOOLEAN drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. int dosyncppp;
  193. spinlock_t netlock;
  194. #ifdef CONFIG_HDLC
  195. struct net_device *netdev;
  196. #endif
  197. } MGSLPC_INFO;
  198. #define MGSLPC_MAGIC 0x5402
  199. /*
  200. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  201. */
  202. #define TXBUFSIZE 4096
  203. #define CHA 0x00 /* channel A offset */
  204. #define CHB 0x40 /* channel B offset */
  205. /*
  206. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  207. */
  208. #undef PVR
  209. #define RXFIFO 0
  210. #define TXFIFO 0
  211. #define STAR 0x20
  212. #define CMDR 0x20
  213. #define RSTA 0x21
  214. #define PRE 0x21
  215. #define MODE 0x22
  216. #define TIMR 0x23
  217. #define XAD1 0x24
  218. #define XAD2 0x25
  219. #define RAH1 0x26
  220. #define RAH2 0x27
  221. #define DAFO 0x27
  222. #define RAL1 0x28
  223. #define RFC 0x28
  224. #define RHCR 0x29
  225. #define RAL2 0x29
  226. #define RBCL 0x2a
  227. #define XBCL 0x2a
  228. #define RBCH 0x2b
  229. #define XBCH 0x2b
  230. #define CCR0 0x2c
  231. #define CCR1 0x2d
  232. #define CCR2 0x2e
  233. #define CCR3 0x2f
  234. #define VSTR 0x34
  235. #define BGR 0x34
  236. #define RLCR 0x35
  237. #define AML 0x36
  238. #define AMH 0x37
  239. #define GIS 0x38
  240. #define IVA 0x38
  241. #define IPC 0x39
  242. #define ISR 0x3a
  243. #define IMR 0x3a
  244. #define PVR 0x3c
  245. #define PIS 0x3d
  246. #define PIM 0x3d
  247. #define PCR 0x3e
  248. #define CCR4 0x3f
  249. // IMR/ISR
  250. #define IRQ_BREAK_ON BIT15 // rx break detected
  251. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  252. #define IRQ_ALLSENT BIT13 // all sent
  253. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  254. #define IRQ_TIMER BIT11 // timer interrupt
  255. #define IRQ_CTS BIT10 // CTS status change
  256. #define IRQ_TXREPEAT BIT9 // tx message repeat
  257. #define IRQ_TXFIFO BIT8 // transmit pool ready
  258. #define IRQ_RXEOM BIT7 // receive message end
  259. #define IRQ_EXITHUNT BIT6 // receive frame start
  260. #define IRQ_RXTIME BIT6 // rx char timeout
  261. #define IRQ_DCD BIT2 // carrier detect status change
  262. #define IRQ_OVERRUN BIT1 // receive frame overflow
  263. #define IRQ_RXFIFO BIT0 // receive pool full
  264. // STAR
  265. #define XFW BIT6 // transmit FIFO write enable
  266. #define CEC BIT2 // command executing
  267. #define CTS BIT1 // CTS state
  268. #define PVR_DTR BIT0
  269. #define PVR_DSR BIT1
  270. #define PVR_RI BIT2
  271. #define PVR_AUTOCTS BIT3
  272. #define PVR_RS232 0x20 /* 0010b */
  273. #define PVR_V35 0xe0 /* 1110b */
  274. #define PVR_RS422 0x40 /* 0100b */
  275. /* Register access functions */
  276. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  277. #define read_reg(info, reg) inb((info)->io_base + (reg))
  278. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  279. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  280. #define set_reg_bits(info, reg, mask) \
  281. write_reg(info, (reg), \
  282. (unsigned char) (read_reg(info, (reg)) | (mask)))
  283. #define clear_reg_bits(info, reg, mask) \
  284. write_reg(info, (reg), \
  285. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  286. /*
  287. * interrupt enable/disable routines
  288. */
  289. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value |= mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value |= mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  300. {
  301. if (channel == CHA) {
  302. info->imra_value &= ~mask;
  303. write_reg16(info, CHA + IMR, info->imra_value);
  304. } else {
  305. info->imrb_value &= ~mask;
  306. write_reg16(info, CHB + IMR, info->imrb_value);
  307. }
  308. }
  309. #define port_irq_disable(info, mask) \
  310. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  311. #define port_irq_enable(info, mask) \
  312. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  313. static void rx_start(MGSLPC_INFO *info);
  314. static void rx_stop(MGSLPC_INFO *info);
  315. static void tx_start(MGSLPC_INFO *info);
  316. static void tx_stop(MGSLPC_INFO *info);
  317. static void tx_set_idle(MGSLPC_INFO *info);
  318. static void get_signals(MGSLPC_INFO *info);
  319. static void set_signals(MGSLPC_INFO *info);
  320. static void reset_device(MGSLPC_INFO *info);
  321. static void hdlc_mode(MGSLPC_INFO *info);
  322. static void async_mode(MGSLPC_INFO *info);
  323. static void tx_timeout(unsigned long context);
  324. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  325. #ifdef CONFIG_HDLC
  326. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  327. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  328. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  329. static int hdlcdev_init(MGSLPC_INFO *info);
  330. static void hdlcdev_exit(MGSLPC_INFO *info);
  331. #endif
  332. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  333. static BOOLEAN register_test(MGSLPC_INFO *info);
  334. static BOOLEAN irq_test(MGSLPC_INFO *info);
  335. static int adapter_test(MGSLPC_INFO *info);
  336. static int claim_resources(MGSLPC_INFO *info);
  337. static void release_resources(MGSLPC_INFO *info);
  338. static void mgslpc_add_device(MGSLPC_INFO *info);
  339. static void mgslpc_remove_device(MGSLPC_INFO *info);
  340. static int rx_get_frame(MGSLPC_INFO *info);
  341. static void rx_reset_buffers(MGSLPC_INFO *info);
  342. static int rx_alloc_buffers(MGSLPC_INFO *info);
  343. static void rx_free_buffers(MGSLPC_INFO *info);
  344. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  345. /*
  346. * Bottom half interrupt handlers
  347. */
  348. static void bh_handler(void* Context);
  349. static void bh_transmit(MGSLPC_INFO *info);
  350. static void bh_status(MGSLPC_INFO *info);
  351. /*
  352. * ioctl handlers
  353. */
  354. static int tiocmget(struct tty_struct *tty, struct file *file);
  355. static int tiocmset(struct tty_struct *tty, struct file *file,
  356. unsigned int set, unsigned int clear);
  357. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  358. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  359. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  360. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  361. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  362. static int set_txenable(MGSLPC_INFO *info, int enable);
  363. static int tx_abort(MGSLPC_INFO *info);
  364. static int set_rxenable(MGSLPC_INFO *info, int enable);
  365. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  366. static MGSLPC_INFO *mgslpc_device_list = NULL;
  367. static int mgslpc_device_count = 0;
  368. /*
  369. * Set this param to non-zero to load eax with the
  370. * .text section address and breakpoint on module load.
  371. * This is useful for use with gdb and add-symbol-file command.
  372. */
  373. static int break_on_load=0;
  374. /*
  375. * Driver major number, defaults to zero to get auto
  376. * assigned major number. May be forced as module parameter.
  377. */
  378. static int ttymajor=0;
  379. static int debug_level = 0;
  380. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  381. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  382. module_param(break_on_load, bool, 0);
  383. module_param(ttymajor, int, 0);
  384. module_param(debug_level, int, 0);
  385. module_param_array(maxframe, int, NULL, 0);
  386. module_param_array(dosyncppp, int, NULL, 0);
  387. MODULE_LICENSE("GPL");
  388. static char *driver_name = "SyncLink PC Card driver";
  389. static char *driver_version = "$Revision: 4.34 $";
  390. static struct tty_driver *serial_driver;
  391. /* number of characters left in xmit buffer before we ask for more */
  392. #define WAKEUP_CHARS 256
  393. static void mgslpc_change_params(MGSLPC_INFO *info);
  394. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  395. /* PCMCIA prototypes */
  396. static int mgslpc_config(struct pcmcia_device *link);
  397. static void mgslpc_release(u_long arg);
  398. static void mgslpc_detach(struct pcmcia_device *p_dev);
  399. /*
  400. * 1st function defined in .text section. Calling this function in
  401. * init_module() followed by a breakpoint allows a remote debugger
  402. * (gdb) to get the .text address for the add-symbol-file command.
  403. * This allows remote debugging of dynamically loadable modules.
  404. */
  405. static void* mgslpc_get_text_ptr(void)
  406. {
  407. return mgslpc_get_text_ptr;
  408. }
  409. /**
  410. * line discipline callback wrappers
  411. *
  412. * The wrappers maintain line discipline references
  413. * while calling into the line discipline.
  414. *
  415. * ldisc_flush_buffer - flush line discipline receive buffers
  416. * ldisc_receive_buf - pass receive data to line discipline
  417. */
  418. static void ldisc_flush_buffer(struct tty_struct *tty)
  419. {
  420. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  421. if (ld) {
  422. if (ld->flush_buffer)
  423. ld->flush_buffer(tty);
  424. tty_ldisc_deref(ld);
  425. }
  426. }
  427. static void ldisc_receive_buf(struct tty_struct *tty,
  428. const __u8 *data, char *flags, int count)
  429. {
  430. struct tty_ldisc *ld;
  431. if (!tty)
  432. return;
  433. ld = tty_ldisc_ref(tty);
  434. if (ld) {
  435. if (ld->receive_buf)
  436. ld->receive_buf(tty, data, flags, count);
  437. tty_ldisc_deref(ld);
  438. }
  439. }
  440. static int mgslpc_probe(struct pcmcia_device *link)
  441. {
  442. MGSLPC_INFO *info;
  443. int ret;
  444. if (debug_level >= DEBUG_LEVEL_INFO)
  445. printk("mgslpc_attach\n");
  446. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  447. if (!info) {
  448. printk("Error can't allocate device instance data\n");
  449. return -ENOMEM;
  450. }
  451. memset(info, 0, sizeof(MGSLPC_INFO));
  452. info->magic = MGSLPC_MAGIC;
  453. INIT_WORK(&info->task, bh_handler, info);
  454. info->max_frame_size = 4096;
  455. info->close_delay = 5*HZ/10;
  456. info->closing_wait = 30*HZ;
  457. init_waitqueue_head(&info->open_wait);
  458. init_waitqueue_head(&info->close_wait);
  459. init_waitqueue_head(&info->status_event_wait_q);
  460. init_waitqueue_head(&info->event_wait_q);
  461. spin_lock_init(&info->lock);
  462. spin_lock_init(&info->netlock);
  463. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  464. info->idle_mode = HDLC_TXIDLE_FLAGS;
  465. info->imra_value = 0xffff;
  466. info->imrb_value = 0xffff;
  467. info->pim_value = 0xff;
  468. info->p_dev = link;
  469. link->priv = info;
  470. /* Initialize the struct pcmcia_device structure */
  471. /* Interrupt setup */
  472. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  473. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  474. link->irq.Handler = NULL;
  475. link->conf.Attributes = 0;
  476. link->conf.IntType = INT_MEMORY_AND_IO;
  477. ret = mgslpc_config(link);
  478. if (ret)
  479. return ret;
  480. mgslpc_add_device(info);
  481. return 0;
  482. }
  483. /* Card has been inserted.
  484. */
  485. #define CS_CHECK(fn, ret) \
  486. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  487. static int mgslpc_config(struct pcmcia_device *link)
  488. {
  489. MGSLPC_INFO *info = link->priv;
  490. tuple_t tuple;
  491. cisparse_t parse;
  492. int last_fn, last_ret;
  493. u_char buf[64];
  494. cistpl_cftable_entry_t dflt = { 0 };
  495. cistpl_cftable_entry_t *cfg;
  496. if (debug_level >= DEBUG_LEVEL_INFO)
  497. printk("mgslpc_config(0x%p)\n", link);
  498. /* read CONFIG tuple to find its configuration registers */
  499. tuple.DesiredTuple = CISTPL_CONFIG;
  500. tuple.Attributes = 0;
  501. tuple.TupleData = buf;
  502. tuple.TupleDataMax = sizeof(buf);
  503. tuple.TupleOffset = 0;
  504. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  505. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  506. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  507. link->conf.ConfigBase = parse.config.base;
  508. link->conf.Present = parse.config.rmask[0];
  509. /* get CIS configuration entry */
  510. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  511. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  512. cfg = &(parse.cftable_entry);
  513. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  514. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  515. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  516. if (cfg->index == 0)
  517. goto cs_failed;
  518. link->conf.ConfigIndex = cfg->index;
  519. link->conf.Attributes |= CONF_ENABLE_IRQ;
  520. /* IO window settings */
  521. link->io.NumPorts1 = 0;
  522. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  523. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  524. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  525. if (!(io->flags & CISTPL_IO_8BIT))
  526. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  527. if (!(io->flags & CISTPL_IO_16BIT))
  528. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  529. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  530. link->io.BasePort1 = io->win[0].base;
  531. link->io.NumPorts1 = io->win[0].len;
  532. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  533. }
  534. link->conf.Attributes = CONF_ENABLE_IRQ;
  535. link->conf.IntType = INT_MEMORY_AND_IO;
  536. link->conf.ConfigIndex = 8;
  537. link->conf.Present = PRESENT_OPTION;
  538. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  539. link->irq.Handler = mgslpc_isr;
  540. link->irq.Instance = info;
  541. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  542. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  543. info->io_base = link->io.BasePort1;
  544. info->irq_level = link->irq.AssignedIRQ;
  545. /* add to linked list of devices */
  546. sprintf(info->node.dev_name, "mgslpc0");
  547. info->node.major = info->node.minor = 0;
  548. link->dev_node = &info->node;
  549. printk(KERN_INFO "%s: index 0x%02x:",
  550. info->node.dev_name, link->conf.ConfigIndex);
  551. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  552. printk(", irq %d", link->irq.AssignedIRQ);
  553. if (link->io.NumPorts1)
  554. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  555. link->io.BasePort1+link->io.NumPorts1-1);
  556. printk("\n");
  557. return 0;
  558. cs_failed:
  559. cs_error(link, last_fn, last_ret);
  560. mgslpc_release((u_long)link);
  561. return -ENODEV;
  562. }
  563. /* Card has been removed.
  564. * Unregister device and release PCMCIA configuration.
  565. * If device is open, postpone until it is closed.
  566. */
  567. static void mgslpc_release(u_long arg)
  568. {
  569. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  570. if (debug_level >= DEBUG_LEVEL_INFO)
  571. printk("mgslpc_release(0x%p)\n", link);
  572. pcmcia_disable_device(link);
  573. }
  574. static void mgslpc_detach(struct pcmcia_device *link)
  575. {
  576. if (debug_level >= DEBUG_LEVEL_INFO)
  577. printk("mgslpc_detach(0x%p)\n", link);
  578. ((MGSLPC_INFO *)link->priv)->stop = 1;
  579. mgslpc_release((u_long)link);
  580. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  581. }
  582. static int mgslpc_suspend(struct pcmcia_device *link)
  583. {
  584. MGSLPC_INFO *info = link->priv;
  585. info->stop = 1;
  586. return 0;
  587. }
  588. static int mgslpc_resume(struct pcmcia_device *link)
  589. {
  590. MGSLPC_INFO *info = link->priv;
  591. info->stop = 0;
  592. return 0;
  593. }
  594. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  595. char *name, const char *routine)
  596. {
  597. #ifdef MGSLPC_PARANOIA_CHECK
  598. static const char *badmagic =
  599. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  600. static const char *badinfo =
  601. "Warning: null mgslpc_info for (%s) in %s\n";
  602. if (!info) {
  603. printk(badinfo, name, routine);
  604. return 1;
  605. }
  606. if (info->magic != MGSLPC_MAGIC) {
  607. printk(badmagic, name, routine);
  608. return 1;
  609. }
  610. #else
  611. if (!info)
  612. return 1;
  613. #endif
  614. return 0;
  615. }
  616. #define CMD_RXFIFO BIT7 // release current rx FIFO
  617. #define CMD_RXRESET BIT6 // receiver reset
  618. #define CMD_RXFIFO_READ BIT5
  619. #define CMD_START_TIMER BIT4
  620. #define CMD_TXFIFO BIT3 // release current tx FIFO
  621. #define CMD_TXEOM BIT1 // transmit end message
  622. #define CMD_TXRESET BIT0 // transmit reset
  623. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  624. {
  625. int i = 0;
  626. /* wait for command completion */
  627. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  628. udelay(1);
  629. if (i++ == 1000)
  630. return FALSE;
  631. }
  632. return TRUE;
  633. }
  634. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  635. {
  636. wait_command_complete(info, channel);
  637. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  638. }
  639. static void tx_pause(struct tty_struct *tty)
  640. {
  641. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  642. unsigned long flags;
  643. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  644. return;
  645. if (debug_level >= DEBUG_LEVEL_INFO)
  646. printk("tx_pause(%s)\n",info->device_name);
  647. spin_lock_irqsave(&info->lock,flags);
  648. if (info->tx_enabled)
  649. tx_stop(info);
  650. spin_unlock_irqrestore(&info->lock,flags);
  651. }
  652. static void tx_release(struct tty_struct *tty)
  653. {
  654. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  655. unsigned long flags;
  656. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  657. return;
  658. if (debug_level >= DEBUG_LEVEL_INFO)
  659. printk("tx_release(%s)\n",info->device_name);
  660. spin_lock_irqsave(&info->lock,flags);
  661. if (!info->tx_enabled)
  662. tx_start(info);
  663. spin_unlock_irqrestore(&info->lock,flags);
  664. }
  665. /* Return next bottom half action to perform.
  666. * or 0 if nothing to do.
  667. */
  668. static int bh_action(MGSLPC_INFO *info)
  669. {
  670. unsigned long flags;
  671. int rc = 0;
  672. spin_lock_irqsave(&info->lock,flags);
  673. if (info->pending_bh & BH_RECEIVE) {
  674. info->pending_bh &= ~BH_RECEIVE;
  675. rc = BH_RECEIVE;
  676. } else if (info->pending_bh & BH_TRANSMIT) {
  677. info->pending_bh &= ~BH_TRANSMIT;
  678. rc = BH_TRANSMIT;
  679. } else if (info->pending_bh & BH_STATUS) {
  680. info->pending_bh &= ~BH_STATUS;
  681. rc = BH_STATUS;
  682. }
  683. if (!rc) {
  684. /* Mark BH routine as complete */
  685. info->bh_running = 0;
  686. info->bh_requested = 0;
  687. }
  688. spin_unlock_irqrestore(&info->lock,flags);
  689. return rc;
  690. }
  691. static void bh_handler(void* Context)
  692. {
  693. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  694. int action;
  695. if (!info)
  696. return;
  697. if (debug_level >= DEBUG_LEVEL_BH)
  698. printk( "%s(%d):bh_handler(%s) entry\n",
  699. __FILE__,__LINE__,info->device_name);
  700. info->bh_running = 1;
  701. while((action = bh_action(info)) != 0) {
  702. /* Process work item */
  703. if ( debug_level >= DEBUG_LEVEL_BH )
  704. printk( "%s(%d):bh_handler() work item action=%d\n",
  705. __FILE__,__LINE__,action);
  706. switch (action) {
  707. case BH_RECEIVE:
  708. while(rx_get_frame(info));
  709. break;
  710. case BH_TRANSMIT:
  711. bh_transmit(info);
  712. break;
  713. case BH_STATUS:
  714. bh_status(info);
  715. break;
  716. default:
  717. /* unknown work item ID */
  718. printk("Unknown work item ID=%08X!\n", action);
  719. break;
  720. }
  721. }
  722. if (debug_level >= DEBUG_LEVEL_BH)
  723. printk( "%s(%d):bh_handler(%s) exit\n",
  724. __FILE__,__LINE__,info->device_name);
  725. }
  726. static void bh_transmit(MGSLPC_INFO *info)
  727. {
  728. struct tty_struct *tty = info->tty;
  729. if (debug_level >= DEBUG_LEVEL_BH)
  730. printk("bh_transmit() entry on %s\n", info->device_name);
  731. if (tty) {
  732. tty_wakeup(tty);
  733. wake_up_interruptible(&tty->write_wait);
  734. }
  735. }
  736. static void bh_status(MGSLPC_INFO *info)
  737. {
  738. info->ri_chkcount = 0;
  739. info->dsr_chkcount = 0;
  740. info->dcd_chkcount = 0;
  741. info->cts_chkcount = 0;
  742. }
  743. /* eom: non-zero = end of frame */
  744. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  745. {
  746. unsigned char data[2];
  747. unsigned char fifo_count, read_count, i;
  748. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  749. if (debug_level >= DEBUG_LEVEL_ISR)
  750. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  751. if (!info->rx_enabled)
  752. return;
  753. if (info->rx_frame_count >= info->rx_buf_count) {
  754. /* no more free buffers */
  755. issue_command(info, CHA, CMD_RXRESET);
  756. info->pending_bh |= BH_RECEIVE;
  757. info->rx_overflow = 1;
  758. info->icount.buf_overrun++;
  759. return;
  760. }
  761. if (eom) {
  762. /* end of frame, get FIFO count from RBCL register */
  763. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  764. fifo_count = 32;
  765. } else
  766. fifo_count = 32;
  767. do {
  768. if (fifo_count == 1) {
  769. read_count = 1;
  770. data[0] = read_reg(info, CHA + RXFIFO);
  771. } else {
  772. read_count = 2;
  773. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  774. }
  775. fifo_count -= read_count;
  776. if (!fifo_count && eom)
  777. buf->status = data[--read_count];
  778. for (i = 0; i < read_count; i++) {
  779. if (buf->count >= info->max_frame_size) {
  780. /* frame too large, reset receiver and reset current buffer */
  781. issue_command(info, CHA, CMD_RXRESET);
  782. buf->count = 0;
  783. return;
  784. }
  785. *(buf->data + buf->count) = data[i];
  786. buf->count++;
  787. }
  788. } while (fifo_count);
  789. if (eom) {
  790. info->pending_bh |= BH_RECEIVE;
  791. info->rx_frame_count++;
  792. info->rx_put++;
  793. if (info->rx_put >= info->rx_buf_count)
  794. info->rx_put = 0;
  795. }
  796. issue_command(info, CHA, CMD_RXFIFO);
  797. }
  798. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  799. {
  800. unsigned char data, status, flag;
  801. int fifo_count;
  802. int work = 0;
  803. struct tty_struct *tty = info->tty;
  804. struct mgsl_icount *icount = &info->icount;
  805. if (tcd) {
  806. /* early termination, get FIFO count from RBCL register */
  807. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  808. /* Zero fifo count could mean 0 or 32 bytes available.
  809. * If BIT5 of STAR is set then at least 1 byte is available.
  810. */
  811. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  812. fifo_count = 32;
  813. } else
  814. fifo_count = 32;
  815. tty_buffer_request_room(tty, fifo_count);
  816. /* Flush received async data to receive data buffer. */
  817. while (fifo_count) {
  818. data = read_reg(info, CHA + RXFIFO);
  819. status = read_reg(info, CHA + RXFIFO);
  820. fifo_count -= 2;
  821. icount->rx++;
  822. flag = TTY_NORMAL;
  823. // if no frameing/crc error then save data
  824. // BIT7:parity error
  825. // BIT6:framing error
  826. if (status & (BIT7 + BIT6)) {
  827. if (status & BIT7)
  828. icount->parity++;
  829. else
  830. icount->frame++;
  831. /* discard char if tty control flags say so */
  832. if (status & info->ignore_status_mask)
  833. continue;
  834. status &= info->read_status_mask;
  835. if (status & BIT7)
  836. flag = TTY_PARITY;
  837. else if (status & BIT6)
  838. flag = TTY_FRAME;
  839. }
  840. work += tty_insert_flip_char(tty, data, flag);
  841. }
  842. issue_command(info, CHA, CMD_RXFIFO);
  843. if (debug_level >= DEBUG_LEVEL_ISR) {
  844. printk("%s(%d):rx_ready_async",
  845. __FILE__,__LINE__);
  846. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  847. __FILE__,__LINE__,icount->rx,icount->brk,
  848. icount->parity,icount->frame,icount->overrun);
  849. }
  850. if (work)
  851. tty_flip_buffer_push(tty);
  852. }
  853. static void tx_done(MGSLPC_INFO *info)
  854. {
  855. if (!info->tx_active)
  856. return;
  857. info->tx_active = 0;
  858. info->tx_aborting = 0;
  859. if (info->params.mode == MGSL_MODE_ASYNC)
  860. return;
  861. info->tx_count = info->tx_put = info->tx_get = 0;
  862. del_timer(&info->tx_timer);
  863. if (info->drop_rts_on_tx_done) {
  864. get_signals(info);
  865. if (info->serial_signals & SerialSignal_RTS) {
  866. info->serial_signals &= ~SerialSignal_RTS;
  867. set_signals(info);
  868. }
  869. info->drop_rts_on_tx_done = 0;
  870. }
  871. #ifdef CONFIG_HDLC
  872. if (info->netcount)
  873. hdlcdev_tx_done(info);
  874. else
  875. #endif
  876. {
  877. if (info->tty->stopped || info->tty->hw_stopped) {
  878. tx_stop(info);
  879. return;
  880. }
  881. info->pending_bh |= BH_TRANSMIT;
  882. }
  883. }
  884. static void tx_ready(MGSLPC_INFO *info)
  885. {
  886. unsigned char fifo_count = 32;
  887. int c;
  888. if (debug_level >= DEBUG_LEVEL_ISR)
  889. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  890. if (info->params.mode == MGSL_MODE_HDLC) {
  891. if (!info->tx_active)
  892. return;
  893. } else {
  894. if (info->tty->stopped || info->tty->hw_stopped) {
  895. tx_stop(info);
  896. return;
  897. }
  898. if (!info->tx_count)
  899. info->tx_active = 0;
  900. }
  901. if (!info->tx_count)
  902. return;
  903. while (info->tx_count && fifo_count) {
  904. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  905. if (c == 1) {
  906. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  907. } else {
  908. write_reg16(info, CHA + TXFIFO,
  909. *((unsigned short*)(info->tx_buf + info->tx_get)));
  910. }
  911. info->tx_count -= c;
  912. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  913. fifo_count -= c;
  914. }
  915. if (info->params.mode == MGSL_MODE_ASYNC) {
  916. if (info->tx_count < WAKEUP_CHARS)
  917. info->pending_bh |= BH_TRANSMIT;
  918. issue_command(info, CHA, CMD_TXFIFO);
  919. } else {
  920. if (info->tx_count)
  921. issue_command(info, CHA, CMD_TXFIFO);
  922. else
  923. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  924. }
  925. }
  926. static void cts_change(MGSLPC_INFO *info)
  927. {
  928. get_signals(info);
  929. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  930. irq_disable(info, CHB, IRQ_CTS);
  931. info->icount.cts++;
  932. if (info->serial_signals & SerialSignal_CTS)
  933. info->input_signal_events.cts_up++;
  934. else
  935. info->input_signal_events.cts_down++;
  936. wake_up_interruptible(&info->status_event_wait_q);
  937. wake_up_interruptible(&info->event_wait_q);
  938. if (info->flags & ASYNC_CTS_FLOW) {
  939. if (info->tty->hw_stopped) {
  940. if (info->serial_signals & SerialSignal_CTS) {
  941. if (debug_level >= DEBUG_LEVEL_ISR)
  942. printk("CTS tx start...");
  943. if (info->tty)
  944. info->tty->hw_stopped = 0;
  945. tx_start(info);
  946. info->pending_bh |= BH_TRANSMIT;
  947. return;
  948. }
  949. } else {
  950. if (!(info->serial_signals & SerialSignal_CTS)) {
  951. if (debug_level >= DEBUG_LEVEL_ISR)
  952. printk("CTS tx stop...");
  953. if (info->tty)
  954. info->tty->hw_stopped = 1;
  955. tx_stop(info);
  956. }
  957. }
  958. }
  959. info->pending_bh |= BH_STATUS;
  960. }
  961. static void dcd_change(MGSLPC_INFO *info)
  962. {
  963. get_signals(info);
  964. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  965. irq_disable(info, CHB, IRQ_DCD);
  966. info->icount.dcd++;
  967. if (info->serial_signals & SerialSignal_DCD) {
  968. info->input_signal_events.dcd_up++;
  969. }
  970. else
  971. info->input_signal_events.dcd_down++;
  972. #ifdef CONFIG_HDLC
  973. if (info->netcount) {
  974. if (info->serial_signals & SerialSignal_DCD)
  975. netif_carrier_on(info->netdev);
  976. else
  977. netif_carrier_off(info->netdev);
  978. }
  979. #endif
  980. wake_up_interruptible(&info->status_event_wait_q);
  981. wake_up_interruptible(&info->event_wait_q);
  982. if (info->flags & ASYNC_CHECK_CD) {
  983. if (debug_level >= DEBUG_LEVEL_ISR)
  984. printk("%s CD now %s...", info->device_name,
  985. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  986. if (info->serial_signals & SerialSignal_DCD)
  987. wake_up_interruptible(&info->open_wait);
  988. else {
  989. if (debug_level >= DEBUG_LEVEL_ISR)
  990. printk("doing serial hangup...");
  991. if (info->tty)
  992. tty_hangup(info->tty);
  993. }
  994. }
  995. info->pending_bh |= BH_STATUS;
  996. }
  997. static void dsr_change(MGSLPC_INFO *info)
  998. {
  999. get_signals(info);
  1000. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1001. port_irq_disable(info, PVR_DSR);
  1002. info->icount.dsr++;
  1003. if (info->serial_signals & SerialSignal_DSR)
  1004. info->input_signal_events.dsr_up++;
  1005. else
  1006. info->input_signal_events.dsr_down++;
  1007. wake_up_interruptible(&info->status_event_wait_q);
  1008. wake_up_interruptible(&info->event_wait_q);
  1009. info->pending_bh |= BH_STATUS;
  1010. }
  1011. static void ri_change(MGSLPC_INFO *info)
  1012. {
  1013. get_signals(info);
  1014. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1015. port_irq_disable(info, PVR_RI);
  1016. info->icount.rng++;
  1017. if (info->serial_signals & SerialSignal_RI)
  1018. info->input_signal_events.ri_up++;
  1019. else
  1020. info->input_signal_events.ri_down++;
  1021. wake_up_interruptible(&info->status_event_wait_q);
  1022. wake_up_interruptible(&info->event_wait_q);
  1023. info->pending_bh |= BH_STATUS;
  1024. }
  1025. /* Interrupt service routine entry point.
  1026. *
  1027. * Arguments:
  1028. *
  1029. * irq interrupt number that caused interrupt
  1030. * dev_id device ID supplied during interrupt registration
  1031. * regs interrupted processor context
  1032. */
  1033. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1034. {
  1035. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1036. unsigned short isr;
  1037. unsigned char gis, pis;
  1038. int count=0;
  1039. if (debug_level >= DEBUG_LEVEL_ISR)
  1040. printk("mgslpc_isr(%d) entry.\n", irq);
  1041. if (!info)
  1042. return IRQ_NONE;
  1043. if (!(info->p_dev->_locked))
  1044. return IRQ_HANDLED;
  1045. spin_lock(&info->lock);
  1046. while ((gis = read_reg(info, CHA + GIS))) {
  1047. if (debug_level >= DEBUG_LEVEL_ISR)
  1048. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1049. if ((gis & 0x70) || count > 1000) {
  1050. printk("synclink_cs:hardware failed or ejected\n");
  1051. break;
  1052. }
  1053. count++;
  1054. if (gis & (BIT1 + BIT0)) {
  1055. isr = read_reg16(info, CHB + ISR);
  1056. if (isr & IRQ_DCD)
  1057. dcd_change(info);
  1058. if (isr & IRQ_CTS)
  1059. cts_change(info);
  1060. }
  1061. if (gis & (BIT3 + BIT2))
  1062. {
  1063. isr = read_reg16(info, CHA + ISR);
  1064. if (isr & IRQ_TIMER) {
  1065. info->irq_occurred = 1;
  1066. irq_disable(info, CHA, IRQ_TIMER);
  1067. }
  1068. /* receive IRQs */
  1069. if (isr & IRQ_EXITHUNT) {
  1070. info->icount.exithunt++;
  1071. wake_up_interruptible(&info->event_wait_q);
  1072. }
  1073. if (isr & IRQ_BREAK_ON) {
  1074. info->icount.brk++;
  1075. if (info->flags & ASYNC_SAK)
  1076. do_SAK(info->tty);
  1077. }
  1078. if (isr & IRQ_RXTIME) {
  1079. issue_command(info, CHA, CMD_RXFIFO_READ);
  1080. }
  1081. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1082. if (info->params.mode == MGSL_MODE_HDLC)
  1083. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1084. else
  1085. rx_ready_async(info, isr & IRQ_RXEOM);
  1086. }
  1087. /* transmit IRQs */
  1088. if (isr & IRQ_UNDERRUN) {
  1089. if (info->tx_aborting)
  1090. info->icount.txabort++;
  1091. else
  1092. info->icount.txunder++;
  1093. tx_done(info);
  1094. }
  1095. else if (isr & IRQ_ALLSENT) {
  1096. info->icount.txok++;
  1097. tx_done(info);
  1098. }
  1099. else if (isr & IRQ_TXFIFO)
  1100. tx_ready(info);
  1101. }
  1102. if (gis & BIT7) {
  1103. pis = read_reg(info, CHA + PIS);
  1104. if (pis & BIT1)
  1105. dsr_change(info);
  1106. if (pis & BIT2)
  1107. ri_change(info);
  1108. }
  1109. }
  1110. /* Request bottom half processing if there's something
  1111. * for it to do and the bh is not already running
  1112. */
  1113. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1114. if ( debug_level >= DEBUG_LEVEL_ISR )
  1115. printk("%s(%d):%s queueing bh task.\n",
  1116. __FILE__,__LINE__,info->device_name);
  1117. schedule_work(&info->task);
  1118. info->bh_requested = 1;
  1119. }
  1120. spin_unlock(&info->lock);
  1121. if (debug_level >= DEBUG_LEVEL_ISR)
  1122. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1123. __FILE__,__LINE__,irq);
  1124. return IRQ_HANDLED;
  1125. }
  1126. /* Initialize and start device.
  1127. */
  1128. static int startup(MGSLPC_INFO * info)
  1129. {
  1130. int retval = 0;
  1131. if (debug_level >= DEBUG_LEVEL_INFO)
  1132. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1133. if (info->flags & ASYNC_INITIALIZED)
  1134. return 0;
  1135. if (!info->tx_buf) {
  1136. /* allocate a page of memory for a transmit buffer */
  1137. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1138. if (!info->tx_buf) {
  1139. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1140. __FILE__,__LINE__,info->device_name);
  1141. return -ENOMEM;
  1142. }
  1143. }
  1144. info->pending_bh = 0;
  1145. memset(&info->icount, 0, sizeof(info->icount));
  1146. init_timer(&info->tx_timer);
  1147. info->tx_timer.data = (unsigned long)info;
  1148. info->tx_timer.function = tx_timeout;
  1149. /* Allocate and claim adapter resources */
  1150. retval = claim_resources(info);
  1151. /* perform existance check and diagnostics */
  1152. if ( !retval )
  1153. retval = adapter_test(info);
  1154. if ( retval ) {
  1155. if (capable(CAP_SYS_ADMIN) && info->tty)
  1156. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1157. release_resources(info);
  1158. return retval;
  1159. }
  1160. /* program hardware for current parameters */
  1161. mgslpc_change_params(info);
  1162. if (info->tty)
  1163. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1164. info->flags |= ASYNC_INITIALIZED;
  1165. return 0;
  1166. }
  1167. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1168. */
  1169. static void shutdown(MGSLPC_INFO * info)
  1170. {
  1171. unsigned long flags;
  1172. if (!(info->flags & ASYNC_INITIALIZED))
  1173. return;
  1174. if (debug_level >= DEBUG_LEVEL_INFO)
  1175. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1176. __FILE__,__LINE__, info->device_name );
  1177. /* clear status wait queue because status changes */
  1178. /* can't happen after shutting down the hardware */
  1179. wake_up_interruptible(&info->status_event_wait_q);
  1180. wake_up_interruptible(&info->event_wait_q);
  1181. del_timer(&info->tx_timer);
  1182. if (info->tx_buf) {
  1183. free_page((unsigned long) info->tx_buf);
  1184. info->tx_buf = NULL;
  1185. }
  1186. spin_lock_irqsave(&info->lock,flags);
  1187. rx_stop(info);
  1188. tx_stop(info);
  1189. /* TODO:disable interrupts instead of reset to preserve signal states */
  1190. reset_device(info);
  1191. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1192. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1193. set_signals(info);
  1194. }
  1195. spin_unlock_irqrestore(&info->lock,flags);
  1196. release_resources(info);
  1197. if (info->tty)
  1198. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1199. info->flags &= ~ASYNC_INITIALIZED;
  1200. }
  1201. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1202. {
  1203. unsigned long flags;
  1204. spin_lock_irqsave(&info->lock,flags);
  1205. rx_stop(info);
  1206. tx_stop(info);
  1207. info->tx_count = info->tx_put = info->tx_get = 0;
  1208. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1209. hdlc_mode(info);
  1210. else
  1211. async_mode(info);
  1212. set_signals(info);
  1213. info->dcd_chkcount = 0;
  1214. info->cts_chkcount = 0;
  1215. info->ri_chkcount = 0;
  1216. info->dsr_chkcount = 0;
  1217. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1218. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1219. get_signals(info);
  1220. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1221. rx_start(info);
  1222. spin_unlock_irqrestore(&info->lock,flags);
  1223. }
  1224. /* Reconfigure adapter based on new parameters
  1225. */
  1226. static void mgslpc_change_params(MGSLPC_INFO *info)
  1227. {
  1228. unsigned cflag;
  1229. int bits_per_char;
  1230. if (!info->tty || !info->tty->termios)
  1231. return;
  1232. if (debug_level >= DEBUG_LEVEL_INFO)
  1233. printk("%s(%d):mgslpc_change_params(%s)\n",
  1234. __FILE__,__LINE__, info->device_name );
  1235. cflag = info->tty->termios->c_cflag;
  1236. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1237. /* otherwise assert DTR and RTS */
  1238. if (cflag & CBAUD)
  1239. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1240. else
  1241. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1242. /* byte size and parity */
  1243. switch (cflag & CSIZE) {
  1244. case CS5: info->params.data_bits = 5; break;
  1245. case CS6: info->params.data_bits = 6; break;
  1246. case CS7: info->params.data_bits = 7; break;
  1247. case CS8: info->params.data_bits = 8; break;
  1248. default: info->params.data_bits = 7; break;
  1249. }
  1250. if (cflag & CSTOPB)
  1251. info->params.stop_bits = 2;
  1252. else
  1253. info->params.stop_bits = 1;
  1254. info->params.parity = ASYNC_PARITY_NONE;
  1255. if (cflag & PARENB) {
  1256. if (cflag & PARODD)
  1257. info->params.parity = ASYNC_PARITY_ODD;
  1258. else
  1259. info->params.parity = ASYNC_PARITY_EVEN;
  1260. #ifdef CMSPAR
  1261. if (cflag & CMSPAR)
  1262. info->params.parity = ASYNC_PARITY_SPACE;
  1263. #endif
  1264. }
  1265. /* calculate number of jiffies to transmit a full
  1266. * FIFO (32 bytes) at specified data rate
  1267. */
  1268. bits_per_char = info->params.data_bits +
  1269. info->params.stop_bits + 1;
  1270. /* if port data rate is set to 460800 or less then
  1271. * allow tty settings to override, otherwise keep the
  1272. * current data rate.
  1273. */
  1274. if (info->params.data_rate <= 460800) {
  1275. info->params.data_rate = tty_get_baud_rate(info->tty);
  1276. }
  1277. if ( info->params.data_rate ) {
  1278. info->timeout = (32*HZ*bits_per_char) /
  1279. info->params.data_rate;
  1280. }
  1281. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1282. if (cflag & CRTSCTS)
  1283. info->flags |= ASYNC_CTS_FLOW;
  1284. else
  1285. info->flags &= ~ASYNC_CTS_FLOW;
  1286. if (cflag & CLOCAL)
  1287. info->flags &= ~ASYNC_CHECK_CD;
  1288. else
  1289. info->flags |= ASYNC_CHECK_CD;
  1290. /* process tty input control flags */
  1291. info->read_status_mask = 0;
  1292. if (I_INPCK(info->tty))
  1293. info->read_status_mask |= BIT7 | BIT6;
  1294. if (I_IGNPAR(info->tty))
  1295. info->ignore_status_mask |= BIT7 | BIT6;
  1296. mgslpc_program_hw(info);
  1297. }
  1298. /* Add a character to the transmit buffer
  1299. */
  1300. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1301. {
  1302. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1303. unsigned long flags;
  1304. if (debug_level >= DEBUG_LEVEL_INFO) {
  1305. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1306. __FILE__,__LINE__,ch,info->device_name);
  1307. }
  1308. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1309. return;
  1310. if (!info->tx_buf)
  1311. return;
  1312. spin_lock_irqsave(&info->lock,flags);
  1313. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1314. if (info->tx_count < TXBUFSIZE - 1) {
  1315. info->tx_buf[info->tx_put++] = ch;
  1316. info->tx_put &= TXBUFSIZE-1;
  1317. info->tx_count++;
  1318. }
  1319. }
  1320. spin_unlock_irqrestore(&info->lock,flags);
  1321. }
  1322. /* Enable transmitter so remaining characters in the
  1323. * transmit buffer are sent.
  1324. */
  1325. static void mgslpc_flush_chars(struct tty_struct *tty)
  1326. {
  1327. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1328. unsigned long flags;
  1329. if (debug_level >= DEBUG_LEVEL_INFO)
  1330. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1331. __FILE__,__LINE__,info->device_name,info->tx_count);
  1332. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1333. return;
  1334. if (info->tx_count <= 0 || tty->stopped ||
  1335. tty->hw_stopped || !info->tx_buf)
  1336. return;
  1337. if (debug_level >= DEBUG_LEVEL_INFO)
  1338. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1339. __FILE__,__LINE__,info->device_name);
  1340. spin_lock_irqsave(&info->lock,flags);
  1341. if (!info->tx_active)
  1342. tx_start(info);
  1343. spin_unlock_irqrestore(&info->lock,flags);
  1344. }
  1345. /* Send a block of data
  1346. *
  1347. * Arguments:
  1348. *
  1349. * tty pointer to tty information structure
  1350. * buf pointer to buffer containing send data
  1351. * count size of send data in bytes
  1352. *
  1353. * Returns: number of characters written
  1354. */
  1355. static int mgslpc_write(struct tty_struct * tty,
  1356. const unsigned char *buf, int count)
  1357. {
  1358. int c, ret = 0;
  1359. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1360. unsigned long flags;
  1361. if (debug_level >= DEBUG_LEVEL_INFO)
  1362. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1363. __FILE__,__LINE__,info->device_name,count);
  1364. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1365. !info->tx_buf)
  1366. goto cleanup;
  1367. if (info->params.mode == MGSL_MODE_HDLC) {
  1368. if (count > TXBUFSIZE) {
  1369. ret = -EIO;
  1370. goto cleanup;
  1371. }
  1372. if (info->tx_active)
  1373. goto cleanup;
  1374. else if (info->tx_count)
  1375. goto start;
  1376. }
  1377. for (;;) {
  1378. c = min(count,
  1379. min(TXBUFSIZE - info->tx_count - 1,
  1380. TXBUFSIZE - info->tx_put));
  1381. if (c <= 0)
  1382. break;
  1383. memcpy(info->tx_buf + info->tx_put, buf, c);
  1384. spin_lock_irqsave(&info->lock,flags);
  1385. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1386. info->tx_count += c;
  1387. spin_unlock_irqrestore(&info->lock,flags);
  1388. buf += c;
  1389. count -= c;
  1390. ret += c;
  1391. }
  1392. start:
  1393. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1394. spin_lock_irqsave(&info->lock,flags);
  1395. if (!info->tx_active)
  1396. tx_start(info);
  1397. spin_unlock_irqrestore(&info->lock,flags);
  1398. }
  1399. cleanup:
  1400. if (debug_level >= DEBUG_LEVEL_INFO)
  1401. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1402. __FILE__,__LINE__,info->device_name,ret);
  1403. return ret;
  1404. }
  1405. /* Return the count of free bytes in transmit buffer
  1406. */
  1407. static int mgslpc_write_room(struct tty_struct *tty)
  1408. {
  1409. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1410. int ret;
  1411. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1412. return 0;
  1413. if (info->params.mode == MGSL_MODE_HDLC) {
  1414. /* HDLC (frame oriented) mode */
  1415. if (info->tx_active)
  1416. return 0;
  1417. else
  1418. return HDLC_MAX_FRAME_SIZE;
  1419. } else {
  1420. ret = TXBUFSIZE - info->tx_count - 1;
  1421. if (ret < 0)
  1422. ret = 0;
  1423. }
  1424. if (debug_level >= DEBUG_LEVEL_INFO)
  1425. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1426. __FILE__,__LINE__, info->device_name, ret);
  1427. return ret;
  1428. }
  1429. /* Return the count of bytes in transmit buffer
  1430. */
  1431. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1432. {
  1433. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1434. int rc;
  1435. if (debug_level >= DEBUG_LEVEL_INFO)
  1436. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1437. __FILE__,__LINE__, info->device_name );
  1438. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1439. return 0;
  1440. if (info->params.mode == MGSL_MODE_HDLC)
  1441. rc = info->tx_active ? info->max_frame_size : 0;
  1442. else
  1443. rc = info->tx_count;
  1444. if (debug_level >= DEBUG_LEVEL_INFO)
  1445. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1446. __FILE__,__LINE__, info->device_name, rc);
  1447. return rc;
  1448. }
  1449. /* Discard all data in the send buffer
  1450. */
  1451. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1452. {
  1453. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1454. unsigned long flags;
  1455. if (debug_level >= DEBUG_LEVEL_INFO)
  1456. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1457. __FILE__,__LINE__, info->device_name );
  1458. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1459. return;
  1460. spin_lock_irqsave(&info->lock,flags);
  1461. info->tx_count = info->tx_put = info->tx_get = 0;
  1462. del_timer(&info->tx_timer);
  1463. spin_unlock_irqrestore(&info->lock,flags);
  1464. wake_up_interruptible(&tty->write_wait);
  1465. tty_wakeup(tty);
  1466. }
  1467. /* Send a high-priority XON/XOFF character
  1468. */
  1469. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1470. {
  1471. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1472. unsigned long flags;
  1473. if (debug_level >= DEBUG_LEVEL_INFO)
  1474. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1475. __FILE__,__LINE__, info->device_name, ch );
  1476. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1477. return;
  1478. info->x_char = ch;
  1479. if (ch) {
  1480. spin_lock_irqsave(&info->lock,flags);
  1481. if (!info->tx_enabled)
  1482. tx_start(info);
  1483. spin_unlock_irqrestore(&info->lock,flags);
  1484. }
  1485. }
  1486. /* Signal remote device to throttle send data (our receive data)
  1487. */
  1488. static void mgslpc_throttle(struct tty_struct * tty)
  1489. {
  1490. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1491. unsigned long flags;
  1492. if (debug_level >= DEBUG_LEVEL_INFO)
  1493. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1494. __FILE__,__LINE__, info->device_name );
  1495. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1496. return;
  1497. if (I_IXOFF(tty))
  1498. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1499. if (tty->termios->c_cflag & CRTSCTS) {
  1500. spin_lock_irqsave(&info->lock,flags);
  1501. info->serial_signals &= ~SerialSignal_RTS;
  1502. set_signals(info);
  1503. spin_unlock_irqrestore(&info->lock,flags);
  1504. }
  1505. }
  1506. /* Signal remote device to stop throttling send data (our receive data)
  1507. */
  1508. static void mgslpc_unthrottle(struct tty_struct * tty)
  1509. {
  1510. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1511. unsigned long flags;
  1512. if (debug_level >= DEBUG_LEVEL_INFO)
  1513. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1514. __FILE__,__LINE__, info->device_name );
  1515. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1516. return;
  1517. if (I_IXOFF(tty)) {
  1518. if (info->x_char)
  1519. info->x_char = 0;
  1520. else
  1521. mgslpc_send_xchar(tty, START_CHAR(tty));
  1522. }
  1523. if (tty->termios->c_cflag & CRTSCTS) {
  1524. spin_lock_irqsave(&info->lock,flags);
  1525. info->serial_signals |= SerialSignal_RTS;
  1526. set_signals(info);
  1527. spin_unlock_irqrestore(&info->lock,flags);
  1528. }
  1529. }
  1530. /* get the current serial statistics
  1531. */
  1532. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1533. {
  1534. int err;
  1535. if (debug_level >= DEBUG_LEVEL_INFO)
  1536. printk("get_params(%s)\n", info->device_name);
  1537. if (!user_icount) {
  1538. memset(&info->icount, 0, sizeof(info->icount));
  1539. } else {
  1540. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1541. if (err)
  1542. return -EFAULT;
  1543. }
  1544. return 0;
  1545. }
  1546. /* get the current serial parameters
  1547. */
  1548. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1549. {
  1550. int err;
  1551. if (debug_level >= DEBUG_LEVEL_INFO)
  1552. printk("get_params(%s)\n", info->device_name);
  1553. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1554. if (err)
  1555. return -EFAULT;
  1556. return 0;
  1557. }
  1558. /* set the serial parameters
  1559. *
  1560. * Arguments:
  1561. *
  1562. * info pointer to device instance data
  1563. * new_params user buffer containing new serial params
  1564. *
  1565. * Returns: 0 if success, otherwise error code
  1566. */
  1567. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1568. {
  1569. unsigned long flags;
  1570. MGSL_PARAMS tmp_params;
  1571. int err;
  1572. if (debug_level >= DEBUG_LEVEL_INFO)
  1573. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1574. info->device_name );
  1575. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1576. if (err) {
  1577. if ( debug_level >= DEBUG_LEVEL_INFO )
  1578. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1579. __FILE__,__LINE__,info->device_name);
  1580. return -EFAULT;
  1581. }
  1582. spin_lock_irqsave(&info->lock,flags);
  1583. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1584. spin_unlock_irqrestore(&info->lock,flags);
  1585. mgslpc_change_params(info);
  1586. return 0;
  1587. }
  1588. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1589. {
  1590. int err;
  1591. if (debug_level >= DEBUG_LEVEL_INFO)
  1592. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1593. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1594. if (err)
  1595. return -EFAULT;
  1596. return 0;
  1597. }
  1598. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1599. {
  1600. unsigned long flags;
  1601. if (debug_level >= DEBUG_LEVEL_INFO)
  1602. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1603. spin_lock_irqsave(&info->lock,flags);
  1604. info->idle_mode = idle_mode;
  1605. tx_set_idle(info);
  1606. spin_unlock_irqrestore(&info->lock,flags);
  1607. return 0;
  1608. }
  1609. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1610. {
  1611. int err;
  1612. if (debug_level >= DEBUG_LEVEL_INFO)
  1613. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1614. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1615. if (err)
  1616. return -EFAULT;
  1617. return 0;
  1618. }
  1619. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1620. {
  1621. unsigned long flags;
  1622. unsigned char val;
  1623. if (debug_level >= DEBUG_LEVEL_INFO)
  1624. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1625. spin_lock_irqsave(&info->lock,flags);
  1626. info->if_mode = if_mode;
  1627. val = read_reg(info, PVR) & 0x0f;
  1628. switch (info->if_mode)
  1629. {
  1630. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1631. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1632. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1633. }
  1634. write_reg(info, PVR, val);
  1635. spin_unlock_irqrestore(&info->lock,flags);
  1636. return 0;
  1637. }
  1638. static int set_txenable(MGSLPC_INFO * info, int enable)
  1639. {
  1640. unsigned long flags;
  1641. if (debug_level >= DEBUG_LEVEL_INFO)
  1642. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1643. spin_lock_irqsave(&info->lock,flags);
  1644. if (enable) {
  1645. if (!info->tx_enabled)
  1646. tx_start(info);
  1647. } else {
  1648. if (info->tx_enabled)
  1649. tx_stop(info);
  1650. }
  1651. spin_unlock_irqrestore(&info->lock,flags);
  1652. return 0;
  1653. }
  1654. static int tx_abort(MGSLPC_INFO * info)
  1655. {
  1656. unsigned long flags;
  1657. if (debug_level >= DEBUG_LEVEL_INFO)
  1658. printk("tx_abort(%s)\n", info->device_name);
  1659. spin_lock_irqsave(&info->lock,flags);
  1660. if (info->tx_active && info->tx_count &&
  1661. info->params.mode == MGSL_MODE_HDLC) {
  1662. /* clear data count so FIFO is not filled on next IRQ.
  1663. * This results in underrun and abort transmission.
  1664. */
  1665. info->tx_count = info->tx_put = info->tx_get = 0;
  1666. info->tx_aborting = TRUE;
  1667. }
  1668. spin_unlock_irqrestore(&info->lock,flags);
  1669. return 0;
  1670. }
  1671. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1672. {
  1673. unsigned long flags;
  1674. if (debug_level >= DEBUG_LEVEL_INFO)
  1675. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1676. spin_lock_irqsave(&info->lock,flags);
  1677. if (enable) {
  1678. if (!info->rx_enabled)
  1679. rx_start(info);
  1680. } else {
  1681. if (info->rx_enabled)
  1682. rx_stop(info);
  1683. }
  1684. spin_unlock_irqrestore(&info->lock,flags);
  1685. return 0;
  1686. }
  1687. /* wait for specified event to occur
  1688. *
  1689. * Arguments: info pointer to device instance data
  1690. * mask pointer to bitmask of events to wait for
  1691. * Return Value: 0 if successful and bit mask updated with
  1692. * of events triggerred,
  1693. * otherwise error code
  1694. */
  1695. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1696. {
  1697. unsigned long flags;
  1698. int s;
  1699. int rc=0;
  1700. struct mgsl_icount cprev, cnow;
  1701. int events;
  1702. int mask;
  1703. struct _input_signal_events oldsigs, newsigs;
  1704. DECLARE_WAITQUEUE(wait, current);
  1705. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1706. if (rc)
  1707. return -EFAULT;
  1708. if (debug_level >= DEBUG_LEVEL_INFO)
  1709. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1710. spin_lock_irqsave(&info->lock,flags);
  1711. /* return immediately if state matches requested events */
  1712. get_signals(info);
  1713. s = info->serial_signals;
  1714. events = mask &
  1715. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1716. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1717. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1718. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1719. if (events) {
  1720. spin_unlock_irqrestore(&info->lock,flags);
  1721. goto exit;
  1722. }
  1723. /* save current irq counts */
  1724. cprev = info->icount;
  1725. oldsigs = info->input_signal_events;
  1726. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1727. (mask & MgslEvent_ExitHuntMode))
  1728. irq_enable(info, CHA, IRQ_EXITHUNT);
  1729. set_current_state(TASK_INTERRUPTIBLE);
  1730. add_wait_queue(&info->event_wait_q, &wait);
  1731. spin_unlock_irqrestore(&info->lock,flags);
  1732. for(;;) {
  1733. schedule();
  1734. if (signal_pending(current)) {
  1735. rc = -ERESTARTSYS;
  1736. break;
  1737. }
  1738. /* get current irq counts */
  1739. spin_lock_irqsave(&info->lock,flags);
  1740. cnow = info->icount;
  1741. newsigs = info->input_signal_events;
  1742. set_current_state(TASK_INTERRUPTIBLE);
  1743. spin_unlock_irqrestore(&info->lock,flags);
  1744. /* if no change, wait aborted for some reason */
  1745. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1746. newsigs.dsr_down == oldsigs.dsr_down &&
  1747. newsigs.dcd_up == oldsigs.dcd_up &&
  1748. newsigs.dcd_down == oldsigs.dcd_down &&
  1749. newsigs.cts_up == oldsigs.cts_up &&
  1750. newsigs.cts_down == oldsigs.cts_down &&
  1751. newsigs.ri_up == oldsigs.ri_up &&
  1752. newsigs.ri_down == oldsigs.ri_down &&
  1753. cnow.exithunt == cprev.exithunt &&
  1754. cnow.rxidle == cprev.rxidle) {
  1755. rc = -EIO;
  1756. break;
  1757. }
  1758. events = mask &
  1759. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1760. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1761. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1762. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1763. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1764. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1765. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1766. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1767. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1768. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1769. if (events)
  1770. break;
  1771. cprev = cnow;
  1772. oldsigs = newsigs;
  1773. }
  1774. remove_wait_queue(&info->event_wait_q, &wait);
  1775. set_current_state(TASK_RUNNING);
  1776. if (mask & MgslEvent_ExitHuntMode) {
  1777. spin_lock_irqsave(&info->lock,flags);
  1778. if (!waitqueue_active(&info->event_wait_q))
  1779. irq_disable(info, CHA, IRQ_EXITHUNT);
  1780. spin_unlock_irqrestore(&info->lock,flags);
  1781. }
  1782. exit:
  1783. if (rc == 0)
  1784. PUT_USER(rc, events, mask_ptr);
  1785. return rc;
  1786. }
  1787. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1788. {
  1789. unsigned long flags;
  1790. int rc;
  1791. struct mgsl_icount cprev, cnow;
  1792. DECLARE_WAITQUEUE(wait, current);
  1793. /* save current irq counts */
  1794. spin_lock_irqsave(&info->lock,flags);
  1795. cprev = info->icount;
  1796. add_wait_queue(&info->status_event_wait_q, &wait);
  1797. set_current_state(TASK_INTERRUPTIBLE);
  1798. spin_unlock_irqrestore(&info->lock,flags);
  1799. for(;;) {
  1800. schedule();
  1801. if (signal_pending(current)) {
  1802. rc = -ERESTARTSYS;
  1803. break;
  1804. }
  1805. /* get new irq counts */
  1806. spin_lock_irqsave(&info->lock,flags);
  1807. cnow = info->icount;
  1808. set_current_state(TASK_INTERRUPTIBLE);
  1809. spin_unlock_irqrestore(&info->lock,flags);
  1810. /* if no change, wait aborted for some reason */
  1811. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1812. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1813. rc = -EIO;
  1814. break;
  1815. }
  1816. /* check for change in caller specified modem input */
  1817. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1818. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1819. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1820. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1821. rc = 0;
  1822. break;
  1823. }
  1824. cprev = cnow;
  1825. }
  1826. remove_wait_queue(&info->status_event_wait_q, &wait);
  1827. set_current_state(TASK_RUNNING);
  1828. return rc;
  1829. }
  1830. /* return the state of the serial control and status signals
  1831. */
  1832. static int tiocmget(struct tty_struct *tty, struct file *file)
  1833. {
  1834. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1835. unsigned int result;
  1836. unsigned long flags;
  1837. spin_lock_irqsave(&info->lock,flags);
  1838. get_signals(info);
  1839. spin_unlock_irqrestore(&info->lock,flags);
  1840. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1841. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1842. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1843. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1844. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1845. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1846. if (debug_level >= DEBUG_LEVEL_INFO)
  1847. printk("%s(%d):%s tiocmget() value=%08X\n",
  1848. __FILE__,__LINE__, info->device_name, result );
  1849. return result;
  1850. }
  1851. /* set modem control signals (DTR/RTS)
  1852. */
  1853. static int tiocmset(struct tty_struct *tty, struct file *file,
  1854. unsigned int set, unsigned int clear)
  1855. {
  1856. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1857. unsigned long flags;
  1858. if (debug_level >= DEBUG_LEVEL_INFO)
  1859. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1860. __FILE__,__LINE__,info->device_name, set, clear);
  1861. if (set & TIOCM_RTS)
  1862. info->serial_signals |= SerialSignal_RTS;
  1863. if (set & TIOCM_DTR)
  1864. info->serial_signals |= SerialSignal_DTR;
  1865. if (clear & TIOCM_RTS)
  1866. info->serial_signals &= ~SerialSignal_RTS;
  1867. if (clear & TIOCM_DTR)
  1868. info->serial_signals &= ~SerialSignal_DTR;
  1869. spin_lock_irqsave(&info->lock,flags);
  1870. set_signals(info);
  1871. spin_unlock_irqrestore(&info->lock,flags);
  1872. return 0;
  1873. }
  1874. /* Set or clear transmit break condition
  1875. *
  1876. * Arguments: tty pointer to tty instance data
  1877. * break_state -1=set break condition, 0=clear
  1878. */
  1879. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1880. {
  1881. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1882. unsigned long flags;
  1883. if (debug_level >= DEBUG_LEVEL_INFO)
  1884. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1885. __FILE__,__LINE__, info->device_name, break_state);
  1886. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1887. return;
  1888. spin_lock_irqsave(&info->lock,flags);
  1889. if (break_state == -1)
  1890. set_reg_bits(info, CHA+DAFO, BIT6);
  1891. else
  1892. clear_reg_bits(info, CHA+DAFO, BIT6);
  1893. spin_unlock_irqrestore(&info->lock,flags);
  1894. }
  1895. /* Service an IOCTL request
  1896. *
  1897. * Arguments:
  1898. *
  1899. * tty pointer to tty instance data
  1900. * file pointer to associated file object for device
  1901. * cmd IOCTL command code
  1902. * arg command argument/context
  1903. *
  1904. * Return Value: 0 if success, otherwise error code
  1905. */
  1906. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1907. unsigned int cmd, unsigned long arg)
  1908. {
  1909. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1910. if (debug_level >= DEBUG_LEVEL_INFO)
  1911. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1912. info->device_name, cmd );
  1913. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1914. return -ENODEV;
  1915. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1916. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1917. if (tty->flags & (1 << TTY_IO_ERROR))
  1918. return -EIO;
  1919. }
  1920. return ioctl_common(info, cmd, arg);
  1921. }
  1922. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1923. {
  1924. int error;
  1925. struct mgsl_icount cnow; /* kernel counter temps */
  1926. struct serial_icounter_struct __user *p_cuser; /* user space */
  1927. void __user *argp = (void __user *)arg;
  1928. unsigned long flags;
  1929. switch (cmd) {
  1930. case MGSL_IOCGPARAMS:
  1931. return get_params(info, argp);
  1932. case MGSL_IOCSPARAMS:
  1933. return set_params(info, argp);
  1934. case MGSL_IOCGTXIDLE:
  1935. return get_txidle(info, argp);
  1936. case MGSL_IOCSTXIDLE:
  1937. return set_txidle(info, (int)arg);
  1938. case MGSL_IOCGIF:
  1939. return get_interface(info, argp);
  1940. case MGSL_IOCSIF:
  1941. return set_interface(info,(int)arg);
  1942. case MGSL_IOCTXENABLE:
  1943. return set_txenable(info,(int)arg);
  1944. case MGSL_IOCRXENABLE:
  1945. return set_rxenable(info,(int)arg);
  1946. case MGSL_IOCTXABORT:
  1947. return tx_abort(info);
  1948. case MGSL_IOCGSTATS:
  1949. return get_stats(info, argp);
  1950. case MGSL_IOCWAITEVENT:
  1951. return wait_events(info, argp);
  1952. case TIOCMIWAIT:
  1953. return modem_input_wait(info,(int)arg);
  1954. case TIOCGICOUNT:
  1955. spin_lock_irqsave(&info->lock,flags);
  1956. cnow = info->icount;
  1957. spin_unlock_irqrestore(&info->lock,flags);
  1958. p_cuser = argp;
  1959. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1960. if (error) return error;
  1961. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1962. if (error) return error;
  1963. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1964. if (error) return error;
  1965. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1966. if (error) return error;
  1967. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1968. if (error) return error;
  1969. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1970. if (error) return error;
  1971. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1972. if (error) return error;
  1973. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1974. if (error) return error;
  1975. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1976. if (error) return error;
  1977. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1978. if (error) return error;
  1979. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1980. if (error) return error;
  1981. return 0;
  1982. default:
  1983. return -ENOIOCTLCMD;
  1984. }
  1985. return 0;
  1986. }
  1987. /* Set new termios settings
  1988. *
  1989. * Arguments:
  1990. *
  1991. * tty pointer to tty structure
  1992. * termios pointer to buffer to hold returned old termios
  1993. */
  1994. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1995. {
  1996. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1997. unsigned long flags;
  1998. if (debug_level >= DEBUG_LEVEL_INFO)
  1999. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  2000. tty->driver->name );
  2001. /* just return if nothing has changed */
  2002. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2003. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2004. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2005. return;
  2006. mgslpc_change_params(info);
  2007. /* Handle transition to B0 status */
  2008. if (old_termios->c_cflag & CBAUD &&
  2009. !(tty->termios->c_cflag & CBAUD)) {
  2010. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2011. spin_lock_irqsave(&info->lock,flags);
  2012. set_signals(info);
  2013. spin_unlock_irqrestore(&info->lock,flags);
  2014. }
  2015. /* Handle transition away from B0 status */
  2016. if (!(old_termios->c_cflag & CBAUD) &&
  2017. tty->termios->c_cflag & CBAUD) {
  2018. info->serial_signals |= SerialSignal_DTR;
  2019. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2020. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2021. info->serial_signals |= SerialSignal_RTS;
  2022. }
  2023. spin_lock_irqsave(&info->lock,flags);
  2024. set_signals(info);
  2025. spin_unlock_irqrestore(&info->lock,flags);
  2026. }
  2027. /* Handle turning off CRTSCTS */
  2028. if (old_termios->c_cflag & CRTSCTS &&
  2029. !(tty->termios->c_cflag & CRTSCTS)) {
  2030. tty->hw_stopped = 0;
  2031. tx_release(tty);
  2032. }
  2033. }
  2034. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2035. {
  2036. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2037. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2038. return;
  2039. if (debug_level >= DEBUG_LEVEL_INFO)
  2040. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2041. __FILE__,__LINE__, info->device_name, info->count);
  2042. if (!info->count)
  2043. return;
  2044. if (tty_hung_up_p(filp))
  2045. goto cleanup;
  2046. if ((tty->count == 1) && (info->count != 1)) {
  2047. /*
  2048. * tty->count is 1 and the tty structure will be freed.
  2049. * info->count should be one in this case.
  2050. * if it's not, correct it so that the port is shutdown.
  2051. */
  2052. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2053. "info->count is %d\n", info->count);
  2054. info->count = 1;
  2055. }
  2056. info->count--;
  2057. /* if at least one open remaining, leave hardware active */
  2058. if (info->count)
  2059. goto cleanup;
  2060. info->flags |= ASYNC_CLOSING;
  2061. /* set tty->closing to notify line discipline to
  2062. * only process XON/XOFF characters. Only the N_TTY
  2063. * discipline appears to use this (ppp does not).
  2064. */
  2065. tty->closing = 1;
  2066. /* wait for transmit data to clear all layers */
  2067. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2068. if (debug_level >= DEBUG_LEVEL_INFO)
  2069. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2070. __FILE__,__LINE__, info->device_name );
  2071. tty_wait_until_sent(tty, info->closing_wait);
  2072. }
  2073. if (info->flags & ASYNC_INITIALIZED)
  2074. mgslpc_wait_until_sent(tty, info->timeout);
  2075. if (tty->driver->flush_buffer)
  2076. tty->driver->flush_buffer(tty);
  2077. ldisc_flush_buffer(tty);
  2078. shutdown(info);
  2079. tty->closing = 0;
  2080. info->tty = NULL;
  2081. if (info->blocked_open) {
  2082. if (info->close_delay) {
  2083. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2084. }
  2085. wake_up_interruptible(&info->open_wait);
  2086. }
  2087. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2088. wake_up_interruptible(&info->close_wait);
  2089. cleanup:
  2090. if (debug_level >= DEBUG_LEVEL_INFO)
  2091. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2092. tty->driver->name, info->count);
  2093. }
  2094. /* Wait until the transmitter is empty.
  2095. */
  2096. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2097. {
  2098. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2099. unsigned long orig_jiffies, char_time;
  2100. if (!info )
  2101. return;
  2102. if (debug_level >= DEBUG_LEVEL_INFO)
  2103. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2104. __FILE__,__LINE__, info->device_name );
  2105. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2106. return;
  2107. if (!(info->flags & ASYNC_INITIALIZED))
  2108. goto exit;
  2109. orig_jiffies = jiffies;
  2110. /* Set check interval to 1/5 of estimated time to
  2111. * send a character, and make it at least 1. The check
  2112. * interval should also be less than the timeout.
  2113. * Note: use tight timings here to satisfy the NIST-PCTS.
  2114. */
  2115. if ( info->params.data_rate ) {
  2116. char_time = info->timeout/(32 * 5);
  2117. if (!char_time)
  2118. char_time++;
  2119. } else
  2120. char_time = 1;
  2121. if (timeout)
  2122. char_time = min_t(unsigned long, char_time, timeout);
  2123. if (info->params.mode == MGSL_MODE_HDLC) {
  2124. while (info->tx_active) {
  2125. msleep_interruptible(jiffies_to_msecs(char_time));
  2126. if (signal_pending(current))
  2127. break;
  2128. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2129. break;
  2130. }
  2131. } else {
  2132. while ((info->tx_count || info->tx_active) &&
  2133. info->tx_enabled) {
  2134. msleep_interruptible(jiffies_to_msecs(char_time));
  2135. if (signal_pending(current))
  2136. break;
  2137. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2138. break;
  2139. }
  2140. }
  2141. exit:
  2142. if (debug_level >= DEBUG_LEVEL_INFO)
  2143. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2144. __FILE__,__LINE__, info->device_name );
  2145. }
  2146. /* Called by tty_hangup() when a hangup is signaled.
  2147. * This is the same as closing all open files for the port.
  2148. */
  2149. static void mgslpc_hangup(struct tty_struct *tty)
  2150. {
  2151. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2152. if (debug_level >= DEBUG_LEVEL_INFO)
  2153. printk("%s(%d):mgslpc_hangup(%s)\n",
  2154. __FILE__,__LINE__, info->device_name );
  2155. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2156. return;
  2157. mgslpc_flush_buffer(tty);
  2158. shutdown(info);
  2159. info->count = 0;
  2160. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2161. info->tty = NULL;
  2162. wake_up_interruptible(&info->open_wait);
  2163. }
  2164. /* Block the current process until the specified port
  2165. * is ready to be opened.
  2166. */
  2167. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2168. MGSLPC_INFO *info)
  2169. {
  2170. DECLARE_WAITQUEUE(wait, current);
  2171. int retval;
  2172. int do_clocal = 0, extra_count = 0;
  2173. unsigned long flags;
  2174. if (debug_level >= DEBUG_LEVEL_INFO)
  2175. printk("%s(%d):block_til_ready on %s\n",
  2176. __FILE__,__LINE__, tty->driver->name );
  2177. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2178. /* nonblock mode is set or port is not enabled */
  2179. /* just verify that callout device is not active */
  2180. info->flags |= ASYNC_NORMAL_ACTIVE;
  2181. return 0;
  2182. }
  2183. if (tty->termios->c_cflag & CLOCAL)
  2184. do_clocal = 1;
  2185. /* Wait for carrier detect and the line to become
  2186. * free (i.e., not in use by the callout). While we are in
  2187. * this loop, info->count is dropped by one, so that
  2188. * mgslpc_close() knows when to free things. We restore it upon
  2189. * exit, either normal or abnormal.
  2190. */
  2191. retval = 0;
  2192. add_wait_queue(&info->open_wait, &wait);
  2193. if (debug_level >= DEBUG_LEVEL_INFO)
  2194. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2195. __FILE__,__LINE__, tty->driver->name, info->count );
  2196. spin_lock_irqsave(&info->lock, flags);
  2197. if (!tty_hung_up_p(filp)) {
  2198. extra_count = 1;
  2199. info->count--;
  2200. }
  2201. spin_unlock_irqrestore(&info->lock, flags);
  2202. info->blocked_open++;
  2203. while (1) {
  2204. if ((tty->termios->c_cflag & CBAUD)) {
  2205. spin_lock_irqsave(&info->lock,flags);
  2206. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2207. set_signals(info);
  2208. spin_unlock_irqrestore(&info->lock,flags);
  2209. }
  2210. set_current_state(TASK_INTERRUPTIBLE);
  2211. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2212. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2213. -EAGAIN : -ERESTARTSYS;
  2214. break;
  2215. }
  2216. spin_lock_irqsave(&info->lock,flags);
  2217. get_signals(info);
  2218. spin_unlock_irqrestore(&info->lock,flags);
  2219. if (!(info->flags & ASYNC_CLOSING) &&
  2220. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2221. break;
  2222. }
  2223. if (signal_pending(current)) {
  2224. retval = -ERESTARTSYS;
  2225. break;
  2226. }
  2227. if (debug_level >= DEBUG_LEVEL_INFO)
  2228. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2229. __FILE__,__LINE__, tty->driver->name, info->count );
  2230. schedule();
  2231. }
  2232. set_current_state(TASK_RUNNING);
  2233. remove_wait_queue(&info->open_wait, &wait);
  2234. if (extra_count)
  2235. info->count++;
  2236. info->blocked_open--;
  2237. if (debug_level >= DEBUG_LEVEL_INFO)
  2238. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2239. __FILE__,__LINE__, tty->driver->name, info->count );
  2240. if (!retval)
  2241. info->flags |= ASYNC_NORMAL_ACTIVE;
  2242. return retval;
  2243. }
  2244. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2245. {
  2246. MGSLPC_INFO *info;
  2247. int retval, line;
  2248. unsigned long flags;
  2249. /* verify range of specified line number */
  2250. line = tty->index;
  2251. if ((line < 0) || (line >= mgslpc_device_count)) {
  2252. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2253. __FILE__,__LINE__,line);
  2254. return -ENODEV;
  2255. }
  2256. /* find the info structure for the specified line */
  2257. info = mgslpc_device_list;
  2258. while(info && info->line != line)
  2259. info = info->next_device;
  2260. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2261. return -ENODEV;
  2262. tty->driver_data = info;
  2263. info->tty = tty;
  2264. if (debug_level >= DEBUG_LEVEL_INFO)
  2265. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2266. __FILE__,__LINE__,tty->driver->name, info->count);
  2267. /* If port is closing, signal caller to try again */
  2268. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2269. if (info->flags & ASYNC_CLOSING)
  2270. interruptible_sleep_on(&info->close_wait);
  2271. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2272. -EAGAIN : -ERESTARTSYS);
  2273. goto cleanup;
  2274. }
  2275. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2276. spin_lock_irqsave(&info->netlock, flags);
  2277. if (info->netcount) {
  2278. retval = -EBUSY;
  2279. spin_unlock_irqrestore(&info->netlock, flags);
  2280. goto cleanup;
  2281. }
  2282. info->count++;
  2283. spin_unlock_irqrestore(&info->netlock, flags);
  2284. if (info->count == 1) {
  2285. /* 1st open on this device, init hardware */
  2286. retval = startup(info);
  2287. if (retval < 0)
  2288. goto cleanup;
  2289. }
  2290. retval = block_til_ready(tty, filp, info);
  2291. if (retval) {
  2292. if (debug_level >= DEBUG_LEVEL_INFO)
  2293. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2294. __FILE__,__LINE__, info->device_name, retval);
  2295. goto cleanup;
  2296. }
  2297. if (debug_level >= DEBUG_LEVEL_INFO)
  2298. printk("%s(%d):mgslpc_open(%s) success\n",
  2299. __FILE__,__LINE__, info->device_name);
  2300. retval = 0;
  2301. cleanup:
  2302. if (retval) {
  2303. if (tty->count == 1)
  2304. info->tty = NULL; /* tty layer will release tty struct */
  2305. if(info->count)
  2306. info->count--;
  2307. }
  2308. return retval;
  2309. }
  2310. /*
  2311. * /proc fs routines....
  2312. */
  2313. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2314. {
  2315. char stat_buf[30];
  2316. int ret;
  2317. unsigned long flags;
  2318. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2319. info->device_name, info->io_base, info->irq_level);
  2320. /* output current serial signal states */
  2321. spin_lock_irqsave(&info->lock,flags);
  2322. get_signals(info);
  2323. spin_unlock_irqrestore(&info->lock,flags);
  2324. stat_buf[0] = 0;
  2325. stat_buf[1] = 0;
  2326. if (info->serial_signals & SerialSignal_RTS)
  2327. strcat(stat_buf, "|RTS");
  2328. if (info->serial_signals & SerialSignal_CTS)
  2329. strcat(stat_buf, "|CTS");
  2330. if (info->serial_signals & SerialSignal_DTR)
  2331. strcat(stat_buf, "|DTR");
  2332. if (info->serial_signals & SerialSignal_DSR)
  2333. strcat(stat_buf, "|DSR");
  2334. if (info->serial_signals & SerialSignal_DCD)
  2335. strcat(stat_buf, "|CD");
  2336. if (info->serial_signals & SerialSignal_RI)
  2337. strcat(stat_buf, "|RI");
  2338. if (info->params.mode == MGSL_MODE_HDLC) {
  2339. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2340. info->icount.txok, info->icount.rxok);
  2341. if (info->icount.txunder)
  2342. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2343. if (info->icount.txabort)
  2344. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2345. if (info->icount.rxshort)
  2346. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2347. if (info->icount.rxlong)
  2348. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2349. if (info->icount.rxover)
  2350. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2351. if (info->icount.rxcrc)
  2352. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2353. } else {
  2354. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2355. info->icount.tx, info->icount.rx);
  2356. if (info->icount.frame)
  2357. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2358. if (info->icount.parity)
  2359. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2360. if (info->icount.brk)
  2361. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2362. if (info->icount.overrun)
  2363. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2364. }
  2365. /* Append serial signal status to end */
  2366. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2367. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2368. info->tx_active,info->bh_requested,info->bh_running,
  2369. info->pending_bh);
  2370. return ret;
  2371. }
  2372. /* Called to print information about devices
  2373. */
  2374. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2375. int *eof, void *data)
  2376. {
  2377. int len = 0, l;
  2378. off_t begin = 0;
  2379. MGSLPC_INFO *info;
  2380. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2381. info = mgslpc_device_list;
  2382. while( info ) {
  2383. l = line_info(page + len, info);
  2384. len += l;
  2385. if (len+begin > off+count)
  2386. goto done;
  2387. if (len+begin < off) {
  2388. begin += len;
  2389. len = 0;
  2390. }
  2391. info = info->next_device;
  2392. }
  2393. *eof = 1;
  2394. done:
  2395. if (off >= len+begin)
  2396. return 0;
  2397. *start = page + (off-begin);
  2398. return ((count < begin+len-off) ? count : begin+len-off);
  2399. }
  2400. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2401. {
  2402. /* each buffer has header and data */
  2403. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2404. /* calculate total allocation size for 8 buffers */
  2405. info->rx_buf_total_size = info->rx_buf_size * 8;
  2406. /* limit total allocated memory */
  2407. if (info->rx_buf_total_size > 0x10000)
  2408. info->rx_buf_total_size = 0x10000;
  2409. /* calculate number of buffers */
  2410. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2411. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2412. if (info->rx_buf == NULL)
  2413. return -ENOMEM;
  2414. rx_reset_buffers(info);
  2415. return 0;
  2416. }
  2417. static void rx_free_buffers(MGSLPC_INFO *info)
  2418. {
  2419. kfree(info->rx_buf);
  2420. info->rx_buf = NULL;
  2421. }
  2422. static int claim_resources(MGSLPC_INFO *info)
  2423. {
  2424. if (rx_alloc_buffers(info) < 0 ) {
  2425. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2426. release_resources(info);
  2427. return -ENODEV;
  2428. }
  2429. return 0;
  2430. }
  2431. static void release_resources(MGSLPC_INFO *info)
  2432. {
  2433. if (debug_level >= DEBUG_LEVEL_INFO)
  2434. printk("release_resources(%s)\n", info->device_name);
  2435. rx_free_buffers(info);
  2436. }
  2437. /* Add the specified device instance data structure to the
  2438. * global linked list of devices and increment the device count.
  2439. *
  2440. * Arguments: info pointer to device instance data
  2441. */
  2442. static void mgslpc_add_device(MGSLPC_INFO *info)
  2443. {
  2444. info->next_device = NULL;
  2445. info->line = mgslpc_device_count;
  2446. sprintf(info->device_name,"ttySLP%d",info->line);
  2447. if (info->line < MAX_DEVICE_COUNT) {
  2448. if (maxframe[info->line])
  2449. info->max_frame_size = maxframe[info->line];
  2450. info->dosyncppp = dosyncppp[info->line];
  2451. }
  2452. mgslpc_device_count++;
  2453. if (!mgslpc_device_list)
  2454. mgslpc_device_list = info;
  2455. else {
  2456. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2457. while( current_dev->next_device )
  2458. current_dev = current_dev->next_device;
  2459. current_dev->next_device = info;
  2460. }
  2461. if (info->max_frame_size < 4096)
  2462. info->max_frame_size = 4096;
  2463. else if (info->max_frame_size > 65535)
  2464. info->max_frame_size = 65535;
  2465. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2466. info->device_name, info->io_base, info->irq_level);
  2467. #ifdef CONFIG_HDLC
  2468. hdlcdev_init(info);
  2469. #endif
  2470. }
  2471. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2472. {
  2473. MGSLPC_INFO *info = mgslpc_device_list;
  2474. MGSLPC_INFO *last = NULL;
  2475. while(info) {
  2476. if (info == remove_info) {
  2477. if (last)
  2478. last->next_device = info->next_device;
  2479. else
  2480. mgslpc_device_list = info->next_device;
  2481. #ifdef CONFIG_HDLC
  2482. hdlcdev_exit(info);
  2483. #endif
  2484. release_resources(info);
  2485. kfree(info);
  2486. mgslpc_device_count--;
  2487. return;
  2488. }
  2489. last = info;
  2490. info = info->next_device;
  2491. }
  2492. }
  2493. static struct pcmcia_device_id mgslpc_ids[] = {
  2494. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2495. PCMCIA_DEVICE_NULL
  2496. };
  2497. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2498. static struct pcmcia_driver mgslpc_driver = {
  2499. .owner = THIS_MODULE,
  2500. .drv = {
  2501. .name = "synclink_cs",
  2502. },
  2503. .probe = mgslpc_probe,
  2504. .remove = mgslpc_detach,
  2505. .id_table = mgslpc_ids,
  2506. .suspend = mgslpc_suspend,
  2507. .resume = mgslpc_resume,
  2508. };
  2509. static const struct tty_operations mgslpc_ops = {
  2510. .open = mgslpc_open,
  2511. .close = mgslpc_close,
  2512. .write = mgslpc_write,
  2513. .put_char = mgslpc_put_char,
  2514. .flush_chars = mgslpc_flush_chars,
  2515. .write_room = mgslpc_write_room,
  2516. .chars_in_buffer = mgslpc_chars_in_buffer,
  2517. .flush_buffer = mgslpc_flush_buffer,
  2518. .ioctl = mgslpc_ioctl,
  2519. .throttle = mgslpc_throttle,
  2520. .unthrottle = mgslpc_unthrottle,
  2521. .send_xchar = mgslpc_send_xchar,
  2522. .break_ctl = mgslpc_break,
  2523. .wait_until_sent = mgslpc_wait_until_sent,
  2524. .read_proc = mgslpc_read_proc,
  2525. .set_termios = mgslpc_set_termios,
  2526. .stop = tx_pause,
  2527. .start = tx_release,
  2528. .hangup = mgslpc_hangup,
  2529. .tiocmget = tiocmget,
  2530. .tiocmset = tiocmset,
  2531. };
  2532. static void synclink_cs_cleanup(void)
  2533. {
  2534. int rc;
  2535. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2536. while(mgslpc_device_list)
  2537. mgslpc_remove_device(mgslpc_device_list);
  2538. if (serial_driver) {
  2539. if ((rc = tty_unregister_driver(serial_driver)))
  2540. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2541. __FILE__,__LINE__,rc);
  2542. put_tty_driver(serial_driver);
  2543. }
  2544. pcmcia_unregister_driver(&mgslpc_driver);
  2545. }
  2546. static int __init synclink_cs_init(void)
  2547. {
  2548. int rc;
  2549. if (break_on_load) {
  2550. mgslpc_get_text_ptr();
  2551. BREAKPOINT();
  2552. }
  2553. printk("%s %s\n", driver_name, driver_version);
  2554. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2555. return rc;
  2556. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2557. if (!serial_driver) {
  2558. rc = -ENOMEM;
  2559. goto error;
  2560. }
  2561. /* Initialize the tty_driver structure */
  2562. serial_driver->owner = THIS_MODULE;
  2563. serial_driver->driver_name = "synclink_cs";
  2564. serial_driver->name = "ttySLP";
  2565. serial_driver->major = ttymajor;
  2566. serial_driver->minor_start = 64;
  2567. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2568. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2569. serial_driver->init_termios = tty_std_termios;
  2570. serial_driver->init_termios.c_cflag =
  2571. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2572. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2573. tty_set_operations(serial_driver, &mgslpc_ops);
  2574. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2575. printk("%s(%d):Couldn't register serial driver\n",
  2576. __FILE__,__LINE__);
  2577. put_tty_driver(serial_driver);
  2578. serial_driver = NULL;
  2579. goto error;
  2580. }
  2581. printk("%s %s, tty major#%d\n",
  2582. driver_name, driver_version,
  2583. serial_driver->major);
  2584. return 0;
  2585. error:
  2586. synclink_cs_cleanup();
  2587. return rc;
  2588. }
  2589. static void __exit synclink_cs_exit(void)
  2590. {
  2591. synclink_cs_cleanup();
  2592. }
  2593. module_init(synclink_cs_init);
  2594. module_exit(synclink_cs_exit);
  2595. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2596. {
  2597. unsigned int M, N;
  2598. unsigned char val;
  2599. /* note:standard BRG mode is broken in V3.2 chip
  2600. * so enhanced mode is always used
  2601. */
  2602. if (rate) {
  2603. N = 3686400 / rate;
  2604. if (!N)
  2605. N = 1;
  2606. N >>= 1;
  2607. for (M = 1; N > 64 && M < 16; M++)
  2608. N >>= 1;
  2609. N--;
  2610. /* BGR[5..0] = N
  2611. * BGR[9..6] = M
  2612. * BGR[7..0] contained in BGR register
  2613. * BGR[9..8] contained in CCR2[7..6]
  2614. * divisor = (N+1)*2^M
  2615. *
  2616. * Note: M *must* not be zero (causes asymetric duty cycle)
  2617. */
  2618. write_reg(info, (unsigned char) (channel + BGR),
  2619. (unsigned char) ((M << 6) + N));
  2620. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2621. val |= ((M << 4) & 0xc0);
  2622. write_reg(info, (unsigned char) (channel + CCR2), val);
  2623. }
  2624. }
  2625. /* Enabled the AUX clock output at the specified frequency.
  2626. */
  2627. static void enable_auxclk(MGSLPC_INFO *info)
  2628. {
  2629. unsigned char val;
  2630. /* MODE
  2631. *
  2632. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2633. * 05 ADM Address Mode, 0 = no addr recognition
  2634. * 04 TMD Timer Mode, 0 = external
  2635. * 03 RAC Receiver Active, 0 = inactive
  2636. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2637. * 01 TRS Timer Resolution, 1=512
  2638. * 00 TLP Test Loop, 0 = no loop
  2639. *
  2640. * 1000 0010
  2641. */
  2642. val = 0x82;
  2643. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2644. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2645. val |= BIT2;
  2646. write_reg(info, CHB + MODE, val);
  2647. /* CCR0
  2648. *
  2649. * 07 PU Power Up, 1=active, 0=power down
  2650. * 06 MCE Master Clock Enable, 1=enabled
  2651. * 05 Reserved, 0
  2652. * 04..02 SC[2..0] Encoding
  2653. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2654. *
  2655. * 11000000
  2656. */
  2657. write_reg(info, CHB + CCR0, 0xc0);
  2658. /* CCR1
  2659. *
  2660. * 07 SFLG Shared Flag, 0 = disable shared flags
  2661. * 06 GALP Go Active On Loop, 0 = not used
  2662. * 05 GLP Go On Loop, 0 = not used
  2663. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2664. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2665. * 02..00 CM[2..0] Clock Mode
  2666. *
  2667. * 0001 0111
  2668. */
  2669. write_reg(info, CHB + CCR1, 0x17);
  2670. /* CCR2 (Channel B)
  2671. *
  2672. * 07..06 BGR[9..8] Baud rate bits 9..8
  2673. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2674. * 04 SSEL Clock source select, 1=submode b
  2675. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2676. * 02 RWX Read/Write Exchange 0=disabled
  2677. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2678. * 00 DIV, data inversion 0=disabled, 1=enabled
  2679. *
  2680. * 0011 1000
  2681. */
  2682. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2683. write_reg(info, CHB + CCR2, 0x38);
  2684. else
  2685. write_reg(info, CHB + CCR2, 0x30);
  2686. /* CCR4
  2687. *
  2688. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2689. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2690. * 05 TST1 Test Pin, 0=normal operation
  2691. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2692. * 03..02 Reserved, must be 0
  2693. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2694. *
  2695. * 0101 0000
  2696. */
  2697. write_reg(info, CHB + CCR4, 0x50);
  2698. /* if auxclk not enabled, set internal BRG so
  2699. * CTS transitions can be detected (requires TxC)
  2700. */
  2701. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2702. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2703. else
  2704. mgslpc_set_rate(info, CHB, 921600);
  2705. }
  2706. static void loopback_enable(MGSLPC_INFO *info)
  2707. {
  2708. unsigned char val;
  2709. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2710. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2711. write_reg(info, CHA + CCR1, val);
  2712. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2713. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2714. write_reg(info, CHA + CCR2, val);
  2715. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2716. if (info->params.clock_speed)
  2717. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2718. else
  2719. mgslpc_set_rate(info, CHA, 1843200);
  2720. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2721. val = read_reg(info, CHA + MODE) | BIT0;
  2722. write_reg(info, CHA + MODE, val);
  2723. }
  2724. static void hdlc_mode(MGSLPC_INFO *info)
  2725. {
  2726. unsigned char val;
  2727. unsigned char clkmode, clksubmode;
  2728. /* disable all interrupts */
  2729. irq_disable(info, CHA, 0xffff);
  2730. irq_disable(info, CHB, 0xffff);
  2731. port_irq_disable(info, 0xff);
  2732. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2733. clkmode = clksubmode = 0;
  2734. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2735. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2736. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2737. clkmode = 7;
  2738. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2739. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2740. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2741. clkmode = 7;
  2742. clksubmode = 1;
  2743. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2744. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2745. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2746. clkmode = 6;
  2747. clksubmode = 1;
  2748. } else {
  2749. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2750. clkmode = 6;
  2751. }
  2752. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2753. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2754. clksubmode = 1;
  2755. }
  2756. /* MODE
  2757. *
  2758. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2759. * 05 ADM Address Mode, 0 = no addr recognition
  2760. * 04 TMD Timer Mode, 0 = external
  2761. * 03 RAC Receiver Active, 0 = inactive
  2762. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2763. * 01 TRS Timer Resolution, 1=512
  2764. * 00 TLP Test Loop, 0 = no loop
  2765. *
  2766. * 1000 0010
  2767. */
  2768. val = 0x82;
  2769. if (info->params.loopback)
  2770. val |= BIT0;
  2771. /* preserve RTS state */
  2772. if (info->serial_signals & SerialSignal_RTS)
  2773. val |= BIT2;
  2774. write_reg(info, CHA + MODE, val);
  2775. /* CCR0
  2776. *
  2777. * 07 PU Power Up, 1=active, 0=power down
  2778. * 06 MCE Master Clock Enable, 1=enabled
  2779. * 05 Reserved, 0
  2780. * 04..02 SC[2..0] Encoding
  2781. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2782. *
  2783. * 11000000
  2784. */
  2785. val = 0xc0;
  2786. switch (info->params.encoding)
  2787. {
  2788. case HDLC_ENCODING_NRZI:
  2789. val |= BIT3;
  2790. break;
  2791. case HDLC_ENCODING_BIPHASE_SPACE:
  2792. val |= BIT4;
  2793. break; // FM0
  2794. case HDLC_ENCODING_BIPHASE_MARK:
  2795. val |= BIT4 + BIT2;
  2796. break; // FM1
  2797. case HDLC_ENCODING_BIPHASE_LEVEL:
  2798. val |= BIT4 + BIT3;
  2799. break; // Manchester
  2800. }
  2801. write_reg(info, CHA + CCR0, val);
  2802. /* CCR1
  2803. *
  2804. * 07 SFLG Shared Flag, 0 = disable shared flags
  2805. * 06 GALP Go Active On Loop, 0 = not used
  2806. * 05 GLP Go On Loop, 0 = not used
  2807. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2808. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2809. * 02..00 CM[2..0] Clock Mode
  2810. *
  2811. * 0001 0000
  2812. */
  2813. val = 0x10 + clkmode;
  2814. write_reg(info, CHA + CCR1, val);
  2815. /* CCR2
  2816. *
  2817. * 07..06 BGR[9..8] Baud rate bits 9..8
  2818. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2819. * 04 SSEL Clock source select, 1=submode b
  2820. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2821. * 02 RWX Read/Write Exchange 0=disabled
  2822. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2823. * 00 DIV, data inversion 0=disabled, 1=enabled
  2824. *
  2825. * 0000 0000
  2826. */
  2827. val = 0x00;
  2828. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2829. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2830. val |= BIT5;
  2831. if (clksubmode)
  2832. val |= BIT4;
  2833. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2834. val |= BIT1;
  2835. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2836. val |= BIT0;
  2837. write_reg(info, CHA + CCR2, val);
  2838. /* CCR3
  2839. *
  2840. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2841. * 05 EPT Enable preamble transmission, 1=enabled
  2842. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2843. * 03 CRL CRC Reset Level, 0=FFFF
  2844. * 02 RCRC Rx CRC 0=On 1=Off
  2845. * 01 TCRC Tx CRC 0=On 1=Off
  2846. * 00 PSD DPLL Phase Shift Disable
  2847. *
  2848. * 0000 0000
  2849. */
  2850. val = 0x00;
  2851. if (info->params.crc_type == HDLC_CRC_NONE)
  2852. val |= BIT2 + BIT1;
  2853. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2854. val |= BIT5;
  2855. switch (info->params.preamble_length)
  2856. {
  2857. case HDLC_PREAMBLE_LENGTH_16BITS:
  2858. val |= BIT6;
  2859. break;
  2860. case HDLC_PREAMBLE_LENGTH_32BITS:
  2861. val |= BIT6;
  2862. break;
  2863. case HDLC_PREAMBLE_LENGTH_64BITS:
  2864. val |= BIT7 + BIT6;
  2865. break;
  2866. }
  2867. write_reg(info, CHA + CCR3, val);
  2868. /* PRE - Preamble pattern */
  2869. val = 0;
  2870. switch (info->params.preamble)
  2871. {
  2872. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2873. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2874. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2875. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2876. }
  2877. write_reg(info, CHA + PRE, val);
  2878. /* CCR4
  2879. *
  2880. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2881. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2882. * 05 TST1 Test Pin, 0=normal operation
  2883. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2884. * 03..02 Reserved, must be 0
  2885. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2886. *
  2887. * 0101 0000
  2888. */
  2889. val = 0x50;
  2890. write_reg(info, CHA + CCR4, val);
  2891. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2892. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2893. else
  2894. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2895. /* RLCR Receive length check register
  2896. *
  2897. * 7 1=enable receive length check
  2898. * 6..0 Max frame length = (RL + 1) * 32
  2899. */
  2900. write_reg(info, CHA + RLCR, 0);
  2901. /* XBCH Transmit Byte Count High
  2902. *
  2903. * 07 DMA mode, 0 = interrupt driven
  2904. * 06 NRM, 0=ABM (ignored)
  2905. * 05 CAS Carrier Auto Start
  2906. * 04 XC Transmit Continuously (ignored)
  2907. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2908. *
  2909. * 0000 0000
  2910. */
  2911. val = 0x00;
  2912. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2913. val |= BIT5;
  2914. write_reg(info, CHA + XBCH, val);
  2915. enable_auxclk(info);
  2916. if (info->params.loopback || info->testing_irq)
  2917. loopback_enable(info);
  2918. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2919. {
  2920. irq_enable(info, CHB, IRQ_CTS);
  2921. /* PVR[3] 1=AUTO CTS active */
  2922. set_reg_bits(info, CHA + PVR, BIT3);
  2923. } else
  2924. clear_reg_bits(info, CHA + PVR, BIT3);
  2925. irq_enable(info, CHA,
  2926. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2927. IRQ_UNDERRUN + IRQ_TXFIFO);
  2928. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2929. wait_command_complete(info, CHA);
  2930. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2931. /* Master clock mode enabled above to allow reset commands
  2932. * to complete even if no data clocks are present.
  2933. *
  2934. * Disable master clock mode for normal communications because
  2935. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2936. * IRQ when in master clock mode.
  2937. *
  2938. * Leave master clock mode enabled for IRQ test because the
  2939. * timer IRQ used by the test can only happen in master clock mode.
  2940. */
  2941. if (!info->testing_irq)
  2942. clear_reg_bits(info, CHA + CCR0, BIT6);
  2943. tx_set_idle(info);
  2944. tx_stop(info);
  2945. rx_stop(info);
  2946. }
  2947. static void rx_stop(MGSLPC_INFO *info)
  2948. {
  2949. if (debug_level >= DEBUG_LEVEL_ISR)
  2950. printk("%s(%d):rx_stop(%s)\n",
  2951. __FILE__,__LINE__, info->device_name );
  2952. /* MODE:03 RAC Receiver Active, 0=inactive */
  2953. clear_reg_bits(info, CHA + MODE, BIT3);
  2954. info->rx_enabled = 0;
  2955. info->rx_overflow = 0;
  2956. }
  2957. static void rx_start(MGSLPC_INFO *info)
  2958. {
  2959. if (debug_level >= DEBUG_LEVEL_ISR)
  2960. printk("%s(%d):rx_start(%s)\n",
  2961. __FILE__,__LINE__, info->device_name );
  2962. rx_reset_buffers(info);
  2963. info->rx_enabled = 0;
  2964. info->rx_overflow = 0;
  2965. /* MODE:03 RAC Receiver Active, 1=active */
  2966. set_reg_bits(info, CHA + MODE, BIT3);
  2967. info->rx_enabled = 1;
  2968. }
  2969. static void tx_start(MGSLPC_INFO *info)
  2970. {
  2971. if (debug_level >= DEBUG_LEVEL_ISR)
  2972. printk("%s(%d):tx_start(%s)\n",
  2973. __FILE__,__LINE__, info->device_name );
  2974. if (info->tx_count) {
  2975. /* If auto RTS enabled and RTS is inactive, then assert */
  2976. /* RTS and set a flag indicating that the driver should */
  2977. /* negate RTS when the transmission completes. */
  2978. info->drop_rts_on_tx_done = 0;
  2979. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2980. get_signals(info);
  2981. if (!(info->serial_signals & SerialSignal_RTS)) {
  2982. info->serial_signals |= SerialSignal_RTS;
  2983. set_signals(info);
  2984. info->drop_rts_on_tx_done = 1;
  2985. }
  2986. }
  2987. if (info->params.mode == MGSL_MODE_ASYNC) {
  2988. if (!info->tx_active) {
  2989. info->tx_active = 1;
  2990. tx_ready(info);
  2991. }
  2992. } else {
  2993. info->tx_active = 1;
  2994. tx_ready(info);
  2995. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  2996. add_timer(&info->tx_timer);
  2997. }
  2998. }
  2999. if (!info->tx_enabled)
  3000. info->tx_enabled = 1;
  3001. }
  3002. static void tx_stop(MGSLPC_INFO *info)
  3003. {
  3004. if (debug_level >= DEBUG_LEVEL_ISR)
  3005. printk("%s(%d):tx_stop(%s)\n",
  3006. __FILE__,__LINE__, info->device_name );
  3007. del_timer(&info->tx_timer);
  3008. info->tx_enabled = 0;
  3009. info->tx_active = 0;
  3010. }
  3011. /* Reset the adapter to a known state and prepare it for further use.
  3012. */
  3013. static void reset_device(MGSLPC_INFO *info)
  3014. {
  3015. /* power up both channels (set BIT7) */
  3016. write_reg(info, CHA + CCR0, 0x80);
  3017. write_reg(info, CHB + CCR0, 0x80);
  3018. write_reg(info, CHA + MODE, 0);
  3019. write_reg(info, CHB + MODE, 0);
  3020. /* disable all interrupts */
  3021. irq_disable(info, CHA, 0xffff);
  3022. irq_disable(info, CHB, 0xffff);
  3023. port_irq_disable(info, 0xff);
  3024. /* PCR Port Configuration Register
  3025. *
  3026. * 07..04 DEC[3..0] Serial I/F select outputs
  3027. * 03 output, 1=AUTO CTS control enabled
  3028. * 02 RI Ring Indicator input 0=active
  3029. * 01 DSR input 0=active
  3030. * 00 DTR output 0=active
  3031. *
  3032. * 0000 0110
  3033. */
  3034. write_reg(info, PCR, 0x06);
  3035. /* PVR Port Value Register
  3036. *
  3037. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3038. * 03 AUTO CTS output 1=enabled
  3039. * 02 RI Ring Indicator input
  3040. * 01 DSR input
  3041. * 00 DTR output (1=inactive)
  3042. *
  3043. * 0000 0001
  3044. */
  3045. // write_reg(info, PVR, PVR_DTR);
  3046. /* IPC Interrupt Port Configuration
  3047. *
  3048. * 07 VIS 1=Masked interrupts visible
  3049. * 06..05 Reserved, 0
  3050. * 04..03 SLA Slave address, 00 ignored
  3051. * 02 CASM Cascading Mode, 1=daisy chain
  3052. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3053. *
  3054. * 0000 0101
  3055. */
  3056. write_reg(info, IPC, 0x05);
  3057. }
  3058. static void async_mode(MGSLPC_INFO *info)
  3059. {
  3060. unsigned char val;
  3061. /* disable all interrupts */
  3062. irq_disable(info, CHA, 0xffff);
  3063. irq_disable(info, CHB, 0xffff);
  3064. port_irq_disable(info, 0xff);
  3065. /* MODE
  3066. *
  3067. * 07 Reserved, 0
  3068. * 06 FRTS RTS State, 0=active
  3069. * 05 FCTS Flow Control on CTS
  3070. * 04 FLON Flow Control Enable
  3071. * 03 RAC Receiver Active, 0 = inactive
  3072. * 02 RTS 0=Auto RTS, 1=manual RTS
  3073. * 01 TRS Timer Resolution, 1=512
  3074. * 00 TLP Test Loop, 0 = no loop
  3075. *
  3076. * 0000 0110
  3077. */
  3078. val = 0x06;
  3079. if (info->params.loopback)
  3080. val |= BIT0;
  3081. /* preserve RTS state */
  3082. if (!(info->serial_signals & SerialSignal_RTS))
  3083. val |= BIT6;
  3084. write_reg(info, CHA + MODE, val);
  3085. /* CCR0
  3086. *
  3087. * 07 PU Power Up, 1=active, 0=power down
  3088. * 06 MCE Master Clock Enable, 1=enabled
  3089. * 05 Reserved, 0
  3090. * 04..02 SC[2..0] Encoding, 000=NRZ
  3091. * 01..00 SM[1..0] Serial Mode, 11=Async
  3092. *
  3093. * 1000 0011
  3094. */
  3095. write_reg(info, CHA + CCR0, 0x83);
  3096. /* CCR1
  3097. *
  3098. * 07..05 Reserved, 0
  3099. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3100. * 03 BCR Bit Clock Rate, 1=16x
  3101. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3102. *
  3103. * 0001 1111
  3104. */
  3105. write_reg(info, CHA + CCR1, 0x1f);
  3106. /* CCR2 (channel A)
  3107. *
  3108. * 07..06 BGR[9..8] Baud rate bits 9..8
  3109. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3110. * 04 SSEL Clock source select, 1=submode b
  3111. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3112. * 02 RWX Read/Write Exchange 0=disabled
  3113. * 01 Reserved, 0
  3114. * 00 DIV, data inversion 0=disabled, 1=enabled
  3115. *
  3116. * 0001 0000
  3117. */
  3118. write_reg(info, CHA + CCR2, 0x10);
  3119. /* CCR3
  3120. *
  3121. * 07..01 Reserved, 0
  3122. * 00 PSD DPLL Phase Shift Disable
  3123. *
  3124. * 0000 0000
  3125. */
  3126. write_reg(info, CHA + CCR3, 0);
  3127. /* CCR4
  3128. *
  3129. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3130. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3131. * 05 TST1 Test Pin, 0=normal operation
  3132. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3133. * 03..00 Reserved, must be 0
  3134. *
  3135. * 0101 0000
  3136. */
  3137. write_reg(info, CHA + CCR4, 0x50);
  3138. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3139. /* DAFO Data Format
  3140. *
  3141. * 07 Reserved, 0
  3142. * 06 XBRK transmit break, 0=normal operation
  3143. * 05 Stop bits (0=1, 1=2)
  3144. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3145. * 02 PAREN Parity Enable
  3146. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3147. *
  3148. */
  3149. val = 0x00;
  3150. if (info->params.data_bits != 8)
  3151. val |= BIT0; /* 7 bits */
  3152. if (info->params.stop_bits != 1)
  3153. val |= BIT5;
  3154. if (info->params.parity != ASYNC_PARITY_NONE)
  3155. {
  3156. val |= BIT2; /* Parity enable */
  3157. if (info->params.parity == ASYNC_PARITY_ODD)
  3158. val |= BIT3;
  3159. else
  3160. val |= BIT4;
  3161. }
  3162. write_reg(info, CHA + DAFO, val);
  3163. /* RFC Rx FIFO Control
  3164. *
  3165. * 07 Reserved, 0
  3166. * 06 DPS, 1=parity bit not stored in data byte
  3167. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3168. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3169. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3170. * 01 Reserved, 0
  3171. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3172. *
  3173. * 0101 1100
  3174. */
  3175. write_reg(info, CHA + RFC, 0x5c);
  3176. /* RLCR Receive length check register
  3177. *
  3178. * Max frame length = (RL + 1) * 32
  3179. */
  3180. write_reg(info, CHA + RLCR, 0);
  3181. /* XBCH Transmit Byte Count High
  3182. *
  3183. * 07 DMA mode, 0 = interrupt driven
  3184. * 06 NRM, 0=ABM (ignored)
  3185. * 05 CAS Carrier Auto Start
  3186. * 04 XC Transmit Continuously (ignored)
  3187. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3188. *
  3189. * 0000 0000
  3190. */
  3191. val = 0x00;
  3192. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3193. val |= BIT5;
  3194. write_reg(info, CHA + XBCH, val);
  3195. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3196. irq_enable(info, CHA, IRQ_CTS);
  3197. /* MODE:03 RAC Receiver Active, 1=active */
  3198. set_reg_bits(info, CHA + MODE, BIT3);
  3199. enable_auxclk(info);
  3200. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3201. irq_enable(info, CHB, IRQ_CTS);
  3202. /* PVR[3] 1=AUTO CTS active */
  3203. set_reg_bits(info, CHA + PVR, BIT3);
  3204. } else
  3205. clear_reg_bits(info, CHA + PVR, BIT3);
  3206. irq_enable(info, CHA,
  3207. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3208. IRQ_ALLSENT + IRQ_TXFIFO);
  3209. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3210. wait_command_complete(info, CHA);
  3211. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3212. }
  3213. /* Set the HDLC idle mode for the transmitter.
  3214. */
  3215. static void tx_set_idle(MGSLPC_INFO *info)
  3216. {
  3217. /* Note: ESCC2 only supports flags and one idle modes */
  3218. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3219. set_reg_bits(info, CHA + CCR1, BIT3);
  3220. else
  3221. clear_reg_bits(info, CHA + CCR1, BIT3);
  3222. }
  3223. /* get state of the V24 status (input) signals.
  3224. */
  3225. static void get_signals(MGSLPC_INFO *info)
  3226. {
  3227. unsigned char status = 0;
  3228. /* preserve DTR and RTS */
  3229. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3230. if (read_reg(info, CHB + VSTR) & BIT7)
  3231. info->serial_signals |= SerialSignal_DCD;
  3232. if (read_reg(info, CHB + STAR) & BIT1)
  3233. info->serial_signals |= SerialSignal_CTS;
  3234. status = read_reg(info, CHA + PVR);
  3235. if (!(status & PVR_RI))
  3236. info->serial_signals |= SerialSignal_RI;
  3237. if (!(status & PVR_DSR))
  3238. info->serial_signals |= SerialSignal_DSR;
  3239. }
  3240. /* Set the state of DTR and RTS based on contents of
  3241. * serial_signals member of device extension.
  3242. */
  3243. static void set_signals(MGSLPC_INFO *info)
  3244. {
  3245. unsigned char val;
  3246. val = read_reg(info, CHA + MODE);
  3247. if (info->params.mode == MGSL_MODE_ASYNC) {
  3248. if (info->serial_signals & SerialSignal_RTS)
  3249. val &= ~BIT6;
  3250. else
  3251. val |= BIT6;
  3252. } else {
  3253. if (info->serial_signals & SerialSignal_RTS)
  3254. val |= BIT2;
  3255. else
  3256. val &= ~BIT2;
  3257. }
  3258. write_reg(info, CHA + MODE, val);
  3259. if (info->serial_signals & SerialSignal_DTR)
  3260. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3261. else
  3262. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3263. }
  3264. static void rx_reset_buffers(MGSLPC_INFO *info)
  3265. {
  3266. RXBUF *buf;
  3267. int i;
  3268. info->rx_put = 0;
  3269. info->rx_get = 0;
  3270. info->rx_frame_count = 0;
  3271. for (i=0 ; i < info->rx_buf_count ; i++) {
  3272. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3273. buf->status = buf->count = 0;
  3274. }
  3275. }
  3276. /* Attempt to return a received HDLC frame
  3277. * Only frames received without errors are returned.
  3278. *
  3279. * Returns 1 if frame returned, otherwise 0
  3280. */
  3281. static int rx_get_frame(MGSLPC_INFO *info)
  3282. {
  3283. unsigned short status;
  3284. RXBUF *buf;
  3285. unsigned int framesize = 0;
  3286. unsigned long flags;
  3287. struct tty_struct *tty = info->tty;
  3288. int return_frame = 0;
  3289. if (info->rx_frame_count == 0)
  3290. return 0;
  3291. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3292. status = buf->status;
  3293. /* 07 VFR 1=valid frame
  3294. * 06 RDO 1=data overrun
  3295. * 05 CRC 1=OK, 0=error
  3296. * 04 RAB 1=frame aborted
  3297. */
  3298. if ((status & 0xf0) != 0xA0) {
  3299. if (!(status & BIT7) || (status & BIT4))
  3300. info->icount.rxabort++;
  3301. else if (status & BIT6)
  3302. info->icount.rxover++;
  3303. else if (!(status & BIT5)) {
  3304. info->icount.rxcrc++;
  3305. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3306. return_frame = 1;
  3307. }
  3308. framesize = 0;
  3309. #ifdef CONFIG_HDLC
  3310. {
  3311. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3312. stats->rx_errors++;
  3313. stats->rx_frame_errors++;
  3314. }
  3315. #endif
  3316. } else
  3317. return_frame = 1;
  3318. if (return_frame)
  3319. framesize = buf->count;
  3320. if (debug_level >= DEBUG_LEVEL_BH)
  3321. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3322. __FILE__,__LINE__,info->device_name,status,framesize);
  3323. if (debug_level >= DEBUG_LEVEL_DATA)
  3324. trace_block(info, buf->data, framesize, 0);
  3325. if (framesize) {
  3326. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3327. framesize+1 > info->max_frame_size) ||
  3328. framesize > info->max_frame_size)
  3329. info->icount.rxlong++;
  3330. else {
  3331. if (status & BIT5)
  3332. info->icount.rxok++;
  3333. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3334. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3335. ++framesize;
  3336. }
  3337. #ifdef CONFIG_HDLC
  3338. if (info->netcount)
  3339. hdlcdev_rx(info, buf->data, framesize);
  3340. else
  3341. #endif
  3342. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3343. }
  3344. }
  3345. spin_lock_irqsave(&info->lock,flags);
  3346. buf->status = buf->count = 0;
  3347. info->rx_frame_count--;
  3348. info->rx_get++;
  3349. if (info->rx_get >= info->rx_buf_count)
  3350. info->rx_get = 0;
  3351. spin_unlock_irqrestore(&info->lock,flags);
  3352. return 1;
  3353. }
  3354. static BOOLEAN register_test(MGSLPC_INFO *info)
  3355. {
  3356. static unsigned char patterns[] =
  3357. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3358. static unsigned int count = ARRAY_SIZE(patterns);
  3359. unsigned int i;
  3360. BOOLEAN rc = TRUE;
  3361. unsigned long flags;
  3362. spin_lock_irqsave(&info->lock,flags);
  3363. reset_device(info);
  3364. for (i = 0; i < count; i++) {
  3365. write_reg(info, XAD1, patterns[i]);
  3366. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3367. if ((read_reg(info, XAD1) != patterns[i]) ||
  3368. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3369. rc = FALSE;
  3370. break;
  3371. }
  3372. }
  3373. spin_unlock_irqrestore(&info->lock,flags);
  3374. return rc;
  3375. }
  3376. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3377. {
  3378. unsigned long end_time;
  3379. unsigned long flags;
  3380. spin_lock_irqsave(&info->lock,flags);
  3381. reset_device(info);
  3382. info->testing_irq = TRUE;
  3383. hdlc_mode(info);
  3384. info->irq_occurred = FALSE;
  3385. /* init hdlc mode */
  3386. irq_enable(info, CHA, IRQ_TIMER);
  3387. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3388. issue_command(info, CHA, CMD_START_TIMER);
  3389. spin_unlock_irqrestore(&info->lock,flags);
  3390. end_time=100;
  3391. while(end_time-- && !info->irq_occurred) {
  3392. msleep_interruptible(10);
  3393. }
  3394. info->testing_irq = FALSE;
  3395. spin_lock_irqsave(&info->lock,flags);
  3396. reset_device(info);
  3397. spin_unlock_irqrestore(&info->lock,flags);
  3398. return info->irq_occurred ? TRUE : FALSE;
  3399. }
  3400. static int adapter_test(MGSLPC_INFO *info)
  3401. {
  3402. if (!register_test(info)) {
  3403. info->init_error = DiagStatus_AddressFailure;
  3404. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3405. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3406. return -ENODEV;
  3407. }
  3408. if (!irq_test(info)) {
  3409. info->init_error = DiagStatus_IrqFailure;
  3410. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3411. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3412. return -ENODEV;
  3413. }
  3414. if (debug_level >= DEBUG_LEVEL_INFO)
  3415. printk("%s(%d):device %s passed diagnostics\n",
  3416. __FILE__,__LINE__,info->device_name);
  3417. return 0;
  3418. }
  3419. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3420. {
  3421. int i;
  3422. int linecount;
  3423. if (xmit)
  3424. printk("%s tx data:\n",info->device_name);
  3425. else
  3426. printk("%s rx data:\n",info->device_name);
  3427. while(count) {
  3428. if (count > 16)
  3429. linecount = 16;
  3430. else
  3431. linecount = count;
  3432. for(i=0;i<linecount;i++)
  3433. printk("%02X ",(unsigned char)data[i]);
  3434. for(;i<17;i++)
  3435. printk(" ");
  3436. for(i=0;i<linecount;i++) {
  3437. if (data[i]>=040 && data[i]<=0176)
  3438. printk("%c",data[i]);
  3439. else
  3440. printk(".");
  3441. }
  3442. printk("\n");
  3443. data += linecount;
  3444. count -= linecount;
  3445. }
  3446. }
  3447. /* HDLC frame time out
  3448. * update stats and do tx completion processing
  3449. */
  3450. static void tx_timeout(unsigned long context)
  3451. {
  3452. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3453. unsigned long flags;
  3454. if ( debug_level >= DEBUG_LEVEL_INFO )
  3455. printk( "%s(%d):tx_timeout(%s)\n",
  3456. __FILE__,__LINE__,info->device_name);
  3457. if(info->tx_active &&
  3458. info->params.mode == MGSL_MODE_HDLC) {
  3459. info->icount.txtimeout++;
  3460. }
  3461. spin_lock_irqsave(&info->lock,flags);
  3462. info->tx_active = 0;
  3463. info->tx_count = info->tx_put = info->tx_get = 0;
  3464. spin_unlock_irqrestore(&info->lock,flags);
  3465. #ifdef CONFIG_HDLC
  3466. if (info->netcount)
  3467. hdlcdev_tx_done(info);
  3468. else
  3469. #endif
  3470. bh_transmit(info);
  3471. }
  3472. #ifdef CONFIG_HDLC
  3473. /**
  3474. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3475. * set encoding and frame check sequence (FCS) options
  3476. *
  3477. * dev pointer to network device structure
  3478. * encoding serial encoding setting
  3479. * parity FCS setting
  3480. *
  3481. * returns 0 if success, otherwise error code
  3482. */
  3483. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3484. unsigned short parity)
  3485. {
  3486. MGSLPC_INFO *info = dev_to_port(dev);
  3487. unsigned char new_encoding;
  3488. unsigned short new_crctype;
  3489. /* return error if TTY interface open */
  3490. if (info->count)
  3491. return -EBUSY;
  3492. switch (encoding)
  3493. {
  3494. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3495. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3496. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3497. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3498. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3499. default: return -EINVAL;
  3500. }
  3501. switch (parity)
  3502. {
  3503. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3504. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3505. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3506. default: return -EINVAL;
  3507. }
  3508. info->params.encoding = new_encoding;
  3509. info->params.crc_type = new_crctype;
  3510. /* if network interface up, reprogram hardware */
  3511. if (info->netcount)
  3512. mgslpc_program_hw(info);
  3513. return 0;
  3514. }
  3515. /**
  3516. * called by generic HDLC layer to send frame
  3517. *
  3518. * skb socket buffer containing HDLC frame
  3519. * dev pointer to network device structure
  3520. *
  3521. * returns 0 if success, otherwise error code
  3522. */
  3523. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3524. {
  3525. MGSLPC_INFO *info = dev_to_port(dev);
  3526. struct net_device_stats *stats = hdlc_stats(dev);
  3527. unsigned long flags;
  3528. if (debug_level >= DEBUG_LEVEL_INFO)
  3529. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3530. /* stop sending until this frame completes */
  3531. netif_stop_queue(dev);
  3532. /* copy data to device buffers */
  3533. memcpy(info->tx_buf, skb->data, skb->len);
  3534. info->tx_get = 0;
  3535. info->tx_put = info->tx_count = skb->len;
  3536. /* update network statistics */
  3537. stats->tx_packets++;
  3538. stats->tx_bytes += skb->len;
  3539. /* done with socket buffer, so free it */
  3540. dev_kfree_skb(skb);
  3541. /* save start time for transmit timeout detection */
  3542. dev->trans_start = jiffies;
  3543. /* start hardware transmitter if necessary */
  3544. spin_lock_irqsave(&info->lock,flags);
  3545. if (!info->tx_active)
  3546. tx_start(info);
  3547. spin_unlock_irqrestore(&info->lock,flags);
  3548. return 0;
  3549. }
  3550. /**
  3551. * called by network layer when interface enabled
  3552. * claim resources and initialize hardware
  3553. *
  3554. * dev pointer to network device structure
  3555. *
  3556. * returns 0 if success, otherwise error code
  3557. */
  3558. static int hdlcdev_open(struct net_device *dev)
  3559. {
  3560. MGSLPC_INFO *info = dev_to_port(dev);
  3561. int rc;
  3562. unsigned long flags;
  3563. if (debug_level >= DEBUG_LEVEL_INFO)
  3564. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3565. /* generic HDLC layer open processing */
  3566. if ((rc = hdlc_open(dev)))
  3567. return rc;
  3568. /* arbitrate between network and tty opens */
  3569. spin_lock_irqsave(&info->netlock, flags);
  3570. if (info->count != 0 || info->netcount != 0) {
  3571. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3572. spin_unlock_irqrestore(&info->netlock, flags);
  3573. return -EBUSY;
  3574. }
  3575. info->netcount=1;
  3576. spin_unlock_irqrestore(&info->netlock, flags);
  3577. /* claim resources and init adapter */
  3578. if ((rc = startup(info)) != 0) {
  3579. spin_lock_irqsave(&info->netlock, flags);
  3580. info->netcount=0;
  3581. spin_unlock_irqrestore(&info->netlock, flags);
  3582. return rc;
  3583. }
  3584. /* assert DTR and RTS, apply hardware settings */
  3585. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3586. mgslpc_program_hw(info);
  3587. /* enable network layer transmit */
  3588. dev->trans_start = jiffies;
  3589. netif_start_queue(dev);
  3590. /* inform generic HDLC layer of current DCD status */
  3591. spin_lock_irqsave(&info->lock, flags);
  3592. get_signals(info);
  3593. spin_unlock_irqrestore(&info->lock, flags);
  3594. if (info->serial_signals & SerialSignal_DCD)
  3595. netif_carrier_on(dev);
  3596. else
  3597. netif_carrier_off(dev);
  3598. return 0;
  3599. }
  3600. /**
  3601. * called by network layer when interface is disabled
  3602. * shutdown hardware and release resources
  3603. *
  3604. * dev pointer to network device structure
  3605. *
  3606. * returns 0 if success, otherwise error code
  3607. */
  3608. static int hdlcdev_close(struct net_device *dev)
  3609. {
  3610. MGSLPC_INFO *info = dev_to_port(dev);
  3611. unsigned long flags;
  3612. if (debug_level >= DEBUG_LEVEL_INFO)
  3613. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3614. netif_stop_queue(dev);
  3615. /* shutdown adapter and release resources */
  3616. shutdown(info);
  3617. hdlc_close(dev);
  3618. spin_lock_irqsave(&info->netlock, flags);
  3619. info->netcount=0;
  3620. spin_unlock_irqrestore(&info->netlock, flags);
  3621. return 0;
  3622. }
  3623. /**
  3624. * called by network layer to process IOCTL call to network device
  3625. *
  3626. * dev pointer to network device structure
  3627. * ifr pointer to network interface request structure
  3628. * cmd IOCTL command code
  3629. *
  3630. * returns 0 if success, otherwise error code
  3631. */
  3632. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3633. {
  3634. const size_t size = sizeof(sync_serial_settings);
  3635. sync_serial_settings new_line;
  3636. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3637. MGSLPC_INFO *info = dev_to_port(dev);
  3638. unsigned int flags;
  3639. if (debug_level >= DEBUG_LEVEL_INFO)
  3640. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3641. /* return error if TTY interface open */
  3642. if (info->count)
  3643. return -EBUSY;
  3644. if (cmd != SIOCWANDEV)
  3645. return hdlc_ioctl(dev, ifr, cmd);
  3646. switch(ifr->ifr_settings.type) {
  3647. case IF_GET_IFACE: /* return current sync_serial_settings */
  3648. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3649. if (ifr->ifr_settings.size < size) {
  3650. ifr->ifr_settings.size = size; /* data size wanted */
  3651. return -ENOBUFS;
  3652. }
  3653. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3654. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3655. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3656. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3657. switch (flags){
  3658. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3659. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3660. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3661. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3662. default: new_line.clock_type = CLOCK_DEFAULT;
  3663. }
  3664. new_line.clock_rate = info->params.clock_speed;
  3665. new_line.loopback = info->params.loopback ? 1:0;
  3666. if (copy_to_user(line, &new_line, size))
  3667. return -EFAULT;
  3668. return 0;
  3669. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3670. if(!capable(CAP_NET_ADMIN))
  3671. return -EPERM;
  3672. if (copy_from_user(&new_line, line, size))
  3673. return -EFAULT;
  3674. switch (new_line.clock_type)
  3675. {
  3676. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3677. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3678. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3679. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3680. case CLOCK_DEFAULT: flags = info->params.flags &
  3681. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3682. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3683. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3684. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3685. default: return -EINVAL;
  3686. }
  3687. if (new_line.loopback != 0 && new_line.loopback != 1)
  3688. return -EINVAL;
  3689. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3690. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3691. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3692. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3693. info->params.flags |= flags;
  3694. info->params.loopback = new_line.loopback;
  3695. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3696. info->params.clock_speed = new_line.clock_rate;
  3697. else
  3698. info->params.clock_speed = 0;
  3699. /* if network interface up, reprogram hardware */
  3700. if (info->netcount)
  3701. mgslpc_program_hw(info);
  3702. return 0;
  3703. default:
  3704. return hdlc_ioctl(dev, ifr, cmd);
  3705. }
  3706. }
  3707. /**
  3708. * called by network layer when transmit timeout is detected
  3709. *
  3710. * dev pointer to network device structure
  3711. */
  3712. static void hdlcdev_tx_timeout(struct net_device *dev)
  3713. {
  3714. MGSLPC_INFO *info = dev_to_port(dev);
  3715. struct net_device_stats *stats = hdlc_stats(dev);
  3716. unsigned long flags;
  3717. if (debug_level >= DEBUG_LEVEL_INFO)
  3718. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3719. stats->tx_errors++;
  3720. stats->tx_aborted_errors++;
  3721. spin_lock_irqsave(&info->lock,flags);
  3722. tx_stop(info);
  3723. spin_unlock_irqrestore(&info->lock,flags);
  3724. netif_wake_queue(dev);
  3725. }
  3726. /**
  3727. * called by device driver when transmit completes
  3728. * reenable network layer transmit if stopped
  3729. *
  3730. * info pointer to device instance information
  3731. */
  3732. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3733. {
  3734. if (netif_queue_stopped(info->netdev))
  3735. netif_wake_queue(info->netdev);
  3736. }
  3737. /**
  3738. * called by device driver when frame received
  3739. * pass frame to network layer
  3740. *
  3741. * info pointer to device instance information
  3742. * buf pointer to buffer contianing frame data
  3743. * size count of data bytes in buf
  3744. */
  3745. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3746. {
  3747. struct sk_buff *skb = dev_alloc_skb(size);
  3748. struct net_device *dev = info->netdev;
  3749. struct net_device_stats *stats = hdlc_stats(dev);
  3750. if (debug_level >= DEBUG_LEVEL_INFO)
  3751. printk("hdlcdev_rx(%s)\n",dev->name);
  3752. if (skb == NULL) {
  3753. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3754. stats->rx_dropped++;
  3755. return;
  3756. }
  3757. memcpy(skb_put(skb, size),buf,size);
  3758. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3759. stats->rx_packets++;
  3760. stats->rx_bytes += size;
  3761. netif_rx(skb);
  3762. info->netdev->last_rx = jiffies;
  3763. }
  3764. /**
  3765. * called by device driver when adding device instance
  3766. * do generic HDLC initialization
  3767. *
  3768. * info pointer to device instance information
  3769. *
  3770. * returns 0 if success, otherwise error code
  3771. */
  3772. static int hdlcdev_init(MGSLPC_INFO *info)
  3773. {
  3774. int rc;
  3775. struct net_device *dev;
  3776. hdlc_device *hdlc;
  3777. /* allocate and initialize network and HDLC layer objects */
  3778. if (!(dev = alloc_hdlcdev(info))) {
  3779. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3780. return -ENOMEM;
  3781. }
  3782. /* for network layer reporting purposes only */
  3783. dev->base_addr = info->io_base;
  3784. dev->irq = info->irq_level;
  3785. /* network layer callbacks and settings */
  3786. dev->do_ioctl = hdlcdev_ioctl;
  3787. dev->open = hdlcdev_open;
  3788. dev->stop = hdlcdev_close;
  3789. dev->tx_timeout = hdlcdev_tx_timeout;
  3790. dev->watchdog_timeo = 10*HZ;
  3791. dev->tx_queue_len = 50;
  3792. /* generic HDLC layer callbacks and settings */
  3793. hdlc = dev_to_hdlc(dev);
  3794. hdlc->attach = hdlcdev_attach;
  3795. hdlc->xmit = hdlcdev_xmit;
  3796. /* register objects with HDLC layer */
  3797. if ((rc = register_hdlc_device(dev))) {
  3798. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3799. free_netdev(dev);
  3800. return rc;
  3801. }
  3802. info->netdev = dev;
  3803. return 0;
  3804. }
  3805. /**
  3806. * called by device driver when removing device instance
  3807. * do generic HDLC cleanup
  3808. *
  3809. * info pointer to device instance information
  3810. */
  3811. static void hdlcdev_exit(MGSLPC_INFO *info)
  3812. {
  3813. unregister_hdlc_device(info->netdev);
  3814. free_netdev(info->netdev);
  3815. info->netdev = NULL;
  3816. }
  3817. #endif /* CONFIG_HDLC */