nmi.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565
  1. /*
  2. * NMI watchdog support on APIC systems
  3. *
  4. * Started by Ingo Molnar <mingo@redhat.com>
  5. *
  6. * Fixes:
  7. * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
  8. * Mikael Pettersson : Power Management for local APIC NMI watchdog.
  9. * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog.
  10. * Pavel Machek and
  11. * Mikael Pettersson : PM converted to driver model. Disable/enable API.
  12. */
  13. #include <asm/apic.h>
  14. #include <linux/nmi.h>
  15. #include <linux/mm.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #include <linux/sysdev.h>
  20. #include <linux/sysctl.h>
  21. #include <linux/percpu.h>
  22. #include <linux/kprobes.h>
  23. #include <linux/cpumask.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/smp.h>
  27. #include <asm/i8259.h>
  28. #include <asm/io_apic.h>
  29. #include <asm/smp.h>
  30. #include <asm/nmi.h>
  31. #include <asm/proto.h>
  32. #include <asm/timer.h>
  33. #include <asm/mce.h>
  34. #include <mach_traps.h>
  35. int unknown_nmi_panic;
  36. int nmi_watchdog_enabled;
  37. static cpumask_t backtrace_mask = CPU_MASK_NONE;
  38. /* nmi_active:
  39. * >0: the lapic NMI watchdog is active, but can be disabled
  40. * <0: the lapic NMI watchdog has not been set up, and cannot
  41. * be enabled
  42. * 0: the lapic NMI watchdog is disabled, but can be enabled
  43. */
  44. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  45. EXPORT_SYMBOL(nmi_active);
  46. unsigned int nmi_watchdog = NMI_NONE;
  47. EXPORT_SYMBOL(nmi_watchdog);
  48. static int panic_on_timeout;
  49. static unsigned int nmi_hz = HZ;
  50. static DEFINE_PER_CPU(short, wd_enabled);
  51. static int endflag __initdata;
  52. static inline unsigned int get_nmi_count(int cpu)
  53. {
  54. #ifdef CONFIG_X86_64
  55. return cpu_pda(cpu)->__nmi_count;
  56. #else
  57. return nmi_count(cpu);
  58. #endif
  59. }
  60. static inline int mce_in_progress(void)
  61. {
  62. #if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
  63. return atomic_read(&mce_entry) > 0;
  64. #endif
  65. return 0;
  66. }
  67. /*
  68. * Take the local apic timer and PIT/HPET into account. We don't
  69. * know which one is active, when we have highres/dyntick on
  70. */
  71. static inline unsigned int get_timer_irqs(int cpu)
  72. {
  73. #ifdef CONFIG_X86_64
  74. return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
  75. #else
  76. return per_cpu(irq_stat, cpu).apic_timer_irqs +
  77. per_cpu(irq_stat, cpu).irq0_irqs;
  78. #endif
  79. }
  80. #ifdef CONFIG_SMP
  81. /*
  82. * The performance counters used by NMI_LOCAL_APIC don't trigger when
  83. * the CPU is idle. To make sure the NMI watchdog really ticks on all
  84. * CPUs during the test make them busy.
  85. */
  86. static __init void nmi_cpu_busy(void *data)
  87. {
  88. local_irq_enable_in_hardirq();
  89. /*
  90. * Intentionally don't use cpu_relax here. This is
  91. * to make sure that the performance counter really ticks,
  92. * even if there is a simulator or similar that catches the
  93. * pause instruction. On a real HT machine this is fine because
  94. * all other CPUs are busy with "useless" delay loops and don't
  95. * care if they get somewhat less cycles.
  96. */
  97. while (endflag == 0)
  98. mb();
  99. }
  100. #endif
  101. static void report_broken_nmi(int cpu, int *prev_nmi_count)
  102. {
  103. printk(KERN_CONT "\n");
  104. printk(KERN_WARNING
  105. "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
  106. cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
  107. printk(KERN_WARNING
  108. "Please report this to bugzilla.kernel.org,\n");
  109. printk(KERN_WARNING
  110. "and attach the output of the 'dmesg' command.\n");
  111. per_cpu(wd_enabled, cpu) = 0;
  112. atomic_dec(&nmi_active);
  113. }
  114. int __init check_nmi_watchdog(void)
  115. {
  116. unsigned int *prev_nmi_count;
  117. int cpu;
  118. if (!nmi_watchdog_active() || !atomic_read(&nmi_active))
  119. return 0;
  120. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
  121. if (!prev_nmi_count)
  122. goto error;
  123. printk(KERN_INFO "Testing NMI watchdog ... ");
  124. #ifdef CONFIG_SMP
  125. if (nmi_watchdog == NMI_LOCAL_APIC)
  126. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
  127. #endif
  128. for_each_possible_cpu(cpu)
  129. prev_nmi_count[cpu] = get_nmi_count(cpu);
  130. local_irq_enable();
  131. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  132. for_each_online_cpu(cpu) {
  133. if (!per_cpu(wd_enabled, cpu))
  134. continue;
  135. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
  136. report_broken_nmi(cpu, prev_nmi_count);
  137. }
  138. endflag = 1;
  139. if (!atomic_read(&nmi_active)) {
  140. kfree(prev_nmi_count);
  141. atomic_set(&nmi_active, -1);
  142. goto error;
  143. }
  144. printk("OK.\n");
  145. /*
  146. * now that we know it works we can reduce NMI frequency to
  147. * something more reasonable; makes a difference in some configs
  148. */
  149. if (nmi_watchdog == NMI_LOCAL_APIC)
  150. nmi_hz = lapic_adjust_nmi_hz(1);
  151. kfree(prev_nmi_count);
  152. return 0;
  153. error:
  154. if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
  155. disable_8259A_irq(0);
  156. #ifdef CONFIG_X86_32
  157. timer_ack = 0;
  158. #endif
  159. return -1;
  160. }
  161. static int __init setup_nmi_watchdog(char *str)
  162. {
  163. unsigned int nmi;
  164. if (!strncmp(str, "panic", 5)) {
  165. panic_on_timeout = 1;
  166. str = strchr(str, ',');
  167. if (!str)
  168. return 1;
  169. ++str;
  170. }
  171. get_option(&str, &nmi);
  172. if (nmi >= NMI_INVALID)
  173. return 0;
  174. nmi_watchdog = nmi;
  175. return 1;
  176. }
  177. __setup("nmi_watchdog=", setup_nmi_watchdog);
  178. /*
  179. * Suspend/resume support
  180. */
  181. #ifdef CONFIG_PM
  182. static int nmi_pm_active; /* nmi_active before suspend */
  183. static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
  184. {
  185. /* only CPU0 goes here, other CPUs should be offline */
  186. nmi_pm_active = atomic_read(&nmi_active);
  187. stop_apic_nmi_watchdog(NULL);
  188. BUG_ON(atomic_read(&nmi_active) != 0);
  189. return 0;
  190. }
  191. static int lapic_nmi_resume(struct sys_device *dev)
  192. {
  193. /* only CPU0 goes here, other CPUs should be offline */
  194. if (nmi_pm_active > 0) {
  195. setup_apic_nmi_watchdog(NULL);
  196. touch_nmi_watchdog();
  197. }
  198. return 0;
  199. }
  200. static struct sysdev_class nmi_sysclass = {
  201. .name = "lapic_nmi",
  202. .resume = lapic_nmi_resume,
  203. .suspend = lapic_nmi_suspend,
  204. };
  205. static struct sys_device device_lapic_nmi = {
  206. .id = 0,
  207. .cls = &nmi_sysclass,
  208. };
  209. static int __init init_lapic_nmi_sysfs(void)
  210. {
  211. int error;
  212. /*
  213. * should really be a BUG_ON but b/c this is an
  214. * init call, it just doesn't work. -dcz
  215. */
  216. if (nmi_watchdog != NMI_LOCAL_APIC)
  217. return 0;
  218. if (atomic_read(&nmi_active) < 0)
  219. return 0;
  220. error = sysdev_class_register(&nmi_sysclass);
  221. if (!error)
  222. error = sysdev_register(&device_lapic_nmi);
  223. return error;
  224. }
  225. /* must come after the local APIC's device_initcall() */
  226. late_initcall(init_lapic_nmi_sysfs);
  227. #endif /* CONFIG_PM */
  228. static void __acpi_nmi_enable(void *__unused)
  229. {
  230. apic_write(APIC_LVT0, APIC_DM_NMI);
  231. }
  232. /*
  233. * Enable timer based NMIs on all CPUs:
  234. */
  235. void acpi_nmi_enable(void)
  236. {
  237. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  238. on_each_cpu(__acpi_nmi_enable, NULL, 1);
  239. }
  240. static void __acpi_nmi_disable(void *__unused)
  241. {
  242. apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
  243. }
  244. /*
  245. * Disable timer based NMIs on all CPUs:
  246. */
  247. void acpi_nmi_disable(void)
  248. {
  249. if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
  250. on_each_cpu(__acpi_nmi_disable, NULL, 1);
  251. }
  252. /*
  253. * This function is called as soon the LAPIC NMI watchdog driver has everything
  254. * in place and it's ready to check if the NMIs belong to the NMI watchdog
  255. */
  256. void cpu_nmi_set_wd_enabled(void)
  257. {
  258. __get_cpu_var(wd_enabled) = 1;
  259. }
  260. void setup_apic_nmi_watchdog(void *unused)
  261. {
  262. if (__get_cpu_var(wd_enabled))
  263. return;
  264. /* cheap hack to support suspend/resume */
  265. /* if cpu0 is not active neither should the other cpus */
  266. if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0)
  267. return;
  268. switch (nmi_watchdog) {
  269. case NMI_LOCAL_APIC:
  270. if (lapic_watchdog_init(nmi_hz) < 0) {
  271. __get_cpu_var(wd_enabled) = 0;
  272. return;
  273. }
  274. /* FALL THROUGH */
  275. case NMI_IO_APIC:
  276. __get_cpu_var(wd_enabled) = 1;
  277. atomic_inc(&nmi_active);
  278. }
  279. }
  280. void stop_apic_nmi_watchdog(void *unused)
  281. {
  282. /* only support LOCAL and IO APICs for now */
  283. if (!nmi_watchdog_active())
  284. return;
  285. if (__get_cpu_var(wd_enabled) == 0)
  286. return;
  287. if (nmi_watchdog == NMI_LOCAL_APIC)
  288. lapic_watchdog_stop();
  289. else
  290. __acpi_nmi_disable(NULL);
  291. __get_cpu_var(wd_enabled) = 0;
  292. atomic_dec(&nmi_active);
  293. }
  294. /*
  295. * the best way to detect whether a CPU has a 'hard lockup' problem
  296. * is to check it's local APIC timer IRQ counts. If they are not
  297. * changing then that CPU has some problem.
  298. *
  299. * as these watchdog NMI IRQs are generated on every CPU, we only
  300. * have to check the current processor.
  301. *
  302. * since NMIs don't listen to _any_ locks, we have to be extremely
  303. * careful not to rely on unsafe variables. The printk might lock
  304. * up though, so we have to break up any console locks first ...
  305. * [when there will be more tty-related locks, break them up here too!]
  306. */
  307. static DEFINE_PER_CPU(unsigned, last_irq_sum);
  308. static DEFINE_PER_CPU(local_t, alert_counter);
  309. static DEFINE_PER_CPU(int, nmi_touch);
  310. void touch_nmi_watchdog(void)
  311. {
  312. if (nmi_watchdog_active()) {
  313. unsigned cpu;
  314. /*
  315. * Tell other CPUs to reset their alert counters. We cannot
  316. * do it ourselves because the alert count increase is not
  317. * atomic.
  318. */
  319. for_each_present_cpu(cpu) {
  320. if (per_cpu(nmi_touch, cpu) != 1)
  321. per_cpu(nmi_touch, cpu) = 1;
  322. }
  323. }
  324. /*
  325. * Tickle the softlockup detector too:
  326. */
  327. touch_softlockup_watchdog();
  328. }
  329. EXPORT_SYMBOL(touch_nmi_watchdog);
  330. notrace __kprobes int
  331. nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
  332. {
  333. /*
  334. * Since current_thread_info()-> is always on the stack, and we
  335. * always switch the stack NMI-atomically, it's safe to use
  336. * smp_processor_id().
  337. */
  338. unsigned int sum;
  339. int touched = 0;
  340. int cpu = smp_processor_id();
  341. int rc = 0;
  342. /* check for other users first */
  343. if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
  344. == NOTIFY_STOP) {
  345. rc = 1;
  346. touched = 1;
  347. }
  348. sum = get_timer_irqs(cpu);
  349. if (__get_cpu_var(nmi_touch)) {
  350. __get_cpu_var(nmi_touch) = 0;
  351. touched = 1;
  352. }
  353. if (cpu_isset(cpu, backtrace_mask)) {
  354. static DEFINE_SPINLOCK(lock); /* Serialise the printks */
  355. spin_lock(&lock);
  356. printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
  357. dump_stack();
  358. spin_unlock(&lock);
  359. cpu_clear(cpu, backtrace_mask);
  360. }
  361. /* Could check oops_in_progress here too, but it's safer not to */
  362. if (mce_in_progress())
  363. touched = 1;
  364. /* if the none of the timers isn't firing, this cpu isn't doing much */
  365. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  366. /*
  367. * Ayiee, looks like this CPU is stuck ...
  368. * wait a few IRQs (5 seconds) before doing the oops ...
  369. */
  370. local_inc(&__get_cpu_var(alert_counter));
  371. if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
  372. /*
  373. * die_nmi will return ONLY if NOTIFY_STOP happens..
  374. */
  375. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  376. regs, panic_on_timeout);
  377. } else {
  378. __get_cpu_var(last_irq_sum) = sum;
  379. local_set(&__get_cpu_var(alert_counter), 0);
  380. }
  381. /* see if the nmi watchdog went off */
  382. if (!__get_cpu_var(wd_enabled))
  383. return rc;
  384. switch (nmi_watchdog) {
  385. case NMI_LOCAL_APIC:
  386. rc |= lapic_wd_event(nmi_hz);
  387. break;
  388. case NMI_IO_APIC:
  389. /*
  390. * don't know how to accurately check for this.
  391. * just assume it was a watchdog timer interrupt
  392. * This matches the old behaviour.
  393. */
  394. rc = 1;
  395. break;
  396. }
  397. return rc;
  398. }
  399. #ifdef CONFIG_SYSCTL
  400. static void enable_ioapic_nmi_watchdog_single(void *unused)
  401. {
  402. __get_cpu_var(wd_enabled) = 1;
  403. atomic_inc(&nmi_active);
  404. __acpi_nmi_enable(NULL);
  405. }
  406. static void enable_ioapic_nmi_watchdog(void)
  407. {
  408. on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
  409. touch_nmi_watchdog();
  410. }
  411. static void disable_ioapic_nmi_watchdog(void)
  412. {
  413. on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
  414. }
  415. static int __init setup_unknown_nmi_panic(char *str)
  416. {
  417. unknown_nmi_panic = 1;
  418. return 1;
  419. }
  420. __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
  421. static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
  422. {
  423. unsigned char reason = get_nmi_reason();
  424. char buf[64];
  425. sprintf(buf, "NMI received for unknown reason %02x\n", reason);
  426. die_nmi(buf, regs, 1); /* Always panic here */
  427. return 0;
  428. }
  429. /*
  430. * proc handler for /proc/sys/kernel/nmi
  431. */
  432. int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
  433. void __user *buffer, size_t *length, loff_t *ppos)
  434. {
  435. int old_state;
  436. nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
  437. old_state = nmi_watchdog_enabled;
  438. proc_dointvec(table, write, file, buffer, length, ppos);
  439. if (!!old_state == !!nmi_watchdog_enabled)
  440. return 0;
  441. if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) {
  442. printk(KERN_WARNING
  443. "NMI watchdog is permanently disabled\n");
  444. return -EIO;
  445. }
  446. if (nmi_watchdog == NMI_LOCAL_APIC) {
  447. if (nmi_watchdog_enabled)
  448. enable_lapic_nmi_watchdog();
  449. else
  450. disable_lapic_nmi_watchdog();
  451. } else if (nmi_watchdog == NMI_IO_APIC) {
  452. if (nmi_watchdog_enabled)
  453. enable_ioapic_nmi_watchdog();
  454. else
  455. disable_ioapic_nmi_watchdog();
  456. } else {
  457. printk(KERN_WARNING
  458. "NMI watchdog doesn't know what hardware to touch\n");
  459. return -EIO;
  460. }
  461. return 0;
  462. }
  463. #endif /* CONFIG_SYSCTL */
  464. int do_nmi_callback(struct pt_regs *regs, int cpu)
  465. {
  466. #ifdef CONFIG_SYSCTL
  467. if (unknown_nmi_panic)
  468. return unknown_nmi_panic_callback(regs, cpu);
  469. #endif
  470. return 0;
  471. }
  472. void __trigger_all_cpu_backtrace(void)
  473. {
  474. int i;
  475. backtrace_mask = cpu_online_map;
  476. /* Wait for up to 10 seconds for all CPUs to do the backtrace */
  477. for (i = 0; i < 10 * 1000; i++) {
  478. if (cpus_empty(backtrace_mask))
  479. break;
  480. mdelay(1);
  481. }
  482. }