xonar_cs43xx.c 10 KB

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  1. /*
  2. * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar D1/DX
  20. * -----------
  21. *
  22. * CMI8788:
  23. *
  24. * I²C <-> CS4398 (front)
  25. * <-> CS4362A (surround, center/LFE, back)
  26. *
  27. * GPI 0 <- external power present (DX only)
  28. *
  29. * GPIO 0 -> enable output to speakers
  30. * GPIO 1 -> enable front panel I/O
  31. * GPIO 2 -> M0 of CS5361
  32. * GPIO 3 -> M1 of CS5361
  33. * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
  34. *
  35. * CS4398:
  36. *
  37. * AD0 <- 1
  38. * AD1 <- 1
  39. *
  40. * CS4362A:
  41. *
  42. * AD0 <- 0
  43. *
  44. * CM9780:
  45. *
  46. * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
  47. */
  48. #include <linux/pci.h>
  49. #include <linux/delay.h>
  50. #include <sound/ac97_codec.h>
  51. #include <sound/control.h>
  52. #include <sound/core.h>
  53. #include <sound/pcm.h>
  54. #include <sound/pcm_params.h>
  55. #include <sound/tlv.h>
  56. #include "xonar.h"
  57. #include "cs4398.h"
  58. #include "cs4362a.h"
  59. #define GPI_EXT_POWER 0x01
  60. #define GPIO_D1_OUTPUT_ENABLE 0x0001
  61. #define GPIO_D1_FRONT_PANEL 0x0002
  62. #define GPIO_D1_INPUT_ROUTE 0x0100
  63. #define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
  64. #define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
  65. struct xonar_cs43xx {
  66. struct xonar_generic generic;
  67. u8 cs4398_regs[7];
  68. u8 cs4362a_regs[15];
  69. };
  70. static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
  71. {
  72. struct xonar_cs43xx *data = chip->model_data;
  73. oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
  74. if (reg < ARRAY_SIZE(data->cs4398_regs))
  75. data->cs4398_regs[reg] = value;
  76. }
  77. static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
  78. {
  79. struct xonar_cs43xx *data = chip->model_data;
  80. if (value != data->cs4398_regs[reg])
  81. cs4398_write(chip, reg, value);
  82. }
  83. static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
  84. {
  85. struct xonar_cs43xx *data = chip->model_data;
  86. oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
  87. if (reg < ARRAY_SIZE(data->cs4362a_regs))
  88. data->cs4362a_regs[reg] = value;
  89. }
  90. static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
  91. {
  92. struct xonar_cs43xx *data = chip->model_data;
  93. if (value != data->cs4362a_regs[reg])
  94. cs4362a_write(chip, reg, value);
  95. }
  96. static void cs43xx_registers_init(struct oxygen *chip)
  97. {
  98. struct xonar_cs43xx *data = chip->model_data;
  99. unsigned int i;
  100. /* set CPEN (control port mode) and power down */
  101. cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
  102. cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
  103. /* configure */
  104. cs4398_write(chip, 2, data->cs4398_regs[2]);
  105. cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
  106. cs4398_write(chip, 4, data->cs4398_regs[4]);
  107. cs4398_write(chip, 5, data->cs4398_regs[5]);
  108. cs4398_write(chip, 6, data->cs4398_regs[6]);
  109. cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
  110. CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
  111. cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
  112. cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
  113. CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
  114. cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
  115. cs4362a_write(chip, 0x05, 0);
  116. for (i = 6; i <= 14; ++i)
  117. cs4362a_write(chip, i, data->cs4362a_regs[i]);
  118. /* clear power down */
  119. cs4398_write(chip, 8, CS4398_CPEN);
  120. cs4362a_write(chip, 0x01, CS4362A_CPEN);
  121. }
  122. static void xonar_d1_init(struct oxygen *chip)
  123. {
  124. struct xonar_cs43xx *data = chip->model_data;
  125. data->generic.anti_pop_delay = 800;
  126. data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
  127. data->cs4398_regs[2] =
  128. CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
  129. data->cs4398_regs[4] = CS4398_MUTEP_LOW |
  130. CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
  131. data->cs4398_regs[5] = 60 * 2;
  132. data->cs4398_regs[6] = 60 * 2;
  133. data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
  134. CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
  135. data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
  136. data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
  137. data->cs4362a_regs[9] = data->cs4362a_regs[6];
  138. data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
  139. data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
  140. data->cs4362a_regs[12] = data->cs4362a_regs[6];
  141. data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
  142. data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
  143. oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
  144. OXYGEN_2WIRE_LENGTH_8 |
  145. OXYGEN_2WIRE_INTERRUPT_MASK |
  146. OXYGEN_2WIRE_SPEED_FAST);
  147. cs43xx_registers_init(chip);
  148. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  149. GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
  150. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
  151. GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
  152. xonar_init_cs53x1(chip);
  153. xonar_enable_output(chip);
  154. snd_component_add(chip->card, "CS4398");
  155. snd_component_add(chip->card, "CS4362A");
  156. snd_component_add(chip->card, "CS5361");
  157. }
  158. static void xonar_dx_init(struct oxygen *chip)
  159. {
  160. struct xonar_cs43xx *data = chip->model_data;
  161. data->generic.ext_power_reg = OXYGEN_GPI_DATA;
  162. data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
  163. data->generic.ext_power_bit = GPI_EXT_POWER;
  164. xonar_init_ext_power(chip);
  165. xonar_d1_init(chip);
  166. }
  167. static void xonar_d1_cleanup(struct oxygen *chip)
  168. {
  169. xonar_disable_output(chip);
  170. cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
  171. oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
  172. }
  173. static void xonar_d1_suspend(struct oxygen *chip)
  174. {
  175. xonar_d1_cleanup(chip);
  176. }
  177. static void xonar_d1_resume(struct oxygen *chip)
  178. {
  179. oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
  180. msleep(1);
  181. cs43xx_registers_init(chip);
  182. xonar_enable_output(chip);
  183. }
  184. static void set_cs43xx_params(struct oxygen *chip,
  185. struct snd_pcm_hw_params *params)
  186. {
  187. struct xonar_cs43xx *data = chip->model_data;
  188. u8 cs4398_fm, cs4362a_fm;
  189. if (params_rate(params) <= 50000) {
  190. cs4398_fm = CS4398_FM_SINGLE;
  191. cs4362a_fm = CS4362A_FM_SINGLE;
  192. } else if (params_rate(params) <= 100000) {
  193. cs4398_fm = CS4398_FM_DOUBLE;
  194. cs4362a_fm = CS4362A_FM_DOUBLE;
  195. } else {
  196. cs4398_fm = CS4398_FM_QUAD;
  197. cs4362a_fm = CS4362A_FM_QUAD;
  198. }
  199. cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
  200. cs4398_write_cached(chip, 2, cs4398_fm);
  201. cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
  202. cs4362a_write_cached(chip, 6, cs4362a_fm);
  203. cs4362a_write_cached(chip, 12, cs4362a_fm);
  204. cs4362a_fm &= CS4362A_FM_MASK;
  205. cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
  206. cs4362a_write_cached(chip, 9, cs4362a_fm);
  207. }
  208. static void update_cs4362a_volumes(struct oxygen *chip)
  209. {
  210. unsigned int i;
  211. u8 mute;
  212. mute = chip->dac_mute ? CS4362A_MUTE : 0;
  213. for (i = 0; i < 6; ++i)
  214. cs4362a_write_cached(chip, 7 + i + i / 2,
  215. (127 - chip->dac_volume[2 + i]) | mute);
  216. }
  217. static void update_cs43xx_volume(struct oxygen *chip)
  218. {
  219. cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
  220. cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
  221. update_cs4362a_volumes(chip);
  222. }
  223. static void update_cs43xx_mute(struct oxygen *chip)
  224. {
  225. u8 reg;
  226. reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
  227. if (chip->dac_mute)
  228. reg |= CS4398_MUTE_B | CS4398_MUTE_A;
  229. cs4398_write_cached(chip, 4, reg);
  230. update_cs4362a_volumes(chip);
  231. }
  232. static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
  233. {
  234. struct xonar_cs43xx *data = chip->model_data;
  235. u8 reg;
  236. reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
  237. if (mixed)
  238. reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
  239. else
  240. reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
  241. cs4362a_write_cached(chip, 9, reg);
  242. }
  243. static const struct snd_kcontrol_new front_panel_switch = {
  244. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  245. .name = "Front Panel Switch",
  246. .info = snd_ctl_boolean_mono_info,
  247. .get = xonar_gpio_bit_switch_get,
  248. .put = xonar_gpio_bit_switch_put,
  249. .private_value = GPIO_D1_FRONT_PANEL,
  250. };
  251. static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
  252. unsigned int reg, unsigned int mute)
  253. {
  254. if (reg == AC97_LINE) {
  255. spin_lock_irq(&chip->reg_lock);
  256. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  257. mute ? GPIO_D1_INPUT_ROUTE : 0,
  258. GPIO_D1_INPUT_ROUTE);
  259. spin_unlock_irq(&chip->reg_lock);
  260. }
  261. }
  262. static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
  263. static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
  264. {
  265. if (!strncmp(template->name, "CD Capture ", 11))
  266. return 1; /* no CD input */
  267. return 0;
  268. }
  269. static int xonar_d1_mixer_init(struct oxygen *chip)
  270. {
  271. return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
  272. }
  273. static const struct oxygen_model model_xonar_d1 = {
  274. .longname = "Asus Virtuoso 100",
  275. .chip = "AV200",
  276. .init = xonar_d1_init,
  277. .control_filter = xonar_d1_control_filter,
  278. .mixer_init = xonar_d1_mixer_init,
  279. .cleanup = xonar_d1_cleanup,
  280. .suspend = xonar_d1_suspend,
  281. .resume = xonar_d1_resume,
  282. .set_dac_params = set_cs43xx_params,
  283. .set_adc_params = xonar_set_cs53x1_params,
  284. .update_dac_volume = update_cs43xx_volume,
  285. .update_dac_mute = update_cs43xx_mute,
  286. .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
  287. .ac97_switch = xonar_d1_line_mic_ac97_switch,
  288. .dac_tlv = cs4362a_db_scale,
  289. .model_data_size = sizeof(struct xonar_cs43xx),
  290. .device_config = PLAYBACK_0_TO_I2S |
  291. PLAYBACK_1_TO_SPDIF |
  292. CAPTURE_0_FROM_I2S_2,
  293. .dac_channels = 8,
  294. .dac_volume_min = 127 - 60,
  295. .dac_volume_max = 127,
  296. .function_flags = OXYGEN_FUNCTION_2WIRE,
  297. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  298. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  299. };
  300. int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
  301. const struct pci_device_id *id)
  302. {
  303. switch (id->subdevice) {
  304. case 0x834f:
  305. chip->model = model_xonar_d1;
  306. chip->model.shortname = "Xonar D1";
  307. break;
  308. case 0x8275:
  309. case 0x8327:
  310. chip->model = model_xonar_d1;
  311. chip->model.shortname = "Xonar DX";
  312. chip->model.init = xonar_dx_init;
  313. break;
  314. default:
  315. return -EINVAL;
  316. }
  317. return 0;
  318. }