patch_sigmatel.c 114 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include <sound/tlv.h>
  35. #include "hda_codec.h"
  36. #include "hda_local.h"
  37. #include "hda_auto_parser.h"
  38. #include "hda_beep.h"
  39. #include "hda_jack.h"
  40. #include "hda_generic.h"
  41. enum {
  42. STAC_VREF_EVENT = 8,
  43. STAC_PWR_EVENT,
  44. };
  45. enum {
  46. STAC_REF,
  47. STAC_9200_OQO,
  48. STAC_9200_DELL_D21,
  49. STAC_9200_DELL_D22,
  50. STAC_9200_DELL_D23,
  51. STAC_9200_DELL_M21,
  52. STAC_9200_DELL_M22,
  53. STAC_9200_DELL_M23,
  54. STAC_9200_DELL_M24,
  55. STAC_9200_DELL_M25,
  56. STAC_9200_DELL_M26,
  57. STAC_9200_DELL_M27,
  58. STAC_9200_M4,
  59. STAC_9200_M4_2,
  60. STAC_9200_PANASONIC,
  61. STAC_9200_EAPD_INIT,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_REF,
  66. STAC_9205_DELL_M42,
  67. STAC_9205_DELL_M43,
  68. STAC_9205_DELL_M44,
  69. STAC_9205_EAPD,
  70. STAC_9205_MODELS
  71. };
  72. enum {
  73. STAC_92HD73XX_NO_JD, /* no jack-detection */
  74. STAC_92HD73XX_REF,
  75. STAC_92HD73XX_INTEL,
  76. STAC_DELL_M6_AMIC,
  77. STAC_DELL_M6_DMIC,
  78. STAC_DELL_M6_BOTH,
  79. STAC_DELL_EQ,
  80. STAC_ALIENWARE_M17X,
  81. STAC_92HD73XX_MODELS
  82. };
  83. enum {
  84. STAC_92HD83XXX_REF,
  85. STAC_92HD83XXX_PWR_REF,
  86. STAC_DELL_S14,
  87. STAC_DELL_VOSTRO_3500,
  88. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  89. STAC_HP_DV7_4000,
  90. STAC_HP_ZEPHYR,
  91. STAC_92HD83XXX_HP_LED,
  92. STAC_92HD83XXX_HP_INV_LED,
  93. STAC_92HD83XXX_HP_MIC_LED,
  94. STAC_92HD83XXX_HEADSET_JACK,
  95. STAC_92HD83XXX_HP,
  96. STAC_HP_ENVY_BASS,
  97. STAC_92HD83XXX_MODELS
  98. };
  99. enum {
  100. STAC_92HD71BXX_REF,
  101. STAC_DELL_M4_1,
  102. STAC_DELL_M4_2,
  103. STAC_DELL_M4_3,
  104. STAC_HP_M4,
  105. STAC_HP_DV4,
  106. STAC_HP_DV5,
  107. STAC_HP_HDX,
  108. STAC_92HD71BXX_HP,
  109. STAC_92HD71BXX_NO_DMIC,
  110. STAC_92HD71BXX_NO_SMUX,
  111. STAC_92HD71BXX_MODELS
  112. };
  113. enum {
  114. STAC_925x_REF,
  115. STAC_M1,
  116. STAC_M1_2,
  117. STAC_M2,
  118. STAC_M2_2,
  119. STAC_M3,
  120. STAC_M5,
  121. STAC_M6,
  122. STAC_925x_MODELS
  123. };
  124. enum {
  125. STAC_D945_REF,
  126. STAC_D945GTP3,
  127. STAC_D945GTP5,
  128. STAC_INTEL_MAC_V1,
  129. STAC_INTEL_MAC_V2,
  130. STAC_INTEL_MAC_V3,
  131. STAC_INTEL_MAC_V4,
  132. STAC_INTEL_MAC_V5,
  133. STAC_INTEL_MAC_AUTO,
  134. STAC_ECS_202,
  135. STAC_922X_DELL_D81,
  136. STAC_922X_DELL_D82,
  137. STAC_922X_DELL_M81,
  138. STAC_922X_DELL_M82,
  139. STAC_922X_INTEL_MAC_GPIO,
  140. STAC_922X_MODELS
  141. };
  142. enum {
  143. STAC_D965_REF_NO_JD, /* no jack-detection */
  144. STAC_D965_REF,
  145. STAC_D965_3ST,
  146. STAC_D965_5ST,
  147. STAC_D965_5ST_NO_FP,
  148. STAC_D965_VERBS,
  149. STAC_DELL_3ST,
  150. STAC_DELL_BIOS,
  151. STAC_DELL_BIOS_SPDIF,
  152. STAC_927X_DELL_DMIC,
  153. STAC_927X_VOLKNOB,
  154. STAC_927X_MODELS
  155. };
  156. enum {
  157. STAC_9872_VAIO,
  158. STAC_9872_MODELS
  159. };
  160. struct sigmatel_spec {
  161. struct hda_gen_spec gen;
  162. unsigned int eapd_switch: 1;
  163. unsigned int linear_tone_beep:1;
  164. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  165. unsigned int volknob_init:1; /* special volume-knob initialization */
  166. unsigned int powerdown_adcs:1;
  167. /* gpio lines */
  168. unsigned int eapd_mask;
  169. unsigned int gpio_mask;
  170. unsigned int gpio_dir;
  171. unsigned int gpio_data;
  172. unsigned int gpio_mute;
  173. unsigned int gpio_led;
  174. unsigned int gpio_led_polarity;
  175. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  176. unsigned int vref_led;
  177. int default_polarity;
  178. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  179. bool mic_mute_led_on; /* current mic mute state */
  180. /* stream */
  181. unsigned int stream_delay;
  182. /* analog loopback */
  183. const struct snd_kcontrol_new *aloopback_ctl;
  184. unsigned int aloopback;
  185. unsigned char aloopback_mask;
  186. unsigned char aloopback_shift;
  187. /* power management */
  188. unsigned int power_map_bits;
  189. unsigned int num_pwrs;
  190. const hda_nid_t *pwr_nids;
  191. unsigned int active_adcs;
  192. /* beep widgets */
  193. hda_nid_t anabeep_nid;
  194. hda_nid_t digbeep_nid;
  195. };
  196. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  197. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  198. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  199. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  200. 0x0f, 0x10, 0x11
  201. };
  202. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  203. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  204. 0x0f, 0x10
  205. };
  206. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  207. 0x0a, 0x0d, 0x0f
  208. };
  209. /*
  210. * PCM hooks
  211. */
  212. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  213. struct hda_codec *codec,
  214. struct snd_pcm_substream *substream,
  215. int action)
  216. {
  217. struct sigmatel_spec *spec = codec->spec;
  218. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  219. msleep(spec->stream_delay);
  220. }
  221. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  222. struct hda_codec *codec,
  223. struct snd_pcm_substream *substream,
  224. int action)
  225. {
  226. struct sigmatel_spec *spec = codec->spec;
  227. int i, idx = 0;
  228. if (!spec->powerdown_adcs)
  229. return;
  230. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  231. if (spec->gen.all_adcs[i] == hinfo->nid) {
  232. idx = i;
  233. break;
  234. }
  235. }
  236. switch (action) {
  237. case HDA_GEN_PCM_ACT_OPEN:
  238. msleep(40);
  239. snd_hda_codec_write(codec, hinfo->nid, 0,
  240. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  241. spec->active_adcs |= (1 << idx);
  242. break;
  243. case HDA_GEN_PCM_ACT_CLOSE:
  244. snd_hda_codec_write(codec, hinfo->nid, 0,
  245. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  246. spec->active_adcs &= ~(1 << idx);
  247. break;
  248. }
  249. }
  250. /*
  251. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  252. * funky external mute control using GPIO pins.
  253. */
  254. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  255. unsigned int dir_mask, unsigned int data)
  256. {
  257. unsigned int gpiostate, gpiomask, gpiodir;
  258. snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  259. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  260. AC_VERB_GET_GPIO_DATA, 0);
  261. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  262. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  263. AC_VERB_GET_GPIO_MASK, 0);
  264. gpiomask |= mask;
  265. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  266. AC_VERB_GET_GPIO_DIRECTION, 0);
  267. gpiodir |= dir_mask;
  268. /* Configure GPIOx as CMOS */
  269. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  270. snd_hda_codec_write(codec, codec->afg, 0,
  271. AC_VERB_SET_GPIO_MASK, gpiomask);
  272. snd_hda_codec_read(codec, codec->afg, 0,
  273. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  274. msleep(1);
  275. snd_hda_codec_read(codec, codec->afg, 0,
  276. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  277. }
  278. /* hook for controlling mic-mute LED GPIO */
  279. static void stac_capture_led_hook(struct hda_codec *codec,
  280. struct snd_ctl_elem_value *ucontrol)
  281. {
  282. struct sigmatel_spec *spec = codec->spec;
  283. bool mute;
  284. if (!ucontrol)
  285. return;
  286. mute = !(ucontrol->value.integer.value[0] ||
  287. ucontrol->value.integer.value[1]);
  288. if (spec->mic_mute_led_on != mute) {
  289. spec->mic_mute_led_on = mute;
  290. if (mute)
  291. spec->gpio_data |= spec->mic_mute_led_gpio;
  292. else
  293. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  294. stac_gpio_set(codec, spec->gpio_mask,
  295. spec->gpio_dir, spec->gpio_data);
  296. }
  297. }
  298. static int stac_vrefout_set(struct hda_codec *codec,
  299. hda_nid_t nid, unsigned int new_vref)
  300. {
  301. int error, pinctl;
  302. snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
  303. pinctl = snd_hda_codec_read(codec, nid, 0,
  304. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  305. if (pinctl < 0)
  306. return pinctl;
  307. pinctl &= 0xff;
  308. pinctl &= ~AC_PINCTL_VREFEN;
  309. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  310. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  311. if (error < 0)
  312. return error;
  313. return 1;
  314. }
  315. /* update mute-LED accoring to the master switch */
  316. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  317. {
  318. struct sigmatel_spec *spec = codec->spec;
  319. int muted = !enabled;
  320. if (!spec->gpio_led)
  321. return;
  322. /* LED state is inverted on these systems */
  323. if (spec->gpio_led_polarity)
  324. muted = !muted;
  325. if (!spec->vref_mute_led_nid) {
  326. if (muted)
  327. spec->gpio_data |= spec->gpio_led;
  328. else
  329. spec->gpio_data &= ~spec->gpio_led;
  330. stac_gpio_set(codec, spec->gpio_mask,
  331. spec->gpio_dir, spec->gpio_data);
  332. } else {
  333. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  334. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  335. spec->vref_led);
  336. }
  337. }
  338. /* vmaster hook to update mute LED */
  339. static void stac_vmaster_hook(void *private_data, int val)
  340. {
  341. stac_update_led_status(private_data, val);
  342. }
  343. /* automute hook to handle GPIO mute and EAPD updates */
  344. static void stac_update_outputs(struct hda_codec *codec)
  345. {
  346. struct sigmatel_spec *spec = codec->spec;
  347. if (spec->gpio_mute)
  348. spec->gen.master_mute =
  349. !(snd_hda_codec_read(codec, codec->afg, 0,
  350. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  351. snd_hda_gen_update_outputs(codec);
  352. if (spec->eapd_mask && spec->eapd_switch) {
  353. unsigned int val = spec->gpio_data;
  354. if (spec->gen.speaker_muted)
  355. val &= ~spec->eapd_mask;
  356. else
  357. val |= spec->eapd_mask;
  358. if (spec->gpio_data != val)
  359. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  360. val);
  361. }
  362. }
  363. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  364. bool enable, bool do_write)
  365. {
  366. struct sigmatel_spec *spec = codec->spec;
  367. unsigned int idx, val;
  368. for (idx = 0; idx < spec->num_pwrs; idx++) {
  369. if (spec->pwr_nids[idx] == nid)
  370. break;
  371. }
  372. if (idx >= spec->num_pwrs)
  373. return;
  374. idx = 1 << idx;
  375. val = spec->power_map_bits;
  376. if (enable)
  377. val &= ~idx;
  378. else
  379. val |= idx;
  380. /* power down unused output ports */
  381. if (val != spec->power_map_bits) {
  382. spec->power_map_bits = val;
  383. if (do_write)
  384. snd_hda_codec_write(codec, codec->afg, 0,
  385. AC_VERB_IDT_SET_POWER_MAP, val);
  386. }
  387. }
  388. /* update power bit per jack plug/unplug */
  389. static void jack_update_power(struct hda_codec *codec,
  390. struct hda_jack_tbl *jack)
  391. {
  392. struct sigmatel_spec *spec = codec->spec;
  393. int i;
  394. if (!spec->num_pwrs)
  395. return;
  396. if (jack && jack->nid) {
  397. stac_toggle_power_map(codec, jack->nid,
  398. snd_hda_jack_detect(codec, jack->nid),
  399. true);
  400. return;
  401. }
  402. /* update all jacks */
  403. for (i = 0; i < spec->num_pwrs; i++) {
  404. hda_nid_t nid = spec->pwr_nids[i];
  405. jack = snd_hda_jack_tbl_get(codec, nid);
  406. if (!jack || !jack->action)
  407. continue;
  408. if (jack->action == STAC_PWR_EVENT ||
  409. jack->action <= HDA_GEN_LAST_EVENT)
  410. stac_toggle_power_map(codec, nid,
  411. snd_hda_jack_detect(codec, nid),
  412. false);
  413. }
  414. snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
  415. spec->power_map_bits);
  416. }
  417. static void stac_hp_automute(struct hda_codec *codec,
  418. struct hda_jack_tbl *jack)
  419. {
  420. snd_hda_gen_hp_automute(codec, jack);
  421. jack_update_power(codec, jack);
  422. }
  423. static void stac_line_automute(struct hda_codec *codec,
  424. struct hda_jack_tbl *jack)
  425. {
  426. snd_hda_gen_line_automute(codec, jack);
  427. jack_update_power(codec, jack);
  428. }
  429. static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
  430. {
  431. unsigned int data;
  432. data = snd_hda_codec_read(codec, codec->afg, 0,
  433. AC_VERB_GET_GPIO_DATA, 0);
  434. /* toggle VREF state based on GPIOx status */
  435. snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
  436. !!(data & (1 << event->private_data)));
  437. }
  438. /* initialize the power map and enable the power event to jacks that
  439. * haven't been assigned to automute
  440. */
  441. static void stac_init_power_map(struct hda_codec *codec)
  442. {
  443. struct sigmatel_spec *spec = codec->spec;
  444. int i;
  445. for (i = 0; i < spec->num_pwrs; i++) {
  446. hda_nid_t nid = spec->pwr_nids[i];
  447. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  448. def_conf = get_defcfg_connect(def_conf);
  449. if (snd_hda_jack_tbl_get(codec, nid))
  450. continue;
  451. if (def_conf == AC_JACK_PORT_COMPLEX &&
  452. !(spec->vref_mute_led_nid == nid ||
  453. is_jack_detectable(codec, nid))) {
  454. snd_hda_jack_detect_enable_callback(codec, nid,
  455. STAC_PWR_EVENT,
  456. jack_update_power);
  457. } else {
  458. if (def_conf == AC_JACK_PORT_NONE)
  459. stac_toggle_power_map(codec, nid, false, false);
  460. else
  461. stac_toggle_power_map(codec, nid, true, false);
  462. }
  463. }
  464. }
  465. /*
  466. */
  467. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  468. int *valp)
  469. {
  470. return !snd_hda_get_int_hint(codec, key, valp);
  471. }
  472. /* override some hints from the hwdep entry */
  473. static void stac_store_hints(struct hda_codec *codec)
  474. {
  475. struct sigmatel_spec *spec = codec->spec;
  476. int val;
  477. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  478. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  479. spec->gpio_mask;
  480. }
  481. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  482. spec->gpio_mask &= spec->gpio_mask;
  483. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  484. spec->gpio_dir &= spec->gpio_mask;
  485. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  486. spec->eapd_mask &= spec->gpio_mask;
  487. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  488. spec->gpio_mute &= spec->gpio_mask;
  489. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  490. if (val >= 0)
  491. spec->eapd_switch = val;
  492. }
  493. /*
  494. * loopback controls
  495. */
  496. #define stac_aloopback_info snd_ctl_boolean_mono_info
  497. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  498. struct snd_ctl_elem_value *ucontrol)
  499. {
  500. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  501. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  502. struct sigmatel_spec *spec = codec->spec;
  503. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  504. (spec->aloopback_mask << idx));
  505. return 0;
  506. }
  507. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  508. struct snd_ctl_elem_value *ucontrol)
  509. {
  510. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  511. struct sigmatel_spec *spec = codec->spec;
  512. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  513. unsigned int dac_mode;
  514. unsigned int val, idx_val;
  515. idx_val = spec->aloopback_mask << idx;
  516. if (ucontrol->value.integer.value[0])
  517. val = spec->aloopback | idx_val;
  518. else
  519. val = spec->aloopback & ~idx_val;
  520. if (spec->aloopback == val)
  521. return 0;
  522. spec->aloopback = val;
  523. /* Only return the bits defined by the shift value of the
  524. * first two bytes of the mask
  525. */
  526. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  527. kcontrol->private_value & 0xFFFF, 0x0);
  528. dac_mode >>= spec->aloopback_shift;
  529. if (spec->aloopback & idx_val) {
  530. snd_hda_power_up(codec);
  531. dac_mode |= idx_val;
  532. } else {
  533. snd_hda_power_down(codec);
  534. dac_mode &= ~idx_val;
  535. }
  536. snd_hda_codec_write_cache(codec, codec->afg, 0,
  537. kcontrol->private_value >> 16, dac_mode);
  538. return 1;
  539. }
  540. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  541. { \
  542. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  543. .name = "Analog Loopback", \
  544. .count = cnt, \
  545. .info = stac_aloopback_info, \
  546. .get = stac_aloopback_get, \
  547. .put = stac_aloopback_put, \
  548. .private_value = verb_read | (verb_write << 16), \
  549. }
  550. /*
  551. * Mute LED handling on HP laptops
  552. */
  553. /* check whether it's a HP laptop with a docking port */
  554. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  555. {
  556. if (codec->vendor_id != 0x111d7605 &&
  557. codec->vendor_id != 0x111d76d1)
  558. return false;
  559. switch (codec->subsystem_id) {
  560. case 0x103c1618:
  561. case 0x103c1619:
  562. case 0x103c161a:
  563. case 0x103c161b:
  564. case 0x103c161c:
  565. case 0x103c161d:
  566. case 0x103c161e:
  567. case 0x103c161f:
  568. case 0x103c162a:
  569. case 0x103c162b:
  570. case 0x103c1630:
  571. case 0x103c1631:
  572. case 0x103c1633:
  573. case 0x103c1634:
  574. case 0x103c1635:
  575. case 0x103c3587:
  576. case 0x103c3588:
  577. case 0x103c3589:
  578. case 0x103c358a:
  579. case 0x103c3667:
  580. case 0x103c3668:
  581. case 0x103c3669:
  582. return true;
  583. }
  584. return false;
  585. }
  586. static bool hp_blike_system(u32 subsystem_id)
  587. {
  588. switch (subsystem_id) {
  589. case 0x103c1520:
  590. case 0x103c1521:
  591. case 0x103c1523:
  592. case 0x103c1524:
  593. case 0x103c1525:
  594. case 0x103c1722:
  595. case 0x103c1723:
  596. case 0x103c1724:
  597. case 0x103c1725:
  598. case 0x103c1726:
  599. case 0x103c1727:
  600. case 0x103c1728:
  601. case 0x103c1729:
  602. case 0x103c172a:
  603. case 0x103c172b:
  604. case 0x103c307e:
  605. case 0x103c307f:
  606. case 0x103c3080:
  607. case 0x103c3081:
  608. case 0x103c7007:
  609. case 0x103c7008:
  610. return true;
  611. }
  612. return false;
  613. }
  614. static void set_hp_led_gpio(struct hda_codec *codec)
  615. {
  616. struct sigmatel_spec *spec = codec->spec;
  617. unsigned int gpio;
  618. if (spec->gpio_led)
  619. return;
  620. gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
  621. gpio &= AC_GPIO_IO_COUNT;
  622. if (gpio > 3)
  623. spec->gpio_led = 0x08; /* GPIO 3 */
  624. else
  625. spec->gpio_led = 0x01; /* GPIO 0 */
  626. }
  627. /*
  628. * This method searches for the mute LED GPIO configuration
  629. * provided as OEM string in SMBIOS. The format of that string
  630. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  631. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  632. * that corresponds to the NOT muted state of the master volume
  633. * and G is the index of the GPIO to use as the mute LED control (0..9)
  634. * If _G portion is missing it is assigned based on the codec ID
  635. *
  636. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  637. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  638. *
  639. *
  640. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  641. * SMBIOS - at least the ones I have seen do not have them - which include
  642. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  643. * HP Pavilion dv9500t CTO.
  644. * Need more information on whether it is true across the entire series.
  645. * -- kunal
  646. */
  647. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  648. {
  649. struct sigmatel_spec *spec = codec->spec;
  650. const struct dmi_device *dev = NULL;
  651. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  652. get_int_hint(codec, "gpio_led_polarity",
  653. &spec->gpio_led_polarity);
  654. return 1;
  655. }
  656. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  657. if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
  658. &spec->gpio_led_polarity,
  659. &spec->gpio_led) == 2) {
  660. unsigned int max_gpio;
  661. max_gpio = snd_hda_param_read(codec, codec->afg,
  662. AC_PAR_GPIO_CAP);
  663. max_gpio &= AC_GPIO_IO_COUNT;
  664. if (spec->gpio_led < max_gpio)
  665. spec->gpio_led = 1 << spec->gpio_led;
  666. else
  667. spec->vref_mute_led_nid = spec->gpio_led;
  668. return 1;
  669. }
  670. if (sscanf(dev->name, "HP_Mute_LED_%d",
  671. &spec->gpio_led_polarity) == 1) {
  672. set_hp_led_gpio(codec);
  673. return 1;
  674. }
  675. /* BIOS bug: unfilled OEM string */
  676. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  677. set_hp_led_gpio(codec);
  678. if (default_polarity >= 0)
  679. spec->gpio_led_polarity = default_polarity;
  680. else
  681. spec->gpio_led_polarity = 1;
  682. return 1;
  683. }
  684. }
  685. /*
  686. * Fallback case - if we don't find the DMI strings,
  687. * we statically set the GPIO - if not a B-series system
  688. * and default polarity is provided
  689. */
  690. if (!hp_blike_system(codec->subsystem_id) &&
  691. (default_polarity == 0 || default_polarity == 1)) {
  692. set_hp_led_gpio(codec);
  693. spec->gpio_led_polarity = default_polarity;
  694. return 1;
  695. }
  696. return 0;
  697. }
  698. /*
  699. * PC beep controls
  700. */
  701. /* create PC beep volume controls */
  702. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  703. hda_nid_t nid)
  704. {
  705. struct sigmatel_spec *spec = codec->spec;
  706. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  707. struct snd_kcontrol_new *knew;
  708. static struct snd_kcontrol_new abeep_mute_ctl =
  709. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  710. static struct snd_kcontrol_new dbeep_mute_ctl =
  711. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  712. static struct snd_kcontrol_new beep_vol_ctl =
  713. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  714. /* check for mute support for the the amp */
  715. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  716. const struct snd_kcontrol_new *temp;
  717. if (spec->anabeep_nid == nid)
  718. temp = &abeep_mute_ctl;
  719. else
  720. temp = &dbeep_mute_ctl;
  721. knew = snd_hda_gen_add_kctl(&spec->gen,
  722. "Beep Playback Switch", temp);
  723. if (!knew)
  724. return -ENOMEM;
  725. knew->private_value =
  726. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  727. }
  728. /* check to see if there is volume support for the amp */
  729. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  730. knew = snd_hda_gen_add_kctl(&spec->gen,
  731. "Beep Playback Volume",
  732. &beep_vol_ctl);
  733. if (!knew)
  734. return -ENOMEM;
  735. knew->private_value =
  736. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  737. }
  738. return 0;
  739. }
  740. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  741. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  742. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  743. struct snd_ctl_elem_value *ucontrol)
  744. {
  745. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  746. ucontrol->value.integer.value[0] = codec->beep->enabled;
  747. return 0;
  748. }
  749. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  750. struct snd_ctl_elem_value *ucontrol)
  751. {
  752. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  753. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  754. }
  755. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  756. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  757. .name = "Beep Playback Switch",
  758. .info = stac_dig_beep_switch_info,
  759. .get = stac_dig_beep_switch_get,
  760. .put = stac_dig_beep_switch_put,
  761. };
  762. static int stac_beep_switch_ctl(struct hda_codec *codec)
  763. {
  764. struct sigmatel_spec *spec = codec->spec;
  765. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  766. return -ENOMEM;
  767. return 0;
  768. }
  769. #endif
  770. /*
  771. */
  772. static const struct hda_verb stac9200_core_init[] = {
  773. /* set dac0mux for dac converter */
  774. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  775. {}
  776. };
  777. static const struct hda_verb stac9200_eapd_init[] = {
  778. /* set dac0mux for dac converter */
  779. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  780. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  781. {}
  782. };
  783. static const struct hda_verb dell_eq_core_init[] = {
  784. /* set master volume to max value without distortion
  785. * and direct control */
  786. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  787. {}
  788. };
  789. static const struct hda_verb stac92hd73xx_core_init[] = {
  790. /* set master volume and direct control */
  791. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  792. {}
  793. };
  794. static const struct hda_verb stac92hd83xxx_core_init[] = {
  795. /* power state controls amps */
  796. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  797. {}
  798. };
  799. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  800. { 0x22, 0x785, 0x43 },
  801. { 0x22, 0x782, 0xe0 },
  802. { 0x22, 0x795, 0x00 },
  803. {}
  804. };
  805. static const struct hda_verb stac92hd71bxx_core_init[] = {
  806. /* set master volume and direct control */
  807. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  808. {}
  809. };
  810. static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  811. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  812. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  813. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  814. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  815. {}
  816. };
  817. static const struct hda_verb stac925x_core_init[] = {
  818. /* set dac0mux for dac converter */
  819. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  820. /* mute the master volume */
  821. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  822. {}
  823. };
  824. static const struct hda_verb stac922x_core_init[] = {
  825. /* set master volume and direct control */
  826. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  827. {}
  828. };
  829. static const struct hda_verb d965_core_init[] = {
  830. /* unmute node 0x1b */
  831. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  832. /* select node 0x03 as DAC */
  833. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  834. {}
  835. };
  836. static const struct hda_verb dell_3st_core_init[] = {
  837. /* don't set delta bit */
  838. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  839. /* unmute node 0x1b */
  840. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  841. /* select node 0x03 as DAC */
  842. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  843. {}
  844. };
  845. static const struct hda_verb stac927x_core_init[] = {
  846. /* set master volume and direct control */
  847. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  848. /* enable analog pc beep path */
  849. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  850. {}
  851. };
  852. static const struct hda_verb stac927x_volknob_core_init[] = {
  853. /* don't set delta bit */
  854. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  855. /* enable analog pc beep path */
  856. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  857. {}
  858. };
  859. static const struct hda_verb stac9205_core_init[] = {
  860. /* set master volume and direct control */
  861. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  862. /* enable analog pc beep path */
  863. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  864. {}
  865. };
  866. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  867. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  868. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  869. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  870. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  871. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  872. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  873. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  874. static const struct snd_kcontrol_new stac9205_loopback =
  875. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  876. static const struct snd_kcontrol_new stac927x_loopback =
  877. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  878. static const struct hda_pintbl ref9200_pin_configs[] = {
  879. { 0x08, 0x01c47010 },
  880. { 0x09, 0x01447010 },
  881. { 0x0d, 0x0221401f },
  882. { 0x0e, 0x01114010 },
  883. { 0x0f, 0x02a19020 },
  884. { 0x10, 0x01a19021 },
  885. { 0x11, 0x90100140 },
  886. { 0x12, 0x01813122 },
  887. {}
  888. };
  889. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  890. { 0x08, 0x400000fe },
  891. { 0x09, 0x404500f4 },
  892. { 0x0d, 0x400100f0 },
  893. { 0x0e, 0x90110010 },
  894. { 0x0f, 0x400100f1 },
  895. { 0x10, 0x02a1902e },
  896. { 0x11, 0x500000f2 },
  897. { 0x12, 0x500000f3 },
  898. {}
  899. };
  900. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  901. { 0x08, 0x400000fe },
  902. { 0x09, 0x404500f4 },
  903. { 0x0d, 0x400100f0 },
  904. { 0x0e, 0x90110010 },
  905. { 0x0f, 0x400100f1 },
  906. { 0x10, 0x02a1902e },
  907. { 0x11, 0x500000f2 },
  908. { 0x12, 0x500000f3 },
  909. {}
  910. };
  911. /*
  912. STAC 9200 pin configs for
  913. 102801A8
  914. 102801DE
  915. 102801E8
  916. */
  917. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  918. { 0x08, 0x400001f0 },
  919. { 0x09, 0x400001f1 },
  920. { 0x0d, 0x02214030 },
  921. { 0x0e, 0x01014010 },
  922. { 0x0f, 0x02a19020 },
  923. { 0x10, 0x01a19021 },
  924. { 0x11, 0x90100140 },
  925. { 0x12, 0x01813122 },
  926. {}
  927. };
  928. /*
  929. STAC 9200 pin configs for
  930. 102801C0
  931. 102801C1
  932. */
  933. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  934. { 0x08, 0x400001f0 },
  935. { 0x09, 0x400001f1 },
  936. { 0x0d, 0x0221401f },
  937. { 0x0e, 0x01014010 },
  938. { 0x0f, 0x01813020 },
  939. { 0x10, 0x02a19021 },
  940. { 0x11, 0x90100140 },
  941. { 0x12, 0x400001f2 },
  942. {}
  943. };
  944. /*
  945. STAC 9200 pin configs for
  946. 102801C4 (Dell Dimension E310)
  947. 102801C5
  948. 102801C7
  949. 102801D9
  950. 102801DA
  951. 102801E3
  952. */
  953. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  954. { 0x08, 0x400001f0 },
  955. { 0x09, 0x400001f1 },
  956. { 0x0d, 0x0221401f },
  957. { 0x0e, 0x01014010 },
  958. { 0x0f, 0x01813020 },
  959. { 0x10, 0x01a19021 },
  960. { 0x11, 0x90100140 },
  961. { 0x12, 0x400001f2 },
  962. {}
  963. };
  964. /*
  965. STAC 9200-32 pin configs for
  966. 102801B5 (Dell Inspiron 630m)
  967. 102801D8 (Dell Inspiron 640m)
  968. */
  969. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  970. { 0x08, 0x40c003fa },
  971. { 0x09, 0x03441340 },
  972. { 0x0d, 0x0321121f },
  973. { 0x0e, 0x90170310 },
  974. { 0x0f, 0x408003fb },
  975. { 0x10, 0x03a11020 },
  976. { 0x11, 0x401003fc },
  977. { 0x12, 0x403003fd },
  978. {}
  979. };
  980. /*
  981. STAC 9200-32 pin configs for
  982. 102801C2 (Dell Latitude D620)
  983. 102801C8
  984. 102801CC (Dell Latitude D820)
  985. 102801D4
  986. 102801D6
  987. */
  988. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  989. { 0x08, 0x40c003fa },
  990. { 0x09, 0x0144131f },
  991. { 0x0d, 0x0321121f },
  992. { 0x0e, 0x90170310 },
  993. { 0x0f, 0x90a70321 },
  994. { 0x10, 0x03a11020 },
  995. { 0x11, 0x401003fb },
  996. { 0x12, 0x40f000fc },
  997. {}
  998. };
  999. /*
  1000. STAC 9200-32 pin configs for
  1001. 102801CE (Dell XPS M1710)
  1002. 102801CF (Dell Precision M90)
  1003. */
  1004. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1005. { 0x08, 0x40c003fa },
  1006. { 0x09, 0x01441340 },
  1007. { 0x0d, 0x0421421f },
  1008. { 0x0e, 0x90170310 },
  1009. { 0x0f, 0x408003fb },
  1010. { 0x10, 0x04a1102e },
  1011. { 0x11, 0x90170311 },
  1012. { 0x12, 0x403003fc },
  1013. {}
  1014. };
  1015. /*
  1016. STAC 9200-32 pin configs for
  1017. 102801C9
  1018. 102801CA
  1019. 102801CB (Dell Latitude 120L)
  1020. 102801D3
  1021. */
  1022. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1023. { 0x08, 0x40c003fa },
  1024. { 0x09, 0x404003fb },
  1025. { 0x0d, 0x0321121f },
  1026. { 0x0e, 0x90170310 },
  1027. { 0x0f, 0x408003fc },
  1028. { 0x10, 0x03a11020 },
  1029. { 0x11, 0x401003fd },
  1030. { 0x12, 0x403003fe },
  1031. {}
  1032. };
  1033. /*
  1034. STAC 9200-32 pin configs for
  1035. 102801BD (Dell Inspiron E1505n)
  1036. 102801EE
  1037. 102801EF
  1038. */
  1039. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1040. { 0x08, 0x40c003fa },
  1041. { 0x09, 0x01441340 },
  1042. { 0x0d, 0x0421121f },
  1043. { 0x0e, 0x90170310 },
  1044. { 0x0f, 0x408003fb },
  1045. { 0x10, 0x04a11020 },
  1046. { 0x11, 0x401003fc },
  1047. { 0x12, 0x403003fd },
  1048. {}
  1049. };
  1050. /*
  1051. STAC 9200-32 pin configs for
  1052. 102801F5 (Dell Inspiron 1501)
  1053. 102801F6
  1054. */
  1055. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1056. { 0x08, 0x40c003fa },
  1057. { 0x09, 0x404003fb },
  1058. { 0x0d, 0x0421121f },
  1059. { 0x0e, 0x90170310 },
  1060. { 0x0f, 0x408003fc },
  1061. { 0x10, 0x04a11020 },
  1062. { 0x11, 0x401003fd },
  1063. { 0x12, 0x403003fe },
  1064. {}
  1065. };
  1066. /*
  1067. STAC 9200-32
  1068. 102801CD (Dell Inspiron E1705/9400)
  1069. */
  1070. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1071. { 0x08, 0x40c003fa },
  1072. { 0x09, 0x01441340 },
  1073. { 0x0d, 0x0421121f },
  1074. { 0x0e, 0x90170310 },
  1075. { 0x0f, 0x90170310 },
  1076. { 0x10, 0x04a11020 },
  1077. { 0x11, 0x90170310 },
  1078. { 0x12, 0x40f003fc },
  1079. {}
  1080. };
  1081. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1082. { 0x08, 0x40c000f0 },
  1083. { 0x09, 0x404000f1 },
  1084. { 0x0d, 0x0221121f },
  1085. { 0x0e, 0x02211210 },
  1086. { 0x0f, 0x90170111 },
  1087. { 0x10, 0x90a70120 },
  1088. { 0x11, 0x400000f2 },
  1089. { 0x12, 0x400000f3 },
  1090. {}
  1091. };
  1092. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1093. const struct hda_fixup *fix, int action)
  1094. {
  1095. struct sigmatel_spec *spec = codec->spec;
  1096. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1097. spec->gpio_mask = spec->gpio_dir = 0x09;
  1098. spec->gpio_data = 0x00;
  1099. /* CF-74 has no headphone detection, and the driver should *NOT*
  1100. * do detection and HP/speaker toggle because the hardware does it.
  1101. */
  1102. spec->gen.suppress_auto_mute = 1;
  1103. }
  1104. }
  1105. static const struct hda_fixup stac9200_fixups[] = {
  1106. [STAC_REF] = {
  1107. .type = HDA_FIXUP_PINS,
  1108. .v.pins = ref9200_pin_configs,
  1109. },
  1110. [STAC_9200_OQO] = {
  1111. .type = HDA_FIXUP_PINS,
  1112. .v.pins = oqo9200_pin_configs,
  1113. .chained = true,
  1114. .chain_id = STAC_9200_EAPD_INIT,
  1115. },
  1116. [STAC_9200_DELL_D21] = {
  1117. .type = HDA_FIXUP_PINS,
  1118. .v.pins = dell9200_d21_pin_configs,
  1119. },
  1120. [STAC_9200_DELL_D22] = {
  1121. .type = HDA_FIXUP_PINS,
  1122. .v.pins = dell9200_d22_pin_configs,
  1123. },
  1124. [STAC_9200_DELL_D23] = {
  1125. .type = HDA_FIXUP_PINS,
  1126. .v.pins = dell9200_d23_pin_configs,
  1127. },
  1128. [STAC_9200_DELL_M21] = {
  1129. .type = HDA_FIXUP_PINS,
  1130. .v.pins = dell9200_m21_pin_configs,
  1131. },
  1132. [STAC_9200_DELL_M22] = {
  1133. .type = HDA_FIXUP_PINS,
  1134. .v.pins = dell9200_m22_pin_configs,
  1135. },
  1136. [STAC_9200_DELL_M23] = {
  1137. .type = HDA_FIXUP_PINS,
  1138. .v.pins = dell9200_m23_pin_configs,
  1139. },
  1140. [STAC_9200_DELL_M24] = {
  1141. .type = HDA_FIXUP_PINS,
  1142. .v.pins = dell9200_m24_pin_configs,
  1143. },
  1144. [STAC_9200_DELL_M25] = {
  1145. .type = HDA_FIXUP_PINS,
  1146. .v.pins = dell9200_m25_pin_configs,
  1147. },
  1148. [STAC_9200_DELL_M26] = {
  1149. .type = HDA_FIXUP_PINS,
  1150. .v.pins = dell9200_m26_pin_configs,
  1151. },
  1152. [STAC_9200_DELL_M27] = {
  1153. .type = HDA_FIXUP_PINS,
  1154. .v.pins = dell9200_m27_pin_configs,
  1155. },
  1156. [STAC_9200_M4] = {
  1157. .type = HDA_FIXUP_PINS,
  1158. .v.pins = gateway9200_m4_pin_configs,
  1159. .chained = true,
  1160. .chain_id = STAC_9200_EAPD_INIT,
  1161. },
  1162. [STAC_9200_M4_2] = {
  1163. .type = HDA_FIXUP_PINS,
  1164. .v.pins = gateway9200_m4_2_pin_configs,
  1165. .chained = true,
  1166. .chain_id = STAC_9200_EAPD_INIT,
  1167. },
  1168. [STAC_9200_PANASONIC] = {
  1169. .type = HDA_FIXUP_FUNC,
  1170. .v.func = stac9200_fixup_panasonic,
  1171. },
  1172. [STAC_9200_EAPD_INIT] = {
  1173. .type = HDA_FIXUP_VERBS,
  1174. .v.verbs = (const struct hda_verb[]) {
  1175. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1176. {}
  1177. },
  1178. },
  1179. };
  1180. static const struct hda_model_fixup stac9200_models[] = {
  1181. { .id = STAC_REF, .name = "ref" },
  1182. { .id = STAC_9200_OQO, .name = "oqo" },
  1183. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1184. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1185. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1186. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1187. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1188. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1189. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1190. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1191. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1192. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1193. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1194. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1195. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1196. {}
  1197. };
  1198. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1199. /* SigmaTel reference board */
  1200. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1201. "DFI LanParty", STAC_REF),
  1202. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1203. "DFI LanParty", STAC_REF),
  1204. /* Dell laptops have BIOS problem */
  1205. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1206. "unknown Dell", STAC_9200_DELL_D21),
  1207. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1208. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1209. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1210. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1211. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1212. "unknown Dell", STAC_9200_DELL_D22),
  1213. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1214. "unknown Dell", STAC_9200_DELL_D22),
  1215. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1216. "Dell Latitude D620", STAC_9200_DELL_M22),
  1217. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1218. "unknown Dell", STAC_9200_DELL_D23),
  1219. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1220. "unknown Dell", STAC_9200_DELL_D23),
  1221. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1222. "unknown Dell", STAC_9200_DELL_M22),
  1223. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1224. "unknown Dell", STAC_9200_DELL_M24),
  1225. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1226. "unknown Dell", STAC_9200_DELL_M24),
  1227. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1228. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1229. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1230. "Dell Latitude D820", STAC_9200_DELL_M22),
  1231. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1232. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1233. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1234. "Dell XPS M1710", STAC_9200_DELL_M23),
  1235. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1236. "Dell Precision M90", STAC_9200_DELL_M23),
  1237. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1238. "unknown Dell", STAC_9200_DELL_M22),
  1239. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1240. "unknown Dell", STAC_9200_DELL_M22),
  1241. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1242. "unknown Dell", STAC_9200_DELL_M22),
  1243. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1244. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1245. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1246. "unknown Dell", STAC_9200_DELL_D23),
  1247. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1248. "unknown Dell", STAC_9200_DELL_D23),
  1249. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1250. "unknown Dell", STAC_9200_DELL_D21),
  1251. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1252. "unknown Dell", STAC_9200_DELL_D23),
  1253. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1254. "unknown Dell", STAC_9200_DELL_D21),
  1255. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1256. "unknown Dell", STAC_9200_DELL_M25),
  1257. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1258. "unknown Dell", STAC_9200_DELL_M25),
  1259. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1260. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1261. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1262. "unknown Dell", STAC_9200_DELL_M26),
  1263. /* Panasonic */
  1264. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1265. /* Gateway machines needs EAPD to be set on resume */
  1266. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1267. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1268. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1269. /* OQO Mobile */
  1270. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1271. {} /* terminator */
  1272. };
  1273. static const struct hda_pintbl ref925x_pin_configs[] = {
  1274. { 0x07, 0x40c003f0 },
  1275. { 0x08, 0x424503f2 },
  1276. { 0x0a, 0x01813022 },
  1277. { 0x0b, 0x02a19021 },
  1278. { 0x0c, 0x90a70320 },
  1279. { 0x0d, 0x02214210 },
  1280. { 0x10, 0x01019020 },
  1281. { 0x11, 0x9033032e },
  1282. {}
  1283. };
  1284. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1285. { 0x07, 0x40c003f4 },
  1286. { 0x08, 0x424503f2 },
  1287. { 0x0a, 0x400000f3 },
  1288. { 0x0b, 0x02a19020 },
  1289. { 0x0c, 0x40a000f0 },
  1290. { 0x0d, 0x90100210 },
  1291. { 0x10, 0x400003f1 },
  1292. { 0x11, 0x9033032e },
  1293. {}
  1294. };
  1295. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1296. { 0x07, 0x40c003f4 },
  1297. { 0x08, 0x424503f2 },
  1298. { 0x0a, 0x400000f3 },
  1299. { 0x0b, 0x02a19020 },
  1300. { 0x0c, 0x40a000f0 },
  1301. { 0x0d, 0x90100210 },
  1302. { 0x10, 0x400003f1 },
  1303. { 0x11, 0x9033032e },
  1304. {}
  1305. };
  1306. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1307. { 0x07, 0x40c003f4 },
  1308. { 0x08, 0x424503f2 },
  1309. { 0x0a, 0x400000f3 },
  1310. { 0x0b, 0x02a19020 },
  1311. { 0x0c, 0x40a000f0 },
  1312. { 0x0d, 0x90100210 },
  1313. { 0x10, 0x400003f1 },
  1314. { 0x11, 0x9033032e },
  1315. {}
  1316. };
  1317. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1318. { 0x07, 0x40c003f4 },
  1319. { 0x08, 0x424503f2 },
  1320. { 0x0a, 0x400000f3 },
  1321. { 0x0b, 0x02a19020 },
  1322. { 0x0c, 0x40a000f0 },
  1323. { 0x0d, 0x90100210 },
  1324. { 0x10, 0x400003f1 },
  1325. { 0x11, 0x9033032e },
  1326. {}
  1327. };
  1328. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1329. { 0x07, 0x40c003f4 },
  1330. { 0x08, 0x424503f2 },
  1331. { 0x0a, 0x400000f3 },
  1332. { 0x0b, 0x02a19020 },
  1333. { 0x0c, 0x40a000f0 },
  1334. { 0x0d, 0x90100210 },
  1335. { 0x10, 0x400003f1 },
  1336. { 0x11, 0x503303f3 },
  1337. {}
  1338. };
  1339. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1340. { 0x07, 0x40c003f4 },
  1341. { 0x08, 0x424503f2 },
  1342. { 0x0a, 0x400000f3 },
  1343. { 0x0b, 0x02a19020 },
  1344. { 0x0c, 0x40a000f0 },
  1345. { 0x0d, 0x90100210 },
  1346. { 0x10, 0x400003f1 },
  1347. { 0x11, 0x9033032e },
  1348. {}
  1349. };
  1350. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1351. { 0x07, 0x40c003f4 },
  1352. { 0x08, 0x424503f2 },
  1353. { 0x0a, 0x400000f3 },
  1354. { 0x0b, 0x02a19020 },
  1355. { 0x0c, 0x40a000f0 },
  1356. { 0x0d, 0x90100210 },
  1357. { 0x10, 0x400003f1 },
  1358. { 0x11, 0x90330320 },
  1359. {}
  1360. };
  1361. static const struct hda_fixup stac925x_fixups[] = {
  1362. [STAC_REF] = {
  1363. .type = HDA_FIXUP_PINS,
  1364. .v.pins = ref925x_pin_configs,
  1365. },
  1366. [STAC_M1] = {
  1367. .type = HDA_FIXUP_PINS,
  1368. .v.pins = stac925xM1_pin_configs,
  1369. },
  1370. [STAC_M1_2] = {
  1371. .type = HDA_FIXUP_PINS,
  1372. .v.pins = stac925xM1_2_pin_configs,
  1373. },
  1374. [STAC_M2] = {
  1375. .type = HDA_FIXUP_PINS,
  1376. .v.pins = stac925xM2_pin_configs,
  1377. },
  1378. [STAC_M2_2] = {
  1379. .type = HDA_FIXUP_PINS,
  1380. .v.pins = stac925xM2_2_pin_configs,
  1381. },
  1382. [STAC_M3] = {
  1383. .type = HDA_FIXUP_PINS,
  1384. .v.pins = stac925xM3_pin_configs,
  1385. },
  1386. [STAC_M5] = {
  1387. .type = HDA_FIXUP_PINS,
  1388. .v.pins = stac925xM5_pin_configs,
  1389. },
  1390. [STAC_M6] = {
  1391. .type = HDA_FIXUP_PINS,
  1392. .v.pins = stac925xM6_pin_configs,
  1393. },
  1394. };
  1395. static const struct hda_model_fixup stac925x_models[] = {
  1396. { .id = STAC_REF, .name = "ref" },
  1397. { .id = STAC_M1, .name = "m1" },
  1398. { .id = STAC_M1_2, .name = "m1-2" },
  1399. { .id = STAC_M2, .name = "m2" },
  1400. { .id = STAC_M2_2, .name = "m2-2" },
  1401. { .id = STAC_M3, .name = "m3" },
  1402. { .id = STAC_M5, .name = "m5" },
  1403. { .id = STAC_M6, .name = "m6" },
  1404. {}
  1405. };
  1406. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1407. /* SigmaTel reference board */
  1408. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1409. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1410. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1411. /* Default table for unknown ID */
  1412. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1413. /* gateway machines are checked via codec ssid */
  1414. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1415. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1416. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1417. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1418. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1419. /* Not sure about the brand name for those */
  1420. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1421. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1422. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1423. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1424. {} /* terminator */
  1425. };
  1426. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1427. { 0x0a, 0x02214030 },
  1428. { 0x0b, 0x02a19040 },
  1429. { 0x0c, 0x01a19020 },
  1430. { 0x0d, 0x02214030 },
  1431. { 0x0e, 0x0181302e },
  1432. { 0x0f, 0x01014010 },
  1433. { 0x10, 0x01014020 },
  1434. { 0x11, 0x01014030 },
  1435. { 0x12, 0x02319040 },
  1436. { 0x13, 0x90a000f0 },
  1437. { 0x14, 0x90a000f0 },
  1438. { 0x22, 0x01452050 },
  1439. { 0x23, 0x01452050 },
  1440. {}
  1441. };
  1442. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1443. { 0x0a, 0x0321101f },
  1444. { 0x0b, 0x4f00000f },
  1445. { 0x0c, 0x4f0000f0 },
  1446. { 0x0d, 0x90170110 },
  1447. { 0x0e, 0x03a11020 },
  1448. { 0x0f, 0x0321101f },
  1449. { 0x10, 0x4f0000f0 },
  1450. { 0x11, 0x4f0000f0 },
  1451. { 0x12, 0x4f0000f0 },
  1452. { 0x13, 0x90a60160 },
  1453. { 0x14, 0x4f0000f0 },
  1454. { 0x22, 0x4f0000f0 },
  1455. { 0x23, 0x4f0000f0 },
  1456. {}
  1457. };
  1458. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1459. { 0x0a, 0x0321101f },
  1460. { 0x0b, 0x0321101f },
  1461. { 0x0c, 0x03a11020 },
  1462. { 0x0d, 0x03014020 },
  1463. { 0x0e, 0x90170110 },
  1464. { 0x0f, 0x4f0000f0 },
  1465. { 0x10, 0x4f0000f0 },
  1466. { 0x11, 0x4f0000f0 },
  1467. { 0x12, 0x4f0000f0 },
  1468. { 0x13, 0x90a60160 },
  1469. { 0x14, 0x4f0000f0 },
  1470. { 0x22, 0x4f0000f0 },
  1471. { 0x23, 0x904601b0 },
  1472. {}
  1473. };
  1474. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1475. { 0x0a, 0x02214230 },
  1476. { 0x0b, 0x02A19240 },
  1477. { 0x0c, 0x01013214 },
  1478. { 0x0d, 0x01014210 },
  1479. { 0x0e, 0x01A19250 },
  1480. { 0x0f, 0x01011212 },
  1481. { 0x10, 0x01016211 },
  1482. {}
  1483. };
  1484. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1485. const struct hda_fixup *fix, int action)
  1486. {
  1487. struct sigmatel_spec *spec = codec->spec;
  1488. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1489. return;
  1490. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1491. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1492. }
  1493. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1494. {
  1495. struct sigmatel_spec *spec = codec->spec;
  1496. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1497. spec->eapd_switch = 0;
  1498. }
  1499. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1500. const struct hda_fixup *fix, int action)
  1501. {
  1502. struct sigmatel_spec *spec = codec->spec;
  1503. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1504. return;
  1505. stac92hd73xx_fixup_dell(codec);
  1506. snd_hda_add_verbs(codec, dell_eq_core_init);
  1507. spec->volknob_init = 1;
  1508. }
  1509. /* Analog Mics */
  1510. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1511. const struct hda_fixup *fix, int action)
  1512. {
  1513. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1514. return;
  1515. stac92hd73xx_fixup_dell(codec);
  1516. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1517. }
  1518. /* Digital Mics */
  1519. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1520. const struct hda_fixup *fix, int action)
  1521. {
  1522. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1523. return;
  1524. stac92hd73xx_fixup_dell(codec);
  1525. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1526. }
  1527. /* Both */
  1528. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1529. const struct hda_fixup *fix, int action)
  1530. {
  1531. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1532. return;
  1533. stac92hd73xx_fixup_dell(codec);
  1534. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1535. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1536. }
  1537. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1538. const struct hda_fixup *fix, int action)
  1539. {
  1540. struct sigmatel_spec *spec = codec->spec;
  1541. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1542. return;
  1543. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1544. spec->eapd_switch = 0;
  1545. }
  1546. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1547. const struct hda_fixup *fix, int action)
  1548. {
  1549. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1550. codec->no_jack_detect = 1;
  1551. }
  1552. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1553. [STAC_92HD73XX_REF] = {
  1554. .type = HDA_FIXUP_FUNC,
  1555. .v.func = stac92hd73xx_fixup_ref,
  1556. },
  1557. [STAC_DELL_M6_AMIC] = {
  1558. .type = HDA_FIXUP_FUNC,
  1559. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1560. },
  1561. [STAC_DELL_M6_DMIC] = {
  1562. .type = HDA_FIXUP_FUNC,
  1563. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1564. },
  1565. [STAC_DELL_M6_BOTH] = {
  1566. .type = HDA_FIXUP_FUNC,
  1567. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1568. },
  1569. [STAC_DELL_EQ] = {
  1570. .type = HDA_FIXUP_FUNC,
  1571. .v.func = stac92hd73xx_fixup_dell_eq,
  1572. },
  1573. [STAC_ALIENWARE_M17X] = {
  1574. .type = HDA_FIXUP_FUNC,
  1575. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1576. },
  1577. [STAC_92HD73XX_INTEL] = {
  1578. .type = HDA_FIXUP_PINS,
  1579. .v.pins = intel_dg45id_pin_configs,
  1580. },
  1581. [STAC_92HD73XX_NO_JD] = {
  1582. .type = HDA_FIXUP_FUNC,
  1583. .v.func = stac92hd73xx_fixup_no_jd,
  1584. }
  1585. };
  1586. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1587. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1588. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1589. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1590. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1591. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1592. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1593. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1594. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1595. {}
  1596. };
  1597. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1598. /* SigmaTel reference board */
  1599. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1600. "DFI LanParty", STAC_92HD73XX_REF),
  1601. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1602. "DFI LanParty", STAC_92HD73XX_REF),
  1603. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1604. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1605. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1606. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1607. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1608. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1609. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1610. "unknown Dell", STAC_DELL_M6_DMIC),
  1611. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1612. "unknown Dell", STAC_DELL_M6_BOTH),
  1613. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1614. "unknown Dell", STAC_DELL_M6_BOTH),
  1615. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1616. "unknown Dell", STAC_DELL_M6_AMIC),
  1617. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1618. "unknown Dell", STAC_DELL_M6_AMIC),
  1619. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1620. "unknown Dell", STAC_DELL_M6_DMIC),
  1621. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1622. "unknown Dell", STAC_DELL_M6_DMIC),
  1623. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1624. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1625. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1626. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1627. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1628. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1630. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1632. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1634. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1635. /* codec SSID matching */
  1636. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1637. "Alienware M17x", STAC_ALIENWARE_M17X),
  1638. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1639. "Alienware M17x", STAC_ALIENWARE_M17X),
  1640. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1641. "Alienware M17x R3", STAC_DELL_EQ),
  1642. {} /* terminator */
  1643. };
  1644. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1645. { 0x0a, 0x02214030 },
  1646. { 0x0b, 0x02211010 },
  1647. { 0x0c, 0x02a19020 },
  1648. { 0x0d, 0x02170130 },
  1649. { 0x0e, 0x01014050 },
  1650. { 0x0f, 0x01819040 },
  1651. { 0x10, 0x01014020 },
  1652. { 0x11, 0x90a3014e },
  1653. { 0x1f, 0x01451160 },
  1654. { 0x20, 0x98560170 },
  1655. {}
  1656. };
  1657. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1658. { 0x0a, 0x0221403f },
  1659. { 0x0b, 0x0221101f },
  1660. { 0x0c, 0x02a19020 },
  1661. { 0x0d, 0x90170110 },
  1662. { 0x0e, 0x40f000f0 },
  1663. { 0x0f, 0x40f000f0 },
  1664. { 0x10, 0x40f000f0 },
  1665. { 0x11, 0x90a60160 },
  1666. { 0x1f, 0x40f000f0 },
  1667. { 0x20, 0x40f000f0 },
  1668. {}
  1669. };
  1670. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1671. { 0x0a, 0x02a11020 },
  1672. { 0x0b, 0x0221101f },
  1673. { 0x0c, 0x400000f0 },
  1674. { 0x0d, 0x90170110 },
  1675. { 0x0e, 0x400000f1 },
  1676. { 0x0f, 0x400000f2 },
  1677. { 0x10, 0x400000f3 },
  1678. { 0x11, 0x90a60160 },
  1679. { 0x1f, 0x400000f4 },
  1680. { 0x20, 0x400000f5 },
  1681. {}
  1682. };
  1683. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1684. { 0x0a, 0x03a12050 },
  1685. { 0x0b, 0x0321201f },
  1686. { 0x0c, 0x40f000f0 },
  1687. { 0x0d, 0x90170110 },
  1688. { 0x0e, 0x40f000f0 },
  1689. { 0x0f, 0x40f000f0 },
  1690. { 0x10, 0x90170110 },
  1691. { 0x11, 0xd5a30140 },
  1692. { 0x1f, 0x40f000f0 },
  1693. { 0x20, 0x40f000f0 },
  1694. {}
  1695. };
  1696. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1697. { 0x0a, 0x01813050 },
  1698. { 0x0b, 0x0421201f },
  1699. { 0x0c, 0x04a1205e },
  1700. { 0x0d, 0x96130310 },
  1701. { 0x0e, 0x96130310 },
  1702. { 0x0f, 0x0101401f },
  1703. { 0x10, 0x1111611f },
  1704. { 0x11, 0xd5a30130 },
  1705. {}
  1706. };
  1707. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1708. { 0x0a, 0x40f000f0 },
  1709. { 0x0b, 0x0221101f },
  1710. { 0x0c, 0x02a11020 },
  1711. { 0x0d, 0x92170110 },
  1712. { 0x0e, 0x40f000f0 },
  1713. { 0x0f, 0x92170110 },
  1714. { 0x10, 0x40f000f0 },
  1715. { 0x11, 0xd5a30130 },
  1716. { 0x1f, 0x40f000f0 },
  1717. { 0x20, 0x40f000f0 },
  1718. {}
  1719. };
  1720. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1721. const struct hda_fixup *fix, int action)
  1722. {
  1723. struct sigmatel_spec *spec = codec->spec;
  1724. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1725. return;
  1726. if (hp_bnb2011_with_dock(codec)) {
  1727. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1728. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1729. }
  1730. if (find_mute_led_cfg(codec, spec->default_polarity))
  1731. snd_printd("mute LED gpio %d polarity %d\n",
  1732. spec->gpio_led,
  1733. spec->gpio_led_polarity);
  1734. }
  1735. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1736. const struct hda_fixup *fix, int action)
  1737. {
  1738. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1739. return;
  1740. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1741. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1742. }
  1743. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1744. const struct hda_fixup *fix, int action)
  1745. {
  1746. struct sigmatel_spec *spec = codec->spec;
  1747. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1748. spec->default_polarity = 0;
  1749. }
  1750. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1751. const struct hda_fixup *fix, int action)
  1752. {
  1753. struct sigmatel_spec *spec = codec->spec;
  1754. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1755. spec->default_polarity = 1;
  1756. }
  1757. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1758. const struct hda_fixup *fix, int action)
  1759. {
  1760. struct sigmatel_spec *spec = codec->spec;
  1761. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1762. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1763. }
  1764. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1765. const struct hda_fixup *fix, int action)
  1766. {
  1767. struct sigmatel_spec *spec = codec->spec;
  1768. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1769. spec->headset_jack = 1;
  1770. }
  1771. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  1772. [STAC_92HD83XXX_REF] = {
  1773. .type = HDA_FIXUP_PINS,
  1774. .v.pins = ref92hd83xxx_pin_configs,
  1775. },
  1776. [STAC_92HD83XXX_PWR_REF] = {
  1777. .type = HDA_FIXUP_PINS,
  1778. .v.pins = ref92hd83xxx_pin_configs,
  1779. },
  1780. [STAC_DELL_S14] = {
  1781. .type = HDA_FIXUP_PINS,
  1782. .v.pins = dell_s14_pin_configs,
  1783. },
  1784. [STAC_DELL_VOSTRO_3500] = {
  1785. .type = HDA_FIXUP_PINS,
  1786. .v.pins = dell_vostro_3500_pin_configs,
  1787. },
  1788. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  1789. .type = HDA_FIXUP_PINS,
  1790. .v.pins = hp_cNB11_intquad_pin_configs,
  1791. .chained = true,
  1792. .chain_id = STAC_92HD83XXX_HP,
  1793. },
  1794. [STAC_92HD83XXX_HP] = {
  1795. .type = HDA_FIXUP_FUNC,
  1796. .v.func = stac92hd83xxx_fixup_hp,
  1797. },
  1798. [STAC_HP_DV7_4000] = {
  1799. .type = HDA_FIXUP_PINS,
  1800. .v.pins = hp_dv7_4000_pin_configs,
  1801. .chained = true,
  1802. .chain_id = STAC_92HD83XXX_HP,
  1803. },
  1804. [STAC_HP_ZEPHYR] = {
  1805. .type = HDA_FIXUP_FUNC,
  1806. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  1807. .chained = true,
  1808. .chain_id = STAC_92HD83XXX_HP,
  1809. },
  1810. [STAC_92HD83XXX_HP_LED] = {
  1811. .type = HDA_FIXUP_FUNC,
  1812. .v.func = stac92hd83xxx_fixup_hp_led,
  1813. .chained = true,
  1814. .chain_id = STAC_92HD83XXX_HP,
  1815. },
  1816. [STAC_92HD83XXX_HP_INV_LED] = {
  1817. .type = HDA_FIXUP_FUNC,
  1818. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  1819. .chained = true,
  1820. .chain_id = STAC_92HD83XXX_HP,
  1821. },
  1822. [STAC_92HD83XXX_HP_MIC_LED] = {
  1823. .type = HDA_FIXUP_FUNC,
  1824. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  1825. .chained = true,
  1826. .chain_id = STAC_92HD83XXX_HP,
  1827. },
  1828. [STAC_92HD83XXX_HEADSET_JACK] = {
  1829. .type = HDA_FIXUP_FUNC,
  1830. .v.func = stac92hd83xxx_fixup_headset_jack,
  1831. },
  1832. [STAC_HP_ENVY_BASS] = {
  1833. .type = HDA_FIXUP_PINS,
  1834. .v.pins = (const struct hda_pintbl[]) {
  1835. { 0x0f, 0x90170111 },
  1836. {}
  1837. },
  1838. },
  1839. };
  1840. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  1841. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  1842. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  1843. { .id = STAC_DELL_S14, .name = "dell-s14" },
  1844. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  1845. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  1846. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  1847. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  1848. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  1849. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  1850. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  1851. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  1852. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  1853. {}
  1854. };
  1855. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  1856. /* SigmaTel reference board */
  1857. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1858. "DFI LanParty", STAC_92HD83XXX_REF),
  1859. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1860. "DFI LanParty", STAC_92HD83XXX_REF),
  1861. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  1862. "unknown Dell", STAC_DELL_S14),
  1863. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  1864. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  1865. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  1866. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  1867. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  1868. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  1869. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  1870. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  1871. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  1872. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1873. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  1874. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  1875. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  1876. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1877. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  1878. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  1879. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  1880. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  1881. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  1882. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  1883. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  1884. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1885. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  1886. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1887. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  1888. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1889. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  1890. "HP Pavilion dv7", STAC_HP_DV7_4000),
  1891. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  1892. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1893. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  1894. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1895. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  1896. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  1897. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  1898. "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
  1899. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  1900. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1901. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  1902. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1903. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  1904. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1905. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  1906. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1907. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  1908. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1909. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  1910. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1911. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  1912. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1913. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  1914. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1915. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  1916. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1917. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  1918. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1919. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  1920. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1921. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  1922. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1923. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  1924. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1925. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  1926. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1927. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  1928. "HP", STAC_HP_ZEPHYR),
  1929. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  1930. "HP Mini", STAC_92HD83XXX_HP_LED),
  1931. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  1932. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  1933. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  1934. "HP Mini", STAC_92HD83XXX_HP_LED),
  1935. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  1936. {} /* terminator */
  1937. };
  1938. /* HP dv7 bass switch - GPIO5 */
  1939. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  1940. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  1941. struct snd_ctl_elem_value *ucontrol)
  1942. {
  1943. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1944. struct sigmatel_spec *spec = codec->spec;
  1945. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  1946. return 0;
  1947. }
  1948. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  1949. struct snd_ctl_elem_value *ucontrol)
  1950. {
  1951. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1952. struct sigmatel_spec *spec = codec->spec;
  1953. unsigned int gpio_data;
  1954. gpio_data = (spec->gpio_data & ~0x20) |
  1955. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  1956. if (gpio_data == spec->gpio_data)
  1957. return 0;
  1958. spec->gpio_data = gpio_data;
  1959. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  1960. return 1;
  1961. }
  1962. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  1963. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1964. .info = stac_hp_bass_gpio_info,
  1965. .get = stac_hp_bass_gpio_get,
  1966. .put = stac_hp_bass_gpio_put,
  1967. };
  1968. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  1969. {
  1970. struct sigmatel_spec *spec = codec->spec;
  1971. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  1972. &stac_hp_bass_sw_ctrl))
  1973. return -ENOMEM;
  1974. spec->gpio_mask |= 0x20;
  1975. spec->gpio_dir |= 0x20;
  1976. spec->gpio_data |= 0x20;
  1977. return 0;
  1978. }
  1979. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  1980. { 0x0a, 0x02214030 },
  1981. { 0x0b, 0x02a19040 },
  1982. { 0x0c, 0x01a19020 },
  1983. { 0x0d, 0x01014010 },
  1984. { 0x0e, 0x0181302e },
  1985. { 0x0f, 0x01014010 },
  1986. { 0x14, 0x01019020 },
  1987. { 0x18, 0x90a000f0 },
  1988. { 0x19, 0x90a000f0 },
  1989. { 0x1e, 0x01452050 },
  1990. { 0x1f, 0x01452050 },
  1991. {}
  1992. };
  1993. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  1994. { 0x0a, 0x0421101f },
  1995. { 0x0b, 0x04a11221 },
  1996. { 0x0c, 0x40f000f0 },
  1997. { 0x0d, 0x90170110 },
  1998. { 0x0e, 0x23a1902e },
  1999. { 0x0f, 0x23014250 },
  2000. { 0x14, 0x40f000f0 },
  2001. { 0x18, 0x90a000f0 },
  2002. { 0x19, 0x40f000f0 },
  2003. { 0x1e, 0x4f0000f0 },
  2004. { 0x1f, 0x4f0000f0 },
  2005. {}
  2006. };
  2007. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2008. { 0x0a, 0x0421101f },
  2009. { 0x0b, 0x04a11221 },
  2010. { 0x0c, 0x90a70330 },
  2011. { 0x0d, 0x90170110 },
  2012. { 0x0e, 0x23a1902e },
  2013. { 0x0f, 0x23014250 },
  2014. { 0x14, 0x40f000f0 },
  2015. { 0x18, 0x40f000f0 },
  2016. { 0x19, 0x40f000f0 },
  2017. { 0x1e, 0x044413b0 },
  2018. { 0x1f, 0x044413b0 },
  2019. {}
  2020. };
  2021. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2022. { 0x0a, 0x0421101f },
  2023. { 0x0b, 0x04a11221 },
  2024. { 0x0c, 0x90a70330 },
  2025. { 0x0d, 0x90170110 },
  2026. { 0x0e, 0x40f000f0 },
  2027. { 0x0f, 0x40f000f0 },
  2028. { 0x14, 0x40f000f0 },
  2029. { 0x18, 0x90a000f0 },
  2030. { 0x19, 0x40f000f0 },
  2031. { 0x1e, 0x044413b0 },
  2032. { 0x1f, 0x044413b0 },
  2033. {}
  2034. };
  2035. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2036. const struct hda_fixup *fix, int action)
  2037. {
  2038. struct sigmatel_spec *spec = codec->spec;
  2039. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2040. return;
  2041. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2042. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2043. }
  2044. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2045. const struct hda_fixup *fix, int action)
  2046. {
  2047. struct sigmatel_spec *spec = codec->spec;
  2048. struct hda_jack_tbl *jack;
  2049. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2050. return;
  2051. /* Enable VREF power saving on GPIO1 detect */
  2052. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2053. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2054. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  2055. STAC_VREF_EVENT,
  2056. stac_vref_event);
  2057. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  2058. if (jack)
  2059. jack->private_data = 0x02;
  2060. spec->gpio_mask |= 0x02;
  2061. /* enable internal microphone */
  2062. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2063. }
  2064. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2065. const struct hda_fixup *fix, int action)
  2066. {
  2067. struct sigmatel_spec *spec = codec->spec;
  2068. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2069. return;
  2070. spec->gpio_led = 0x01;
  2071. }
  2072. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2073. const struct hda_fixup *fix, int action)
  2074. {
  2075. unsigned int cap;
  2076. switch (action) {
  2077. case HDA_FIXUP_ACT_PRE_PROBE:
  2078. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2079. break;
  2080. case HDA_FIXUP_ACT_PROBE:
  2081. /* enable bass on HP dv7 */
  2082. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2083. cap &= AC_GPIO_IO_COUNT;
  2084. if (cap >= 6)
  2085. stac_add_hp_bass_switch(codec);
  2086. break;
  2087. }
  2088. }
  2089. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2090. const struct hda_fixup *fix, int action)
  2091. {
  2092. struct sigmatel_spec *spec = codec->spec;
  2093. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2094. return;
  2095. spec->gpio_led = 0x08;
  2096. }
  2097. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2098. const struct hda_fixup *fix, int action)
  2099. {
  2100. struct sigmatel_spec *spec = codec->spec;
  2101. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2102. return;
  2103. if (hp_blike_system(codec->subsystem_id)) {
  2104. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2105. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2106. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2107. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2108. /* It was changed in the BIOS to just satisfy MS DTM.
  2109. * Lets turn it back into slaved HP
  2110. */
  2111. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2112. | (AC_JACK_HP_OUT <<
  2113. AC_DEFCFG_DEVICE_SHIFT);
  2114. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2115. | AC_DEFCFG_SEQUENCE)))
  2116. | 0x1f;
  2117. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2118. }
  2119. }
  2120. if (find_mute_led_cfg(codec, 1))
  2121. snd_printd("mute LED gpio %d polarity %d\n",
  2122. spec->gpio_led,
  2123. spec->gpio_led_polarity);
  2124. }
  2125. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2126. [STAC_92HD71BXX_REF] = {
  2127. .type = HDA_FIXUP_FUNC,
  2128. .v.func = stac92hd71bxx_fixup_ref,
  2129. },
  2130. [STAC_DELL_M4_1] = {
  2131. .type = HDA_FIXUP_PINS,
  2132. .v.pins = dell_m4_1_pin_configs,
  2133. },
  2134. [STAC_DELL_M4_2] = {
  2135. .type = HDA_FIXUP_PINS,
  2136. .v.pins = dell_m4_2_pin_configs,
  2137. },
  2138. [STAC_DELL_M4_3] = {
  2139. .type = HDA_FIXUP_PINS,
  2140. .v.pins = dell_m4_3_pin_configs,
  2141. },
  2142. [STAC_HP_M4] = {
  2143. .type = HDA_FIXUP_FUNC,
  2144. .v.func = stac92hd71bxx_fixup_hp_m4,
  2145. .chained = true,
  2146. .chain_id = STAC_92HD71BXX_HP,
  2147. },
  2148. [STAC_HP_DV4] = {
  2149. .type = HDA_FIXUP_FUNC,
  2150. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2151. .chained = true,
  2152. .chain_id = STAC_HP_DV5,
  2153. },
  2154. [STAC_HP_DV5] = {
  2155. .type = HDA_FIXUP_FUNC,
  2156. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2157. .chained = true,
  2158. .chain_id = STAC_92HD71BXX_HP,
  2159. },
  2160. [STAC_HP_HDX] = {
  2161. .type = HDA_FIXUP_FUNC,
  2162. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2163. .chained = true,
  2164. .chain_id = STAC_92HD71BXX_HP,
  2165. },
  2166. [STAC_92HD71BXX_HP] = {
  2167. .type = HDA_FIXUP_FUNC,
  2168. .v.func = stac92hd71bxx_fixup_hp,
  2169. },
  2170. };
  2171. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2172. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2173. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2174. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2175. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2176. { .id = STAC_HP_M4, .name = "hp-m4" },
  2177. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2178. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2179. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2180. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2181. {}
  2182. };
  2183. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2184. /* SigmaTel reference board */
  2185. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2186. "DFI LanParty", STAC_92HD71BXX_REF),
  2187. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2188. "DFI LanParty", STAC_92HD71BXX_REF),
  2189. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2190. "HP", STAC_HP_DV5),
  2191. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2192. "HP", STAC_HP_DV5),
  2193. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2194. "HP dv4-7", STAC_HP_DV4),
  2195. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2196. "HP dv4-7", STAC_HP_DV5),
  2197. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2198. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2199. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2200. "HP mini 1000", STAC_HP_M4),
  2201. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2202. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2203. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2204. "HP dv6", STAC_HP_DV5),
  2205. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2206. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2207. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2208. "HP DV6", STAC_HP_DV5),
  2209. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2210. "HP", STAC_HP_DV5),
  2211. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2212. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2213. "unknown Dell", STAC_DELL_M4_1),
  2214. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2215. "unknown Dell", STAC_DELL_M4_1),
  2216. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2217. "unknown Dell", STAC_DELL_M4_1),
  2218. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2219. "unknown Dell", STAC_DELL_M4_1),
  2220. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2221. "unknown Dell", STAC_DELL_M4_1),
  2222. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2223. "unknown Dell", STAC_DELL_M4_1),
  2224. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2225. "unknown Dell", STAC_DELL_M4_1),
  2226. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2227. "unknown Dell", STAC_DELL_M4_2),
  2228. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2229. "unknown Dell", STAC_DELL_M4_2),
  2230. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2231. "unknown Dell", STAC_DELL_M4_2),
  2232. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2233. "unknown Dell", STAC_DELL_M4_2),
  2234. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2235. "unknown Dell", STAC_DELL_M4_3),
  2236. {} /* terminator */
  2237. };
  2238. static const struct hda_pintbl ref922x_pin_configs[] = {
  2239. { 0x0a, 0x01014010 },
  2240. { 0x0b, 0x01016011 },
  2241. { 0x0c, 0x01012012 },
  2242. { 0x0d, 0x0221401f },
  2243. { 0x0e, 0x01813122 },
  2244. { 0x0f, 0x01011014 },
  2245. { 0x10, 0x01441030 },
  2246. { 0x11, 0x01c41030 },
  2247. { 0x15, 0x40000100 },
  2248. { 0x1b, 0x40000100 },
  2249. {}
  2250. };
  2251. /*
  2252. STAC 922X pin configs for
  2253. 102801A7
  2254. 102801AB
  2255. 102801A9
  2256. 102801D1
  2257. 102801D2
  2258. */
  2259. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2260. { 0x0a, 0x02214030 },
  2261. { 0x0b, 0x01a19021 },
  2262. { 0x0c, 0x01111012 },
  2263. { 0x0d, 0x01114010 },
  2264. { 0x0e, 0x02a19020 },
  2265. { 0x0f, 0x01117011 },
  2266. { 0x10, 0x400001f0 },
  2267. { 0x11, 0x400001f1 },
  2268. { 0x15, 0x01813122 },
  2269. { 0x1b, 0x400001f2 },
  2270. {}
  2271. };
  2272. /*
  2273. STAC 922X pin configs for
  2274. 102801AC
  2275. 102801D0
  2276. */
  2277. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  2278. { 0x0a, 0x02214030 },
  2279. { 0x0b, 0x01a19021 },
  2280. { 0x0c, 0x01111012 },
  2281. { 0x0d, 0x01114010 },
  2282. { 0x0e, 0x02a19020 },
  2283. { 0x0f, 0x01117011 },
  2284. { 0x10, 0x01451140 },
  2285. { 0x11, 0x400001f0 },
  2286. { 0x15, 0x01813122 },
  2287. { 0x1b, 0x400001f1 },
  2288. {}
  2289. };
  2290. /*
  2291. STAC 922X pin configs for
  2292. 102801BF
  2293. */
  2294. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  2295. { 0x0a, 0x0321101f },
  2296. { 0x0b, 0x01112024 },
  2297. { 0x0c, 0x01111222 },
  2298. { 0x0d, 0x91174220 },
  2299. { 0x0e, 0x03a11050 },
  2300. { 0x0f, 0x01116221 },
  2301. { 0x10, 0x90a70330 },
  2302. { 0x11, 0x01452340 },
  2303. { 0x15, 0x40C003f1 },
  2304. { 0x1b, 0x405003f0 },
  2305. {}
  2306. };
  2307. /*
  2308. STAC 9221 A1 pin configs for
  2309. 102801D7 (Dell XPS M1210)
  2310. */
  2311. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  2312. { 0x0a, 0x02211211 },
  2313. { 0x0b, 0x408103ff },
  2314. { 0x0c, 0x02a1123e },
  2315. { 0x0d, 0x90100310 },
  2316. { 0x0e, 0x408003f1 },
  2317. { 0x0f, 0x0221121f },
  2318. { 0x10, 0x03451340 },
  2319. { 0x11, 0x40c003f2 },
  2320. { 0x15, 0x508003f3 },
  2321. { 0x1b, 0x405003f4 },
  2322. {}
  2323. };
  2324. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  2325. { 0x0a, 0x0221401f },
  2326. { 0x0b, 0x01a19022 },
  2327. { 0x0c, 0x01813021 },
  2328. { 0x0d, 0x01014010 },
  2329. { 0x0e, 0x40000100 },
  2330. { 0x0f, 0x40000100 },
  2331. { 0x10, 0x40000100 },
  2332. { 0x11, 0x40000100 },
  2333. { 0x15, 0x02a19120 },
  2334. { 0x1b, 0x40000100 },
  2335. {}
  2336. };
  2337. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  2338. { 0x0a, 0x0221401f },
  2339. { 0x0b, 0x01011012 },
  2340. { 0x0c, 0x01813024 },
  2341. { 0x0d, 0x01014010 },
  2342. { 0x0e, 0x01a19021 },
  2343. { 0x0f, 0x01016011 },
  2344. { 0x10, 0x01452130 },
  2345. { 0x11, 0x40000100 },
  2346. { 0x15, 0x02a19320 },
  2347. { 0x1b, 0x40000100 },
  2348. {}
  2349. };
  2350. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  2351. { 0x0a, 0x0121e21f },
  2352. { 0x0b, 0x400000ff },
  2353. { 0x0c, 0x9017e110 },
  2354. { 0x0d, 0x400000fd },
  2355. { 0x0e, 0x400000fe },
  2356. { 0x0f, 0x0181e020 },
  2357. { 0x10, 0x1145e030 },
  2358. { 0x11, 0x11c5e240 },
  2359. { 0x15, 0x400000fc },
  2360. { 0x1b, 0x400000fb },
  2361. {}
  2362. };
  2363. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  2364. { 0x0a, 0x0121e21f },
  2365. { 0x0b, 0x90a7012e },
  2366. { 0x0c, 0x9017e110 },
  2367. { 0x0d, 0x400000fd },
  2368. { 0x0e, 0x400000fe },
  2369. { 0x0f, 0x0181e020 },
  2370. { 0x10, 0x1145e230 },
  2371. { 0x11, 0x500000fa },
  2372. { 0x15, 0x400000fc },
  2373. { 0x1b, 0x400000fb },
  2374. {}
  2375. };
  2376. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  2377. { 0x0a, 0x0121e21f },
  2378. { 0x0b, 0x90a7012e },
  2379. { 0x0c, 0x9017e110 },
  2380. { 0x0d, 0x400000fd },
  2381. { 0x0e, 0x400000fe },
  2382. { 0x0f, 0x0181e020 },
  2383. { 0x10, 0x1145e230 },
  2384. { 0x11, 0x11c5e240 },
  2385. { 0x15, 0x400000fc },
  2386. { 0x1b, 0x400000fb },
  2387. {}
  2388. };
  2389. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  2390. { 0x0a, 0x0321e21f },
  2391. { 0x0b, 0x03a1e02e },
  2392. { 0x0c, 0x9017e110 },
  2393. { 0x0d, 0x9017e11f },
  2394. { 0x0e, 0x400000fe },
  2395. { 0x0f, 0x0381e020 },
  2396. { 0x10, 0x1345e230 },
  2397. { 0x11, 0x13c5e240 },
  2398. { 0x15, 0x400000fc },
  2399. { 0x1b, 0x400000fb },
  2400. {}
  2401. };
  2402. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  2403. { 0x0a, 0x0321e21f },
  2404. { 0x0b, 0x03a1e02e },
  2405. { 0x0c, 0x9017e110 },
  2406. { 0x0d, 0x9017e11f },
  2407. { 0x0e, 0x400000fe },
  2408. { 0x0f, 0x0381e020 },
  2409. { 0x10, 0x1345e230 },
  2410. { 0x11, 0x13c5e240 },
  2411. { 0x15, 0x400000fc },
  2412. { 0x1b, 0x400000fb },
  2413. {}
  2414. };
  2415. static const struct hda_pintbl ecs202_pin_configs[] = {
  2416. { 0x0a, 0x0221401f },
  2417. { 0x0b, 0x02a19020 },
  2418. { 0x0c, 0x01a19020 },
  2419. { 0x0d, 0x01114010 },
  2420. { 0x0e, 0x408000f0 },
  2421. { 0x0f, 0x01813022 },
  2422. { 0x10, 0x074510a0 },
  2423. { 0x11, 0x40c400f1 },
  2424. { 0x15, 0x9037012e },
  2425. { 0x1b, 0x40e000f2 },
  2426. {}
  2427. };
  2428. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  2429. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  2430. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  2431. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  2432. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  2433. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  2434. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  2435. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  2436. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  2437. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  2438. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  2439. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  2440. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  2441. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  2442. {}
  2443. };
  2444. static const struct hda_fixup stac922x_fixups[];
  2445. /* remap the fixup from codec SSID and apply it */
  2446. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  2447. const struct hda_fixup *fix,
  2448. int action)
  2449. {
  2450. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2451. return;
  2452. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  2453. stac922x_fixups);
  2454. if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
  2455. snd_hda_apply_fixup(codec, action);
  2456. }
  2457. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  2458. const struct hda_fixup *fix,
  2459. int action)
  2460. {
  2461. struct sigmatel_spec *spec = codec->spec;
  2462. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2463. spec->gpio_mask = spec->gpio_dir = 0x03;
  2464. spec->gpio_data = 0x03;
  2465. }
  2466. }
  2467. static const struct hda_fixup stac922x_fixups[] = {
  2468. [STAC_D945_REF] = {
  2469. .type = HDA_FIXUP_PINS,
  2470. .v.pins = ref922x_pin_configs,
  2471. },
  2472. [STAC_D945GTP3] = {
  2473. .type = HDA_FIXUP_PINS,
  2474. .v.pins = d945gtp3_pin_configs,
  2475. },
  2476. [STAC_D945GTP5] = {
  2477. .type = HDA_FIXUP_PINS,
  2478. .v.pins = d945gtp5_pin_configs,
  2479. },
  2480. [STAC_INTEL_MAC_AUTO] = {
  2481. .type = HDA_FIXUP_FUNC,
  2482. .v.func = stac922x_fixup_intel_mac_auto,
  2483. },
  2484. [STAC_INTEL_MAC_V1] = {
  2485. .type = HDA_FIXUP_PINS,
  2486. .v.pins = intel_mac_v1_pin_configs,
  2487. .chained = true,
  2488. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2489. },
  2490. [STAC_INTEL_MAC_V2] = {
  2491. .type = HDA_FIXUP_PINS,
  2492. .v.pins = intel_mac_v2_pin_configs,
  2493. .chained = true,
  2494. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2495. },
  2496. [STAC_INTEL_MAC_V3] = {
  2497. .type = HDA_FIXUP_PINS,
  2498. .v.pins = intel_mac_v3_pin_configs,
  2499. .chained = true,
  2500. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2501. },
  2502. [STAC_INTEL_MAC_V4] = {
  2503. .type = HDA_FIXUP_PINS,
  2504. .v.pins = intel_mac_v4_pin_configs,
  2505. .chained = true,
  2506. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2507. },
  2508. [STAC_INTEL_MAC_V5] = {
  2509. .type = HDA_FIXUP_PINS,
  2510. .v.pins = intel_mac_v5_pin_configs,
  2511. .chained = true,
  2512. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2513. },
  2514. [STAC_922X_INTEL_MAC_GPIO] = {
  2515. .type = HDA_FIXUP_FUNC,
  2516. .v.func = stac922x_fixup_intel_mac_gpio,
  2517. },
  2518. [STAC_ECS_202] = {
  2519. .type = HDA_FIXUP_PINS,
  2520. .v.pins = ecs202_pin_configs,
  2521. },
  2522. [STAC_922X_DELL_D81] = {
  2523. .type = HDA_FIXUP_PINS,
  2524. .v.pins = dell_922x_d81_pin_configs,
  2525. },
  2526. [STAC_922X_DELL_D82] = {
  2527. .type = HDA_FIXUP_PINS,
  2528. .v.pins = dell_922x_d82_pin_configs,
  2529. },
  2530. [STAC_922X_DELL_M81] = {
  2531. .type = HDA_FIXUP_PINS,
  2532. .v.pins = dell_922x_m81_pin_configs,
  2533. },
  2534. [STAC_922X_DELL_M82] = {
  2535. .type = HDA_FIXUP_PINS,
  2536. .v.pins = dell_922x_m82_pin_configs,
  2537. },
  2538. };
  2539. static const struct hda_model_fixup stac922x_models[] = {
  2540. { .id = STAC_D945_REF, .name = "ref" },
  2541. { .id = STAC_D945GTP5, .name = "5stack" },
  2542. { .id = STAC_D945GTP3, .name = "3stack" },
  2543. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  2544. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  2545. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  2546. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  2547. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  2548. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  2549. { .id = STAC_ECS_202, .name = "ecs202" },
  2550. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  2551. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  2552. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  2553. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  2554. /* for backward compatibility */
  2555. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  2556. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  2557. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  2558. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  2559. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  2560. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  2561. {}
  2562. };
  2563. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  2564. /* SigmaTel reference board */
  2565. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2566. "DFI LanParty", STAC_D945_REF),
  2567. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2568. "DFI LanParty", STAC_D945_REF),
  2569. /* Intel 945G based systems */
  2570. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  2571. "Intel D945G", STAC_D945GTP3),
  2572. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  2573. "Intel D945G", STAC_D945GTP3),
  2574. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  2575. "Intel D945G", STAC_D945GTP3),
  2576. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  2577. "Intel D945G", STAC_D945GTP3),
  2578. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  2579. "Intel D945G", STAC_D945GTP3),
  2580. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  2581. "Intel D945G", STAC_D945GTP3),
  2582. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  2583. "Intel D945G", STAC_D945GTP3),
  2584. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  2585. "Intel D945G", STAC_D945GTP3),
  2586. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  2587. "Intel D945G", STAC_D945GTP3),
  2588. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  2589. "Intel D945G", STAC_D945GTP3),
  2590. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  2591. "Intel D945G", STAC_D945GTP3),
  2592. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  2593. "Intel D945G", STAC_D945GTP3),
  2594. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  2595. "Intel D945G", STAC_D945GTP3),
  2596. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  2597. "Intel D945G", STAC_D945GTP3),
  2598. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  2599. "Intel D945G", STAC_D945GTP3),
  2600. /* Intel D945G 5-stack systems */
  2601. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  2602. "Intel D945G", STAC_D945GTP5),
  2603. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  2604. "Intel D945G", STAC_D945GTP5),
  2605. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  2606. "Intel D945G", STAC_D945GTP5),
  2607. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  2608. "Intel D945G", STAC_D945GTP5),
  2609. /* Intel 945P based systems */
  2610. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  2611. "Intel D945P", STAC_D945GTP3),
  2612. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  2613. "Intel D945P", STAC_D945GTP3),
  2614. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  2615. "Intel D945P", STAC_D945GTP3),
  2616. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  2617. "Intel D945P", STAC_D945GTP3),
  2618. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  2619. "Intel D945P", STAC_D945GTP3),
  2620. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  2621. "Intel D945P", STAC_D945GTP5),
  2622. /* other intel */
  2623. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  2624. "Intel D945", STAC_D945_REF),
  2625. /* other systems */
  2626. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  2627. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  2628. /* Dell systems */
  2629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  2630. "unknown Dell", STAC_922X_DELL_D81),
  2631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  2632. "unknown Dell", STAC_922X_DELL_D81),
  2633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  2634. "unknown Dell", STAC_922X_DELL_D81),
  2635. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  2636. "unknown Dell", STAC_922X_DELL_D82),
  2637. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  2638. "unknown Dell", STAC_922X_DELL_M81),
  2639. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  2640. "unknown Dell", STAC_922X_DELL_D82),
  2641. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  2642. "unknown Dell", STAC_922X_DELL_D81),
  2643. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  2644. "unknown Dell", STAC_922X_DELL_D81),
  2645. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  2646. "Dell XPS M1210", STAC_922X_DELL_M82),
  2647. /* ECS/PC Chips boards */
  2648. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  2649. "ECS/PC chips", STAC_ECS_202),
  2650. {} /* terminator */
  2651. };
  2652. static const struct hda_pintbl ref927x_pin_configs[] = {
  2653. { 0x0a, 0x02214020 },
  2654. { 0x0b, 0x02a19080 },
  2655. { 0x0c, 0x0181304e },
  2656. { 0x0d, 0x01014010 },
  2657. { 0x0e, 0x01a19040 },
  2658. { 0x0f, 0x01011012 },
  2659. { 0x10, 0x01016011 },
  2660. { 0x11, 0x0101201f },
  2661. { 0x12, 0x183301f0 },
  2662. { 0x13, 0x18a001f0 },
  2663. { 0x14, 0x18a001f0 },
  2664. { 0x21, 0x01442070 },
  2665. { 0x22, 0x01c42190 },
  2666. { 0x23, 0x40000100 },
  2667. {}
  2668. };
  2669. static const struct hda_pintbl d965_3st_pin_configs[] = {
  2670. { 0x0a, 0x0221401f },
  2671. { 0x0b, 0x02a19120 },
  2672. { 0x0c, 0x40000100 },
  2673. { 0x0d, 0x01014011 },
  2674. { 0x0e, 0x01a19021 },
  2675. { 0x0f, 0x01813024 },
  2676. { 0x10, 0x40000100 },
  2677. { 0x11, 0x40000100 },
  2678. { 0x12, 0x40000100 },
  2679. { 0x13, 0x40000100 },
  2680. { 0x14, 0x40000100 },
  2681. { 0x21, 0x40000100 },
  2682. { 0x22, 0x40000100 },
  2683. { 0x23, 0x40000100 },
  2684. {}
  2685. };
  2686. static const struct hda_pintbl d965_5st_pin_configs[] = {
  2687. { 0x0a, 0x02214020 },
  2688. { 0x0b, 0x02a19080 },
  2689. { 0x0c, 0x0181304e },
  2690. { 0x0d, 0x01014010 },
  2691. { 0x0e, 0x01a19040 },
  2692. { 0x0f, 0x01011012 },
  2693. { 0x10, 0x01016011 },
  2694. { 0x11, 0x40000100 },
  2695. { 0x12, 0x40000100 },
  2696. { 0x13, 0x40000100 },
  2697. { 0x14, 0x40000100 },
  2698. { 0x21, 0x01442070 },
  2699. { 0x22, 0x40000100 },
  2700. { 0x23, 0x40000100 },
  2701. {}
  2702. };
  2703. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  2704. { 0x0a, 0x40000100 },
  2705. { 0x0b, 0x40000100 },
  2706. { 0x0c, 0x0181304e },
  2707. { 0x0d, 0x01014010 },
  2708. { 0x0e, 0x01a19040 },
  2709. { 0x0f, 0x01011012 },
  2710. { 0x10, 0x01016011 },
  2711. { 0x11, 0x40000100 },
  2712. { 0x12, 0x40000100 },
  2713. { 0x13, 0x40000100 },
  2714. { 0x14, 0x40000100 },
  2715. { 0x21, 0x01442070 },
  2716. { 0x22, 0x40000100 },
  2717. { 0x23, 0x40000100 },
  2718. {}
  2719. };
  2720. static const struct hda_pintbl dell_3st_pin_configs[] = {
  2721. { 0x0a, 0x02211230 },
  2722. { 0x0b, 0x02a11220 },
  2723. { 0x0c, 0x01a19040 },
  2724. { 0x0d, 0x01114210 },
  2725. { 0x0e, 0x01111212 },
  2726. { 0x0f, 0x01116211 },
  2727. { 0x10, 0x01813050 },
  2728. { 0x11, 0x01112214 },
  2729. { 0x12, 0x403003fa },
  2730. { 0x13, 0x90a60040 },
  2731. { 0x14, 0x90a60040 },
  2732. { 0x21, 0x404003fb },
  2733. { 0x22, 0x40c003fc },
  2734. { 0x23, 0x40000100 },
  2735. {}
  2736. };
  2737. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  2738. const struct hda_fixup *fix, int action)
  2739. {
  2740. /* no jack detecion for ref-no-jd model */
  2741. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  2742. codec->no_jack_detect = 1;
  2743. }
  2744. static void stac927x_fixup_ref(struct hda_codec *codec,
  2745. const struct hda_fixup *fix, int action)
  2746. {
  2747. struct sigmatel_spec *spec = codec->spec;
  2748. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2749. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  2750. spec->eapd_mask = spec->gpio_mask = 0;
  2751. spec->gpio_dir = spec->gpio_data = 0;
  2752. }
  2753. }
  2754. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  2755. const struct hda_fixup *fix, int action)
  2756. {
  2757. struct sigmatel_spec *spec = codec->spec;
  2758. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2759. return;
  2760. if (codec->subsystem_id != 0x1028022f) {
  2761. /* GPIO2 High = Enable EAPD */
  2762. spec->eapd_mask = spec->gpio_mask = 0x04;
  2763. spec->gpio_dir = spec->gpio_data = 0x04;
  2764. }
  2765. snd_hda_add_verbs(codec, dell_3st_core_init);
  2766. spec->volknob_init = 1;
  2767. }
  2768. static void stac927x_fixup_volknob(struct hda_codec *codec,
  2769. const struct hda_fixup *fix, int action)
  2770. {
  2771. struct sigmatel_spec *spec = codec->spec;
  2772. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2773. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  2774. spec->volknob_init = 1;
  2775. }
  2776. }
  2777. static const struct hda_fixup stac927x_fixups[] = {
  2778. [STAC_D965_REF_NO_JD] = {
  2779. .type = HDA_FIXUP_FUNC,
  2780. .v.func = stac927x_fixup_ref_no_jd,
  2781. .chained = true,
  2782. .chain_id = STAC_D965_REF,
  2783. },
  2784. [STAC_D965_REF] = {
  2785. .type = HDA_FIXUP_FUNC,
  2786. .v.func = stac927x_fixup_ref,
  2787. },
  2788. [STAC_D965_3ST] = {
  2789. .type = HDA_FIXUP_PINS,
  2790. .v.pins = d965_3st_pin_configs,
  2791. .chained = true,
  2792. .chain_id = STAC_D965_VERBS,
  2793. },
  2794. [STAC_D965_5ST] = {
  2795. .type = HDA_FIXUP_PINS,
  2796. .v.pins = d965_5st_pin_configs,
  2797. .chained = true,
  2798. .chain_id = STAC_D965_VERBS,
  2799. },
  2800. [STAC_D965_VERBS] = {
  2801. .type = HDA_FIXUP_VERBS,
  2802. .v.verbs = d965_core_init,
  2803. },
  2804. [STAC_D965_5ST_NO_FP] = {
  2805. .type = HDA_FIXUP_PINS,
  2806. .v.pins = d965_5st_no_fp_pin_configs,
  2807. },
  2808. [STAC_DELL_3ST] = {
  2809. .type = HDA_FIXUP_PINS,
  2810. .v.pins = dell_3st_pin_configs,
  2811. .chained = true,
  2812. .chain_id = STAC_927X_DELL_DMIC,
  2813. },
  2814. [STAC_DELL_BIOS] = {
  2815. .type = HDA_FIXUP_PINS,
  2816. .v.pins = (const struct hda_pintbl[]) {
  2817. /* configure the analog microphone on some laptops */
  2818. { 0x0c, 0x90a79130 },
  2819. /* correct the front output jack as a hp out */
  2820. { 0x0f, 0x0227011f },
  2821. /* correct the front input jack as a mic */
  2822. { 0x0e, 0x02a79130 },
  2823. {}
  2824. },
  2825. .chained = true,
  2826. .chain_id = STAC_927X_DELL_DMIC,
  2827. },
  2828. [STAC_DELL_BIOS_SPDIF] = {
  2829. .type = HDA_FIXUP_PINS,
  2830. .v.pins = (const struct hda_pintbl[]) {
  2831. /* correct the device field to SPDIF out */
  2832. { 0x21, 0x01442070 },
  2833. {}
  2834. },
  2835. .chained = true,
  2836. .chain_id = STAC_DELL_BIOS,
  2837. },
  2838. [STAC_927X_DELL_DMIC] = {
  2839. .type = HDA_FIXUP_FUNC,
  2840. .v.func = stac927x_fixup_dell_dmic,
  2841. },
  2842. [STAC_927X_VOLKNOB] = {
  2843. .type = HDA_FIXUP_FUNC,
  2844. .v.func = stac927x_fixup_volknob,
  2845. },
  2846. };
  2847. static const struct hda_model_fixup stac927x_models[] = {
  2848. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  2849. { .id = STAC_D965_REF, .name = "ref" },
  2850. { .id = STAC_D965_3ST, .name = "3stack" },
  2851. { .id = STAC_D965_5ST, .name = "5stack" },
  2852. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  2853. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  2854. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  2855. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  2856. {}
  2857. };
  2858. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  2859. /* SigmaTel reference board */
  2860. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2861. "DFI LanParty", STAC_D965_REF),
  2862. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2863. "DFI LanParty", STAC_D965_REF),
  2864. /* Intel 946 based systems */
  2865. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  2866. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  2867. /* 965 based 3 stack systems */
  2868. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  2869. "Intel D965", STAC_D965_3ST),
  2870. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  2871. "Intel D965", STAC_D965_3ST),
  2872. /* Dell 3 stack systems */
  2873. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  2874. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  2875. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  2876. /* Dell 3 stack systems with verb table in BIOS */
  2877. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  2878. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  2879. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  2880. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  2881. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  2882. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  2883. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  2884. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  2885. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  2886. /* 965 based 5 stack systems */
  2887. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  2888. "Intel D965", STAC_D965_5ST),
  2889. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  2890. "Intel D965", STAC_D965_5ST),
  2891. /* volume-knob fixes */
  2892. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  2893. {} /* terminator */
  2894. };
  2895. static const struct hda_pintbl ref9205_pin_configs[] = {
  2896. { 0x0a, 0x40000100 },
  2897. { 0x0b, 0x40000100 },
  2898. { 0x0c, 0x01016011 },
  2899. { 0x0d, 0x01014010 },
  2900. { 0x0e, 0x01813122 },
  2901. { 0x0f, 0x01a19021 },
  2902. { 0x14, 0x01019020 },
  2903. { 0x16, 0x40000100 },
  2904. { 0x17, 0x90a000f0 },
  2905. { 0x18, 0x90a000f0 },
  2906. { 0x21, 0x01441030 },
  2907. { 0x22, 0x01c41030 },
  2908. {}
  2909. };
  2910. /*
  2911. STAC 9205 pin configs for
  2912. 102801F1
  2913. 102801F2
  2914. 102801FC
  2915. 102801FD
  2916. 10280204
  2917. 1028021F
  2918. 10280228 (Dell Vostro 1500)
  2919. 10280229 (Dell Vostro 1700)
  2920. */
  2921. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  2922. { 0x0a, 0x0321101F },
  2923. { 0x0b, 0x03A11020 },
  2924. { 0x0c, 0x400003FA },
  2925. { 0x0d, 0x90170310 },
  2926. { 0x0e, 0x400003FB },
  2927. { 0x0f, 0x400003FC },
  2928. { 0x14, 0x400003FD },
  2929. { 0x16, 0x40F000F9 },
  2930. { 0x17, 0x90A60330 },
  2931. { 0x18, 0x400003FF },
  2932. { 0x21, 0x0144131F },
  2933. { 0x22, 0x40C003FE },
  2934. {}
  2935. };
  2936. /*
  2937. STAC 9205 pin configs for
  2938. 102801F9
  2939. 102801FA
  2940. 102801FE
  2941. 102801FF (Dell Precision M4300)
  2942. 10280206
  2943. 10280200
  2944. 10280201
  2945. */
  2946. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  2947. { 0x0a, 0x0321101f },
  2948. { 0x0b, 0x03a11020 },
  2949. { 0x0c, 0x90a70330 },
  2950. { 0x0d, 0x90170310 },
  2951. { 0x0e, 0x400000fe },
  2952. { 0x0f, 0x400000ff },
  2953. { 0x14, 0x400000fd },
  2954. { 0x16, 0x40f000f9 },
  2955. { 0x17, 0x400000fa },
  2956. { 0x18, 0x400000fc },
  2957. { 0x21, 0x0144131f },
  2958. { 0x22, 0x40c003f8 },
  2959. /* Enable SPDIF in/out */
  2960. { 0x1f, 0x01441030 },
  2961. { 0x20, 0x1c410030 },
  2962. {}
  2963. };
  2964. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  2965. { 0x0a, 0x0421101f },
  2966. { 0x0b, 0x04a11020 },
  2967. { 0x0c, 0x400003fa },
  2968. { 0x0d, 0x90170310 },
  2969. { 0x0e, 0x400003fb },
  2970. { 0x0f, 0x400003fc },
  2971. { 0x14, 0x400003fd },
  2972. { 0x16, 0x400003f9 },
  2973. { 0x17, 0x90a60330 },
  2974. { 0x18, 0x400003ff },
  2975. { 0x21, 0x01441340 },
  2976. { 0x22, 0x40c003fe },
  2977. {}
  2978. };
  2979. static void stac9205_fixup_ref(struct hda_codec *codec,
  2980. const struct hda_fixup *fix, int action)
  2981. {
  2982. struct sigmatel_spec *spec = codec->spec;
  2983. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2984. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  2985. /* SPDIF-In enabled */
  2986. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  2987. }
  2988. }
  2989. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  2990. const struct hda_fixup *fix, int action)
  2991. {
  2992. struct sigmatel_spec *spec = codec->spec;
  2993. struct hda_jack_tbl *jack;
  2994. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2995. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  2996. /* Enable unsol response for GPIO4/Dock HP connection */
  2997. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2998. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  2999. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  3000. STAC_VREF_EVENT,
  3001. stac_vref_event);
  3002. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  3003. if (jack)
  3004. jack->private_data = 0x01;
  3005. spec->gpio_dir = 0x0b;
  3006. spec->eapd_mask = 0x01;
  3007. spec->gpio_mask = 0x1b;
  3008. spec->gpio_mute = 0x10;
  3009. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3010. * GPIO3 Low = DRM
  3011. */
  3012. spec->gpio_data = 0x01;
  3013. }
  3014. }
  3015. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3016. const struct hda_fixup *fix, int action)
  3017. {
  3018. struct sigmatel_spec *spec = codec->spec;
  3019. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3020. spec->eapd_switch = 0;
  3021. }
  3022. static const struct hda_fixup stac9205_fixups[] = {
  3023. [STAC_9205_REF] = {
  3024. .type = HDA_FIXUP_FUNC,
  3025. .v.func = stac9205_fixup_ref,
  3026. },
  3027. [STAC_9205_DELL_M42] = {
  3028. .type = HDA_FIXUP_PINS,
  3029. .v.pins = dell_9205_m42_pin_configs,
  3030. },
  3031. [STAC_9205_DELL_M43] = {
  3032. .type = HDA_FIXUP_FUNC,
  3033. .v.func = stac9205_fixup_dell_m43,
  3034. },
  3035. [STAC_9205_DELL_M44] = {
  3036. .type = HDA_FIXUP_PINS,
  3037. .v.pins = dell_9205_m44_pin_configs,
  3038. },
  3039. [STAC_9205_EAPD] = {
  3040. .type = HDA_FIXUP_FUNC,
  3041. .v.func = stac9205_fixup_eapd,
  3042. },
  3043. {}
  3044. };
  3045. static const struct hda_model_fixup stac9205_models[] = {
  3046. { .id = STAC_9205_REF, .name = "ref" },
  3047. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3048. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3049. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3050. { .id = STAC_9205_EAPD, .name = "eapd" },
  3051. {}
  3052. };
  3053. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3054. /* SigmaTel reference board */
  3055. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3056. "DFI LanParty", STAC_9205_REF),
  3057. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3058. "SigmaTel", STAC_9205_REF),
  3059. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3060. "DFI LanParty", STAC_9205_REF),
  3061. /* Dell */
  3062. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3063. "unknown Dell", STAC_9205_DELL_M42),
  3064. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3065. "unknown Dell", STAC_9205_DELL_M42),
  3066. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3067. "Dell Precision", STAC_9205_DELL_M43),
  3068. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3069. "Dell Precision", STAC_9205_DELL_M43),
  3070. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3071. "Dell Precision", STAC_9205_DELL_M43),
  3072. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3073. "unknown Dell", STAC_9205_DELL_M42),
  3074. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3075. "unknown Dell", STAC_9205_DELL_M42),
  3076. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3077. "Dell Precision", STAC_9205_DELL_M43),
  3078. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3079. "Dell Precision M4300", STAC_9205_DELL_M43),
  3080. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3081. "unknown Dell", STAC_9205_DELL_M42),
  3082. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3083. "Dell Precision", STAC_9205_DELL_M43),
  3084. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3085. "Dell Precision", STAC_9205_DELL_M43),
  3086. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3087. "Dell Precision", STAC_9205_DELL_M43),
  3088. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3089. "Dell Inspiron", STAC_9205_DELL_M44),
  3090. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3091. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3092. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3093. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3094. /* Gateway */
  3095. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3096. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3097. {} /* terminator */
  3098. };
  3099. static int stac_parse_auto_config(struct hda_codec *codec)
  3100. {
  3101. struct sigmatel_spec *spec = codec->spec;
  3102. int err;
  3103. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  3104. if (err < 0)
  3105. return err;
  3106. /* add hooks */
  3107. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3108. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3109. spec->gen.automute_hook = stac_update_outputs;
  3110. spec->gen.hp_automute_hook = stac_hp_automute;
  3111. spec->gen.line_automute_hook = stac_line_automute;
  3112. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3113. if (err < 0)
  3114. return err;
  3115. /* minimum value is actually mute */
  3116. spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
  3117. /* setup analog beep controls */
  3118. if (spec->anabeep_nid > 0) {
  3119. err = stac_auto_create_beep_ctls(codec,
  3120. spec->anabeep_nid);
  3121. if (err < 0)
  3122. return err;
  3123. }
  3124. /* setup digital beep controls and input device */
  3125. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3126. if (spec->digbeep_nid > 0) {
  3127. hda_nid_t nid = spec->digbeep_nid;
  3128. unsigned int caps;
  3129. err = stac_auto_create_beep_ctls(codec, nid);
  3130. if (err < 0)
  3131. return err;
  3132. err = snd_hda_attach_beep_device(codec, nid);
  3133. if (err < 0)
  3134. return err;
  3135. if (codec->beep) {
  3136. /* IDT/STAC codecs have linear beep tone parameter */
  3137. codec->beep->linear_tone = spec->linear_tone_beep;
  3138. /* if no beep switch is available, make its own one */
  3139. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3140. if (!(caps & AC_AMPCAP_MUTE)) {
  3141. err = stac_beep_switch_ctl(codec);
  3142. if (err < 0)
  3143. return err;
  3144. }
  3145. }
  3146. }
  3147. #endif
  3148. if (spec->gpio_led)
  3149. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3150. if (spec->aloopback_ctl &&
  3151. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3152. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3153. return -ENOMEM;
  3154. }
  3155. stac_init_power_map(codec);
  3156. return 0;
  3157. }
  3158. static int stac_init(struct hda_codec *codec)
  3159. {
  3160. struct sigmatel_spec *spec = codec->spec;
  3161. unsigned int gpio;
  3162. int i;
  3163. /* override some hints */
  3164. stac_store_hints(codec);
  3165. /* set up GPIO */
  3166. gpio = spec->gpio_data;
  3167. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3168. * otherwise, unsol event will turn it on/off dynamically
  3169. */
  3170. if (!spec->eapd_switch)
  3171. gpio |= spec->eapd_mask;
  3172. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
  3173. snd_hda_gen_init(codec);
  3174. /* sync the power-map */
  3175. if (spec->num_pwrs)
  3176. snd_hda_codec_write(codec, codec->afg, 0,
  3177. AC_VERB_IDT_SET_POWER_MAP,
  3178. spec->power_map_bits);
  3179. /* power down inactive ADCs */
  3180. if (spec->powerdown_adcs) {
  3181. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3182. if (spec->active_adcs & (1 << i))
  3183. continue;
  3184. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3185. AC_VERB_SET_POWER_STATE,
  3186. AC_PWRST_D3);
  3187. }
  3188. }
  3189. /* power down unused DACs */
  3190. for (i = 0; i < spec->gen.num_all_dacs; i++) {
  3191. if (!snd_hda_get_nid_path(codec, spec->gen.all_dacs[i], 0))
  3192. snd_hda_codec_write(codec, spec->gen.all_dacs[i], 0,
  3193. AC_VERB_SET_POWER_STATE,
  3194. AC_PWRST_D3);
  3195. }
  3196. return 0;
  3197. }
  3198. static void stac_shutup(struct hda_codec *codec)
  3199. {
  3200. struct sigmatel_spec *spec = codec->spec;
  3201. snd_hda_shutup_pins(codec);
  3202. if (spec->eapd_mask)
  3203. stac_gpio_set(codec, spec->gpio_mask,
  3204. spec->gpio_dir, spec->gpio_data &
  3205. ~spec->eapd_mask);
  3206. }
  3207. static void stac_free(struct hda_codec *codec)
  3208. {
  3209. struct sigmatel_spec *spec = codec->spec;
  3210. if (!spec)
  3211. return;
  3212. snd_hda_gen_spec_free(&spec->gen);
  3213. kfree(spec);
  3214. snd_hda_detach_beep_device(codec);
  3215. }
  3216. #ifdef CONFIG_PROC_FS
  3217. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3218. struct hda_codec *codec, hda_nid_t nid)
  3219. {
  3220. if (nid == codec->afg)
  3221. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3222. snd_hda_codec_read(codec, nid, 0,
  3223. AC_VERB_IDT_GET_POWER_MAP, 0));
  3224. }
  3225. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  3226. struct hda_codec *codec,
  3227. unsigned int verb)
  3228. {
  3229. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  3230. snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
  3231. }
  3232. /* stac92hd71bxx, stac92hd73xx */
  3233. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  3234. struct hda_codec *codec, hda_nid_t nid)
  3235. {
  3236. stac92hd_proc_hook(buffer, codec, nid);
  3237. if (nid == codec->afg)
  3238. analog_loop_proc_hook(buffer, codec, 0xfa0);
  3239. }
  3240. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  3241. struct hda_codec *codec, hda_nid_t nid)
  3242. {
  3243. if (nid == codec->afg)
  3244. analog_loop_proc_hook(buffer, codec, 0xfe0);
  3245. }
  3246. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  3247. struct hda_codec *codec, hda_nid_t nid)
  3248. {
  3249. if (nid == codec->afg)
  3250. analog_loop_proc_hook(buffer, codec, 0xfeb);
  3251. }
  3252. #else
  3253. #define stac92hd_proc_hook NULL
  3254. #define stac92hd7x_proc_hook NULL
  3255. #define stac9205_proc_hook NULL
  3256. #define stac927x_proc_hook NULL
  3257. #endif
  3258. #ifdef CONFIG_PM
  3259. static int stac_resume(struct hda_codec *codec)
  3260. {
  3261. codec->patch_ops.init(codec);
  3262. snd_hda_codec_resume_amp(codec);
  3263. snd_hda_codec_resume_cache(codec);
  3264. return 0;
  3265. }
  3266. static int stac_suspend(struct hda_codec *codec)
  3267. {
  3268. stac_shutup(codec);
  3269. return 0;
  3270. }
  3271. static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  3272. unsigned int power_state)
  3273. {
  3274. unsigned int afg_power_state = power_state;
  3275. struct sigmatel_spec *spec = codec->spec;
  3276. if (power_state == AC_PWRST_D3) {
  3277. if (spec->vref_mute_led_nid) {
  3278. /* with vref-out pin used for mute led control
  3279. * codec AFG is prevented from D3 state
  3280. */
  3281. afg_power_state = AC_PWRST_D1;
  3282. }
  3283. /* this delay seems necessary to avoid click noise at power-down */
  3284. msleep(100);
  3285. }
  3286. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
  3287. afg_power_state);
  3288. snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
  3289. }
  3290. #else
  3291. #define stac_suspend NULL
  3292. #define stac_resume NULL
  3293. #define stac_set_power_state NULL
  3294. #endif /* CONFIG_PM */
  3295. static const struct hda_codec_ops stac_patch_ops = {
  3296. .build_controls = snd_hda_gen_build_controls,
  3297. .build_pcms = snd_hda_gen_build_pcms,
  3298. .init = stac_init,
  3299. .free = stac_free,
  3300. .unsol_event = snd_hda_jack_unsol_event,
  3301. #ifdef CONFIG_PM
  3302. .suspend = stac_suspend,
  3303. .resume = stac_resume,
  3304. #endif
  3305. .reboot_notify = stac_shutup,
  3306. };
  3307. static int alloc_stac_spec(struct hda_codec *codec)
  3308. {
  3309. struct sigmatel_spec *spec;
  3310. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  3311. if (!spec)
  3312. return -ENOMEM;
  3313. snd_hda_gen_spec_init(&spec->gen);
  3314. codec->spec = spec;
  3315. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  3316. return 0;
  3317. }
  3318. static int patch_stac9200(struct hda_codec *codec)
  3319. {
  3320. struct sigmatel_spec *spec;
  3321. int err;
  3322. err = alloc_stac_spec(codec);
  3323. if (err < 0)
  3324. return err;
  3325. spec = codec->spec;
  3326. spec->linear_tone_beep = 1;
  3327. spec->gen.own_eapd_ctl = 1;
  3328. codec->patch_ops = stac_patch_ops;
  3329. snd_hda_add_verbs(codec, stac9200_eapd_init);
  3330. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  3331. stac9200_fixups);
  3332. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3333. err = stac_parse_auto_config(codec);
  3334. if (err < 0) {
  3335. stac_free(codec);
  3336. return err;
  3337. }
  3338. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3339. return 0;
  3340. }
  3341. static int patch_stac925x(struct hda_codec *codec)
  3342. {
  3343. struct sigmatel_spec *spec;
  3344. int err;
  3345. err = alloc_stac_spec(codec);
  3346. if (err < 0)
  3347. return err;
  3348. spec = codec->spec;
  3349. spec->linear_tone_beep = 1;
  3350. spec->gen.own_eapd_ctl = 1;
  3351. codec->patch_ops = stac_patch_ops;
  3352. snd_hda_add_verbs(codec, stac925x_core_init);
  3353. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  3354. stac925x_fixups);
  3355. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3356. err = stac_parse_auto_config(codec);
  3357. if (err < 0) {
  3358. stac_free(codec);
  3359. return err;
  3360. }
  3361. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3362. return 0;
  3363. }
  3364. static int patch_stac92hd73xx(struct hda_codec *codec)
  3365. {
  3366. struct sigmatel_spec *spec;
  3367. int err;
  3368. int num_dacs;
  3369. err = alloc_stac_spec(codec);
  3370. if (err < 0)
  3371. return err;
  3372. spec = codec->spec;
  3373. spec->linear_tone_beep = 0;
  3374. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  3375. if (num_dacs < 3 || num_dacs > 5) {
  3376. printk(KERN_WARNING "hda_codec: Could not determine "
  3377. "number of channels defaulting to DAC count\n");
  3378. num_dacs = 5;
  3379. }
  3380. switch (num_dacs) {
  3381. case 0x3: /* 6 Channel */
  3382. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  3383. break;
  3384. case 0x4: /* 8 Channel */
  3385. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  3386. break;
  3387. case 0x5: /* 10 Channel */
  3388. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  3389. break;
  3390. }
  3391. spec->aloopback_mask = 0x01;
  3392. spec->aloopback_shift = 8;
  3393. spec->digbeep_nid = 0x1c;
  3394. /* GPIO0 High = Enable EAPD */
  3395. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3396. spec->gpio_data = 0x01;
  3397. spec->eapd_switch = 1;
  3398. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  3399. spec->pwr_nids = stac92hd73xx_pwr_nids;
  3400. spec->gen.own_eapd_ctl = 1;
  3401. codec->patch_ops = stac_patch_ops;
  3402. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  3403. stac92hd73xx_fixups);
  3404. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3405. if (!spec->volknob_init)
  3406. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  3407. err = stac_parse_auto_config(codec);
  3408. if (err < 0) {
  3409. stac_free(codec);
  3410. return err;
  3411. }
  3412. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3413. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3414. return 0;
  3415. }
  3416. static void stac_setup_gpio(struct hda_codec *codec)
  3417. {
  3418. struct sigmatel_spec *spec = codec->spec;
  3419. if (spec->gpio_led) {
  3420. if (!spec->vref_mute_led_nid) {
  3421. spec->gpio_mask |= spec->gpio_led;
  3422. spec->gpio_dir |= spec->gpio_led;
  3423. spec->gpio_data |= spec->gpio_led;
  3424. } else {
  3425. codec->patch_ops.set_power_state =
  3426. stac_set_power_state;
  3427. }
  3428. }
  3429. if (spec->mic_mute_led_gpio) {
  3430. spec->gpio_mask |= spec->mic_mute_led_gpio;
  3431. spec->gpio_dir |= spec->mic_mute_led_gpio;
  3432. spec->mic_mute_led_on = true;
  3433. spec->gpio_data |= spec->mic_mute_led_gpio;
  3434. spec->gen.cap_sync_hook = stac_capture_led_hook;
  3435. }
  3436. }
  3437. static int patch_stac92hd83xxx(struct hda_codec *codec)
  3438. {
  3439. struct sigmatel_spec *spec;
  3440. int err;
  3441. err = alloc_stac_spec(codec);
  3442. if (err < 0)
  3443. return err;
  3444. codec->epss = 0; /* longer delay needed for D3 */
  3445. spec = codec->spec;
  3446. spec->linear_tone_beep = 0;
  3447. spec->gen.own_eapd_ctl = 1;
  3448. spec->digbeep_nid = 0x21;
  3449. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  3450. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  3451. spec->default_polarity = -1; /* no default cfg */
  3452. codec->patch_ops = stac_patch_ops;
  3453. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  3454. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  3455. stac92hd83xxx_fixups);
  3456. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3457. stac_setup_gpio(codec);
  3458. err = stac_parse_auto_config(codec);
  3459. if (err < 0) {
  3460. stac_free(codec);
  3461. return err;
  3462. }
  3463. codec->proc_widget_hook = stac92hd_proc_hook;
  3464. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3465. return 0;
  3466. }
  3467. static int patch_stac92hd71bxx(struct hda_codec *codec)
  3468. {
  3469. struct sigmatel_spec *spec;
  3470. const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
  3471. int err;
  3472. err = alloc_stac_spec(codec);
  3473. if (err < 0)
  3474. return err;
  3475. spec = codec->spec;
  3476. spec->linear_tone_beep = 0;
  3477. spec->gen.own_eapd_ctl = 1;
  3478. codec->patch_ops = stac_patch_ops;
  3479. /* GPIO0 = EAPD */
  3480. spec->gpio_mask = 0x01;
  3481. spec->gpio_dir = 0x01;
  3482. spec->gpio_data = 0x01;
  3483. switch (codec->vendor_id) {
  3484. case 0x111d76b6: /* 4 Port without Analog Mixer */
  3485. case 0x111d76b7:
  3486. unmute_init++;
  3487. break;
  3488. case 0x111d7608: /* 5 Port with Analog Mixer */
  3489. if ((codec->revision_id & 0xf) == 0 ||
  3490. (codec->revision_id & 0xf) == 1)
  3491. spec->stream_delay = 40; /* 40 milliseconds */
  3492. /* disable VSW */
  3493. unmute_init++;
  3494. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  3495. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  3496. break;
  3497. case 0x111d7603: /* 6 Port with Analog Mixer */
  3498. if ((codec->revision_id & 0xf) == 1)
  3499. spec->stream_delay = 40; /* 40 milliseconds */
  3500. break;
  3501. }
  3502. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  3503. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  3504. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
  3505. snd_hda_sequence_write_cache(codec, unmute_init);
  3506. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  3507. spec->aloopback_mask = 0x50;
  3508. spec->aloopback_shift = 0;
  3509. spec->powerdown_adcs = 1;
  3510. spec->digbeep_nid = 0x26;
  3511. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  3512. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  3513. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  3514. stac92hd71bxx_fixups);
  3515. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3516. stac_setup_gpio(codec);
  3517. err = stac_parse_auto_config(codec);
  3518. if (err < 0) {
  3519. stac_free(codec);
  3520. return err;
  3521. }
  3522. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3523. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3524. return 0;
  3525. }
  3526. static int patch_stac922x(struct hda_codec *codec)
  3527. {
  3528. struct sigmatel_spec *spec;
  3529. int err;
  3530. err = alloc_stac_spec(codec);
  3531. if (err < 0)
  3532. return err;
  3533. spec = codec->spec;
  3534. spec->linear_tone_beep = 1;
  3535. spec->gen.own_eapd_ctl = 1;
  3536. codec->patch_ops = stac_patch_ops;
  3537. snd_hda_add_verbs(codec, stac922x_core_init);
  3538. /* Fix Mux capture level; max to 2 */
  3539. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  3540. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  3541. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  3542. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  3543. (0 << AC_AMPCAP_MUTE_SHIFT));
  3544. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  3545. stac922x_fixups);
  3546. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3547. err = stac_parse_auto_config(codec);
  3548. if (err < 0) {
  3549. stac_free(codec);
  3550. return err;
  3551. }
  3552. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3553. return 0;
  3554. }
  3555. static int patch_stac927x(struct hda_codec *codec)
  3556. {
  3557. struct sigmatel_spec *spec;
  3558. int err;
  3559. err = alloc_stac_spec(codec);
  3560. if (err < 0)
  3561. return err;
  3562. spec = codec->spec;
  3563. spec->linear_tone_beep = 1;
  3564. spec->gen.own_eapd_ctl = 1;
  3565. spec->digbeep_nid = 0x23;
  3566. /* GPIO0 High = Enable EAPD */
  3567. spec->eapd_mask = spec->gpio_mask = 0x01;
  3568. spec->gpio_dir = spec->gpio_data = 0x01;
  3569. spec->aloopback_ctl = &stac927x_loopback;
  3570. spec->aloopback_mask = 0x40;
  3571. spec->aloopback_shift = 0;
  3572. spec->eapd_switch = 1;
  3573. codec->patch_ops = stac_patch_ops;
  3574. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  3575. stac927x_fixups);
  3576. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3577. if (!spec->volknob_init)
  3578. snd_hda_add_verbs(codec, stac927x_core_init);
  3579. err = stac_parse_auto_config(codec);
  3580. if (err < 0) {
  3581. stac_free(codec);
  3582. return err;
  3583. }
  3584. codec->proc_widget_hook = stac927x_proc_hook;
  3585. /*
  3586. * !!FIXME!!
  3587. * The STAC927x seem to require fairly long delays for certain
  3588. * command sequences. With too short delays (even if the answer
  3589. * is set to RIRB properly), it results in the silence output
  3590. * on some hardwares like Dell.
  3591. *
  3592. * The below flag enables the longer delay (see get_response
  3593. * in hda_intel.c).
  3594. */
  3595. codec->bus->needs_damn_long_delay = 1;
  3596. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3597. return 0;
  3598. }
  3599. static int patch_stac9205(struct hda_codec *codec)
  3600. {
  3601. struct sigmatel_spec *spec;
  3602. int err;
  3603. err = alloc_stac_spec(codec);
  3604. if (err < 0)
  3605. return err;
  3606. spec = codec->spec;
  3607. spec->linear_tone_beep = 1;
  3608. spec->gen.own_eapd_ctl = 1;
  3609. spec->digbeep_nid = 0x23;
  3610. snd_hda_add_verbs(codec, stac9205_core_init);
  3611. spec->aloopback_ctl = &stac9205_loopback;
  3612. spec->aloopback_mask = 0x40;
  3613. spec->aloopback_shift = 0;
  3614. /* GPIO0 High = EAPD */
  3615. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3616. spec->gpio_data = 0x01;
  3617. /* Turn on/off EAPD per HP plugging */
  3618. spec->eapd_switch = 1;
  3619. codec->patch_ops = stac_patch_ops;
  3620. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  3621. stac9205_fixups);
  3622. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3623. err = stac_parse_auto_config(codec);
  3624. if (err < 0) {
  3625. stac_free(codec);
  3626. return err;
  3627. }
  3628. codec->proc_widget_hook = stac9205_proc_hook;
  3629. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3630. return 0;
  3631. }
  3632. /*
  3633. * STAC9872 hack
  3634. */
  3635. static const struct hda_verb stac9872_core_init[] = {
  3636. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  3637. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  3638. {}
  3639. };
  3640. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  3641. { 0x0a, 0x03211020 },
  3642. { 0x0b, 0x411111f0 },
  3643. { 0x0c, 0x411111f0 },
  3644. { 0x0d, 0x03a15030 },
  3645. { 0x0e, 0x411111f0 },
  3646. { 0x0f, 0x90170110 },
  3647. { 0x11, 0x411111f0 },
  3648. { 0x13, 0x411111f0 },
  3649. { 0x14, 0x90a7013e },
  3650. {}
  3651. };
  3652. static const struct hda_model_fixup stac9872_models[] = {
  3653. { .id = STAC_9872_VAIO, .name = "vaio" },
  3654. {}
  3655. };
  3656. static const struct hda_fixup stac9872_fixups[] = {
  3657. [STAC_9872_VAIO] = {
  3658. .type = HDA_FIXUP_PINS,
  3659. .v.pins = stac9872_vaio_pin_configs,
  3660. },
  3661. };
  3662. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  3663. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  3664. "Sony VAIO F/S", STAC_9872_VAIO),
  3665. {} /* terminator */
  3666. };
  3667. static int patch_stac9872(struct hda_codec *codec)
  3668. {
  3669. struct sigmatel_spec *spec;
  3670. int err;
  3671. err = alloc_stac_spec(codec);
  3672. if (err < 0)
  3673. return err;
  3674. spec = codec->spec;
  3675. spec->linear_tone_beep = 1;
  3676. spec->gen.own_eapd_ctl = 1;
  3677. codec->patch_ops = stac_patch_ops;
  3678. snd_hda_add_verbs(codec, stac9872_core_init);
  3679. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  3680. stac9872_fixups);
  3681. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3682. err = stac_parse_auto_config(codec);
  3683. if (err < 0) {
  3684. stac_free(codec);
  3685. return -EINVAL;
  3686. }
  3687. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3688. return 0;
  3689. }
  3690. /*
  3691. * patch entries
  3692. */
  3693. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  3694. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  3695. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  3696. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  3697. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  3698. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  3699. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  3700. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  3701. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  3702. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  3703. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  3704. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  3705. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  3706. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  3707. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  3708. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  3709. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  3710. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  3711. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  3712. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  3713. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  3714. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  3715. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  3716. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  3717. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  3718. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  3719. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  3720. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  3721. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  3722. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  3723. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  3724. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  3725. /* The following does not take into account .id=0x83847661 when subsys =
  3726. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  3727. * currently not fully supported.
  3728. */
  3729. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  3730. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  3731. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  3732. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  3733. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  3734. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  3735. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  3736. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  3737. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  3738. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  3739. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  3740. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  3741. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  3742. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  3743. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  3744. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  3745. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  3746. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  3747. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  3748. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  3749. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  3750. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  3751. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  3752. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  3753. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  3754. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  3755. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  3756. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3757. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3758. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3759. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3760. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3761. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3762. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3763. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3764. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  3765. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  3766. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  3767. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  3768. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  3769. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  3770. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  3771. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  3772. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  3773. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  3774. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  3775. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  3776. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  3777. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  3778. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  3779. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  3780. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  3781. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  3782. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  3783. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  3784. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  3785. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  3786. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  3787. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  3788. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  3789. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  3790. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  3791. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  3792. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  3793. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  3794. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  3795. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  3796. {} /* terminator */
  3797. };
  3798. MODULE_ALIAS("snd-hda-codec-id:8384*");
  3799. MODULE_ALIAS("snd-hda-codec-id:111d*");
  3800. MODULE_LICENSE("GPL");
  3801. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  3802. static struct hda_codec_preset_list sigmatel_list = {
  3803. .preset = snd_hda_preset_sigmatel,
  3804. .owner = THIS_MODULE,
  3805. };
  3806. static int __init patch_sigmatel_init(void)
  3807. {
  3808. return snd_hda_add_codec_preset(&sigmatel_list);
  3809. }
  3810. static void __exit patch_sigmatel_exit(void)
  3811. {
  3812. snd_hda_delete_codec_preset(&sigmatel_list);
  3813. }
  3814. module_init(patch_sigmatel_init)
  3815. module_exit(patch_sigmatel_exit)