ab8500-core.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266
  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6. * Author: Rabin Vincent <rabin.vincent@stericsson.com>
  7. * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/init.h>
  12. #include <linux/irq.h>
  13. #include <linux/delay.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/mfd/abx500.h>
  19. #include <linux/mfd/abx500/ab8500.h>
  20. #include <linux/regulator/ab8500.h>
  21. /*
  22. * Interrupt register offsets
  23. * Bank : 0x0E
  24. */
  25. #define AB8500_IT_SOURCE1_REG 0x00
  26. #define AB8500_IT_SOURCE2_REG 0x01
  27. #define AB8500_IT_SOURCE3_REG 0x02
  28. #define AB8500_IT_SOURCE4_REG 0x03
  29. #define AB8500_IT_SOURCE5_REG 0x04
  30. #define AB8500_IT_SOURCE6_REG 0x05
  31. #define AB8500_IT_SOURCE7_REG 0x06
  32. #define AB8500_IT_SOURCE8_REG 0x07
  33. #define AB9540_IT_SOURCE13_REG 0x0C
  34. #define AB8500_IT_SOURCE19_REG 0x12
  35. #define AB8500_IT_SOURCE20_REG 0x13
  36. #define AB8500_IT_SOURCE21_REG 0x14
  37. #define AB8500_IT_SOURCE22_REG 0x15
  38. #define AB8500_IT_SOURCE23_REG 0x16
  39. #define AB8500_IT_SOURCE24_REG 0x17
  40. /*
  41. * latch registers
  42. */
  43. #define AB8500_IT_LATCH1_REG 0x20
  44. #define AB8500_IT_LATCH2_REG 0x21
  45. #define AB8500_IT_LATCH3_REG 0x22
  46. #define AB8500_IT_LATCH4_REG 0x23
  47. #define AB8500_IT_LATCH5_REG 0x24
  48. #define AB8500_IT_LATCH6_REG 0x25
  49. #define AB8500_IT_LATCH7_REG 0x26
  50. #define AB8500_IT_LATCH8_REG 0x27
  51. #define AB8500_IT_LATCH9_REG 0x28
  52. #define AB8500_IT_LATCH10_REG 0x29
  53. #define AB8500_IT_LATCH12_REG 0x2B
  54. #define AB9540_IT_LATCH13_REG 0x2C
  55. #define AB8500_IT_LATCH19_REG 0x32
  56. #define AB8500_IT_LATCH20_REG 0x33
  57. #define AB8500_IT_LATCH21_REG 0x34
  58. #define AB8500_IT_LATCH22_REG 0x35
  59. #define AB8500_IT_LATCH23_REG 0x36
  60. #define AB8500_IT_LATCH24_REG 0x37
  61. /*
  62. * mask registers
  63. */
  64. #define AB8500_IT_MASK1_REG 0x40
  65. #define AB8500_IT_MASK2_REG 0x41
  66. #define AB8500_IT_MASK3_REG 0x42
  67. #define AB8500_IT_MASK4_REG 0x43
  68. #define AB8500_IT_MASK5_REG 0x44
  69. #define AB8500_IT_MASK6_REG 0x45
  70. #define AB8500_IT_MASK7_REG 0x46
  71. #define AB8500_IT_MASK8_REG 0x47
  72. #define AB8500_IT_MASK9_REG 0x48
  73. #define AB8500_IT_MASK10_REG 0x49
  74. #define AB8500_IT_MASK11_REG 0x4A
  75. #define AB8500_IT_MASK12_REG 0x4B
  76. #define AB8500_IT_MASK13_REG 0x4C
  77. #define AB8500_IT_MASK14_REG 0x4D
  78. #define AB8500_IT_MASK15_REG 0x4E
  79. #define AB8500_IT_MASK16_REG 0x4F
  80. #define AB8500_IT_MASK17_REG 0x50
  81. #define AB8500_IT_MASK18_REG 0x51
  82. #define AB8500_IT_MASK19_REG 0x52
  83. #define AB8500_IT_MASK20_REG 0x53
  84. #define AB8500_IT_MASK21_REG 0x54
  85. #define AB8500_IT_MASK22_REG 0x55
  86. #define AB8500_IT_MASK23_REG 0x56
  87. #define AB8500_IT_MASK24_REG 0x57
  88. #define AB8500_REV_REG 0x80
  89. #define AB8500_IC_NAME_REG 0x82
  90. #define AB8500_SWITCH_OFF_STATUS 0x00
  91. #define AB8500_TURN_ON_STATUS 0x00
  92. static bool no_bm; /* No battery management */
  93. module_param(no_bm, bool, S_IRUGO);
  94. #define AB9540_MODEM_CTRL2_REG 0x23
  95. #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
  96. /*
  97. * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
  98. * numbers are indexed into this array with (num / 8). The interupts are
  99. * defined in linux/mfd/ab8500.h
  100. *
  101. * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
  102. * offset 0.
  103. */
  104. /* AB8500 support */
  105. static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
  106. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
  107. };
  108. /* AB9540 support */
  109. static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
  110. 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24,
  111. };
  112. static const char ab8500_version_str[][7] = {
  113. [AB8500_VERSION_AB8500] = "AB8500",
  114. [AB8500_VERSION_AB8505] = "AB8505",
  115. [AB8500_VERSION_AB9540] = "AB9540",
  116. [AB8500_VERSION_AB8540] = "AB8540",
  117. };
  118. static int ab8500_get_chip_id(struct device *dev)
  119. {
  120. struct ab8500 *ab8500;
  121. if (!dev)
  122. return -EINVAL;
  123. ab8500 = dev_get_drvdata(dev->parent);
  124. return ab8500 ? (int)ab8500->chip_id : -EINVAL;
  125. }
  126. static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  127. u8 reg, u8 data)
  128. {
  129. int ret;
  130. /*
  131. * Put the u8 bank and u8 register together into a an u16.
  132. * The bank on higher 8 bits and register in lower 8 bits.
  133. * */
  134. u16 addr = ((u16)bank) << 8 | reg;
  135. dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
  136. mutex_lock(&ab8500->lock);
  137. ret = ab8500->write(ab8500, addr, data);
  138. if (ret < 0)
  139. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  140. addr, ret);
  141. mutex_unlock(&ab8500->lock);
  142. return ret;
  143. }
  144. static int ab8500_set_register(struct device *dev, u8 bank,
  145. u8 reg, u8 value)
  146. {
  147. int ret;
  148. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  149. atomic_inc(&ab8500->transfer_ongoing);
  150. ret = set_register_interruptible(ab8500, bank, reg, value);
  151. atomic_dec(&ab8500->transfer_ongoing);
  152. return ret;
  153. }
  154. static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
  155. u8 reg, u8 *value)
  156. {
  157. int ret;
  158. /* put the u8 bank and u8 reg together into a an u16.
  159. * bank on higher 8 bits and reg in lower */
  160. u16 addr = ((u16)bank) << 8 | reg;
  161. mutex_lock(&ab8500->lock);
  162. ret = ab8500->read(ab8500, addr);
  163. if (ret < 0)
  164. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  165. addr, ret);
  166. else
  167. *value = ret;
  168. mutex_unlock(&ab8500->lock);
  169. dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
  170. return ret;
  171. }
  172. static int ab8500_get_register(struct device *dev, u8 bank,
  173. u8 reg, u8 *value)
  174. {
  175. int ret;
  176. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  177. atomic_inc(&ab8500->transfer_ongoing);
  178. ret = get_register_interruptible(ab8500, bank, reg, value);
  179. atomic_dec(&ab8500->transfer_ongoing);
  180. return ret;
  181. }
  182. static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
  183. u8 reg, u8 bitmask, u8 bitvalues)
  184. {
  185. int ret;
  186. /* put the u8 bank and u8 reg together into a an u16.
  187. * bank on higher 8 bits and reg in lower */
  188. u16 addr = ((u16)bank) << 8 | reg;
  189. mutex_lock(&ab8500->lock);
  190. if (ab8500->write_masked == NULL) {
  191. u8 data;
  192. ret = ab8500->read(ab8500, addr);
  193. if (ret < 0) {
  194. dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
  195. addr, ret);
  196. goto out;
  197. }
  198. data = (u8)ret;
  199. data = (~bitmask & data) | (bitmask & bitvalues);
  200. ret = ab8500->write(ab8500, addr, data);
  201. if (ret < 0)
  202. dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
  203. addr, ret);
  204. dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
  205. data);
  206. goto out;
  207. }
  208. ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
  209. if (ret < 0)
  210. dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
  211. ret);
  212. out:
  213. mutex_unlock(&ab8500->lock);
  214. return ret;
  215. }
  216. static int ab8500_mask_and_set_register(struct device *dev,
  217. u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
  218. {
  219. int ret;
  220. struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
  221. atomic_inc(&ab8500->transfer_ongoing);
  222. ret= mask_and_set_register_interruptible(ab8500, bank, reg,
  223. bitmask, bitvalues);
  224. atomic_dec(&ab8500->transfer_ongoing);
  225. return ret;
  226. }
  227. static struct abx500_ops ab8500_ops = {
  228. .get_chip_id = ab8500_get_chip_id,
  229. .get_register = ab8500_get_register,
  230. .set_register = ab8500_set_register,
  231. .get_register_page = NULL,
  232. .set_register_page = NULL,
  233. .mask_and_set_register = ab8500_mask_and_set_register,
  234. .event_registers_startup_state_get = NULL,
  235. .startup_irq_enabled = NULL,
  236. };
  237. static void ab8500_irq_lock(struct irq_data *data)
  238. {
  239. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  240. mutex_lock(&ab8500->irq_lock);
  241. atomic_inc(&ab8500->transfer_ongoing);
  242. }
  243. static void ab8500_irq_sync_unlock(struct irq_data *data)
  244. {
  245. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  246. int i;
  247. for (i = 0; i < ab8500->mask_size; i++) {
  248. u8 old = ab8500->oldmask[i];
  249. u8 new = ab8500->mask[i];
  250. int reg;
  251. if (new == old)
  252. continue;
  253. /*
  254. * Interrupt register 12 doesn't exist prior to AB8500 version
  255. * 2.0
  256. */
  257. if (ab8500->irq_reg_offset[i] == 11 &&
  258. is_ab8500_1p1_or_earlier(ab8500))
  259. continue;
  260. ab8500->oldmask[i] = new;
  261. reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
  262. set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
  263. }
  264. atomic_dec(&ab8500->transfer_ongoing);
  265. mutex_unlock(&ab8500->irq_lock);
  266. }
  267. static void ab8500_irq_mask(struct irq_data *data)
  268. {
  269. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  270. int offset = data->irq - ab8500->irq_base;
  271. int index = offset / 8;
  272. int mask = 1 << (offset % 8);
  273. ab8500->mask[index] |= mask;
  274. }
  275. static void ab8500_irq_unmask(struct irq_data *data)
  276. {
  277. struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
  278. int offset = data->irq - ab8500->irq_base;
  279. int index = offset / 8;
  280. int mask = 1 << (offset % 8);
  281. ab8500->mask[index] &= ~mask;
  282. }
  283. static struct irq_chip ab8500_irq_chip = {
  284. .name = "ab8500",
  285. .irq_bus_lock = ab8500_irq_lock,
  286. .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
  287. .irq_mask = ab8500_irq_mask,
  288. .irq_disable = ab8500_irq_mask,
  289. .irq_unmask = ab8500_irq_unmask,
  290. };
  291. static irqreturn_t ab8500_irq(int irq, void *dev)
  292. {
  293. struct ab8500 *ab8500 = dev;
  294. int i;
  295. dev_vdbg(ab8500->dev, "interrupt\n");
  296. atomic_inc(&ab8500->transfer_ongoing);
  297. for (i = 0; i < ab8500->mask_size; i++) {
  298. int regoffset = ab8500->irq_reg_offset[i];
  299. int status;
  300. u8 value;
  301. /*
  302. * Interrupt register 12 doesn't exist prior to AB8500 version
  303. * 2.0
  304. */
  305. if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500))
  306. continue;
  307. status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
  308. AB8500_IT_LATCH1_REG + regoffset, &value);
  309. if (status < 0 || value == 0)
  310. continue;
  311. do {
  312. int bit = __ffs(value);
  313. int line = i * 8 + bit;
  314. handle_nested_irq(ab8500->irq_base + line);
  315. value &= ~(1 << bit);
  316. } while (value);
  317. }
  318. atomic_dec(&ab8500->transfer_ongoing);
  319. return IRQ_HANDLED;
  320. }
  321. static int ab8500_irq_init(struct ab8500 *ab8500)
  322. {
  323. int base = ab8500->irq_base;
  324. int irq;
  325. int num_irqs;
  326. if (is_ab9540(ab8500))
  327. num_irqs = AB9540_NR_IRQS;
  328. else if (is_ab8505(ab8500))
  329. num_irqs = AB8505_NR_IRQS;
  330. else
  331. num_irqs = AB8500_NR_IRQS;
  332. for (irq = base; irq < base + num_irqs; irq++) {
  333. irq_set_chip_data(irq, ab8500);
  334. irq_set_chip_and_handler(irq, &ab8500_irq_chip,
  335. handle_simple_irq);
  336. irq_set_nested_thread(irq, 1);
  337. #ifdef CONFIG_ARM
  338. set_irq_flags(irq, IRQF_VALID);
  339. #else
  340. irq_set_noprobe(irq);
  341. #endif
  342. }
  343. return 0;
  344. }
  345. static void ab8500_irq_remove(struct ab8500 *ab8500)
  346. {
  347. int base = ab8500->irq_base;
  348. int irq;
  349. int num_irqs;
  350. if (is_ab9540(ab8500))
  351. num_irqs = AB9540_NR_IRQS;
  352. else if (is_ab8505(ab8500))
  353. num_irqs = AB8505_NR_IRQS;
  354. else
  355. num_irqs = AB8500_NR_IRQS;
  356. for (irq = base; irq < base + num_irqs; irq++) {
  357. #ifdef CONFIG_ARM
  358. set_irq_flags(irq, 0);
  359. #endif
  360. irq_set_chip_and_handler(irq, NULL, NULL);
  361. irq_set_chip_data(irq, NULL);
  362. }
  363. }
  364. int ab8500_suspend(struct ab8500 *ab8500)
  365. {
  366. if (atomic_read(&ab8500->transfer_ongoing))
  367. return -EINVAL;
  368. else
  369. return 0;
  370. }
  371. /* AB8500 GPIO Resources */
  372. static struct resource __devinitdata ab8500_gpio_resources[] = {
  373. {
  374. .name = "GPIO_INT6",
  375. .start = AB8500_INT_GPIO6R,
  376. .end = AB8500_INT_GPIO41F,
  377. .flags = IORESOURCE_IRQ,
  378. }
  379. };
  380. /* AB9540 GPIO Resources */
  381. static struct resource __devinitdata ab9540_gpio_resources[] = {
  382. {
  383. .name = "GPIO_INT6",
  384. .start = AB8500_INT_GPIO6R,
  385. .end = AB8500_INT_GPIO41F,
  386. .flags = IORESOURCE_IRQ,
  387. },
  388. {
  389. .name = "GPIO_INT14",
  390. .start = AB9540_INT_GPIO50R,
  391. .end = AB9540_INT_GPIO54R,
  392. .flags = IORESOURCE_IRQ,
  393. },
  394. {
  395. .name = "GPIO_INT15",
  396. .start = AB9540_INT_GPIO50F,
  397. .end = AB9540_INT_GPIO54F,
  398. .flags = IORESOURCE_IRQ,
  399. }
  400. };
  401. static struct resource __devinitdata ab8500_gpadc_resources[] = {
  402. {
  403. .name = "HW_CONV_END",
  404. .start = AB8500_INT_GP_HW_ADC_CONV_END,
  405. .end = AB8500_INT_GP_HW_ADC_CONV_END,
  406. .flags = IORESOURCE_IRQ,
  407. },
  408. {
  409. .name = "SW_CONV_END",
  410. .start = AB8500_INT_GP_SW_ADC_CONV_END,
  411. .end = AB8500_INT_GP_SW_ADC_CONV_END,
  412. .flags = IORESOURCE_IRQ,
  413. },
  414. };
  415. static struct resource __devinitdata ab8500_rtc_resources[] = {
  416. {
  417. .name = "60S",
  418. .start = AB8500_INT_RTC_60S,
  419. .end = AB8500_INT_RTC_60S,
  420. .flags = IORESOURCE_IRQ,
  421. },
  422. {
  423. .name = "ALARM",
  424. .start = AB8500_INT_RTC_ALARM,
  425. .end = AB8500_INT_RTC_ALARM,
  426. .flags = IORESOURCE_IRQ,
  427. },
  428. };
  429. static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
  430. {
  431. .name = "ONKEY_DBF",
  432. .start = AB8500_INT_PON_KEY1DB_F,
  433. .end = AB8500_INT_PON_KEY1DB_F,
  434. .flags = IORESOURCE_IRQ,
  435. },
  436. {
  437. .name = "ONKEY_DBR",
  438. .start = AB8500_INT_PON_KEY1DB_R,
  439. .end = AB8500_INT_PON_KEY1DB_R,
  440. .flags = IORESOURCE_IRQ,
  441. },
  442. };
  443. static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
  444. {
  445. .name = "ACC_DETECT_1DB_F",
  446. .start = AB8500_INT_ACC_DETECT_1DB_F,
  447. .end = AB8500_INT_ACC_DETECT_1DB_F,
  448. .flags = IORESOURCE_IRQ,
  449. },
  450. {
  451. .name = "ACC_DETECT_1DB_R",
  452. .start = AB8500_INT_ACC_DETECT_1DB_R,
  453. .end = AB8500_INT_ACC_DETECT_1DB_R,
  454. .flags = IORESOURCE_IRQ,
  455. },
  456. {
  457. .name = "ACC_DETECT_21DB_F",
  458. .start = AB8500_INT_ACC_DETECT_21DB_F,
  459. .end = AB8500_INT_ACC_DETECT_21DB_F,
  460. .flags = IORESOURCE_IRQ,
  461. },
  462. {
  463. .name = "ACC_DETECT_21DB_R",
  464. .start = AB8500_INT_ACC_DETECT_21DB_R,
  465. .end = AB8500_INT_ACC_DETECT_21DB_R,
  466. .flags = IORESOURCE_IRQ,
  467. },
  468. {
  469. .name = "ACC_DETECT_22DB_F",
  470. .start = AB8500_INT_ACC_DETECT_22DB_F,
  471. .end = AB8500_INT_ACC_DETECT_22DB_F,
  472. .flags = IORESOURCE_IRQ,
  473. },
  474. {
  475. .name = "ACC_DETECT_22DB_R",
  476. .start = AB8500_INT_ACC_DETECT_22DB_R,
  477. .end = AB8500_INT_ACC_DETECT_22DB_R,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static struct resource __devinitdata ab8500_charger_resources[] = {
  482. {
  483. .name = "MAIN_CH_UNPLUG_DET",
  484. .start = AB8500_INT_MAIN_CH_UNPLUG_DET,
  485. .end = AB8500_INT_MAIN_CH_UNPLUG_DET,
  486. .flags = IORESOURCE_IRQ,
  487. },
  488. {
  489. .name = "MAIN_CHARGE_PLUG_DET",
  490. .start = AB8500_INT_MAIN_CH_PLUG_DET,
  491. .end = AB8500_INT_MAIN_CH_PLUG_DET,
  492. .flags = IORESOURCE_IRQ,
  493. },
  494. {
  495. .name = "VBUS_DET_R",
  496. .start = AB8500_INT_VBUS_DET_R,
  497. .end = AB8500_INT_VBUS_DET_R,
  498. .flags = IORESOURCE_IRQ,
  499. },
  500. {
  501. .name = "VBUS_DET_F",
  502. .start = AB8500_INT_VBUS_DET_F,
  503. .end = AB8500_INT_VBUS_DET_F,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. {
  507. .name = "USB_LINK_STATUS",
  508. .start = AB8500_INT_USB_LINK_STATUS,
  509. .end = AB8500_INT_USB_LINK_STATUS,
  510. .flags = IORESOURCE_IRQ,
  511. },
  512. {
  513. .name = "VBUS_OVV",
  514. .start = AB8500_INT_VBUS_OVV,
  515. .end = AB8500_INT_VBUS_OVV,
  516. .flags = IORESOURCE_IRQ,
  517. },
  518. {
  519. .name = "USB_CH_TH_PROT_R",
  520. .start = AB8500_INT_USB_CH_TH_PROT_R,
  521. .end = AB8500_INT_USB_CH_TH_PROT_R,
  522. .flags = IORESOURCE_IRQ,
  523. },
  524. {
  525. .name = "USB_CH_TH_PROT_F",
  526. .start = AB8500_INT_USB_CH_TH_PROT_F,
  527. .end = AB8500_INT_USB_CH_TH_PROT_F,
  528. .flags = IORESOURCE_IRQ,
  529. },
  530. {
  531. .name = "MAIN_EXT_CH_NOT_OK",
  532. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  533. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  534. .flags = IORESOURCE_IRQ,
  535. },
  536. {
  537. .name = "MAIN_CH_TH_PROT_R",
  538. .start = AB8500_INT_MAIN_CH_TH_PROT_R,
  539. .end = AB8500_INT_MAIN_CH_TH_PROT_R,
  540. .flags = IORESOURCE_IRQ,
  541. },
  542. {
  543. .name = "MAIN_CH_TH_PROT_F",
  544. .start = AB8500_INT_MAIN_CH_TH_PROT_F,
  545. .end = AB8500_INT_MAIN_CH_TH_PROT_F,
  546. .flags = IORESOURCE_IRQ,
  547. },
  548. {
  549. .name = "USB_CHARGER_NOT_OKR",
  550. .start = AB8500_INT_USB_CHARGER_NOT_OKR,
  551. .end = AB8500_INT_USB_CHARGER_NOT_OKR,
  552. .flags = IORESOURCE_IRQ,
  553. },
  554. {
  555. .name = "CH_WD_EXP",
  556. .start = AB8500_INT_CH_WD_EXP,
  557. .end = AB8500_INT_CH_WD_EXP,
  558. .flags = IORESOURCE_IRQ,
  559. },
  560. };
  561. static struct resource __devinitdata ab8500_btemp_resources[] = {
  562. {
  563. .name = "BAT_CTRL_INDB",
  564. .start = AB8500_INT_BAT_CTRL_INDB,
  565. .end = AB8500_INT_BAT_CTRL_INDB,
  566. .flags = IORESOURCE_IRQ,
  567. },
  568. {
  569. .name = "BTEMP_LOW",
  570. .start = AB8500_INT_BTEMP_LOW,
  571. .end = AB8500_INT_BTEMP_LOW,
  572. .flags = IORESOURCE_IRQ,
  573. },
  574. {
  575. .name = "BTEMP_HIGH",
  576. .start = AB8500_INT_BTEMP_HIGH,
  577. .end = AB8500_INT_BTEMP_HIGH,
  578. .flags = IORESOURCE_IRQ,
  579. },
  580. {
  581. .name = "BTEMP_LOW_MEDIUM",
  582. .start = AB8500_INT_BTEMP_LOW_MEDIUM,
  583. .end = AB8500_INT_BTEMP_LOW_MEDIUM,
  584. .flags = IORESOURCE_IRQ,
  585. },
  586. {
  587. .name = "BTEMP_MEDIUM_HIGH",
  588. .start = AB8500_INT_BTEMP_MEDIUM_HIGH,
  589. .end = AB8500_INT_BTEMP_MEDIUM_HIGH,
  590. .flags = IORESOURCE_IRQ,
  591. },
  592. };
  593. static struct resource __devinitdata ab8500_fg_resources[] = {
  594. {
  595. .name = "NCONV_ACCU",
  596. .start = AB8500_INT_CCN_CONV_ACC,
  597. .end = AB8500_INT_CCN_CONV_ACC,
  598. .flags = IORESOURCE_IRQ,
  599. },
  600. {
  601. .name = "BATT_OVV",
  602. .start = AB8500_INT_BATT_OVV,
  603. .end = AB8500_INT_BATT_OVV,
  604. .flags = IORESOURCE_IRQ,
  605. },
  606. {
  607. .name = "LOW_BAT_F",
  608. .start = AB8500_INT_LOW_BAT_F,
  609. .end = AB8500_INT_LOW_BAT_F,
  610. .flags = IORESOURCE_IRQ,
  611. },
  612. {
  613. .name = "LOW_BAT_R",
  614. .start = AB8500_INT_LOW_BAT_R,
  615. .end = AB8500_INT_LOW_BAT_R,
  616. .flags = IORESOURCE_IRQ,
  617. },
  618. {
  619. .name = "CC_INT_CALIB",
  620. .start = AB8500_INT_CC_INT_CALIB,
  621. .end = AB8500_INT_CC_INT_CALIB,
  622. .flags = IORESOURCE_IRQ,
  623. },
  624. {
  625. .name = "CCEOC",
  626. .start = AB8500_INT_CCEOC,
  627. .end = AB8500_INT_CCEOC,
  628. .flags = IORESOURCE_IRQ,
  629. },
  630. };
  631. static struct resource __devinitdata ab8500_chargalg_resources[] = {};
  632. #ifdef CONFIG_DEBUG_FS
  633. static struct resource __devinitdata ab8500_debug_resources[] = {
  634. {
  635. .name = "IRQ_FIRST",
  636. .start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  637. .end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
  638. .flags = IORESOURCE_IRQ,
  639. },
  640. {
  641. .name = "IRQ_LAST",
  642. .start = AB8500_INT_XTAL32K_KO,
  643. .end = AB8500_INT_XTAL32K_KO,
  644. .flags = IORESOURCE_IRQ,
  645. },
  646. };
  647. #endif
  648. static struct resource __devinitdata ab8500_usb_resources[] = {
  649. {
  650. .name = "ID_WAKEUP_R",
  651. .start = AB8500_INT_ID_WAKEUP_R,
  652. .end = AB8500_INT_ID_WAKEUP_R,
  653. .flags = IORESOURCE_IRQ,
  654. },
  655. {
  656. .name = "ID_WAKEUP_F",
  657. .start = AB8500_INT_ID_WAKEUP_F,
  658. .end = AB8500_INT_ID_WAKEUP_F,
  659. .flags = IORESOURCE_IRQ,
  660. },
  661. {
  662. .name = "VBUS_DET_F",
  663. .start = AB8500_INT_VBUS_DET_F,
  664. .end = AB8500_INT_VBUS_DET_F,
  665. .flags = IORESOURCE_IRQ,
  666. },
  667. {
  668. .name = "VBUS_DET_R",
  669. .start = AB8500_INT_VBUS_DET_R,
  670. .end = AB8500_INT_VBUS_DET_R,
  671. .flags = IORESOURCE_IRQ,
  672. },
  673. {
  674. .name = "USB_LINK_STATUS",
  675. .start = AB8500_INT_USB_LINK_STATUS,
  676. .end = AB8500_INT_USB_LINK_STATUS,
  677. .flags = IORESOURCE_IRQ,
  678. },
  679. {
  680. .name = "USB_ADP_PROBE_PLUG",
  681. .start = AB8500_INT_ADP_PROBE_PLUG,
  682. .end = AB8500_INT_ADP_PROBE_PLUG,
  683. .flags = IORESOURCE_IRQ,
  684. },
  685. {
  686. .name = "USB_ADP_PROBE_UNPLUG",
  687. .start = AB8500_INT_ADP_PROBE_UNPLUG,
  688. .end = AB8500_INT_ADP_PROBE_UNPLUG,
  689. .flags = IORESOURCE_IRQ,
  690. },
  691. };
  692. static struct resource __devinitdata ab8505_iddet_resources[] = {
  693. {
  694. .name = "KeyDeglitch",
  695. .start = AB8505_INT_KEYDEGLITCH,
  696. .end = AB8505_INT_KEYDEGLITCH,
  697. .flags = IORESOURCE_IRQ,
  698. },
  699. {
  700. .name = "KP",
  701. .start = AB8505_INT_KP,
  702. .end = AB8505_INT_KP,
  703. .flags = IORESOURCE_IRQ,
  704. },
  705. {
  706. .name = "IKP",
  707. .start = AB8505_INT_IKP,
  708. .end = AB8505_INT_IKP,
  709. .flags = IORESOURCE_IRQ,
  710. },
  711. {
  712. .name = "IKR",
  713. .start = AB8505_INT_IKR,
  714. .end = AB8505_INT_IKR,
  715. .flags = IORESOURCE_IRQ,
  716. },
  717. {
  718. .name = "KeyStuck",
  719. .start = AB8505_INT_KEYSTUCK,
  720. .end = AB8505_INT_KEYSTUCK,
  721. .flags = IORESOURCE_IRQ,
  722. },
  723. };
  724. static struct resource __devinitdata ab8500_temp_resources[] = {
  725. {
  726. .name = "AB8500_TEMP_WARM",
  727. .start = AB8500_INT_TEMP_WARM,
  728. .end = AB8500_INT_TEMP_WARM,
  729. .flags = IORESOURCE_IRQ,
  730. },
  731. };
  732. static struct mfd_cell __devinitdata abx500_common_devs[] = {
  733. #ifdef CONFIG_DEBUG_FS
  734. {
  735. .name = "ab8500-debug",
  736. .num_resources = ARRAY_SIZE(ab8500_debug_resources),
  737. .resources = ab8500_debug_resources,
  738. },
  739. #endif
  740. {
  741. .name = "ab8500-sysctrl",
  742. },
  743. {
  744. .name = "ab8500-regulator",
  745. },
  746. {
  747. .name = "ab8500-gpadc",
  748. .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
  749. .resources = ab8500_gpadc_resources,
  750. },
  751. {
  752. .name = "ab8500-rtc",
  753. .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
  754. .resources = ab8500_rtc_resources,
  755. },
  756. {
  757. .name = "ab8500-acc-det",
  758. .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
  759. .resources = ab8500_av_acc_detect_resources,
  760. },
  761. {
  762. .name = "ab8500-poweron-key",
  763. .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
  764. .resources = ab8500_poweronkey_db_resources,
  765. },
  766. {
  767. .name = "ab8500-pwm",
  768. .id = 1,
  769. },
  770. {
  771. .name = "ab8500-pwm",
  772. .id = 2,
  773. },
  774. {
  775. .name = "ab8500-pwm",
  776. .id = 3,
  777. },
  778. { .name = "ab8500-leds", },
  779. {
  780. .name = "ab8500-denc",
  781. },
  782. {
  783. .name = "ab8500-temp",
  784. .num_resources = ARRAY_SIZE(ab8500_temp_resources),
  785. .resources = ab8500_temp_resources,
  786. },
  787. };
  788. static struct mfd_cell __devinitdata ab8500_bm_devs[] = {
  789. {
  790. .name = "ab8500-charger",
  791. .num_resources = ARRAY_SIZE(ab8500_charger_resources),
  792. .resources = ab8500_charger_resources,
  793. },
  794. {
  795. .name = "ab8500-btemp",
  796. .num_resources = ARRAY_SIZE(ab8500_btemp_resources),
  797. .resources = ab8500_btemp_resources,
  798. },
  799. {
  800. .name = "ab8500-fg",
  801. .num_resources = ARRAY_SIZE(ab8500_fg_resources),
  802. .resources = ab8500_fg_resources,
  803. },
  804. {
  805. .name = "ab8500-chargalg",
  806. .num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
  807. .resources = ab8500_chargalg_resources,
  808. },
  809. };
  810. static struct mfd_cell __devinitdata ab8500_devs[] = {
  811. {
  812. .name = "ab8500-gpio",
  813. .num_resources = ARRAY_SIZE(ab8500_gpio_resources),
  814. .resources = ab8500_gpio_resources,
  815. },
  816. {
  817. .name = "ab8500-usb",
  818. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  819. .resources = ab8500_usb_resources,
  820. },
  821. {
  822. .name = "ab8500-codec",
  823. },
  824. };
  825. static struct mfd_cell __devinitdata ab9540_devs[] = {
  826. {
  827. .name = "ab8500-gpio",
  828. .num_resources = ARRAY_SIZE(ab9540_gpio_resources),
  829. .resources = ab9540_gpio_resources,
  830. },
  831. {
  832. .name = "ab9540-usb",
  833. .num_resources = ARRAY_SIZE(ab8500_usb_resources),
  834. .resources = ab8500_usb_resources,
  835. },
  836. {
  837. .name = "ab9540-codec",
  838. },
  839. };
  840. /* Device list common to ab9540 and ab8505 */
  841. static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = {
  842. {
  843. .name = "ab-iddet",
  844. .num_resources = ARRAY_SIZE(ab8505_iddet_resources),
  845. .resources = ab8505_iddet_resources,
  846. },
  847. };
  848. static ssize_t show_chip_id(struct device *dev,
  849. struct device_attribute *attr, char *buf)
  850. {
  851. struct ab8500 *ab8500;
  852. ab8500 = dev_get_drvdata(dev);
  853. return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
  854. }
  855. /*
  856. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  857. * 0x01 Swoff bit programming
  858. * 0x02 Thermal protection activation
  859. * 0x04 Vbat lower then BattOk falling threshold
  860. * 0x08 Watchdog expired
  861. * 0x10 Non presence of 32kHz clock
  862. * 0x20 Battery level lower than power on reset threshold
  863. * 0x40 Power on key 1 pressed longer than 10 seconds
  864. * 0x80 DB8500 thermal shutdown
  865. */
  866. static ssize_t show_switch_off_status(struct device *dev,
  867. struct device_attribute *attr, char *buf)
  868. {
  869. int ret;
  870. u8 value;
  871. struct ab8500 *ab8500;
  872. ab8500 = dev_get_drvdata(dev);
  873. ret = get_register_interruptible(ab8500, AB8500_RTC,
  874. AB8500_SWITCH_OFF_STATUS, &value);
  875. if (ret < 0)
  876. return ret;
  877. return sprintf(buf, "%#x\n", value);
  878. }
  879. /*
  880. * ab8500 has turned on due to (TURN_ON_STATUS):
  881. * 0x01 PORnVbat
  882. * 0x02 PonKey1dbF
  883. * 0x04 PonKey2dbF
  884. * 0x08 RTCAlarm
  885. * 0x10 MainChDet
  886. * 0x20 VbusDet
  887. * 0x40 UsbIDDetect
  888. * 0x80 Reserved
  889. */
  890. static ssize_t show_turn_on_status(struct device *dev,
  891. struct device_attribute *attr, char *buf)
  892. {
  893. int ret;
  894. u8 value;
  895. struct ab8500 *ab8500;
  896. ab8500 = dev_get_drvdata(dev);
  897. ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
  898. AB8500_TURN_ON_STATUS, &value);
  899. if (ret < 0)
  900. return ret;
  901. return sprintf(buf, "%#x\n", value);
  902. }
  903. static ssize_t show_ab9540_dbbrstn(struct device *dev,
  904. struct device_attribute *attr, char *buf)
  905. {
  906. struct ab8500 *ab8500;
  907. int ret;
  908. u8 value;
  909. ab8500 = dev_get_drvdata(dev);
  910. ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
  911. AB9540_MODEM_CTRL2_REG, &value);
  912. if (ret < 0)
  913. return ret;
  914. return sprintf(buf, "%d\n",
  915. (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
  916. }
  917. static ssize_t store_ab9540_dbbrstn(struct device *dev,
  918. struct device_attribute *attr, const char *buf, size_t count)
  919. {
  920. struct ab8500 *ab8500;
  921. int ret = count;
  922. int err;
  923. u8 bitvalues;
  924. ab8500 = dev_get_drvdata(dev);
  925. if (count > 0) {
  926. switch (buf[0]) {
  927. case '0':
  928. bitvalues = 0;
  929. break;
  930. case '1':
  931. bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
  932. break;
  933. default:
  934. goto exit;
  935. }
  936. err = mask_and_set_register_interruptible(ab8500,
  937. AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
  938. AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
  939. if (err)
  940. dev_info(ab8500->dev,
  941. "Failed to set DBBRSTN %c, err %#x\n",
  942. buf[0], err);
  943. }
  944. exit:
  945. return ret;
  946. }
  947. static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
  948. static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
  949. static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
  950. static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
  951. show_ab9540_dbbrstn, store_ab9540_dbbrstn);
  952. static struct attribute *ab8500_sysfs_entries[] = {
  953. &dev_attr_chip_id.attr,
  954. &dev_attr_switch_off_status.attr,
  955. &dev_attr_turn_on_status.attr,
  956. NULL,
  957. };
  958. static struct attribute *ab9540_sysfs_entries[] = {
  959. &dev_attr_chip_id.attr,
  960. &dev_attr_switch_off_status.attr,
  961. &dev_attr_turn_on_status.attr,
  962. &dev_attr_dbbrstn.attr,
  963. NULL,
  964. };
  965. static struct attribute_group ab8500_attr_group = {
  966. .attrs = ab8500_sysfs_entries,
  967. };
  968. static struct attribute_group ab9540_attr_group = {
  969. .attrs = ab9540_sysfs_entries,
  970. };
  971. int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version)
  972. {
  973. struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
  974. int ret;
  975. int i;
  976. u8 value;
  977. if (plat)
  978. ab8500->irq_base = plat->irq_base;
  979. mutex_init(&ab8500->lock);
  980. mutex_init(&ab8500->irq_lock);
  981. atomic_set(&ab8500->transfer_ongoing, 0);
  982. if (version != AB8500_VERSION_UNDEFINED)
  983. ab8500->version = version;
  984. else {
  985. ret = get_register_interruptible(ab8500, AB8500_MISC,
  986. AB8500_IC_NAME_REG, &value);
  987. if (ret < 0)
  988. return ret;
  989. ab8500->version = value;
  990. }
  991. ret = get_register_interruptible(ab8500, AB8500_MISC,
  992. AB8500_REV_REG, &value);
  993. if (ret < 0)
  994. return ret;
  995. ab8500->chip_id = value;
  996. dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
  997. ab8500_version_str[ab8500->version],
  998. ab8500->chip_id >> 4,
  999. ab8500->chip_id & 0x0F);
  1000. /* Configure AB8500 or AB9540 IRQ */
  1001. if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
  1002. ab8500->mask_size = AB9540_NUM_IRQ_REGS;
  1003. ab8500->irq_reg_offset = ab9540_irq_regoffset;
  1004. } else {
  1005. ab8500->mask_size = AB8500_NUM_IRQ_REGS;
  1006. ab8500->irq_reg_offset = ab8500_irq_regoffset;
  1007. }
  1008. ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1009. if (!ab8500->mask)
  1010. return -ENOMEM;
  1011. ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL);
  1012. if (!ab8500->oldmask) {
  1013. ret = -ENOMEM;
  1014. goto out_freemask;
  1015. }
  1016. /*
  1017. * ab8500 has switched off due to (SWITCH_OFF_STATUS):
  1018. * 0x01 Swoff bit programming
  1019. * 0x02 Thermal protection activation
  1020. * 0x04 Vbat lower then BattOk falling threshold
  1021. * 0x08 Watchdog expired
  1022. * 0x10 Non presence of 32kHz clock
  1023. * 0x20 Battery level lower than power on reset threshold
  1024. * 0x40 Power on key 1 pressed longer than 10 seconds
  1025. * 0x80 DB8500 thermal shutdown
  1026. */
  1027. ret = get_register_interruptible(ab8500, AB8500_RTC,
  1028. AB8500_SWITCH_OFF_STATUS, &value);
  1029. if (ret < 0)
  1030. return ret;
  1031. dev_info(ab8500->dev, "switch off status: %#x", value);
  1032. if (plat && plat->init)
  1033. plat->init(ab8500);
  1034. /* Clear and mask all interrupts */
  1035. for (i = 0; i < ab8500->mask_size; i++) {
  1036. /*
  1037. * Interrupt register 12 doesn't exist prior to AB8500 version
  1038. * 2.0
  1039. */
  1040. if (ab8500->irq_reg_offset[i] == 11 &&
  1041. is_ab8500_1p1_or_earlier(ab8500))
  1042. continue;
  1043. get_register_interruptible(ab8500, AB8500_INTERRUPT,
  1044. AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
  1045. &value);
  1046. set_register_interruptible(ab8500, AB8500_INTERRUPT,
  1047. AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
  1048. }
  1049. ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
  1050. if (ret)
  1051. goto out_freeoldmask;
  1052. for (i = 0; i < ab8500->mask_size; i++)
  1053. ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
  1054. if (ab8500->irq_base) {
  1055. ret = ab8500_irq_init(ab8500);
  1056. if (ret)
  1057. goto out_freeoldmask;
  1058. ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
  1059. IRQF_ONESHOT | IRQF_NO_SUSPEND,
  1060. "ab8500", ab8500);
  1061. if (ret)
  1062. goto out_removeirq;
  1063. }
  1064. ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs,
  1065. ARRAY_SIZE(abx500_common_devs), NULL,
  1066. ab8500->irq_base);
  1067. if (ret)
  1068. goto out_freeirq;
  1069. if (is_ab9540(ab8500))
  1070. ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
  1071. ARRAY_SIZE(ab9540_devs), NULL,
  1072. ab8500->irq_base);
  1073. else
  1074. ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
  1075. ARRAY_SIZE(ab8500_devs), NULL,
  1076. ab8500->irq_base);
  1077. if (is_ab9540(ab8500) || is_ab8505(ab8500))
  1078. ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs,
  1079. ARRAY_SIZE(ab9540_ab8505_devs), NULL,
  1080. ab8500->irq_base);
  1081. if (ret)
  1082. goto out_freeirq;
  1083. if (!no_bm) {
  1084. /* Add battery management devices */
  1085. ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
  1086. ARRAY_SIZE(ab8500_bm_devs), NULL,
  1087. ab8500->irq_base);
  1088. if (ret)
  1089. dev_err(ab8500->dev, "error adding bm devices\n");
  1090. }
  1091. if (is_ab9540(ab8500))
  1092. ret = sysfs_create_group(&ab8500->dev->kobj,
  1093. &ab9540_attr_group);
  1094. else
  1095. ret = sysfs_create_group(&ab8500->dev->kobj,
  1096. &ab8500_attr_group);
  1097. if (ret)
  1098. dev_err(ab8500->dev, "error creating sysfs entries\n");
  1099. else
  1100. return ret;
  1101. out_freeirq:
  1102. if (ab8500->irq_base)
  1103. free_irq(ab8500->irq, ab8500);
  1104. out_removeirq:
  1105. if (ab8500->irq_base)
  1106. ab8500_irq_remove(ab8500);
  1107. out_freeoldmask:
  1108. kfree(ab8500->oldmask);
  1109. out_freemask:
  1110. kfree(ab8500->mask);
  1111. return ret;
  1112. }
  1113. int __devexit ab8500_exit(struct ab8500 *ab8500)
  1114. {
  1115. if (is_ab9540(ab8500))
  1116. sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group);
  1117. else
  1118. sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
  1119. mfd_remove_devices(ab8500->dev);
  1120. if (ab8500->irq_base) {
  1121. free_irq(ab8500->irq, ab8500);
  1122. ab8500_irq_remove(ab8500);
  1123. }
  1124. kfree(ab8500->oldmask);
  1125. kfree(ab8500->mask);
  1126. return 0;
  1127. }
  1128. MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
  1129. MODULE_DESCRIPTION("AB8500 MFD core");
  1130. MODULE_LICENSE("GPL v2");