imx25.dtsi 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528
  1. /*
  2. * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "skeleton.dtsi"
  12. / {
  13. aliases {
  14. gpio0 = &gpio1;
  15. gpio1 = &gpio2;
  16. gpio2 = &gpio3;
  17. gpio3 = &gpio4;
  18. i2c0 = &i2c1;
  19. i2c1 = &i2c2;
  20. i2c2 = &i2c3;
  21. serial0 = &uart1;
  22. serial1 = &uart2;
  23. serial2 = &uart3;
  24. serial3 = &uart4;
  25. serial4 = &uart5;
  26. spi0 = &spi1;
  27. spi1 = &spi2;
  28. spi2 = &spi3;
  29. usb0 = &usbotg;
  30. usb1 = &usbhost1;
  31. };
  32. asic: asic-interrupt-controller@68000000 {
  33. compatible = "fsl,imx25-asic", "fsl,avic";
  34. interrupt-controller;
  35. #interrupt-cells = <1>;
  36. reg = <0x68000000 0x8000000>;
  37. };
  38. clocks {
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. osc {
  42. compatible = "fsl,imx-osc", "fixed-clock";
  43. clock-frequency = <24000000>;
  44. };
  45. };
  46. soc {
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. compatible = "simple-bus";
  50. interrupt-parent = <&asic>;
  51. ranges;
  52. aips@43f00000 { /* AIPS1 */
  53. compatible = "fsl,aips-bus", "simple-bus";
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. reg = <0x43f00000 0x100000>;
  57. ranges;
  58. i2c1: i2c@43f80000 {
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  62. reg = <0x43f80000 0x4000>;
  63. clocks = <&clks 48>;
  64. clock-names = "";
  65. interrupts = <3>;
  66. status = "disabled";
  67. };
  68. i2c3: i2c@43f84000 {
  69. #address-cells = <1>;
  70. #size-cells = <0>;
  71. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  72. reg = <0x43f84000 0x4000>;
  73. clocks = <&clks 48>;
  74. clock-names = "";
  75. interrupts = <10>;
  76. status = "disabled";
  77. };
  78. can1: can@43f88000 {
  79. compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
  80. reg = <0x43f88000 0x4000>;
  81. interrupts = <43>;
  82. clocks = <&clks 75>, <&clks 75>;
  83. clock-names = "ipg", "per";
  84. status = "disabled";
  85. };
  86. can2: can@43f8c000 {
  87. compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
  88. reg = <0x43f8c000 0x4000>;
  89. interrupts = <44>;
  90. clocks = <&clks 76>, <&clks 76>;
  91. clock-names = "ipg", "per";
  92. status = "disabled";
  93. };
  94. uart1: serial@43f90000 {
  95. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  96. reg = <0x43f90000 0x4000>;
  97. interrupts = <45>;
  98. clocks = <&clks 120>, <&clks 57>;
  99. clock-names = "ipg", "per";
  100. status = "disabled";
  101. };
  102. uart2: serial@43f94000 {
  103. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  104. reg = <0x43f94000 0x4000>;
  105. interrupts = <32>;
  106. clocks = <&clks 121>, <&clks 57>;
  107. clock-names = "ipg", "per";
  108. status = "disabled";
  109. };
  110. i2c2: i2c@43f98000 {
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  114. reg = <0x43f98000 0x4000>;
  115. clocks = <&clks 48>;
  116. clock-names = "";
  117. interrupts = <4>;
  118. status = "disabled";
  119. };
  120. owire@43f9c000 {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. reg = <0x43f9c000 0x4000>;
  124. clocks = <&clks 51>;
  125. clock-names = "";
  126. interrupts = <2>;
  127. status = "disabled";
  128. };
  129. spi1: cspi@43fa4000 {
  130. #address-cells = <1>;
  131. #size-cells = <0>;
  132. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  133. reg = <0x43fa4000 0x4000>;
  134. clocks = <&clks 62>, <&clks 62>;
  135. clock-names = "ipg", "per";
  136. interrupts = <14>;
  137. status = "disabled";
  138. };
  139. kpp@43fa8000 {
  140. #address-cells = <1>;
  141. #size-cells = <0>;
  142. reg = <0x43fa8000 0x4000>;
  143. clocks = <&clks 102>;
  144. clock-names = "";
  145. interrupts = <24>;
  146. status = "disabled";
  147. };
  148. iomuxc@43fac000{
  149. compatible = "fsl,imx25-iomuxc";
  150. reg = <0x43fac000 0x4000>;
  151. };
  152. audmux@43fb0000 {
  153. compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
  154. reg = <0x43fb0000 0x4000>;
  155. status = "disabled";
  156. };
  157. };
  158. spba@50000000 {
  159. compatible = "fsl,spba-bus", "simple-bus";
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. reg = <0x50000000 0x40000>;
  163. ranges;
  164. spi3: cspi@50004000 {
  165. #address-cells = <1>;
  166. #size-cells = <0>;
  167. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  168. reg = <0x50004000 0x4000>;
  169. interrupts = <0>;
  170. clocks = <&clks 80>, <&clks 80>;
  171. clock-names = "ipg", "per";
  172. status = "disabled";
  173. };
  174. uart4: serial@50008000 {
  175. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  176. reg = <0x50008000 0x4000>;
  177. interrupts = <5>;
  178. clocks = <&clks 123>, <&clks 57>;
  179. clock-names = "ipg", "per";
  180. status = "disabled";
  181. };
  182. uart3: serial@5000c000 {
  183. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  184. reg = <0x5000c000 0x4000>;
  185. interrupts = <18>;
  186. clocks = <&clks 122>, <&clks 57>;
  187. clock-names = "ipg", "per";
  188. status = "disabled";
  189. };
  190. spi2: cspi@50010000 {
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  194. reg = <0x50010000 0x4000>;
  195. clocks = <&clks 79>, <&clks 79>;
  196. clock-names = "ipg", "per";
  197. interrupts = <13>;
  198. status = "disabled";
  199. };
  200. ssi2: ssi@50014000 {
  201. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  202. reg = <0x50014000 0x4000>;
  203. interrupts = <11>;
  204. status = "disabled";
  205. };
  206. esai@50018000 {
  207. reg = <0x50018000 0x4000>;
  208. interrupts = <7>;
  209. };
  210. uart5: serial@5002c000 {
  211. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  212. reg = <0x5002c000 0x4000>;
  213. interrupts = <40>;
  214. clocks = <&clks 124>, <&clks 57>;
  215. clock-names = "ipg", "per";
  216. status = "disabled";
  217. };
  218. tsc: tsc@50030000 {
  219. compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
  220. reg = <0x50030000 0x4000>;
  221. interrupts = <46>;
  222. clocks = <&clks 119>;
  223. clock-names = "ipg";
  224. status = "disabled";
  225. };
  226. ssi1: ssi@50034000 {
  227. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  228. reg = <0x50034000 0x4000>;
  229. interrupts = <12>;
  230. status = "disabled";
  231. };
  232. fec: ethernet@50038000 {
  233. compatible = "fsl,imx25-fec";
  234. reg = <0x50038000 0x4000>;
  235. interrupts = <57>;
  236. clocks = <&clks 88>, <&clks 65>;
  237. clock-names = "ipg", "ahb";
  238. status = "disabled";
  239. };
  240. };
  241. aips@53f00000 { /* AIPS2 */
  242. compatible = "fsl,aips-bus", "simple-bus";
  243. #address-cells = <1>;
  244. #size-cells = <1>;
  245. reg = <0x53f00000 0x100000>;
  246. ranges;
  247. clks: ccm@53f80000 {
  248. compatible = "fsl,imx25-ccm";
  249. reg = <0x53f80000 0x4000>;
  250. interrupts = <31>;
  251. #clock-cells = <1>;
  252. };
  253. gpt4: timer@53f84000 {
  254. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  255. reg = <0x53f84000 0x4000>;
  256. clocks = <&clks 9>, <&clks 45>;
  257. clock-names = "ipg", "per";
  258. interrupts = <1>;
  259. };
  260. gpt3: timer@53f88000 {
  261. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  262. reg = <0x53f88000 0x4000>;
  263. clocks = <&clks 9>, <&clks 47>;
  264. clock-names = "ipg", "per";
  265. interrupts = <29>;
  266. };
  267. gpt2: timer@53f8c000 {
  268. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  269. reg = <0x53f8c000 0x4000>;
  270. clocks = <&clks 9>, <&clks 47>;
  271. clock-names = "ipg", "per";
  272. interrupts = <53>;
  273. };
  274. gpt1: timer@53f90000 {
  275. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  276. reg = <0x53f90000 0x4000>;
  277. clocks = <&clks 9>, <&clks 47>;
  278. clock-names = "ipg", "per";
  279. interrupts = <54>;
  280. };
  281. epit1: timer@53f94000 {
  282. compatible = "fsl,imx25-epit";
  283. reg = <0x53f94000 0x4000>;
  284. interrupts = <28>;
  285. };
  286. epit2: timer@53f98000 {
  287. compatible = "fsl,imx25-epit";
  288. reg = <0x53f98000 0x4000>;
  289. interrupts = <27>;
  290. };
  291. gpio4: gpio@53f9c000 {
  292. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  293. reg = <0x53f9c000 0x4000>;
  294. interrupts = <23>;
  295. gpio-controller;
  296. #gpio-cells = <2>;
  297. interrupt-controller;
  298. #interrupt-cells = <2>;
  299. };
  300. pwm2: pwm@53fa0000 {
  301. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  302. #pwm-cells = <2>;
  303. reg = <0x53fa0000 0x4000>;
  304. clocks = <&clks 106>, <&clks 36>;
  305. clock-names = "ipg", "per";
  306. interrupts = <36>;
  307. };
  308. gpio3: gpio@53fa4000 {
  309. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  310. reg = <0x53fa4000 0x4000>;
  311. interrupts = <16>;
  312. gpio-controller;
  313. #gpio-cells = <2>;
  314. interrupt-controller;
  315. #interrupt-cells = <2>;
  316. };
  317. pwm3: pwm@53fa8000 {
  318. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  319. #pwm-cells = <2>;
  320. reg = <0x53fa8000 0x4000>;
  321. clocks = <&clks 107>, <&clks 36>;
  322. clock-names = "ipg", "per";
  323. interrupts = <41>;
  324. };
  325. esdhc1: esdhc@53fb4000 {
  326. compatible = "fsl,imx25-esdhc";
  327. reg = <0x53fb4000 0x4000>;
  328. interrupts = <9>;
  329. clocks = <&clks 86>, <&clks 63>, <&clks 45>;
  330. clock-names = "ipg", "ahb", "per";
  331. status = "disabled";
  332. };
  333. esdhc2: esdhc@53fb8000 {
  334. compatible = "fsl,imx25-esdhc";
  335. reg = <0x53fb8000 0x4000>;
  336. interrupts = <8>;
  337. clocks = <&clks 87>, <&clks 64>, <&clks 46>;
  338. clock-names = "ipg", "ahb", "per";
  339. status = "disabled";
  340. };
  341. lcdc@53fbc000 {
  342. reg = <0x53fbc000 0x4000>;
  343. interrupts = <39>;
  344. clocks = <&clks 103>, <&clks 66>, <&clks 49>;
  345. clock-names = "ipg", "ahb", "per";
  346. status = "disabled";
  347. };
  348. slcdc@53fc0000 {
  349. reg = <0x53fc0000 0x4000>;
  350. interrupts = <38>;
  351. status = "disabled";
  352. };
  353. pwm4: pwm@53fc8000 {
  354. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  355. reg = <0x53fc8000 0x4000>;
  356. clocks = <&clks 108>, <&clks 36>;
  357. clock-names = "ipg", "per";
  358. interrupts = <42>;
  359. };
  360. gpio1: gpio@53fcc000 {
  361. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  362. reg = <0x53fcc000 0x4000>;
  363. interrupts = <52>;
  364. gpio-controller;
  365. #gpio-cells = <2>;
  366. interrupt-controller;
  367. #interrupt-cells = <2>;
  368. };
  369. gpio2: gpio@53fd0000 {
  370. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  371. reg = <0x53fd0000 0x4000>;
  372. interrupts = <51>;
  373. gpio-controller;
  374. #gpio-cells = <2>;
  375. interrupt-controller;
  376. #interrupt-cells = <2>;
  377. };
  378. sdma@53fd4000 {
  379. compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
  380. reg = <0x53fd4000 0x4000>;
  381. clocks = <&clks 112>, <&clks 68>;
  382. clock-names = "ipg", "ahb";
  383. interrupts = <34>;
  384. };
  385. wdog@53fdc000 {
  386. compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
  387. reg = <0x53fdc000 0x4000>;
  388. clocks = <&clks 126>;
  389. clock-names = "";
  390. interrupts = <55>;
  391. };
  392. pwm1: pwm@53fe0000 {
  393. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  394. #pwm-cells = <2>;
  395. reg = <0x53fe0000 0x4000>;
  396. clocks = <&clks 105>, <&clks 36>;
  397. clock-names = "ipg", "per";
  398. interrupts = <26>;
  399. };
  400. iim: iim@53ff0000 {
  401. compatible = "fsl,imx25-iim", "fsl,imx27-iim";
  402. reg = <0x53ff0000 0x4000>;
  403. interrupts = <19>;
  404. clocks = <&clks 99>;
  405. };
  406. usbphy1: usbphy@1 {
  407. compatible = "nop-usbphy";
  408. status = "disabled";
  409. };
  410. usbphy2: usbphy@2 {
  411. compatible = "nop-usbphy";
  412. status = "disabled";
  413. };
  414. usbotg: usb@53ff4000 {
  415. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  416. reg = <0x53ff4000 0x0200>;
  417. interrupts = <37>;
  418. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  419. clock-names = "ipg", "ahb", "per";
  420. fsl,usbmisc = <&usbmisc 0>;
  421. status = "disabled";
  422. };
  423. usbhost1: usb@53ff4400 {
  424. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  425. reg = <0x53ff4400 0x0200>;
  426. interrupts = <35>;
  427. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  428. clock-names = "ipg", "ahb", "per";
  429. fsl,usbmisc = <&usbmisc 1>;
  430. status = "disabled";
  431. };
  432. usbmisc: usbmisc@53ff4600 {
  433. #index-cells = <1>;
  434. compatible = "fsl,imx25-usbmisc";
  435. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  436. clock-names = "ipg", "ahb", "per";
  437. reg = <0x53ff4600 0x00f>;
  438. status = "disabled";
  439. };
  440. dryice@53ffc000 {
  441. compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
  442. reg = <0x53ffc000 0x4000>;
  443. clocks = <&clks 81>;
  444. clock-names = "ipg";
  445. interrupts = <25>;
  446. };
  447. };
  448. emi@80000000 {
  449. compatible = "fsl,emi-bus", "simple-bus";
  450. #address-cells = <1>;
  451. #size-cells = <1>;
  452. reg = <0x80000000 0x3b002000>;
  453. ranges;
  454. nfc: nand@bb000000 {
  455. #address-cells = <1>;
  456. #size-cells = <1>;
  457. compatible = "fsl,imx25-nand";
  458. reg = <0xbb000000 0x2000>;
  459. clocks = <&clks 50>;
  460. clock-names = "";
  461. interrupts = <33>;
  462. status = "disabled";
  463. };
  464. };
  465. };
  466. };