bcm43xx_radio.c 56 KB

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  1. /*
  2. Broadcom BCM43xx wireless driver
  3. Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  4. Stefano Brivio <st3@riseup.net>
  5. Michael Buesch <mbuesch@freenet.de>
  6. Danny van Dyk <kugelfang@gentoo.org>
  7. Andreas Jaggi <andreas.jaggi@waterwave.ch>
  8. Some parts of the code in this file are derived from the ipw2200
  9. driver Copyright(c) 2003 - 2004 Intel Corporation.
  10. This program is free software; you can redistribute it and/or modify
  11. it under the terms of the GNU General Public License as published by
  12. the Free Software Foundation; either version 2 of the License, or
  13. (at your option) any later version.
  14. This program is distributed in the hope that it will be useful,
  15. but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. GNU General Public License for more details.
  18. You should have received a copy of the GNU General Public License
  19. along with this program; see the file COPYING. If not, write to
  20. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  21. Boston, MA 02110-1301, USA.
  22. */
  23. #include <linux/delay.h>
  24. #include "bcm43xx.h"
  25. #include "bcm43xx_main.h"
  26. #include "bcm43xx_phy.h"
  27. #include "bcm43xx_radio.h"
  28. #include "bcm43xx_ilt.h"
  29. /* Table for bcm43xx_radio_calibrationvalue() */
  30. static const u16 rcc_table[16] = {
  31. 0x0002, 0x0003, 0x0001, 0x000F,
  32. 0x0006, 0x0007, 0x0005, 0x000F,
  33. 0x000A, 0x000B, 0x0009, 0x000F,
  34. 0x000E, 0x000F, 0x000D, 0x000F,
  35. };
  36. /* Reverse the bits of a 4bit value.
  37. * Example: 1101 is flipped 1011
  38. */
  39. static u16 flip_4bit(u16 value)
  40. {
  41. u16 flipped = 0x0000;
  42. assert((value & ~0x000F) == 0x0000);
  43. flipped |= (value & 0x0001) << 3;
  44. flipped |= (value & 0x0002) << 1;
  45. flipped |= (value & 0x0004) >> 1;
  46. flipped |= (value & 0x0008) >> 3;
  47. return flipped;
  48. }
  49. /* Get the freq, as it has to be written to the device. */
  50. static inline
  51. u16 channel2freq_bg(u8 channel)
  52. {
  53. /* Frequencies are given as frequencies_bg[index] + 2.4GHz
  54. * Starting with channel 1
  55. */
  56. static const u16 frequencies_bg[14] = {
  57. 12, 17, 22, 27,
  58. 32, 37, 42, 47,
  59. 52, 57, 62, 67,
  60. 72, 84,
  61. };
  62. assert(channel >= 1 && channel <= 14);
  63. return frequencies_bg[channel - 1];
  64. }
  65. /* Get the freq, as it has to be written to the device. */
  66. static inline
  67. u16 channel2freq_a(u8 channel)
  68. {
  69. assert(channel <= 200);
  70. return (5000 + 5 * channel);
  71. }
  72. void bcm43xx_radio_lock(struct bcm43xx_private *bcm)
  73. {
  74. u32 status;
  75. status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
  76. status |= BCM43xx_SBF_RADIOREG_LOCK;
  77. bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
  78. mmiowb();
  79. udelay(10);
  80. }
  81. void bcm43xx_radio_unlock(struct bcm43xx_private *bcm)
  82. {
  83. u32 status;
  84. bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_VER); /* dummy read */
  85. status = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD);
  86. status &= ~BCM43xx_SBF_RADIOREG_LOCK;
  87. bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, status);
  88. mmiowb();
  89. }
  90. u16 bcm43xx_radio_read16(struct bcm43xx_private *bcm, u16 offset)
  91. {
  92. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  93. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  94. switch (phy->type) {
  95. case BCM43xx_PHYTYPE_A:
  96. offset |= 0x0040;
  97. break;
  98. case BCM43xx_PHYTYPE_B:
  99. if (radio->version == 0x2053) {
  100. if (offset < 0x70)
  101. offset += 0x80;
  102. else if (offset < 0x80)
  103. offset += 0x70;
  104. } else if (radio->version == 0x2050) {
  105. offset |= 0x80;
  106. } else
  107. assert(0);
  108. break;
  109. case BCM43xx_PHYTYPE_G:
  110. offset |= 0x80;
  111. break;
  112. }
  113. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
  114. return bcm43xx_read16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW);
  115. }
  116. void bcm43xx_radio_write16(struct bcm43xx_private *bcm, u16 offset, u16 val)
  117. {
  118. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_CONTROL, offset);
  119. mmiowb();
  120. bcm43xx_write16(bcm, BCM43xx_MMIO_RADIO_DATA_LOW, val);
  121. }
  122. static void bcm43xx_set_all_gains(struct bcm43xx_private *bcm,
  123. s16 first, s16 second, s16 third)
  124. {
  125. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  126. u16 i;
  127. u16 start = 0x08, end = 0x18;
  128. u16 offset = 0x0400;
  129. u16 tmp;
  130. if (phy->rev <= 1) {
  131. offset = 0x5000;
  132. start = 0x10;
  133. end = 0x20;
  134. }
  135. for (i = 0; i < 4; i++)
  136. bcm43xx_ilt_write(bcm, offset + i, first);
  137. for (i = start; i < end; i++)
  138. bcm43xx_ilt_write(bcm, offset + i, second);
  139. if (third != -1) {
  140. tmp = ((u16)third << 14) | ((u16)third << 6);
  141. bcm43xx_phy_write(bcm, 0x04A0,
  142. (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | tmp);
  143. bcm43xx_phy_write(bcm, 0x04A1,
  144. (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | tmp);
  145. bcm43xx_phy_write(bcm, 0x04A2,
  146. (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | tmp);
  147. }
  148. bcm43xx_dummy_transmission(bcm);
  149. }
  150. static void bcm43xx_set_original_gains(struct bcm43xx_private *bcm)
  151. {
  152. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  153. u16 i, tmp;
  154. u16 offset = 0x0400;
  155. u16 start = 0x0008, end = 0x0018;
  156. if (phy->rev <= 1) {
  157. offset = 0x5000;
  158. start = 0x0010;
  159. end = 0x0020;
  160. }
  161. for (i = 0; i < 4; i++) {
  162. tmp = (i & 0xFFFC);
  163. tmp |= (i & 0x0001) << 1;
  164. tmp |= (i & 0x0002) >> 1;
  165. bcm43xx_ilt_write(bcm, offset + i, tmp);
  166. }
  167. for (i = start; i < end; i++)
  168. bcm43xx_ilt_write(bcm, offset + i, i - start);
  169. bcm43xx_phy_write(bcm, 0x04A0,
  170. (bcm43xx_phy_read(bcm, 0x04A0) & 0xBFBF) | 0x4040);
  171. bcm43xx_phy_write(bcm, 0x04A1,
  172. (bcm43xx_phy_read(bcm, 0x04A1) & 0xBFBF) | 0x4040);
  173. bcm43xx_phy_write(bcm, 0x04A2,
  174. (bcm43xx_phy_read(bcm, 0x04A2) & 0xBFBF) | 0x4000);
  175. bcm43xx_dummy_transmission(bcm);
  176. }
  177. /* Synthetic PU workaround */
  178. static void bcm43xx_synth_pu_workaround(struct bcm43xx_private *bcm, u8 channel)
  179. {
  180. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  181. if (radio->version != 0x2050 || radio->revision >= 6) {
  182. /* We do not need the workaround. */
  183. return;
  184. }
  185. if (channel <= 10) {
  186. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  187. channel2freq_bg(channel + 4));
  188. } else {
  189. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  190. channel2freq_bg(1));
  191. }
  192. udelay(100);
  193. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  194. channel2freq_bg(channel));
  195. }
  196. u8 bcm43xx_radio_aci_detect(struct bcm43xx_private *bcm, u8 channel)
  197. {
  198. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  199. u8 ret = 0;
  200. u16 saved, rssi, temp;
  201. int i, j = 0;
  202. saved = bcm43xx_phy_read(bcm, 0x0403);
  203. bcm43xx_radio_selectchannel(bcm, channel, 0);
  204. bcm43xx_phy_write(bcm, 0x0403, (saved & 0xFFF8) | 5);
  205. if (radio->aci_hw_rssi)
  206. rssi = bcm43xx_phy_read(bcm, 0x048A) & 0x3F;
  207. else
  208. rssi = saved & 0x3F;
  209. /* clamp temp to signed 5bit */
  210. if (rssi > 32)
  211. rssi -= 64;
  212. for (i = 0;i < 100; i++) {
  213. temp = (bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x3F;
  214. if (temp > 32)
  215. temp -= 64;
  216. if (temp < rssi)
  217. j++;
  218. if (j >= 20)
  219. ret = 1;
  220. }
  221. bcm43xx_phy_write(bcm, 0x0403, saved);
  222. return ret;
  223. }
  224. u8 bcm43xx_radio_aci_scan(struct bcm43xx_private *bcm)
  225. {
  226. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  227. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  228. u8 ret[13];
  229. unsigned int channel = radio->channel;
  230. unsigned int i, j, start, end;
  231. unsigned long phylock_flags;
  232. if (!((phy->type == BCM43xx_PHYTYPE_G) && (phy->rev > 0)))
  233. return 0;
  234. bcm43xx_phy_lock(bcm, phylock_flags);
  235. bcm43xx_radio_lock(bcm);
  236. bcm43xx_phy_write(bcm, 0x0802,
  237. bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
  238. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  239. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
  240. bcm43xx_set_all_gains(bcm, 3, 8, 1);
  241. start = (channel - 5 > 0) ? channel - 5 : 1;
  242. end = (channel + 5 < 14) ? channel + 5 : 13;
  243. for (i = start; i <= end; i++) {
  244. if (abs(channel - i) > 2)
  245. ret[i-1] = bcm43xx_radio_aci_detect(bcm, i);
  246. }
  247. bcm43xx_radio_selectchannel(bcm, channel, 0);
  248. bcm43xx_phy_write(bcm, 0x0802,
  249. (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC) | 0x0003);
  250. bcm43xx_phy_write(bcm, 0x0403,
  251. bcm43xx_phy_read(bcm, 0x0403) & 0xFFF8);
  252. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  253. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
  254. bcm43xx_set_original_gains(bcm);
  255. for (i = 0; i < 13; i++) {
  256. if (!ret[i])
  257. continue;
  258. end = (i + 5 < 13) ? i + 5 : 13;
  259. for (j = i; j < end; j++)
  260. ret[j] = 1;
  261. }
  262. bcm43xx_radio_unlock(bcm);
  263. bcm43xx_phy_unlock(bcm, phylock_flags);
  264. return ret[channel - 1];
  265. }
  266. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  267. void bcm43xx_nrssi_hw_write(struct bcm43xx_private *bcm, u16 offset, s16 val)
  268. {
  269. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
  270. mmiowb();
  271. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_DATA, (u16)val);
  272. }
  273. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  274. s16 bcm43xx_nrssi_hw_read(struct bcm43xx_private *bcm, u16 offset)
  275. {
  276. u16 val;
  277. bcm43xx_phy_write(bcm, BCM43xx_PHY_NRSSILT_CTRL, offset);
  278. val = bcm43xx_phy_read(bcm, BCM43xx_PHY_NRSSILT_DATA);
  279. return (s16)val;
  280. }
  281. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  282. void bcm43xx_nrssi_hw_update(struct bcm43xx_private *bcm, u16 val)
  283. {
  284. u16 i;
  285. s16 tmp;
  286. for (i = 0; i < 64; i++) {
  287. tmp = bcm43xx_nrssi_hw_read(bcm, i);
  288. tmp -= val;
  289. tmp = limit_value(tmp, -32, 31);
  290. bcm43xx_nrssi_hw_write(bcm, i, tmp);
  291. }
  292. }
  293. /* http://bcm-specs.sipsolutions.net/NRSSILookupTable */
  294. void bcm43xx_nrssi_mem_update(struct bcm43xx_private *bcm)
  295. {
  296. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  297. s16 i, delta;
  298. s32 tmp;
  299. delta = 0x1F - radio->nrssi[0];
  300. for (i = 0; i < 64; i++) {
  301. tmp = (i - delta) * radio->nrssislope;
  302. tmp /= 0x10000;
  303. tmp += 0x3A;
  304. tmp = limit_value(tmp, 0, 0x3F);
  305. radio->nrssi_lt[i] = tmp;
  306. }
  307. }
  308. static void bcm43xx_calc_nrssi_offset(struct bcm43xx_private *bcm)
  309. {
  310. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  311. u16 backup[20] = { 0 };
  312. s16 v47F;
  313. u16 i;
  314. u16 saved = 0xFFFF;
  315. backup[0] = bcm43xx_phy_read(bcm, 0x0001);
  316. backup[1] = bcm43xx_phy_read(bcm, 0x0811);
  317. backup[2] = bcm43xx_phy_read(bcm, 0x0812);
  318. backup[3] = bcm43xx_phy_read(bcm, 0x0814);
  319. backup[4] = bcm43xx_phy_read(bcm, 0x0815);
  320. backup[5] = bcm43xx_phy_read(bcm, 0x005A);
  321. backup[6] = bcm43xx_phy_read(bcm, 0x0059);
  322. backup[7] = bcm43xx_phy_read(bcm, 0x0058);
  323. backup[8] = bcm43xx_phy_read(bcm, 0x000A);
  324. backup[9] = bcm43xx_phy_read(bcm, 0x0003);
  325. backup[10] = bcm43xx_radio_read16(bcm, 0x007A);
  326. backup[11] = bcm43xx_radio_read16(bcm, 0x0043);
  327. bcm43xx_phy_write(bcm, 0x0429,
  328. bcm43xx_phy_read(bcm, 0x0429) & 0x7FFF);
  329. bcm43xx_phy_write(bcm, 0x0001,
  330. (bcm43xx_phy_read(bcm, 0x0001) & 0x3FFF) | 0x4000);
  331. bcm43xx_phy_write(bcm, 0x0811,
  332. bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
  333. bcm43xx_phy_write(bcm, 0x0812,
  334. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFF3) | 0x0004);
  335. bcm43xx_phy_write(bcm, 0x0802,
  336. bcm43xx_phy_read(bcm, 0x0802) & ~(0x1 | 0x2));
  337. if (phy->rev >= 6) {
  338. backup[12] = bcm43xx_phy_read(bcm, 0x002E);
  339. backup[13] = bcm43xx_phy_read(bcm, 0x002F);
  340. backup[14] = bcm43xx_phy_read(bcm, 0x080F);
  341. backup[15] = bcm43xx_phy_read(bcm, 0x0810);
  342. backup[16] = bcm43xx_phy_read(bcm, 0x0801);
  343. backup[17] = bcm43xx_phy_read(bcm, 0x0060);
  344. backup[18] = bcm43xx_phy_read(bcm, 0x0014);
  345. backup[19] = bcm43xx_phy_read(bcm, 0x0478);
  346. bcm43xx_phy_write(bcm, 0x002E, 0);
  347. bcm43xx_phy_write(bcm, 0x002F, 0);
  348. bcm43xx_phy_write(bcm, 0x080F, 0);
  349. bcm43xx_phy_write(bcm, 0x0810, 0);
  350. bcm43xx_phy_write(bcm, 0x0478,
  351. bcm43xx_phy_read(bcm, 0x0478) | 0x0100);
  352. bcm43xx_phy_write(bcm, 0x0801,
  353. bcm43xx_phy_read(bcm, 0x0801) | 0x0040);
  354. bcm43xx_phy_write(bcm, 0x0060,
  355. bcm43xx_phy_read(bcm, 0x0060) | 0x0040);
  356. bcm43xx_phy_write(bcm, 0x0014,
  357. bcm43xx_phy_read(bcm, 0x0014) | 0x0200);
  358. }
  359. bcm43xx_radio_write16(bcm, 0x007A,
  360. bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
  361. bcm43xx_radio_write16(bcm, 0x007A,
  362. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  363. udelay(30);
  364. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  365. if (v47F >= 0x20)
  366. v47F -= 0x40;
  367. if (v47F == 31) {
  368. for (i = 7; i >= 4; i--) {
  369. bcm43xx_radio_write16(bcm, 0x007B, i);
  370. udelay(20);
  371. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  372. if (v47F >= 0x20)
  373. v47F -= 0x40;
  374. if (v47F < 31 && saved == 0xFFFF)
  375. saved = i;
  376. }
  377. if (saved == 0xFFFF)
  378. saved = 4;
  379. } else {
  380. bcm43xx_radio_write16(bcm, 0x007A,
  381. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  382. bcm43xx_phy_write(bcm, 0x0814,
  383. bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
  384. bcm43xx_phy_write(bcm, 0x0815,
  385. bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
  386. bcm43xx_phy_write(bcm, 0x0811,
  387. bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
  388. bcm43xx_phy_write(bcm, 0x0812,
  389. bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
  390. bcm43xx_phy_write(bcm, 0x0811,
  391. bcm43xx_phy_read(bcm, 0x0811) | 0x0030);
  392. bcm43xx_phy_write(bcm, 0x0812,
  393. bcm43xx_phy_read(bcm, 0x0812) | 0x0030);
  394. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  395. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  396. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  397. if (phy->rev == 0) {
  398. bcm43xx_phy_write(bcm, 0x0003, 0x0122);
  399. } else {
  400. bcm43xx_phy_write(bcm, 0x000A,
  401. bcm43xx_phy_read(bcm, 0x000A)
  402. | 0x2000);
  403. }
  404. bcm43xx_phy_write(bcm, 0x0814,
  405. bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
  406. bcm43xx_phy_write(bcm, 0x0815,
  407. bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
  408. bcm43xx_phy_write(bcm, 0x0003,
  409. (bcm43xx_phy_read(bcm, 0x0003) & 0xFF9F)
  410. | 0x0040);
  411. bcm43xx_radio_write16(bcm, 0x007A,
  412. bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
  413. bcm43xx_set_all_gains(bcm, 3, 0, 1);
  414. bcm43xx_radio_write16(bcm, 0x0043,
  415. (bcm43xx_radio_read16(bcm, 0x0043)
  416. & 0x00F0) | 0x000F);
  417. udelay(30);
  418. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  419. if (v47F >= 0x20)
  420. v47F -= 0x40;
  421. if (v47F == -32) {
  422. for (i = 0; i < 4; i++) {
  423. bcm43xx_radio_write16(bcm, 0x007B, i);
  424. udelay(20);
  425. v47F = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  426. if (v47F >= 0x20)
  427. v47F -= 0x40;
  428. if (v47F > -31 && saved == 0xFFFF)
  429. saved = i;
  430. }
  431. if (saved == 0xFFFF)
  432. saved = 3;
  433. } else
  434. saved = 0;
  435. }
  436. bcm43xx_radio_write16(bcm, 0x007B, saved);
  437. if (phy->rev >= 6) {
  438. bcm43xx_phy_write(bcm, 0x002E, backup[12]);
  439. bcm43xx_phy_write(bcm, 0x002F, backup[13]);
  440. bcm43xx_phy_write(bcm, 0x080F, backup[14]);
  441. bcm43xx_phy_write(bcm, 0x0810, backup[15]);
  442. }
  443. bcm43xx_phy_write(bcm, 0x0814, backup[3]);
  444. bcm43xx_phy_write(bcm, 0x0815, backup[4]);
  445. bcm43xx_phy_write(bcm, 0x005A, backup[5]);
  446. bcm43xx_phy_write(bcm, 0x0059, backup[6]);
  447. bcm43xx_phy_write(bcm, 0x0058, backup[7]);
  448. bcm43xx_phy_write(bcm, 0x000A, backup[8]);
  449. bcm43xx_phy_write(bcm, 0x0003, backup[9]);
  450. bcm43xx_radio_write16(bcm, 0x0043, backup[11]);
  451. bcm43xx_radio_write16(bcm, 0x007A, backup[10]);
  452. bcm43xx_phy_write(bcm, 0x0802,
  453. bcm43xx_phy_read(bcm, 0x0802) | 0x1 | 0x2);
  454. bcm43xx_phy_write(bcm, 0x0429,
  455. bcm43xx_phy_read(bcm, 0x0429) | 0x8000);
  456. bcm43xx_set_original_gains(bcm);
  457. if (phy->rev >= 6) {
  458. bcm43xx_phy_write(bcm, 0x0801, backup[16]);
  459. bcm43xx_phy_write(bcm, 0x0060, backup[17]);
  460. bcm43xx_phy_write(bcm, 0x0014, backup[18]);
  461. bcm43xx_phy_write(bcm, 0x0478, backup[19]);
  462. }
  463. bcm43xx_phy_write(bcm, 0x0001, backup[0]);
  464. bcm43xx_phy_write(bcm, 0x0812, backup[2]);
  465. bcm43xx_phy_write(bcm, 0x0811, backup[1]);
  466. }
  467. void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm)
  468. {
  469. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  470. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  471. u16 backup[18] = { 0 };
  472. u16 tmp;
  473. s16 nrssi0, nrssi1;
  474. switch (phy->type) {
  475. case BCM43xx_PHYTYPE_B:
  476. backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
  477. backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
  478. backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
  479. backup[3] = bcm43xx_phy_read(bcm, 0x0030);
  480. backup[4] = bcm43xx_phy_read(bcm, 0x0026);
  481. backup[5] = bcm43xx_phy_read(bcm, 0x0015);
  482. backup[6] = bcm43xx_phy_read(bcm, 0x002A);
  483. backup[7] = bcm43xx_phy_read(bcm, 0x0020);
  484. backup[8] = bcm43xx_phy_read(bcm, 0x005A);
  485. backup[9] = bcm43xx_phy_read(bcm, 0x0059);
  486. backup[10] = bcm43xx_phy_read(bcm, 0x0058);
  487. backup[11] = bcm43xx_read16(bcm, 0x03E2);
  488. backup[12] = bcm43xx_read16(bcm, 0x03E6);
  489. backup[13] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  490. tmp = bcm43xx_radio_read16(bcm, 0x007A);
  491. tmp &= (phy->rev >= 5) ? 0x007F : 0x000F;
  492. bcm43xx_radio_write16(bcm, 0x007A, tmp);
  493. bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
  494. bcm43xx_write16(bcm, 0x03EC, 0x7F7F);
  495. bcm43xx_phy_write(bcm, 0x0026, 0x0000);
  496. bcm43xx_phy_write(bcm, 0x0015,
  497. bcm43xx_phy_read(bcm, 0x0015) | 0x0020);
  498. bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
  499. bcm43xx_radio_write16(bcm, 0x007A,
  500. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  501. nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027);
  502. bcm43xx_radio_write16(bcm, 0x007A,
  503. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  504. if (phy->rev >= 2) {
  505. bcm43xx_write16(bcm, 0x03E6, 0x0040);
  506. } else if (phy->rev == 0) {
  507. bcm43xx_write16(bcm, 0x03E6, 0x0122);
  508. } else {
  509. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  510. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) & 0x2000);
  511. }
  512. bcm43xx_phy_write(bcm, 0x0020, 0x3F3F);
  513. bcm43xx_phy_write(bcm, 0x0015, 0xF330);
  514. bcm43xx_radio_write16(bcm, 0x005A, 0x0060);
  515. bcm43xx_radio_write16(bcm, 0x0043,
  516. bcm43xx_radio_read16(bcm, 0x0043) & 0x00F0);
  517. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  518. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  519. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  520. udelay(20);
  521. nrssi1 = (s16)bcm43xx_phy_read(bcm, 0x0027);
  522. bcm43xx_phy_write(bcm, 0x0030, backup[3]);
  523. bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
  524. bcm43xx_write16(bcm, 0x03E2, backup[11]);
  525. bcm43xx_phy_write(bcm, 0x0026, backup[4]);
  526. bcm43xx_phy_write(bcm, 0x0015, backup[5]);
  527. bcm43xx_phy_write(bcm, 0x002A, backup[6]);
  528. bcm43xx_synth_pu_workaround(bcm, radio->channel);
  529. if (phy->rev != 0)
  530. bcm43xx_write16(bcm, 0x03F4, backup[13]);
  531. bcm43xx_phy_write(bcm, 0x0020, backup[7]);
  532. bcm43xx_phy_write(bcm, 0x005A, backup[8]);
  533. bcm43xx_phy_write(bcm, 0x0059, backup[9]);
  534. bcm43xx_phy_write(bcm, 0x0058, backup[10]);
  535. bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
  536. bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
  537. if (nrssi0 == nrssi1)
  538. radio->nrssislope = 0x00010000;
  539. else
  540. radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
  541. if (nrssi0 <= -4) {
  542. radio->nrssi[0] = nrssi0;
  543. radio->nrssi[1] = nrssi1;
  544. }
  545. break;
  546. case BCM43xx_PHYTYPE_G:
  547. if (radio->revision >= 9)
  548. return;
  549. if (radio->revision == 8)
  550. bcm43xx_calc_nrssi_offset(bcm);
  551. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  552. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF);
  553. bcm43xx_phy_write(bcm, 0x0802,
  554. bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC);
  555. backup[7] = bcm43xx_read16(bcm, 0x03E2);
  556. bcm43xx_write16(bcm, 0x03E2,
  557. bcm43xx_read16(bcm, 0x03E2) | 0x8000);
  558. backup[0] = bcm43xx_radio_read16(bcm, 0x007A);
  559. backup[1] = bcm43xx_radio_read16(bcm, 0x0052);
  560. backup[2] = bcm43xx_radio_read16(bcm, 0x0043);
  561. backup[3] = bcm43xx_phy_read(bcm, 0x0015);
  562. backup[4] = bcm43xx_phy_read(bcm, 0x005A);
  563. backup[5] = bcm43xx_phy_read(bcm, 0x0059);
  564. backup[6] = bcm43xx_phy_read(bcm, 0x0058);
  565. backup[8] = bcm43xx_read16(bcm, 0x03E6);
  566. backup[9] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  567. if (phy->rev >= 3) {
  568. backup[10] = bcm43xx_phy_read(bcm, 0x002E);
  569. backup[11] = bcm43xx_phy_read(bcm, 0x002F);
  570. backup[12] = bcm43xx_phy_read(bcm, 0x080F);
  571. backup[13] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_LO_CONTROL);
  572. backup[14] = bcm43xx_phy_read(bcm, 0x0801);
  573. backup[15] = bcm43xx_phy_read(bcm, 0x0060);
  574. backup[16] = bcm43xx_phy_read(bcm, 0x0014);
  575. backup[17] = bcm43xx_phy_read(bcm, 0x0478);
  576. bcm43xx_phy_write(bcm, 0x002E, 0);
  577. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, 0);
  578. switch (phy->rev) {
  579. case 4: case 6: case 7:
  580. bcm43xx_phy_write(bcm, 0x0478,
  581. bcm43xx_phy_read(bcm, 0x0478)
  582. | 0x0100);
  583. bcm43xx_phy_write(bcm, 0x0801,
  584. bcm43xx_phy_read(bcm, 0x0801)
  585. | 0x0040);
  586. break;
  587. case 3: case 5:
  588. bcm43xx_phy_write(bcm, 0x0801,
  589. bcm43xx_phy_read(bcm, 0x0801)
  590. & 0xFFBF);
  591. break;
  592. }
  593. bcm43xx_phy_write(bcm, 0x0060,
  594. bcm43xx_phy_read(bcm, 0x0060)
  595. | 0x0040);
  596. bcm43xx_phy_write(bcm, 0x0014,
  597. bcm43xx_phy_read(bcm, 0x0014)
  598. | 0x0200);
  599. }
  600. bcm43xx_radio_write16(bcm, 0x007A,
  601. bcm43xx_radio_read16(bcm, 0x007A) | 0x0070);
  602. bcm43xx_set_all_gains(bcm, 0, 8, 0);
  603. bcm43xx_radio_write16(bcm, 0x007A,
  604. bcm43xx_radio_read16(bcm, 0x007A) & 0x00F7);
  605. if (phy->rev >= 2) {
  606. bcm43xx_phy_write(bcm, 0x0811,
  607. (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0030);
  608. bcm43xx_phy_write(bcm, 0x0812,
  609. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0010);
  610. }
  611. bcm43xx_radio_write16(bcm, 0x007A,
  612. bcm43xx_radio_read16(bcm, 0x007A) | 0x0080);
  613. udelay(20);
  614. nrssi0 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  615. if (nrssi0 >= 0x0020)
  616. nrssi0 -= 0x0040;
  617. bcm43xx_radio_write16(bcm, 0x007A,
  618. bcm43xx_radio_read16(bcm, 0x007A) & 0x007F);
  619. if (phy->rev >= 2) {
  620. bcm43xx_phy_write(bcm, 0x0003,
  621. (bcm43xx_phy_read(bcm, 0x0003)
  622. & 0xFF9F) | 0x0040);
  623. }
  624. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  625. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  626. | 0x2000);
  627. bcm43xx_radio_write16(bcm, 0x007A,
  628. bcm43xx_radio_read16(bcm, 0x007A) | 0x000F);
  629. bcm43xx_phy_write(bcm, 0x0015, 0xF330);
  630. if (phy->rev >= 2) {
  631. bcm43xx_phy_write(bcm, 0x0812,
  632. (bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF) | 0x0020);
  633. bcm43xx_phy_write(bcm, 0x0811,
  634. (bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF) | 0x0020);
  635. }
  636. bcm43xx_set_all_gains(bcm, 3, 0, 1);
  637. if (radio->revision == 8) {
  638. bcm43xx_radio_write16(bcm, 0x0043, 0x001F);
  639. } else {
  640. tmp = bcm43xx_radio_read16(bcm, 0x0052) & 0xFF0F;
  641. bcm43xx_radio_write16(bcm, 0x0052, tmp | 0x0060);
  642. tmp = bcm43xx_radio_read16(bcm, 0x0043) & 0xFFF0;
  643. bcm43xx_radio_write16(bcm, 0x0043, tmp | 0x0009);
  644. }
  645. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  646. bcm43xx_phy_write(bcm, 0x0059, 0x0810);
  647. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  648. udelay(20);
  649. nrssi1 = (s16)((bcm43xx_phy_read(bcm, 0x047F) >> 8) & 0x003F);
  650. if (nrssi1 >= 0x0020)
  651. nrssi1 -= 0x0040;
  652. if (nrssi0 == nrssi1)
  653. radio->nrssislope = 0x00010000;
  654. else
  655. radio->nrssislope = 0x00400000 / (nrssi0 - nrssi1);
  656. if (nrssi0 >= -4) {
  657. radio->nrssi[0] = nrssi1;
  658. radio->nrssi[1] = nrssi0;
  659. }
  660. if (phy->rev >= 3) {
  661. bcm43xx_phy_write(bcm, 0x002E, backup[10]);
  662. bcm43xx_phy_write(bcm, 0x002F, backup[11]);
  663. bcm43xx_phy_write(bcm, 0x080F, backup[12]);
  664. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, backup[13]);
  665. }
  666. if (phy->rev >= 2) {
  667. bcm43xx_phy_write(bcm, 0x0812,
  668. bcm43xx_phy_read(bcm, 0x0812) & 0xFFCF);
  669. bcm43xx_phy_write(bcm, 0x0811,
  670. bcm43xx_phy_read(bcm, 0x0811) & 0xFFCF);
  671. }
  672. bcm43xx_radio_write16(bcm, 0x007A, backup[0]);
  673. bcm43xx_radio_write16(bcm, 0x0052, backup[1]);
  674. bcm43xx_radio_write16(bcm, 0x0043, backup[2]);
  675. bcm43xx_write16(bcm, 0x03E2, backup[7]);
  676. bcm43xx_write16(bcm, 0x03E6, backup[8]);
  677. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[9]);
  678. bcm43xx_phy_write(bcm, 0x0015, backup[3]);
  679. bcm43xx_phy_write(bcm, 0x005A, backup[4]);
  680. bcm43xx_phy_write(bcm, 0x0059, backup[5]);
  681. bcm43xx_phy_write(bcm, 0x0058, backup[6]);
  682. bcm43xx_synth_pu_workaround(bcm, radio->channel);
  683. bcm43xx_phy_write(bcm, 0x0802,
  684. bcm43xx_phy_read(bcm, 0x0802) | (0x0001 | 0x0002));
  685. bcm43xx_set_original_gains(bcm);
  686. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  687. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x8000);
  688. if (phy->rev >= 3) {
  689. bcm43xx_phy_write(bcm, 0x0801, backup[14]);
  690. bcm43xx_phy_write(bcm, 0x0060, backup[15]);
  691. bcm43xx_phy_write(bcm, 0x0014, backup[16]);
  692. bcm43xx_phy_write(bcm, 0x0478, backup[17]);
  693. }
  694. bcm43xx_nrssi_mem_update(bcm);
  695. bcm43xx_calc_nrssi_threshold(bcm);
  696. break;
  697. default:
  698. assert(0);
  699. }
  700. }
  701. void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm)
  702. {
  703. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  704. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  705. s16 threshold;
  706. s32 a, b;
  707. int tmp;
  708. s16 tmp16;
  709. u16 tmp_u16;
  710. switch (phy->type) {
  711. case BCM43xx_PHYTYPE_B: {
  712. int radiotype = 0;
  713. if (phy->rev < 2)
  714. return;
  715. if (radio->version != 0x2050)
  716. return;
  717. if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI))
  718. return;
  719. tmp = radio->revision;
  720. if ((radio->manufact == 0x175 && tmp == 5) ||
  721. (radio->manufact == 0x17F && (tmp == 3 || tmp == 4)))
  722. radiotype = 1;
  723. if (radiotype == 1) {
  724. threshold = radio->nrssi[1] - 5;
  725. } else {
  726. threshold = 40 * radio->nrssi[0];
  727. threshold += 33 * (radio->nrssi[1] - radio->nrssi[0]);
  728. threshold += 20;
  729. threshold /= 10;
  730. }
  731. threshold = limit_value(threshold, 0, 0x3E);
  732. bcm43xx_phy_read(bcm, 0x0020); /* dummy read */
  733. bcm43xx_phy_write(bcm, 0x0020, (((u16)threshold) << 8) | 0x001C);
  734. if (radiotype == 1) {
  735. bcm43xx_phy_write(bcm, 0x0087, 0x0E0D);
  736. bcm43xx_phy_write(bcm, 0x0086, 0x0C0B);
  737. bcm43xx_phy_write(bcm, 0x0085, 0x0A09);
  738. bcm43xx_phy_write(bcm, 0x0084, 0x0808);
  739. bcm43xx_phy_write(bcm, 0x0083, 0x0808);
  740. bcm43xx_phy_write(bcm, 0x0082, 0x0604);
  741. bcm43xx_phy_write(bcm, 0x0081, 0x0302);
  742. bcm43xx_phy_write(bcm, 0x0080, 0x0100);
  743. }
  744. break;
  745. }
  746. case BCM43xx_PHYTYPE_G:
  747. if (!phy->connected ||
  748. !(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
  749. tmp16 = bcm43xx_nrssi_hw_read(bcm, 0x20);
  750. if (tmp16 >= 0x20)
  751. tmp16 -= 0x40;
  752. if (tmp16 < 3) {
  753. bcm43xx_phy_write(bcm, 0x048A,
  754. (bcm43xx_phy_read(bcm, 0x048A)
  755. & 0xF000) | 0x09EB);
  756. } else {
  757. bcm43xx_phy_write(bcm, 0x048A,
  758. (bcm43xx_phy_read(bcm, 0x048A)
  759. & 0xF000) | 0x0AED);
  760. }
  761. } else {
  762. tmp = radio->interfmode;
  763. if (tmp == BCM43xx_RADIO_INTERFMODE_NONWLAN) {
  764. a = -13;
  765. b = -17;
  766. } else if (tmp == BCM43xx_RADIO_INTERFMODE_NONE &&
  767. !radio->aci_enable) {
  768. a = -13;
  769. b = -10;
  770. } else {
  771. a = -8;
  772. b = -9;
  773. }
  774. a += 0x1B;
  775. a *= radio->nrssi[1] - radio->nrssi[0];
  776. a += radio->nrssi[0] * 0x40;
  777. a /= 64;
  778. b += 0x1B;
  779. b *= radio->nrssi[1] - radio->nrssi[0];
  780. b += radio->nrssi[0] * 0x40;
  781. b /= 64;
  782. a = limit_value(a, -31, 31);
  783. b = limit_value(b, -31, 31);
  784. tmp_u16 = bcm43xx_phy_read(bcm, 0x048A) & 0xF000;
  785. tmp_u16 |= ((u32)a & 0x003F);
  786. tmp_u16 |= (((u32)b & 0x003F) << 6);
  787. bcm43xx_phy_write(bcm, 0x048A, tmp_u16);
  788. }
  789. break;
  790. default:
  791. assert(0);
  792. }
  793. }
  794. /* Helper macros to save on and restore values from the radio->interfstack */
  795. #ifdef stack_save
  796. # undef stack_save
  797. #endif
  798. #ifdef stack_restore
  799. # undef stack_restore
  800. #endif
  801. #define stack_save(value) \
  802. do { \
  803. assert(i < ARRAY_SIZE(radio->interfstack)); \
  804. stack[i++] = (value); \
  805. } while (0)
  806. #define stack_restore() \
  807. ({ \
  808. assert(i < ARRAY_SIZE(radio->interfstack)); \
  809. stack[i++]; \
  810. })
  811. static void
  812. bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
  813. int mode)
  814. {
  815. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  816. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  817. int i = 0;
  818. u16 *stack = radio->interfstack;
  819. u16 tmp, flipped;
  820. switch (mode) {
  821. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  822. if (phy->rev != 1) {
  823. bcm43xx_phy_write(bcm, 0x042B,
  824. bcm43xx_phy_read(bcm, 0x042B) & 0x0800);
  825. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  826. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & ~0x4000);
  827. break;
  828. }
  829. tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
  830. flipped = flip_4bit(tmp);
  831. if ((flipped >> 1) >= 4)
  832. tmp = flipped - 3;
  833. tmp = flip_4bit(tmp);
  834. bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
  835. bcm43xx_calc_nrssi_threshold(bcm);
  836. if (bcm->current_core->rev < 5) {
  837. stack_save(bcm43xx_phy_read(bcm, 0x0406));
  838. bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
  839. } else {
  840. stack_save(bcm43xx_phy_read(bcm, 0x04C0));
  841. stack_save(bcm43xx_phy_read(bcm, 0x04C1));
  842. bcm43xx_phy_write(bcm, 0x04C0, 0x3E04);
  843. bcm43xx_phy_write(bcm, 0x04C1, 0x0640);
  844. }
  845. bcm43xx_phy_write(bcm, 0x042B,
  846. bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
  847. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  848. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | 0x1000);
  849. stack_save(bcm43xx_phy_read(bcm, 0x04A0));
  850. bcm43xx_phy_write(bcm, 0x04A0,
  851. (bcm43xx_phy_read(bcm, 0x04A0) & 0xC0C0) | 0x0008);
  852. stack_save(bcm43xx_phy_read(bcm, 0x04A1));
  853. bcm43xx_phy_write(bcm, 0x04A1,
  854. (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0C0) | 0x0605);
  855. stack_save(bcm43xx_phy_read(bcm, 0x04A2));
  856. bcm43xx_phy_write(bcm, 0x04A2,
  857. (bcm43xx_phy_read(bcm, 0x04A2) & 0xC0C0) | 0x0204);
  858. stack_save(bcm43xx_phy_read(bcm, 0x04A8));
  859. bcm43xx_phy_write(bcm, 0x04A8,
  860. (bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0403);
  861. stack_save(bcm43xx_phy_read(bcm, 0x04AB));
  862. bcm43xx_phy_write(bcm, 0x04AB,
  863. (bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0504);
  864. stack_save(bcm43xx_phy_read(bcm, 0x04A7));
  865. bcm43xx_phy_write(bcm, 0x04A7, 0x0002);
  866. stack_save(bcm43xx_phy_read(bcm, 0x04A3));
  867. bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
  868. stack_save(bcm43xx_phy_read(bcm, 0x04A9));
  869. bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
  870. stack_save(bcm43xx_phy_read(bcm, 0x0493));
  871. bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
  872. stack_save(bcm43xx_phy_read(bcm, 0x04AA));
  873. bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
  874. stack_save(bcm43xx_phy_read(bcm, 0x04AC));
  875. bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
  876. break;
  877. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  878. if (bcm43xx_phy_read(bcm, 0x0033) == 0x0800)
  879. break;
  880. radio->aci_enable = 1;
  881. stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD));
  882. stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS));
  883. if (bcm->current_core->rev < 5) {
  884. stack_save(bcm43xx_phy_read(bcm, 0x0406));
  885. } else {
  886. stack_save(bcm43xx_phy_read(bcm, 0x04C0));
  887. stack_save(bcm43xx_phy_read(bcm, 0x04C1));
  888. }
  889. stack_save(bcm43xx_phy_read(bcm, 0x0033));
  890. stack_save(bcm43xx_phy_read(bcm, 0x04A7));
  891. stack_save(bcm43xx_phy_read(bcm, 0x04A3));
  892. stack_save(bcm43xx_phy_read(bcm, 0x04A9));
  893. stack_save(bcm43xx_phy_read(bcm, 0x04AA));
  894. stack_save(bcm43xx_phy_read(bcm, 0x04AC));
  895. stack_save(bcm43xx_phy_read(bcm, 0x0493));
  896. stack_save(bcm43xx_phy_read(bcm, 0x04A1));
  897. stack_save(bcm43xx_phy_read(bcm, 0x04A0));
  898. stack_save(bcm43xx_phy_read(bcm, 0x04A2));
  899. stack_save(bcm43xx_phy_read(bcm, 0x048A));
  900. stack_save(bcm43xx_phy_read(bcm, 0x04A8));
  901. stack_save(bcm43xx_phy_read(bcm, 0x04AB));
  902. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  903. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & 0xEFFF);
  904. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  905. (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xEFFF) | 0x0002);
  906. bcm43xx_phy_write(bcm, 0x04A7, 0x0800);
  907. bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
  908. bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
  909. bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
  910. bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
  911. bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
  912. bcm43xx_phy_write(bcm, 0x04A0,
  913. (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFC0) | 0x001A);
  914. if (bcm->current_core->rev < 5) {
  915. bcm43xx_phy_write(bcm, 0x0406, 0x280D);
  916. } else {
  917. bcm43xx_phy_write(bcm, 0x04C0, 0x0640);
  918. bcm43xx_phy_write(bcm, 0x04C1, 0x00A9);
  919. }
  920. bcm43xx_phy_write(bcm, 0x04A1,
  921. (bcm43xx_phy_read(bcm, 0x04A1) & 0xC0FF) | 0x1800);
  922. bcm43xx_phy_write(bcm, 0x04A1,
  923. (bcm43xx_phy_read(bcm, 0x04A1) & 0xFFC0) | 0x0016);
  924. bcm43xx_phy_write(bcm, 0x04A2,
  925. (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0900);
  926. bcm43xx_phy_write(bcm, 0x04A0,
  927. (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0700);
  928. bcm43xx_phy_write(bcm, 0x04A2,
  929. (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x000D);
  930. bcm43xx_phy_write(bcm, 0x04A8,
  931. (bcm43xx_phy_read(bcm, 0x04A8) & 0xCFFF) | 0x1000);
  932. bcm43xx_phy_write(bcm, 0x04A8,
  933. (bcm43xx_phy_read(bcm, 0x04A8) & 0xF0FF) | 0x0A00);
  934. bcm43xx_phy_write(bcm, 0x04AB,
  935. (bcm43xx_phy_read(bcm, 0x04AB) & 0xCFFF) | 0x1000);
  936. bcm43xx_phy_write(bcm, 0x04AB,
  937. (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0800);
  938. bcm43xx_phy_write(bcm, 0x04AB,
  939. (bcm43xx_phy_read(bcm, 0x04AB) & 0xFFCF) | 0x0010);
  940. bcm43xx_phy_write(bcm, 0x04AB,
  941. (bcm43xx_phy_read(bcm, 0x04AB) & 0xFFF0) | 0x0006);
  942. bcm43xx_calc_nrssi_slope(bcm);
  943. break;
  944. default:
  945. assert(0);
  946. }
  947. }
  948. static void
  949. bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
  950. int mode)
  951. {
  952. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  953. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  954. int i = 0;
  955. u16 *stack = radio->interfstack;
  956. u16 tmp, flipped;
  957. switch (mode) {
  958. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  959. if (phy->rev != 1) {
  960. bcm43xx_phy_write(bcm, 0x042B,
  961. bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
  962. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  963. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
  964. break;
  965. }
  966. tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
  967. flipped = flip_4bit(tmp);
  968. if ((flipped >> 1) >= 0x000C)
  969. tmp = flipped + 3;
  970. tmp = flip_4bit(tmp);
  971. bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
  972. bcm43xx_calc_nrssi_threshold(bcm);
  973. if (bcm->current_core->rev < 5) {
  974. bcm43xx_phy_write(bcm, 0x0406, stack_restore());
  975. } else {
  976. bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
  977. bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
  978. }
  979. bcm43xx_phy_write(bcm, 0x042B,
  980. bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
  981. if (!bcm->bad_frames_preempt)
  982. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
  983. bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & ~(1 << 11));
  984. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  985. bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
  986. bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
  987. bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
  988. bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
  989. bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
  990. bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
  991. bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
  992. bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
  993. bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
  994. bcm43xx_phy_write(bcm, 0x0493, stack_restore());
  995. bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
  996. bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
  997. break;
  998. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  999. if (bcm43xx_phy_read(bcm, 0x0033) != 0x0800)
  1000. break;
  1001. radio->aci_enable = 0;
  1002. bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD, stack_restore());
  1003. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, stack_restore());
  1004. if (bcm->current_core->rev < 5) {
  1005. bcm43xx_phy_write(bcm, 0x0406, stack_restore());
  1006. } else {
  1007. bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
  1008. bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
  1009. }
  1010. bcm43xx_phy_write(bcm, 0x0033, stack_restore());
  1011. bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
  1012. bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
  1013. bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
  1014. bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
  1015. bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
  1016. bcm43xx_phy_write(bcm, 0x0493, stack_restore());
  1017. bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
  1018. bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
  1019. bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
  1020. bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
  1021. bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
  1022. bcm43xx_calc_nrssi_slope(bcm);
  1023. break;
  1024. default:
  1025. assert(0);
  1026. }
  1027. }
  1028. #undef stack_save
  1029. #undef stack_restore
  1030. int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm,
  1031. int mode)
  1032. {
  1033. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1034. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1035. int currentmode;
  1036. if ((phy->type != BCM43xx_PHYTYPE_G) ||
  1037. (phy->rev == 0) ||
  1038. (!phy->connected))
  1039. return -ENODEV;
  1040. radio->aci_wlan_automatic = 0;
  1041. switch (mode) {
  1042. case BCM43xx_RADIO_INTERFMODE_AUTOWLAN:
  1043. radio->aci_wlan_automatic = 1;
  1044. if (radio->aci_enable)
  1045. mode = BCM43xx_RADIO_INTERFMODE_MANUALWLAN;
  1046. else
  1047. mode = BCM43xx_RADIO_INTERFMODE_NONE;
  1048. break;
  1049. case BCM43xx_RADIO_INTERFMODE_NONE:
  1050. case BCM43xx_RADIO_INTERFMODE_NONWLAN:
  1051. case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
  1052. break;
  1053. default:
  1054. return -EINVAL;
  1055. }
  1056. currentmode = radio->interfmode;
  1057. if (currentmode == mode)
  1058. return 0;
  1059. if (currentmode != BCM43xx_RADIO_INTERFMODE_NONE)
  1060. bcm43xx_radio_interference_mitigation_disable(bcm, currentmode);
  1061. if (mode == BCM43xx_RADIO_INTERFMODE_NONE) {
  1062. radio->aci_enable = 0;
  1063. radio->aci_hw_rssi = 0;
  1064. } else
  1065. bcm43xx_radio_interference_mitigation_enable(bcm, mode);
  1066. radio->interfmode = mode;
  1067. return 0;
  1068. }
  1069. u16 bcm43xx_radio_calibrationvalue(struct bcm43xx_private *bcm)
  1070. {
  1071. u16 reg, index, ret;
  1072. reg = bcm43xx_radio_read16(bcm, 0x0060);
  1073. index = (reg & 0x001E) >> 1;
  1074. ret = rcc_table[index] << 1;
  1075. ret |= (reg & 0x0001);
  1076. ret |= 0x0020;
  1077. return ret;
  1078. }
  1079. u16 bcm43xx_radio_init2050(struct bcm43xx_private *bcm)
  1080. {
  1081. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1082. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1083. u16 backup[19] = { 0 };
  1084. u16 ret;
  1085. u16 i, j;
  1086. u32 tmp1 = 0, tmp2 = 0;
  1087. backup[0] = bcm43xx_radio_read16(bcm, 0x0043);
  1088. backup[14] = bcm43xx_radio_read16(bcm, 0x0051);
  1089. backup[15] = bcm43xx_radio_read16(bcm, 0x0052);
  1090. backup[1] = bcm43xx_phy_read(bcm, 0x0015);
  1091. backup[16] = bcm43xx_phy_read(bcm, 0x005A);
  1092. backup[17] = bcm43xx_phy_read(bcm, 0x0059);
  1093. backup[18] = bcm43xx_phy_read(bcm, 0x0058);
  1094. if (phy->type == BCM43xx_PHYTYPE_B) {
  1095. backup[2] = bcm43xx_phy_read(bcm, 0x0030);
  1096. backup[3] = bcm43xx_read16(bcm, 0x03EC);
  1097. bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
  1098. bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
  1099. } else {
  1100. if (phy->connected) {
  1101. backup[4] = bcm43xx_phy_read(bcm, 0x0811);
  1102. backup[5] = bcm43xx_phy_read(bcm, 0x0812);
  1103. backup[6] = bcm43xx_phy_read(bcm, 0x0814);
  1104. backup[7] = bcm43xx_phy_read(bcm, 0x0815);
  1105. backup[8] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
  1106. backup[9] = bcm43xx_phy_read(bcm, 0x0802);
  1107. bcm43xx_phy_write(bcm, 0x0814,
  1108. (bcm43xx_phy_read(bcm, 0x0814) | 0x0003));
  1109. bcm43xx_phy_write(bcm, 0x0815,
  1110. (bcm43xx_phy_read(bcm, 0x0815) & 0xFFFC));
  1111. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
  1112. (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x7FFF));
  1113. bcm43xx_phy_write(bcm, 0x0802,
  1114. (bcm43xx_phy_read(bcm, 0x0802) & 0xFFFC));
  1115. bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
  1116. bcm43xx_phy_write(bcm, 0x0812, 0x0FB2);
  1117. }
  1118. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
  1119. (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) | 0x8000));
  1120. }
  1121. backup[10] = bcm43xx_phy_read(bcm, 0x0035);
  1122. bcm43xx_phy_write(bcm, 0x0035,
  1123. (bcm43xx_phy_read(bcm, 0x0035) & 0xFF7F));
  1124. backup[11] = bcm43xx_read16(bcm, 0x03E6);
  1125. backup[12] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
  1126. // Initialization
  1127. if (phy->version == 0) {
  1128. bcm43xx_write16(bcm, 0x03E6, 0x0122);
  1129. } else {
  1130. if (phy->version >= 2)
  1131. bcm43xx_write16(bcm, 0x03E6, 0x0040);
  1132. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1133. (bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT) | 0x2000));
  1134. }
  1135. ret = bcm43xx_radio_calibrationvalue(bcm);
  1136. if (phy->type == BCM43xx_PHYTYPE_B)
  1137. bcm43xx_radio_write16(bcm, 0x0078, 0x0003);
  1138. bcm43xx_phy_write(bcm, 0x0015, 0xBFAF);
  1139. bcm43xx_phy_write(bcm, 0x002B, 0x1403);
  1140. if (phy->connected)
  1141. bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
  1142. bcm43xx_phy_write(bcm, 0x0015, 0xBFA0);
  1143. bcm43xx_radio_write16(bcm, 0x0051,
  1144. (bcm43xx_radio_read16(bcm, 0x0051) | 0x0004));
  1145. bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
  1146. bcm43xx_radio_write16(bcm, 0x0043,
  1147. bcm43xx_radio_read16(bcm, 0x0043) | 0x0009);
  1148. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1149. for (i = 0; i < 16; i++) {
  1150. bcm43xx_phy_write(bcm, 0x005A, 0x0480);
  1151. bcm43xx_phy_write(bcm, 0x0059, 0xC810);
  1152. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  1153. if (phy->connected)
  1154. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1155. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1156. udelay(10);
  1157. if (phy->connected)
  1158. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1159. bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
  1160. udelay(10);
  1161. if (phy->connected)
  1162. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1163. bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
  1164. udelay(10);
  1165. tmp1 += bcm43xx_phy_read(bcm, 0x002D);
  1166. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1167. if (phy->connected)
  1168. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1169. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1170. }
  1171. tmp1++;
  1172. tmp1 >>= 9;
  1173. udelay(10);
  1174. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1175. for (i = 0; i < 16; i++) {
  1176. bcm43xx_radio_write16(bcm, 0x0078, (flip_4bit(i) << 1) | 0x0020);
  1177. backup[13] = bcm43xx_radio_read16(bcm, 0x0078);
  1178. udelay(10);
  1179. for (j = 0; j < 16; j++) {
  1180. bcm43xx_phy_write(bcm, 0x005A, 0x0D80);
  1181. bcm43xx_phy_write(bcm, 0x0059, 0xC810);
  1182. bcm43xx_phy_write(bcm, 0x0058, 0x000D);
  1183. if (phy->connected)
  1184. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1185. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1186. udelay(10);
  1187. if (phy->connected)
  1188. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1189. bcm43xx_phy_write(bcm, 0x0015, 0xEFB0);
  1190. udelay(10);
  1191. if (phy->connected)
  1192. bcm43xx_phy_write(bcm, 0x0812, 0x30B3); /* 0x30B3 is not a typo */
  1193. bcm43xx_phy_write(bcm, 0x0015, 0xFFF0);
  1194. udelay(10);
  1195. tmp2 += bcm43xx_phy_read(bcm, 0x002D);
  1196. bcm43xx_phy_write(bcm, 0x0058, 0x0000);
  1197. if (phy->connected)
  1198. bcm43xx_phy_write(bcm, 0x0812, 0x30B2);
  1199. bcm43xx_phy_write(bcm, 0x0015, 0xAFB0);
  1200. }
  1201. tmp2++;
  1202. tmp2 >>= 8;
  1203. if (tmp1 < tmp2)
  1204. break;
  1205. }
  1206. /* Restore the registers */
  1207. bcm43xx_phy_write(bcm, 0x0015, backup[1]);
  1208. bcm43xx_radio_write16(bcm, 0x0051, backup[14]);
  1209. bcm43xx_radio_write16(bcm, 0x0052, backup[15]);
  1210. bcm43xx_radio_write16(bcm, 0x0043, backup[0]);
  1211. bcm43xx_phy_write(bcm, 0x005A, backup[16]);
  1212. bcm43xx_phy_write(bcm, 0x0059, backup[17]);
  1213. bcm43xx_phy_write(bcm, 0x0058, backup[18]);
  1214. bcm43xx_write16(bcm, 0x03E6, backup[11]);
  1215. if (phy->version != 0)
  1216. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, backup[12]);
  1217. bcm43xx_phy_write(bcm, 0x0035, backup[10]);
  1218. bcm43xx_radio_selectchannel(bcm, radio->channel, 1);
  1219. if (phy->type == BCM43xx_PHYTYPE_B) {
  1220. bcm43xx_phy_write(bcm, 0x0030, backup[2]);
  1221. bcm43xx_write16(bcm, 0x03EC, backup[3]);
  1222. } else {
  1223. bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO,
  1224. (bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_RADIO) & 0x7FFF));
  1225. if (phy->connected) {
  1226. bcm43xx_phy_write(bcm, 0x0811, backup[4]);
  1227. bcm43xx_phy_write(bcm, 0x0812, backup[5]);
  1228. bcm43xx_phy_write(bcm, 0x0814, backup[6]);
  1229. bcm43xx_phy_write(bcm, 0x0815, backup[7]);
  1230. bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, backup[8]);
  1231. bcm43xx_phy_write(bcm, 0x0802, backup[9]);
  1232. }
  1233. }
  1234. if (i >= 15)
  1235. ret = backup[13];
  1236. return ret;
  1237. }
  1238. void bcm43xx_radio_init2060(struct bcm43xx_private *bcm)
  1239. {
  1240. int err;
  1241. bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
  1242. bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
  1243. bcm43xx_radio_write16(bcm, 0x0009, 0x0040);
  1244. bcm43xx_radio_write16(bcm, 0x0005, 0x00AA);
  1245. bcm43xx_radio_write16(bcm, 0x0032, 0x008F);
  1246. bcm43xx_radio_write16(bcm, 0x0006, 0x008F);
  1247. bcm43xx_radio_write16(bcm, 0x0034, 0x008F);
  1248. bcm43xx_radio_write16(bcm, 0x002C, 0x0007);
  1249. bcm43xx_radio_write16(bcm, 0x0082, 0x0080);
  1250. bcm43xx_radio_write16(bcm, 0x0080, 0x0000);
  1251. bcm43xx_radio_write16(bcm, 0x003F, 0x00DA);
  1252. bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
  1253. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0010);
  1254. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
  1255. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020);
  1256. udelay(400);
  1257. bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0020) | 0x0010);
  1258. udelay(400);
  1259. bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008) | 0x0008);
  1260. bcm43xx_radio_write16(bcm, 0x0085, bcm43xx_radio_read16(bcm, 0x0085) & ~0x0010);
  1261. bcm43xx_radio_write16(bcm, 0x0005, bcm43xx_radio_read16(bcm, 0x0005) & ~0x0008);
  1262. bcm43xx_radio_write16(bcm, 0x0081, bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040);
  1263. bcm43xx_radio_write16(bcm, 0x0081, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0040) | 0x0040);
  1264. bcm43xx_radio_write16(bcm, 0x0005, (bcm43xx_radio_read16(bcm, 0x0081) & ~0x0008) | 0x0008);
  1265. bcm43xx_phy_write(bcm, 0x0063, 0xDDC6);
  1266. bcm43xx_phy_write(bcm, 0x0069, 0x07BE);
  1267. bcm43xx_phy_write(bcm, 0x006A, 0x0000);
  1268. err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_A, 0);
  1269. assert(err == 0);
  1270. udelay(1000);
  1271. }
  1272. static inline
  1273. u16 freq_r3A_value(u16 frequency)
  1274. {
  1275. u16 value;
  1276. if (frequency < 5091)
  1277. value = 0x0040;
  1278. else if (frequency < 5321)
  1279. value = 0x0000;
  1280. else if (frequency < 5806)
  1281. value = 0x0080;
  1282. else
  1283. value = 0x0040;
  1284. return value;
  1285. }
  1286. void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm)
  1287. {
  1288. static const u8 data_high[5] = { 0x00, 0x40, 0x80, 0x90, 0xD0 };
  1289. static const u8 data_low[5] = { 0x00, 0x01, 0x05, 0x06, 0x0A };
  1290. u16 tmp = bcm43xx_radio_read16(bcm, 0x001E);
  1291. int i, j;
  1292. for (i = 0; i < 5; i++) {
  1293. for (j = 0; j < 5; j++) {
  1294. if (tmp == (data_high[i] << 4 | data_low[j])) {
  1295. bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0);
  1296. return;
  1297. }
  1298. }
  1299. }
  1300. }
  1301. int bcm43xx_radio_selectchannel(struct bcm43xx_private *bcm,
  1302. u8 channel,
  1303. int synthetic_pu_workaround)
  1304. {
  1305. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1306. u16 r8, tmp;
  1307. u16 freq;
  1308. if ((radio->manufact == 0x17F) &&
  1309. (radio->version == 0x2060) &&
  1310. (radio->revision == 1)) {
  1311. if (channel > 200)
  1312. return -EINVAL;
  1313. freq = channel2freq_a(channel);
  1314. r8 = bcm43xx_radio_read16(bcm, 0x0008);
  1315. bcm43xx_write16(bcm, 0x03F0, freq);
  1316. bcm43xx_radio_write16(bcm, 0x0008, r8);
  1317. TODO();//TODO: write max channel TX power? to Radio 0x2D
  1318. tmp = bcm43xx_radio_read16(bcm, 0x002E);
  1319. tmp &= 0x0080;
  1320. TODO();//TODO: OR tmp with the Power out estimation for this channel?
  1321. bcm43xx_radio_write16(bcm, 0x002E, tmp);
  1322. if (freq >= 4920 && freq <= 5500) {
  1323. /*
  1324. * r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
  1325. * = (freq * 0.025862069
  1326. */
  1327. r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */
  1328. }
  1329. bcm43xx_radio_write16(bcm, 0x0007, (r8 << 4) | r8);
  1330. bcm43xx_radio_write16(bcm, 0x0020, (r8 << 4) | r8);
  1331. bcm43xx_radio_write16(bcm, 0x0021, (r8 << 4) | r8);
  1332. bcm43xx_radio_write16(bcm, 0x0022,
  1333. (bcm43xx_radio_read16(bcm, 0x0022)
  1334. & 0x000F) | (r8 << 4));
  1335. bcm43xx_radio_write16(bcm, 0x002A, (r8 << 4));
  1336. bcm43xx_radio_write16(bcm, 0x002B, (r8 << 4));
  1337. bcm43xx_radio_write16(bcm, 0x0008,
  1338. (bcm43xx_radio_read16(bcm, 0x0008)
  1339. & 0x00F0) | (r8 << 4));
  1340. bcm43xx_radio_write16(bcm, 0x0029,
  1341. (bcm43xx_radio_read16(bcm, 0x0029)
  1342. & 0xFF0F) | 0x00B0);
  1343. bcm43xx_radio_write16(bcm, 0x0035, 0x00AA);
  1344. bcm43xx_radio_write16(bcm, 0x0036, 0x0085);
  1345. bcm43xx_radio_write16(bcm, 0x003A,
  1346. (bcm43xx_radio_read16(bcm, 0x003A)
  1347. & 0xFF20) | freq_r3A_value(freq));
  1348. bcm43xx_radio_write16(bcm, 0x003D,
  1349. bcm43xx_radio_read16(bcm, 0x003D) & 0x00FF);
  1350. bcm43xx_radio_write16(bcm, 0x0081,
  1351. (bcm43xx_radio_read16(bcm, 0x0081)
  1352. & 0xFF7F) | 0x0080);
  1353. bcm43xx_radio_write16(bcm, 0x0035,
  1354. bcm43xx_radio_read16(bcm, 0x0035) & 0xFFEF);
  1355. bcm43xx_radio_write16(bcm, 0x0035,
  1356. (bcm43xx_radio_read16(bcm, 0x0035)
  1357. & 0xFFEF) | 0x0010);
  1358. bcm43xx_radio_set_tx_iq(bcm);
  1359. TODO(); //TODO: TSSI2dbm workaround
  1360. bcm43xx_phy_xmitpower(bcm);//FIXME correct?
  1361. } else {
  1362. if ((channel < 1) || (channel > 14))
  1363. return -EINVAL;
  1364. if (synthetic_pu_workaround)
  1365. bcm43xx_synth_pu_workaround(bcm, channel);
  1366. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL,
  1367. channel2freq_bg(channel));
  1368. if (channel == 14) {
  1369. if (bcm->sprom.locale == BCM43xx_LOCALE_JAPAN) {
  1370. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1371. BCM43xx_UCODEFLAGS_OFFSET,
  1372. bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1373. BCM43xx_UCODEFLAGS_OFFSET)
  1374. & ~(1 << 7));
  1375. } else {
  1376. bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
  1377. BCM43xx_UCODEFLAGS_OFFSET,
  1378. bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
  1379. BCM43xx_UCODEFLAGS_OFFSET)
  1380. | (1 << 7));
  1381. }
  1382. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1383. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  1384. | (1 << 11));
  1385. } else {
  1386. bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT,
  1387. bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT)
  1388. & 0xF7BF);
  1389. }
  1390. }
  1391. radio->channel = channel;
  1392. //XXX: Using the longer of 2 timeouts (8000 vs 2000 usecs). Specs states
  1393. // that 2000 usecs might suffice.
  1394. udelay(8000);
  1395. return 0;
  1396. }
  1397. void bcm43xx_radio_set_txantenna(struct bcm43xx_private *bcm, u32 val)
  1398. {
  1399. u16 tmp;
  1400. val <<= 8;
  1401. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0022) & 0xFCFF;
  1402. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0022, tmp | val);
  1403. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x03A8) & 0xFCFF;
  1404. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x03A8, tmp | val);
  1405. tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0054) & 0xFCFF;
  1406. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0054, tmp | val);
  1407. }
  1408. /* http://bcm-specs.sipsolutions.net/TX_Gain_Base_Band */
  1409. static u16 bcm43xx_get_txgain_base_band(u16 txpower)
  1410. {
  1411. u16 ret;
  1412. assert(txpower <= 63);
  1413. if (txpower >= 54)
  1414. ret = 2;
  1415. else if (txpower >= 49)
  1416. ret = 4;
  1417. else if (txpower >= 44)
  1418. ret = 5;
  1419. else
  1420. ret = 6;
  1421. return ret;
  1422. }
  1423. /* http://bcm-specs.sipsolutions.net/TX_Gain_Radio_Frequency_Power_Amplifier */
  1424. static u16 bcm43xx_get_txgain_freq_power_amp(u16 txpower)
  1425. {
  1426. u16 ret;
  1427. assert(txpower <= 63);
  1428. if (txpower >= 32)
  1429. ret = 0;
  1430. else if (txpower >= 25)
  1431. ret = 1;
  1432. else if (txpower >= 20)
  1433. ret = 2;
  1434. else if (txpower >= 12)
  1435. ret = 3;
  1436. else
  1437. ret = 4;
  1438. return ret;
  1439. }
  1440. /* http://bcm-specs.sipsolutions.net/TX_Gain_Digital_Analog_Converter */
  1441. static u16 bcm43xx_get_txgain_dac(u16 txpower)
  1442. {
  1443. u16 ret;
  1444. assert(txpower <= 63);
  1445. if (txpower >= 54)
  1446. ret = txpower - 53;
  1447. else if (txpower >= 49)
  1448. ret = txpower - 42;
  1449. else if (txpower >= 44)
  1450. ret = txpower - 37;
  1451. else if (txpower >= 32)
  1452. ret = txpower - 32;
  1453. else if (txpower >= 25)
  1454. ret = txpower - 20;
  1455. else if (txpower >= 20)
  1456. ret = txpower - 13;
  1457. else if (txpower >= 12)
  1458. ret = txpower - 8;
  1459. else
  1460. ret = txpower;
  1461. return ret;
  1462. }
  1463. void bcm43xx_radio_set_txpower_a(struct bcm43xx_private *bcm, u16 txpower)
  1464. {
  1465. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1466. u16 pamp, base, dac, ilt;
  1467. txpower = limit_value(txpower, 0, 63);
  1468. pamp = bcm43xx_get_txgain_freq_power_amp(txpower);
  1469. pamp <<= 5;
  1470. pamp &= 0x00E0;
  1471. bcm43xx_phy_write(bcm, 0x0019, pamp);
  1472. base = bcm43xx_get_txgain_base_band(txpower);
  1473. base &= 0x000F;
  1474. bcm43xx_phy_write(bcm, 0x0017, base | 0x0020);
  1475. ilt = bcm43xx_ilt_read(bcm, 0x3001);
  1476. ilt &= 0x0007;
  1477. dac = bcm43xx_get_txgain_dac(txpower);
  1478. dac <<= 3;
  1479. dac |= ilt;
  1480. bcm43xx_ilt_write(bcm, 0x3001, dac);
  1481. radio->txpwr_offset = txpower;
  1482. TODO();
  1483. //TODO: FuncPlaceholder (Adjust BB loft cancel)
  1484. }
  1485. void bcm43xx_radio_set_txpower_bg(struct bcm43xx_private *bcm,
  1486. u16 baseband_attenuation, u16 radio_attenuation,
  1487. u16 txpower)
  1488. {
  1489. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1490. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1491. if (baseband_attenuation == 0xFFFF)
  1492. baseband_attenuation = radio->baseband_atten;
  1493. if (radio_attenuation == 0xFFFF)
  1494. radio_attenuation = radio->radio_atten;
  1495. if (txpower == 0xFFFF)
  1496. txpower = radio->txctl1;
  1497. radio->baseband_atten = baseband_attenuation;
  1498. radio->radio_atten = radio_attenuation;
  1499. radio->txctl1 = txpower;
  1500. assert(/*baseband_attenuation >= 0 &&*/ baseband_attenuation <= 11);
  1501. if (radio->revision < 6)
  1502. assert(/*radio_attenuation >= 0 &&*/ radio_attenuation <= 9);
  1503. else
  1504. assert(/* radio_attenuation >= 0 &&*/ radio_attenuation <= 31);
  1505. assert(/*txpower >= 0 &&*/ txpower <= 7);
  1506. bcm43xx_phy_set_baseband_attenuation(bcm, baseband_attenuation);
  1507. bcm43xx_radio_write16(bcm, 0x0043, radio_attenuation);
  1508. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0064, radio_attenuation);
  1509. if (radio->version == 0x2050) {
  1510. bcm43xx_radio_write16(bcm, 0x0052,
  1511. (bcm43xx_radio_read16(bcm, 0x0052) & ~0x0070)
  1512. | ((txpower << 4) & 0x0070));
  1513. }
  1514. //FIXME: The spec is very weird and unclear here.
  1515. if (phy->type == BCM43xx_PHYTYPE_G)
  1516. bcm43xx_phy_lo_adjust(bcm, 0);
  1517. }
  1518. u16 bcm43xx_default_baseband_attenuation(struct bcm43xx_private *bcm)
  1519. {
  1520. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1521. if (radio->version == 0x2050 && radio->revision < 6)
  1522. return 0;
  1523. return 2;
  1524. }
  1525. u16 bcm43xx_default_radio_attenuation(struct bcm43xx_private *bcm)
  1526. {
  1527. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1528. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1529. u16 att = 0xFFFF;
  1530. if (phy->type == BCM43xx_PHYTYPE_A)
  1531. return 0x60;
  1532. switch (radio->version) {
  1533. case 0x2053:
  1534. switch (radio->revision) {
  1535. case 1:
  1536. att = 6;
  1537. break;
  1538. }
  1539. break;
  1540. case 0x2050:
  1541. switch (radio->revision) {
  1542. case 0:
  1543. att = 5;
  1544. break;
  1545. case 1:
  1546. if (phy->type == BCM43xx_PHYTYPE_G) {
  1547. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1548. bcm->board_type == 0x421 &&
  1549. bcm->board_revision >= 30)
  1550. att = 3;
  1551. else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1552. bcm->board_type == 0x416)
  1553. att = 3;
  1554. else
  1555. att = 1;
  1556. } else {
  1557. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1558. bcm->board_type == 0x421 &&
  1559. bcm->board_revision >= 30)
  1560. att = 7;
  1561. else
  1562. att = 6;
  1563. }
  1564. break;
  1565. case 2:
  1566. if (phy->type == BCM43xx_PHYTYPE_G) {
  1567. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1568. bcm->board_type == 0x421 &&
  1569. bcm->board_revision >= 30)
  1570. att = 3;
  1571. else if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1572. bcm->board_type == 0x416)
  1573. att = 5;
  1574. else if (bcm->chip_id == 0x4320)
  1575. att = 4;
  1576. else
  1577. att = 3;
  1578. } else
  1579. att = 6;
  1580. break;
  1581. case 3:
  1582. att = 5;
  1583. break;
  1584. case 4:
  1585. case 5:
  1586. att = 1;
  1587. break;
  1588. case 6:
  1589. case 7:
  1590. att = 5;
  1591. break;
  1592. case 8:
  1593. att = 0x1A;
  1594. break;
  1595. case 9:
  1596. default:
  1597. att = 5;
  1598. }
  1599. }
  1600. if (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM &&
  1601. bcm->board_type == 0x421) {
  1602. if (bcm->board_revision < 0x43)
  1603. att = 2;
  1604. else if (bcm->board_revision < 0x51)
  1605. att = 3;
  1606. }
  1607. if (att == 0xFFFF)
  1608. att = 5;
  1609. return att;
  1610. }
  1611. u16 bcm43xx_default_txctl1(struct bcm43xx_private *bcm)
  1612. {
  1613. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1614. if (radio->version != 0x2050)
  1615. return 0;
  1616. if (radio->revision == 1)
  1617. return 3;
  1618. if (radio->revision < 6)
  1619. return 2;
  1620. if (radio->revision == 8)
  1621. return 1;
  1622. return 0;
  1623. }
  1624. void bcm43xx_radio_turn_on(struct bcm43xx_private *bcm)
  1625. {
  1626. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1627. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1628. int err;
  1629. if (radio->enabled)
  1630. return;
  1631. switch (phy->type) {
  1632. case BCM43xx_PHYTYPE_A:
  1633. bcm43xx_radio_write16(bcm, 0x0004, 0x00C0);
  1634. bcm43xx_radio_write16(bcm, 0x0005, 0x0008);
  1635. bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) & 0xFFF7);
  1636. bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) & 0xFFF7);
  1637. bcm43xx_radio_init2060(bcm);
  1638. break;
  1639. case BCM43xx_PHYTYPE_B:
  1640. case BCM43xx_PHYTYPE_G:
  1641. bcm43xx_phy_write(bcm, 0x0015, 0x8000);
  1642. bcm43xx_phy_write(bcm, 0x0015, 0xCC00);
  1643. bcm43xx_phy_write(bcm, 0x0015, (phy->connected ? 0x00C0 : 0x0000));
  1644. err = bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 1);
  1645. assert(err == 0);
  1646. break;
  1647. default:
  1648. assert(0);
  1649. }
  1650. radio->enabled = 1;
  1651. dprintk(KERN_INFO PFX "Radio turned on\n");
  1652. }
  1653. void bcm43xx_radio_turn_off(struct bcm43xx_private *bcm)
  1654. {
  1655. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1656. struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
  1657. if (phy->type == BCM43xx_PHYTYPE_A) {
  1658. bcm43xx_radio_write16(bcm, 0x0004, 0x00FF);
  1659. bcm43xx_radio_write16(bcm, 0x0005, 0x00FB);
  1660. bcm43xx_phy_write(bcm, 0x0010, bcm43xx_phy_read(bcm, 0x0010) | 0x0008);
  1661. bcm43xx_phy_write(bcm, 0x0011, bcm43xx_phy_read(bcm, 0x0011) | 0x0008);
  1662. }
  1663. if (phy->type == BCM43xx_PHYTYPE_G && bcm->current_core->rev >= 5) {
  1664. bcm43xx_phy_write(bcm, 0x0811, bcm43xx_phy_read(bcm, 0x0811) | 0x008C);
  1665. bcm43xx_phy_write(bcm, 0x0812, bcm43xx_phy_read(bcm, 0x0812) & 0xFF73);
  1666. } else
  1667. bcm43xx_phy_write(bcm, 0x0015, 0xAA00);
  1668. radio->enabled = 0;
  1669. dprintk(KERN_INFO PFX "Radio turned off\n");
  1670. }
  1671. void bcm43xx_radio_clear_tssi(struct bcm43xx_private *bcm)
  1672. {
  1673. struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  1674. switch (phy->type) {
  1675. case BCM43xx_PHYTYPE_A:
  1676. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0068, 0x7F7F);
  1677. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x006a, 0x7F7F);
  1678. break;
  1679. case BCM43xx_PHYTYPE_B:
  1680. case BCM43xx_PHYTYPE_G:
  1681. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0058, 0x7F7F);
  1682. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x005a, 0x7F7F);
  1683. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0070, 0x7F7F);
  1684. bcm43xx_shm_write16(bcm, BCM43xx_SHM_SHARED, 0x0072, 0x7F7F);
  1685. break;
  1686. }
  1687. }