dss_features.c 20 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/dss_features.c
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. * Author: Archit Taneja <archit@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/types.h>
  21. #include <linux/err.h>
  22. #include <linux/slab.h>
  23. #include <video/omapdss.h>
  24. #include <plat/cpu.h>
  25. #include "dss.h"
  26. #include "dss_features.h"
  27. /* Defines a generic omap register field */
  28. struct dss_reg_field {
  29. u8 start, end;
  30. };
  31. struct dss_param_range {
  32. int min, max;
  33. };
  34. struct omap_dss_features {
  35. const struct dss_reg_field *reg_fields;
  36. const int num_reg_fields;
  37. const enum dss_feat_id *features;
  38. const int num_features;
  39. const int num_mgrs;
  40. const int num_ovls;
  41. const enum omap_display_type *supported_displays;
  42. const enum omap_color_mode *supported_color_modes;
  43. const enum omap_overlay_caps *overlay_caps;
  44. const char * const *clksrc_names;
  45. const struct dss_param_range *dss_params;
  46. const u32 buffer_size_unit;
  47. const u32 burst_size_unit;
  48. };
  49. /* This struct is assigned to one of the below during initialization */
  50. static const struct omap_dss_features *omap_current_dss_features;
  51. static const struct dss_reg_field omap2_dss_reg_fields[] = {
  52. [FEAT_REG_FIRHINC] = { 11, 0 },
  53. [FEAT_REG_FIRVINC] = { 27, 16 },
  54. [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
  55. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
  56. [FEAT_REG_FIFOSIZE] = { 8, 0 },
  57. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  58. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  59. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  60. [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
  61. [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
  62. [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
  63. [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
  64. };
  65. static const struct dss_reg_field omap3_dss_reg_fields[] = {
  66. [FEAT_REG_FIRHINC] = { 12, 0 },
  67. [FEAT_REG_FIRVINC] = { 28, 16 },
  68. [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
  69. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
  70. [FEAT_REG_FIFOSIZE] = { 10, 0 },
  71. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  72. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  73. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  74. [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
  75. [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
  76. [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
  77. [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
  78. };
  79. static const struct dss_reg_field omap4_dss_reg_fields[] = {
  80. [FEAT_REG_FIRHINC] = { 12, 0 },
  81. [FEAT_REG_FIRVINC] = { 28, 16 },
  82. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  83. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  84. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  85. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  86. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  87. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
  88. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  89. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  90. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  91. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  92. };
  93. static const enum omap_display_type omap2_dss_supported_displays[] = {
  94. /* OMAP_DSS_CHANNEL_LCD */
  95. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
  96. /* OMAP_DSS_CHANNEL_DIGIT */
  97. OMAP_DISPLAY_TYPE_VENC,
  98. };
  99. static const enum omap_display_type omap3430_dss_supported_displays[] = {
  100. /* OMAP_DSS_CHANNEL_LCD */
  101. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  102. OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
  103. /* OMAP_DSS_CHANNEL_DIGIT */
  104. OMAP_DISPLAY_TYPE_VENC,
  105. };
  106. static const enum omap_display_type omap3630_dss_supported_displays[] = {
  107. /* OMAP_DSS_CHANNEL_LCD */
  108. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  109. OMAP_DISPLAY_TYPE_DSI,
  110. /* OMAP_DSS_CHANNEL_DIGIT */
  111. OMAP_DISPLAY_TYPE_VENC,
  112. };
  113. static const enum omap_display_type omap4_dss_supported_displays[] = {
  114. /* OMAP_DSS_CHANNEL_LCD */
  115. OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
  116. /* OMAP_DSS_CHANNEL_DIGIT */
  117. OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
  118. /* OMAP_DSS_CHANNEL_LCD2 */
  119. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  120. OMAP_DISPLAY_TYPE_DSI,
  121. };
  122. static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
  123. /* OMAP_DSS_GFX */
  124. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  125. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  126. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  127. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
  128. /* OMAP_DSS_VIDEO1 */
  129. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  130. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  131. OMAP_DSS_COLOR_UYVY,
  132. /* OMAP_DSS_VIDEO2 */
  133. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  134. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  135. OMAP_DSS_COLOR_UYVY,
  136. };
  137. static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
  138. /* OMAP_DSS_GFX */
  139. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  140. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  141. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  142. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  143. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  144. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  145. /* OMAP_DSS_VIDEO1 */
  146. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
  147. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  148. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
  149. /* OMAP_DSS_VIDEO2 */
  150. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  151. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  152. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  153. OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
  154. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  155. };
  156. static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
  157. /* OMAP_DSS_GFX */
  158. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  159. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  160. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  161. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  162. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  163. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
  164. OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
  165. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
  166. /* OMAP_DSS_VIDEO1 */
  167. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  168. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  169. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  170. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  171. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  172. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  173. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  174. OMAP_DSS_COLOR_RGBX32,
  175. /* OMAP_DSS_VIDEO2 */
  176. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  177. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  178. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  179. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  180. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  181. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  182. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  183. OMAP_DSS_COLOR_RGBX32,
  184. /* OMAP_DSS_VIDEO3 */
  185. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  186. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  187. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  188. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  189. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  190. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  191. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  192. OMAP_DSS_COLOR_RGBX32,
  193. };
  194. static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
  195. /* OMAP_DSS_GFX */
  196. 0,
  197. /* OMAP_DSS_VIDEO1 */
  198. OMAP_DSS_OVL_CAP_SCALE,
  199. /* OMAP_DSS_VIDEO2 */
  200. OMAP_DSS_OVL_CAP_SCALE,
  201. };
  202. static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
  203. /* OMAP_DSS_GFX */
  204. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
  205. /* OMAP_DSS_VIDEO1 */
  206. OMAP_DSS_OVL_CAP_SCALE,
  207. /* OMAP_DSS_VIDEO2 */
  208. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA,
  209. };
  210. static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
  211. /* OMAP_DSS_GFX */
  212. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
  213. /* OMAP_DSS_VIDEO1 */
  214. OMAP_DSS_OVL_CAP_SCALE,
  215. /* OMAP_DSS_VIDEO2 */
  216. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  217. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA,
  218. };
  219. static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
  220. /* OMAP_DSS_GFX */
  221. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  222. OMAP_DSS_OVL_CAP_ZORDER,
  223. /* OMAP_DSS_VIDEO1 */
  224. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  225. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  226. /* OMAP_DSS_VIDEO2 */
  227. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  228. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  229. /* OMAP_DSS_VIDEO3 */
  230. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  231. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER,
  232. };
  233. static const char * const omap2_dss_clk_source_names[] = {
  234. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
  235. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
  236. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
  237. };
  238. static const char * const omap3_dss_clk_source_names[] = {
  239. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
  240. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
  241. [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
  242. };
  243. static const char * const omap4_dss_clk_source_names[] = {
  244. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
  245. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
  246. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
  247. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
  248. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
  249. };
  250. static const struct dss_param_range omap2_dss_param_range[] = {
  251. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  252. [FEAT_PARAM_DSS_PCD] = { 2, 255 },
  253. [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
  254. [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
  255. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
  256. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
  257. [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
  258. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
  259. [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
  260. /*
  261. * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
  262. * scaler cannot scale a image with width more than 768.
  263. */
  264. [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
  265. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  266. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  267. };
  268. static const struct dss_param_range omap3_dss_param_range[] = {
  269. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  270. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  271. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
  272. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
  273. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
  274. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
  275. [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
  276. [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
  277. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  278. [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
  279. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  280. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  281. };
  282. static const struct dss_param_range omap4_dss_param_range[] = {
  283. [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
  284. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  285. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  286. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  287. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  288. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  289. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  290. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  291. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  292. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  293. [FEAT_PARAM_MGR_WIDTH] = { 1, 2048 },
  294. [FEAT_PARAM_MGR_HEIGHT] = { 1, 2048 },
  295. };
  296. static const enum dss_feat_id omap2_dss_feat_list[] = {
  297. FEAT_LCDENABLEPOL,
  298. FEAT_LCDENABLESIGNAL,
  299. FEAT_PCKFREEENABLE,
  300. FEAT_FUNCGATED,
  301. FEAT_ROWREPEATENABLE,
  302. FEAT_RESIZECONF,
  303. };
  304. static const enum dss_feat_id omap3430_dss_feat_list[] = {
  305. FEAT_LCDENABLEPOL,
  306. FEAT_LCDENABLESIGNAL,
  307. FEAT_PCKFREEENABLE,
  308. FEAT_FUNCGATED,
  309. FEAT_LINEBUFFERSPLIT,
  310. FEAT_ROWREPEATENABLE,
  311. FEAT_RESIZECONF,
  312. FEAT_DSI_PLL_FREQSEL,
  313. FEAT_DSI_REVERSE_TXCLKESC,
  314. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  315. FEAT_CPR,
  316. FEAT_PRELOAD,
  317. FEAT_FIR_COEF_V,
  318. FEAT_ALPHA_FIXED_ZORDER,
  319. FEAT_FIFO_MERGE,
  320. FEAT_OMAP3_DSI_FIFO_BUG,
  321. };
  322. static const enum dss_feat_id omap3630_dss_feat_list[] = {
  323. FEAT_LCDENABLEPOL,
  324. FEAT_LCDENABLESIGNAL,
  325. FEAT_PCKFREEENABLE,
  326. FEAT_FUNCGATED,
  327. FEAT_LINEBUFFERSPLIT,
  328. FEAT_ROWREPEATENABLE,
  329. FEAT_RESIZECONF,
  330. FEAT_DSI_PLL_PWR_BUG,
  331. FEAT_DSI_PLL_FREQSEL,
  332. FEAT_CPR,
  333. FEAT_PRELOAD,
  334. FEAT_FIR_COEF_V,
  335. FEAT_ALPHA_FIXED_ZORDER,
  336. FEAT_FIFO_MERGE,
  337. FEAT_OMAP3_DSI_FIFO_BUG,
  338. };
  339. static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
  340. FEAT_MGR_LCD2,
  341. FEAT_CORE_CLK_DIV,
  342. FEAT_LCD_CLK_SRC,
  343. FEAT_DSI_DCS_CMD_CONFIG_VC,
  344. FEAT_DSI_VC_OCP_WIDTH,
  345. FEAT_DSI_GNQ,
  346. FEAT_HANDLE_UV_SEPARATE,
  347. FEAT_ATTR2,
  348. FEAT_CPR,
  349. FEAT_PRELOAD,
  350. FEAT_FIR_COEF_V,
  351. FEAT_ALPHA_FREE_ZORDER,
  352. FEAT_FIFO_MERGE,
  353. };
  354. static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
  355. FEAT_MGR_LCD2,
  356. FEAT_CORE_CLK_DIV,
  357. FEAT_LCD_CLK_SRC,
  358. FEAT_DSI_DCS_CMD_CONFIG_VC,
  359. FEAT_DSI_VC_OCP_WIDTH,
  360. FEAT_DSI_GNQ,
  361. FEAT_HDMI_CTS_SWMODE,
  362. FEAT_HANDLE_UV_SEPARATE,
  363. FEAT_ATTR2,
  364. FEAT_CPR,
  365. FEAT_PRELOAD,
  366. FEAT_FIR_COEF_V,
  367. FEAT_ALPHA_FREE_ZORDER,
  368. FEAT_FIFO_MERGE,
  369. };
  370. static const enum dss_feat_id omap4_dss_feat_list[] = {
  371. FEAT_MGR_LCD2,
  372. FEAT_CORE_CLK_DIV,
  373. FEAT_LCD_CLK_SRC,
  374. FEAT_DSI_DCS_CMD_CONFIG_VC,
  375. FEAT_DSI_VC_OCP_WIDTH,
  376. FEAT_DSI_GNQ,
  377. FEAT_HDMI_CTS_SWMODE,
  378. FEAT_HDMI_AUDIO_USE_MCLK,
  379. FEAT_HANDLE_UV_SEPARATE,
  380. FEAT_ATTR2,
  381. FEAT_CPR,
  382. FEAT_PRELOAD,
  383. FEAT_FIR_COEF_V,
  384. FEAT_ALPHA_FREE_ZORDER,
  385. FEAT_FIFO_MERGE,
  386. };
  387. /* OMAP2 DSS Features */
  388. static const struct omap_dss_features omap2_dss_features = {
  389. .reg_fields = omap2_dss_reg_fields,
  390. .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
  391. .features = omap2_dss_feat_list,
  392. .num_features = ARRAY_SIZE(omap2_dss_feat_list),
  393. .num_mgrs = 2,
  394. .num_ovls = 3,
  395. .supported_displays = omap2_dss_supported_displays,
  396. .supported_color_modes = omap2_dss_supported_color_modes,
  397. .overlay_caps = omap2_dss_overlay_caps,
  398. .clksrc_names = omap2_dss_clk_source_names,
  399. .dss_params = omap2_dss_param_range,
  400. .buffer_size_unit = 1,
  401. .burst_size_unit = 8,
  402. };
  403. /* OMAP3 DSS Features */
  404. static const struct omap_dss_features omap3430_dss_features = {
  405. .reg_fields = omap3_dss_reg_fields,
  406. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  407. .features = omap3430_dss_feat_list,
  408. .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
  409. .num_mgrs = 2,
  410. .num_ovls = 3,
  411. .supported_displays = omap3430_dss_supported_displays,
  412. .supported_color_modes = omap3_dss_supported_color_modes,
  413. .overlay_caps = omap3430_dss_overlay_caps,
  414. .clksrc_names = omap3_dss_clk_source_names,
  415. .dss_params = omap3_dss_param_range,
  416. .buffer_size_unit = 1,
  417. .burst_size_unit = 8,
  418. };
  419. static const struct omap_dss_features omap3630_dss_features = {
  420. .reg_fields = omap3_dss_reg_fields,
  421. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  422. .features = omap3630_dss_feat_list,
  423. .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
  424. .num_mgrs = 2,
  425. .num_ovls = 3,
  426. .supported_displays = omap3630_dss_supported_displays,
  427. .supported_color_modes = omap3_dss_supported_color_modes,
  428. .overlay_caps = omap3630_dss_overlay_caps,
  429. .clksrc_names = omap3_dss_clk_source_names,
  430. .dss_params = omap3_dss_param_range,
  431. .buffer_size_unit = 1,
  432. .burst_size_unit = 8,
  433. };
  434. /* OMAP4 DSS Features */
  435. /* For OMAP4430 ES 1.0 revision */
  436. static const struct omap_dss_features omap4430_es1_0_dss_features = {
  437. .reg_fields = omap4_dss_reg_fields,
  438. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  439. .features = omap4430_es1_0_dss_feat_list,
  440. .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
  441. .num_mgrs = 3,
  442. .num_ovls = 4,
  443. .supported_displays = omap4_dss_supported_displays,
  444. .supported_color_modes = omap4_dss_supported_color_modes,
  445. .overlay_caps = omap4_dss_overlay_caps,
  446. .clksrc_names = omap4_dss_clk_source_names,
  447. .dss_params = omap4_dss_param_range,
  448. .buffer_size_unit = 16,
  449. .burst_size_unit = 16,
  450. };
  451. /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
  452. static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
  453. .reg_fields = omap4_dss_reg_fields,
  454. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  455. .features = omap4430_es2_0_1_2_dss_feat_list,
  456. .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
  457. .num_mgrs = 3,
  458. .num_ovls = 4,
  459. .supported_displays = omap4_dss_supported_displays,
  460. .supported_color_modes = omap4_dss_supported_color_modes,
  461. .overlay_caps = omap4_dss_overlay_caps,
  462. .clksrc_names = omap4_dss_clk_source_names,
  463. .dss_params = omap4_dss_param_range,
  464. .buffer_size_unit = 16,
  465. .burst_size_unit = 16,
  466. };
  467. /* For all the other OMAP4 versions */
  468. static const struct omap_dss_features omap4_dss_features = {
  469. .reg_fields = omap4_dss_reg_fields,
  470. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  471. .features = omap4_dss_feat_list,
  472. .num_features = ARRAY_SIZE(omap4_dss_feat_list),
  473. .num_mgrs = 3,
  474. .num_ovls = 4,
  475. .supported_displays = omap4_dss_supported_displays,
  476. .supported_color_modes = omap4_dss_supported_color_modes,
  477. .overlay_caps = omap4_dss_overlay_caps,
  478. .clksrc_names = omap4_dss_clk_source_names,
  479. .dss_params = omap4_dss_param_range,
  480. .buffer_size_unit = 16,
  481. .burst_size_unit = 16,
  482. };
  483. #if defined(CONFIG_OMAP4_DSS_HDMI)
  484. /* HDMI OMAP4 Functions*/
  485. static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
  486. .video_configure = ti_hdmi_4xxx_basic_configure,
  487. .phy_enable = ti_hdmi_4xxx_phy_enable,
  488. .phy_disable = ti_hdmi_4xxx_phy_disable,
  489. .read_edid = ti_hdmi_4xxx_read_edid,
  490. .detect = ti_hdmi_4xxx_detect,
  491. .pll_enable = ti_hdmi_4xxx_pll_enable,
  492. .pll_disable = ti_hdmi_4xxx_pll_disable,
  493. .video_enable = ti_hdmi_4xxx_wp_video_start,
  494. .video_disable = ti_hdmi_4xxx_wp_video_stop,
  495. .dump_wrapper = ti_hdmi_4xxx_wp_dump,
  496. .dump_core = ti_hdmi_4xxx_core_dump,
  497. .dump_pll = ti_hdmi_4xxx_pll_dump,
  498. .dump_phy = ti_hdmi_4xxx_phy_dump,
  499. #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
  500. .audio_enable = ti_hdmi_4xxx_wp_audio_enable,
  501. .audio_disable = ti_hdmi_4xxx_wp_audio_disable,
  502. .audio_start = ti_hdmi_4xxx_audio_start,
  503. .audio_stop = ti_hdmi_4xxx_audio_stop,
  504. .audio_config = ti_hdmi_4xxx_audio_config,
  505. #endif
  506. };
  507. void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
  508. {
  509. if (cpu_is_omap44xx())
  510. ip_data->ops = &omap4_hdmi_functions;
  511. }
  512. #endif
  513. /* Functions returning values related to a DSS feature */
  514. int dss_feat_get_num_mgrs(void)
  515. {
  516. return omap_current_dss_features->num_mgrs;
  517. }
  518. int dss_feat_get_num_ovls(void)
  519. {
  520. return omap_current_dss_features->num_ovls;
  521. }
  522. unsigned long dss_feat_get_param_min(enum dss_range_param param)
  523. {
  524. return omap_current_dss_features->dss_params[param].min;
  525. }
  526. unsigned long dss_feat_get_param_max(enum dss_range_param param)
  527. {
  528. return omap_current_dss_features->dss_params[param].max;
  529. }
  530. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
  531. {
  532. return omap_current_dss_features->supported_displays[channel];
  533. }
  534. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
  535. {
  536. return omap_current_dss_features->supported_color_modes[plane];
  537. }
  538. enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
  539. {
  540. return omap_current_dss_features->overlay_caps[plane];
  541. }
  542. bool dss_feat_color_mode_supported(enum omap_plane plane,
  543. enum omap_color_mode color_mode)
  544. {
  545. return omap_current_dss_features->supported_color_modes[plane] &
  546. color_mode;
  547. }
  548. const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
  549. {
  550. return omap_current_dss_features->clksrc_names[id];
  551. }
  552. u32 dss_feat_get_buffer_size_unit(void)
  553. {
  554. return omap_current_dss_features->buffer_size_unit;
  555. }
  556. u32 dss_feat_get_burst_size_unit(void)
  557. {
  558. return omap_current_dss_features->burst_size_unit;
  559. }
  560. /* DSS has_feature check */
  561. bool dss_has_feature(enum dss_feat_id id)
  562. {
  563. int i;
  564. const enum dss_feat_id *features = omap_current_dss_features->features;
  565. const int num_features = omap_current_dss_features->num_features;
  566. for (i = 0; i < num_features; i++) {
  567. if (features[i] == id)
  568. return true;
  569. }
  570. return false;
  571. }
  572. void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
  573. {
  574. if (id >= omap_current_dss_features->num_reg_fields)
  575. BUG();
  576. *start = omap_current_dss_features->reg_fields[id].start;
  577. *end = omap_current_dss_features->reg_fields[id].end;
  578. }
  579. void dss_features_init(void)
  580. {
  581. if (cpu_is_omap24xx())
  582. omap_current_dss_features = &omap2_dss_features;
  583. else if (cpu_is_omap3630())
  584. omap_current_dss_features = &omap3630_dss_features;
  585. else if (cpu_is_omap34xx())
  586. omap_current_dss_features = &omap3430_dss_features;
  587. else if (omap_rev() == OMAP4430_REV_ES1_0)
  588. omap_current_dss_features = &omap4430_es1_0_dss_features;
  589. else if (omap_rev() == OMAP4430_REV_ES2_0 ||
  590. omap_rev() == OMAP4430_REV_ES2_1 ||
  591. omap_rev() == OMAP4430_REV_ES2_2)
  592. omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
  593. else if (cpu_is_omap44xx())
  594. omap_current_dss_features = &omap4_dss_features;
  595. else
  596. DSSWARN("Unsupported OMAP version");
  597. }