iwl-core.c 88 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <net/mac80211.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h" /* FIXME: remove */
  35. #include "iwl-debug.h"
  36. #include "iwl-core.h"
  37. #include "iwl-io.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. #include "iwl-helpers.h"
  41. MODULE_DESCRIPTION("iwl core");
  42. MODULE_VERSION(IWLWIFI_VERSION);
  43. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  44. MODULE_LICENSE("GPL");
  45. /*
  46. * set bt_coex_active to true, uCode will do kill/defer
  47. * every time the priority line is asserted (BT is sending signals on the
  48. * priority line in the PCIx).
  49. * set bt_coex_active to false, uCode will ignore the BT activity and
  50. * perform the normal operation
  51. *
  52. * User might experience transmit issue on some platform due to WiFi/BT
  53. * co-exist problem. The possible behaviors are:
  54. * Able to scan and finding all the available AP
  55. * Not able to associate with any AP
  56. * On those platforms, WiFi communication can be restored by set
  57. * "bt_coex_active" module parameter to "false"
  58. *
  59. * default: bt_coex_active = true (BT_COEX_ENABLE)
  60. */
  61. static bool bt_coex_active = true;
  62. module_param(bt_coex_active, bool, S_IRUGO);
  63. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  64. static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  65. {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  66. 0, COEX_UNASSOC_IDLE_FLAGS},
  67. {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  68. 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  69. {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  70. 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  71. {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  72. 0, COEX_CALIBRATION_FLAGS},
  73. {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  74. 0, COEX_PERIODIC_CALIBRATION_FLAGS},
  75. {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  76. 0, COEX_CONNECTION_ESTAB_FLAGS},
  77. {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  78. 0, COEX_ASSOCIATED_IDLE_FLAGS},
  79. {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  80. 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  81. {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  82. 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  83. {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  84. 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  85. {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  86. {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  87. {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  88. 0, COEX_STAND_ALONE_DEBUG_FLAGS},
  89. {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  90. 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  91. {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  92. {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  93. };
  94. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  95. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  96. IWL_RATE_SISO_##s##M_PLCP, \
  97. IWL_RATE_MIMO2_##s##M_PLCP,\
  98. IWL_RATE_MIMO3_##s##M_PLCP,\
  99. IWL_RATE_##r##M_IEEE, \
  100. IWL_RATE_##ip##M_INDEX, \
  101. IWL_RATE_##in##M_INDEX, \
  102. IWL_RATE_##rp##M_INDEX, \
  103. IWL_RATE_##rn##M_INDEX, \
  104. IWL_RATE_##pp##M_INDEX, \
  105. IWL_RATE_##np##M_INDEX }
  106. u32 iwl_debug_level;
  107. EXPORT_SYMBOL(iwl_debug_level);
  108. /*
  109. * Parameter order:
  110. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  111. *
  112. * If there isn't a valid next or previous rate then INV is used which
  113. * maps to IWL_RATE_INVALID
  114. *
  115. */
  116. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  117. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  118. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  119. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  120. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  121. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  122. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  123. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  124. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  125. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  126. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  127. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  128. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  129. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  130. /* FIXME:RS: ^^ should be INV (legacy) */
  131. };
  132. EXPORT_SYMBOL(iwl_rates);
  133. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  134. {
  135. int idx = 0;
  136. /* HT rate format */
  137. if (rate_n_flags & RATE_MCS_HT_MSK) {
  138. idx = (rate_n_flags & 0xff);
  139. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  140. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  141. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  142. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  143. idx += IWL_FIRST_OFDM_RATE;
  144. /* skip 9M not supported in ht*/
  145. if (idx >= IWL_RATE_9M_INDEX)
  146. idx += 1;
  147. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  148. return idx;
  149. /* legacy rate format, search for match in table */
  150. } else {
  151. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  152. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  153. return idx;
  154. }
  155. return -1;
  156. }
  157. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  158. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  159. {
  160. int i;
  161. u8 ind = ant;
  162. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  163. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  164. if (priv->hw_params.valid_tx_ant & BIT(ind))
  165. return ind;
  166. }
  167. return ant;
  168. }
  169. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  170. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  171. EXPORT_SYMBOL(iwl_bcast_addr);
  172. /* This function both allocates and initializes hw and priv. */
  173. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  174. struct ieee80211_ops *hw_ops)
  175. {
  176. struct iwl_priv *priv;
  177. /* mac80211 allocates memory for this device instance, including
  178. * space for this driver's private structure */
  179. struct ieee80211_hw *hw =
  180. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  181. if (hw == NULL) {
  182. printk(KERN_ERR "%s: Can not allocate network device\n",
  183. cfg->name);
  184. goto out;
  185. }
  186. priv = hw->priv;
  187. priv->hw = hw;
  188. out:
  189. return hw;
  190. }
  191. EXPORT_SYMBOL(iwl_alloc_all);
  192. void iwl_hw_detect(struct iwl_priv *priv)
  193. {
  194. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  195. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  196. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  197. }
  198. EXPORT_SYMBOL(iwl_hw_detect);
  199. /*
  200. * QoS support
  201. */
  202. void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  203. {
  204. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  205. return;
  206. priv->qos_data.def_qos_parm.qos_flags = 0;
  207. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  208. !priv->qos_data.qos_cap.q_AP.txop_request)
  209. priv->qos_data.def_qos_parm.qos_flags |=
  210. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  211. if (priv->qos_data.qos_active)
  212. priv->qos_data.def_qos_parm.qos_flags |=
  213. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  214. if (priv->current_ht_config.is_ht)
  215. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  216. if (force || iwl_is_associated(priv)) {
  217. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  218. priv->qos_data.qos_active,
  219. priv->qos_data.def_qos_parm.qos_flags);
  220. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  221. sizeof(struct iwl_qosparam_cmd),
  222. &priv->qos_data.def_qos_parm, NULL);
  223. }
  224. }
  225. EXPORT_SYMBOL(iwl_activate_qos);
  226. /*
  227. * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
  228. * (802.11b) (802.11a/g)
  229. * AC_BK 15 1023 7 0 0
  230. * AC_BE 15 1023 3 0 0
  231. * AC_VI 7 15 2 6.016ms 3.008ms
  232. * AC_VO 3 7 2 3.264ms 1.504ms
  233. */
  234. void iwl_reset_qos(struct iwl_priv *priv)
  235. {
  236. u16 cw_min = 15;
  237. u16 cw_max = 1023;
  238. u8 aifs = 2;
  239. bool is_legacy = false;
  240. unsigned long flags;
  241. int i;
  242. spin_lock_irqsave(&priv->lock, flags);
  243. /* QoS always active in AP and ADHOC mode
  244. * In STA mode wait for association
  245. */
  246. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  247. priv->iw_mode == NL80211_IFTYPE_AP)
  248. priv->qos_data.qos_active = 1;
  249. else
  250. priv->qos_data.qos_active = 0;
  251. /* check for legacy mode */
  252. if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  253. (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
  254. (priv->iw_mode == NL80211_IFTYPE_STATION &&
  255. (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
  256. cw_min = 31;
  257. is_legacy = 1;
  258. }
  259. if (priv->qos_data.qos_active)
  260. aifs = 3;
  261. /* AC_BE */
  262. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  263. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  264. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  265. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  266. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  267. if (priv->qos_data.qos_active) {
  268. /* AC_BK */
  269. i = 1;
  270. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  271. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  272. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  273. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  274. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  275. /* AC_VI */
  276. i = 2;
  277. priv->qos_data.def_qos_parm.ac[i].cw_min =
  278. cpu_to_le16((cw_min + 1) / 2 - 1);
  279. priv->qos_data.def_qos_parm.ac[i].cw_max =
  280. cpu_to_le16(cw_min);
  281. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  282. if (is_legacy)
  283. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  284. cpu_to_le16(6016);
  285. else
  286. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  287. cpu_to_le16(3008);
  288. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  289. /* AC_VO */
  290. i = 3;
  291. priv->qos_data.def_qos_parm.ac[i].cw_min =
  292. cpu_to_le16((cw_min + 1) / 4 - 1);
  293. priv->qos_data.def_qos_parm.ac[i].cw_max =
  294. cpu_to_le16((cw_min + 1) / 2 - 1);
  295. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  296. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  297. if (is_legacy)
  298. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  299. cpu_to_le16(3264);
  300. else
  301. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  302. cpu_to_le16(1504);
  303. } else {
  304. for (i = 1; i < 4; i++) {
  305. priv->qos_data.def_qos_parm.ac[i].cw_min =
  306. cpu_to_le16(cw_min);
  307. priv->qos_data.def_qos_parm.ac[i].cw_max =
  308. cpu_to_le16(cw_max);
  309. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  310. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  311. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  312. }
  313. }
  314. IWL_DEBUG_QOS(priv, "set QoS to default \n");
  315. spin_unlock_irqrestore(&priv->lock, flags);
  316. }
  317. EXPORT_SYMBOL(iwl_reset_qos);
  318. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  319. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  320. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  321. struct ieee80211_sta_ht_cap *ht_info,
  322. enum ieee80211_band band)
  323. {
  324. u16 max_bit_rate = 0;
  325. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  326. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  327. ht_info->cap = 0;
  328. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  329. ht_info->ht_supported = true;
  330. if (priv->cfg->ht_greenfield_support)
  331. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  332. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  333. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  334. if (priv->hw_params.ht40_channel & BIT(band)) {
  335. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  336. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  337. ht_info->mcs.rx_mask[4] = 0x01;
  338. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  339. }
  340. if (priv->cfg->mod_params->amsdu_size_8K)
  341. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  342. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  343. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  344. ht_info->mcs.rx_mask[0] = 0xFF;
  345. if (rx_chains_num >= 2)
  346. ht_info->mcs.rx_mask[1] = 0xFF;
  347. if (rx_chains_num >= 3)
  348. ht_info->mcs.rx_mask[2] = 0xFF;
  349. /* Highest supported Rx data rate */
  350. max_bit_rate *= rx_chains_num;
  351. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  352. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  353. /* Tx MCS capabilities */
  354. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  355. if (tx_chains_num != rx_chains_num) {
  356. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  357. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  358. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  359. }
  360. }
  361. /**
  362. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  363. */
  364. int iwlcore_init_geos(struct iwl_priv *priv)
  365. {
  366. struct iwl_channel_info *ch;
  367. struct ieee80211_supported_band *sband;
  368. struct ieee80211_channel *channels;
  369. struct ieee80211_channel *geo_ch;
  370. struct ieee80211_rate *rates;
  371. int i = 0;
  372. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  373. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  374. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  375. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  376. return 0;
  377. }
  378. channels = kzalloc(sizeof(struct ieee80211_channel) *
  379. priv->channel_count, GFP_KERNEL);
  380. if (!channels)
  381. return -ENOMEM;
  382. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  383. GFP_KERNEL);
  384. if (!rates) {
  385. kfree(channels);
  386. return -ENOMEM;
  387. }
  388. /* 5.2GHz channels start after the 2.4GHz channels */
  389. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  390. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  391. /* just OFDM */
  392. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  393. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  394. if (priv->cfg->sku & IWL_SKU_N)
  395. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  396. IEEE80211_BAND_5GHZ);
  397. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  398. sband->channels = channels;
  399. /* OFDM & CCK */
  400. sband->bitrates = rates;
  401. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  402. if (priv->cfg->sku & IWL_SKU_N)
  403. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  404. IEEE80211_BAND_2GHZ);
  405. priv->ieee_channels = channels;
  406. priv->ieee_rates = rates;
  407. for (i = 0; i < priv->channel_count; i++) {
  408. ch = &priv->channel_info[i];
  409. /* FIXME: might be removed if scan is OK */
  410. if (!is_channel_valid(ch))
  411. continue;
  412. if (is_channel_a_band(ch))
  413. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  414. else
  415. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  416. geo_ch = &sband->channels[sband->n_channels++];
  417. geo_ch->center_freq =
  418. ieee80211_channel_to_frequency(ch->channel);
  419. geo_ch->max_power = ch->max_power_avg;
  420. geo_ch->max_antenna_gain = 0xff;
  421. geo_ch->hw_value = ch->channel;
  422. if (is_channel_valid(ch)) {
  423. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  424. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  425. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  426. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  427. if (ch->flags & EEPROM_CHANNEL_RADAR)
  428. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  429. geo_ch->flags |= ch->ht40_extension_channel;
  430. if (ch->max_power_avg > priv->tx_power_device_lmt)
  431. priv->tx_power_device_lmt = ch->max_power_avg;
  432. } else {
  433. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  434. }
  435. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  436. ch->channel, geo_ch->center_freq,
  437. is_channel_a_band(ch) ? "5.2" : "2.4",
  438. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  439. "restricted" : "valid",
  440. geo_ch->flags);
  441. }
  442. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  443. priv->cfg->sku & IWL_SKU_A) {
  444. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  445. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  446. priv->pci_dev->device,
  447. priv->pci_dev->subsystem_device);
  448. priv->cfg->sku &= ~IWL_SKU_A;
  449. }
  450. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  451. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  452. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  453. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  454. return 0;
  455. }
  456. EXPORT_SYMBOL(iwlcore_init_geos);
  457. /*
  458. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  459. */
  460. void iwlcore_free_geos(struct iwl_priv *priv)
  461. {
  462. kfree(priv->ieee_channels);
  463. kfree(priv->ieee_rates);
  464. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  465. }
  466. EXPORT_SYMBOL(iwlcore_free_geos);
  467. /*
  468. * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
  469. * function.
  470. */
  471. void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
  472. __le32 *tx_flags)
  473. {
  474. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  475. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  476. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  477. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  478. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  479. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  480. }
  481. }
  482. EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
  483. static bool is_single_rx_stream(struct iwl_priv *priv)
  484. {
  485. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  486. priv->current_ht_config.single_chain_sufficient;
  487. }
  488. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  489. enum ieee80211_band band,
  490. u16 channel, u8 extension_chan_offset)
  491. {
  492. const struct iwl_channel_info *ch_info;
  493. ch_info = iwl_get_channel_info(priv, band, channel);
  494. if (!is_channel_valid(ch_info))
  495. return 0;
  496. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  497. return !(ch_info->ht40_extension_channel &
  498. IEEE80211_CHAN_NO_HT40PLUS);
  499. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  500. return !(ch_info->ht40_extension_channel &
  501. IEEE80211_CHAN_NO_HT40MINUS);
  502. return 0;
  503. }
  504. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  505. struct ieee80211_sta_ht_cap *sta_ht_inf)
  506. {
  507. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  508. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  509. return 0;
  510. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  511. * the bit will not set if it is pure 40MHz case
  512. */
  513. if (sta_ht_inf) {
  514. if (!sta_ht_inf->ht_supported)
  515. return 0;
  516. }
  517. #ifdef CONFIG_IWLWIFI_DEBUG
  518. if (priv->disable_ht40)
  519. return 0;
  520. #endif
  521. return iwl_is_channel_extension(priv, priv->band,
  522. le16_to_cpu(priv->staging_rxon.channel),
  523. ht_conf->extension_chan_offset);
  524. }
  525. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  526. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  527. {
  528. u16 new_val = 0;
  529. u16 beacon_factor = 0;
  530. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  531. new_val = beacon_val / beacon_factor;
  532. if (!new_val)
  533. new_val = max_beacon_val;
  534. return new_val;
  535. }
  536. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  537. {
  538. u64 tsf;
  539. s32 interval_tm, rem;
  540. unsigned long flags;
  541. struct ieee80211_conf *conf = NULL;
  542. u16 beacon_int;
  543. conf = ieee80211_get_hw_conf(priv->hw);
  544. spin_lock_irqsave(&priv->lock, flags);
  545. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  546. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  547. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  548. beacon_int = priv->beacon_int;
  549. priv->rxon_timing.atim_window = 0;
  550. } else {
  551. beacon_int = priv->vif->bss_conf.beacon_int;
  552. /* TODO: we need to get atim_window from upper stack
  553. * for now we set to 0 */
  554. priv->rxon_timing.atim_window = 0;
  555. }
  556. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  557. priv->hw_params.max_beacon_itrvl * 1024);
  558. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  559. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  560. interval_tm = beacon_int * 1024;
  561. rem = do_div(tsf, interval_tm);
  562. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  563. spin_unlock_irqrestore(&priv->lock, flags);
  564. IWL_DEBUG_ASSOC(priv,
  565. "beacon interval %d beacon timer %d beacon tim %d\n",
  566. le16_to_cpu(priv->rxon_timing.beacon_interval),
  567. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  568. le16_to_cpu(priv->rxon_timing.atim_window));
  569. }
  570. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  571. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  572. {
  573. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  574. if (hw_decrypt)
  575. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  576. else
  577. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  578. }
  579. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  580. /**
  581. * iwl_check_rxon_cmd - validate RXON structure is valid
  582. *
  583. * NOTE: This is really only useful during development and can eventually
  584. * be #ifdef'd out once the driver is stable and folks aren't actively
  585. * making changes
  586. */
  587. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  588. {
  589. int error = 0;
  590. int counter = 1;
  591. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  592. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  593. error |= le32_to_cpu(rxon->flags &
  594. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  595. RXON_FLG_RADAR_DETECT_MSK));
  596. if (error)
  597. IWL_WARN(priv, "check 24G fields %d | %d\n",
  598. counter++, error);
  599. } else {
  600. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  601. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  602. if (error)
  603. IWL_WARN(priv, "check 52 fields %d | %d\n",
  604. counter++, error);
  605. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  606. if (error)
  607. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  608. counter++, error);
  609. }
  610. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  611. if (error)
  612. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  613. /* make sure basic rates 6Mbps and 1Mbps are supported */
  614. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  615. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  616. if (error)
  617. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  618. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  619. if (error)
  620. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  621. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  622. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  623. if (error)
  624. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  625. counter++, error);
  626. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  627. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  628. if (error)
  629. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  630. counter++, error);
  631. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  632. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  633. if (error)
  634. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  635. counter++, error);
  636. if (error)
  637. IWL_WARN(priv, "Tuning to channel %d\n",
  638. le16_to_cpu(rxon->channel));
  639. if (error) {
  640. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  641. return -1;
  642. }
  643. return 0;
  644. }
  645. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  646. /**
  647. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  648. * @priv: staging_rxon is compared to active_rxon
  649. *
  650. * If the RXON structure is changing enough to require a new tune,
  651. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  652. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  653. */
  654. int iwl_full_rxon_required(struct iwl_priv *priv)
  655. {
  656. /* These items are only settable from the full RXON command */
  657. if (!(iwl_is_associated(priv)) ||
  658. compare_ether_addr(priv->staging_rxon.bssid_addr,
  659. priv->active_rxon.bssid_addr) ||
  660. compare_ether_addr(priv->staging_rxon.node_addr,
  661. priv->active_rxon.node_addr) ||
  662. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  663. priv->active_rxon.wlap_bssid_addr) ||
  664. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  665. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  666. (priv->staging_rxon.air_propagation !=
  667. priv->active_rxon.air_propagation) ||
  668. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  669. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  670. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  671. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  672. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  673. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  674. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  675. return 1;
  676. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  677. * be updated with the RXON_ASSOC command -- however only some
  678. * flag transitions are allowed using RXON_ASSOC */
  679. /* Check if we are not switching bands */
  680. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  681. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  682. return 1;
  683. /* Check if we are switching association toggle */
  684. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  685. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  686. return 1;
  687. return 0;
  688. }
  689. EXPORT_SYMBOL(iwl_full_rxon_required);
  690. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  691. {
  692. /*
  693. * Assign the lowest rate -- should really get this from
  694. * the beacon skb from mac80211.
  695. */
  696. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  697. return IWL_RATE_1M_PLCP;
  698. else
  699. return IWL_RATE_6M_PLCP;
  700. }
  701. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  702. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  703. {
  704. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  705. if (!ht_conf->is_ht) {
  706. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  707. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  708. RXON_FLG_HT40_PROT_MSK |
  709. RXON_FLG_HT_PROT_MSK);
  710. return;
  711. }
  712. /* FIXME: if the definition of ht_protection changed, the "translation"
  713. * will be needed for rxon->flags
  714. */
  715. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  716. /* Set up channel bandwidth:
  717. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  718. /* clear the HT channel mode before set the mode */
  719. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  720. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  721. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  722. /* pure ht40 */
  723. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  724. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  725. /* Note: control channel is opposite of extension channel */
  726. switch (ht_conf->extension_chan_offset) {
  727. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  728. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  729. break;
  730. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  731. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  732. break;
  733. }
  734. } else {
  735. /* Note: control channel is opposite of extension channel */
  736. switch (ht_conf->extension_chan_offset) {
  737. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  738. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  739. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  740. break;
  741. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  742. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  743. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  744. break;
  745. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  746. default:
  747. /* channel location only valid if in Mixed mode */
  748. IWL_ERR(priv, "invalid extension channel offset\n");
  749. break;
  750. }
  751. }
  752. } else {
  753. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  754. }
  755. if (priv->cfg->ops->hcmd->set_rxon_chain)
  756. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  757. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  758. "extension channel offset 0x%x\n",
  759. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  760. ht_conf->extension_chan_offset);
  761. return;
  762. }
  763. EXPORT_SYMBOL(iwl_set_rxon_ht);
  764. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  765. #define IWL_NUM_RX_CHAINS_SINGLE 2
  766. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  767. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  768. /*
  769. * Determine how many receiver/antenna chains to use.
  770. *
  771. * More provides better reception via diversity. Fewer saves power
  772. * at the expense of throughput, but only when not in powersave to
  773. * start with.
  774. *
  775. * MIMO (dual stream) requires at least 2, but works better with 3.
  776. * This does not determine *which* chains to use, just how many.
  777. */
  778. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  779. {
  780. /* # of Rx chains to use when expecting MIMO. */
  781. if (is_single_rx_stream(priv))
  782. return IWL_NUM_RX_CHAINS_SINGLE;
  783. else
  784. return IWL_NUM_RX_CHAINS_MULTIPLE;
  785. }
  786. /*
  787. * When we are in power saving mode, unless device support spatial
  788. * multiplexing power save, use the active count for rx chain count.
  789. */
  790. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  791. {
  792. /* # Rx chains when idling, depending on SMPS mode */
  793. switch (priv->current_ht_config.smps) {
  794. case IEEE80211_SMPS_STATIC:
  795. case IEEE80211_SMPS_DYNAMIC:
  796. return IWL_NUM_IDLE_CHAINS_SINGLE;
  797. case IEEE80211_SMPS_OFF:
  798. return active_cnt;
  799. default:
  800. WARN(1, "invalid SMPS mode %d",
  801. priv->current_ht_config.smps);
  802. return active_cnt;
  803. }
  804. }
  805. /* up to 4 chains */
  806. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  807. {
  808. u8 res;
  809. res = (chain_bitmap & BIT(0)) >> 0;
  810. res += (chain_bitmap & BIT(1)) >> 1;
  811. res += (chain_bitmap & BIT(2)) >> 2;
  812. res += (chain_bitmap & BIT(3)) >> 3;
  813. return res;
  814. }
  815. /**
  816. * iwl_is_monitor_mode - Determine if interface in monitor mode
  817. *
  818. * priv->iw_mode is set in add_interface, but add_interface is
  819. * never called for monitor mode. The only way mac80211 informs us about
  820. * monitor mode is through configuring filters (call to configure_filter).
  821. */
  822. bool iwl_is_monitor_mode(struct iwl_priv *priv)
  823. {
  824. return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
  825. }
  826. EXPORT_SYMBOL(iwl_is_monitor_mode);
  827. /**
  828. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  829. *
  830. * Selects how many and which Rx receivers/antennas/chains to use.
  831. * This should not be used for scan command ... it puts data in wrong place.
  832. */
  833. void iwl_set_rxon_chain(struct iwl_priv *priv)
  834. {
  835. bool is_single = is_single_rx_stream(priv);
  836. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  837. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  838. u32 active_chains;
  839. u16 rx_chain;
  840. /* Tell uCode which antennas are actually connected.
  841. * Before first association, we assume all antennas are connected.
  842. * Just after first association, iwl_chain_noise_calibration()
  843. * checks which antennas actually *are* connected. */
  844. if (priv->chain_noise_data.active_chains)
  845. active_chains = priv->chain_noise_data.active_chains;
  846. else
  847. active_chains = priv->hw_params.valid_rx_ant;
  848. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  849. /* How many receivers should we use? */
  850. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  851. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  852. /* correct rx chain count according hw settings
  853. * and chain noise calibration
  854. */
  855. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  856. if (valid_rx_cnt < active_rx_cnt)
  857. active_rx_cnt = valid_rx_cnt;
  858. if (valid_rx_cnt < idle_rx_cnt)
  859. idle_rx_cnt = valid_rx_cnt;
  860. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  861. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  862. /* copied from 'iwl_bg_request_scan()' */
  863. /* Force use of chains B and C (0x6) for Rx for 4965
  864. * Avoid A (0x1) because of its off-channel reception on A-band.
  865. * MIMO is not used here, but value is required */
  866. if (iwl_is_monitor_mode(priv) &&
  867. !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
  868. ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
  869. rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
  870. rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
  871. rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  872. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  873. }
  874. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  875. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  876. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  877. else
  878. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  879. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  880. priv->staging_rxon.rx_chain,
  881. active_rx_cnt, idle_rx_cnt);
  882. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  883. active_rx_cnt < idle_rx_cnt);
  884. }
  885. EXPORT_SYMBOL(iwl_set_rxon_chain);
  886. /**
  887. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  888. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  889. * @channel: Any channel valid for the requested phymode
  890. * In addition to setting the staging RXON, priv->phymode is also set.
  891. *
  892. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  893. * in the staging RXON flag structure based on the phymode
  894. */
  895. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  896. {
  897. enum ieee80211_band band = ch->band;
  898. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  899. if (!iwl_get_channel_info(priv, band, channel)) {
  900. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  901. channel, band);
  902. return -EINVAL;
  903. }
  904. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  905. (priv->band == band))
  906. return 0;
  907. priv->staging_rxon.channel = cpu_to_le16(channel);
  908. if (band == IEEE80211_BAND_5GHZ)
  909. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  910. else
  911. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  912. priv->band = band;
  913. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  914. return 0;
  915. }
  916. EXPORT_SYMBOL(iwl_set_rxon_channel);
  917. void iwl_set_flags_for_band(struct iwl_priv *priv,
  918. enum ieee80211_band band)
  919. {
  920. if (band == IEEE80211_BAND_5GHZ) {
  921. priv->staging_rxon.flags &=
  922. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  923. | RXON_FLG_CCK_MSK);
  924. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  925. } else {
  926. /* Copied from iwl_post_associate() */
  927. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  928. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  929. else
  930. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  931. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  932. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  933. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  934. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  935. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  936. }
  937. }
  938. /*
  939. * initialize rxon structure with default values from eeprom
  940. */
  941. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  942. {
  943. const struct iwl_channel_info *ch_info;
  944. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  945. switch (mode) {
  946. case NL80211_IFTYPE_AP:
  947. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  948. break;
  949. case NL80211_IFTYPE_STATION:
  950. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  951. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  952. break;
  953. case NL80211_IFTYPE_ADHOC:
  954. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  955. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  956. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  957. RXON_FILTER_ACCEPT_GRP_MSK;
  958. break;
  959. default:
  960. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  961. break;
  962. }
  963. #if 0
  964. /* TODO: Figure out when short_preamble would be set and cache from
  965. * that */
  966. if (!hw_to_local(priv->hw)->short_preamble)
  967. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  968. else
  969. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  970. #endif
  971. ch_info = iwl_get_channel_info(priv, priv->band,
  972. le16_to_cpu(priv->active_rxon.channel));
  973. if (!ch_info)
  974. ch_info = &priv->channel_info[0];
  975. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  976. priv->band = ch_info->band;
  977. iwl_set_flags_for_band(priv, priv->band);
  978. priv->staging_rxon.ofdm_basic_rates =
  979. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  980. priv->staging_rxon.cck_basic_rates =
  981. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  982. /* clear both MIX and PURE40 mode flag */
  983. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  984. RXON_FLG_CHANNEL_MODE_PURE_40);
  985. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  986. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  987. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  988. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  989. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  990. }
  991. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  992. static void iwl_set_rate(struct iwl_priv *priv)
  993. {
  994. const struct ieee80211_supported_band *hw = NULL;
  995. struct ieee80211_rate *rate;
  996. int i;
  997. hw = iwl_get_hw_mode(priv, priv->band);
  998. if (!hw) {
  999. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1000. return;
  1001. }
  1002. priv->active_rate = 0;
  1003. for (i = 0; i < hw->n_bitrates; i++) {
  1004. rate = &(hw->bitrates[i]);
  1005. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  1006. priv->active_rate |= (1 << rate->hw_value);
  1007. }
  1008. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  1009. priv->staging_rxon.cck_basic_rates =
  1010. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1011. priv->staging_rxon.ofdm_basic_rates =
  1012. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1013. }
  1014. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  1015. {
  1016. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1017. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  1018. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  1019. if (priv->switch_rxon.switch_in_progress) {
  1020. if (!le32_to_cpu(csa->status) &&
  1021. (csa->channel == priv->switch_rxon.channel)) {
  1022. rxon->channel = csa->channel;
  1023. priv->staging_rxon.channel = csa->channel;
  1024. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  1025. le16_to_cpu(csa->channel));
  1026. } else
  1027. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  1028. le16_to_cpu(csa->channel));
  1029. priv->switch_rxon.switch_in_progress = false;
  1030. }
  1031. }
  1032. EXPORT_SYMBOL(iwl_rx_csa);
  1033. #ifdef CONFIG_IWLWIFI_DEBUG
  1034. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  1035. {
  1036. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  1037. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  1038. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  1039. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  1040. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  1041. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  1042. le32_to_cpu(rxon->filter_flags));
  1043. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  1044. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  1045. rxon->ofdm_basic_rates);
  1046. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  1047. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  1048. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  1049. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  1050. }
  1051. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  1052. #endif
  1053. /**
  1054. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  1055. */
  1056. void iwl_irq_handle_error(struct iwl_priv *priv)
  1057. {
  1058. /* Set the FW error flag -- cleared on iwl_down */
  1059. set_bit(STATUS_FW_ERROR, &priv->status);
  1060. /* Cancel currently queued command. */
  1061. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  1062. priv->cfg->ops->lib->dump_nic_error_log(priv);
  1063. if (priv->cfg->ops->lib->dump_csr)
  1064. priv->cfg->ops->lib->dump_csr(priv);
  1065. if (priv->cfg->ops->lib->dump_fh)
  1066. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  1067. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  1068. #ifdef CONFIG_IWLWIFI_DEBUG
  1069. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  1070. iwl_print_rx_config_cmd(priv);
  1071. #endif
  1072. wake_up_interruptible(&priv->wait_command_queue);
  1073. /* Keep the restart process from trying to send host
  1074. * commands by clearing the INIT status bit */
  1075. clear_bit(STATUS_READY, &priv->status);
  1076. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1077. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  1078. "Restarting adapter due to uCode error.\n");
  1079. if (priv->cfg->mod_params->restart_fw)
  1080. queue_work(priv->workqueue, &priv->restart);
  1081. }
  1082. }
  1083. EXPORT_SYMBOL(iwl_irq_handle_error);
  1084. static int iwl_apm_stop_master(struct iwl_priv *priv)
  1085. {
  1086. int ret = 0;
  1087. /* stop device's busmaster DMA activity */
  1088. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  1089. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  1090. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  1091. if (ret)
  1092. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  1093. IWL_DEBUG_INFO(priv, "stop master\n");
  1094. return ret;
  1095. }
  1096. void iwl_apm_stop(struct iwl_priv *priv)
  1097. {
  1098. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  1099. /* Stop device's DMA activity */
  1100. iwl_apm_stop_master(priv);
  1101. /* Reset the entire device */
  1102. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  1103. udelay(10);
  1104. /*
  1105. * Clear "initialization complete" bit to move adapter from
  1106. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  1107. */
  1108. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1109. }
  1110. EXPORT_SYMBOL(iwl_apm_stop);
  1111. /*
  1112. * Start up NIC's basic functionality after it has been reset
  1113. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  1114. * NOTE: This does not load uCode nor start the embedded processor
  1115. */
  1116. int iwl_apm_init(struct iwl_priv *priv)
  1117. {
  1118. int ret = 0;
  1119. u16 lctl;
  1120. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  1121. /*
  1122. * Use "set_bit" below rather than "write", to preserve any hardware
  1123. * bits already set by default after reset.
  1124. */
  1125. /* Disable L0S exit timer (platform NMI Work/Around) */
  1126. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1127. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  1128. /*
  1129. * Disable L0s without affecting L1;
  1130. * don't wait for ICH L0s (ICH bug W/A)
  1131. */
  1132. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1133. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  1134. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  1135. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  1136. /*
  1137. * Enable HAP INTA (interrupt from management bus) to
  1138. * wake device's PCI Express link L1a -> L0s
  1139. * NOTE: This is no-op for 3945 (non-existant bit)
  1140. */
  1141. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1142. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  1143. /*
  1144. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  1145. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  1146. * If so (likely), disable L0S, so device moves directly L0->L1;
  1147. * costs negligible amount of power savings.
  1148. * If not (unlikely), enable L0S, so there is at least some
  1149. * power savings, even without L1.
  1150. */
  1151. if (priv->cfg->set_l0s) {
  1152. lctl = iwl_pcie_link_ctl(priv);
  1153. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1154. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1155. /* L1-ASPM enabled; disable(!) L0S */
  1156. iwl_set_bit(priv, CSR_GIO_REG,
  1157. CSR_GIO_REG_VAL_L0S_ENABLED);
  1158. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1159. } else {
  1160. /* L1-ASPM disabled; enable(!) L0S */
  1161. iwl_clear_bit(priv, CSR_GIO_REG,
  1162. CSR_GIO_REG_VAL_L0S_ENABLED);
  1163. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1164. }
  1165. }
  1166. /* Configure analog phase-lock-loop before activating to D0A */
  1167. if (priv->cfg->pll_cfg_val)
  1168. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1169. /*
  1170. * Set "initialization complete" bit to move adapter from
  1171. * D0U* --> D0A* (powered-up active) state.
  1172. */
  1173. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1174. /*
  1175. * Wait for clock stabilization; once stabilized, access to
  1176. * device-internal resources is supported, e.g. iwl_write_prph()
  1177. * and accesses to uCode SRAM.
  1178. */
  1179. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1180. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1181. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1182. if (ret < 0) {
  1183. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1184. goto out;
  1185. }
  1186. /*
  1187. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1188. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1189. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1190. * and don't need BSM to restore data after power-saving sleep.
  1191. *
  1192. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1193. * do not disable clocks. This preserves any hardware bits already
  1194. * set by default in "CLK_CTRL_REG" after reset.
  1195. */
  1196. if (priv->cfg->use_bsm)
  1197. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1198. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1199. else
  1200. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1201. APMG_CLK_VAL_DMA_CLK_RQT);
  1202. udelay(20);
  1203. /* Disable L1-Active */
  1204. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1205. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1206. out:
  1207. return ret;
  1208. }
  1209. EXPORT_SYMBOL(iwl_apm_init);
  1210. void iwl_configure_filter(struct ieee80211_hw *hw,
  1211. unsigned int changed_flags,
  1212. unsigned int *total_flags,
  1213. u64 multicast)
  1214. {
  1215. struct iwl_priv *priv = hw->priv;
  1216. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1217. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1218. changed_flags, *total_flags);
  1219. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1220. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1221. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1222. else
  1223. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1224. }
  1225. if (changed_flags & FIF_ALLMULTI) {
  1226. if (*total_flags & FIF_ALLMULTI)
  1227. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1228. else
  1229. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1230. }
  1231. if (changed_flags & FIF_CONTROL) {
  1232. if (*total_flags & FIF_CONTROL)
  1233. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1234. else
  1235. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1236. }
  1237. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1238. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1239. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1240. else
  1241. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1242. }
  1243. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1244. * since mac80211 will call ieee80211_hw_config immediately.
  1245. * (mc_list is not supported at this time). Otherwise, we need to
  1246. * queue a background iwl_commit_rxon work.
  1247. */
  1248. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1249. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1250. }
  1251. EXPORT_SYMBOL(iwl_configure_filter);
  1252. int iwl_set_hw_params(struct iwl_priv *priv)
  1253. {
  1254. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1255. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1256. if (priv->cfg->mod_params->amsdu_size_8K)
  1257. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1258. else
  1259. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1260. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1261. if (priv->cfg->mod_params->disable_11n)
  1262. priv->cfg->sku &= ~IWL_SKU_N;
  1263. /* Device-specific setup */
  1264. return priv->cfg->ops->lib->set_hw_params(priv);
  1265. }
  1266. EXPORT_SYMBOL(iwl_set_hw_params);
  1267. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1268. {
  1269. int ret = 0;
  1270. s8 prev_tx_power = priv->tx_power_user_lmt;
  1271. if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
  1272. IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
  1273. tx_power,
  1274. IWL_TX_POWER_TARGET_POWER_MIN);
  1275. return -EINVAL;
  1276. }
  1277. if (tx_power > priv->tx_power_device_lmt) {
  1278. IWL_WARN(priv,
  1279. "Requested user TXPOWER %d above upper limit %d.\n",
  1280. tx_power, priv->tx_power_device_lmt);
  1281. return -EINVAL;
  1282. }
  1283. if (priv->tx_power_user_lmt != tx_power)
  1284. force = true;
  1285. /* if nic is not up don't send command */
  1286. if (iwl_is_ready_rf(priv)) {
  1287. priv->tx_power_user_lmt = tx_power;
  1288. if (force && priv->cfg->ops->lib->send_tx_power)
  1289. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1290. else if (!priv->cfg->ops->lib->send_tx_power)
  1291. ret = -EOPNOTSUPP;
  1292. /*
  1293. * if fail to set tx_power, restore the orig. tx power
  1294. */
  1295. if (ret)
  1296. priv->tx_power_user_lmt = prev_tx_power;
  1297. }
  1298. /*
  1299. * Even this is an async host command, the command
  1300. * will always report success from uCode
  1301. * So once driver can placing the command into the queue
  1302. * successfully, driver can use priv->tx_power_user_lmt
  1303. * to reflect the current tx power
  1304. */
  1305. return ret;
  1306. }
  1307. EXPORT_SYMBOL(iwl_set_tx_power);
  1308. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1309. {
  1310. struct iwl_priv *priv = data;
  1311. u32 inta, inta_mask;
  1312. u32 inta_fh;
  1313. unsigned long flags;
  1314. if (!priv)
  1315. return IRQ_NONE;
  1316. spin_lock_irqsave(&priv->lock, flags);
  1317. /* Disable (but don't clear!) interrupts here to avoid
  1318. * back-to-back ISRs and sporadic interrupts from our NIC.
  1319. * If we have something to service, the tasklet will re-enable ints.
  1320. * If we *don't* have something, we'll re-enable before leaving here. */
  1321. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1322. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1323. /* Discover which interrupts are active/pending */
  1324. inta = iwl_read32(priv, CSR_INT);
  1325. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1326. /* Ignore interrupt if there's nothing in NIC to service.
  1327. * This may be due to IRQ shared with another device,
  1328. * or due to sporadic interrupts thrown from our NIC. */
  1329. if (!inta && !inta_fh) {
  1330. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1331. goto none;
  1332. }
  1333. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1334. /* Hardware disappeared. It might have already raised
  1335. * an interrupt */
  1336. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1337. goto unplugged;
  1338. }
  1339. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1340. inta, inta_mask, inta_fh);
  1341. inta &= ~CSR_INT_BIT_SCD;
  1342. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1343. if (likely(inta || inta_fh))
  1344. tasklet_schedule(&priv->irq_tasklet);
  1345. unplugged:
  1346. spin_unlock_irqrestore(&priv->lock, flags);
  1347. return IRQ_HANDLED;
  1348. none:
  1349. /* re-enable interrupts here since we don't have anything to service. */
  1350. /* only Re-enable if diabled by irq */
  1351. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1352. iwl_enable_interrupts(priv);
  1353. spin_unlock_irqrestore(&priv->lock, flags);
  1354. return IRQ_NONE;
  1355. }
  1356. EXPORT_SYMBOL(iwl_isr_legacy);
  1357. int iwl_send_bt_config(struct iwl_priv *priv)
  1358. {
  1359. struct iwl_bt_cmd bt_cmd = {
  1360. .lead_time = BT_LEAD_TIME_DEF,
  1361. .max_kill = BT_MAX_KILL_DEF,
  1362. .kill_ack_mask = 0,
  1363. .kill_cts_mask = 0,
  1364. };
  1365. if (!bt_coex_active)
  1366. bt_cmd.flags = BT_COEX_DISABLE;
  1367. else
  1368. bt_cmd.flags = BT_COEX_ENABLE;
  1369. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1370. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1371. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1372. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1373. }
  1374. EXPORT_SYMBOL(iwl_send_bt_config);
  1375. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1376. {
  1377. struct iwl_statistics_cmd statistics_cmd = {
  1378. .configuration_flags =
  1379. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1380. };
  1381. if (flags & CMD_ASYNC)
  1382. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1383. sizeof(struct iwl_statistics_cmd),
  1384. &statistics_cmd, NULL);
  1385. else
  1386. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1387. sizeof(struct iwl_statistics_cmd),
  1388. &statistics_cmd);
  1389. }
  1390. EXPORT_SYMBOL(iwl_send_statistics_request);
  1391. /**
  1392. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1393. * using sample data 100 bytes apart. If these sample points are good,
  1394. * it's a pretty good bet that everything between them is good, too.
  1395. */
  1396. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1397. {
  1398. u32 val;
  1399. int ret = 0;
  1400. u32 errcnt = 0;
  1401. u32 i;
  1402. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1403. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1404. /* read data comes through single port, auto-incr addr */
  1405. /* NOTE: Use the debugless read so we don't flood kernel log
  1406. * if IWL_DL_IO is set */
  1407. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1408. i + IWL49_RTC_INST_LOWER_BOUND);
  1409. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1410. if (val != le32_to_cpu(*image)) {
  1411. ret = -EIO;
  1412. errcnt++;
  1413. if (errcnt >= 3)
  1414. break;
  1415. }
  1416. }
  1417. return ret;
  1418. }
  1419. /**
  1420. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1421. * looking at all data.
  1422. */
  1423. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1424. u32 len)
  1425. {
  1426. u32 val;
  1427. u32 save_len = len;
  1428. int ret = 0;
  1429. u32 errcnt;
  1430. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1431. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1432. IWL49_RTC_INST_LOWER_BOUND);
  1433. errcnt = 0;
  1434. for (; len > 0; len -= sizeof(u32), image++) {
  1435. /* read data comes through single port, auto-incr addr */
  1436. /* NOTE: Use the debugless read so we don't flood kernel log
  1437. * if IWL_DL_IO is set */
  1438. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1439. if (val != le32_to_cpu(*image)) {
  1440. IWL_ERR(priv, "uCode INST section is invalid at "
  1441. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1442. save_len - len, val, le32_to_cpu(*image));
  1443. ret = -EIO;
  1444. errcnt++;
  1445. if (errcnt >= 20)
  1446. break;
  1447. }
  1448. }
  1449. if (!errcnt)
  1450. IWL_DEBUG_INFO(priv,
  1451. "ucode image in INSTRUCTION memory is good\n");
  1452. return ret;
  1453. }
  1454. /**
  1455. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1456. * and verify its contents
  1457. */
  1458. int iwl_verify_ucode(struct iwl_priv *priv)
  1459. {
  1460. __le32 *image;
  1461. u32 len;
  1462. int ret;
  1463. /* Try bootstrap */
  1464. image = (__le32 *)priv->ucode_boot.v_addr;
  1465. len = priv->ucode_boot.len;
  1466. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1467. if (!ret) {
  1468. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1469. return 0;
  1470. }
  1471. /* Try initialize */
  1472. image = (__le32 *)priv->ucode_init.v_addr;
  1473. len = priv->ucode_init.len;
  1474. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1475. if (!ret) {
  1476. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1477. return 0;
  1478. }
  1479. /* Try runtime/protocol */
  1480. image = (__le32 *)priv->ucode_code.v_addr;
  1481. len = priv->ucode_code.len;
  1482. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1483. if (!ret) {
  1484. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1485. return 0;
  1486. }
  1487. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1488. /* Since nothing seems to match, show first several data entries in
  1489. * instruction SRAM, so maybe visual inspection will give a clue.
  1490. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1491. image = (__le32 *)priv->ucode_boot.v_addr;
  1492. len = priv->ucode_boot.len;
  1493. ret = iwl_verify_inst_full(priv, image, len);
  1494. return ret;
  1495. }
  1496. EXPORT_SYMBOL(iwl_verify_ucode);
  1497. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1498. {
  1499. struct iwl_ct_kill_config cmd;
  1500. struct iwl_ct_kill_throttling_config adv_cmd;
  1501. unsigned long flags;
  1502. int ret = 0;
  1503. spin_lock_irqsave(&priv->lock, flags);
  1504. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1505. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1506. spin_unlock_irqrestore(&priv->lock, flags);
  1507. priv->thermal_throttle.ct_kill_toggle = false;
  1508. if (priv->cfg->support_ct_kill_exit) {
  1509. adv_cmd.critical_temperature_enter =
  1510. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1511. adv_cmd.critical_temperature_exit =
  1512. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1513. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1514. sizeof(adv_cmd), &adv_cmd);
  1515. if (ret)
  1516. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1517. else
  1518. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1519. "succeeded, "
  1520. "critical temperature enter is %d,"
  1521. "exit is %d\n",
  1522. priv->hw_params.ct_kill_threshold,
  1523. priv->hw_params.ct_kill_exit_threshold);
  1524. } else {
  1525. cmd.critical_temperature_R =
  1526. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1527. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1528. sizeof(cmd), &cmd);
  1529. if (ret)
  1530. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1531. else
  1532. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1533. "succeeded, "
  1534. "critical temperature is %d\n",
  1535. priv->hw_params.ct_kill_threshold);
  1536. }
  1537. }
  1538. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1539. /*
  1540. * CARD_STATE_CMD
  1541. *
  1542. * Use: Sets the device's internal card state to enable, disable, or halt
  1543. *
  1544. * When in the 'enable' state the card operates as normal.
  1545. * When in the 'disable' state, the card enters into a low power mode.
  1546. * When in the 'halt' state, the card is shut down and must be fully
  1547. * restarted to come back on.
  1548. */
  1549. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1550. {
  1551. struct iwl_host_cmd cmd = {
  1552. .id = REPLY_CARD_STATE_CMD,
  1553. .len = sizeof(u32),
  1554. .data = &flags,
  1555. .flags = meta_flag,
  1556. };
  1557. return iwl_send_cmd(priv, &cmd);
  1558. }
  1559. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1560. struct iwl_rx_mem_buffer *rxb)
  1561. {
  1562. #ifdef CONFIG_IWLWIFI_DEBUG
  1563. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1564. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1565. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1566. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1567. #endif
  1568. }
  1569. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1570. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1571. struct iwl_rx_mem_buffer *rxb)
  1572. {
  1573. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1574. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1575. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1576. "notification for %s:\n", len,
  1577. get_cmd_string(pkt->hdr.cmd));
  1578. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1579. }
  1580. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1581. void iwl_rx_reply_error(struct iwl_priv *priv,
  1582. struct iwl_rx_mem_buffer *rxb)
  1583. {
  1584. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1585. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1586. "seq 0x%04X ser 0x%08X\n",
  1587. le32_to_cpu(pkt->u.err_resp.error_type),
  1588. get_cmd_string(pkt->u.err_resp.cmd_id),
  1589. pkt->u.err_resp.cmd_id,
  1590. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1591. le32_to_cpu(pkt->u.err_resp.error_info));
  1592. }
  1593. EXPORT_SYMBOL(iwl_rx_reply_error);
  1594. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1595. {
  1596. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1597. }
  1598. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1599. const struct ieee80211_tx_queue_params *params)
  1600. {
  1601. struct iwl_priv *priv = hw->priv;
  1602. unsigned long flags;
  1603. int q;
  1604. IWL_DEBUG_MAC80211(priv, "enter\n");
  1605. if (!iwl_is_ready_rf(priv)) {
  1606. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1607. return -EIO;
  1608. }
  1609. if (queue >= AC_NUM) {
  1610. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1611. return 0;
  1612. }
  1613. q = AC_NUM - 1 - queue;
  1614. spin_lock_irqsave(&priv->lock, flags);
  1615. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1616. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1617. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1618. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1619. cpu_to_le16((params->txop * 32));
  1620. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1621. priv->qos_data.qos_active = 1;
  1622. if (priv->iw_mode == NL80211_IFTYPE_AP)
  1623. iwl_activate_qos(priv, 1);
  1624. else if (priv->assoc_id && iwl_is_associated(priv))
  1625. iwl_activate_qos(priv, 0);
  1626. spin_unlock_irqrestore(&priv->lock, flags);
  1627. IWL_DEBUG_MAC80211(priv, "leave\n");
  1628. return 0;
  1629. }
  1630. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1631. static void iwl_ht_conf(struct iwl_priv *priv,
  1632. struct ieee80211_bss_conf *bss_conf)
  1633. {
  1634. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1635. struct ieee80211_sta *sta;
  1636. IWL_DEBUG_MAC80211(priv, "enter: \n");
  1637. if (!ht_conf->is_ht)
  1638. return;
  1639. ht_conf->ht_protection =
  1640. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1641. ht_conf->non_GF_STA_present =
  1642. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1643. ht_conf->single_chain_sufficient = false;
  1644. switch (priv->iw_mode) {
  1645. case NL80211_IFTYPE_STATION:
  1646. rcu_read_lock();
  1647. sta = ieee80211_find_sta(priv->vif, priv->bssid);
  1648. if (sta) {
  1649. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1650. int maxstreams;
  1651. maxstreams = (ht_cap->mcs.tx_params &
  1652. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1653. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1654. maxstreams += 1;
  1655. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1656. (ht_cap->mcs.rx_mask[2] == 0))
  1657. ht_conf->single_chain_sufficient = true;
  1658. if (maxstreams <= 1)
  1659. ht_conf->single_chain_sufficient = true;
  1660. } else {
  1661. /*
  1662. * If at all, this can only happen through a race
  1663. * when the AP disconnects us while we're still
  1664. * setting up the connection, in that case mac80211
  1665. * will soon tell us about that.
  1666. */
  1667. ht_conf->single_chain_sufficient = true;
  1668. }
  1669. rcu_read_unlock();
  1670. break;
  1671. case NL80211_IFTYPE_ADHOC:
  1672. ht_conf->single_chain_sufficient = true;
  1673. break;
  1674. default:
  1675. break;
  1676. }
  1677. IWL_DEBUG_MAC80211(priv, "leave\n");
  1678. }
  1679. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1680. {
  1681. priv->assoc_id = 0;
  1682. iwl_led_disassociate(priv);
  1683. /*
  1684. * inform the ucode that there is no longer an
  1685. * association and that no more packets should be
  1686. * sent
  1687. */
  1688. priv->staging_rxon.filter_flags &=
  1689. ~RXON_FILTER_ASSOC_MSK;
  1690. priv->staging_rxon.assoc_id = 0;
  1691. iwlcore_commit_rxon(priv);
  1692. }
  1693. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  1694. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1695. struct ieee80211_vif *vif,
  1696. struct ieee80211_bss_conf *bss_conf,
  1697. u32 changes)
  1698. {
  1699. struct iwl_priv *priv = hw->priv;
  1700. int ret;
  1701. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1702. if (!iwl_is_alive(priv))
  1703. return;
  1704. mutex_lock(&priv->mutex);
  1705. if (changes & BSS_CHANGED_BEACON &&
  1706. priv->iw_mode == NL80211_IFTYPE_AP) {
  1707. dev_kfree_skb(priv->ibss_beacon);
  1708. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1709. }
  1710. if (changes & BSS_CHANGED_BEACON_INT) {
  1711. priv->beacon_int = bss_conf->beacon_int;
  1712. /* TODO: in AP mode, do something to make this take effect */
  1713. }
  1714. if (changes & BSS_CHANGED_BSSID) {
  1715. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1716. /*
  1717. * If there is currently a HW scan going on in the
  1718. * background then we need to cancel it else the RXON
  1719. * below/in post_associate will fail.
  1720. */
  1721. if (iwl_scan_cancel_timeout(priv, 100)) {
  1722. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1723. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1724. mutex_unlock(&priv->mutex);
  1725. return;
  1726. }
  1727. /* mac80211 only sets assoc when in STATION mode */
  1728. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1729. bss_conf->assoc) {
  1730. memcpy(priv->staging_rxon.bssid_addr,
  1731. bss_conf->bssid, ETH_ALEN);
  1732. /* currently needed in a few places */
  1733. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1734. } else {
  1735. priv->staging_rxon.filter_flags &=
  1736. ~RXON_FILTER_ASSOC_MSK;
  1737. }
  1738. }
  1739. /*
  1740. * This needs to be after setting the BSSID in case
  1741. * mac80211 decides to do both changes at once because
  1742. * it will invoke post_associate.
  1743. */
  1744. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1745. changes & BSS_CHANGED_BEACON) {
  1746. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1747. if (beacon)
  1748. iwl_mac_beacon_update(hw, beacon);
  1749. }
  1750. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1751. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1752. bss_conf->use_short_preamble);
  1753. if (bss_conf->use_short_preamble)
  1754. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1755. else
  1756. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1757. }
  1758. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1759. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1760. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1761. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1762. else
  1763. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1764. }
  1765. if (changes & BSS_CHANGED_BASIC_RATES) {
  1766. /* XXX use this information
  1767. *
  1768. * To do that, remove code from iwl_set_rate() and put something
  1769. * like this here:
  1770. *
  1771. if (A-band)
  1772. priv->staging_rxon.ofdm_basic_rates =
  1773. bss_conf->basic_rates;
  1774. else
  1775. priv->staging_rxon.ofdm_basic_rates =
  1776. bss_conf->basic_rates >> 4;
  1777. priv->staging_rxon.cck_basic_rates =
  1778. bss_conf->basic_rates & 0xF;
  1779. */
  1780. }
  1781. if (changes & BSS_CHANGED_HT) {
  1782. iwl_ht_conf(priv, bss_conf);
  1783. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1784. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1785. }
  1786. if (changes & BSS_CHANGED_ASSOC) {
  1787. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1788. if (bss_conf->assoc) {
  1789. priv->assoc_id = bss_conf->aid;
  1790. priv->beacon_int = bss_conf->beacon_int;
  1791. priv->timestamp = bss_conf->timestamp;
  1792. priv->assoc_capability = bss_conf->assoc_capability;
  1793. iwl_led_associate(priv);
  1794. /*
  1795. * We have just associated, don't start scan too early
  1796. * leave time for EAPOL exchange to complete.
  1797. *
  1798. * XXX: do this in mac80211
  1799. */
  1800. priv->next_scan_jiffies = jiffies +
  1801. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  1802. if (!iwl_is_rfkill(priv))
  1803. priv->cfg->ops->lib->post_associate(priv);
  1804. } else
  1805. iwl_set_no_assoc(priv);
  1806. }
  1807. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  1808. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1809. changes);
  1810. ret = iwl_send_rxon_assoc(priv);
  1811. if (!ret) {
  1812. /* Sync active_rxon with latest change. */
  1813. memcpy((void *)&priv->active_rxon,
  1814. &priv->staging_rxon,
  1815. sizeof(struct iwl_rxon_cmd));
  1816. }
  1817. }
  1818. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1819. if (vif->bss_conf.enable_beacon) {
  1820. memcpy(priv->staging_rxon.bssid_addr,
  1821. bss_conf->bssid, ETH_ALEN);
  1822. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1823. iwlcore_config_ap(priv);
  1824. } else
  1825. iwl_set_no_assoc(priv);
  1826. }
  1827. mutex_unlock(&priv->mutex);
  1828. IWL_DEBUG_MAC80211(priv, "leave\n");
  1829. }
  1830. EXPORT_SYMBOL(iwl_bss_info_changed);
  1831. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1832. {
  1833. struct iwl_priv *priv = hw->priv;
  1834. unsigned long flags;
  1835. __le64 timestamp;
  1836. IWL_DEBUG_MAC80211(priv, "enter\n");
  1837. if (!iwl_is_ready_rf(priv)) {
  1838. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1839. return -EIO;
  1840. }
  1841. spin_lock_irqsave(&priv->lock, flags);
  1842. if (priv->ibss_beacon)
  1843. dev_kfree_skb(priv->ibss_beacon);
  1844. priv->ibss_beacon = skb;
  1845. priv->assoc_id = 0;
  1846. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1847. priv->timestamp = le64_to_cpu(timestamp);
  1848. IWL_DEBUG_MAC80211(priv, "leave\n");
  1849. spin_unlock_irqrestore(&priv->lock, flags);
  1850. iwl_reset_qos(priv);
  1851. priv->cfg->ops->lib->post_associate(priv);
  1852. return 0;
  1853. }
  1854. EXPORT_SYMBOL(iwl_mac_beacon_update);
  1855. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1856. {
  1857. iwl_connection_init_rx_config(priv, vif->type);
  1858. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1859. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1860. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1861. return iwlcore_commit_rxon(priv);
  1862. }
  1863. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1864. {
  1865. struct iwl_priv *priv = hw->priv;
  1866. int err = 0;
  1867. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
  1868. mutex_lock(&priv->mutex);
  1869. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1870. err = -EINVAL;
  1871. goto out;
  1872. }
  1873. if (priv->vif) {
  1874. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1875. err = -EOPNOTSUPP;
  1876. goto out;
  1877. }
  1878. priv->vif = vif;
  1879. priv->iw_mode = vif->type;
  1880. IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
  1881. memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
  1882. err = iwl_set_mode(priv, vif);
  1883. if (err)
  1884. goto out_err;
  1885. /* Add the broadcast address so we can send broadcast frames */
  1886. priv->cfg->ops->lib->add_bcast_station(priv);
  1887. goto out;
  1888. out_err:
  1889. priv->vif = NULL;
  1890. priv->iw_mode = NL80211_IFTYPE_STATION;
  1891. out:
  1892. mutex_unlock(&priv->mutex);
  1893. IWL_DEBUG_MAC80211(priv, "leave\n");
  1894. return err;
  1895. }
  1896. EXPORT_SYMBOL(iwl_mac_add_interface);
  1897. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1898. struct ieee80211_vif *vif)
  1899. {
  1900. struct iwl_priv *priv = hw->priv;
  1901. IWL_DEBUG_MAC80211(priv, "enter\n");
  1902. mutex_lock(&priv->mutex);
  1903. iwl_clear_ucode_stations(priv, true);
  1904. if (iwl_is_ready_rf(priv)) {
  1905. iwl_scan_cancel_timeout(priv, 100);
  1906. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1907. iwlcore_commit_rxon(priv);
  1908. }
  1909. if (priv->vif == vif) {
  1910. priv->vif = NULL;
  1911. memset(priv->bssid, 0, ETH_ALEN);
  1912. }
  1913. mutex_unlock(&priv->mutex);
  1914. IWL_DEBUG_MAC80211(priv, "leave\n");
  1915. }
  1916. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1917. /**
  1918. * iwl_mac_config - mac80211 config callback
  1919. *
  1920. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  1921. * be set inappropriately and the driver currently sets the hardware up to
  1922. * use it whenever needed.
  1923. */
  1924. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1925. {
  1926. struct iwl_priv *priv = hw->priv;
  1927. const struct iwl_channel_info *ch_info;
  1928. struct ieee80211_conf *conf = &hw->conf;
  1929. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1930. unsigned long flags = 0;
  1931. int ret = 0;
  1932. u16 ch;
  1933. int scan_active = 0;
  1934. mutex_lock(&priv->mutex);
  1935. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1936. conf->channel->hw_value, changed);
  1937. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1938. test_bit(STATUS_SCANNING, &priv->status))) {
  1939. scan_active = 1;
  1940. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1941. }
  1942. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1943. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1944. /* mac80211 uses static for non-HT which is what we want */
  1945. priv->current_ht_config.smps = conf->smps_mode;
  1946. /*
  1947. * Recalculate chain counts.
  1948. *
  1949. * If monitor mode is enabled then mac80211 will
  1950. * set up the SM PS mode to OFF if an HT channel is
  1951. * configured.
  1952. */
  1953. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1954. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1955. }
  1956. /* during scanning mac80211 will delay channel setting until
  1957. * scan finish with changed = 0
  1958. */
  1959. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1960. if (scan_active)
  1961. goto set_ch_out;
  1962. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1963. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1964. if (!is_channel_valid(ch_info)) {
  1965. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1966. ret = -EINVAL;
  1967. goto set_ch_out;
  1968. }
  1969. spin_lock_irqsave(&priv->lock, flags);
  1970. /* Configure HT40 channels */
  1971. ht_conf->is_ht = conf_is_ht(conf);
  1972. if (ht_conf->is_ht) {
  1973. if (conf_is_ht40_minus(conf)) {
  1974. ht_conf->extension_chan_offset =
  1975. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1976. ht_conf->is_40mhz = true;
  1977. } else if (conf_is_ht40_plus(conf)) {
  1978. ht_conf->extension_chan_offset =
  1979. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1980. ht_conf->is_40mhz = true;
  1981. } else {
  1982. ht_conf->extension_chan_offset =
  1983. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1984. ht_conf->is_40mhz = false;
  1985. }
  1986. } else
  1987. ht_conf->is_40mhz = false;
  1988. /* Default to no protection. Protection mode will later be set
  1989. * from BSS config in iwl_ht_conf */
  1990. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1991. /* if we are switching from ht to 2.4 clear flags
  1992. * from any ht related info since 2.4 does not
  1993. * support ht */
  1994. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1995. priv->staging_rxon.flags = 0;
  1996. iwl_set_rxon_channel(priv, conf->channel);
  1997. iwl_set_rxon_ht(priv, ht_conf);
  1998. iwl_set_flags_for_band(priv, conf->channel->band);
  1999. spin_unlock_irqrestore(&priv->lock, flags);
  2000. if (iwl_is_associated(priv) &&
  2001. (le16_to_cpu(priv->active_rxon.channel) != ch) &&
  2002. priv->cfg->ops->lib->set_channel_switch) {
  2003. iwl_set_rate(priv);
  2004. /*
  2005. * at this point, staging_rxon has the
  2006. * configuration for channel switch
  2007. */
  2008. ret = priv->cfg->ops->lib->set_channel_switch(priv,
  2009. ch);
  2010. if (!ret) {
  2011. iwl_print_rx_config_cmd(priv);
  2012. goto out;
  2013. }
  2014. priv->switch_rxon.switch_in_progress = false;
  2015. }
  2016. set_ch_out:
  2017. /* The list of supported rates and rate mask can be different
  2018. * for each band; since the band may have changed, reset
  2019. * the rate mask to what mac80211 lists */
  2020. iwl_set_rate(priv);
  2021. }
  2022. if (changed & (IEEE80211_CONF_CHANGE_PS |
  2023. IEEE80211_CONF_CHANGE_IDLE)) {
  2024. ret = iwl_power_update_mode(priv, false);
  2025. if (ret)
  2026. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  2027. }
  2028. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  2029. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  2030. priv->tx_power_user_lmt, conf->power_level);
  2031. iwl_set_tx_power(priv, conf->power_level, false);
  2032. }
  2033. if (!iwl_is_ready(priv)) {
  2034. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2035. goto out;
  2036. }
  2037. if (scan_active)
  2038. goto out;
  2039. if (memcmp(&priv->active_rxon,
  2040. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2041. iwlcore_commit_rxon(priv);
  2042. else
  2043. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  2044. out:
  2045. IWL_DEBUG_MAC80211(priv, "leave\n");
  2046. mutex_unlock(&priv->mutex);
  2047. return ret;
  2048. }
  2049. EXPORT_SYMBOL(iwl_mac_config);
  2050. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  2051. {
  2052. struct iwl_priv *priv = hw->priv;
  2053. unsigned long flags;
  2054. mutex_lock(&priv->mutex);
  2055. IWL_DEBUG_MAC80211(priv, "enter\n");
  2056. spin_lock_irqsave(&priv->lock, flags);
  2057. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  2058. spin_unlock_irqrestore(&priv->lock, flags);
  2059. iwl_reset_qos(priv);
  2060. spin_lock_irqsave(&priv->lock, flags);
  2061. priv->assoc_id = 0;
  2062. priv->assoc_capability = 0;
  2063. /* new association get rid of ibss beacon skb */
  2064. if (priv->ibss_beacon)
  2065. dev_kfree_skb(priv->ibss_beacon);
  2066. priv->ibss_beacon = NULL;
  2067. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  2068. priv->timestamp = 0;
  2069. spin_unlock_irqrestore(&priv->lock, flags);
  2070. if (!iwl_is_ready_rf(priv)) {
  2071. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2072. mutex_unlock(&priv->mutex);
  2073. return;
  2074. }
  2075. /* we are restarting association process
  2076. * clear RXON_FILTER_ASSOC_MSK bit
  2077. */
  2078. iwl_scan_cancel_timeout(priv, 100);
  2079. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2080. iwlcore_commit_rxon(priv);
  2081. iwl_set_rate(priv);
  2082. mutex_unlock(&priv->mutex);
  2083. IWL_DEBUG_MAC80211(priv, "leave\n");
  2084. }
  2085. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  2086. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  2087. {
  2088. if (!priv->txq)
  2089. priv->txq = kzalloc(
  2090. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  2091. GFP_KERNEL);
  2092. if (!priv->txq) {
  2093. IWL_ERR(priv, "Not enough memory for txq \n");
  2094. return -ENOMEM;
  2095. }
  2096. return 0;
  2097. }
  2098. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  2099. void iwl_free_txq_mem(struct iwl_priv *priv)
  2100. {
  2101. kfree(priv->txq);
  2102. priv->txq = NULL;
  2103. }
  2104. EXPORT_SYMBOL(iwl_free_txq_mem);
  2105. int iwl_send_wimax_coex(struct iwl_priv *priv)
  2106. {
  2107. struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
  2108. if (priv->cfg->support_wimax_coexist) {
  2109. /* UnMask wake up src at associated sleep */
  2110. coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
  2111. /* UnMask wake up src at unassociated sleep */
  2112. coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
  2113. memcpy(coex_cmd.sta_prio, cu_priorities,
  2114. sizeof(struct iwl_wimax_coex_event_entry) *
  2115. COEX_NUM_OF_EVENTS);
  2116. /* enabling the coexistence feature */
  2117. coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
  2118. /* enabling the priorities tables */
  2119. coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
  2120. } else {
  2121. /* coexistence is disabled */
  2122. memset(&coex_cmd, 0, sizeof(coex_cmd));
  2123. }
  2124. return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
  2125. sizeof(coex_cmd), &coex_cmd);
  2126. }
  2127. EXPORT_SYMBOL(iwl_send_wimax_coex);
  2128. #ifdef CONFIG_IWLWIFI_DEBUGFS
  2129. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  2130. void iwl_reset_traffic_log(struct iwl_priv *priv)
  2131. {
  2132. priv->tx_traffic_idx = 0;
  2133. priv->rx_traffic_idx = 0;
  2134. if (priv->tx_traffic)
  2135. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2136. if (priv->rx_traffic)
  2137. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2138. }
  2139. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2140. {
  2141. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2142. if (iwl_debug_level & IWL_DL_TX) {
  2143. if (!priv->tx_traffic) {
  2144. priv->tx_traffic =
  2145. kzalloc(traffic_size, GFP_KERNEL);
  2146. if (!priv->tx_traffic)
  2147. return -ENOMEM;
  2148. }
  2149. }
  2150. if (iwl_debug_level & IWL_DL_RX) {
  2151. if (!priv->rx_traffic) {
  2152. priv->rx_traffic =
  2153. kzalloc(traffic_size, GFP_KERNEL);
  2154. if (!priv->rx_traffic)
  2155. return -ENOMEM;
  2156. }
  2157. }
  2158. iwl_reset_traffic_log(priv);
  2159. return 0;
  2160. }
  2161. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2162. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2163. {
  2164. kfree(priv->tx_traffic);
  2165. priv->tx_traffic = NULL;
  2166. kfree(priv->rx_traffic);
  2167. priv->rx_traffic = NULL;
  2168. }
  2169. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2170. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2171. u16 length, struct ieee80211_hdr *header)
  2172. {
  2173. __le16 fc;
  2174. u16 len;
  2175. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2176. return;
  2177. if (!priv->tx_traffic)
  2178. return;
  2179. fc = header->frame_control;
  2180. if (ieee80211_is_data(fc)) {
  2181. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2182. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2183. memcpy((priv->tx_traffic +
  2184. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2185. header, len);
  2186. priv->tx_traffic_idx =
  2187. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2188. }
  2189. }
  2190. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2191. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2192. u16 length, struct ieee80211_hdr *header)
  2193. {
  2194. __le16 fc;
  2195. u16 len;
  2196. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2197. return;
  2198. if (!priv->rx_traffic)
  2199. return;
  2200. fc = header->frame_control;
  2201. if (ieee80211_is_data(fc)) {
  2202. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2203. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2204. memcpy((priv->rx_traffic +
  2205. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2206. header, len);
  2207. priv->rx_traffic_idx =
  2208. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2209. }
  2210. }
  2211. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2212. const char *get_mgmt_string(int cmd)
  2213. {
  2214. switch (cmd) {
  2215. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2216. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2217. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2218. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2219. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2220. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2221. IWL_CMD(MANAGEMENT_BEACON);
  2222. IWL_CMD(MANAGEMENT_ATIM);
  2223. IWL_CMD(MANAGEMENT_DISASSOC);
  2224. IWL_CMD(MANAGEMENT_AUTH);
  2225. IWL_CMD(MANAGEMENT_DEAUTH);
  2226. IWL_CMD(MANAGEMENT_ACTION);
  2227. default:
  2228. return "UNKNOWN";
  2229. }
  2230. }
  2231. const char *get_ctrl_string(int cmd)
  2232. {
  2233. switch (cmd) {
  2234. IWL_CMD(CONTROL_BACK_REQ);
  2235. IWL_CMD(CONTROL_BACK);
  2236. IWL_CMD(CONTROL_PSPOLL);
  2237. IWL_CMD(CONTROL_RTS);
  2238. IWL_CMD(CONTROL_CTS);
  2239. IWL_CMD(CONTROL_ACK);
  2240. IWL_CMD(CONTROL_CFEND);
  2241. IWL_CMD(CONTROL_CFENDACK);
  2242. default:
  2243. return "UNKNOWN";
  2244. }
  2245. }
  2246. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  2247. {
  2248. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2249. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2250. priv->led_tpt = 0;
  2251. }
  2252. /*
  2253. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2254. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2255. * Use debugFs to display the rx/rx_statistics
  2256. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2257. * information will be recorded, but DATA pkt still will be recorded
  2258. * for the reason of iwl_led.c need to control the led blinking based on
  2259. * number of tx and rx data.
  2260. *
  2261. */
  2262. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2263. {
  2264. struct traffic_stats *stats;
  2265. if (is_tx)
  2266. stats = &priv->tx_stats;
  2267. else
  2268. stats = &priv->rx_stats;
  2269. if (ieee80211_is_mgmt(fc)) {
  2270. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2271. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2272. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2273. break;
  2274. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2275. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2276. break;
  2277. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2278. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2279. break;
  2280. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2281. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2282. break;
  2283. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2284. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2285. break;
  2286. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2287. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2288. break;
  2289. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2290. stats->mgmt[MANAGEMENT_BEACON]++;
  2291. break;
  2292. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2293. stats->mgmt[MANAGEMENT_ATIM]++;
  2294. break;
  2295. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2296. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2297. break;
  2298. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2299. stats->mgmt[MANAGEMENT_AUTH]++;
  2300. break;
  2301. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2302. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2303. break;
  2304. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2305. stats->mgmt[MANAGEMENT_ACTION]++;
  2306. break;
  2307. }
  2308. } else if (ieee80211_is_ctl(fc)) {
  2309. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2310. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2311. stats->ctrl[CONTROL_BACK_REQ]++;
  2312. break;
  2313. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2314. stats->ctrl[CONTROL_BACK]++;
  2315. break;
  2316. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2317. stats->ctrl[CONTROL_PSPOLL]++;
  2318. break;
  2319. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2320. stats->ctrl[CONTROL_RTS]++;
  2321. break;
  2322. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2323. stats->ctrl[CONTROL_CTS]++;
  2324. break;
  2325. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2326. stats->ctrl[CONTROL_ACK]++;
  2327. break;
  2328. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2329. stats->ctrl[CONTROL_CFEND]++;
  2330. break;
  2331. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2332. stats->ctrl[CONTROL_CFENDACK]++;
  2333. break;
  2334. }
  2335. } else {
  2336. /* data */
  2337. stats->data_cnt++;
  2338. stats->data_bytes += len;
  2339. }
  2340. iwl_leds_background(priv);
  2341. }
  2342. EXPORT_SYMBOL(iwl_update_stats);
  2343. #endif
  2344. const static char *get_csr_string(int cmd)
  2345. {
  2346. switch (cmd) {
  2347. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2348. IWL_CMD(CSR_INT_COALESCING);
  2349. IWL_CMD(CSR_INT);
  2350. IWL_CMD(CSR_INT_MASK);
  2351. IWL_CMD(CSR_FH_INT_STATUS);
  2352. IWL_CMD(CSR_GPIO_IN);
  2353. IWL_CMD(CSR_RESET);
  2354. IWL_CMD(CSR_GP_CNTRL);
  2355. IWL_CMD(CSR_HW_REV);
  2356. IWL_CMD(CSR_EEPROM_REG);
  2357. IWL_CMD(CSR_EEPROM_GP);
  2358. IWL_CMD(CSR_OTP_GP_REG);
  2359. IWL_CMD(CSR_GIO_REG);
  2360. IWL_CMD(CSR_GP_UCODE_REG);
  2361. IWL_CMD(CSR_GP_DRIVER_REG);
  2362. IWL_CMD(CSR_UCODE_DRV_GP1);
  2363. IWL_CMD(CSR_UCODE_DRV_GP2);
  2364. IWL_CMD(CSR_LED_REG);
  2365. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2366. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2367. IWL_CMD(CSR_ANA_PLL_CFG);
  2368. IWL_CMD(CSR_HW_REV_WA_REG);
  2369. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2370. default:
  2371. return "UNKNOWN";
  2372. }
  2373. }
  2374. void iwl_dump_csr(struct iwl_priv *priv)
  2375. {
  2376. int i;
  2377. u32 csr_tbl[] = {
  2378. CSR_HW_IF_CONFIG_REG,
  2379. CSR_INT_COALESCING,
  2380. CSR_INT,
  2381. CSR_INT_MASK,
  2382. CSR_FH_INT_STATUS,
  2383. CSR_GPIO_IN,
  2384. CSR_RESET,
  2385. CSR_GP_CNTRL,
  2386. CSR_HW_REV,
  2387. CSR_EEPROM_REG,
  2388. CSR_EEPROM_GP,
  2389. CSR_OTP_GP_REG,
  2390. CSR_GIO_REG,
  2391. CSR_GP_UCODE_REG,
  2392. CSR_GP_DRIVER_REG,
  2393. CSR_UCODE_DRV_GP1,
  2394. CSR_UCODE_DRV_GP2,
  2395. CSR_LED_REG,
  2396. CSR_DRAM_INT_TBL_REG,
  2397. CSR_GIO_CHICKEN_BITS,
  2398. CSR_ANA_PLL_CFG,
  2399. CSR_HW_REV_WA_REG,
  2400. CSR_DBG_HPET_MEM_REG
  2401. };
  2402. IWL_ERR(priv, "CSR values:\n");
  2403. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2404. "CSR_INT_PERIODIC_REG)\n");
  2405. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2406. IWL_ERR(priv, " %25s: 0X%08x\n",
  2407. get_csr_string(csr_tbl[i]),
  2408. iwl_read32(priv, csr_tbl[i]));
  2409. }
  2410. }
  2411. EXPORT_SYMBOL(iwl_dump_csr);
  2412. const static char *get_fh_string(int cmd)
  2413. {
  2414. switch (cmd) {
  2415. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2416. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2417. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2418. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2419. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2420. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2421. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2422. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2423. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2424. default:
  2425. return "UNKNOWN";
  2426. }
  2427. }
  2428. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2429. {
  2430. int i;
  2431. #ifdef CONFIG_IWLWIFI_DEBUG
  2432. int pos = 0;
  2433. size_t bufsz = 0;
  2434. #endif
  2435. u32 fh_tbl[] = {
  2436. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2437. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2438. FH_RSCSR_CHNL0_WPTR,
  2439. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2440. FH_MEM_RSSR_SHARED_CTRL_REG,
  2441. FH_MEM_RSSR_RX_STATUS_REG,
  2442. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2443. FH_TSSR_TX_STATUS_REG,
  2444. FH_TSSR_TX_ERROR_REG
  2445. };
  2446. #ifdef CONFIG_IWLWIFI_DEBUG
  2447. if (display) {
  2448. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2449. *buf = kmalloc(bufsz, GFP_KERNEL);
  2450. if (!*buf)
  2451. return -ENOMEM;
  2452. pos += scnprintf(*buf + pos, bufsz - pos,
  2453. "FH register values:\n");
  2454. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2455. pos += scnprintf(*buf + pos, bufsz - pos,
  2456. " %34s: 0X%08x\n",
  2457. get_fh_string(fh_tbl[i]),
  2458. iwl_read_direct32(priv, fh_tbl[i]));
  2459. }
  2460. return pos;
  2461. }
  2462. #endif
  2463. IWL_ERR(priv, "FH register values:\n");
  2464. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2465. IWL_ERR(priv, " %34s: 0X%08x\n",
  2466. get_fh_string(fh_tbl[i]),
  2467. iwl_read_direct32(priv, fh_tbl[i]));
  2468. }
  2469. return 0;
  2470. }
  2471. EXPORT_SYMBOL(iwl_dump_fh);
  2472. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2473. {
  2474. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2475. return;
  2476. if (!iwl_is_associated(priv)) {
  2477. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2478. return;
  2479. }
  2480. /*
  2481. * There is no easy and better way to force reset the radio,
  2482. * the only known method is switching channel which will force to
  2483. * reset and tune the radio.
  2484. * Use internal short scan (single channel) operation to should
  2485. * achieve this objective.
  2486. * Driver should reset the radio when number of consecutive missed
  2487. * beacon, or any other uCode error condition detected.
  2488. */
  2489. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2490. iwl_internal_short_hw_scan(priv);
  2491. return;
  2492. }
  2493. int iwl_force_reset(struct iwl_priv *priv, int mode)
  2494. {
  2495. struct iwl_force_reset *force_reset;
  2496. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2497. return -EINVAL;
  2498. if (mode >= IWL_MAX_FORCE_RESET) {
  2499. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2500. return -EINVAL;
  2501. }
  2502. force_reset = &priv->force_reset[mode];
  2503. force_reset->reset_request_count++;
  2504. if (force_reset->last_force_reset_jiffies &&
  2505. time_after(force_reset->last_force_reset_jiffies +
  2506. force_reset->reset_duration, jiffies)) {
  2507. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2508. force_reset->reset_reject_count++;
  2509. return -EAGAIN;
  2510. }
  2511. force_reset->reset_success_count++;
  2512. force_reset->last_force_reset_jiffies = jiffies;
  2513. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2514. switch (mode) {
  2515. case IWL_RF_RESET:
  2516. iwl_force_rf_reset(priv);
  2517. break;
  2518. case IWL_FW_RESET:
  2519. IWL_ERR(priv, "On demand firmware reload\n");
  2520. /* Set the FW error flag -- cleared on iwl_down */
  2521. set_bit(STATUS_FW_ERROR, &priv->status);
  2522. wake_up_interruptible(&priv->wait_command_queue);
  2523. /*
  2524. * Keep the restart process from trying to send host
  2525. * commands by clearing the INIT status bit
  2526. */
  2527. clear_bit(STATUS_READY, &priv->status);
  2528. queue_work(priv->workqueue, &priv->restart);
  2529. break;
  2530. }
  2531. return 0;
  2532. }
  2533. EXPORT_SYMBOL(iwl_force_reset);
  2534. /**
  2535. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2536. *
  2537. * During normal condition (no queue is stuck), the timer is continually set to
  2538. * execute every monitor_recover_period milliseconds after the last timer
  2539. * expired. When the queue read_ptr is at the same place, the timer is
  2540. * shorten to 100mSecs. This is
  2541. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2542. * 2) to detect the stuck queues quicker before the station and AP can
  2543. * disassociate each other.
  2544. *
  2545. * This function monitors all the tx queues and recover from it if any
  2546. * of the queues are stuck.
  2547. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2548. * it will recover by resetting the firmware and return.
  2549. * 2. Then, it checks for station association. If it associates it will check
  2550. * other queues. If any queue is stuck, it will recover by resetting
  2551. * the firmware.
  2552. * Note: It the number of times the queue read_ptr to be at the same place to
  2553. * be MAX_REPEAT+1 in order to consider to be stuck.
  2554. */
  2555. /*
  2556. * The maximum number of times the read pointer of the tx queue at the
  2557. * same place without considering to be stuck.
  2558. */
  2559. #define MAX_REPEAT (2)
  2560. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2561. {
  2562. struct iwl_tx_queue *txq;
  2563. struct iwl_queue *q;
  2564. txq = &priv->txq[cnt];
  2565. q = &txq->q;
  2566. /* queue is empty, skip */
  2567. if (q->read_ptr != q->write_ptr) {
  2568. if (q->read_ptr == q->last_read_ptr) {
  2569. /* a queue has not been read from last time */
  2570. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2571. IWL_ERR(priv,
  2572. "queue %d stuck %d time. Fw reload.\n",
  2573. q->id, q->repeat_same_read_ptr);
  2574. q->repeat_same_read_ptr = 0;
  2575. iwl_force_reset(priv, IWL_FW_RESET);
  2576. } else {
  2577. q->repeat_same_read_ptr++;
  2578. IWL_DEBUG_RADIO(priv,
  2579. "queue %d, not read %d time\n",
  2580. q->id,
  2581. q->repeat_same_read_ptr);
  2582. mod_timer(&priv->monitor_recover, jiffies +
  2583. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2584. }
  2585. return 1;
  2586. } else {
  2587. q->last_read_ptr = q->read_ptr;
  2588. q->repeat_same_read_ptr = 0;
  2589. }
  2590. }
  2591. return 0;
  2592. }
  2593. void iwl_bg_monitor_recover(unsigned long data)
  2594. {
  2595. struct iwl_priv *priv = (struct iwl_priv *)data;
  2596. int cnt;
  2597. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2598. return;
  2599. /* monitor and check for stuck cmd queue */
  2600. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2601. return;
  2602. /* monitor and check for other stuck queues */
  2603. if (iwl_is_associated(priv)) {
  2604. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2605. /* skip as we already checked the command queue */
  2606. if (cnt == IWL_CMD_QUEUE_NUM)
  2607. continue;
  2608. if (iwl_check_stuck_queue(priv, cnt))
  2609. return;
  2610. }
  2611. }
  2612. /*
  2613. * Reschedule the timer to occur in
  2614. * priv->cfg->monitor_recover_period
  2615. */
  2616. mod_timer(&priv->monitor_recover,
  2617. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2618. }
  2619. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2620. #ifdef CONFIG_PM
  2621. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2622. {
  2623. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2624. /*
  2625. * This function is called when system goes into suspend state
  2626. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2627. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2628. * it will not call apm_ops.stop() to stop the DMA operation.
  2629. * Calling apm_ops.stop here to make sure we stop the DMA.
  2630. */
  2631. priv->cfg->ops->lib->apm_ops.stop(priv);
  2632. pci_save_state(pdev);
  2633. pci_disable_device(pdev);
  2634. pci_set_power_state(pdev, PCI_D3hot);
  2635. return 0;
  2636. }
  2637. EXPORT_SYMBOL(iwl_pci_suspend);
  2638. int iwl_pci_resume(struct pci_dev *pdev)
  2639. {
  2640. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2641. int ret;
  2642. pci_set_power_state(pdev, PCI_D0);
  2643. ret = pci_enable_device(pdev);
  2644. if (ret)
  2645. return ret;
  2646. pci_restore_state(pdev);
  2647. iwl_enable_interrupts(priv);
  2648. return 0;
  2649. }
  2650. EXPORT_SYMBOL(iwl_pci_resume);
  2651. #endif /* CONFIG_PM */