qib_qp.c 32 KB

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  1. /*
  2. * Copyright (c) 2012 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2006 - 2012 QLogic Corporation. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include <linux/jhash.h>
  37. #include "qib.h"
  38. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  39. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  40. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  41. struct qpn_map *map, unsigned off)
  42. {
  43. return (map - qpt->map) * BITS_PER_PAGE + off;
  44. }
  45. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  46. struct qpn_map *map, unsigned off,
  47. unsigned n)
  48. {
  49. if (qpt->mask) {
  50. off++;
  51. if (((off & qpt->mask) >> 1) >= n)
  52. off = (off | qpt->mask) + 2;
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  117. unsigned n;
  118. ret = type == IB_QPT_GSI;
  119. n = 1 << (ret + 2 * (port - 1));
  120. spin_lock(&qpt->lock);
  121. if (qpt->flags & n)
  122. ret = -EINVAL;
  123. else
  124. qpt->flags |= n;
  125. spin_unlock(&qpt->lock);
  126. goto bail;
  127. }
  128. qpn = qpt->last + 2;
  129. if (qpn >= QPN_MAX)
  130. qpn = 2;
  131. if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues)
  132. qpn = (qpn | qpt->mask) + 2;
  133. offset = qpn & BITS_PER_PAGE_MASK;
  134. map = &qpt->map[qpn / BITS_PER_PAGE];
  135. max_scan = qpt->nmaps - !offset;
  136. for (i = 0;;) {
  137. if (unlikely(!map->page)) {
  138. get_map_page(qpt, map);
  139. if (unlikely(!map->page))
  140. break;
  141. }
  142. do {
  143. if (!test_and_set_bit(offset, map->page)) {
  144. qpt->last = qpn;
  145. ret = qpn;
  146. goto bail;
  147. }
  148. offset = find_next_offset(qpt, map, offset,
  149. dd->n_krcv_queues);
  150. qpn = mk_qpn(qpt, map, offset);
  151. /*
  152. * This test differs from alloc_pidmap().
  153. * If find_next_offset() does find a zero
  154. * bit, we don't need to check for QPN
  155. * wrapping around past our starting QPN.
  156. * We just need to be sure we don't loop
  157. * forever.
  158. */
  159. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  160. /*
  161. * In order to keep the number of pages allocated to a
  162. * minimum, we scan the all existing pages before increasing
  163. * the size of the bitmap table.
  164. */
  165. if (++i > max_scan) {
  166. if (qpt->nmaps == QPNMAP_ENTRIES)
  167. break;
  168. map = &qpt->map[qpt->nmaps++];
  169. offset = 0;
  170. } else if (map < &qpt->map[qpt->nmaps]) {
  171. ++map;
  172. offset = 0;
  173. } else {
  174. map = &qpt->map[0];
  175. offset = 2;
  176. }
  177. qpn = mk_qpn(qpt, map, offset);
  178. }
  179. ret = -ENOMEM;
  180. bail:
  181. return ret;
  182. }
  183. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  184. {
  185. struct qpn_map *map;
  186. map = qpt->map + qpn / BITS_PER_PAGE;
  187. if (map->page)
  188. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  189. }
  190. static inline unsigned qpn_hash(struct qib_ibdev *dev, u32 qpn)
  191. {
  192. return jhash_1word(qpn, dev->qp_rnd) &
  193. (dev->qp_table_size - 1);
  194. }
  195. /*
  196. * Put the QP into the hash table.
  197. * The hash table holds a reference to the QP.
  198. */
  199. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  200. {
  201. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  202. unsigned long flags;
  203. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  204. spin_lock_irqsave(&dev->qpt_lock, flags);
  205. atomic_inc(&qp->refcount);
  206. if (qp->ibqp.qp_num == 0)
  207. rcu_assign_pointer(ibp->qp0, qp);
  208. else if (qp->ibqp.qp_num == 1)
  209. rcu_assign_pointer(ibp->qp1, qp);
  210. else {
  211. qp->next = dev->qp_table[n];
  212. rcu_assign_pointer(dev->qp_table[n], qp);
  213. }
  214. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  215. synchronize_rcu();
  216. }
  217. /*
  218. * Remove the QP from the table so it can't be found asynchronously by
  219. * the receive interrupt routine.
  220. */
  221. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  222. {
  223. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  224. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  225. unsigned long flags;
  226. spin_lock_irqsave(&dev->qpt_lock, flags);
  227. if (rcu_dereference_protected(ibp->qp0,
  228. lockdep_is_held(&dev->qpt_lock)) == qp) {
  229. atomic_dec(&qp->refcount);
  230. rcu_assign_pointer(ibp->qp0, NULL);
  231. } else if (rcu_dereference_protected(ibp->qp1,
  232. lockdep_is_held(&dev->qpt_lock)) == qp) {
  233. atomic_dec(&qp->refcount);
  234. rcu_assign_pointer(ibp->qp1, NULL);
  235. } else {
  236. struct qib_qp *q;
  237. struct qib_qp __rcu **qpp;
  238. qpp = &dev->qp_table[n];
  239. for (; (q = rcu_dereference_protected(*qpp,
  240. lockdep_is_held(&dev->qpt_lock))) != NULL;
  241. qpp = &q->next)
  242. if (q == qp) {
  243. atomic_dec(&qp->refcount);
  244. *qpp = qp->next;
  245. rcu_assign_pointer(qp->next, NULL);
  246. break;
  247. }
  248. }
  249. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  250. synchronize_rcu();
  251. }
  252. /**
  253. * qib_free_all_qps - check for QPs still in use
  254. * @qpt: the QP table to empty
  255. *
  256. * There should not be any QPs still in use.
  257. * Free memory for table.
  258. */
  259. unsigned qib_free_all_qps(struct qib_devdata *dd)
  260. {
  261. struct qib_ibdev *dev = &dd->verbs_dev;
  262. unsigned long flags;
  263. struct qib_qp *qp;
  264. unsigned n, qp_inuse = 0;
  265. for (n = 0; n < dd->num_pports; n++) {
  266. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  267. if (!qib_mcast_tree_empty(ibp))
  268. qp_inuse++;
  269. rcu_read_lock();
  270. if (rcu_dereference(ibp->qp0))
  271. qp_inuse++;
  272. if (rcu_dereference(ibp->qp1))
  273. qp_inuse++;
  274. rcu_read_unlock();
  275. }
  276. spin_lock_irqsave(&dev->qpt_lock, flags);
  277. for (n = 0; n < dev->qp_table_size; n++) {
  278. qp = rcu_dereference_protected(dev->qp_table[n],
  279. lockdep_is_held(&dev->qpt_lock));
  280. rcu_assign_pointer(dev->qp_table[n], NULL);
  281. for (; qp; qp = rcu_dereference_protected(qp->next,
  282. lockdep_is_held(&dev->qpt_lock)))
  283. qp_inuse++;
  284. }
  285. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  286. synchronize_rcu();
  287. return qp_inuse;
  288. }
  289. /**
  290. * qib_lookup_qpn - return the QP with the given QPN
  291. * @qpt: the QP table
  292. * @qpn: the QP number to look up
  293. *
  294. * The caller is responsible for decrementing the QP reference count
  295. * when done.
  296. */
  297. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  298. {
  299. struct qib_qp *qp = NULL;
  300. if (unlikely(qpn <= 1)) {
  301. rcu_read_lock();
  302. if (qpn == 0)
  303. qp = rcu_dereference(ibp->qp0);
  304. else
  305. qp = rcu_dereference(ibp->qp1);
  306. } else {
  307. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  308. unsigned n = qpn_hash(dev, qpn);
  309. rcu_read_lock();
  310. for (qp = rcu_dereference(dev->qp_table[n]); qp;
  311. qp = rcu_dereference(qp->next))
  312. if (qp->ibqp.qp_num == qpn)
  313. break;
  314. }
  315. if (qp)
  316. if (unlikely(!atomic_inc_not_zero(&qp->refcount)))
  317. qp = NULL;
  318. rcu_read_unlock();
  319. return qp;
  320. }
  321. /**
  322. * qib_reset_qp - initialize the QP state to the reset state
  323. * @qp: the QP to reset
  324. * @type: the QP type
  325. */
  326. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  327. {
  328. qp->remote_qpn = 0;
  329. qp->qkey = 0;
  330. qp->qp_access_flags = 0;
  331. atomic_set(&qp->s_dma_busy, 0);
  332. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  333. qp->s_hdrwords = 0;
  334. qp->s_wqe = NULL;
  335. qp->s_draining = 0;
  336. qp->s_next_psn = 0;
  337. qp->s_last_psn = 0;
  338. qp->s_sending_psn = 0;
  339. qp->s_sending_hpsn = 0;
  340. qp->s_psn = 0;
  341. qp->r_psn = 0;
  342. qp->r_msn = 0;
  343. if (type == IB_QPT_RC) {
  344. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  345. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  346. } else {
  347. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  348. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  349. }
  350. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  351. qp->r_nak_state = 0;
  352. qp->r_aflags = 0;
  353. qp->r_flags = 0;
  354. qp->s_head = 0;
  355. qp->s_tail = 0;
  356. qp->s_cur = 0;
  357. qp->s_acked = 0;
  358. qp->s_last = 0;
  359. qp->s_ssn = 1;
  360. qp->s_lsn = 0;
  361. qp->s_mig_state = IB_MIG_MIGRATED;
  362. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  363. qp->r_head_ack_queue = 0;
  364. qp->s_tail_ack_queue = 0;
  365. qp->s_num_rd_atomic = 0;
  366. if (qp->r_rq.wq) {
  367. qp->r_rq.wq->head = 0;
  368. qp->r_rq.wq->tail = 0;
  369. }
  370. qp->r_sge.num_sge = 0;
  371. }
  372. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  373. {
  374. unsigned n;
  375. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  376. qib_put_ss(&qp->s_rdma_read_sge);
  377. qib_put_ss(&qp->r_sge);
  378. if (clr_sends) {
  379. while (qp->s_last != qp->s_head) {
  380. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  381. unsigned i;
  382. for (i = 0; i < wqe->wr.num_sge; i++) {
  383. struct qib_sge *sge = &wqe->sg_list[i];
  384. qib_put_mr(sge->mr);
  385. }
  386. if (qp->ibqp.qp_type == IB_QPT_UD ||
  387. qp->ibqp.qp_type == IB_QPT_SMI ||
  388. qp->ibqp.qp_type == IB_QPT_GSI)
  389. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  390. if (++qp->s_last >= qp->s_size)
  391. qp->s_last = 0;
  392. }
  393. if (qp->s_rdma_mr) {
  394. qib_put_mr(qp->s_rdma_mr);
  395. qp->s_rdma_mr = NULL;
  396. }
  397. }
  398. if (qp->ibqp.qp_type != IB_QPT_RC)
  399. return;
  400. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  401. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  402. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  403. e->rdma_sge.mr) {
  404. qib_put_mr(e->rdma_sge.mr);
  405. e->rdma_sge.mr = NULL;
  406. }
  407. }
  408. }
  409. /**
  410. * qib_error_qp - put a QP into the error state
  411. * @qp: the QP to put into the error state
  412. * @err: the receive completion error to signal if a RWQE is active
  413. *
  414. * Flushes both send and receive work queues.
  415. * Returns true if last WQE event should be generated.
  416. * The QP r_lock and s_lock should be held and interrupts disabled.
  417. * If we are already in error state, just return.
  418. */
  419. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  420. {
  421. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  422. struct ib_wc wc;
  423. int ret = 0;
  424. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  425. goto bail;
  426. qp->state = IB_QPS_ERR;
  427. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  428. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  429. del_timer(&qp->s_timer);
  430. }
  431. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  432. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  433. spin_lock(&dev->pending_lock);
  434. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  435. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  436. list_del_init(&qp->iowait);
  437. }
  438. spin_unlock(&dev->pending_lock);
  439. if (!(qp->s_flags & QIB_S_BUSY)) {
  440. qp->s_hdrwords = 0;
  441. if (qp->s_rdma_mr) {
  442. qib_put_mr(qp->s_rdma_mr);
  443. qp->s_rdma_mr = NULL;
  444. }
  445. if (qp->s_tx) {
  446. qib_put_txreq(qp->s_tx);
  447. qp->s_tx = NULL;
  448. }
  449. }
  450. /* Schedule the sending tasklet to drain the send work queue. */
  451. if (qp->s_last != qp->s_head)
  452. qib_schedule_send(qp);
  453. clear_mr_refs(qp, 0);
  454. memset(&wc, 0, sizeof(wc));
  455. wc.qp = &qp->ibqp;
  456. wc.opcode = IB_WC_RECV;
  457. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  458. wc.wr_id = qp->r_wr_id;
  459. wc.status = err;
  460. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  461. }
  462. wc.status = IB_WC_WR_FLUSH_ERR;
  463. if (qp->r_rq.wq) {
  464. struct qib_rwq *wq;
  465. u32 head;
  466. u32 tail;
  467. spin_lock(&qp->r_rq.lock);
  468. /* sanity check pointers before trusting them */
  469. wq = qp->r_rq.wq;
  470. head = wq->head;
  471. if (head >= qp->r_rq.size)
  472. head = 0;
  473. tail = wq->tail;
  474. if (tail >= qp->r_rq.size)
  475. tail = 0;
  476. while (tail != head) {
  477. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  478. if (++tail >= qp->r_rq.size)
  479. tail = 0;
  480. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  481. }
  482. wq->tail = tail;
  483. spin_unlock(&qp->r_rq.lock);
  484. } else if (qp->ibqp.event_handler)
  485. ret = 1;
  486. bail:
  487. return ret;
  488. }
  489. /**
  490. * qib_modify_qp - modify the attributes of a queue pair
  491. * @ibqp: the queue pair who's attributes we're modifying
  492. * @attr: the new attributes
  493. * @attr_mask: the mask of attributes to modify
  494. * @udata: user data for libibverbs.so
  495. *
  496. * Returns 0 on success, otherwise returns an errno.
  497. */
  498. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  499. int attr_mask, struct ib_udata *udata)
  500. {
  501. struct qib_ibdev *dev = to_idev(ibqp->device);
  502. struct qib_qp *qp = to_iqp(ibqp);
  503. enum ib_qp_state cur_state, new_state;
  504. struct ib_event ev;
  505. int lastwqe = 0;
  506. int mig = 0;
  507. int ret;
  508. u32 pmtu = 0; /* for gcc warning only */
  509. spin_lock_irq(&qp->r_lock);
  510. spin_lock(&qp->s_lock);
  511. cur_state = attr_mask & IB_QP_CUR_STATE ?
  512. attr->cur_qp_state : qp->state;
  513. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  514. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  515. attr_mask))
  516. goto inval;
  517. if (attr_mask & IB_QP_AV) {
  518. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  519. goto inval;
  520. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  521. goto inval;
  522. }
  523. if (attr_mask & IB_QP_ALT_PATH) {
  524. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  525. goto inval;
  526. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  527. goto inval;
  528. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  529. goto inval;
  530. }
  531. if (attr_mask & IB_QP_PKEY_INDEX)
  532. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  533. goto inval;
  534. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  535. if (attr->min_rnr_timer > 31)
  536. goto inval;
  537. if (attr_mask & IB_QP_PORT)
  538. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  539. qp->ibqp.qp_type == IB_QPT_GSI ||
  540. attr->port_num == 0 ||
  541. attr->port_num > ibqp->device->phys_port_cnt)
  542. goto inval;
  543. if (attr_mask & IB_QP_DEST_QPN)
  544. if (attr->dest_qp_num > QIB_QPN_MASK)
  545. goto inval;
  546. if (attr_mask & IB_QP_RETRY_CNT)
  547. if (attr->retry_cnt > 7)
  548. goto inval;
  549. if (attr_mask & IB_QP_RNR_RETRY)
  550. if (attr->rnr_retry > 7)
  551. goto inval;
  552. /*
  553. * Don't allow invalid path_mtu values. OK to set greater
  554. * than the active mtu (or even the max_cap, if we have tuned
  555. * that to a small mtu. We'll set qp->path_mtu
  556. * to the lesser of requested attribute mtu and active,
  557. * for packetizing messages.
  558. * Note that the QP port has to be set in INIT and MTU in RTR.
  559. */
  560. if (attr_mask & IB_QP_PATH_MTU) {
  561. struct qib_devdata *dd = dd_from_dev(dev);
  562. int mtu, pidx = qp->port_num - 1;
  563. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  564. if (mtu == -1)
  565. goto inval;
  566. if (mtu > dd->pport[pidx].ibmtu) {
  567. switch (dd->pport[pidx].ibmtu) {
  568. case 4096:
  569. pmtu = IB_MTU_4096;
  570. break;
  571. case 2048:
  572. pmtu = IB_MTU_2048;
  573. break;
  574. case 1024:
  575. pmtu = IB_MTU_1024;
  576. break;
  577. case 512:
  578. pmtu = IB_MTU_512;
  579. break;
  580. case 256:
  581. pmtu = IB_MTU_256;
  582. break;
  583. default:
  584. pmtu = IB_MTU_2048;
  585. }
  586. } else
  587. pmtu = attr->path_mtu;
  588. }
  589. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  590. if (attr->path_mig_state == IB_MIG_REARM) {
  591. if (qp->s_mig_state == IB_MIG_ARMED)
  592. goto inval;
  593. if (new_state != IB_QPS_RTS)
  594. goto inval;
  595. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  596. if (qp->s_mig_state == IB_MIG_REARM)
  597. goto inval;
  598. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  599. goto inval;
  600. if (qp->s_mig_state == IB_MIG_ARMED)
  601. mig = 1;
  602. } else
  603. goto inval;
  604. }
  605. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  606. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  607. goto inval;
  608. switch (new_state) {
  609. case IB_QPS_RESET:
  610. if (qp->state != IB_QPS_RESET) {
  611. qp->state = IB_QPS_RESET;
  612. spin_lock(&dev->pending_lock);
  613. if (!list_empty(&qp->iowait))
  614. list_del_init(&qp->iowait);
  615. spin_unlock(&dev->pending_lock);
  616. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  617. spin_unlock(&qp->s_lock);
  618. spin_unlock_irq(&qp->r_lock);
  619. /* Stop the sending work queue and retry timer */
  620. cancel_work_sync(&qp->s_work);
  621. del_timer_sync(&qp->s_timer);
  622. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  623. if (qp->s_tx) {
  624. qib_put_txreq(qp->s_tx);
  625. qp->s_tx = NULL;
  626. }
  627. remove_qp(dev, qp);
  628. wait_event(qp->wait, !atomic_read(&qp->refcount));
  629. spin_lock_irq(&qp->r_lock);
  630. spin_lock(&qp->s_lock);
  631. clear_mr_refs(qp, 1);
  632. qib_reset_qp(qp, ibqp->qp_type);
  633. }
  634. break;
  635. case IB_QPS_RTR:
  636. /* Allow event to retrigger if QP set to RTR more than once */
  637. qp->r_flags &= ~QIB_R_COMM_EST;
  638. qp->state = new_state;
  639. break;
  640. case IB_QPS_SQD:
  641. qp->s_draining = qp->s_last != qp->s_cur;
  642. qp->state = new_state;
  643. break;
  644. case IB_QPS_SQE:
  645. if (qp->ibqp.qp_type == IB_QPT_RC)
  646. goto inval;
  647. qp->state = new_state;
  648. break;
  649. case IB_QPS_ERR:
  650. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  651. break;
  652. default:
  653. qp->state = new_state;
  654. break;
  655. }
  656. if (attr_mask & IB_QP_PKEY_INDEX)
  657. qp->s_pkey_index = attr->pkey_index;
  658. if (attr_mask & IB_QP_PORT)
  659. qp->port_num = attr->port_num;
  660. if (attr_mask & IB_QP_DEST_QPN)
  661. qp->remote_qpn = attr->dest_qp_num;
  662. if (attr_mask & IB_QP_SQ_PSN) {
  663. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  664. qp->s_psn = qp->s_next_psn;
  665. qp->s_sending_psn = qp->s_next_psn;
  666. qp->s_last_psn = qp->s_next_psn - 1;
  667. qp->s_sending_hpsn = qp->s_last_psn;
  668. }
  669. if (attr_mask & IB_QP_RQ_PSN)
  670. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  671. if (attr_mask & IB_QP_ACCESS_FLAGS)
  672. qp->qp_access_flags = attr->qp_access_flags;
  673. if (attr_mask & IB_QP_AV) {
  674. qp->remote_ah_attr = attr->ah_attr;
  675. qp->s_srate = attr->ah_attr.static_rate;
  676. }
  677. if (attr_mask & IB_QP_ALT_PATH) {
  678. qp->alt_ah_attr = attr->alt_ah_attr;
  679. qp->s_alt_pkey_index = attr->alt_pkey_index;
  680. }
  681. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  682. qp->s_mig_state = attr->path_mig_state;
  683. if (mig) {
  684. qp->remote_ah_attr = qp->alt_ah_attr;
  685. qp->port_num = qp->alt_ah_attr.port_num;
  686. qp->s_pkey_index = qp->s_alt_pkey_index;
  687. }
  688. }
  689. if (attr_mask & IB_QP_PATH_MTU) {
  690. qp->path_mtu = pmtu;
  691. qp->pmtu = ib_mtu_enum_to_int(pmtu);
  692. }
  693. if (attr_mask & IB_QP_RETRY_CNT) {
  694. qp->s_retry_cnt = attr->retry_cnt;
  695. qp->s_retry = attr->retry_cnt;
  696. }
  697. if (attr_mask & IB_QP_RNR_RETRY) {
  698. qp->s_rnr_retry_cnt = attr->rnr_retry;
  699. qp->s_rnr_retry = attr->rnr_retry;
  700. }
  701. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  702. qp->r_min_rnr_timer = attr->min_rnr_timer;
  703. if (attr_mask & IB_QP_TIMEOUT) {
  704. qp->timeout = attr->timeout;
  705. qp->timeout_jiffies =
  706. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  707. 1000UL);
  708. }
  709. if (attr_mask & IB_QP_QKEY)
  710. qp->qkey = attr->qkey;
  711. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  712. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  713. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  714. qp->s_max_rd_atomic = attr->max_rd_atomic;
  715. spin_unlock(&qp->s_lock);
  716. spin_unlock_irq(&qp->r_lock);
  717. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  718. insert_qp(dev, qp);
  719. if (lastwqe) {
  720. ev.device = qp->ibqp.device;
  721. ev.element.qp = &qp->ibqp;
  722. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  723. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  724. }
  725. if (mig) {
  726. ev.device = qp->ibqp.device;
  727. ev.element.qp = &qp->ibqp;
  728. ev.event = IB_EVENT_PATH_MIG;
  729. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  730. }
  731. ret = 0;
  732. goto bail;
  733. inval:
  734. spin_unlock(&qp->s_lock);
  735. spin_unlock_irq(&qp->r_lock);
  736. ret = -EINVAL;
  737. bail:
  738. return ret;
  739. }
  740. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  741. int attr_mask, struct ib_qp_init_attr *init_attr)
  742. {
  743. struct qib_qp *qp = to_iqp(ibqp);
  744. attr->qp_state = qp->state;
  745. attr->cur_qp_state = attr->qp_state;
  746. attr->path_mtu = qp->path_mtu;
  747. attr->path_mig_state = qp->s_mig_state;
  748. attr->qkey = qp->qkey;
  749. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  750. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  751. attr->dest_qp_num = qp->remote_qpn;
  752. attr->qp_access_flags = qp->qp_access_flags;
  753. attr->cap.max_send_wr = qp->s_size - 1;
  754. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  755. attr->cap.max_send_sge = qp->s_max_sge;
  756. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  757. attr->cap.max_inline_data = 0;
  758. attr->ah_attr = qp->remote_ah_attr;
  759. attr->alt_ah_attr = qp->alt_ah_attr;
  760. attr->pkey_index = qp->s_pkey_index;
  761. attr->alt_pkey_index = qp->s_alt_pkey_index;
  762. attr->en_sqd_async_notify = 0;
  763. attr->sq_draining = qp->s_draining;
  764. attr->max_rd_atomic = qp->s_max_rd_atomic;
  765. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  766. attr->min_rnr_timer = qp->r_min_rnr_timer;
  767. attr->port_num = qp->port_num;
  768. attr->timeout = qp->timeout;
  769. attr->retry_cnt = qp->s_retry_cnt;
  770. attr->rnr_retry = qp->s_rnr_retry_cnt;
  771. attr->alt_port_num = qp->alt_ah_attr.port_num;
  772. attr->alt_timeout = qp->alt_timeout;
  773. init_attr->event_handler = qp->ibqp.event_handler;
  774. init_attr->qp_context = qp->ibqp.qp_context;
  775. init_attr->send_cq = qp->ibqp.send_cq;
  776. init_attr->recv_cq = qp->ibqp.recv_cq;
  777. init_attr->srq = qp->ibqp.srq;
  778. init_attr->cap = attr->cap;
  779. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  780. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  781. else
  782. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  783. init_attr->qp_type = qp->ibqp.qp_type;
  784. init_attr->port_num = qp->port_num;
  785. return 0;
  786. }
  787. /**
  788. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  789. * @qp: the queue pair to compute the AETH for
  790. *
  791. * Returns the AETH.
  792. */
  793. __be32 qib_compute_aeth(struct qib_qp *qp)
  794. {
  795. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  796. if (qp->ibqp.srq) {
  797. /*
  798. * Shared receive queues don't generate credits.
  799. * Set the credit field to the invalid value.
  800. */
  801. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  802. } else {
  803. u32 min, max, x;
  804. u32 credits;
  805. struct qib_rwq *wq = qp->r_rq.wq;
  806. u32 head;
  807. u32 tail;
  808. /* sanity check pointers before trusting them */
  809. head = wq->head;
  810. if (head >= qp->r_rq.size)
  811. head = 0;
  812. tail = wq->tail;
  813. if (tail >= qp->r_rq.size)
  814. tail = 0;
  815. /*
  816. * Compute the number of credits available (RWQEs).
  817. * XXX Not holding the r_rq.lock here so there is a small
  818. * chance that the pair of reads are not atomic.
  819. */
  820. credits = head - tail;
  821. if ((int)credits < 0)
  822. credits += qp->r_rq.size;
  823. /*
  824. * Binary search the credit table to find the code to
  825. * use.
  826. */
  827. min = 0;
  828. max = 31;
  829. for (;;) {
  830. x = (min + max) / 2;
  831. if (credit_table[x] == credits)
  832. break;
  833. if (credit_table[x] > credits)
  834. max = x;
  835. else if (min == x)
  836. break;
  837. else
  838. min = x;
  839. }
  840. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  841. }
  842. return cpu_to_be32(aeth);
  843. }
  844. /**
  845. * qib_create_qp - create a queue pair for a device
  846. * @ibpd: the protection domain who's device we create the queue pair for
  847. * @init_attr: the attributes of the queue pair
  848. * @udata: user data for libibverbs.so
  849. *
  850. * Returns the queue pair on success, otherwise returns an errno.
  851. *
  852. * Called by the ib_create_qp() core verbs function.
  853. */
  854. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  855. struct ib_qp_init_attr *init_attr,
  856. struct ib_udata *udata)
  857. {
  858. struct qib_qp *qp;
  859. int err;
  860. struct qib_swqe *swq = NULL;
  861. struct qib_ibdev *dev;
  862. struct qib_devdata *dd;
  863. size_t sz;
  864. size_t sg_list_sz;
  865. struct ib_qp *ret;
  866. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  867. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  868. ret = ERR_PTR(-EINVAL);
  869. goto bail;
  870. }
  871. /* Check receive queue parameters if no SRQ is specified. */
  872. if (!init_attr->srq) {
  873. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  874. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  875. ret = ERR_PTR(-EINVAL);
  876. goto bail;
  877. }
  878. if (init_attr->cap.max_send_sge +
  879. init_attr->cap.max_send_wr +
  880. init_attr->cap.max_recv_sge +
  881. init_attr->cap.max_recv_wr == 0) {
  882. ret = ERR_PTR(-EINVAL);
  883. goto bail;
  884. }
  885. }
  886. switch (init_attr->qp_type) {
  887. case IB_QPT_SMI:
  888. case IB_QPT_GSI:
  889. if (init_attr->port_num == 0 ||
  890. init_attr->port_num > ibpd->device->phys_port_cnt) {
  891. ret = ERR_PTR(-EINVAL);
  892. goto bail;
  893. }
  894. case IB_QPT_UC:
  895. case IB_QPT_RC:
  896. case IB_QPT_UD:
  897. sz = sizeof(struct qib_sge) *
  898. init_attr->cap.max_send_sge +
  899. sizeof(struct qib_swqe);
  900. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  901. if (swq == NULL) {
  902. ret = ERR_PTR(-ENOMEM);
  903. goto bail;
  904. }
  905. sz = sizeof(*qp);
  906. sg_list_sz = 0;
  907. if (init_attr->srq) {
  908. struct qib_srq *srq = to_isrq(init_attr->srq);
  909. if (srq->rq.max_sge > 1)
  910. sg_list_sz = sizeof(*qp->r_sg_list) *
  911. (srq->rq.max_sge - 1);
  912. } else if (init_attr->cap.max_recv_sge > 1)
  913. sg_list_sz = sizeof(*qp->r_sg_list) *
  914. (init_attr->cap.max_recv_sge - 1);
  915. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  916. if (!qp) {
  917. ret = ERR_PTR(-ENOMEM);
  918. goto bail_swq;
  919. }
  920. RCU_INIT_POINTER(qp->next, NULL);
  921. qp->s_hdr = kzalloc(sizeof(*qp->s_hdr), GFP_KERNEL);
  922. if (!qp->s_hdr) {
  923. ret = ERR_PTR(-ENOMEM);
  924. goto bail_qp;
  925. }
  926. qp->timeout_jiffies =
  927. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  928. 1000UL);
  929. if (init_attr->srq)
  930. sz = 0;
  931. else {
  932. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  933. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  934. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  935. sizeof(struct qib_rwqe);
  936. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  937. qp->r_rq.size * sz);
  938. if (!qp->r_rq.wq) {
  939. ret = ERR_PTR(-ENOMEM);
  940. goto bail_qp;
  941. }
  942. }
  943. /*
  944. * ib_create_qp() will initialize qp->ibqp
  945. * except for qp->ibqp.qp_num.
  946. */
  947. spin_lock_init(&qp->r_lock);
  948. spin_lock_init(&qp->s_lock);
  949. spin_lock_init(&qp->r_rq.lock);
  950. atomic_set(&qp->refcount, 0);
  951. init_waitqueue_head(&qp->wait);
  952. init_waitqueue_head(&qp->wait_dma);
  953. init_timer(&qp->s_timer);
  954. qp->s_timer.data = (unsigned long)qp;
  955. INIT_WORK(&qp->s_work, qib_do_send);
  956. INIT_LIST_HEAD(&qp->iowait);
  957. INIT_LIST_HEAD(&qp->rspwait);
  958. qp->state = IB_QPS_RESET;
  959. qp->s_wq = swq;
  960. qp->s_size = init_attr->cap.max_send_wr + 1;
  961. qp->s_max_sge = init_attr->cap.max_send_sge;
  962. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  963. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  964. dev = to_idev(ibpd->device);
  965. dd = dd_from_dev(dev);
  966. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  967. init_attr->port_num);
  968. if (err < 0) {
  969. ret = ERR_PTR(err);
  970. vfree(qp->r_rq.wq);
  971. goto bail_qp;
  972. }
  973. qp->ibqp.qp_num = err;
  974. qp->port_num = init_attr->port_num;
  975. qib_reset_qp(qp, init_attr->qp_type);
  976. break;
  977. default:
  978. /* Don't support raw QPs */
  979. ret = ERR_PTR(-ENOSYS);
  980. goto bail;
  981. }
  982. init_attr->cap.max_inline_data = 0;
  983. /*
  984. * Return the address of the RWQ as the offset to mmap.
  985. * See qib_mmap() for details.
  986. */
  987. if (udata && udata->outlen >= sizeof(__u64)) {
  988. if (!qp->r_rq.wq) {
  989. __u64 offset = 0;
  990. err = ib_copy_to_udata(udata, &offset,
  991. sizeof(offset));
  992. if (err) {
  993. ret = ERR_PTR(err);
  994. goto bail_ip;
  995. }
  996. } else {
  997. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  998. qp->ip = qib_create_mmap_info(dev, s,
  999. ibpd->uobject->context,
  1000. qp->r_rq.wq);
  1001. if (!qp->ip) {
  1002. ret = ERR_PTR(-ENOMEM);
  1003. goto bail_ip;
  1004. }
  1005. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  1006. sizeof(qp->ip->offset));
  1007. if (err) {
  1008. ret = ERR_PTR(err);
  1009. goto bail_ip;
  1010. }
  1011. }
  1012. }
  1013. spin_lock(&dev->n_qps_lock);
  1014. if (dev->n_qps_allocated == ib_qib_max_qps) {
  1015. spin_unlock(&dev->n_qps_lock);
  1016. ret = ERR_PTR(-ENOMEM);
  1017. goto bail_ip;
  1018. }
  1019. dev->n_qps_allocated++;
  1020. spin_unlock(&dev->n_qps_lock);
  1021. if (qp->ip) {
  1022. spin_lock_irq(&dev->pending_lock);
  1023. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  1024. spin_unlock_irq(&dev->pending_lock);
  1025. }
  1026. ret = &qp->ibqp;
  1027. goto bail;
  1028. bail_ip:
  1029. if (qp->ip)
  1030. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1031. else
  1032. vfree(qp->r_rq.wq);
  1033. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1034. bail_qp:
  1035. kfree(qp->s_hdr);
  1036. kfree(qp);
  1037. bail_swq:
  1038. vfree(swq);
  1039. bail:
  1040. return ret;
  1041. }
  1042. /**
  1043. * qib_destroy_qp - destroy a queue pair
  1044. * @ibqp: the queue pair to destroy
  1045. *
  1046. * Returns 0 on success.
  1047. *
  1048. * Note that this can be called while the QP is actively sending or
  1049. * receiving!
  1050. */
  1051. int qib_destroy_qp(struct ib_qp *ibqp)
  1052. {
  1053. struct qib_qp *qp = to_iqp(ibqp);
  1054. struct qib_ibdev *dev = to_idev(ibqp->device);
  1055. /* Make sure HW and driver activity is stopped. */
  1056. spin_lock_irq(&qp->s_lock);
  1057. if (qp->state != IB_QPS_RESET) {
  1058. qp->state = IB_QPS_RESET;
  1059. spin_lock(&dev->pending_lock);
  1060. if (!list_empty(&qp->iowait))
  1061. list_del_init(&qp->iowait);
  1062. spin_unlock(&dev->pending_lock);
  1063. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1064. spin_unlock_irq(&qp->s_lock);
  1065. cancel_work_sync(&qp->s_work);
  1066. del_timer_sync(&qp->s_timer);
  1067. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1068. if (qp->s_tx) {
  1069. qib_put_txreq(qp->s_tx);
  1070. qp->s_tx = NULL;
  1071. }
  1072. remove_qp(dev, qp);
  1073. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1074. clear_mr_refs(qp, 1);
  1075. } else
  1076. spin_unlock_irq(&qp->s_lock);
  1077. /* all user's cleaned up, mark it available */
  1078. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1079. spin_lock(&dev->n_qps_lock);
  1080. dev->n_qps_allocated--;
  1081. spin_unlock(&dev->n_qps_lock);
  1082. if (qp->ip)
  1083. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1084. else
  1085. vfree(qp->r_rq.wq);
  1086. vfree(qp->s_wq);
  1087. kfree(qp->s_hdr);
  1088. kfree(qp);
  1089. return 0;
  1090. }
  1091. /**
  1092. * qib_init_qpn_table - initialize the QP number table for a device
  1093. * @qpt: the QPN table
  1094. */
  1095. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1096. {
  1097. spin_lock_init(&qpt->lock);
  1098. qpt->last = 1; /* start with QPN 2 */
  1099. qpt->nmaps = 1;
  1100. qpt->mask = dd->qpn_mask;
  1101. }
  1102. /**
  1103. * qib_free_qpn_table - free the QP number table for a device
  1104. * @qpt: the QPN table
  1105. */
  1106. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1107. {
  1108. int i;
  1109. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1110. if (qpt->map[i].page)
  1111. free_page((unsigned long) qpt->map[i].page);
  1112. }
  1113. /**
  1114. * qib_get_credit - flush the send work queue of a QP
  1115. * @qp: the qp who's send work queue to flush
  1116. * @aeth: the Acknowledge Extended Transport Header
  1117. *
  1118. * The QP s_lock should be held.
  1119. */
  1120. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1121. {
  1122. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1123. /*
  1124. * If the credit is invalid, we can send
  1125. * as many packets as we like. Otherwise, we have to
  1126. * honor the credit field.
  1127. */
  1128. if (credit == QIB_AETH_CREDIT_INVAL) {
  1129. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1130. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1131. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1132. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1133. qib_schedule_send(qp);
  1134. }
  1135. }
  1136. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1137. /* Compute new LSN (i.e., MSN + credit) */
  1138. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1139. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1140. qp->s_lsn = credit;
  1141. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1142. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1143. qib_schedule_send(qp);
  1144. }
  1145. }
  1146. }
  1147. }