setup.c 27 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <linux/i2c.h>
  20. #include <linux/i2c/tsc2007.h>
  21. #include <linux/spi/spi.h>
  22. #include <linux/spi/sh_msiof.h>
  23. #include <linux/spi/mmc_spi.h>
  24. #include <linux/mmc/host.h>
  25. #include <linux/input.h>
  26. #include <linux/input/sh_keysc.h>
  27. #include <linux/mfd/sh_mobile_sdhi.h>
  28. #include <video/sh_mobile_lcdc.h>
  29. #include <sound/sh_fsi.h>
  30. #include <media/sh_mobile_ceu.h>
  31. #include <media/tw9910.h>
  32. #include <media/mt9t112.h>
  33. #include <asm/heartbeat.h>
  34. #include <asm/sh_eth.h>
  35. #include <asm/clock.h>
  36. #include <asm/suspend.h>
  37. #include <cpu/sh7724.h>
  38. /*
  39. * Address Interface BusWidth
  40. *-----------------------------------------
  41. * 0x0000_0000 uboot 16bit
  42. * 0x0004_0000 Linux romImage 16bit
  43. * 0x0014_0000 MTD for Linux 16bit
  44. * 0x0400_0000 Internal I/O 16/32bit
  45. * 0x0800_0000 DRAM 32bit
  46. * 0x1800_0000 MFI 16bit
  47. */
  48. /* SWITCH
  49. *------------------------------
  50. * DS2[1] = FlashROM write protect ON : write protect
  51. * OFF : No write protect
  52. * DS2[2] = RMII / TS, SCIF ON : RMII
  53. * OFF : TS, SCIF3
  54. * DS2[3] = Camera / Video ON : Camera
  55. * OFF : NTSC/PAL (IN)
  56. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  57. * OFF : SH7724 DV_CLK
  58. * DS2[6-7] = MMC / SD ON-OFF : SD
  59. * OFF-ON : MMC
  60. */
  61. /* Heartbeat */
  62. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  63. static struct heartbeat_data heartbeat_data = {
  64. .regsize = 8,
  65. .nr_bits = 4,
  66. .bit_pos = led_pos,
  67. };
  68. static struct resource heartbeat_resources[] = {
  69. [0] = {
  70. .start = 0xA405012C, /* PTG */
  71. .end = 0xA405012E - 1,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. };
  75. static struct platform_device heartbeat_device = {
  76. .name = "heartbeat",
  77. .id = -1,
  78. .dev = {
  79. .platform_data = &heartbeat_data,
  80. },
  81. .num_resources = ARRAY_SIZE(heartbeat_resources),
  82. .resource = heartbeat_resources,
  83. };
  84. /* MTD */
  85. static struct mtd_partition nor_flash_partitions[] = {
  86. {
  87. .name = "boot loader",
  88. .offset = 0,
  89. .size = (5 * 1024 * 1024),
  90. .mask_flags = MTD_WRITEABLE, /* force read-only */
  91. }, {
  92. .name = "free-area",
  93. .offset = MTDPART_OFS_APPEND,
  94. .size = MTDPART_SIZ_FULL,
  95. },
  96. };
  97. static struct physmap_flash_data nor_flash_data = {
  98. .width = 2,
  99. .parts = nor_flash_partitions,
  100. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  101. };
  102. static struct resource nor_flash_resources[] = {
  103. [0] = {
  104. .name = "NOR Flash",
  105. .start = 0x00000000,
  106. .end = 0x03ffffff,
  107. .flags = IORESOURCE_MEM,
  108. }
  109. };
  110. static struct platform_device nor_flash_device = {
  111. .name = "physmap-flash",
  112. .resource = nor_flash_resources,
  113. .num_resources = ARRAY_SIZE(nor_flash_resources),
  114. .dev = {
  115. .platform_data = &nor_flash_data,
  116. },
  117. };
  118. /* SH Eth */
  119. #define SH_ETH_ADDR (0xA4600000)
  120. static struct resource sh_eth_resources[] = {
  121. [0] = {
  122. .start = SH_ETH_ADDR,
  123. .end = SH_ETH_ADDR + 0x1FC,
  124. .flags = IORESOURCE_MEM,
  125. },
  126. [1] = {
  127. .start = 91,
  128. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  129. },
  130. };
  131. struct sh_eth_plat_data sh_eth_plat = {
  132. .phy = 0x1f, /* SMSC LAN8700 */
  133. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  134. .ether_link_active_low = 1
  135. };
  136. static struct platform_device sh_eth_device = {
  137. .name = "sh-eth",
  138. .id = 0,
  139. .dev = {
  140. .platform_data = &sh_eth_plat,
  141. },
  142. .num_resources = ARRAY_SIZE(sh_eth_resources),
  143. .resource = sh_eth_resources,
  144. .archdata = {
  145. .hwblk_id = HWBLK_ETHER,
  146. },
  147. };
  148. /* USB0 host */
  149. void usb0_port_power(int port, int power)
  150. {
  151. gpio_set_value(GPIO_PTB4, power);
  152. }
  153. static struct r8a66597_platdata usb0_host_data = {
  154. .on_chip = 1,
  155. .port_power = usb0_port_power,
  156. };
  157. static struct resource usb0_host_resources[] = {
  158. [0] = {
  159. .start = 0xa4d80000,
  160. .end = 0xa4d80124 - 1,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. [1] = {
  164. .start = 65,
  165. .end = 65,
  166. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  167. },
  168. };
  169. static struct platform_device usb0_host_device = {
  170. .name = "r8a66597_hcd",
  171. .id = 0,
  172. .dev = {
  173. .dma_mask = NULL, /* not use dma */
  174. .coherent_dma_mask = 0xffffffff,
  175. .platform_data = &usb0_host_data,
  176. },
  177. .num_resources = ARRAY_SIZE(usb0_host_resources),
  178. .resource = usb0_host_resources,
  179. };
  180. /* USB1 host/function */
  181. void usb1_port_power(int port, int power)
  182. {
  183. gpio_set_value(GPIO_PTB5, power);
  184. }
  185. static struct r8a66597_platdata usb1_common_data = {
  186. .on_chip = 1,
  187. .port_power = usb1_port_power,
  188. };
  189. static struct resource usb1_common_resources[] = {
  190. [0] = {
  191. .start = 0xa4d90000,
  192. .end = 0xa4d90124 - 1,
  193. .flags = IORESOURCE_MEM,
  194. },
  195. [1] = {
  196. .start = 66,
  197. .end = 66,
  198. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  199. },
  200. };
  201. static struct platform_device usb1_common_device = {
  202. /* .name will be added in arch_setup */
  203. .id = 1,
  204. .dev = {
  205. .dma_mask = NULL, /* not use dma */
  206. .coherent_dma_mask = 0xffffffff,
  207. .platform_data = &usb1_common_data,
  208. },
  209. .num_resources = ARRAY_SIZE(usb1_common_resources),
  210. .resource = usb1_common_resources,
  211. };
  212. /* LCDC */
  213. static struct sh_mobile_lcdc_info lcdc_info = {
  214. .ch[0] = {
  215. .interface_type = RGB18,
  216. .chan = LCDC_CHAN_MAINLCD,
  217. .bpp = 16,
  218. .lcd_cfg = {
  219. .sync = 0, /* hsync and vsync are active low */
  220. },
  221. .lcd_size_cfg = { /* 7.0 inch */
  222. .width = 152,
  223. .height = 91,
  224. },
  225. .board_cfg = {
  226. },
  227. }
  228. };
  229. static struct resource lcdc_resources[] = {
  230. [0] = {
  231. .name = "LCDC",
  232. .start = 0xfe940000,
  233. .end = 0xfe942fff,
  234. .flags = IORESOURCE_MEM,
  235. },
  236. [1] = {
  237. .start = 106,
  238. .flags = IORESOURCE_IRQ,
  239. },
  240. };
  241. static struct platform_device lcdc_device = {
  242. .name = "sh_mobile_lcdc_fb",
  243. .num_resources = ARRAY_SIZE(lcdc_resources),
  244. .resource = lcdc_resources,
  245. .dev = {
  246. .platform_data = &lcdc_info,
  247. },
  248. .archdata = {
  249. .hwblk_id = HWBLK_LCDC,
  250. },
  251. };
  252. /* CEU0 */
  253. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  254. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  255. };
  256. static struct resource ceu0_resources[] = {
  257. [0] = {
  258. .name = "CEU0",
  259. .start = 0xfe910000,
  260. .end = 0xfe91009f,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. [1] = {
  264. .start = 52,
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. [2] = {
  268. /* place holder for contiguous memory */
  269. },
  270. };
  271. static struct platform_device ceu0_device = {
  272. .name = "sh_mobile_ceu",
  273. .id = 0, /* "ceu0" clock */
  274. .num_resources = ARRAY_SIZE(ceu0_resources),
  275. .resource = ceu0_resources,
  276. .dev = {
  277. .platform_data = &sh_mobile_ceu0_info,
  278. },
  279. .archdata = {
  280. .hwblk_id = HWBLK_CEU0,
  281. },
  282. };
  283. /* CEU1 */
  284. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  285. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  286. };
  287. static struct resource ceu1_resources[] = {
  288. [0] = {
  289. .name = "CEU1",
  290. .start = 0xfe914000,
  291. .end = 0xfe91409f,
  292. .flags = IORESOURCE_MEM,
  293. },
  294. [1] = {
  295. .start = 63,
  296. .flags = IORESOURCE_IRQ,
  297. },
  298. [2] = {
  299. /* place holder for contiguous memory */
  300. },
  301. };
  302. static struct platform_device ceu1_device = {
  303. .name = "sh_mobile_ceu",
  304. .id = 1, /* "ceu1" clock */
  305. .num_resources = ARRAY_SIZE(ceu1_resources),
  306. .resource = ceu1_resources,
  307. .dev = {
  308. .platform_data = &sh_mobile_ceu1_info,
  309. },
  310. .archdata = {
  311. .hwblk_id = HWBLK_CEU1,
  312. },
  313. };
  314. /* I2C device */
  315. static struct i2c_board_info i2c0_devices[] = {
  316. {
  317. I2C_BOARD_INFO("da7210", 0x1a),
  318. },
  319. };
  320. static struct i2c_board_info i2c1_devices[] = {
  321. {
  322. I2C_BOARD_INFO("r2025sd", 0x32),
  323. },
  324. {
  325. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  326. .irq = 33,
  327. }
  328. };
  329. /* KEYSC */
  330. static struct sh_keysc_info keysc_info = {
  331. .mode = SH_KEYSC_MODE_1,
  332. .scan_timing = 3,
  333. .delay = 50,
  334. .kycr2_delay = 100,
  335. .keycodes = { KEY_1, 0, 0, 0, 0,
  336. KEY_2, 0, 0, 0, 0,
  337. KEY_3, 0, 0, 0, 0,
  338. KEY_4, 0, 0, 0, 0,
  339. KEY_5, 0, 0, 0, 0,
  340. KEY_6, 0, 0, 0, 0, },
  341. };
  342. static struct resource keysc_resources[] = {
  343. [0] = {
  344. .name = "KEYSC",
  345. .start = 0x044b0000,
  346. .end = 0x044b000f,
  347. .flags = IORESOURCE_MEM,
  348. },
  349. [1] = {
  350. .start = 79,
  351. .flags = IORESOURCE_IRQ,
  352. },
  353. };
  354. static struct platform_device keysc_device = {
  355. .name = "sh_keysc",
  356. .id = 0, /* keysc0 clock */
  357. .num_resources = ARRAY_SIZE(keysc_resources),
  358. .resource = keysc_resources,
  359. .dev = {
  360. .platform_data = &keysc_info,
  361. },
  362. .archdata = {
  363. .hwblk_id = HWBLK_KEYSC,
  364. },
  365. };
  366. /* TouchScreen */
  367. #define IRQ0 32
  368. static int ts_get_pendown_state(void)
  369. {
  370. int val = 0;
  371. gpio_free(GPIO_FN_INTC_IRQ0);
  372. gpio_request(GPIO_PTZ0, NULL);
  373. gpio_direction_input(GPIO_PTZ0);
  374. val = gpio_get_value(GPIO_PTZ0);
  375. gpio_free(GPIO_PTZ0);
  376. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  377. return val ? 0 : 1;
  378. }
  379. static int ts_init(void)
  380. {
  381. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  382. return 0;
  383. }
  384. struct tsc2007_platform_data tsc2007_info = {
  385. .model = 2007,
  386. .x_plate_ohms = 180,
  387. .get_pendown_state = ts_get_pendown_state,
  388. .init_platform_hw = ts_init,
  389. };
  390. static struct i2c_board_info ts_i2c_clients = {
  391. I2C_BOARD_INFO("tsc2007", 0x48),
  392. .type = "tsc2007",
  393. .platform_data = &tsc2007_info,
  394. .irq = IRQ0,
  395. };
  396. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  397. /* SHDI0 */
  398. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  399. {
  400. gpio_set_value(GPIO_PTB6, state);
  401. }
  402. static struct sh_mobile_sdhi_info sdhi0_info = {
  403. .set_pwr = sdhi0_set_pwr,
  404. };
  405. static struct resource sdhi0_resources[] = {
  406. [0] = {
  407. .name = "SDHI0",
  408. .start = 0x04ce0000,
  409. .end = 0x04ce01ff,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. [1] = {
  413. .start = 101,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device sdhi0_device = {
  418. .name = "sh_mobile_sdhi",
  419. .num_resources = ARRAY_SIZE(sdhi0_resources),
  420. .resource = sdhi0_resources,
  421. .id = 0,
  422. .dev = {
  423. .platform_data = &sdhi0_info,
  424. },
  425. .archdata = {
  426. .hwblk_id = HWBLK_SDHI0,
  427. },
  428. };
  429. /* SHDI1 */
  430. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  431. {
  432. gpio_set_value(GPIO_PTB7, state);
  433. }
  434. static struct sh_mobile_sdhi_info sdhi1_info = {
  435. .set_pwr = sdhi1_set_pwr,
  436. };
  437. static struct resource sdhi1_resources[] = {
  438. [0] = {
  439. .name = "SDHI1",
  440. .start = 0x04cf0000,
  441. .end = 0x04cf01ff,
  442. .flags = IORESOURCE_MEM,
  443. },
  444. [1] = {
  445. .start = 24,
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. };
  449. static struct platform_device sdhi1_device = {
  450. .name = "sh_mobile_sdhi",
  451. .num_resources = ARRAY_SIZE(sdhi1_resources),
  452. .resource = sdhi1_resources,
  453. .id = 1,
  454. .dev = {
  455. .platform_data = &sdhi1_info,
  456. },
  457. .archdata = {
  458. .hwblk_id = HWBLK_SDHI1,
  459. },
  460. };
  461. #else
  462. /* MMC SPI */
  463. static int mmc_spi_get_ro(struct device *dev)
  464. {
  465. return gpio_get_value(GPIO_PTY6);
  466. }
  467. static int mmc_spi_get_cd(struct device *dev)
  468. {
  469. return !gpio_get_value(GPIO_PTY7);
  470. }
  471. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  472. {
  473. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  474. }
  475. static struct mmc_spi_platform_data mmc_spi_info = {
  476. .get_ro = mmc_spi_get_ro,
  477. .get_cd = mmc_spi_get_cd,
  478. .caps = MMC_CAP_NEEDS_POLL,
  479. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  480. .setpower = mmc_spi_setpower,
  481. };
  482. static struct spi_board_info spi_bus[] = {
  483. {
  484. .modalias = "mmc_spi",
  485. .platform_data = &mmc_spi_info,
  486. .max_speed_hz = 5000000,
  487. .mode = SPI_MODE_0,
  488. .controller_data = (void *) GPIO_PTM4,
  489. },
  490. };
  491. /* MSIOF0 */
  492. static struct sh_msiof_spi_info msiof0_data = {
  493. .num_chipselect = 1,
  494. };
  495. static struct resource msiof0_resources[] = {
  496. [0] = {
  497. .name = "MSIOF0",
  498. .start = 0xa4c40000,
  499. .end = 0xa4c40063,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. [1] = {
  503. .start = 84,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. };
  507. static struct platform_device msiof0_device = {
  508. .name = "spi_sh_msiof",
  509. .id = 0, /* MSIOF0 */
  510. .dev = {
  511. .platform_data = &msiof0_data,
  512. },
  513. .num_resources = ARRAY_SIZE(msiof0_resources),
  514. .resource = msiof0_resources,
  515. .archdata = {
  516. .hwblk_id = HWBLK_MSIOF0,
  517. },
  518. };
  519. #endif
  520. /* I2C Video/Camera */
  521. static struct i2c_board_info i2c_camera[] = {
  522. {
  523. I2C_BOARD_INFO("tw9910", 0x45),
  524. },
  525. {
  526. /* 1st camera */
  527. I2C_BOARD_INFO("mt9t112", 0x3c),
  528. },
  529. {
  530. /* 2nd camera */
  531. I2C_BOARD_INFO("mt9t112", 0x3c),
  532. },
  533. };
  534. /* tw9910 */
  535. static int tw9910_power(struct device *dev, int mode)
  536. {
  537. int val = mode ? 0 : 1;
  538. gpio_set_value(GPIO_PTU2, val);
  539. if (mode)
  540. mdelay(100);
  541. return 0;
  542. }
  543. static struct tw9910_video_info tw9910_info = {
  544. .buswidth = SOCAM_DATAWIDTH_8,
  545. .mpout = TW9910_MPO_FIELD,
  546. };
  547. static struct soc_camera_link tw9910_link = {
  548. .i2c_adapter_id = 0,
  549. .bus_id = 1,
  550. .power = tw9910_power,
  551. .board_info = &i2c_camera[0],
  552. .module_name = "tw9910",
  553. .priv = &tw9910_info,
  554. };
  555. /* mt9t112 */
  556. static int mt9t112_power1(struct device *dev, int mode)
  557. {
  558. gpio_set_value(GPIO_PTA3, mode);
  559. if (mode)
  560. mdelay(100);
  561. return 0;
  562. }
  563. static struct mt9t112_camera_info mt9t112_info1 = {
  564. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  565. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  566. };
  567. static struct soc_camera_link mt9t112_link1 = {
  568. .i2c_adapter_id = 0,
  569. .power = mt9t112_power1,
  570. .bus_id = 0,
  571. .board_info = &i2c_camera[1],
  572. .module_name = "mt9t112",
  573. .priv = &mt9t112_info1,
  574. };
  575. static int mt9t112_power2(struct device *dev, int mode)
  576. {
  577. gpio_set_value(GPIO_PTA4, mode);
  578. if (mode)
  579. mdelay(100);
  580. return 0;
  581. }
  582. static struct mt9t112_camera_info mt9t112_info2 = {
  583. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  584. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  585. };
  586. static struct soc_camera_link mt9t112_link2 = {
  587. .i2c_adapter_id = 1,
  588. .power = mt9t112_power2,
  589. .bus_id = 1,
  590. .board_info = &i2c_camera[2],
  591. .module_name = "mt9t112",
  592. .priv = &mt9t112_info2,
  593. };
  594. static struct platform_device camera_devices[] = {
  595. {
  596. .name = "soc-camera-pdrv",
  597. .id = 0,
  598. .dev = {
  599. .platform_data = &tw9910_link,
  600. },
  601. },
  602. {
  603. .name = "soc-camera-pdrv",
  604. .id = 1,
  605. .dev = {
  606. .platform_data = &mt9t112_link1,
  607. },
  608. },
  609. {
  610. .name = "soc-camera-pdrv",
  611. .id = 2,
  612. .dev = {
  613. .platform_data = &mt9t112_link2,
  614. },
  615. },
  616. };
  617. /* FSI */
  618. /*
  619. * FSI-B use external clock which came from da7210.
  620. * So, we should change parent of fsi
  621. */
  622. #define FCLKBCR 0xa415000c
  623. static void fsimck_init(struct clk *clk)
  624. {
  625. u32 status = ctrl_inl(clk->enable_reg);
  626. /* use external clock */
  627. status &= ~0x000000ff;
  628. status |= 0x00000080;
  629. ctrl_outl(status, clk->enable_reg);
  630. }
  631. static struct clk_ops fsimck_clk_ops = {
  632. .init = fsimck_init,
  633. };
  634. static struct clk fsimckb_clk = {
  635. .name = "fsimckb_clk",
  636. .id = -1,
  637. .ops = &fsimck_clk_ops,
  638. .enable_reg = (void __iomem *)FCLKBCR,
  639. .rate = 0, /* unknown */
  640. };
  641. struct sh_fsi_platform_info fsi_info = {
  642. .portb_flags = SH_FSI_BRS_INV |
  643. SH_FSI_OUT_SLAVE_MODE |
  644. SH_FSI_IN_SLAVE_MODE |
  645. SH_FSI_OFMT(I2S) |
  646. SH_FSI_IFMT(I2S),
  647. };
  648. static struct resource fsi_resources[] = {
  649. [0] = {
  650. .name = "FSI",
  651. .start = 0xFE3C0000,
  652. .end = 0xFE3C021d,
  653. .flags = IORESOURCE_MEM,
  654. },
  655. [1] = {
  656. .start = 108,
  657. .flags = IORESOURCE_IRQ,
  658. },
  659. };
  660. static struct platform_device fsi_device = {
  661. .name = "sh_fsi",
  662. .id = 0,
  663. .num_resources = ARRAY_SIZE(fsi_resources),
  664. .resource = fsi_resources,
  665. .dev = {
  666. .platform_data = &fsi_info,
  667. },
  668. .archdata = {
  669. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  670. },
  671. };
  672. static struct platform_device *ecovec_devices[] __initdata = {
  673. &heartbeat_device,
  674. &nor_flash_device,
  675. &sh_eth_device,
  676. &usb0_host_device,
  677. &usb1_common_device,
  678. &lcdc_device,
  679. &ceu0_device,
  680. &ceu1_device,
  681. &keysc_device,
  682. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  683. &sdhi0_device,
  684. &sdhi1_device,
  685. #else
  686. &msiof0_device,
  687. #endif
  688. &camera_devices[0],
  689. &camera_devices[1],
  690. &camera_devices[2],
  691. &fsi_device,
  692. };
  693. #define EEPROM_ADDR 0x50
  694. static u8 mac_read(struct i2c_adapter *a, u8 command)
  695. {
  696. struct i2c_msg msg[2];
  697. u8 buf;
  698. int ret;
  699. msg[0].addr = EEPROM_ADDR;
  700. msg[0].flags = 0;
  701. msg[0].len = 1;
  702. msg[0].buf = &command;
  703. msg[1].addr = EEPROM_ADDR;
  704. msg[1].flags = I2C_M_RD;
  705. msg[1].len = 1;
  706. msg[1].buf = &buf;
  707. ret = i2c_transfer(a, msg, 2);
  708. if (ret < 0) {
  709. printk(KERN_ERR "error %d\n", ret);
  710. buf = 0xff;
  711. }
  712. return buf;
  713. }
  714. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  715. {
  716. struct i2c_adapter *a = i2c_get_adapter(1);
  717. int i;
  718. if (!a) {
  719. pr_err("can not get I2C 1\n");
  720. return;
  721. }
  722. /* read MAC address frome EEPROM */
  723. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  724. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  725. msleep(10);
  726. }
  727. }
  728. #define PORT_HIZA 0xA4050158
  729. #define IODRIVEA 0xA405018A
  730. extern char ecovec24_sdram_enter_start;
  731. extern char ecovec24_sdram_enter_end;
  732. extern char ecovec24_sdram_leave_start;
  733. extern char ecovec24_sdram_leave_end;
  734. static int __init arch_setup(void)
  735. {
  736. struct clk *clk;
  737. /* register board specific self-refresh code */
  738. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
  739. &ecovec24_sdram_enter_start,
  740. &ecovec24_sdram_enter_end,
  741. &ecovec24_sdram_leave_start,
  742. &ecovec24_sdram_leave_end);
  743. /* enable STATUS0, STATUS2 and PDSTATUS */
  744. gpio_request(GPIO_FN_STATUS0, NULL);
  745. gpio_request(GPIO_FN_STATUS2, NULL);
  746. gpio_request(GPIO_FN_PDSTATUS, NULL);
  747. /* enable SCIFA0 */
  748. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  749. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  750. /* enable debug LED */
  751. gpio_request(GPIO_PTG0, NULL);
  752. gpio_request(GPIO_PTG1, NULL);
  753. gpio_request(GPIO_PTG2, NULL);
  754. gpio_request(GPIO_PTG3, NULL);
  755. gpio_direction_output(GPIO_PTG0, 0);
  756. gpio_direction_output(GPIO_PTG1, 0);
  757. gpio_direction_output(GPIO_PTG2, 0);
  758. gpio_direction_output(GPIO_PTG3, 0);
  759. ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  760. /* enable SH-Eth */
  761. gpio_request(GPIO_PTA1, NULL);
  762. gpio_direction_output(GPIO_PTA1, 1);
  763. mdelay(20);
  764. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  765. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  766. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  767. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  768. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  769. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  770. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  771. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  772. gpio_request(GPIO_FN_MDIO, NULL);
  773. gpio_request(GPIO_FN_MDC, NULL);
  774. gpio_request(GPIO_FN_LNKSTA, NULL);
  775. /* enable USB */
  776. ctrl_outw(0x0000, 0xA4D80000);
  777. ctrl_outw(0x0000, 0xA4D90000);
  778. gpio_request(GPIO_PTB3, NULL);
  779. gpio_request(GPIO_PTB4, NULL);
  780. gpio_request(GPIO_PTB5, NULL);
  781. gpio_direction_input(GPIO_PTB3);
  782. gpio_direction_output(GPIO_PTB4, 0);
  783. gpio_direction_output(GPIO_PTB5, 0);
  784. ctrl_outw(0x0600, 0xa40501d4);
  785. ctrl_outw(0x0600, 0xa4050192);
  786. if (gpio_get_value(GPIO_PTB3)) {
  787. printk(KERN_INFO "USB1 function is selected\n");
  788. usb1_common_device.name = "r8a66597_udc";
  789. } else {
  790. printk(KERN_INFO "USB1 host is selected\n");
  791. usb1_common_device.name = "r8a66597_hcd";
  792. }
  793. /* enable LCDC */
  794. gpio_request(GPIO_FN_LCDD23, NULL);
  795. gpio_request(GPIO_FN_LCDD22, NULL);
  796. gpio_request(GPIO_FN_LCDD21, NULL);
  797. gpio_request(GPIO_FN_LCDD20, NULL);
  798. gpio_request(GPIO_FN_LCDD19, NULL);
  799. gpio_request(GPIO_FN_LCDD18, NULL);
  800. gpio_request(GPIO_FN_LCDD17, NULL);
  801. gpio_request(GPIO_FN_LCDD16, NULL);
  802. gpio_request(GPIO_FN_LCDD15, NULL);
  803. gpio_request(GPIO_FN_LCDD14, NULL);
  804. gpio_request(GPIO_FN_LCDD13, NULL);
  805. gpio_request(GPIO_FN_LCDD12, NULL);
  806. gpio_request(GPIO_FN_LCDD11, NULL);
  807. gpio_request(GPIO_FN_LCDD10, NULL);
  808. gpio_request(GPIO_FN_LCDD9, NULL);
  809. gpio_request(GPIO_FN_LCDD8, NULL);
  810. gpio_request(GPIO_FN_LCDD7, NULL);
  811. gpio_request(GPIO_FN_LCDD6, NULL);
  812. gpio_request(GPIO_FN_LCDD5, NULL);
  813. gpio_request(GPIO_FN_LCDD4, NULL);
  814. gpio_request(GPIO_FN_LCDD3, NULL);
  815. gpio_request(GPIO_FN_LCDD2, NULL);
  816. gpio_request(GPIO_FN_LCDD1, NULL);
  817. gpio_request(GPIO_FN_LCDD0, NULL);
  818. gpio_request(GPIO_FN_LCDDISP, NULL);
  819. gpio_request(GPIO_FN_LCDHSYN, NULL);
  820. gpio_request(GPIO_FN_LCDDCK, NULL);
  821. gpio_request(GPIO_FN_LCDVSYN, NULL);
  822. gpio_request(GPIO_FN_LCDDON, NULL);
  823. gpio_request(GPIO_FN_LCDLCLK, NULL);
  824. ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  825. gpio_request(GPIO_PTE6, NULL);
  826. gpio_request(GPIO_PTU1, NULL);
  827. gpio_request(GPIO_PTR1, NULL);
  828. gpio_request(GPIO_PTA2, NULL);
  829. gpio_direction_input(GPIO_PTE6);
  830. gpio_direction_output(GPIO_PTU1, 0);
  831. gpio_direction_output(GPIO_PTR1, 0);
  832. gpio_direction_output(GPIO_PTA2, 0);
  833. /* I/O buffer drive ability is high */
  834. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  835. if (gpio_get_value(GPIO_PTE6)) {
  836. /* DVI */
  837. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  838. lcdc_info.ch[0].clock_divider = 1,
  839. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  840. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  841. lcdc_info.ch[0].lcd_cfg.yres = 720;
  842. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  843. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  844. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  845. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  846. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  847. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  848. gpio_set_value(GPIO_PTA2, 1);
  849. gpio_set_value(GPIO_PTU1, 1);
  850. } else {
  851. /* Panel */
  852. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  853. lcdc_info.ch[0].clock_divider = 2,
  854. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  855. lcdc_info.ch[0].lcd_cfg.xres = 800;
  856. lcdc_info.ch[0].lcd_cfg.yres = 480;
  857. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  858. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  859. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  860. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  861. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  862. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  863. gpio_set_value(GPIO_PTR1, 1);
  864. /* FIXME
  865. *
  866. * LCDDON control is needed for Panel,
  867. * but current sh_mobile_lcdc driver doesn't control it.
  868. * It is temporary correspondence
  869. */
  870. gpio_request(GPIO_PTF4, NULL);
  871. gpio_direction_output(GPIO_PTF4, 1);
  872. /* enable TouchScreen */
  873. i2c_register_board_info(0, &ts_i2c_clients, 1);
  874. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  875. }
  876. /* enable CEU0 */
  877. gpio_request(GPIO_FN_VIO0_D15, NULL);
  878. gpio_request(GPIO_FN_VIO0_D14, NULL);
  879. gpio_request(GPIO_FN_VIO0_D13, NULL);
  880. gpio_request(GPIO_FN_VIO0_D12, NULL);
  881. gpio_request(GPIO_FN_VIO0_D11, NULL);
  882. gpio_request(GPIO_FN_VIO0_D10, NULL);
  883. gpio_request(GPIO_FN_VIO0_D9, NULL);
  884. gpio_request(GPIO_FN_VIO0_D8, NULL);
  885. gpio_request(GPIO_FN_VIO0_D7, NULL);
  886. gpio_request(GPIO_FN_VIO0_D6, NULL);
  887. gpio_request(GPIO_FN_VIO0_D5, NULL);
  888. gpio_request(GPIO_FN_VIO0_D4, NULL);
  889. gpio_request(GPIO_FN_VIO0_D3, NULL);
  890. gpio_request(GPIO_FN_VIO0_D2, NULL);
  891. gpio_request(GPIO_FN_VIO0_D1, NULL);
  892. gpio_request(GPIO_FN_VIO0_D0, NULL);
  893. gpio_request(GPIO_FN_VIO0_VD, NULL);
  894. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  895. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  896. gpio_request(GPIO_FN_VIO0_HD, NULL);
  897. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  898. /* enable CEU1 */
  899. gpio_request(GPIO_FN_VIO1_D7, NULL);
  900. gpio_request(GPIO_FN_VIO1_D6, NULL);
  901. gpio_request(GPIO_FN_VIO1_D5, NULL);
  902. gpio_request(GPIO_FN_VIO1_D4, NULL);
  903. gpio_request(GPIO_FN_VIO1_D3, NULL);
  904. gpio_request(GPIO_FN_VIO1_D2, NULL);
  905. gpio_request(GPIO_FN_VIO1_D1, NULL);
  906. gpio_request(GPIO_FN_VIO1_D0, NULL);
  907. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  908. gpio_request(GPIO_FN_VIO1_HD, NULL);
  909. gpio_request(GPIO_FN_VIO1_VD, NULL);
  910. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  911. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  912. /* enable KEYSC */
  913. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  914. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  915. gpio_request(GPIO_FN_KEYOUT3, NULL);
  916. gpio_request(GPIO_FN_KEYOUT2, NULL);
  917. gpio_request(GPIO_FN_KEYOUT1, NULL);
  918. gpio_request(GPIO_FN_KEYOUT0, NULL);
  919. gpio_request(GPIO_FN_KEYIN0, NULL);
  920. /* enable user debug switch */
  921. gpio_request(GPIO_PTR0, NULL);
  922. gpio_request(GPIO_PTR4, NULL);
  923. gpio_request(GPIO_PTR5, NULL);
  924. gpio_request(GPIO_PTR6, NULL);
  925. gpio_direction_input(GPIO_PTR0);
  926. gpio_direction_input(GPIO_PTR4);
  927. gpio_direction_input(GPIO_PTR5);
  928. gpio_direction_input(GPIO_PTR6);
  929. #ifdef CONFIG_MFD_SH_MOBILE_SDHI
  930. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  931. gpio_request(GPIO_FN_SDHI0CD, NULL);
  932. gpio_request(GPIO_FN_SDHI0WP, NULL);
  933. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  934. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  935. gpio_request(GPIO_FN_SDHI0D3, NULL);
  936. gpio_request(GPIO_FN_SDHI0D2, NULL);
  937. gpio_request(GPIO_FN_SDHI0D1, NULL);
  938. gpio_request(GPIO_FN_SDHI0D0, NULL);
  939. gpio_request(GPIO_PTB6, NULL);
  940. gpio_direction_output(GPIO_PTB6, 0);
  941. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  942. gpio_request(GPIO_FN_SDHI1CD, NULL);
  943. gpio_request(GPIO_FN_SDHI1WP, NULL);
  944. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  945. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  946. gpio_request(GPIO_FN_SDHI1D3, NULL);
  947. gpio_request(GPIO_FN_SDHI1D2, NULL);
  948. gpio_request(GPIO_FN_SDHI1D1, NULL);
  949. gpio_request(GPIO_FN_SDHI1D0, NULL);
  950. gpio_request(GPIO_PTB7, NULL);
  951. gpio_direction_output(GPIO_PTB7, 0);
  952. /* I/O buffer drive ability is high for SDHI1 */
  953. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  954. #else
  955. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  956. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  957. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  958. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  959. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  960. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  961. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  962. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  963. gpio_request(GPIO_PTY6, NULL); /* write protect */
  964. gpio_direction_input(GPIO_PTY6);
  965. gpio_request(GPIO_PTY7, NULL); /* card detect */
  966. gpio_direction_input(GPIO_PTY7);
  967. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  968. #endif
  969. /* enable Video */
  970. gpio_request(GPIO_PTU2, NULL);
  971. gpio_direction_output(GPIO_PTU2, 1);
  972. /* enable Camera */
  973. gpio_request(GPIO_PTA3, NULL);
  974. gpio_request(GPIO_PTA4, NULL);
  975. gpio_direction_output(GPIO_PTA3, 0);
  976. gpio_direction_output(GPIO_PTA4, 0);
  977. /* enable FSI */
  978. gpio_request(GPIO_FN_FSIMCKB, NULL);
  979. gpio_request(GPIO_FN_FSIIBSD, NULL);
  980. gpio_request(GPIO_FN_FSIOBSD, NULL);
  981. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  982. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  983. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  984. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  985. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  986. /* change parent of FSI B */
  987. clk = clk_get(NULL, "fsib_clk");
  988. clk_register(&fsimckb_clk);
  989. clk_set_parent(clk, &fsimckb_clk);
  990. clk_set_rate(clk, 11000);
  991. clk_set_rate(&fsimckb_clk, 11000);
  992. clk_put(clk);
  993. gpio_request(GPIO_PTU0, NULL);
  994. gpio_direction_output(GPIO_PTU0, 0);
  995. mdelay(20);
  996. /* enable motion sensor */
  997. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  998. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  999. /* enable I2C device */
  1000. i2c_register_board_info(0, i2c0_devices,
  1001. ARRAY_SIZE(i2c0_devices));
  1002. i2c_register_board_info(1, i2c1_devices,
  1003. ARRAY_SIZE(i2c1_devices));
  1004. return platform_add_devices(ecovec_devices,
  1005. ARRAY_SIZE(ecovec_devices));
  1006. }
  1007. arch_initcall(arch_setup);
  1008. static int __init devices_setup(void)
  1009. {
  1010. sh_eth_init(&sh_eth_plat);
  1011. return 0;
  1012. }
  1013. device_initcall(devices_setup);
  1014. static struct sh_machine_vector mv_ecovec __initmv = {
  1015. .mv_name = "R0P7724 (EcoVec)",
  1016. };