timbuart.c 13 KB

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  1. /*
  2. * timbuart.c timberdale FPGA UART driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * Timberdale FPGA UART
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/kernel.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/ioport.h>
  27. #include <linux/slab.h>
  28. #include "timbuart.h"
  29. struct timbuart_port {
  30. struct uart_port port;
  31. struct tasklet_struct tasklet;
  32. int usedma;
  33. u32 last_ier;
  34. struct platform_device *dev;
  35. };
  36. static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
  37. 921600, 1843200, 3250000};
  38. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
  39. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
  40. static void timbuart_stop_rx(struct uart_port *port)
  41. {
  42. /* spin lock held by upper layer, disable all RX interrupts */
  43. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
  44. iowrite32(ier, port->membase + TIMBUART_IER);
  45. }
  46. static void timbuart_stop_tx(struct uart_port *port)
  47. {
  48. /* spinlock held by upper layer, disable TX interrupt */
  49. u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
  50. iowrite32(ier, port->membase + TIMBUART_IER);
  51. }
  52. static void timbuart_start_tx(struct uart_port *port)
  53. {
  54. struct timbuart_port *uart =
  55. container_of(port, struct timbuart_port, port);
  56. /* do not transfer anything here -> fire off the tasklet */
  57. tasklet_schedule(&uart->tasklet);
  58. }
  59. static void timbuart_flush_buffer(struct uart_port *port)
  60. {
  61. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;
  62. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  63. iowrite32(TXBF, port->membase + TIMBUART_ISR);
  64. }
  65. static void timbuart_rx_chars(struct uart_port *port)
  66. {
  67. struct tty_struct *tty = port->state->port.tty;
  68. while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
  69. u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
  70. port->icount.rx++;
  71. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  72. }
  73. spin_unlock(&port->lock);
  74. tty_flip_buffer_push(port->state->port.tty);
  75. spin_lock(&port->lock);
  76. dev_dbg(port->dev, "%s - total read %d bytes\n",
  77. __func__, port->icount.rx);
  78. }
  79. static void timbuart_tx_chars(struct uart_port *port)
  80. {
  81. struct circ_buf *xmit = &port->state->xmit;
  82. while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
  83. !uart_circ_empty(xmit)) {
  84. iowrite8(xmit->buf[xmit->tail],
  85. port->membase + TIMBUART_TXFIFO);
  86. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  87. port->icount.tx++;
  88. }
  89. dev_dbg(port->dev,
  90. "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
  91. __func__,
  92. port->icount.tx,
  93. ioread8(port->membase + TIMBUART_CTRL),
  94. port->mctrl & TIOCM_RTS,
  95. ioread8(port->membase + TIMBUART_BAUDRATE));
  96. }
  97. static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
  98. {
  99. struct timbuart_port *uart =
  100. container_of(port, struct timbuart_port, port);
  101. struct circ_buf *xmit = &port->state->xmit;
  102. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  103. return;
  104. if (port->x_char)
  105. return;
  106. if (isr & TXFLAGS) {
  107. timbuart_tx_chars(port);
  108. /* clear all TX interrupts */
  109. iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
  110. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  111. uart_write_wakeup(port);
  112. } else
  113. /* Re-enable any tx interrupt */
  114. *ier |= uart->last_ier & TXFLAGS;
  115. /* enable interrupts if there are chars in the transmit buffer,
  116. * Or if we delivered some bytes and want the almost empty interrupt
  117. * we wake up the upper layer later when we got the interrupt
  118. * to give it some time to go out...
  119. */
  120. if (!uart_circ_empty(xmit))
  121. *ier |= TXBAE;
  122. dev_dbg(port->dev, "%s - leaving\n", __func__);
  123. }
  124. void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
  125. {
  126. if (isr & RXFLAGS) {
  127. /* Some RX status is set */
  128. if (isr & RXBF) {
  129. u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
  130. TIMBUART_CTRL_FLSHRX;
  131. iowrite8(ctl, port->membase + TIMBUART_CTRL);
  132. port->icount.overrun++;
  133. } else if (isr & (RXDP))
  134. timbuart_rx_chars(port);
  135. /* ack all RX interrupts */
  136. iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
  137. }
  138. /* always have the RX interrupts enabled */
  139. *ier |= RXBAF | RXBF | RXTT;
  140. dev_dbg(port->dev, "%s - leaving\n", __func__);
  141. }
  142. void timbuart_tasklet(unsigned long arg)
  143. {
  144. struct timbuart_port *uart = (struct timbuart_port *)arg;
  145. u32 isr, ier = 0;
  146. spin_lock(&uart->port.lock);
  147. isr = ioread32(uart->port.membase + TIMBUART_ISR);
  148. dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
  149. if (!uart->usedma)
  150. timbuart_handle_tx_port(&uart->port, isr, &ier);
  151. timbuart_mctrl_check(&uart->port, isr, &ier);
  152. if (!uart->usedma)
  153. timbuart_handle_rx_port(&uart->port, isr, &ier);
  154. iowrite32(ier, uart->port.membase + TIMBUART_IER);
  155. spin_unlock(&uart->port.lock);
  156. dev_dbg(uart->port.dev, "%s leaving\n", __func__);
  157. }
  158. static unsigned int timbuart_tx_empty(struct uart_port *port)
  159. {
  160. u32 isr = ioread32(port->membase + TIMBUART_ISR);
  161. return (isr & TXBE) ? TIOCSER_TEMT : 0;
  162. }
  163. static unsigned int timbuart_get_mctrl(struct uart_port *port)
  164. {
  165. u8 cts = ioread8(port->membase + TIMBUART_CTRL);
  166. dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
  167. if (cts & TIMBUART_CTRL_CTS)
  168. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  169. else
  170. return TIOCM_DSR | TIOCM_CAR;
  171. }
  172. static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  173. {
  174. dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
  175. if (mctrl & TIOCM_RTS)
  176. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  177. else
  178. iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
  179. }
  180. static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
  181. {
  182. unsigned int cts;
  183. if (isr & CTS_DELTA) {
  184. /* ack */
  185. iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
  186. cts = timbuart_get_mctrl(port);
  187. uart_handle_cts_change(port, cts & TIOCM_CTS);
  188. wake_up_interruptible(&port->state->port.delta_msr_wait);
  189. }
  190. *ier |= CTS_DELTA;
  191. }
  192. static void timbuart_enable_ms(struct uart_port *port)
  193. {
  194. /* N/A */
  195. }
  196. static void timbuart_break_ctl(struct uart_port *port, int ctl)
  197. {
  198. /* N/A */
  199. }
  200. static int timbuart_startup(struct uart_port *port)
  201. {
  202. struct timbuart_port *uart =
  203. container_of(port, struct timbuart_port, port);
  204. dev_dbg(port->dev, "%s\n", __func__);
  205. iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
  206. iowrite32(0x1ff, port->membase + TIMBUART_ISR);
  207. /* Enable all but TX interrupts */
  208. iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
  209. port->membase + TIMBUART_IER);
  210. return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
  211. "timb-uart", uart);
  212. }
  213. static void timbuart_shutdown(struct uart_port *port)
  214. {
  215. struct timbuart_port *uart =
  216. container_of(port, struct timbuart_port, port);
  217. dev_dbg(port->dev, "%s\n", __func__);
  218. free_irq(port->irq, uart);
  219. iowrite32(0, port->membase + TIMBUART_IER);
  220. }
  221. static int get_bindex(int baud)
  222. {
  223. int i;
  224. for (i = 0; i < ARRAY_SIZE(baudrates); i++)
  225. if (baud <= baudrates[i])
  226. return i;
  227. return -1;
  228. }
  229. static void timbuart_set_termios(struct uart_port *port,
  230. struct ktermios *termios,
  231. struct ktermios *old)
  232. {
  233. unsigned int baud;
  234. short bindex;
  235. unsigned long flags;
  236. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  237. bindex = get_bindex(baud);
  238. dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
  239. if (bindex < 0)
  240. bindex = 0;
  241. baud = baudrates[bindex];
  242. /* The serial layer calls into this once with old = NULL when setting
  243. up initially */
  244. if (old)
  245. tty_termios_copy_hw(termios, old);
  246. tty_termios_encode_baud_rate(termios, baud, baud);
  247. spin_lock_irqsave(&port->lock, flags);
  248. iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
  249. uart_update_timeout(port, termios->c_cflag, baud);
  250. spin_unlock_irqrestore(&port->lock, flags);
  251. }
  252. static const char *timbuart_type(struct uart_port *port)
  253. {
  254. return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
  255. }
  256. /* We do not request/release mappings of the registers here,
  257. * currently it's done in the proble function.
  258. */
  259. static void timbuart_release_port(struct uart_port *port)
  260. {
  261. struct platform_device *pdev = to_platform_device(port->dev);
  262. int size =
  263. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  264. if (port->flags & UPF_IOREMAP) {
  265. iounmap(port->membase);
  266. port->membase = NULL;
  267. }
  268. release_mem_region(port->mapbase, size);
  269. }
  270. static int timbuart_request_port(struct uart_port *port)
  271. {
  272. struct platform_device *pdev = to_platform_device(port->dev);
  273. int size =
  274. resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
  275. if (!request_mem_region(port->mapbase, size, "timb-uart"))
  276. return -EBUSY;
  277. if (port->flags & UPF_IOREMAP) {
  278. port->membase = ioremap(port->mapbase, size);
  279. if (port->membase == NULL) {
  280. release_mem_region(port->mapbase, size);
  281. return -ENOMEM;
  282. }
  283. }
  284. return 0;
  285. }
  286. static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
  287. {
  288. struct timbuart_port *uart = (struct timbuart_port *)devid;
  289. if (ioread8(uart->port.membase + TIMBUART_IPR)) {
  290. uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
  291. /* disable interrupts, the tasklet enables them again */
  292. iowrite32(0, uart->port.membase + TIMBUART_IER);
  293. /* fire off bottom half */
  294. tasklet_schedule(&uart->tasklet);
  295. return IRQ_HANDLED;
  296. } else
  297. return IRQ_NONE;
  298. }
  299. /*
  300. * Configure/autoconfigure the port.
  301. */
  302. static void timbuart_config_port(struct uart_port *port, int flags)
  303. {
  304. if (flags & UART_CONFIG_TYPE) {
  305. port->type = PORT_TIMBUART;
  306. timbuart_request_port(port);
  307. }
  308. }
  309. static int timbuart_verify_port(struct uart_port *port,
  310. struct serial_struct *ser)
  311. {
  312. /* we don't want the core code to modify any port params */
  313. return -EINVAL;
  314. }
  315. static struct uart_ops timbuart_ops = {
  316. .tx_empty = timbuart_tx_empty,
  317. .set_mctrl = timbuart_set_mctrl,
  318. .get_mctrl = timbuart_get_mctrl,
  319. .stop_tx = timbuart_stop_tx,
  320. .start_tx = timbuart_start_tx,
  321. .flush_buffer = timbuart_flush_buffer,
  322. .stop_rx = timbuart_stop_rx,
  323. .enable_ms = timbuart_enable_ms,
  324. .break_ctl = timbuart_break_ctl,
  325. .startup = timbuart_startup,
  326. .shutdown = timbuart_shutdown,
  327. .set_termios = timbuart_set_termios,
  328. .type = timbuart_type,
  329. .release_port = timbuart_release_port,
  330. .request_port = timbuart_request_port,
  331. .config_port = timbuart_config_port,
  332. .verify_port = timbuart_verify_port
  333. };
  334. static struct uart_driver timbuart_driver = {
  335. .owner = THIS_MODULE,
  336. .driver_name = "timberdale_uart",
  337. .dev_name = "ttyTU",
  338. .major = TIMBUART_MAJOR,
  339. .minor = TIMBUART_MINOR,
  340. .nr = 1
  341. };
  342. static int timbuart_probe(struct platform_device *dev)
  343. {
  344. int err, irq;
  345. struct timbuart_port *uart;
  346. struct resource *iomem;
  347. dev_dbg(&dev->dev, "%s\n", __func__);
  348. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  349. if (!uart) {
  350. err = -EINVAL;
  351. goto err_mem;
  352. }
  353. uart->usedma = 0;
  354. uart->port.uartclk = 3250000 * 16;
  355. uart->port.fifosize = TIMBUART_FIFO_SIZE;
  356. uart->port.regshift = 2;
  357. uart->port.iotype = UPIO_MEM;
  358. uart->port.ops = &timbuart_ops;
  359. uart->port.irq = 0;
  360. uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
  361. uart->port.line = 0;
  362. uart->port.dev = &dev->dev;
  363. iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
  364. if (!iomem) {
  365. err = -ENOMEM;
  366. goto err_register;
  367. }
  368. uart->port.mapbase = iomem->start;
  369. uart->port.membase = NULL;
  370. irq = platform_get_irq(dev, 0);
  371. if (irq < 0) {
  372. err = -EINVAL;
  373. goto err_register;
  374. }
  375. uart->port.irq = irq;
  376. tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
  377. err = uart_register_driver(&timbuart_driver);
  378. if (err)
  379. goto err_register;
  380. err = uart_add_one_port(&timbuart_driver, &uart->port);
  381. if (err)
  382. goto err_add_port;
  383. platform_set_drvdata(dev, uart);
  384. return 0;
  385. err_add_port:
  386. uart_unregister_driver(&timbuart_driver);
  387. err_register:
  388. kfree(uart);
  389. err_mem:
  390. printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
  391. err);
  392. return err;
  393. }
  394. static int timbuart_remove(struct platform_device *dev)
  395. {
  396. struct timbuart_port *uart = platform_get_drvdata(dev);
  397. tasklet_kill(&uart->tasklet);
  398. uart_remove_one_port(&timbuart_driver, &uart->port);
  399. uart_unregister_driver(&timbuart_driver);
  400. kfree(uart);
  401. return 0;
  402. }
  403. static struct platform_driver timbuart_platform_driver = {
  404. .driver = {
  405. .name = "timb-uart",
  406. .owner = THIS_MODULE,
  407. },
  408. .probe = timbuart_probe,
  409. .remove = timbuart_remove,
  410. };
  411. /*--------------------------------------------------------------------------*/
  412. static int __init timbuart_init(void)
  413. {
  414. return platform_driver_register(&timbuart_platform_driver);
  415. }
  416. static void __exit timbuart_exit(void)
  417. {
  418. platform_driver_unregister(&timbuart_platform_driver);
  419. }
  420. module_init(timbuart_init);
  421. module_exit(timbuart_exit);
  422. MODULE_DESCRIPTION("Timberdale UART driver");
  423. MODULE_LICENSE("GPL v2");
  424. MODULE_ALIAS("platform:timb-uart");