qla_mbx.c 97 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/gfp.h>
  10. /*
  11. * qla2x00_mailbox_command
  12. * Issue mailbox command and waits for completion.
  13. *
  14. * Input:
  15. * ha = adapter block pointer.
  16. * mcp = driver internal mbx struct pointer.
  17. *
  18. * Output:
  19. * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  20. *
  21. * Returns:
  22. * 0 : QLA_SUCCESS = cmd performed success
  23. * 1 : QLA_FUNCTION_FAILED (error encountered)
  24. * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  25. *
  26. * Context:
  27. * Kernel context.
  28. */
  29. static int
  30. qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
  31. {
  32. int rval;
  33. unsigned long flags = 0;
  34. device_reg_t __iomem *reg;
  35. uint8_t abort_active;
  36. uint8_t io_lock_on;
  37. uint16_t command;
  38. uint16_t *iptr;
  39. uint16_t __iomem *optr;
  40. uint32_t cnt;
  41. uint32_t mboxes;
  42. unsigned long wait_time;
  43. struct qla_hw_data *ha = vha->hw;
  44. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  45. if (ha->pdev->error_state > pci_channel_io_frozen)
  46. return QLA_FUNCTION_TIMEOUT;
  47. reg = ha->iobase;
  48. io_lock_on = base_vha->flags.init_done;
  49. rval = QLA_SUCCESS;
  50. abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  51. DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
  52. if (ha->flags.pci_channel_io_perm_failure) {
  53. DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
  54. "Exiting.\n", __func__, vha->host_no));
  55. return QLA_FUNCTION_TIMEOUT;
  56. }
  57. /*
  58. * Wait for active mailbox commands to finish by waiting at most tov
  59. * seconds. This is to serialize actual issuing of mailbox cmds during
  60. * non ISP abort time.
  61. */
  62. if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  63. /* Timeout occurred. Return error. */
  64. DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
  65. "Exiting.\n", __func__, base_vha->host_no));
  66. return QLA_FUNCTION_TIMEOUT;
  67. }
  68. ha->flags.mbox_busy = 1;
  69. /* Save mailbox command for debug */
  70. ha->mcp = mcp;
  71. DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
  72. base_vha->host_no, mcp->mb[0]));
  73. spin_lock_irqsave(&ha->hardware_lock, flags);
  74. /* Load mailbox registers. */
  75. if (IS_FWI2_CAPABLE(ha))
  76. optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
  77. else
  78. optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
  79. iptr = mcp->mb;
  80. command = mcp->mb[0];
  81. mboxes = mcp->out_mb;
  82. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  83. if (IS_QLA2200(ha) && cnt == 8)
  84. optr =
  85. (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
  86. if (mboxes & BIT_0)
  87. WRT_REG_WORD(optr, *iptr);
  88. mboxes >>= 1;
  89. optr++;
  90. iptr++;
  91. }
  92. #if defined(QL_DEBUG_LEVEL_1)
  93. printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
  94. __func__, base_vha->host_no);
  95. qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
  96. printk("\n");
  97. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
  98. printk("\n");
  99. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
  100. printk("\n");
  101. printk("%s(%ld): I/O address = %p.\n", __func__, base_vha->host_no,
  102. optr);
  103. qla2x00_dump_regs(base_vha);
  104. #endif
  105. /* Issue set host interrupt command to send cmd out. */
  106. ha->flags.mbox_int = 0;
  107. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  108. /* Unlock mbx registers and wait for interrupt */
  109. DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
  110. "jiffies=%lx.\n", __func__, base_vha->host_no, jiffies));
  111. /* Wait for mbx cmd completion until timeout */
  112. if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
  113. set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  114. if (IS_FWI2_CAPABLE(ha))
  115. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  116. else
  117. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  118. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  119. wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
  120. clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  121. } else {
  122. DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
  123. base_vha->host_no, command));
  124. if (IS_FWI2_CAPABLE(ha))
  125. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  126. else
  127. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  128. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  129. wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
  130. while (!ha->flags.mbox_int) {
  131. if (time_after(jiffies, wait_time))
  132. break;
  133. /* Check for pending interrupts. */
  134. qla2x00_poll(ha->rsp_q_map[0]);
  135. if (!ha->flags.mbox_int &&
  136. !(IS_QLA2200(ha) &&
  137. command == MBC_LOAD_RISC_RAM_EXTENDED))
  138. msleep(10);
  139. } /* while */
  140. DEBUG17(qla_printk(KERN_WARNING, ha,
  141. "Waited %d sec\n",
  142. (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
  143. }
  144. /* Check whether we timed out */
  145. if (ha->flags.mbox_int) {
  146. uint16_t *iptr2;
  147. DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
  148. base_vha->host_no, command));
  149. /* Got interrupt. Clear the flag. */
  150. ha->flags.mbox_int = 0;
  151. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  152. if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
  153. rval = QLA_FUNCTION_FAILED;
  154. /* Load return mailbox registers. */
  155. iptr2 = mcp->mb;
  156. iptr = (uint16_t *)&ha->mailbox_out[0];
  157. mboxes = mcp->in_mb;
  158. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  159. if (mboxes & BIT_0)
  160. *iptr2 = *iptr;
  161. mboxes >>= 1;
  162. iptr2++;
  163. iptr++;
  164. }
  165. } else {
  166. #if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
  167. defined(QL_DEBUG_LEVEL_11)
  168. uint16_t mb0;
  169. uint32_t ictrl;
  170. if (IS_FWI2_CAPABLE(ha)) {
  171. mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
  172. ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
  173. } else {
  174. mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
  175. ictrl = RD_REG_WORD(&reg->isp.ictrl);
  176. }
  177. printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
  178. __func__, base_vha->host_no, command);
  179. printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
  180. base_vha->host_no, ictrl, jiffies);
  181. printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
  182. base_vha->host_no, mb0);
  183. qla2x00_dump_regs(base_vha);
  184. #endif
  185. rval = QLA_FUNCTION_TIMEOUT;
  186. }
  187. ha->flags.mbox_busy = 0;
  188. /* Clean up */
  189. ha->mcp = NULL;
  190. if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
  191. DEBUG11(printk("%s(%ld): checking for additional resp "
  192. "interrupt.\n", __func__, base_vha->host_no));
  193. /* polling mode for non isp_abort commands. */
  194. qla2x00_poll(ha->rsp_q_map[0]);
  195. }
  196. if (rval == QLA_FUNCTION_TIMEOUT &&
  197. mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
  198. if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
  199. ha->flags.eeh_busy) {
  200. /* not in dpc. schedule it for dpc to take over. */
  201. DEBUG(printk("%s(%ld): timeout schedule "
  202. "isp_abort_needed.\n", __func__,
  203. base_vha->host_no));
  204. DEBUG2_3_11(printk("%s(%ld): timeout schedule "
  205. "isp_abort_needed.\n", __func__,
  206. base_vha->host_no));
  207. qla_printk(KERN_WARNING, ha,
  208. "Mailbox command timeout occurred. Scheduling ISP "
  209. "abort. eeh_busy: 0x%x\n", ha->flags.eeh_busy);
  210. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  211. qla2xxx_wake_dpc(vha);
  212. } else if (!abort_active) {
  213. /* call abort directly since we are in the DPC thread */
  214. DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
  215. __func__, base_vha->host_no));
  216. DEBUG2_3_11(printk("%s(%ld): timeout calling "
  217. "abort_isp\n", __func__, base_vha->host_no));
  218. qla_printk(KERN_WARNING, ha,
  219. "Mailbox command timeout occurred. Issuing ISP "
  220. "abort.\n");
  221. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  222. clear_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  223. if (qla2x00_abort_isp(base_vha)) {
  224. /* Failed. retry later. */
  225. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  226. }
  227. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  228. DEBUG(printk("%s(%ld): finished abort_isp\n", __func__,
  229. base_vha->host_no));
  230. DEBUG2_3_11(printk("%s(%ld): finished abort_isp\n",
  231. __func__, base_vha->host_no));
  232. }
  233. }
  234. /* Allow next mbx cmd to come in. */
  235. complete(&ha->mbx_cmd_comp);
  236. if (rval) {
  237. DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
  238. "mbx2=%x, cmd=%x ****\n", __func__, base_vha->host_no,
  239. mcp->mb[0], mcp->mb[1], mcp->mb[2], command));
  240. } else {
  241. DEBUG11(printk("%s(%ld): done.\n", __func__,
  242. base_vha->host_no));
  243. }
  244. return rval;
  245. }
  246. int
  247. qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
  248. uint32_t risc_code_size)
  249. {
  250. int rval;
  251. struct qla_hw_data *ha = vha->hw;
  252. mbx_cmd_t mc;
  253. mbx_cmd_t *mcp = &mc;
  254. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  255. if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
  256. mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
  257. mcp->mb[8] = MSW(risc_addr);
  258. mcp->out_mb = MBX_8|MBX_0;
  259. } else {
  260. mcp->mb[0] = MBC_LOAD_RISC_RAM;
  261. mcp->out_mb = MBX_0;
  262. }
  263. mcp->mb[1] = LSW(risc_addr);
  264. mcp->mb[2] = MSW(req_dma);
  265. mcp->mb[3] = LSW(req_dma);
  266. mcp->mb[6] = MSW(MSD(req_dma));
  267. mcp->mb[7] = LSW(MSD(req_dma));
  268. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  269. if (IS_FWI2_CAPABLE(ha)) {
  270. mcp->mb[4] = MSW(risc_code_size);
  271. mcp->mb[5] = LSW(risc_code_size);
  272. mcp->out_mb |= MBX_5|MBX_4;
  273. } else {
  274. mcp->mb[4] = LSW(risc_code_size);
  275. mcp->out_mb |= MBX_4;
  276. }
  277. mcp->in_mb = MBX_0;
  278. mcp->tov = MBX_TOV_SECONDS;
  279. mcp->flags = 0;
  280. rval = qla2x00_mailbox_command(vha, mcp);
  281. if (rval != QLA_SUCCESS) {
  282. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  283. vha->host_no, rval, mcp->mb[0]));
  284. } else {
  285. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  286. }
  287. return rval;
  288. }
  289. #define EXTENDED_BB_CREDITS BIT_0
  290. /*
  291. * qla2x00_execute_fw
  292. * Start adapter firmware.
  293. *
  294. * Input:
  295. * ha = adapter block pointer.
  296. * TARGET_QUEUE_LOCK must be released.
  297. * ADAPTER_STATE_LOCK must be released.
  298. *
  299. * Returns:
  300. * qla2x00 local function return status code.
  301. *
  302. * Context:
  303. * Kernel context.
  304. */
  305. int
  306. qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
  307. {
  308. int rval;
  309. struct qla_hw_data *ha = vha->hw;
  310. mbx_cmd_t mc;
  311. mbx_cmd_t *mcp = &mc;
  312. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  313. mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
  314. mcp->out_mb = MBX_0;
  315. mcp->in_mb = MBX_0;
  316. if (IS_FWI2_CAPABLE(ha)) {
  317. mcp->mb[1] = MSW(risc_addr);
  318. mcp->mb[2] = LSW(risc_addr);
  319. mcp->mb[3] = 0;
  320. if (IS_QLA81XX(ha)) {
  321. struct nvram_81xx *nv = ha->nvram;
  322. mcp->mb[4] = (nv->enhanced_features &
  323. EXTENDED_BB_CREDITS);
  324. } else
  325. mcp->mb[4] = 0;
  326. mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
  327. mcp->in_mb |= MBX_1;
  328. } else {
  329. mcp->mb[1] = LSW(risc_addr);
  330. mcp->out_mb |= MBX_1;
  331. if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  332. mcp->mb[2] = 0;
  333. mcp->out_mb |= MBX_2;
  334. }
  335. }
  336. mcp->tov = MBX_TOV_SECONDS;
  337. mcp->flags = 0;
  338. rval = qla2x00_mailbox_command(vha, mcp);
  339. if (rval != QLA_SUCCESS) {
  340. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  341. vha->host_no, rval, mcp->mb[0]));
  342. } else {
  343. if (IS_FWI2_CAPABLE(ha)) {
  344. DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
  345. __func__, vha->host_no, mcp->mb[1]));
  346. } else {
  347. DEBUG11(printk("%s(%ld): done.\n", __func__,
  348. vha->host_no));
  349. }
  350. }
  351. return rval;
  352. }
  353. /*
  354. * qla2x00_get_fw_version
  355. * Get firmware version.
  356. *
  357. * Input:
  358. * ha: adapter state pointer.
  359. * major: pointer for major number.
  360. * minor: pointer for minor number.
  361. * subminor: pointer for subminor number.
  362. *
  363. * Returns:
  364. * qla2x00 local function return status code.
  365. *
  366. * Context:
  367. * Kernel context.
  368. */
  369. int
  370. qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
  371. uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
  372. uint32_t *mpi_caps, uint8_t *phy)
  373. {
  374. int rval;
  375. mbx_cmd_t mc;
  376. mbx_cmd_t *mcp = &mc;
  377. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  378. mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
  379. mcp->out_mb = MBX_0;
  380. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  381. if (IS_QLA81XX(vha->hw))
  382. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
  383. mcp->flags = 0;
  384. mcp->tov = MBX_TOV_SECONDS;
  385. rval = qla2x00_mailbox_command(vha, mcp);
  386. if (rval != QLA_SUCCESS)
  387. goto failed;
  388. /* Return mailbox data. */
  389. *major = mcp->mb[1];
  390. *minor = mcp->mb[2];
  391. *subminor = mcp->mb[3];
  392. *attributes = mcp->mb[6];
  393. if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
  394. *memory = 0x1FFFF; /* Defaults to 128KB. */
  395. else
  396. *memory = (mcp->mb[5] << 16) | mcp->mb[4];
  397. if (IS_QLA81XX(vha->hw)) {
  398. mpi[0] = mcp->mb[10] & 0xff;
  399. mpi[1] = mcp->mb[11] >> 8;
  400. mpi[2] = mcp->mb[11] & 0xff;
  401. *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13];
  402. phy[0] = mcp->mb[8] & 0xff;
  403. phy[1] = mcp->mb[9] >> 8;
  404. phy[2] = mcp->mb[9] & 0xff;
  405. }
  406. failed:
  407. if (rval != QLA_SUCCESS) {
  408. /*EMPTY*/
  409. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  410. vha->host_no, rval));
  411. } else {
  412. /*EMPTY*/
  413. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  414. }
  415. return rval;
  416. }
  417. /*
  418. * qla2x00_get_fw_options
  419. * Set firmware options.
  420. *
  421. * Input:
  422. * ha = adapter block pointer.
  423. * fwopt = pointer for firmware options.
  424. *
  425. * Returns:
  426. * qla2x00 local function return status code.
  427. *
  428. * Context:
  429. * Kernel context.
  430. */
  431. int
  432. qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  433. {
  434. int rval;
  435. mbx_cmd_t mc;
  436. mbx_cmd_t *mcp = &mc;
  437. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  438. mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
  439. mcp->out_mb = MBX_0;
  440. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  441. mcp->tov = MBX_TOV_SECONDS;
  442. mcp->flags = 0;
  443. rval = qla2x00_mailbox_command(vha, mcp);
  444. if (rval != QLA_SUCCESS) {
  445. /*EMPTY*/
  446. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  447. vha->host_no, rval));
  448. } else {
  449. fwopts[0] = mcp->mb[0];
  450. fwopts[1] = mcp->mb[1];
  451. fwopts[2] = mcp->mb[2];
  452. fwopts[3] = mcp->mb[3];
  453. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  454. }
  455. return rval;
  456. }
  457. /*
  458. * qla2x00_set_fw_options
  459. * Set firmware options.
  460. *
  461. * Input:
  462. * ha = adapter block pointer.
  463. * fwopt = pointer for firmware options.
  464. *
  465. * Returns:
  466. * qla2x00 local function return status code.
  467. *
  468. * Context:
  469. * Kernel context.
  470. */
  471. int
  472. qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  473. {
  474. int rval;
  475. mbx_cmd_t mc;
  476. mbx_cmd_t *mcp = &mc;
  477. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  478. mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
  479. mcp->mb[1] = fwopts[1];
  480. mcp->mb[2] = fwopts[2];
  481. mcp->mb[3] = fwopts[3];
  482. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  483. mcp->in_mb = MBX_0;
  484. if (IS_FWI2_CAPABLE(vha->hw)) {
  485. mcp->in_mb |= MBX_1;
  486. } else {
  487. mcp->mb[10] = fwopts[10];
  488. mcp->mb[11] = fwopts[11];
  489. mcp->mb[12] = 0; /* Undocumented, but used */
  490. mcp->out_mb |= MBX_12|MBX_11|MBX_10;
  491. }
  492. mcp->tov = MBX_TOV_SECONDS;
  493. mcp->flags = 0;
  494. rval = qla2x00_mailbox_command(vha, mcp);
  495. fwopts[0] = mcp->mb[0];
  496. if (rval != QLA_SUCCESS) {
  497. /*EMPTY*/
  498. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
  499. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  500. } else {
  501. /*EMPTY*/
  502. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  503. }
  504. return rval;
  505. }
  506. /*
  507. * qla2x00_mbx_reg_test
  508. * Mailbox register wrap test.
  509. *
  510. * Input:
  511. * ha = adapter block pointer.
  512. * TARGET_QUEUE_LOCK must be released.
  513. * ADAPTER_STATE_LOCK must be released.
  514. *
  515. * Returns:
  516. * qla2x00 local function return status code.
  517. *
  518. * Context:
  519. * Kernel context.
  520. */
  521. int
  522. qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
  523. {
  524. int rval;
  525. mbx_cmd_t mc;
  526. mbx_cmd_t *mcp = &mc;
  527. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): entered.\n", vha->host_no));
  528. mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
  529. mcp->mb[1] = 0xAAAA;
  530. mcp->mb[2] = 0x5555;
  531. mcp->mb[3] = 0xAA55;
  532. mcp->mb[4] = 0x55AA;
  533. mcp->mb[5] = 0xA5A5;
  534. mcp->mb[6] = 0x5A5A;
  535. mcp->mb[7] = 0x2525;
  536. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  537. mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  538. mcp->tov = MBX_TOV_SECONDS;
  539. mcp->flags = 0;
  540. rval = qla2x00_mailbox_command(vha, mcp);
  541. if (rval == QLA_SUCCESS) {
  542. if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
  543. mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
  544. rval = QLA_FUNCTION_FAILED;
  545. if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
  546. mcp->mb[7] != 0x2525)
  547. rval = QLA_FUNCTION_FAILED;
  548. }
  549. if (rval != QLA_SUCCESS) {
  550. /*EMPTY*/
  551. DEBUG2_3_11(printk("qla2x00_mbx_reg_test(%ld): failed=%x.\n",
  552. vha->host_no, rval));
  553. } else {
  554. /*EMPTY*/
  555. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): done.\n",
  556. vha->host_no));
  557. }
  558. return rval;
  559. }
  560. /*
  561. * qla2x00_verify_checksum
  562. * Verify firmware checksum.
  563. *
  564. * Input:
  565. * ha = adapter block pointer.
  566. * TARGET_QUEUE_LOCK must be released.
  567. * ADAPTER_STATE_LOCK must be released.
  568. *
  569. * Returns:
  570. * qla2x00 local function return status code.
  571. *
  572. * Context:
  573. * Kernel context.
  574. */
  575. int
  576. qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
  577. {
  578. int rval;
  579. mbx_cmd_t mc;
  580. mbx_cmd_t *mcp = &mc;
  581. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  582. mcp->mb[0] = MBC_VERIFY_CHECKSUM;
  583. mcp->out_mb = MBX_0;
  584. mcp->in_mb = MBX_0;
  585. if (IS_FWI2_CAPABLE(vha->hw)) {
  586. mcp->mb[1] = MSW(risc_addr);
  587. mcp->mb[2] = LSW(risc_addr);
  588. mcp->out_mb |= MBX_2|MBX_1;
  589. mcp->in_mb |= MBX_2|MBX_1;
  590. } else {
  591. mcp->mb[1] = LSW(risc_addr);
  592. mcp->out_mb |= MBX_1;
  593. mcp->in_mb |= MBX_1;
  594. }
  595. mcp->tov = MBX_TOV_SECONDS;
  596. mcp->flags = 0;
  597. rval = qla2x00_mailbox_command(vha, mcp);
  598. if (rval != QLA_SUCCESS) {
  599. DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
  600. vha->host_no, rval, IS_FWI2_CAPABLE(vha->hw) ?
  601. (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));
  602. } else {
  603. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  604. }
  605. return rval;
  606. }
  607. /*
  608. * qla2x00_issue_iocb
  609. * Issue IOCB using mailbox command
  610. *
  611. * Input:
  612. * ha = adapter state pointer.
  613. * buffer = buffer pointer.
  614. * phys_addr = physical address of buffer.
  615. * size = size of buffer.
  616. * TARGET_QUEUE_LOCK must be released.
  617. * ADAPTER_STATE_LOCK must be released.
  618. *
  619. * Returns:
  620. * qla2x00 local function return status code.
  621. *
  622. * Context:
  623. * Kernel context.
  624. */
  625. static int
  626. qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
  627. dma_addr_t phys_addr, size_t size, uint32_t tov)
  628. {
  629. int rval;
  630. mbx_cmd_t mc;
  631. mbx_cmd_t *mcp = &mc;
  632. mcp->mb[0] = MBC_IOCB_COMMAND_A64;
  633. mcp->mb[1] = 0;
  634. mcp->mb[2] = MSW(phys_addr);
  635. mcp->mb[3] = LSW(phys_addr);
  636. mcp->mb[6] = MSW(MSD(phys_addr));
  637. mcp->mb[7] = LSW(MSD(phys_addr));
  638. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  639. mcp->in_mb = MBX_2|MBX_0;
  640. mcp->tov = tov;
  641. mcp->flags = 0;
  642. rval = qla2x00_mailbox_command(vha, mcp);
  643. if (rval != QLA_SUCCESS) {
  644. /*EMPTY*/
  645. DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
  646. vha->host_no, rval));
  647. } else {
  648. sts_entry_t *sts_entry = (sts_entry_t *) buffer;
  649. /* Mask reserved bits. */
  650. sts_entry->entry_status &=
  651. IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
  652. }
  653. return rval;
  654. }
  655. int
  656. qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
  657. size_t size)
  658. {
  659. return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
  660. MBX_TOV_SECONDS);
  661. }
  662. /*
  663. * qla2x00_abort_command
  664. * Abort command aborts a specified IOCB.
  665. *
  666. * Input:
  667. * ha = adapter block pointer.
  668. * sp = SB structure pointer.
  669. *
  670. * Returns:
  671. * qla2x00 local function return status code.
  672. *
  673. * Context:
  674. * Kernel context.
  675. */
  676. int
  677. qla2x00_abort_command(srb_t *sp)
  678. {
  679. unsigned long flags = 0;
  680. int rval;
  681. uint32_t handle = 0;
  682. mbx_cmd_t mc;
  683. mbx_cmd_t *mcp = &mc;
  684. fc_port_t *fcport = sp->fcport;
  685. scsi_qla_host_t *vha = fcport->vha;
  686. struct qla_hw_data *ha = vha->hw;
  687. struct req_que *req = vha->req;
  688. DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", vha->host_no));
  689. spin_lock_irqsave(&ha->hardware_lock, flags);
  690. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  691. if (req->outstanding_cmds[handle] == sp)
  692. break;
  693. }
  694. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  695. if (handle == MAX_OUTSTANDING_COMMANDS) {
  696. /* command not found */
  697. return QLA_FUNCTION_FAILED;
  698. }
  699. mcp->mb[0] = MBC_ABORT_COMMAND;
  700. if (HAS_EXTENDED_IDS(ha))
  701. mcp->mb[1] = fcport->loop_id;
  702. else
  703. mcp->mb[1] = fcport->loop_id << 8;
  704. mcp->mb[2] = (uint16_t)handle;
  705. mcp->mb[3] = (uint16_t)(handle >> 16);
  706. mcp->mb[6] = (uint16_t)sp->cmd->device->lun;
  707. mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  708. mcp->in_mb = MBX_0;
  709. mcp->tov = MBX_TOV_SECONDS;
  710. mcp->flags = 0;
  711. rval = qla2x00_mailbox_command(vha, mcp);
  712. if (rval != QLA_SUCCESS) {
  713. DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n",
  714. vha->host_no, rval));
  715. } else {
  716. DEBUG11(printk("qla2x00_abort_command(%ld): done.\n",
  717. vha->host_no));
  718. }
  719. return rval;
  720. }
  721. int
  722. qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  723. {
  724. int rval, rval2;
  725. mbx_cmd_t mc;
  726. mbx_cmd_t *mcp = &mc;
  727. scsi_qla_host_t *vha;
  728. struct req_que *req;
  729. struct rsp_que *rsp;
  730. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  731. l = l;
  732. vha = fcport->vha;
  733. req = vha->hw->req_q_map[tag];
  734. rsp = vha->hw->rsp_q_map[tag];
  735. mcp->mb[0] = MBC_ABORT_TARGET;
  736. mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
  737. if (HAS_EXTENDED_IDS(vha->hw)) {
  738. mcp->mb[1] = fcport->loop_id;
  739. mcp->mb[10] = 0;
  740. mcp->out_mb |= MBX_10;
  741. } else {
  742. mcp->mb[1] = fcport->loop_id << 8;
  743. }
  744. mcp->mb[2] = vha->hw->loop_reset_delay;
  745. mcp->mb[9] = vha->vp_idx;
  746. mcp->in_mb = MBX_0;
  747. mcp->tov = MBX_TOV_SECONDS;
  748. mcp->flags = 0;
  749. rval = qla2x00_mailbox_command(vha, mcp);
  750. if (rval != QLA_SUCCESS) {
  751. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  752. vha->host_no, rval));
  753. }
  754. /* Issue marker IOCB. */
  755. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
  756. MK_SYNC_ID);
  757. if (rval2 != QLA_SUCCESS) {
  758. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  759. "(%x).\n", __func__, vha->host_no, rval2));
  760. } else {
  761. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  762. }
  763. return rval;
  764. }
  765. int
  766. qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  767. {
  768. int rval, rval2;
  769. mbx_cmd_t mc;
  770. mbx_cmd_t *mcp = &mc;
  771. scsi_qla_host_t *vha;
  772. struct req_que *req;
  773. struct rsp_que *rsp;
  774. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  775. vha = fcport->vha;
  776. req = vha->hw->req_q_map[tag];
  777. rsp = vha->hw->rsp_q_map[tag];
  778. mcp->mb[0] = MBC_LUN_RESET;
  779. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  780. if (HAS_EXTENDED_IDS(vha->hw))
  781. mcp->mb[1] = fcport->loop_id;
  782. else
  783. mcp->mb[1] = fcport->loop_id << 8;
  784. mcp->mb[2] = l;
  785. mcp->mb[3] = 0;
  786. mcp->mb[9] = vha->vp_idx;
  787. mcp->in_mb = MBX_0;
  788. mcp->tov = MBX_TOV_SECONDS;
  789. mcp->flags = 0;
  790. rval = qla2x00_mailbox_command(vha, mcp);
  791. if (rval != QLA_SUCCESS) {
  792. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  793. vha->host_no, rval));
  794. }
  795. /* Issue marker IOCB. */
  796. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  797. MK_SYNC_ID_LUN);
  798. if (rval2 != QLA_SUCCESS) {
  799. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  800. "(%x).\n", __func__, vha->host_no, rval2));
  801. } else {
  802. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  803. }
  804. return rval;
  805. }
  806. /*
  807. * qla2x00_get_adapter_id
  808. * Get adapter ID and topology.
  809. *
  810. * Input:
  811. * ha = adapter block pointer.
  812. * id = pointer for loop ID.
  813. * al_pa = pointer for AL_PA.
  814. * area = pointer for area.
  815. * domain = pointer for domain.
  816. * top = pointer for topology.
  817. * TARGET_QUEUE_LOCK must be released.
  818. * ADAPTER_STATE_LOCK must be released.
  819. *
  820. * Returns:
  821. * qla2x00 local function return status code.
  822. *
  823. * Context:
  824. * Kernel context.
  825. */
  826. int
  827. qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
  828. uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
  829. {
  830. int rval;
  831. mbx_cmd_t mc;
  832. mbx_cmd_t *mcp = &mc;
  833. DEBUG11(printk("qla2x00_get_adapter_id(%ld): entered.\n",
  834. vha->host_no));
  835. mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
  836. mcp->mb[9] = vha->vp_idx;
  837. mcp->out_mb = MBX_9|MBX_0;
  838. mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  839. if (IS_QLA81XX(vha->hw))
  840. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
  841. mcp->tov = MBX_TOV_SECONDS;
  842. mcp->flags = 0;
  843. rval = qla2x00_mailbox_command(vha, mcp);
  844. if (mcp->mb[0] == MBS_COMMAND_ERROR)
  845. rval = QLA_COMMAND_ERROR;
  846. else if (mcp->mb[0] == MBS_INVALID_COMMAND)
  847. rval = QLA_INVALID_COMMAND;
  848. /* Return data. */
  849. *id = mcp->mb[1];
  850. *al_pa = LSB(mcp->mb[2]);
  851. *area = MSB(mcp->mb[2]);
  852. *domain = LSB(mcp->mb[3]);
  853. *top = mcp->mb[6];
  854. *sw_cap = mcp->mb[7];
  855. if (rval != QLA_SUCCESS) {
  856. /*EMPTY*/
  857. DEBUG2_3_11(printk("qla2x00_get_adapter_id(%ld): failed=%x.\n",
  858. vha->host_no, rval));
  859. } else {
  860. DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n",
  861. vha->host_no));
  862. if (IS_QLA81XX(vha->hw)) {
  863. vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
  864. vha->fcoe_fcf_idx = mcp->mb[10];
  865. vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
  866. vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
  867. vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
  868. vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
  869. vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
  870. vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
  871. }
  872. }
  873. return rval;
  874. }
  875. /*
  876. * qla2x00_get_retry_cnt
  877. * Get current firmware login retry count and delay.
  878. *
  879. * Input:
  880. * ha = adapter block pointer.
  881. * retry_cnt = pointer to login retry count.
  882. * tov = pointer to login timeout value.
  883. *
  884. * Returns:
  885. * qla2x00 local function return status code.
  886. *
  887. * Context:
  888. * Kernel context.
  889. */
  890. int
  891. qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
  892. uint16_t *r_a_tov)
  893. {
  894. int rval;
  895. uint16_t ratov;
  896. mbx_cmd_t mc;
  897. mbx_cmd_t *mcp = &mc;
  898. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): entered.\n",
  899. vha->host_no));
  900. mcp->mb[0] = MBC_GET_RETRY_COUNT;
  901. mcp->out_mb = MBX_0;
  902. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  903. mcp->tov = MBX_TOV_SECONDS;
  904. mcp->flags = 0;
  905. rval = qla2x00_mailbox_command(vha, mcp);
  906. if (rval != QLA_SUCCESS) {
  907. /*EMPTY*/
  908. DEBUG2_3_11(printk("qla2x00_get_retry_cnt(%ld): failed = %x.\n",
  909. vha->host_no, mcp->mb[0]));
  910. } else {
  911. /* Convert returned data and check our values. */
  912. *r_a_tov = mcp->mb[3] / 2;
  913. ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
  914. if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
  915. /* Update to the larger values */
  916. *retry_cnt = (uint8_t)mcp->mb[1];
  917. *tov = ratov;
  918. }
  919. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): done. mb3=%d "
  920. "ratov=%d.\n", vha->host_no, mcp->mb[3], ratov));
  921. }
  922. return rval;
  923. }
  924. /*
  925. * qla2x00_init_firmware
  926. * Initialize adapter firmware.
  927. *
  928. * Input:
  929. * ha = adapter block pointer.
  930. * dptr = Initialization control block pointer.
  931. * size = size of initialization control block.
  932. * TARGET_QUEUE_LOCK must be released.
  933. * ADAPTER_STATE_LOCK must be released.
  934. *
  935. * Returns:
  936. * qla2x00 local function return status code.
  937. *
  938. * Context:
  939. * Kernel context.
  940. */
  941. int
  942. qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
  943. {
  944. int rval;
  945. mbx_cmd_t mc;
  946. mbx_cmd_t *mcp = &mc;
  947. struct qla_hw_data *ha = vha->hw;
  948. DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n",
  949. vha->host_no));
  950. if (ha->flags.npiv_supported)
  951. mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
  952. else
  953. mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
  954. mcp->mb[1] = 0;
  955. mcp->mb[2] = MSW(ha->init_cb_dma);
  956. mcp->mb[3] = LSW(ha->init_cb_dma);
  957. mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
  958. mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
  959. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  960. if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
  961. mcp->mb[1] = BIT_0;
  962. mcp->mb[10] = MSW(ha->ex_init_cb_dma);
  963. mcp->mb[11] = LSW(ha->ex_init_cb_dma);
  964. mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
  965. mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
  966. mcp->mb[14] = sizeof(*ha->ex_init_cb);
  967. mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
  968. }
  969. mcp->in_mb = MBX_0;
  970. mcp->buf_size = size;
  971. mcp->flags = MBX_DMA_OUT;
  972. mcp->tov = MBX_TOV_SECONDS;
  973. rval = qla2x00_mailbox_command(vha, mcp);
  974. if (rval != QLA_SUCCESS) {
  975. /*EMPTY*/
  976. DEBUG2_3_11(printk("qla2x00_init_firmware(%ld): failed=%x "
  977. "mb0=%x.\n",
  978. vha->host_no, rval, mcp->mb[0]));
  979. } else {
  980. /*EMPTY*/
  981. DEBUG11(printk("qla2x00_init_firmware(%ld): done.\n",
  982. vha->host_no));
  983. }
  984. return rval;
  985. }
  986. /*
  987. * qla2x00_get_port_database
  988. * Issue normal/enhanced get port database mailbox command
  989. * and copy device name as necessary.
  990. *
  991. * Input:
  992. * ha = adapter state pointer.
  993. * dev = structure pointer.
  994. * opt = enhanced cmd option byte.
  995. *
  996. * Returns:
  997. * qla2x00 local function return status code.
  998. *
  999. * Context:
  1000. * Kernel context.
  1001. */
  1002. int
  1003. qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
  1004. {
  1005. int rval;
  1006. mbx_cmd_t mc;
  1007. mbx_cmd_t *mcp = &mc;
  1008. port_database_t *pd;
  1009. struct port_database_24xx *pd24;
  1010. dma_addr_t pd_dma;
  1011. struct qla_hw_data *ha = vha->hw;
  1012. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1013. pd24 = NULL;
  1014. pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
  1015. if (pd == NULL) {
  1016. DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
  1017. "structure.\n", __func__, vha->host_no));
  1018. return QLA_MEMORY_ALLOC_FAILED;
  1019. }
  1020. memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
  1021. mcp->mb[0] = MBC_GET_PORT_DATABASE;
  1022. if (opt != 0 && !IS_FWI2_CAPABLE(ha))
  1023. mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
  1024. mcp->mb[2] = MSW(pd_dma);
  1025. mcp->mb[3] = LSW(pd_dma);
  1026. mcp->mb[6] = MSW(MSD(pd_dma));
  1027. mcp->mb[7] = LSW(MSD(pd_dma));
  1028. mcp->mb[9] = vha->vp_idx;
  1029. mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1030. mcp->in_mb = MBX_0;
  1031. if (IS_FWI2_CAPABLE(ha)) {
  1032. mcp->mb[1] = fcport->loop_id;
  1033. mcp->mb[10] = opt;
  1034. mcp->out_mb |= MBX_10|MBX_1;
  1035. mcp->in_mb |= MBX_1;
  1036. } else if (HAS_EXTENDED_IDS(ha)) {
  1037. mcp->mb[1] = fcport->loop_id;
  1038. mcp->mb[10] = opt;
  1039. mcp->out_mb |= MBX_10|MBX_1;
  1040. } else {
  1041. mcp->mb[1] = fcport->loop_id << 8 | opt;
  1042. mcp->out_mb |= MBX_1;
  1043. }
  1044. mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
  1045. PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
  1046. mcp->flags = MBX_DMA_IN;
  1047. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1048. rval = qla2x00_mailbox_command(vha, mcp);
  1049. if (rval != QLA_SUCCESS)
  1050. goto gpd_error_out;
  1051. if (IS_FWI2_CAPABLE(ha)) {
  1052. pd24 = (struct port_database_24xx *) pd;
  1053. /* Check for logged in state. */
  1054. if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
  1055. pd24->last_login_state != PDS_PRLI_COMPLETE) {
  1056. DEBUG2(printk("%s(%ld): Unable to verify "
  1057. "login-state (%x/%x) for loop_id %x\n",
  1058. __func__, vha->host_no,
  1059. pd24->current_login_state,
  1060. pd24->last_login_state, fcport->loop_id));
  1061. rval = QLA_FUNCTION_FAILED;
  1062. goto gpd_error_out;
  1063. }
  1064. /* Names are little-endian. */
  1065. memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
  1066. memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
  1067. /* Get port_id of device. */
  1068. fcport->d_id.b.domain = pd24->port_id[0];
  1069. fcport->d_id.b.area = pd24->port_id[1];
  1070. fcport->d_id.b.al_pa = pd24->port_id[2];
  1071. fcport->d_id.b.rsvd_1 = 0;
  1072. /* If not target must be initiator or unknown type. */
  1073. if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
  1074. fcport->port_type = FCT_INITIATOR;
  1075. else
  1076. fcport->port_type = FCT_TARGET;
  1077. } else {
  1078. /* Check for logged in state. */
  1079. if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
  1080. pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
  1081. rval = QLA_FUNCTION_FAILED;
  1082. goto gpd_error_out;
  1083. }
  1084. /* Names are little-endian. */
  1085. memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
  1086. memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
  1087. /* Get port_id of device. */
  1088. fcport->d_id.b.domain = pd->port_id[0];
  1089. fcport->d_id.b.area = pd->port_id[3];
  1090. fcport->d_id.b.al_pa = pd->port_id[2];
  1091. fcport->d_id.b.rsvd_1 = 0;
  1092. /* If not target must be initiator or unknown type. */
  1093. if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
  1094. fcport->port_type = FCT_INITIATOR;
  1095. else
  1096. fcport->port_type = FCT_TARGET;
  1097. /* Passback COS information. */
  1098. fcport->supported_classes = (pd->options & BIT_4) ?
  1099. FC_COS_CLASS2: FC_COS_CLASS3;
  1100. }
  1101. gpd_error_out:
  1102. dma_pool_free(ha->s_dma_pool, pd, pd_dma);
  1103. if (rval != QLA_SUCCESS) {
  1104. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  1105. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1106. } else {
  1107. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1108. }
  1109. return rval;
  1110. }
  1111. /*
  1112. * qla2x00_get_firmware_state
  1113. * Get adapter firmware state.
  1114. *
  1115. * Input:
  1116. * ha = adapter block pointer.
  1117. * dptr = pointer for firmware state.
  1118. * TARGET_QUEUE_LOCK must be released.
  1119. * ADAPTER_STATE_LOCK must be released.
  1120. *
  1121. * Returns:
  1122. * qla2x00 local function return status code.
  1123. *
  1124. * Context:
  1125. * Kernel context.
  1126. */
  1127. int
  1128. qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
  1129. {
  1130. int rval;
  1131. mbx_cmd_t mc;
  1132. mbx_cmd_t *mcp = &mc;
  1133. DEBUG11(printk("qla2x00_get_firmware_state(%ld): entered.\n",
  1134. vha->host_no));
  1135. mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
  1136. mcp->out_mb = MBX_0;
  1137. if (IS_FWI2_CAPABLE(vha->hw))
  1138. mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  1139. else
  1140. mcp->in_mb = MBX_1|MBX_0;
  1141. mcp->tov = MBX_TOV_SECONDS;
  1142. mcp->flags = 0;
  1143. rval = qla2x00_mailbox_command(vha, mcp);
  1144. /* Return firmware states. */
  1145. states[0] = mcp->mb[1];
  1146. if (IS_FWI2_CAPABLE(vha->hw)) {
  1147. states[1] = mcp->mb[2];
  1148. states[2] = mcp->mb[3];
  1149. states[3] = mcp->mb[4];
  1150. states[4] = mcp->mb[5];
  1151. }
  1152. if (rval != QLA_SUCCESS) {
  1153. /*EMPTY*/
  1154. DEBUG2_3_11(printk("qla2x00_get_firmware_state(%ld): "
  1155. "failed=%x.\n", vha->host_no, rval));
  1156. } else {
  1157. /*EMPTY*/
  1158. DEBUG11(printk("qla2x00_get_firmware_state(%ld): done.\n",
  1159. vha->host_no));
  1160. }
  1161. return rval;
  1162. }
  1163. /*
  1164. * qla2x00_get_port_name
  1165. * Issue get port name mailbox command.
  1166. * Returned name is in big endian format.
  1167. *
  1168. * Input:
  1169. * ha = adapter block pointer.
  1170. * loop_id = loop ID of device.
  1171. * name = pointer for name.
  1172. * TARGET_QUEUE_LOCK must be released.
  1173. * ADAPTER_STATE_LOCK must be released.
  1174. *
  1175. * Returns:
  1176. * qla2x00 local function return status code.
  1177. *
  1178. * Context:
  1179. * Kernel context.
  1180. */
  1181. int
  1182. qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
  1183. uint8_t opt)
  1184. {
  1185. int rval;
  1186. mbx_cmd_t mc;
  1187. mbx_cmd_t *mcp = &mc;
  1188. DEBUG11(printk("qla2x00_get_port_name(%ld): entered.\n",
  1189. vha->host_no));
  1190. mcp->mb[0] = MBC_GET_PORT_NAME;
  1191. mcp->mb[9] = vha->vp_idx;
  1192. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  1193. if (HAS_EXTENDED_IDS(vha->hw)) {
  1194. mcp->mb[1] = loop_id;
  1195. mcp->mb[10] = opt;
  1196. mcp->out_mb |= MBX_10;
  1197. } else {
  1198. mcp->mb[1] = loop_id << 8 | opt;
  1199. }
  1200. mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1201. mcp->tov = MBX_TOV_SECONDS;
  1202. mcp->flags = 0;
  1203. rval = qla2x00_mailbox_command(vha, mcp);
  1204. if (rval != QLA_SUCCESS) {
  1205. /*EMPTY*/
  1206. DEBUG2_3_11(printk("qla2x00_get_port_name(%ld): failed=%x.\n",
  1207. vha->host_no, rval));
  1208. } else {
  1209. if (name != NULL) {
  1210. /* This function returns name in big endian. */
  1211. name[0] = MSB(mcp->mb[2]);
  1212. name[1] = LSB(mcp->mb[2]);
  1213. name[2] = MSB(mcp->mb[3]);
  1214. name[3] = LSB(mcp->mb[3]);
  1215. name[4] = MSB(mcp->mb[6]);
  1216. name[5] = LSB(mcp->mb[6]);
  1217. name[6] = MSB(mcp->mb[7]);
  1218. name[7] = LSB(mcp->mb[7]);
  1219. }
  1220. DEBUG11(printk("qla2x00_get_port_name(%ld): done.\n",
  1221. vha->host_no));
  1222. }
  1223. return rval;
  1224. }
  1225. /*
  1226. * qla2x00_lip_reset
  1227. * Issue LIP reset mailbox command.
  1228. *
  1229. * Input:
  1230. * ha = adapter block pointer.
  1231. * TARGET_QUEUE_LOCK must be released.
  1232. * ADAPTER_STATE_LOCK must be released.
  1233. *
  1234. * Returns:
  1235. * qla2x00 local function return status code.
  1236. *
  1237. * Context:
  1238. * Kernel context.
  1239. */
  1240. int
  1241. qla2x00_lip_reset(scsi_qla_host_t *vha)
  1242. {
  1243. int rval;
  1244. mbx_cmd_t mc;
  1245. mbx_cmd_t *mcp = &mc;
  1246. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1247. if (IS_QLA81XX(vha->hw)) {
  1248. /* Logout across all FCFs. */
  1249. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1250. mcp->mb[1] = BIT_1;
  1251. mcp->mb[2] = 0;
  1252. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1253. } else if (IS_FWI2_CAPABLE(vha->hw)) {
  1254. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1255. mcp->mb[1] = BIT_6;
  1256. mcp->mb[2] = 0;
  1257. mcp->mb[3] = vha->hw->loop_reset_delay;
  1258. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1259. } else {
  1260. mcp->mb[0] = MBC_LIP_RESET;
  1261. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1262. if (HAS_EXTENDED_IDS(vha->hw)) {
  1263. mcp->mb[1] = 0x00ff;
  1264. mcp->mb[10] = 0;
  1265. mcp->out_mb |= MBX_10;
  1266. } else {
  1267. mcp->mb[1] = 0xff00;
  1268. }
  1269. mcp->mb[2] = vha->hw->loop_reset_delay;
  1270. mcp->mb[3] = 0;
  1271. }
  1272. mcp->in_mb = MBX_0;
  1273. mcp->tov = MBX_TOV_SECONDS;
  1274. mcp->flags = 0;
  1275. rval = qla2x00_mailbox_command(vha, mcp);
  1276. if (rval != QLA_SUCCESS) {
  1277. /*EMPTY*/
  1278. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
  1279. __func__, vha->host_no, rval));
  1280. } else {
  1281. /*EMPTY*/
  1282. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1283. }
  1284. return rval;
  1285. }
  1286. /*
  1287. * qla2x00_send_sns
  1288. * Send SNS command.
  1289. *
  1290. * Input:
  1291. * ha = adapter block pointer.
  1292. * sns = pointer for command.
  1293. * cmd_size = command size.
  1294. * buf_size = response/command size.
  1295. * TARGET_QUEUE_LOCK must be released.
  1296. * ADAPTER_STATE_LOCK must be released.
  1297. *
  1298. * Returns:
  1299. * qla2x00 local function return status code.
  1300. *
  1301. * Context:
  1302. * Kernel context.
  1303. */
  1304. int
  1305. qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
  1306. uint16_t cmd_size, size_t buf_size)
  1307. {
  1308. int rval;
  1309. mbx_cmd_t mc;
  1310. mbx_cmd_t *mcp = &mc;
  1311. DEBUG11(printk("qla2x00_send_sns(%ld): entered.\n",
  1312. vha->host_no));
  1313. DEBUG11(printk("qla2x00_send_sns: retry cnt=%d ratov=%d total "
  1314. "tov=%d.\n", vha->hw->retry_count, vha->hw->login_timeout,
  1315. mcp->tov));
  1316. mcp->mb[0] = MBC_SEND_SNS_COMMAND;
  1317. mcp->mb[1] = cmd_size;
  1318. mcp->mb[2] = MSW(sns_phys_address);
  1319. mcp->mb[3] = LSW(sns_phys_address);
  1320. mcp->mb[6] = MSW(MSD(sns_phys_address));
  1321. mcp->mb[7] = LSW(MSD(sns_phys_address));
  1322. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1323. mcp->in_mb = MBX_0|MBX_1;
  1324. mcp->buf_size = buf_size;
  1325. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
  1326. mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
  1327. rval = qla2x00_mailbox_command(vha, mcp);
  1328. if (rval != QLA_SUCCESS) {
  1329. /*EMPTY*/
  1330. DEBUG(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1331. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1332. DEBUG2_3_11(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1333. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1334. } else {
  1335. /*EMPTY*/
  1336. DEBUG11(printk("qla2x00_send_sns(%ld): done.\n", vha->host_no));
  1337. }
  1338. return rval;
  1339. }
  1340. int
  1341. qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1342. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1343. {
  1344. int rval;
  1345. struct logio_entry_24xx *lg;
  1346. dma_addr_t lg_dma;
  1347. uint32_t iop[2];
  1348. struct qla_hw_data *ha = vha->hw;
  1349. struct req_que *req;
  1350. struct rsp_que *rsp;
  1351. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1352. if (ha->flags.cpu_affinity_enabled)
  1353. req = ha->req_q_map[0];
  1354. else
  1355. req = vha->req;
  1356. rsp = req->rsp;
  1357. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1358. if (lg == NULL) {
  1359. DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
  1360. __func__, vha->host_no));
  1361. return QLA_MEMORY_ALLOC_FAILED;
  1362. }
  1363. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1364. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1365. lg->entry_count = 1;
  1366. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1367. lg->nport_handle = cpu_to_le16(loop_id);
  1368. lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
  1369. if (opt & BIT_0)
  1370. lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
  1371. if (opt & BIT_1)
  1372. lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
  1373. lg->port_id[0] = al_pa;
  1374. lg->port_id[1] = area;
  1375. lg->port_id[2] = domain;
  1376. lg->vp_index = vha->vp_idx;
  1377. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1378. if (rval != QLA_SUCCESS) {
  1379. DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
  1380. "(%x).\n", __func__, vha->host_no, rval));
  1381. } else if (lg->entry_status != 0) {
  1382. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1383. "-- error status (%x).\n", __func__, vha->host_no,
  1384. lg->entry_status));
  1385. rval = QLA_FUNCTION_FAILED;
  1386. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1387. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1388. iop[1] = le32_to_cpu(lg->io_parameter[1]);
  1389. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1390. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1391. vha->host_no, le16_to_cpu(lg->comp_status), iop[0],
  1392. iop[1]));
  1393. switch (iop[0]) {
  1394. case LSC_SCODE_PORTID_USED:
  1395. mb[0] = MBS_PORT_ID_USED;
  1396. mb[1] = LSW(iop[1]);
  1397. break;
  1398. case LSC_SCODE_NPORT_USED:
  1399. mb[0] = MBS_LOOP_ID_USED;
  1400. break;
  1401. case LSC_SCODE_NOLINK:
  1402. case LSC_SCODE_NOIOCB:
  1403. case LSC_SCODE_NOXCB:
  1404. case LSC_SCODE_CMD_FAILED:
  1405. case LSC_SCODE_NOFABRIC:
  1406. case LSC_SCODE_FW_NOT_READY:
  1407. case LSC_SCODE_NOT_LOGGED_IN:
  1408. case LSC_SCODE_NOPCB:
  1409. case LSC_SCODE_ELS_REJECT:
  1410. case LSC_SCODE_CMD_PARAM_ERR:
  1411. case LSC_SCODE_NONPORT:
  1412. case LSC_SCODE_LOGGED_IN:
  1413. case LSC_SCODE_NOFLOGI_ACC:
  1414. default:
  1415. mb[0] = MBS_COMMAND_ERROR;
  1416. break;
  1417. }
  1418. } else {
  1419. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1420. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1421. mb[0] = MBS_COMMAND_COMPLETE;
  1422. mb[1] = 0;
  1423. if (iop[0] & BIT_4) {
  1424. if (iop[0] & BIT_8)
  1425. mb[1] |= BIT_1;
  1426. } else
  1427. mb[1] = BIT_0;
  1428. /* Passback COS information. */
  1429. mb[10] = 0;
  1430. if (lg->io_parameter[7] || lg->io_parameter[8])
  1431. mb[10] |= BIT_0; /* Class 2. */
  1432. if (lg->io_parameter[9] || lg->io_parameter[10])
  1433. mb[10] |= BIT_1; /* Class 3. */
  1434. }
  1435. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1436. return rval;
  1437. }
  1438. /*
  1439. * qla2x00_login_fabric
  1440. * Issue login fabric port mailbox command.
  1441. *
  1442. * Input:
  1443. * ha = adapter block pointer.
  1444. * loop_id = device loop ID.
  1445. * domain = device domain.
  1446. * area = device area.
  1447. * al_pa = device AL_PA.
  1448. * status = pointer for return status.
  1449. * opt = command options.
  1450. * TARGET_QUEUE_LOCK must be released.
  1451. * ADAPTER_STATE_LOCK must be released.
  1452. *
  1453. * Returns:
  1454. * qla2x00 local function return status code.
  1455. *
  1456. * Context:
  1457. * Kernel context.
  1458. */
  1459. int
  1460. qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1461. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1462. {
  1463. int rval;
  1464. mbx_cmd_t mc;
  1465. mbx_cmd_t *mcp = &mc;
  1466. struct qla_hw_data *ha = vha->hw;
  1467. DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", vha->host_no));
  1468. mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
  1469. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1470. if (HAS_EXTENDED_IDS(ha)) {
  1471. mcp->mb[1] = loop_id;
  1472. mcp->mb[10] = opt;
  1473. mcp->out_mb |= MBX_10;
  1474. } else {
  1475. mcp->mb[1] = (loop_id << 8) | opt;
  1476. }
  1477. mcp->mb[2] = domain;
  1478. mcp->mb[3] = area << 8 | al_pa;
  1479. mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
  1480. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1481. mcp->flags = 0;
  1482. rval = qla2x00_mailbox_command(vha, mcp);
  1483. /* Return mailbox statuses. */
  1484. if (mb != NULL) {
  1485. mb[0] = mcp->mb[0];
  1486. mb[1] = mcp->mb[1];
  1487. mb[2] = mcp->mb[2];
  1488. mb[6] = mcp->mb[6];
  1489. mb[7] = mcp->mb[7];
  1490. /* COS retrieved from Get-Port-Database mailbox command. */
  1491. mb[10] = 0;
  1492. }
  1493. if (rval != QLA_SUCCESS) {
  1494. /* RLU tmp code: need to change main mailbox_command function to
  1495. * return ok even when the mailbox completion value is not
  1496. * SUCCESS. The caller needs to be responsible to interpret
  1497. * the return values of this mailbox command if we're not
  1498. * to change too much of the existing code.
  1499. */
  1500. if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
  1501. mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
  1502. mcp->mb[0] == 0x4006)
  1503. rval = QLA_SUCCESS;
  1504. /*EMPTY*/
  1505. DEBUG2_3_11(printk("qla2x00_login_fabric(%ld): failed=%x "
  1506. "mb[0]=%x mb[1]=%x mb[2]=%x.\n", vha->host_no, rval,
  1507. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  1508. } else {
  1509. /*EMPTY*/
  1510. DEBUG11(printk("qla2x00_login_fabric(%ld): done.\n",
  1511. vha->host_no));
  1512. }
  1513. return rval;
  1514. }
  1515. /*
  1516. * qla2x00_login_local_device
  1517. * Issue login loop port mailbox command.
  1518. *
  1519. * Input:
  1520. * ha = adapter block pointer.
  1521. * loop_id = device loop ID.
  1522. * opt = command options.
  1523. *
  1524. * Returns:
  1525. * Return status code.
  1526. *
  1527. * Context:
  1528. * Kernel context.
  1529. *
  1530. */
  1531. int
  1532. qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
  1533. uint16_t *mb_ret, uint8_t opt)
  1534. {
  1535. int rval;
  1536. mbx_cmd_t mc;
  1537. mbx_cmd_t *mcp = &mc;
  1538. struct qla_hw_data *ha = vha->hw;
  1539. if (IS_FWI2_CAPABLE(ha))
  1540. return qla24xx_login_fabric(vha, fcport->loop_id,
  1541. fcport->d_id.b.domain, fcport->d_id.b.area,
  1542. fcport->d_id.b.al_pa, mb_ret, opt);
  1543. DEBUG3(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1544. mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
  1545. if (HAS_EXTENDED_IDS(ha))
  1546. mcp->mb[1] = fcport->loop_id;
  1547. else
  1548. mcp->mb[1] = fcport->loop_id << 8;
  1549. mcp->mb[2] = opt;
  1550. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1551. mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
  1552. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1553. mcp->flags = 0;
  1554. rval = qla2x00_mailbox_command(vha, mcp);
  1555. /* Return mailbox statuses. */
  1556. if (mb_ret != NULL) {
  1557. mb_ret[0] = mcp->mb[0];
  1558. mb_ret[1] = mcp->mb[1];
  1559. mb_ret[6] = mcp->mb[6];
  1560. mb_ret[7] = mcp->mb[7];
  1561. }
  1562. if (rval != QLA_SUCCESS) {
  1563. /* AV tmp code: need to change main mailbox_command function to
  1564. * return ok even when the mailbox completion value is not
  1565. * SUCCESS. The caller needs to be responsible to interpret
  1566. * the return values of this mailbox command if we're not
  1567. * to change too much of the existing code.
  1568. */
  1569. if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
  1570. rval = QLA_SUCCESS;
  1571. DEBUG(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1572. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1573. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1574. DEBUG2_3(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1575. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1576. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1577. } else {
  1578. /*EMPTY*/
  1579. DEBUG3(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1580. }
  1581. return (rval);
  1582. }
  1583. int
  1584. qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1585. uint8_t area, uint8_t al_pa)
  1586. {
  1587. int rval;
  1588. struct logio_entry_24xx *lg;
  1589. dma_addr_t lg_dma;
  1590. struct qla_hw_data *ha = vha->hw;
  1591. struct req_que *req;
  1592. struct rsp_que *rsp;
  1593. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1594. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1595. if (lg == NULL) {
  1596. DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
  1597. __func__, vha->host_no));
  1598. return QLA_MEMORY_ALLOC_FAILED;
  1599. }
  1600. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1601. if (ql2xmaxqueues > 1)
  1602. req = ha->req_q_map[0];
  1603. else
  1604. req = vha->req;
  1605. rsp = req->rsp;
  1606. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1607. lg->entry_count = 1;
  1608. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1609. lg->nport_handle = cpu_to_le16(loop_id);
  1610. lg->control_flags =
  1611. __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1612. lg->port_id[0] = al_pa;
  1613. lg->port_id[1] = area;
  1614. lg->port_id[2] = domain;
  1615. lg->vp_index = vha->vp_idx;
  1616. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1617. if (rval != QLA_SUCCESS) {
  1618. DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
  1619. "(%x).\n", __func__, vha->host_no, rval));
  1620. } else if (lg->entry_status != 0) {
  1621. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1622. "-- error status (%x).\n", __func__, vha->host_no,
  1623. lg->entry_status));
  1624. rval = QLA_FUNCTION_FAILED;
  1625. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1626. DEBUG2_3_11(printk("%s(%ld %d): failed to complete IOCB "
  1627. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1628. vha->host_no, vha->vp_idx, le16_to_cpu(lg->comp_status),
  1629. le32_to_cpu(lg->io_parameter[0]),
  1630. le32_to_cpu(lg->io_parameter[1])));
  1631. } else {
  1632. /*EMPTY*/
  1633. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1634. }
  1635. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1636. return rval;
  1637. }
  1638. /*
  1639. * qla2x00_fabric_logout
  1640. * Issue logout fabric port mailbox command.
  1641. *
  1642. * Input:
  1643. * ha = adapter block pointer.
  1644. * loop_id = device loop ID.
  1645. * TARGET_QUEUE_LOCK must be released.
  1646. * ADAPTER_STATE_LOCK must be released.
  1647. *
  1648. * Returns:
  1649. * qla2x00 local function return status code.
  1650. *
  1651. * Context:
  1652. * Kernel context.
  1653. */
  1654. int
  1655. qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1656. uint8_t area, uint8_t al_pa)
  1657. {
  1658. int rval;
  1659. mbx_cmd_t mc;
  1660. mbx_cmd_t *mcp = &mc;
  1661. DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
  1662. vha->host_no));
  1663. mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
  1664. mcp->out_mb = MBX_1|MBX_0;
  1665. if (HAS_EXTENDED_IDS(vha->hw)) {
  1666. mcp->mb[1] = loop_id;
  1667. mcp->mb[10] = 0;
  1668. mcp->out_mb |= MBX_10;
  1669. } else {
  1670. mcp->mb[1] = loop_id << 8;
  1671. }
  1672. mcp->in_mb = MBX_1|MBX_0;
  1673. mcp->tov = MBX_TOV_SECONDS;
  1674. mcp->flags = 0;
  1675. rval = qla2x00_mailbox_command(vha, mcp);
  1676. if (rval != QLA_SUCCESS) {
  1677. /*EMPTY*/
  1678. DEBUG2_3_11(printk("qla2x00_fabric_logout(%ld): failed=%x "
  1679. "mbx1=%x.\n", vha->host_no, rval, mcp->mb[1]));
  1680. } else {
  1681. /*EMPTY*/
  1682. DEBUG11(printk("qla2x00_fabric_logout(%ld): done.\n",
  1683. vha->host_no));
  1684. }
  1685. return rval;
  1686. }
  1687. /*
  1688. * qla2x00_full_login_lip
  1689. * Issue full login LIP mailbox command.
  1690. *
  1691. * Input:
  1692. * ha = adapter block pointer.
  1693. * TARGET_QUEUE_LOCK must be released.
  1694. * ADAPTER_STATE_LOCK must be released.
  1695. *
  1696. * Returns:
  1697. * qla2x00 local function return status code.
  1698. *
  1699. * Context:
  1700. * Kernel context.
  1701. */
  1702. int
  1703. qla2x00_full_login_lip(scsi_qla_host_t *vha)
  1704. {
  1705. int rval;
  1706. mbx_cmd_t mc;
  1707. mbx_cmd_t *mcp = &mc;
  1708. DEBUG11(printk("qla2x00_full_login_lip(%ld): entered.\n",
  1709. vha->host_no));
  1710. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1711. mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
  1712. mcp->mb[2] = 0;
  1713. mcp->mb[3] = 0;
  1714. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1715. mcp->in_mb = MBX_0;
  1716. mcp->tov = MBX_TOV_SECONDS;
  1717. mcp->flags = 0;
  1718. rval = qla2x00_mailbox_command(vha, mcp);
  1719. if (rval != QLA_SUCCESS) {
  1720. /*EMPTY*/
  1721. DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
  1722. vha->host_no, rval));
  1723. } else {
  1724. /*EMPTY*/
  1725. DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
  1726. vha->host_no));
  1727. }
  1728. return rval;
  1729. }
  1730. /*
  1731. * qla2x00_get_id_list
  1732. *
  1733. * Input:
  1734. * ha = adapter block pointer.
  1735. *
  1736. * Returns:
  1737. * qla2x00 local function return status code.
  1738. *
  1739. * Context:
  1740. * Kernel context.
  1741. */
  1742. int
  1743. qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
  1744. uint16_t *entries)
  1745. {
  1746. int rval;
  1747. mbx_cmd_t mc;
  1748. mbx_cmd_t *mcp = &mc;
  1749. DEBUG11(printk("qla2x00_get_id_list(%ld): entered.\n",
  1750. vha->host_no));
  1751. if (id_list == NULL)
  1752. return QLA_FUNCTION_FAILED;
  1753. mcp->mb[0] = MBC_GET_ID_LIST;
  1754. mcp->out_mb = MBX_0;
  1755. if (IS_FWI2_CAPABLE(vha->hw)) {
  1756. mcp->mb[2] = MSW(id_list_dma);
  1757. mcp->mb[3] = LSW(id_list_dma);
  1758. mcp->mb[6] = MSW(MSD(id_list_dma));
  1759. mcp->mb[7] = LSW(MSD(id_list_dma));
  1760. mcp->mb[8] = 0;
  1761. mcp->mb[9] = vha->vp_idx;
  1762. mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
  1763. } else {
  1764. mcp->mb[1] = MSW(id_list_dma);
  1765. mcp->mb[2] = LSW(id_list_dma);
  1766. mcp->mb[3] = MSW(MSD(id_list_dma));
  1767. mcp->mb[6] = LSW(MSD(id_list_dma));
  1768. mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
  1769. }
  1770. mcp->in_mb = MBX_1|MBX_0;
  1771. mcp->tov = MBX_TOV_SECONDS;
  1772. mcp->flags = 0;
  1773. rval = qla2x00_mailbox_command(vha, mcp);
  1774. if (rval != QLA_SUCCESS) {
  1775. /*EMPTY*/
  1776. DEBUG2_3_11(printk("qla2x00_get_id_list(%ld): failed=%x.\n",
  1777. vha->host_no, rval));
  1778. } else {
  1779. *entries = mcp->mb[1];
  1780. DEBUG11(printk("qla2x00_get_id_list(%ld): done.\n",
  1781. vha->host_no));
  1782. }
  1783. return rval;
  1784. }
  1785. /*
  1786. * qla2x00_get_resource_cnts
  1787. * Get current firmware resource counts.
  1788. *
  1789. * Input:
  1790. * ha = adapter block pointer.
  1791. *
  1792. * Returns:
  1793. * qla2x00 local function return status code.
  1794. *
  1795. * Context:
  1796. * Kernel context.
  1797. */
  1798. int
  1799. qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
  1800. uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
  1801. uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
  1802. {
  1803. int rval;
  1804. mbx_cmd_t mc;
  1805. mbx_cmd_t *mcp = &mc;
  1806. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1807. mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
  1808. mcp->out_mb = MBX_0;
  1809. mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1810. if (IS_QLA81XX(vha->hw))
  1811. mcp->in_mb |= MBX_12;
  1812. mcp->tov = MBX_TOV_SECONDS;
  1813. mcp->flags = 0;
  1814. rval = qla2x00_mailbox_command(vha, mcp);
  1815. if (rval != QLA_SUCCESS) {
  1816. /*EMPTY*/
  1817. DEBUG2_3_11(printk("%s(%ld): failed = %x.\n", __func__,
  1818. vha->host_no, mcp->mb[0]));
  1819. } else {
  1820. DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
  1821. "mb7=%x mb10=%x mb11=%x mb12=%x.\n", __func__,
  1822. vha->host_no, mcp->mb[1], mcp->mb[2], mcp->mb[3],
  1823. mcp->mb[6], mcp->mb[7], mcp->mb[10], mcp->mb[11],
  1824. mcp->mb[12]));
  1825. if (cur_xchg_cnt)
  1826. *cur_xchg_cnt = mcp->mb[3];
  1827. if (orig_xchg_cnt)
  1828. *orig_xchg_cnt = mcp->mb[6];
  1829. if (cur_iocb_cnt)
  1830. *cur_iocb_cnt = mcp->mb[7];
  1831. if (orig_iocb_cnt)
  1832. *orig_iocb_cnt = mcp->mb[10];
  1833. if (vha->hw->flags.npiv_supported && max_npiv_vports)
  1834. *max_npiv_vports = mcp->mb[11];
  1835. if (IS_QLA81XX(vha->hw) && max_fcfs)
  1836. *max_fcfs = mcp->mb[12];
  1837. }
  1838. return (rval);
  1839. }
  1840. #if defined(QL_DEBUG_LEVEL_3)
  1841. /*
  1842. * qla2x00_get_fcal_position_map
  1843. * Get FCAL (LILP) position map using mailbox command
  1844. *
  1845. * Input:
  1846. * ha = adapter state pointer.
  1847. * pos_map = buffer pointer (can be NULL).
  1848. *
  1849. * Returns:
  1850. * qla2x00 local function return status code.
  1851. *
  1852. * Context:
  1853. * Kernel context.
  1854. */
  1855. int
  1856. qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
  1857. {
  1858. int rval;
  1859. mbx_cmd_t mc;
  1860. mbx_cmd_t *mcp = &mc;
  1861. char *pmap;
  1862. dma_addr_t pmap_dma;
  1863. struct qla_hw_data *ha = vha->hw;
  1864. pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
  1865. if (pmap == NULL) {
  1866. DEBUG2_3_11(printk("%s(%ld): **** Mem Alloc Failed ****",
  1867. __func__, vha->host_no));
  1868. return QLA_MEMORY_ALLOC_FAILED;
  1869. }
  1870. memset(pmap, 0, FCAL_MAP_SIZE);
  1871. mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
  1872. mcp->mb[2] = MSW(pmap_dma);
  1873. mcp->mb[3] = LSW(pmap_dma);
  1874. mcp->mb[6] = MSW(MSD(pmap_dma));
  1875. mcp->mb[7] = LSW(MSD(pmap_dma));
  1876. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1877. mcp->in_mb = MBX_1|MBX_0;
  1878. mcp->buf_size = FCAL_MAP_SIZE;
  1879. mcp->flags = MBX_DMA_IN;
  1880. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1881. rval = qla2x00_mailbox_command(vha, mcp);
  1882. if (rval == QLA_SUCCESS) {
  1883. DEBUG11(printk("%s(%ld): (mb0=%x/mb1=%x) FC/AL Position Map "
  1884. "size (%x)\n", __func__, vha->host_no, mcp->mb[0],
  1885. mcp->mb[1], (unsigned)pmap[0]));
  1886. DEBUG11(qla2x00_dump_buffer(pmap, pmap[0] + 1));
  1887. if (pos_map)
  1888. memcpy(pos_map, pmap, FCAL_MAP_SIZE);
  1889. }
  1890. dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
  1891. if (rval != QLA_SUCCESS) {
  1892. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1893. vha->host_no, rval));
  1894. } else {
  1895. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1896. }
  1897. return rval;
  1898. }
  1899. #endif
  1900. /*
  1901. * qla2x00_get_link_status
  1902. *
  1903. * Input:
  1904. * ha = adapter block pointer.
  1905. * loop_id = device loop ID.
  1906. * ret_buf = pointer to link status return buffer.
  1907. *
  1908. * Returns:
  1909. * 0 = success.
  1910. * BIT_0 = mem alloc error.
  1911. * BIT_1 = mailbox error.
  1912. */
  1913. int
  1914. qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
  1915. struct link_statistics *stats, dma_addr_t stats_dma)
  1916. {
  1917. int rval;
  1918. mbx_cmd_t mc;
  1919. mbx_cmd_t *mcp = &mc;
  1920. uint32_t *siter, *diter, dwords;
  1921. struct qla_hw_data *ha = vha->hw;
  1922. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1923. mcp->mb[0] = MBC_GET_LINK_STATUS;
  1924. mcp->mb[2] = MSW(stats_dma);
  1925. mcp->mb[3] = LSW(stats_dma);
  1926. mcp->mb[6] = MSW(MSD(stats_dma));
  1927. mcp->mb[7] = LSW(MSD(stats_dma));
  1928. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1929. mcp->in_mb = MBX_0;
  1930. if (IS_FWI2_CAPABLE(ha)) {
  1931. mcp->mb[1] = loop_id;
  1932. mcp->mb[4] = 0;
  1933. mcp->mb[10] = 0;
  1934. mcp->out_mb |= MBX_10|MBX_4|MBX_1;
  1935. mcp->in_mb |= MBX_1;
  1936. } else if (HAS_EXTENDED_IDS(ha)) {
  1937. mcp->mb[1] = loop_id;
  1938. mcp->mb[10] = 0;
  1939. mcp->out_mb |= MBX_10|MBX_1;
  1940. } else {
  1941. mcp->mb[1] = loop_id << 8;
  1942. mcp->out_mb |= MBX_1;
  1943. }
  1944. mcp->tov = MBX_TOV_SECONDS;
  1945. mcp->flags = IOCTL_CMD;
  1946. rval = qla2x00_mailbox_command(vha, mcp);
  1947. if (rval == QLA_SUCCESS) {
  1948. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1949. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1950. __func__, vha->host_no, mcp->mb[0]));
  1951. rval = QLA_FUNCTION_FAILED;
  1952. } else {
  1953. /* Copy over data -- firmware data is LE. */
  1954. dwords = offsetof(struct link_statistics, unused1) / 4;
  1955. siter = diter = &stats->link_fail_cnt;
  1956. while (dwords--)
  1957. *diter++ = le32_to_cpu(*siter++);
  1958. }
  1959. } else {
  1960. /* Failed. */
  1961. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1962. vha->host_no, rval));
  1963. }
  1964. return rval;
  1965. }
  1966. int
  1967. qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
  1968. dma_addr_t stats_dma)
  1969. {
  1970. int rval;
  1971. mbx_cmd_t mc;
  1972. mbx_cmd_t *mcp = &mc;
  1973. uint32_t *siter, *diter, dwords;
  1974. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1975. mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
  1976. mcp->mb[2] = MSW(stats_dma);
  1977. mcp->mb[3] = LSW(stats_dma);
  1978. mcp->mb[6] = MSW(MSD(stats_dma));
  1979. mcp->mb[7] = LSW(MSD(stats_dma));
  1980. mcp->mb[8] = sizeof(struct link_statistics) / 4;
  1981. mcp->mb[9] = vha->vp_idx;
  1982. mcp->mb[10] = 0;
  1983. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1984. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  1985. mcp->tov = MBX_TOV_SECONDS;
  1986. mcp->flags = IOCTL_CMD;
  1987. rval = qla2x00_mailbox_command(vha, mcp);
  1988. if (rval == QLA_SUCCESS) {
  1989. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1990. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1991. __func__, vha->host_no, mcp->mb[0]));
  1992. rval = QLA_FUNCTION_FAILED;
  1993. } else {
  1994. /* Copy over data -- firmware data is LE. */
  1995. dwords = sizeof(struct link_statistics) / 4;
  1996. siter = diter = &stats->link_fail_cnt;
  1997. while (dwords--)
  1998. *diter++ = le32_to_cpu(*siter++);
  1999. }
  2000. } else {
  2001. /* Failed. */
  2002. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2003. vha->host_no, rval));
  2004. }
  2005. return rval;
  2006. }
  2007. int
  2008. qla24xx_abort_command(srb_t *sp)
  2009. {
  2010. int rval;
  2011. unsigned long flags = 0;
  2012. struct abort_entry_24xx *abt;
  2013. dma_addr_t abt_dma;
  2014. uint32_t handle;
  2015. fc_port_t *fcport = sp->fcport;
  2016. struct scsi_qla_host *vha = fcport->vha;
  2017. struct qla_hw_data *ha = vha->hw;
  2018. struct req_que *req = vha->req;
  2019. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2020. spin_lock_irqsave(&ha->hardware_lock, flags);
  2021. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  2022. if (req->outstanding_cmds[handle] == sp)
  2023. break;
  2024. }
  2025. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2026. if (handle == MAX_OUTSTANDING_COMMANDS) {
  2027. /* Command not found. */
  2028. return QLA_FUNCTION_FAILED;
  2029. }
  2030. abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
  2031. if (abt == NULL) {
  2032. DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
  2033. __func__, vha->host_no));
  2034. return QLA_MEMORY_ALLOC_FAILED;
  2035. }
  2036. memset(abt, 0, sizeof(struct abort_entry_24xx));
  2037. abt->entry_type = ABORT_IOCB_TYPE;
  2038. abt->entry_count = 1;
  2039. abt->handle = MAKE_HANDLE(req->id, abt->handle);
  2040. abt->nport_handle = cpu_to_le16(fcport->loop_id);
  2041. abt->handle_to_abort = handle;
  2042. abt->port_id[0] = fcport->d_id.b.al_pa;
  2043. abt->port_id[1] = fcport->d_id.b.area;
  2044. abt->port_id[2] = fcport->d_id.b.domain;
  2045. abt->vp_index = fcport->vp_idx;
  2046. abt->req_que_no = cpu_to_le16(req->id);
  2047. rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
  2048. if (rval != QLA_SUCCESS) {
  2049. DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
  2050. __func__, vha->host_no, rval));
  2051. } else if (abt->entry_status != 0) {
  2052. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2053. "-- error status (%x).\n", __func__, vha->host_no,
  2054. abt->entry_status));
  2055. rval = QLA_FUNCTION_FAILED;
  2056. } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
  2057. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2058. "-- completion status (%x).\n", __func__, vha->host_no,
  2059. le16_to_cpu(abt->nport_handle)));
  2060. rval = QLA_FUNCTION_FAILED;
  2061. } else {
  2062. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2063. }
  2064. dma_pool_free(ha->s_dma_pool, abt, abt_dma);
  2065. return rval;
  2066. }
  2067. struct tsk_mgmt_cmd {
  2068. union {
  2069. struct tsk_mgmt_entry tsk;
  2070. struct sts_entry_24xx sts;
  2071. } p;
  2072. };
  2073. static int
  2074. __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
  2075. unsigned int l, int tag)
  2076. {
  2077. int rval, rval2;
  2078. struct tsk_mgmt_cmd *tsk;
  2079. struct sts_entry_24xx *sts;
  2080. dma_addr_t tsk_dma;
  2081. scsi_qla_host_t *vha;
  2082. struct qla_hw_data *ha;
  2083. struct req_que *req;
  2084. struct rsp_que *rsp;
  2085. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  2086. vha = fcport->vha;
  2087. ha = vha->hw;
  2088. req = vha->req;
  2089. if (ha->flags.cpu_affinity_enabled)
  2090. rsp = ha->rsp_q_map[tag + 1];
  2091. else
  2092. rsp = req->rsp;
  2093. tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
  2094. if (tsk == NULL) {
  2095. DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
  2096. "IOCB.\n", __func__, vha->host_no));
  2097. return QLA_MEMORY_ALLOC_FAILED;
  2098. }
  2099. memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
  2100. tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
  2101. tsk->p.tsk.entry_count = 1;
  2102. tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
  2103. tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
  2104. tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2105. tsk->p.tsk.control_flags = cpu_to_le32(type);
  2106. tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
  2107. tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
  2108. tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
  2109. tsk->p.tsk.vp_index = fcport->vp_idx;
  2110. if (type == TCF_LUN_RESET) {
  2111. int_to_scsilun(l, &tsk->p.tsk.lun);
  2112. host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
  2113. sizeof(tsk->p.tsk.lun));
  2114. }
  2115. sts = &tsk->p.sts;
  2116. rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
  2117. if (rval != QLA_SUCCESS) {
  2118. DEBUG2_3_11(printk("%s(%ld): failed to issue %s Reset IOCB "
  2119. "(%x).\n", __func__, vha->host_no, name, rval));
  2120. } else if (sts->entry_status != 0) {
  2121. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2122. "-- error status (%x).\n", __func__, vha->host_no,
  2123. sts->entry_status));
  2124. rval = QLA_FUNCTION_FAILED;
  2125. } else if (sts->comp_status !=
  2126. __constant_cpu_to_le16(CS_COMPLETE)) {
  2127. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2128. "-- completion status (%x).\n", __func__,
  2129. vha->host_no, le16_to_cpu(sts->comp_status)));
  2130. rval = QLA_FUNCTION_FAILED;
  2131. } else if (!(le16_to_cpu(sts->scsi_status) &
  2132. SS_RESPONSE_INFO_LEN_VALID)) {
  2133. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2134. "-- no response info (%x).\n", __func__, vha->host_no,
  2135. le16_to_cpu(sts->scsi_status)));
  2136. rval = QLA_FUNCTION_FAILED;
  2137. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  2138. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2139. "-- not enough response info (%d).\n", __func__,
  2140. vha->host_no, le32_to_cpu(sts->rsp_data_len)));
  2141. rval = QLA_FUNCTION_FAILED;
  2142. } else if (sts->data[3]) {
  2143. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2144. "-- response (%x).\n", __func__,
  2145. vha->host_no, sts->data[3]));
  2146. rval = QLA_FUNCTION_FAILED;
  2147. }
  2148. /* Issue marker IOCB. */
  2149. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  2150. type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
  2151. if (rval2 != QLA_SUCCESS) {
  2152. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  2153. "(%x).\n", __func__, vha->host_no, rval2));
  2154. } else {
  2155. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2156. }
  2157. dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
  2158. return rval;
  2159. }
  2160. int
  2161. qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  2162. {
  2163. return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
  2164. }
  2165. int
  2166. qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  2167. {
  2168. return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
  2169. }
  2170. int
  2171. qla2x00_system_error(scsi_qla_host_t *vha)
  2172. {
  2173. int rval;
  2174. mbx_cmd_t mc;
  2175. mbx_cmd_t *mcp = &mc;
  2176. struct qla_hw_data *ha = vha->hw;
  2177. if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
  2178. return QLA_FUNCTION_FAILED;
  2179. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2180. mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
  2181. mcp->out_mb = MBX_0;
  2182. mcp->in_mb = MBX_0;
  2183. mcp->tov = 5;
  2184. mcp->flags = 0;
  2185. rval = qla2x00_mailbox_command(vha, mcp);
  2186. if (rval != QLA_SUCCESS) {
  2187. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2188. vha->host_no, rval));
  2189. } else {
  2190. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2191. }
  2192. return rval;
  2193. }
  2194. /**
  2195. * qla2x00_set_serdes_params() -
  2196. * @ha: HA context
  2197. *
  2198. * Returns
  2199. */
  2200. int
  2201. qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
  2202. uint16_t sw_em_2g, uint16_t sw_em_4g)
  2203. {
  2204. int rval;
  2205. mbx_cmd_t mc;
  2206. mbx_cmd_t *mcp = &mc;
  2207. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2208. mcp->mb[0] = MBC_SERDES_PARAMS;
  2209. mcp->mb[1] = BIT_0;
  2210. mcp->mb[2] = sw_em_1g | BIT_15;
  2211. mcp->mb[3] = sw_em_2g | BIT_15;
  2212. mcp->mb[4] = sw_em_4g | BIT_15;
  2213. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2214. mcp->in_mb = MBX_0;
  2215. mcp->tov = MBX_TOV_SECONDS;
  2216. mcp->flags = 0;
  2217. rval = qla2x00_mailbox_command(vha, mcp);
  2218. if (rval != QLA_SUCCESS) {
  2219. /*EMPTY*/
  2220. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2221. vha->host_no, rval, mcp->mb[0]));
  2222. } else {
  2223. /*EMPTY*/
  2224. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2225. }
  2226. return rval;
  2227. }
  2228. int
  2229. qla2x00_stop_firmware(scsi_qla_host_t *vha)
  2230. {
  2231. int rval;
  2232. mbx_cmd_t mc;
  2233. mbx_cmd_t *mcp = &mc;
  2234. if (!IS_FWI2_CAPABLE(vha->hw))
  2235. return QLA_FUNCTION_FAILED;
  2236. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2237. mcp->mb[0] = MBC_STOP_FIRMWARE;
  2238. mcp->out_mb = MBX_0;
  2239. mcp->in_mb = MBX_0;
  2240. mcp->tov = 5;
  2241. mcp->flags = 0;
  2242. rval = qla2x00_mailbox_command(vha, mcp);
  2243. if (rval != QLA_SUCCESS) {
  2244. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2245. vha->host_no, rval));
  2246. if (mcp->mb[0] == MBS_INVALID_COMMAND)
  2247. rval = QLA_INVALID_COMMAND;
  2248. } else {
  2249. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2250. }
  2251. return rval;
  2252. }
  2253. int
  2254. qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
  2255. uint16_t buffers)
  2256. {
  2257. int rval;
  2258. mbx_cmd_t mc;
  2259. mbx_cmd_t *mcp = &mc;
  2260. if (!IS_FWI2_CAPABLE(vha->hw))
  2261. return QLA_FUNCTION_FAILED;
  2262. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2263. return QLA_FUNCTION_FAILED;
  2264. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2265. mcp->mb[0] = MBC_TRACE_CONTROL;
  2266. mcp->mb[1] = TC_EFT_ENABLE;
  2267. mcp->mb[2] = LSW(eft_dma);
  2268. mcp->mb[3] = MSW(eft_dma);
  2269. mcp->mb[4] = LSW(MSD(eft_dma));
  2270. mcp->mb[5] = MSW(MSD(eft_dma));
  2271. mcp->mb[6] = buffers;
  2272. mcp->mb[7] = TC_AEN_DISABLE;
  2273. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2274. mcp->in_mb = MBX_1|MBX_0;
  2275. mcp->tov = MBX_TOV_SECONDS;
  2276. mcp->flags = 0;
  2277. rval = qla2x00_mailbox_command(vha, mcp);
  2278. if (rval != QLA_SUCCESS) {
  2279. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2280. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2281. } else {
  2282. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2283. }
  2284. return rval;
  2285. }
  2286. int
  2287. qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
  2288. {
  2289. int rval;
  2290. mbx_cmd_t mc;
  2291. mbx_cmd_t *mcp = &mc;
  2292. if (!IS_FWI2_CAPABLE(vha->hw))
  2293. return QLA_FUNCTION_FAILED;
  2294. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2295. return QLA_FUNCTION_FAILED;
  2296. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2297. mcp->mb[0] = MBC_TRACE_CONTROL;
  2298. mcp->mb[1] = TC_EFT_DISABLE;
  2299. mcp->out_mb = MBX_1|MBX_0;
  2300. mcp->in_mb = MBX_1|MBX_0;
  2301. mcp->tov = MBX_TOV_SECONDS;
  2302. mcp->flags = 0;
  2303. rval = qla2x00_mailbox_command(vha, mcp);
  2304. if (rval != QLA_SUCCESS) {
  2305. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2306. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2307. } else {
  2308. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2309. }
  2310. return rval;
  2311. }
  2312. int
  2313. qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
  2314. uint16_t buffers, uint16_t *mb, uint32_t *dwords)
  2315. {
  2316. int rval;
  2317. mbx_cmd_t mc;
  2318. mbx_cmd_t *mcp = &mc;
  2319. if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
  2320. return QLA_FUNCTION_FAILED;
  2321. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2322. return QLA_FUNCTION_FAILED;
  2323. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2324. mcp->mb[0] = MBC_TRACE_CONTROL;
  2325. mcp->mb[1] = TC_FCE_ENABLE;
  2326. mcp->mb[2] = LSW(fce_dma);
  2327. mcp->mb[3] = MSW(fce_dma);
  2328. mcp->mb[4] = LSW(MSD(fce_dma));
  2329. mcp->mb[5] = MSW(MSD(fce_dma));
  2330. mcp->mb[6] = buffers;
  2331. mcp->mb[7] = TC_AEN_DISABLE;
  2332. mcp->mb[8] = 0;
  2333. mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
  2334. mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
  2335. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2336. MBX_1|MBX_0;
  2337. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2338. mcp->tov = MBX_TOV_SECONDS;
  2339. mcp->flags = 0;
  2340. rval = qla2x00_mailbox_command(vha, mcp);
  2341. if (rval != QLA_SUCCESS) {
  2342. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2343. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2344. } else {
  2345. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2346. if (mb)
  2347. memcpy(mb, mcp->mb, 8 * sizeof(*mb));
  2348. if (dwords)
  2349. *dwords = buffers;
  2350. }
  2351. return rval;
  2352. }
  2353. int
  2354. qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
  2355. {
  2356. int rval;
  2357. mbx_cmd_t mc;
  2358. mbx_cmd_t *mcp = &mc;
  2359. if (!IS_FWI2_CAPABLE(vha->hw))
  2360. return QLA_FUNCTION_FAILED;
  2361. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2362. return QLA_FUNCTION_FAILED;
  2363. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2364. mcp->mb[0] = MBC_TRACE_CONTROL;
  2365. mcp->mb[1] = TC_FCE_DISABLE;
  2366. mcp->mb[2] = TC_FCE_DISABLE_TRACE;
  2367. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  2368. mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2369. MBX_1|MBX_0;
  2370. mcp->tov = MBX_TOV_SECONDS;
  2371. mcp->flags = 0;
  2372. rval = qla2x00_mailbox_command(vha, mcp);
  2373. if (rval != QLA_SUCCESS) {
  2374. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2375. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2376. } else {
  2377. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2378. if (wr)
  2379. *wr = (uint64_t) mcp->mb[5] << 48 |
  2380. (uint64_t) mcp->mb[4] << 32 |
  2381. (uint64_t) mcp->mb[3] << 16 |
  2382. (uint64_t) mcp->mb[2];
  2383. if (rd)
  2384. *rd = (uint64_t) mcp->mb[9] << 48 |
  2385. (uint64_t) mcp->mb[8] << 32 |
  2386. (uint64_t) mcp->mb[7] << 16 |
  2387. (uint64_t) mcp->mb[6];
  2388. }
  2389. return rval;
  2390. }
  2391. int
  2392. qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint16_t addr,
  2393. uint16_t off, uint16_t count)
  2394. {
  2395. int rval;
  2396. mbx_cmd_t mc;
  2397. mbx_cmd_t *mcp = &mc;
  2398. if (!IS_FWI2_CAPABLE(vha->hw))
  2399. return QLA_FUNCTION_FAILED;
  2400. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2401. mcp->mb[0] = MBC_READ_SFP;
  2402. mcp->mb[1] = addr;
  2403. mcp->mb[2] = MSW(sfp_dma);
  2404. mcp->mb[3] = LSW(sfp_dma);
  2405. mcp->mb[6] = MSW(MSD(sfp_dma));
  2406. mcp->mb[7] = LSW(MSD(sfp_dma));
  2407. mcp->mb[8] = count;
  2408. mcp->mb[9] = off;
  2409. mcp->mb[10] = 0;
  2410. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  2411. mcp->in_mb = MBX_0;
  2412. mcp->tov = MBX_TOV_SECONDS;
  2413. mcp->flags = 0;
  2414. rval = qla2x00_mailbox_command(vha, mcp);
  2415. if (rval != QLA_SUCCESS) {
  2416. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2417. vha->host_no, rval, mcp->mb[0]));
  2418. } else {
  2419. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2420. }
  2421. return rval;
  2422. }
  2423. int
  2424. qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2425. uint16_t port_speed, uint16_t *mb)
  2426. {
  2427. int rval;
  2428. mbx_cmd_t mc;
  2429. mbx_cmd_t *mcp = &mc;
  2430. if (!IS_IIDMA_CAPABLE(vha->hw))
  2431. return QLA_FUNCTION_FAILED;
  2432. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2433. mcp->mb[0] = MBC_PORT_PARAMS;
  2434. mcp->mb[1] = loop_id;
  2435. mcp->mb[2] = BIT_0;
  2436. if (IS_QLA81XX(vha->hw))
  2437. mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
  2438. else
  2439. mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
  2440. mcp->mb[9] = vha->vp_idx;
  2441. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2442. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2443. mcp->tov = MBX_TOV_SECONDS;
  2444. mcp->flags = 0;
  2445. rval = qla2x00_mailbox_command(vha, mcp);
  2446. /* Return mailbox statuses. */
  2447. if (mb != NULL) {
  2448. mb[0] = mcp->mb[0];
  2449. mb[1] = mcp->mb[1];
  2450. mb[3] = mcp->mb[3];
  2451. }
  2452. if (rval != QLA_SUCCESS) {
  2453. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2454. vha->host_no, rval));
  2455. } else {
  2456. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2457. }
  2458. return rval;
  2459. }
  2460. void
  2461. qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
  2462. struct vp_rpt_id_entry_24xx *rptid_entry)
  2463. {
  2464. uint8_t vp_idx;
  2465. uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
  2466. struct qla_hw_data *ha = vha->hw;
  2467. scsi_qla_host_t *vp;
  2468. scsi_qla_host_t *tvp;
  2469. if (rptid_entry->entry_status != 0)
  2470. return;
  2471. if (rptid_entry->format == 0) {
  2472. DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d,"
  2473. " number of VPs acquired %d\n", __func__, vha->host_no,
  2474. MSB(le16_to_cpu(rptid_entry->vp_count)),
  2475. LSB(le16_to_cpu(rptid_entry->vp_count))));
  2476. DEBUG15(printk("%s primary port id %02x%02x%02x\n", __func__,
  2477. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2478. rptid_entry->port_id[0]));
  2479. } else if (rptid_entry->format == 1) {
  2480. vp_idx = LSB(stat);
  2481. DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled "
  2482. "- status %d - "
  2483. "with port id %02x%02x%02x\n", __func__, vha->host_no,
  2484. vp_idx, MSB(stat),
  2485. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2486. rptid_entry->port_id[0]));
  2487. vp = vha;
  2488. if (vp_idx == 0 && (MSB(stat) != 1))
  2489. goto reg_needed;
  2490. if (MSB(stat) == 1) {
  2491. DEBUG2(printk("scsi(%ld): Could not acquire ID for "
  2492. "VP[%d].\n", vha->host_no, vp_idx));
  2493. return;
  2494. }
  2495. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2496. if (vp_idx == vp->vp_idx)
  2497. break;
  2498. if (!vp)
  2499. return;
  2500. vp->d_id.b.domain = rptid_entry->port_id[2];
  2501. vp->d_id.b.area = rptid_entry->port_id[1];
  2502. vp->d_id.b.al_pa = rptid_entry->port_id[0];
  2503. /*
  2504. * Cannot configure here as we are still sitting on the
  2505. * response queue. Handle it in dpc context.
  2506. */
  2507. set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
  2508. reg_needed:
  2509. set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
  2510. set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
  2511. set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
  2512. qla2xxx_wake_dpc(vha);
  2513. }
  2514. }
  2515. /*
  2516. * qla24xx_modify_vp_config
  2517. * Change VP configuration for vha
  2518. *
  2519. * Input:
  2520. * vha = adapter block pointer.
  2521. *
  2522. * Returns:
  2523. * qla2xxx local function return status code.
  2524. *
  2525. * Context:
  2526. * Kernel context.
  2527. */
  2528. int
  2529. qla24xx_modify_vp_config(scsi_qla_host_t *vha)
  2530. {
  2531. int rval;
  2532. struct vp_config_entry_24xx *vpmod;
  2533. dma_addr_t vpmod_dma;
  2534. struct qla_hw_data *ha = vha->hw;
  2535. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2536. /* This can be called by the parent */
  2537. vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
  2538. if (!vpmod) {
  2539. DEBUG2_3(printk("%s(%ld): failed to allocate Modify VP "
  2540. "IOCB.\n", __func__, vha->host_no));
  2541. return QLA_MEMORY_ALLOC_FAILED;
  2542. }
  2543. memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
  2544. vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
  2545. vpmod->entry_count = 1;
  2546. vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
  2547. vpmod->vp_count = 1;
  2548. vpmod->vp_index1 = vha->vp_idx;
  2549. vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
  2550. memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
  2551. memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
  2552. vpmod->entry_count = 1;
  2553. rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
  2554. if (rval != QLA_SUCCESS) {
  2555. DEBUG2_3_11(printk("%s(%ld): failed to issue VP config IOCB"
  2556. "(%x).\n", __func__, base_vha->host_no, rval));
  2557. } else if (vpmod->comp_status != 0) {
  2558. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2559. "-- error status (%x).\n", __func__, base_vha->host_no,
  2560. vpmod->comp_status));
  2561. rval = QLA_FUNCTION_FAILED;
  2562. } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2563. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2564. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2565. le16_to_cpu(vpmod->comp_status)));
  2566. rval = QLA_FUNCTION_FAILED;
  2567. } else {
  2568. /* EMPTY */
  2569. DEBUG11(printk("%s(%ld): done.\n", __func__,
  2570. base_vha->host_no));
  2571. fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
  2572. }
  2573. dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
  2574. return rval;
  2575. }
  2576. /*
  2577. * qla24xx_control_vp
  2578. * Enable a virtual port for given host
  2579. *
  2580. * Input:
  2581. * ha = adapter block pointer.
  2582. * vhba = virtual adapter (unused)
  2583. * index = index number for enabled VP
  2584. *
  2585. * Returns:
  2586. * qla2xxx local function return status code.
  2587. *
  2588. * Context:
  2589. * Kernel context.
  2590. */
  2591. int
  2592. qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
  2593. {
  2594. int rval;
  2595. int map, pos;
  2596. struct vp_ctrl_entry_24xx *vce;
  2597. dma_addr_t vce_dma;
  2598. struct qla_hw_data *ha = vha->hw;
  2599. int vp_index = vha->vp_idx;
  2600. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2601. DEBUG11(printk("%s(%ld): entered. Enabling index %d\n", __func__,
  2602. vha->host_no, vp_index));
  2603. if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
  2604. return QLA_PARAMETER_ERROR;
  2605. vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
  2606. if (!vce) {
  2607. DEBUG2_3(printk("%s(%ld): "
  2608. "failed to allocate VP Control IOCB.\n", __func__,
  2609. base_vha->host_no));
  2610. return QLA_MEMORY_ALLOC_FAILED;
  2611. }
  2612. memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
  2613. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2614. vce->entry_count = 1;
  2615. vce->command = cpu_to_le16(cmd);
  2616. vce->vp_count = __constant_cpu_to_le16(1);
  2617. /* index map in firmware starts with 1; decrement index
  2618. * this is ok as we never use index 0
  2619. */
  2620. map = (vp_index - 1) / 8;
  2621. pos = (vp_index - 1) & 7;
  2622. mutex_lock(&ha->vport_lock);
  2623. vce->vp_idx_map[map] |= 1 << pos;
  2624. mutex_unlock(&ha->vport_lock);
  2625. rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
  2626. if (rval != QLA_SUCCESS) {
  2627. DEBUG2_3_11(printk("%s(%ld): failed to issue VP control IOCB"
  2628. "(%x).\n", __func__, base_vha->host_no, rval));
  2629. printk("%s(%ld): failed to issue VP control IOCB"
  2630. "(%x).\n", __func__, base_vha->host_no, rval);
  2631. } else if (vce->entry_status != 0) {
  2632. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2633. "-- error status (%x).\n", __func__, base_vha->host_no,
  2634. vce->entry_status));
  2635. printk("%s(%ld): failed to complete IOCB "
  2636. "-- error status (%x).\n", __func__, base_vha->host_no,
  2637. vce->entry_status);
  2638. rval = QLA_FUNCTION_FAILED;
  2639. } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2640. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2641. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2642. le16_to_cpu(vce->comp_status)));
  2643. printk("%s(%ld): failed to complete IOCB "
  2644. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2645. le16_to_cpu(vce->comp_status));
  2646. rval = QLA_FUNCTION_FAILED;
  2647. } else {
  2648. DEBUG2(printk("%s(%ld): done.\n", __func__, base_vha->host_no));
  2649. }
  2650. dma_pool_free(ha->s_dma_pool, vce, vce_dma);
  2651. return rval;
  2652. }
  2653. /*
  2654. * qla2x00_send_change_request
  2655. * Receive or disable RSCN request from fabric controller
  2656. *
  2657. * Input:
  2658. * ha = adapter block pointer
  2659. * format = registration format:
  2660. * 0 - Reserved
  2661. * 1 - Fabric detected registration
  2662. * 2 - N_port detected registration
  2663. * 3 - Full registration
  2664. * FF - clear registration
  2665. * vp_idx = Virtual port index
  2666. *
  2667. * Returns:
  2668. * qla2x00 local function return status code.
  2669. *
  2670. * Context:
  2671. * Kernel Context
  2672. */
  2673. int
  2674. qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
  2675. uint16_t vp_idx)
  2676. {
  2677. int rval;
  2678. mbx_cmd_t mc;
  2679. mbx_cmd_t *mcp = &mc;
  2680. /*
  2681. * This command is implicitly executed by firmware during login for the
  2682. * physical hosts
  2683. */
  2684. if (vp_idx == 0)
  2685. return QLA_FUNCTION_FAILED;
  2686. mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
  2687. mcp->mb[1] = format;
  2688. mcp->mb[9] = vp_idx;
  2689. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  2690. mcp->in_mb = MBX_0|MBX_1;
  2691. mcp->tov = MBX_TOV_SECONDS;
  2692. mcp->flags = 0;
  2693. rval = qla2x00_mailbox_command(vha, mcp);
  2694. if (rval == QLA_SUCCESS) {
  2695. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2696. rval = BIT_1;
  2697. }
  2698. } else
  2699. rval = BIT_1;
  2700. return rval;
  2701. }
  2702. int
  2703. qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
  2704. uint32_t size)
  2705. {
  2706. int rval;
  2707. mbx_cmd_t mc;
  2708. mbx_cmd_t *mcp = &mc;
  2709. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2710. if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
  2711. mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
  2712. mcp->mb[8] = MSW(addr);
  2713. mcp->out_mb = MBX_8|MBX_0;
  2714. } else {
  2715. mcp->mb[0] = MBC_DUMP_RISC_RAM;
  2716. mcp->out_mb = MBX_0;
  2717. }
  2718. mcp->mb[1] = LSW(addr);
  2719. mcp->mb[2] = MSW(req_dma);
  2720. mcp->mb[3] = LSW(req_dma);
  2721. mcp->mb[6] = MSW(MSD(req_dma));
  2722. mcp->mb[7] = LSW(MSD(req_dma));
  2723. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  2724. if (IS_FWI2_CAPABLE(vha->hw)) {
  2725. mcp->mb[4] = MSW(size);
  2726. mcp->mb[5] = LSW(size);
  2727. mcp->out_mb |= MBX_5|MBX_4;
  2728. } else {
  2729. mcp->mb[4] = LSW(size);
  2730. mcp->out_mb |= MBX_4;
  2731. }
  2732. mcp->in_mb = MBX_0;
  2733. mcp->tov = MBX_TOV_SECONDS;
  2734. mcp->flags = 0;
  2735. rval = qla2x00_mailbox_command(vha, mcp);
  2736. if (rval != QLA_SUCCESS) {
  2737. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  2738. vha->host_no, rval, mcp->mb[0]));
  2739. } else {
  2740. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2741. }
  2742. return rval;
  2743. }
  2744. /* 84XX Support **************************************************************/
  2745. struct cs84xx_mgmt_cmd {
  2746. union {
  2747. struct verify_chip_entry_84xx req;
  2748. struct verify_chip_rsp_84xx rsp;
  2749. } p;
  2750. };
  2751. int
  2752. qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
  2753. {
  2754. int rval, retry;
  2755. struct cs84xx_mgmt_cmd *mn;
  2756. dma_addr_t mn_dma;
  2757. uint16_t options;
  2758. unsigned long flags;
  2759. struct qla_hw_data *ha = vha->hw;
  2760. DEBUG16(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2761. mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
  2762. if (mn == NULL) {
  2763. DEBUG2_3(printk("%s(%ld): failed to allocate Verify ISP84XX "
  2764. "IOCB.\n", __func__, vha->host_no));
  2765. return QLA_MEMORY_ALLOC_FAILED;
  2766. }
  2767. /* Force Update? */
  2768. options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
  2769. /* Diagnostic firmware? */
  2770. /* options |= MENLO_DIAG_FW; */
  2771. /* We update the firmware with only one data sequence. */
  2772. options |= VCO_END_OF_DATA;
  2773. do {
  2774. retry = 0;
  2775. memset(mn, 0, sizeof(*mn));
  2776. mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
  2777. mn->p.req.entry_count = 1;
  2778. mn->p.req.options = cpu_to_le16(options);
  2779. DEBUG16(printk("%s(%ld): Dump of Verify Request.\n", __func__,
  2780. vha->host_no));
  2781. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2782. sizeof(*mn)));
  2783. rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
  2784. if (rval != QLA_SUCCESS) {
  2785. DEBUG2_16(printk("%s(%ld): failed to issue Verify "
  2786. "IOCB (%x).\n", __func__, vha->host_no, rval));
  2787. goto verify_done;
  2788. }
  2789. DEBUG16(printk("%s(%ld): Dump of Verify Response.\n", __func__,
  2790. vha->host_no));
  2791. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2792. sizeof(*mn)));
  2793. status[0] = le16_to_cpu(mn->p.rsp.comp_status);
  2794. status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
  2795. le16_to_cpu(mn->p.rsp.failure_code) : 0;
  2796. DEBUG2_16(printk("%s(%ld): cs=%x fc=%x\n", __func__,
  2797. vha->host_no, status[0], status[1]));
  2798. if (status[0] != CS_COMPLETE) {
  2799. rval = QLA_FUNCTION_FAILED;
  2800. if (!(options & VCO_DONT_UPDATE_FW)) {
  2801. DEBUG2_16(printk("%s(%ld): Firmware update "
  2802. "failed. Retrying without update "
  2803. "firmware.\n", __func__, vha->host_no));
  2804. options |= VCO_DONT_UPDATE_FW;
  2805. options &= ~VCO_FORCE_UPDATE;
  2806. retry = 1;
  2807. }
  2808. } else {
  2809. DEBUG2_16(printk("%s(%ld): firmware updated to %x.\n",
  2810. __func__, vha->host_no,
  2811. le32_to_cpu(mn->p.rsp.fw_ver)));
  2812. /* NOTE: we only update OP firmware. */
  2813. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  2814. ha->cs84xx->op_fw_version =
  2815. le32_to_cpu(mn->p.rsp.fw_ver);
  2816. spin_unlock_irqrestore(&ha->cs84xx->access_lock,
  2817. flags);
  2818. }
  2819. } while (retry);
  2820. verify_done:
  2821. dma_pool_free(ha->s_dma_pool, mn, mn_dma);
  2822. if (rval != QLA_SUCCESS) {
  2823. DEBUG2_16(printk("%s(%ld): failed=%x.\n", __func__,
  2824. vha->host_no, rval));
  2825. } else {
  2826. DEBUG16(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2827. }
  2828. return rval;
  2829. }
  2830. int
  2831. qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
  2832. {
  2833. int rval;
  2834. unsigned long flags;
  2835. mbx_cmd_t mc;
  2836. mbx_cmd_t *mcp = &mc;
  2837. struct device_reg_25xxmq __iomem *reg;
  2838. struct qla_hw_data *ha = vha->hw;
  2839. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2840. mcp->mb[1] = req->options;
  2841. mcp->mb[2] = MSW(LSD(req->dma));
  2842. mcp->mb[3] = LSW(LSD(req->dma));
  2843. mcp->mb[6] = MSW(MSD(req->dma));
  2844. mcp->mb[7] = LSW(MSD(req->dma));
  2845. mcp->mb[5] = req->length;
  2846. if (req->rsp)
  2847. mcp->mb[10] = req->rsp->id;
  2848. mcp->mb[12] = req->qos;
  2849. mcp->mb[11] = req->vp_idx;
  2850. mcp->mb[13] = req->rid;
  2851. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2852. QLA_QUE_PAGE * req->id);
  2853. mcp->mb[4] = req->id;
  2854. /* que in ptr index */
  2855. mcp->mb[8] = 0;
  2856. /* que out ptr index */
  2857. mcp->mb[9] = 0;
  2858. mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
  2859. MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2860. mcp->in_mb = MBX_0;
  2861. mcp->flags = MBX_DMA_OUT;
  2862. mcp->tov = 60;
  2863. spin_lock_irqsave(&ha->hardware_lock, flags);
  2864. if (!(req->options & BIT_0)) {
  2865. WRT_REG_DWORD(&reg->req_q_in, 0);
  2866. WRT_REG_DWORD(&reg->req_q_out, 0);
  2867. }
  2868. req->req_q_in = &reg->req_q_in;
  2869. req->req_q_out = &reg->req_q_out;
  2870. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2871. rval = qla2x00_mailbox_command(vha, mcp);
  2872. if (rval != QLA_SUCCESS)
  2873. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x mb0=%x.\n",
  2874. __func__, vha->host_no, rval, mcp->mb[0]));
  2875. return rval;
  2876. }
  2877. int
  2878. qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
  2879. {
  2880. int rval;
  2881. unsigned long flags;
  2882. mbx_cmd_t mc;
  2883. mbx_cmd_t *mcp = &mc;
  2884. struct device_reg_25xxmq __iomem *reg;
  2885. struct qla_hw_data *ha = vha->hw;
  2886. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2887. mcp->mb[1] = rsp->options;
  2888. mcp->mb[2] = MSW(LSD(rsp->dma));
  2889. mcp->mb[3] = LSW(LSD(rsp->dma));
  2890. mcp->mb[6] = MSW(MSD(rsp->dma));
  2891. mcp->mb[7] = LSW(MSD(rsp->dma));
  2892. mcp->mb[5] = rsp->length;
  2893. mcp->mb[14] = rsp->msix->entry;
  2894. mcp->mb[13] = rsp->rid;
  2895. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2896. QLA_QUE_PAGE * rsp->id);
  2897. mcp->mb[4] = rsp->id;
  2898. /* que in ptr index */
  2899. mcp->mb[8] = 0;
  2900. /* que out ptr index */
  2901. mcp->mb[9] = 0;
  2902. mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
  2903. |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2904. mcp->in_mb = MBX_0;
  2905. mcp->flags = MBX_DMA_OUT;
  2906. mcp->tov = 60;
  2907. spin_lock_irqsave(&ha->hardware_lock, flags);
  2908. if (!(rsp->options & BIT_0)) {
  2909. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  2910. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  2911. }
  2912. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2913. rval = qla2x00_mailbox_command(vha, mcp);
  2914. if (rval != QLA_SUCCESS)
  2915. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x "
  2916. "mb0=%x.\n", __func__,
  2917. vha->host_no, rval, mcp->mb[0]));
  2918. return rval;
  2919. }
  2920. int
  2921. qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
  2922. {
  2923. int rval;
  2924. mbx_cmd_t mc;
  2925. mbx_cmd_t *mcp = &mc;
  2926. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2927. mcp->mb[0] = MBC_IDC_ACK;
  2928. memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2929. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2930. mcp->in_mb = MBX_0;
  2931. mcp->tov = MBX_TOV_SECONDS;
  2932. mcp->flags = 0;
  2933. rval = qla2x00_mailbox_command(vha, mcp);
  2934. if (rval != QLA_SUCCESS) {
  2935. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2936. vha->host_no, rval, mcp->mb[0]));
  2937. } else {
  2938. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2939. }
  2940. return rval;
  2941. }
  2942. int
  2943. qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
  2944. {
  2945. int rval;
  2946. mbx_cmd_t mc;
  2947. mbx_cmd_t *mcp = &mc;
  2948. if (!IS_QLA81XX(vha->hw))
  2949. return QLA_FUNCTION_FAILED;
  2950. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2951. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2952. mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
  2953. mcp->out_mb = MBX_1|MBX_0;
  2954. mcp->in_mb = MBX_1|MBX_0;
  2955. mcp->tov = MBX_TOV_SECONDS;
  2956. mcp->flags = 0;
  2957. rval = qla2x00_mailbox_command(vha, mcp);
  2958. if (rval != QLA_SUCCESS) {
  2959. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2960. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2961. } else {
  2962. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2963. *sector_size = mcp->mb[1];
  2964. }
  2965. return rval;
  2966. }
  2967. int
  2968. qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
  2969. {
  2970. int rval;
  2971. mbx_cmd_t mc;
  2972. mbx_cmd_t *mcp = &mc;
  2973. if (!IS_QLA81XX(vha->hw))
  2974. return QLA_FUNCTION_FAILED;
  2975. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2976. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2977. mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
  2978. FAC_OPT_CMD_WRITE_PROTECT;
  2979. mcp->out_mb = MBX_1|MBX_0;
  2980. mcp->in_mb = MBX_1|MBX_0;
  2981. mcp->tov = MBX_TOV_SECONDS;
  2982. mcp->flags = 0;
  2983. rval = qla2x00_mailbox_command(vha, mcp);
  2984. if (rval != QLA_SUCCESS) {
  2985. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2986. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2987. } else {
  2988. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2989. }
  2990. return rval;
  2991. }
  2992. int
  2993. qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
  2994. {
  2995. int rval;
  2996. mbx_cmd_t mc;
  2997. mbx_cmd_t *mcp = &mc;
  2998. if (!IS_QLA81XX(vha->hw))
  2999. return QLA_FUNCTION_FAILED;
  3000. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3001. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3002. mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
  3003. mcp->mb[2] = LSW(start);
  3004. mcp->mb[3] = MSW(start);
  3005. mcp->mb[4] = LSW(finish);
  3006. mcp->mb[5] = MSW(finish);
  3007. mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3008. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3009. mcp->tov = MBX_TOV_SECONDS;
  3010. mcp->flags = 0;
  3011. rval = qla2x00_mailbox_command(vha, mcp);
  3012. if (rval != QLA_SUCCESS) {
  3013. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  3014. "mb[2]=%x.\n", __func__, vha->host_no, rval, mcp->mb[0],
  3015. mcp->mb[1], mcp->mb[2]));
  3016. } else {
  3017. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3018. }
  3019. return rval;
  3020. }
  3021. int
  3022. qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
  3023. {
  3024. int rval = 0;
  3025. mbx_cmd_t mc;
  3026. mbx_cmd_t *mcp = &mc;
  3027. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3028. mcp->mb[0] = MBC_RESTART_MPI_FW;
  3029. mcp->out_mb = MBX_0;
  3030. mcp->in_mb = MBX_0|MBX_1;
  3031. mcp->tov = MBX_TOV_SECONDS;
  3032. mcp->flags = 0;
  3033. rval = qla2x00_mailbox_command(vha, mcp);
  3034. if (rval != QLA_SUCCESS) {
  3035. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3036. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3037. } else {
  3038. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3039. }
  3040. return rval;
  3041. }
  3042. int
  3043. qla2x00_read_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3044. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3045. {
  3046. int rval;
  3047. mbx_cmd_t mc;
  3048. mbx_cmd_t *mcp = &mc;
  3049. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3050. mcp->mb[0] = MBC_READ_SFP;
  3051. mcp->mb[1] = dev;
  3052. mcp->mb[2] = MSW(sfp_dma);
  3053. mcp->mb[3] = LSW(sfp_dma);
  3054. mcp->mb[6] = MSW(MSD(sfp_dma));
  3055. mcp->mb[7] = LSW(MSD(sfp_dma));
  3056. mcp->mb[8] = len;
  3057. mcp->mb[9] = adr;
  3058. mcp->mb[10] = opt;
  3059. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3060. mcp->in_mb = MBX_0;
  3061. mcp->tov = MBX_TOV_SECONDS;
  3062. mcp->flags = 0;
  3063. rval = qla2x00_mailbox_command(vha, mcp);
  3064. if (opt & BIT_0)
  3065. if (sfp)
  3066. *sfp = mcp->mb[8];
  3067. if (rval != QLA_SUCCESS) {
  3068. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3069. vha->host_no, rval, mcp->mb[0]));
  3070. } else {
  3071. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3072. }
  3073. return rval;
  3074. }
  3075. int
  3076. qla2x00_write_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3077. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3078. {
  3079. int rval;
  3080. mbx_cmd_t mc;
  3081. mbx_cmd_t *mcp = &mc;
  3082. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3083. if (opt & BIT_0)
  3084. if (sfp)
  3085. len = *sfp;
  3086. mcp->mb[0] = MBC_WRITE_SFP;
  3087. mcp->mb[1] = dev;
  3088. mcp->mb[2] = MSW(sfp_dma);
  3089. mcp->mb[3] = LSW(sfp_dma);
  3090. mcp->mb[6] = MSW(MSD(sfp_dma));
  3091. mcp->mb[7] = LSW(MSD(sfp_dma));
  3092. mcp->mb[8] = len;
  3093. mcp->mb[9] = adr;
  3094. mcp->mb[10] = opt;
  3095. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3096. mcp->in_mb = MBX_0;
  3097. mcp->tov = MBX_TOV_SECONDS;
  3098. mcp->flags = 0;
  3099. rval = qla2x00_mailbox_command(vha, mcp);
  3100. if (rval != QLA_SUCCESS) {
  3101. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3102. vha->host_no, rval, mcp->mb[0]));
  3103. } else {
  3104. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3105. }
  3106. return rval;
  3107. }
  3108. int
  3109. qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
  3110. uint16_t size_in_bytes, uint16_t *actual_size)
  3111. {
  3112. int rval;
  3113. mbx_cmd_t mc;
  3114. mbx_cmd_t *mcp = &mc;
  3115. if (!IS_QLA81XX(vha->hw))
  3116. return QLA_FUNCTION_FAILED;
  3117. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3118. mcp->mb[0] = MBC_GET_XGMAC_STATS;
  3119. mcp->mb[2] = MSW(stats_dma);
  3120. mcp->mb[3] = LSW(stats_dma);
  3121. mcp->mb[6] = MSW(MSD(stats_dma));
  3122. mcp->mb[7] = LSW(MSD(stats_dma));
  3123. mcp->mb[8] = size_in_bytes >> 2;
  3124. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  3125. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3126. mcp->tov = MBX_TOV_SECONDS;
  3127. mcp->flags = 0;
  3128. rval = qla2x00_mailbox_command(vha, mcp);
  3129. if (rval != QLA_SUCCESS) {
  3130. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3131. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3132. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3133. } else {
  3134. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3135. *actual_size = mcp->mb[2] << 2;
  3136. }
  3137. return rval;
  3138. }
  3139. int
  3140. qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
  3141. uint16_t size)
  3142. {
  3143. int rval;
  3144. mbx_cmd_t mc;
  3145. mbx_cmd_t *mcp = &mc;
  3146. if (!IS_QLA81XX(vha->hw))
  3147. return QLA_FUNCTION_FAILED;
  3148. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3149. mcp->mb[0] = MBC_GET_DCBX_PARAMS;
  3150. mcp->mb[1] = 0;
  3151. mcp->mb[2] = MSW(tlv_dma);
  3152. mcp->mb[3] = LSW(tlv_dma);
  3153. mcp->mb[6] = MSW(MSD(tlv_dma));
  3154. mcp->mb[7] = LSW(MSD(tlv_dma));
  3155. mcp->mb[8] = size;
  3156. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3157. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3158. mcp->tov = MBX_TOV_SECONDS;
  3159. mcp->flags = 0;
  3160. rval = qla2x00_mailbox_command(vha, mcp);
  3161. if (rval != QLA_SUCCESS) {
  3162. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3163. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3164. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3165. } else {
  3166. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3167. }
  3168. return rval;
  3169. }
  3170. int
  3171. qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
  3172. {
  3173. int rval;
  3174. mbx_cmd_t mc;
  3175. mbx_cmd_t *mcp = &mc;
  3176. if (!IS_FWI2_CAPABLE(vha->hw))
  3177. return QLA_FUNCTION_FAILED;
  3178. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3179. mcp->mb[0] = MBC_READ_RAM_EXTENDED;
  3180. mcp->mb[1] = LSW(risc_addr);
  3181. mcp->mb[8] = MSW(risc_addr);
  3182. mcp->out_mb = MBX_8|MBX_1|MBX_0;
  3183. mcp->in_mb = MBX_3|MBX_2|MBX_0;
  3184. mcp->tov = 30;
  3185. mcp->flags = 0;
  3186. rval = qla2x00_mailbox_command(vha, mcp);
  3187. if (rval != QLA_SUCCESS) {
  3188. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3189. vha->host_no, rval, mcp->mb[0]));
  3190. } else {
  3191. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3192. *data = mcp->mb[3] << 16 | mcp->mb[2];
  3193. }
  3194. return rval;
  3195. }
  3196. int
  3197. qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
  3198. {
  3199. int rval;
  3200. mbx_cmd_t mc;
  3201. mbx_cmd_t *mcp = &mc;
  3202. uint32_t iter_cnt = 0x1;
  3203. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3204. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3205. mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
  3206. mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
  3207. /* transfer count */
  3208. mcp->mb[10] = LSW(mreq->transfer_size);
  3209. mcp->mb[11] = MSW(mreq->transfer_size);
  3210. /* send data address */
  3211. mcp->mb[14] = LSW(mreq->send_dma);
  3212. mcp->mb[15] = MSW(mreq->send_dma);
  3213. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3214. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3215. /* recieve data address */
  3216. mcp->mb[16] = LSW(mreq->rcv_dma);
  3217. mcp->mb[17] = MSW(mreq->rcv_dma);
  3218. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3219. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3220. /* Iteration count */
  3221. mcp->mb[18] = LSW(iter_cnt);
  3222. mcp->mb[19] = MSW(iter_cnt);
  3223. mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
  3224. MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3225. if (IS_QLA81XX(vha->hw))
  3226. mcp->out_mb |= MBX_2;
  3227. mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
  3228. mcp->buf_size = mreq->transfer_size;
  3229. mcp->tov = MBX_TOV_SECONDS;
  3230. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3231. rval = qla2x00_mailbox_command(vha, mcp);
  3232. if (rval != QLA_SUCCESS) {
  3233. DEBUG2(printk(KERN_WARNING
  3234. "(%ld): failed=%x mb[0]=0x%x "
  3235. "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x mb[19]=0x%x. \n", vha->host_no, rval,
  3236. mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[18], mcp->mb[19]));
  3237. } else {
  3238. DEBUG2(printk(KERN_WARNING
  3239. "scsi(%ld): done.\n", vha->host_no));
  3240. }
  3241. /* Copy mailbox information */
  3242. memcpy( mresp, mcp->mb, 64);
  3243. mresp[3] = mcp->mb[18];
  3244. mresp[4] = mcp->mb[19];
  3245. return rval;
  3246. }
  3247. int
  3248. qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp)
  3249. {
  3250. int rval;
  3251. mbx_cmd_t mc;
  3252. mbx_cmd_t *mcp = &mc;
  3253. struct qla_hw_data *ha = vha->hw;
  3254. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3255. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3256. mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
  3257. mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
  3258. if (IS_QLA81XX(ha))
  3259. mcp->mb[1] |= BIT_15;
  3260. mcp->mb[2] = IS_QLA81XX(ha) ? vha->fcoe_fcf_idx : 0;
  3261. mcp->mb[16] = LSW(mreq->rcv_dma);
  3262. mcp->mb[17] = MSW(mreq->rcv_dma);
  3263. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3264. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3265. mcp->mb[10] = LSW(mreq->transfer_size);
  3266. mcp->mb[14] = LSW(mreq->send_dma);
  3267. mcp->mb[15] = MSW(mreq->send_dma);
  3268. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3269. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3270. mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
  3271. MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3272. if (IS_QLA81XX(ha))
  3273. mcp->out_mb |= MBX_2;
  3274. mcp->in_mb = MBX_0;
  3275. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
  3276. mcp->in_mb |= MBX_1;
  3277. if (IS_QLA81XX(ha))
  3278. mcp->in_mb |= MBX_3;
  3279. mcp->tov = MBX_TOV_SECONDS;
  3280. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3281. mcp->buf_size = mreq->transfer_size;
  3282. rval = qla2x00_mailbox_command(vha, mcp);
  3283. if (rval != QLA_SUCCESS) {
  3284. DEBUG2(printk(KERN_WARNING
  3285. "(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3286. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3287. } else {
  3288. DEBUG2(printk(KERN_WARNING
  3289. "scsi(%ld): done.\n", vha->host_no));
  3290. }
  3291. /* Copy mailbox information */
  3292. memcpy( mresp, mcp->mb, 32);
  3293. return rval;
  3294. }
  3295. int
  3296. qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic,
  3297. uint16_t *cmd_status)
  3298. {
  3299. int rval;
  3300. mbx_cmd_t mc;
  3301. mbx_cmd_t *mcp = &mc;
  3302. DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
  3303. ha->host_no, enable_diagnostic));
  3304. mcp->mb[0] = MBC_ISP84XX_RESET;
  3305. mcp->mb[1] = enable_diagnostic;
  3306. mcp->out_mb = MBX_1|MBX_0;
  3307. mcp->in_mb = MBX_1|MBX_0;
  3308. mcp->tov = MBX_TOV_SECONDS;
  3309. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3310. rval = qla2x00_mailbox_command(ha, mcp);
  3311. /* Return mailbox statuses. */
  3312. *cmd_status = mcp->mb[0];
  3313. if (rval != QLA_SUCCESS)
  3314. DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
  3315. rval));
  3316. else
  3317. DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
  3318. return rval;
  3319. }
  3320. int
  3321. qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
  3322. {
  3323. int rval;
  3324. mbx_cmd_t mc;
  3325. mbx_cmd_t *mcp = &mc;
  3326. if (!IS_FWI2_CAPABLE(vha->hw))
  3327. return QLA_FUNCTION_FAILED;
  3328. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3329. mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
  3330. mcp->mb[1] = LSW(risc_addr);
  3331. mcp->mb[2] = LSW(data);
  3332. mcp->mb[3] = MSW(data);
  3333. mcp->mb[8] = MSW(risc_addr);
  3334. mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
  3335. mcp->in_mb = MBX_0;
  3336. mcp->tov = 30;
  3337. mcp->flags = 0;
  3338. rval = qla2x00_mailbox_command(vha, mcp);
  3339. if (rval != QLA_SUCCESS) {
  3340. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3341. vha->host_no, rval, mcp->mb[0]));
  3342. } else {
  3343. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3344. }
  3345. return rval;
  3346. }
  3347. int
  3348. qla2x00_get_data_rate(scsi_qla_host_t *vha)
  3349. {
  3350. int rval;
  3351. mbx_cmd_t mc;
  3352. mbx_cmd_t *mcp = &mc;
  3353. struct qla_hw_data *ha = vha->hw;
  3354. if (!IS_FWI2_CAPABLE(ha))
  3355. return QLA_FUNCTION_FAILED;
  3356. DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
  3357. mcp->mb[0] = MBC_DATA_RATE;
  3358. mcp->mb[1] = 0;
  3359. mcp->out_mb = MBX_1|MBX_0;
  3360. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3361. mcp->tov = MBX_TOV_SECONDS;
  3362. mcp->flags = 0;
  3363. rval = qla2x00_mailbox_command(vha, mcp);
  3364. if (rval != QLA_SUCCESS) {
  3365. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3366. __func__, vha->host_no, rval, mcp->mb[0]));
  3367. } else {
  3368. DEBUG11(printk(KERN_INFO
  3369. "%s(%ld): done.\n", __func__, vha->host_no));
  3370. if (mcp->mb[1] != 0x7)
  3371. ha->link_data_rate = mcp->mb[1];
  3372. }
  3373. return rval;
  3374. }