qla_init.c 128 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. fc_port_t *fcport = sp->fcport;
  43. struct qla_hw_data *ha = fcport->vha->hw;
  44. struct req_que *req;
  45. unsigned long flags;
  46. spin_lock_irqsave(&ha->hardware_lock, flags);
  47. req = ha->req_q_map[0];
  48. req->outstanding_cmds[sp->handle] = NULL;
  49. ctx = sp->ctx;
  50. ctx->timeout(sp);
  51. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  52. ctx->free(sp);
  53. }
  54. void
  55. qla2x00_ctx_sp_free(srb_t *sp)
  56. {
  57. struct srb_ctx *ctx = sp->ctx;
  58. kfree(ctx);
  59. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  60. }
  61. inline srb_t *
  62. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  63. unsigned long tmo)
  64. {
  65. srb_t *sp;
  66. struct qla_hw_data *ha = vha->hw;
  67. struct srb_ctx *ctx;
  68. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  69. if (!sp)
  70. goto done;
  71. ctx = kzalloc(size, GFP_KERNEL);
  72. if (!ctx) {
  73. mempool_free(sp, ha->srb_mempool);
  74. goto done;
  75. }
  76. memset(sp, 0, sizeof(*sp));
  77. sp->fcport = fcport;
  78. sp->ctx = ctx;
  79. ctx->free = qla2x00_ctx_sp_free;
  80. init_timer(&ctx->timer);
  81. if (!tmo)
  82. goto done;
  83. ctx->timer.expires = jiffies + tmo * HZ;
  84. ctx->timer.data = (unsigned long)sp;
  85. ctx->timer.function = qla2x00_ctx_sp_timeout;
  86. add_timer(&ctx->timer);
  87. done:
  88. return sp;
  89. }
  90. /* Asynchronous Login/Logout Routines -------------------------------------- */
  91. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  92. static void
  93. qla2x00_async_logio_timeout(srb_t *sp)
  94. {
  95. fc_port_t *fcport = sp->fcport;
  96. struct srb_logio *lio = sp->ctx;
  97. DEBUG2(printk(KERN_WARNING
  98. "scsi(%ld:%x): Async-%s timeout.\n",
  99. fcport->vha->host_no, sp->handle,
  100. lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout"));
  101. if (lio->ctx.type == SRB_LOGIN_CMD)
  102. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  103. }
  104. int
  105. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  106. uint16_t *data)
  107. {
  108. struct qla_hw_data *ha = vha->hw;
  109. srb_t *sp;
  110. struct srb_logio *lio;
  111. int rval;
  112. rval = QLA_FUNCTION_FAILED;
  113. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  114. ELS_TMO_2_RATOV(ha) + 2);
  115. if (!sp)
  116. goto done;
  117. lio = sp->ctx;
  118. lio->ctx.type = SRB_LOGIN_CMD;
  119. lio->ctx.timeout = qla2x00_async_logio_timeout;
  120. lio->flags |= SRB_LOGIN_COND_PLOGI;
  121. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  122. lio->flags |= SRB_LOGIN_RETRIED;
  123. rval = qla2x00_start_sp(sp);
  124. if (rval != QLA_SUCCESS)
  125. goto done_free_sp;
  126. DEBUG2(printk(KERN_DEBUG
  127. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  128. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  129. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  130. fcport->login_retry));
  131. return rval;
  132. done_free_sp:
  133. del_timer_sync(&lio->ctx.timer);
  134. lio->ctx.free(sp);
  135. done:
  136. return rval;
  137. }
  138. int
  139. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  140. {
  141. struct qla_hw_data *ha = vha->hw;
  142. srb_t *sp;
  143. struct srb_logio *lio;
  144. int rval;
  145. rval = QLA_FUNCTION_FAILED;
  146. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  147. ELS_TMO_2_RATOV(ha) + 2);
  148. if (!sp)
  149. goto done;
  150. lio = sp->ctx;
  151. lio->ctx.type = SRB_LOGOUT_CMD;
  152. lio->ctx.timeout = qla2x00_async_logio_timeout;
  153. rval = qla2x00_start_sp(sp);
  154. if (rval != QLA_SUCCESS)
  155. goto done_free_sp;
  156. DEBUG2(printk(KERN_DEBUG
  157. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  158. fcport->vha->host_no, sp->handle, fcport->loop_id,
  159. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  160. return rval;
  161. done_free_sp:
  162. del_timer_sync(&lio->ctx.timer);
  163. lio->ctx.free(sp);
  164. done:
  165. return rval;
  166. }
  167. int
  168. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  169. uint16_t *data)
  170. {
  171. int rval;
  172. uint8_t opts = 0;
  173. switch (data[0]) {
  174. case MBS_COMMAND_COMPLETE:
  175. if (fcport->flags & FCF_FCP2_DEVICE)
  176. opts |= BIT_1;
  177. rval = qla2x00_get_port_database(vha, fcport, opts);
  178. if (rval != QLA_SUCCESS)
  179. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  180. else
  181. qla2x00_update_fcport(vha, fcport);
  182. break;
  183. case MBS_COMMAND_ERROR:
  184. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  185. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  186. else
  187. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  188. break;
  189. case MBS_PORT_ID_USED:
  190. fcport->loop_id = data[1];
  191. qla2x00_post_async_login_work(vha, fcport, NULL);
  192. break;
  193. case MBS_LOOP_ID_USED:
  194. fcport->loop_id++;
  195. rval = qla2x00_find_new_loop_id(vha, fcport);
  196. if (rval != QLA_SUCCESS) {
  197. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  198. break;
  199. }
  200. qla2x00_post_async_login_work(vha, fcport, NULL);
  201. break;
  202. }
  203. return QLA_SUCCESS;
  204. }
  205. int
  206. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  207. uint16_t *data)
  208. {
  209. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  210. return QLA_SUCCESS;
  211. }
  212. /****************************************************************************/
  213. /* QLogic ISP2x00 Hardware Support Functions. */
  214. /****************************************************************************/
  215. /*
  216. * qla2x00_initialize_adapter
  217. * Initialize board.
  218. *
  219. * Input:
  220. * ha = adapter block pointer.
  221. *
  222. * Returns:
  223. * 0 = success
  224. */
  225. int
  226. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  227. {
  228. int rval;
  229. struct qla_hw_data *ha = vha->hw;
  230. struct req_que *req = ha->req_q_map[0];
  231. /* Clear adapter flags. */
  232. vha->flags.online = 0;
  233. ha->flags.chip_reset_done = 0;
  234. vha->flags.reset_active = 0;
  235. ha->flags.pci_channel_io_perm_failure = 0;
  236. ha->flags.eeh_busy = 0;
  237. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  238. atomic_set(&vha->loop_state, LOOP_DOWN);
  239. vha->device_flags = DFLG_NO_CABLE;
  240. vha->dpc_flags = 0;
  241. vha->flags.management_server_logged_in = 0;
  242. vha->marker_needed = 0;
  243. ha->isp_abort_cnt = 0;
  244. ha->beacon_blink_led = 0;
  245. set_bit(0, ha->req_qid_map);
  246. set_bit(0, ha->rsp_qid_map);
  247. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  248. rval = ha->isp_ops->pci_config(vha);
  249. if (rval) {
  250. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  251. vha->host_no));
  252. return (rval);
  253. }
  254. ha->isp_ops->reset_chip(vha);
  255. rval = qla2xxx_get_flash_info(vha);
  256. if (rval) {
  257. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  258. vha->host_no));
  259. return (rval);
  260. }
  261. ha->isp_ops->get_flash_version(vha, req->ring);
  262. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  263. ha->isp_ops->nvram_config(vha);
  264. if (ha->flags.disable_serdes) {
  265. /* Mask HBA via NVRAM settings? */
  266. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  267. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  268. vha->port_name[0], vha->port_name[1],
  269. vha->port_name[2], vha->port_name[3],
  270. vha->port_name[4], vha->port_name[5],
  271. vha->port_name[6], vha->port_name[7]);
  272. return QLA_FUNCTION_FAILED;
  273. }
  274. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  275. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  276. rval = ha->isp_ops->chip_diag(vha);
  277. if (rval)
  278. return (rval);
  279. rval = qla2x00_setup_chip(vha);
  280. if (rval)
  281. return (rval);
  282. }
  283. if (IS_QLA84XX(ha)) {
  284. ha->cs84xx = qla84xx_get_chip(vha);
  285. if (!ha->cs84xx) {
  286. qla_printk(KERN_ERR, ha,
  287. "Unable to configure ISP84XX.\n");
  288. return QLA_FUNCTION_FAILED;
  289. }
  290. }
  291. rval = qla2x00_init_rings(vha);
  292. ha->flags.chip_reset_done = 1;
  293. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  294. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  295. rval = qla84xx_init_chip(vha);
  296. if (rval != QLA_SUCCESS) {
  297. qla_printk(KERN_ERR, ha,
  298. "Unable to initialize ISP84XX.\n");
  299. qla84xx_put_chip(vha);
  300. }
  301. }
  302. return (rval);
  303. }
  304. /**
  305. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  306. * @ha: HA context
  307. *
  308. * Returns 0 on success.
  309. */
  310. int
  311. qla2100_pci_config(scsi_qla_host_t *vha)
  312. {
  313. uint16_t w;
  314. unsigned long flags;
  315. struct qla_hw_data *ha = vha->hw;
  316. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  317. pci_set_master(ha->pdev);
  318. pci_try_set_mwi(ha->pdev);
  319. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  320. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  321. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  322. pci_disable_rom(ha->pdev);
  323. /* Get PCI bus information. */
  324. spin_lock_irqsave(&ha->hardware_lock, flags);
  325. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  326. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  327. return QLA_SUCCESS;
  328. }
  329. /**
  330. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  331. * @ha: HA context
  332. *
  333. * Returns 0 on success.
  334. */
  335. int
  336. qla2300_pci_config(scsi_qla_host_t *vha)
  337. {
  338. uint16_t w;
  339. unsigned long flags = 0;
  340. uint32_t cnt;
  341. struct qla_hw_data *ha = vha->hw;
  342. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  343. pci_set_master(ha->pdev);
  344. pci_try_set_mwi(ha->pdev);
  345. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  346. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  347. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  348. w &= ~PCI_COMMAND_INTX_DISABLE;
  349. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  350. /*
  351. * If this is a 2300 card and not 2312, reset the
  352. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  353. * the 2310 also reports itself as a 2300 so we need to get the
  354. * fb revision level -- a 6 indicates it really is a 2300 and
  355. * not a 2310.
  356. */
  357. if (IS_QLA2300(ha)) {
  358. spin_lock_irqsave(&ha->hardware_lock, flags);
  359. /* Pause RISC. */
  360. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  361. for (cnt = 0; cnt < 30000; cnt++) {
  362. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  363. break;
  364. udelay(10);
  365. }
  366. /* Select FPM registers. */
  367. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  368. RD_REG_WORD(&reg->ctrl_status);
  369. /* Get the fb rev level */
  370. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  371. if (ha->fb_rev == FPM_2300)
  372. pci_clear_mwi(ha->pdev);
  373. /* Deselect FPM registers. */
  374. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  375. RD_REG_WORD(&reg->ctrl_status);
  376. /* Release RISC module. */
  377. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  378. for (cnt = 0; cnt < 30000; cnt++) {
  379. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  380. break;
  381. udelay(10);
  382. }
  383. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  384. }
  385. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  386. pci_disable_rom(ha->pdev);
  387. /* Get PCI bus information. */
  388. spin_lock_irqsave(&ha->hardware_lock, flags);
  389. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  390. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  391. return QLA_SUCCESS;
  392. }
  393. /**
  394. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  395. * @ha: HA context
  396. *
  397. * Returns 0 on success.
  398. */
  399. int
  400. qla24xx_pci_config(scsi_qla_host_t *vha)
  401. {
  402. uint16_t w;
  403. unsigned long flags = 0;
  404. struct qla_hw_data *ha = vha->hw;
  405. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  406. pci_set_master(ha->pdev);
  407. pci_try_set_mwi(ha->pdev);
  408. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  409. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  410. w &= ~PCI_COMMAND_INTX_DISABLE;
  411. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  412. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  413. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  414. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  415. pcix_set_mmrbc(ha->pdev, 2048);
  416. /* PCIe -- adjust Maximum Read Request Size (2048). */
  417. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  418. pcie_set_readrq(ha->pdev, 2048);
  419. pci_disable_rom(ha->pdev);
  420. ha->chip_revision = ha->pdev->revision;
  421. /* Get PCI bus information. */
  422. spin_lock_irqsave(&ha->hardware_lock, flags);
  423. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  424. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  425. return QLA_SUCCESS;
  426. }
  427. /**
  428. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  429. * @ha: HA context
  430. *
  431. * Returns 0 on success.
  432. */
  433. int
  434. qla25xx_pci_config(scsi_qla_host_t *vha)
  435. {
  436. uint16_t w;
  437. struct qla_hw_data *ha = vha->hw;
  438. pci_set_master(ha->pdev);
  439. pci_try_set_mwi(ha->pdev);
  440. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  441. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  442. w &= ~PCI_COMMAND_INTX_DISABLE;
  443. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  444. /* PCIe -- adjust Maximum Read Request Size (2048). */
  445. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  446. pcie_set_readrq(ha->pdev, 2048);
  447. pci_disable_rom(ha->pdev);
  448. ha->chip_revision = ha->pdev->revision;
  449. return QLA_SUCCESS;
  450. }
  451. /**
  452. * qla2x00_isp_firmware() - Choose firmware image.
  453. * @ha: HA context
  454. *
  455. * Returns 0 on success.
  456. */
  457. static int
  458. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  459. {
  460. int rval;
  461. uint16_t loop_id, topo, sw_cap;
  462. uint8_t domain, area, al_pa;
  463. struct qla_hw_data *ha = vha->hw;
  464. /* Assume loading risc code */
  465. rval = QLA_FUNCTION_FAILED;
  466. if (ha->flags.disable_risc_code_load) {
  467. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  468. vha->host_no));
  469. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  470. /* Verify checksum of loaded RISC code. */
  471. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  472. if (rval == QLA_SUCCESS) {
  473. /* And, verify we are not in ROM code. */
  474. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  475. &area, &domain, &topo, &sw_cap);
  476. }
  477. }
  478. if (rval) {
  479. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  480. vha->host_no));
  481. }
  482. return (rval);
  483. }
  484. /**
  485. * qla2x00_reset_chip() - Reset ISP chip.
  486. * @ha: HA context
  487. *
  488. * Returns 0 on success.
  489. */
  490. void
  491. qla2x00_reset_chip(scsi_qla_host_t *vha)
  492. {
  493. unsigned long flags = 0;
  494. struct qla_hw_data *ha = vha->hw;
  495. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  496. uint32_t cnt;
  497. uint16_t cmd;
  498. if (unlikely(pci_channel_offline(ha->pdev)))
  499. return;
  500. ha->isp_ops->disable_intrs(ha);
  501. spin_lock_irqsave(&ha->hardware_lock, flags);
  502. /* Turn off master enable */
  503. cmd = 0;
  504. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  505. cmd &= ~PCI_COMMAND_MASTER;
  506. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  507. if (!IS_QLA2100(ha)) {
  508. /* Pause RISC. */
  509. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  510. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  511. for (cnt = 0; cnt < 30000; cnt++) {
  512. if ((RD_REG_WORD(&reg->hccr) &
  513. HCCR_RISC_PAUSE) != 0)
  514. break;
  515. udelay(100);
  516. }
  517. } else {
  518. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  519. udelay(10);
  520. }
  521. /* Select FPM registers. */
  522. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  523. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  524. /* FPM Soft Reset. */
  525. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  526. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  527. /* Toggle Fpm Reset. */
  528. if (!IS_QLA2200(ha)) {
  529. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  530. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  531. }
  532. /* Select frame buffer registers. */
  533. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  534. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  535. /* Reset frame buffer FIFOs. */
  536. if (IS_QLA2200(ha)) {
  537. WRT_FB_CMD_REG(ha, reg, 0xa000);
  538. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  539. } else {
  540. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  541. /* Read back fb_cmd until zero or 3 seconds max */
  542. for (cnt = 0; cnt < 3000; cnt++) {
  543. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  544. break;
  545. udelay(100);
  546. }
  547. }
  548. /* Select RISC module registers. */
  549. WRT_REG_WORD(&reg->ctrl_status, 0);
  550. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  551. /* Reset RISC processor. */
  552. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  553. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  554. /* Release RISC processor. */
  555. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  556. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  557. }
  558. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  559. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  560. /* Reset ISP chip. */
  561. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  562. /* Wait for RISC to recover from reset. */
  563. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  564. /*
  565. * It is necessary to for a delay here since the card doesn't
  566. * respond to PCI reads during a reset. On some architectures
  567. * this will result in an MCA.
  568. */
  569. udelay(20);
  570. for (cnt = 30000; cnt; cnt--) {
  571. if ((RD_REG_WORD(&reg->ctrl_status) &
  572. CSR_ISP_SOFT_RESET) == 0)
  573. break;
  574. udelay(100);
  575. }
  576. } else
  577. udelay(10);
  578. /* Reset RISC processor. */
  579. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  580. WRT_REG_WORD(&reg->semaphore, 0);
  581. /* Release RISC processor. */
  582. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  583. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  584. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  585. for (cnt = 0; cnt < 30000; cnt++) {
  586. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  587. break;
  588. udelay(100);
  589. }
  590. } else
  591. udelay(100);
  592. /* Turn on master enable */
  593. cmd |= PCI_COMMAND_MASTER;
  594. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  595. /* Disable RISC pause on FPM parity error. */
  596. if (!IS_QLA2100(ha)) {
  597. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  598. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  599. }
  600. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  601. }
  602. /**
  603. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  604. * @ha: HA context
  605. *
  606. * Returns 0 on success.
  607. */
  608. static inline void
  609. qla24xx_reset_risc(scsi_qla_host_t *vha)
  610. {
  611. unsigned long flags = 0;
  612. struct qla_hw_data *ha = vha->hw;
  613. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  614. uint32_t cnt, d2;
  615. uint16_t wd;
  616. spin_lock_irqsave(&ha->hardware_lock, flags);
  617. /* Reset RISC. */
  618. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  619. for (cnt = 0; cnt < 30000; cnt++) {
  620. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  621. break;
  622. udelay(10);
  623. }
  624. WRT_REG_DWORD(&reg->ctrl_status,
  625. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  626. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  627. udelay(100);
  628. /* Wait for firmware to complete NVRAM accesses. */
  629. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  630. for (cnt = 10000 ; cnt && d2; cnt--) {
  631. udelay(5);
  632. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  633. barrier();
  634. }
  635. /* Wait for soft-reset to complete. */
  636. d2 = RD_REG_DWORD(&reg->ctrl_status);
  637. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  638. udelay(5);
  639. d2 = RD_REG_DWORD(&reg->ctrl_status);
  640. barrier();
  641. }
  642. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  643. RD_REG_DWORD(&reg->hccr);
  644. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  645. RD_REG_DWORD(&reg->hccr);
  646. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  647. RD_REG_DWORD(&reg->hccr);
  648. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  649. for (cnt = 6000000 ; cnt && d2; cnt--) {
  650. udelay(5);
  651. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  652. barrier();
  653. }
  654. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  655. if (IS_NOPOLLING_TYPE(ha))
  656. ha->isp_ops->enable_intrs(ha);
  657. }
  658. /**
  659. * qla24xx_reset_chip() - Reset ISP24xx chip.
  660. * @ha: HA context
  661. *
  662. * Returns 0 on success.
  663. */
  664. void
  665. qla24xx_reset_chip(scsi_qla_host_t *vha)
  666. {
  667. struct qla_hw_data *ha = vha->hw;
  668. if (pci_channel_offline(ha->pdev) &&
  669. ha->flags.pci_channel_io_perm_failure) {
  670. return;
  671. }
  672. ha->isp_ops->disable_intrs(ha);
  673. /* Perform RISC reset. */
  674. qla24xx_reset_risc(vha);
  675. }
  676. /**
  677. * qla2x00_chip_diag() - Test chip for proper operation.
  678. * @ha: HA context
  679. *
  680. * Returns 0 on success.
  681. */
  682. int
  683. qla2x00_chip_diag(scsi_qla_host_t *vha)
  684. {
  685. int rval;
  686. struct qla_hw_data *ha = vha->hw;
  687. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  688. unsigned long flags = 0;
  689. uint16_t data;
  690. uint32_t cnt;
  691. uint16_t mb[5];
  692. struct req_que *req = ha->req_q_map[0];
  693. /* Assume a failed state */
  694. rval = QLA_FUNCTION_FAILED;
  695. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  696. vha->host_no, (u_long)&reg->flash_address));
  697. spin_lock_irqsave(&ha->hardware_lock, flags);
  698. /* Reset ISP chip. */
  699. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  700. /*
  701. * We need to have a delay here since the card will not respond while
  702. * in reset causing an MCA on some architectures.
  703. */
  704. udelay(20);
  705. data = qla2x00_debounce_register(&reg->ctrl_status);
  706. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  707. udelay(5);
  708. data = RD_REG_WORD(&reg->ctrl_status);
  709. barrier();
  710. }
  711. if (!cnt)
  712. goto chip_diag_failed;
  713. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  714. vha->host_no));
  715. /* Reset RISC processor. */
  716. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  717. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  718. /* Workaround for QLA2312 PCI parity error */
  719. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  720. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  721. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  722. udelay(5);
  723. data = RD_MAILBOX_REG(ha, reg, 0);
  724. barrier();
  725. }
  726. } else
  727. udelay(10);
  728. if (!cnt)
  729. goto chip_diag_failed;
  730. /* Check product ID of chip */
  731. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  732. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  733. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  734. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  735. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  736. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  737. mb[3] != PROD_ID_3) {
  738. qla_printk(KERN_WARNING, ha,
  739. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  740. goto chip_diag_failed;
  741. }
  742. ha->product_id[0] = mb[1];
  743. ha->product_id[1] = mb[2];
  744. ha->product_id[2] = mb[3];
  745. ha->product_id[3] = mb[4];
  746. /* Adjust fw RISC transfer size */
  747. if (req->length > 1024)
  748. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  749. else
  750. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  751. req->length;
  752. if (IS_QLA2200(ha) &&
  753. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  754. /* Limit firmware transfer size with a 2200A */
  755. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  756. vha->host_no));
  757. ha->device_type |= DT_ISP2200A;
  758. ha->fw_transfer_size = 128;
  759. }
  760. /* Wrap Incoming Mailboxes Test. */
  761. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  762. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  763. rval = qla2x00_mbx_reg_test(vha);
  764. if (rval) {
  765. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  766. vha->host_no));
  767. qla_printk(KERN_WARNING, ha,
  768. "Failed mailbox send register test\n");
  769. }
  770. else {
  771. /* Flag a successful rval */
  772. rval = QLA_SUCCESS;
  773. }
  774. spin_lock_irqsave(&ha->hardware_lock, flags);
  775. chip_diag_failed:
  776. if (rval)
  777. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  778. "****\n", vha->host_no));
  779. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  780. return (rval);
  781. }
  782. /**
  783. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  784. * @ha: HA context
  785. *
  786. * Returns 0 on success.
  787. */
  788. int
  789. qla24xx_chip_diag(scsi_qla_host_t *vha)
  790. {
  791. int rval;
  792. struct qla_hw_data *ha = vha->hw;
  793. struct req_que *req = ha->req_q_map[0];
  794. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  795. rval = qla2x00_mbx_reg_test(vha);
  796. if (rval) {
  797. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  798. vha->host_no));
  799. qla_printk(KERN_WARNING, ha,
  800. "Failed mailbox send register test\n");
  801. } else {
  802. /* Flag a successful rval */
  803. rval = QLA_SUCCESS;
  804. }
  805. return rval;
  806. }
  807. void
  808. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  809. {
  810. int rval;
  811. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  812. eft_size, fce_size, mq_size;
  813. dma_addr_t tc_dma;
  814. void *tc;
  815. struct qla_hw_data *ha = vha->hw;
  816. struct req_que *req = ha->req_q_map[0];
  817. struct rsp_que *rsp = ha->rsp_q_map[0];
  818. if (ha->fw_dump) {
  819. qla_printk(KERN_WARNING, ha,
  820. "Firmware dump previously allocated.\n");
  821. return;
  822. }
  823. ha->fw_dumped = 0;
  824. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  825. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  826. fixed_size = sizeof(struct qla2100_fw_dump);
  827. } else if (IS_QLA23XX(ha)) {
  828. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  829. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  830. sizeof(uint16_t);
  831. } else if (IS_FWI2_CAPABLE(ha)) {
  832. if (IS_QLA81XX(ha))
  833. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  834. else if (IS_QLA25XX(ha))
  835. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  836. else
  837. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  838. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  839. sizeof(uint32_t);
  840. if (ha->mqenable)
  841. mq_size = sizeof(struct qla2xxx_mq_chain);
  842. /* Allocate memory for Fibre Channel Event Buffer. */
  843. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  844. goto try_eft;
  845. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  846. GFP_KERNEL);
  847. if (!tc) {
  848. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  849. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  850. goto try_eft;
  851. }
  852. memset(tc, 0, FCE_SIZE);
  853. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  854. ha->fce_mb, &ha->fce_bufs);
  855. if (rval) {
  856. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  857. "FCE (%d).\n", rval);
  858. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  859. tc_dma);
  860. ha->flags.fce_enabled = 0;
  861. goto try_eft;
  862. }
  863. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  864. FCE_SIZE / 1024);
  865. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  866. ha->flags.fce_enabled = 1;
  867. ha->fce_dma = tc_dma;
  868. ha->fce = tc;
  869. try_eft:
  870. /* Allocate memory for Extended Trace Buffer. */
  871. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  872. GFP_KERNEL);
  873. if (!tc) {
  874. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  875. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  876. goto cont_alloc;
  877. }
  878. memset(tc, 0, EFT_SIZE);
  879. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  880. if (rval) {
  881. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  882. "EFT (%d).\n", rval);
  883. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  884. tc_dma);
  885. goto cont_alloc;
  886. }
  887. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  888. EFT_SIZE / 1024);
  889. eft_size = EFT_SIZE;
  890. ha->eft_dma = tc_dma;
  891. ha->eft = tc;
  892. }
  893. cont_alloc:
  894. req_q_size = req->length * sizeof(request_t);
  895. rsp_q_size = rsp->length * sizeof(response_t);
  896. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  897. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  898. ha->chain_offset = dump_size;
  899. dump_size += mq_size + fce_size;
  900. ha->fw_dump = vmalloc(dump_size);
  901. if (!ha->fw_dump) {
  902. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  903. "firmware dump!!!\n", dump_size / 1024);
  904. if (ha->eft) {
  905. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  906. ha->eft_dma);
  907. ha->eft = NULL;
  908. ha->eft_dma = 0;
  909. }
  910. return;
  911. }
  912. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  913. dump_size / 1024);
  914. ha->fw_dump_len = dump_size;
  915. ha->fw_dump->signature[0] = 'Q';
  916. ha->fw_dump->signature[1] = 'L';
  917. ha->fw_dump->signature[2] = 'G';
  918. ha->fw_dump->signature[3] = 'C';
  919. ha->fw_dump->version = __constant_htonl(1);
  920. ha->fw_dump->fixed_size = htonl(fixed_size);
  921. ha->fw_dump->mem_size = htonl(mem_size);
  922. ha->fw_dump->req_q_size = htonl(req_q_size);
  923. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  924. ha->fw_dump->eft_size = htonl(eft_size);
  925. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  926. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  927. ha->fw_dump->header_size =
  928. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  929. }
  930. static int
  931. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  932. {
  933. #define MPS_MASK 0xe0
  934. int rval;
  935. uint16_t dc;
  936. uint32_t dw;
  937. struct qla_hw_data *ha = vha->hw;
  938. if (!IS_QLA81XX(vha->hw))
  939. return QLA_SUCCESS;
  940. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  941. if (rval != QLA_SUCCESS) {
  942. DEBUG2(qla_printk(KERN_WARNING, ha,
  943. "Sync-MPI: Unable to acquire semaphore.\n"));
  944. goto done;
  945. }
  946. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  947. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  948. if (rval != QLA_SUCCESS) {
  949. DEBUG2(qla_printk(KERN_WARNING, ha,
  950. "Sync-MPI: Unable to read sync.\n"));
  951. goto done_release;
  952. }
  953. dc &= MPS_MASK;
  954. if (dc == (dw & MPS_MASK))
  955. goto done_release;
  956. dw &= ~MPS_MASK;
  957. dw |= dc;
  958. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  959. if (rval != QLA_SUCCESS) {
  960. DEBUG2(qla_printk(KERN_WARNING, ha,
  961. "Sync-MPI: Unable to gain sync.\n"));
  962. }
  963. done_release:
  964. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  965. if (rval != QLA_SUCCESS) {
  966. DEBUG2(qla_printk(KERN_WARNING, ha,
  967. "Sync-MPI: Unable to release semaphore.\n"));
  968. }
  969. done:
  970. return rval;
  971. }
  972. /**
  973. * qla2x00_setup_chip() - Load and start RISC firmware.
  974. * @ha: HA context
  975. *
  976. * Returns 0 on success.
  977. */
  978. static int
  979. qla2x00_setup_chip(scsi_qla_host_t *vha)
  980. {
  981. int rval;
  982. uint32_t srisc_address = 0;
  983. struct qla_hw_data *ha = vha->hw;
  984. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  985. unsigned long flags;
  986. uint16_t fw_major_version;
  987. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  988. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  989. spin_lock_irqsave(&ha->hardware_lock, flags);
  990. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  991. RD_REG_WORD(&reg->hccr);
  992. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  993. }
  994. qla81xx_mpi_sync(vha);
  995. /* Load firmware sequences */
  996. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  997. if (rval == QLA_SUCCESS) {
  998. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  999. "code.\n", vha->host_no));
  1000. rval = qla2x00_verify_checksum(vha, srisc_address);
  1001. if (rval == QLA_SUCCESS) {
  1002. /* Start firmware execution. */
  1003. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1004. "firmware.\n", vha->host_no));
  1005. rval = qla2x00_execute_fw(vha, srisc_address);
  1006. /* Retrieve firmware information. */
  1007. if (rval == QLA_SUCCESS) {
  1008. fw_major_version = ha->fw_major_version;
  1009. rval = qla2x00_get_fw_version(vha,
  1010. &ha->fw_major_version,
  1011. &ha->fw_minor_version,
  1012. &ha->fw_subminor_version,
  1013. &ha->fw_attributes, &ha->fw_memory_size,
  1014. ha->mpi_version, &ha->mpi_capabilities,
  1015. ha->phy_version);
  1016. if (rval != QLA_SUCCESS)
  1017. goto failed;
  1018. ha->flags.npiv_supported = 0;
  1019. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1020. (ha->fw_attributes & BIT_2)) {
  1021. ha->flags.npiv_supported = 1;
  1022. if ((!ha->max_npiv_vports) ||
  1023. ((ha->max_npiv_vports + 1) %
  1024. MIN_MULTI_ID_FABRIC))
  1025. ha->max_npiv_vports =
  1026. MIN_MULTI_ID_FABRIC - 1;
  1027. }
  1028. qla2x00_get_resource_cnts(vha, NULL,
  1029. &ha->fw_xcb_count, NULL, NULL,
  1030. &ha->max_npiv_vports, NULL);
  1031. if (!fw_major_version && ql2xallocfwdump)
  1032. qla2x00_alloc_fw_dump(vha);
  1033. }
  1034. } else {
  1035. DEBUG2(printk(KERN_INFO
  1036. "scsi(%ld): ISP Firmware failed checksum.\n",
  1037. vha->host_no));
  1038. }
  1039. }
  1040. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1041. /* Enable proper parity. */
  1042. spin_lock_irqsave(&ha->hardware_lock, flags);
  1043. if (IS_QLA2300(ha))
  1044. /* SRAM parity */
  1045. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1046. else
  1047. /* SRAM, Instruction RAM and GP RAM parity */
  1048. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1049. RD_REG_WORD(&reg->hccr);
  1050. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1051. }
  1052. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1053. uint32_t size;
  1054. rval = qla81xx_fac_get_sector_size(vha, &size);
  1055. if (rval == QLA_SUCCESS) {
  1056. ha->flags.fac_supported = 1;
  1057. ha->fdt_block_size = size << 2;
  1058. } else {
  1059. qla_printk(KERN_ERR, ha,
  1060. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1061. ha->fw_major_version, ha->fw_minor_version,
  1062. ha->fw_subminor_version);
  1063. }
  1064. }
  1065. failed:
  1066. if (rval) {
  1067. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1068. vha->host_no));
  1069. }
  1070. return (rval);
  1071. }
  1072. /**
  1073. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1074. * @ha: HA context
  1075. *
  1076. * Beginning of request ring has initialization control block already built
  1077. * by nvram config routine.
  1078. *
  1079. * Returns 0 on success.
  1080. */
  1081. void
  1082. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1083. {
  1084. uint16_t cnt;
  1085. response_t *pkt;
  1086. rsp->ring_ptr = rsp->ring;
  1087. rsp->ring_index = 0;
  1088. rsp->status_srb = NULL;
  1089. pkt = rsp->ring_ptr;
  1090. for (cnt = 0; cnt < rsp->length; cnt++) {
  1091. pkt->signature = RESPONSE_PROCESSED;
  1092. pkt++;
  1093. }
  1094. }
  1095. /**
  1096. * qla2x00_update_fw_options() - Read and process firmware options.
  1097. * @ha: HA context
  1098. *
  1099. * Returns 0 on success.
  1100. */
  1101. void
  1102. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1103. {
  1104. uint16_t swing, emphasis, tx_sens, rx_sens;
  1105. struct qla_hw_data *ha = vha->hw;
  1106. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1107. qla2x00_get_fw_options(vha, ha->fw_options);
  1108. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1109. return;
  1110. /* Serial Link options. */
  1111. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1112. vha->host_no));
  1113. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1114. sizeof(ha->fw_seriallink_options)));
  1115. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1116. if (ha->fw_seriallink_options[3] & BIT_2) {
  1117. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1118. /* 1G settings */
  1119. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1120. emphasis = (ha->fw_seriallink_options[2] &
  1121. (BIT_4 | BIT_3)) >> 3;
  1122. tx_sens = ha->fw_seriallink_options[0] &
  1123. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1124. rx_sens = (ha->fw_seriallink_options[0] &
  1125. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1126. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1127. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1128. if (rx_sens == 0x0)
  1129. rx_sens = 0x3;
  1130. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1131. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1132. ha->fw_options[10] |= BIT_5 |
  1133. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1134. (tx_sens & (BIT_1 | BIT_0));
  1135. /* 2G settings */
  1136. swing = (ha->fw_seriallink_options[2] &
  1137. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1138. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1139. tx_sens = ha->fw_seriallink_options[1] &
  1140. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1141. rx_sens = (ha->fw_seriallink_options[1] &
  1142. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1143. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1144. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1145. if (rx_sens == 0x0)
  1146. rx_sens = 0x3;
  1147. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1148. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1149. ha->fw_options[11] |= BIT_5 |
  1150. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1151. (tx_sens & (BIT_1 | BIT_0));
  1152. }
  1153. /* FCP2 options. */
  1154. /* Return command IOCBs without waiting for an ABTS to complete. */
  1155. ha->fw_options[3] |= BIT_13;
  1156. /* LED scheme. */
  1157. if (ha->flags.enable_led_scheme)
  1158. ha->fw_options[2] |= BIT_12;
  1159. /* Detect ISP6312. */
  1160. if (IS_QLA6312(ha))
  1161. ha->fw_options[2] |= BIT_13;
  1162. /* Update firmware options. */
  1163. qla2x00_set_fw_options(vha, ha->fw_options);
  1164. }
  1165. void
  1166. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1167. {
  1168. int rval;
  1169. struct qla_hw_data *ha = vha->hw;
  1170. /* Update Serial Link options. */
  1171. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1172. return;
  1173. rval = qla2x00_set_serdes_params(vha,
  1174. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1175. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1176. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1177. if (rval != QLA_SUCCESS) {
  1178. qla_printk(KERN_WARNING, ha,
  1179. "Unable to update Serial Link options (%x).\n", rval);
  1180. }
  1181. }
  1182. void
  1183. qla2x00_config_rings(struct scsi_qla_host *vha)
  1184. {
  1185. struct qla_hw_data *ha = vha->hw;
  1186. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1187. struct req_que *req = ha->req_q_map[0];
  1188. struct rsp_que *rsp = ha->rsp_q_map[0];
  1189. /* Setup ring parameters in initialization control block. */
  1190. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1191. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1192. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1193. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1194. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1195. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1196. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1197. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1198. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1199. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1200. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1201. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1202. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1203. }
  1204. void
  1205. qla24xx_config_rings(struct scsi_qla_host *vha)
  1206. {
  1207. struct qla_hw_data *ha = vha->hw;
  1208. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1209. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1210. struct qla_msix_entry *msix;
  1211. struct init_cb_24xx *icb;
  1212. uint16_t rid = 0;
  1213. struct req_que *req = ha->req_q_map[0];
  1214. struct rsp_que *rsp = ha->rsp_q_map[0];
  1215. /* Setup ring parameters in initialization control block. */
  1216. icb = (struct init_cb_24xx *)ha->init_cb;
  1217. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1218. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1219. icb->request_q_length = cpu_to_le16(req->length);
  1220. icb->response_q_length = cpu_to_le16(rsp->length);
  1221. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1222. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1223. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1224. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1225. if (ha->mqenable) {
  1226. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1227. icb->rid = __constant_cpu_to_le16(rid);
  1228. if (ha->flags.msix_enabled) {
  1229. msix = &ha->msix_entries[1];
  1230. DEBUG2_17(printk(KERN_INFO
  1231. "Registering vector 0x%x for base que\n", msix->entry));
  1232. icb->msix = cpu_to_le16(msix->entry);
  1233. }
  1234. /* Use alternate PCI bus number */
  1235. if (MSB(rid))
  1236. icb->firmware_options_2 |=
  1237. __constant_cpu_to_le32(BIT_19);
  1238. /* Use alternate PCI devfn */
  1239. if (LSB(rid))
  1240. icb->firmware_options_2 |=
  1241. __constant_cpu_to_le32(BIT_18);
  1242. /* Use Disable MSIX Handshake mode for capable adapters */
  1243. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1244. icb->firmware_options_2 &=
  1245. __constant_cpu_to_le32(~BIT_22);
  1246. ha->flags.disable_msix_handshake = 1;
  1247. qla_printk(KERN_INFO, ha,
  1248. "MSIX Handshake Disable Mode turned on\n");
  1249. } else {
  1250. icb->firmware_options_2 |=
  1251. __constant_cpu_to_le32(BIT_22);
  1252. }
  1253. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1254. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1255. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1256. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1257. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1258. } else {
  1259. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1260. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1261. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1262. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1263. }
  1264. /* PCI posting */
  1265. RD_REG_DWORD(&ioreg->hccr);
  1266. }
  1267. /**
  1268. * qla2x00_init_rings() - Initializes firmware.
  1269. * @ha: HA context
  1270. *
  1271. * Beginning of request ring has initialization control block already built
  1272. * by nvram config routine.
  1273. *
  1274. * Returns 0 on success.
  1275. */
  1276. static int
  1277. qla2x00_init_rings(scsi_qla_host_t *vha)
  1278. {
  1279. int rval;
  1280. unsigned long flags = 0;
  1281. int cnt, que;
  1282. struct qla_hw_data *ha = vha->hw;
  1283. struct req_que *req;
  1284. struct rsp_que *rsp;
  1285. struct scsi_qla_host *vp;
  1286. struct mid_init_cb_24xx *mid_init_cb =
  1287. (struct mid_init_cb_24xx *) ha->init_cb;
  1288. spin_lock_irqsave(&ha->hardware_lock, flags);
  1289. /* Clear outstanding commands array. */
  1290. for (que = 0; que < ha->max_req_queues; que++) {
  1291. req = ha->req_q_map[que];
  1292. if (!req)
  1293. continue;
  1294. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1295. req->outstanding_cmds[cnt] = NULL;
  1296. req->current_outstanding_cmd = 1;
  1297. /* Initialize firmware. */
  1298. req->ring_ptr = req->ring;
  1299. req->ring_index = 0;
  1300. req->cnt = req->length;
  1301. }
  1302. for (que = 0; que < ha->max_rsp_queues; que++) {
  1303. rsp = ha->rsp_q_map[que];
  1304. if (!rsp)
  1305. continue;
  1306. /* Initialize response queue entries */
  1307. qla2x00_init_response_q_entries(rsp);
  1308. }
  1309. /* Clear RSCN queue. */
  1310. list_for_each_entry(vp, &ha->vp_list, list) {
  1311. vp->rscn_in_ptr = 0;
  1312. vp->rscn_out_ptr = 0;
  1313. }
  1314. ha->isp_ops->config_rings(vha);
  1315. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1316. /* Update any ISP specific firmware options before initialization. */
  1317. ha->isp_ops->update_fw_options(vha);
  1318. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1319. if (ha->flags.npiv_supported) {
  1320. if (ha->operating_mode == LOOP)
  1321. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1322. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1323. }
  1324. if (IS_FWI2_CAPABLE(ha)) {
  1325. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1326. mid_init_cb->init_cb.execution_throttle =
  1327. cpu_to_le16(ha->fw_xcb_count);
  1328. }
  1329. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1330. if (rval) {
  1331. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1332. vha->host_no));
  1333. } else {
  1334. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1335. vha->host_no));
  1336. }
  1337. return (rval);
  1338. }
  1339. /**
  1340. * qla2x00_fw_ready() - Waits for firmware ready.
  1341. * @ha: HA context
  1342. *
  1343. * Returns 0 on success.
  1344. */
  1345. static int
  1346. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1347. {
  1348. int rval;
  1349. unsigned long wtime, mtime, cs84xx_time;
  1350. uint16_t min_wait; /* Minimum wait time if loop is down */
  1351. uint16_t wait_time; /* Wait time if loop is coming ready */
  1352. uint16_t state[5];
  1353. struct qla_hw_data *ha = vha->hw;
  1354. rval = QLA_SUCCESS;
  1355. /* 20 seconds for loop down. */
  1356. min_wait = 20;
  1357. /*
  1358. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1359. * our own processing.
  1360. */
  1361. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1362. wait_time = min_wait;
  1363. }
  1364. /* Min wait time if loop down */
  1365. mtime = jiffies + (min_wait * HZ);
  1366. /* wait time before firmware ready */
  1367. wtime = jiffies + (wait_time * HZ);
  1368. /* Wait for ISP to finish LIP */
  1369. if (!vha->flags.init_done)
  1370. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1371. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1372. vha->host_no));
  1373. do {
  1374. rval = qla2x00_get_firmware_state(vha, state);
  1375. if (rval == QLA_SUCCESS) {
  1376. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1377. vha->device_flags &= ~DFLG_NO_CABLE;
  1378. }
  1379. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1380. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1381. "84xx=%x.\n", vha->host_no, state[0],
  1382. state[2]));
  1383. if ((state[2] & FSTATE_LOGGED_IN) &&
  1384. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1385. DEBUG16(printk("scsi(%ld): Sending "
  1386. "verify iocb.\n", vha->host_no));
  1387. cs84xx_time = jiffies;
  1388. rval = qla84xx_init_chip(vha);
  1389. if (rval != QLA_SUCCESS)
  1390. break;
  1391. /* Add time taken to initialize. */
  1392. cs84xx_time = jiffies - cs84xx_time;
  1393. wtime += cs84xx_time;
  1394. mtime += cs84xx_time;
  1395. DEBUG16(printk("scsi(%ld): Increasing "
  1396. "wait time by %ld. New time %ld\n",
  1397. vha->host_no, cs84xx_time, wtime));
  1398. }
  1399. } else if (state[0] == FSTATE_READY) {
  1400. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1401. vha->host_no));
  1402. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1403. &ha->login_timeout, &ha->r_a_tov);
  1404. rval = QLA_SUCCESS;
  1405. break;
  1406. }
  1407. rval = QLA_FUNCTION_FAILED;
  1408. if (atomic_read(&vha->loop_down_timer) &&
  1409. state[0] != FSTATE_READY) {
  1410. /* Loop down. Timeout on min_wait for states
  1411. * other than Wait for Login.
  1412. */
  1413. if (time_after_eq(jiffies, mtime)) {
  1414. qla_printk(KERN_INFO, ha,
  1415. "Cable is unplugged...\n");
  1416. vha->device_flags |= DFLG_NO_CABLE;
  1417. break;
  1418. }
  1419. }
  1420. } else {
  1421. /* Mailbox cmd failed. Timeout on min_wait. */
  1422. if (time_after_eq(jiffies, mtime))
  1423. break;
  1424. }
  1425. if (time_after_eq(jiffies, wtime))
  1426. break;
  1427. /* Delay for a while */
  1428. msleep(500);
  1429. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1430. vha->host_no, state[0], jiffies));
  1431. } while (1);
  1432. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1433. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1434. jiffies));
  1435. if (rval) {
  1436. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1437. vha->host_no));
  1438. }
  1439. return (rval);
  1440. }
  1441. /*
  1442. * qla2x00_configure_hba
  1443. * Setup adapter context.
  1444. *
  1445. * Input:
  1446. * ha = adapter state pointer.
  1447. *
  1448. * Returns:
  1449. * 0 = success
  1450. *
  1451. * Context:
  1452. * Kernel context.
  1453. */
  1454. static int
  1455. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1456. {
  1457. int rval;
  1458. uint16_t loop_id;
  1459. uint16_t topo;
  1460. uint16_t sw_cap;
  1461. uint8_t al_pa;
  1462. uint8_t area;
  1463. uint8_t domain;
  1464. char connect_type[22];
  1465. struct qla_hw_data *ha = vha->hw;
  1466. /* Get host addresses. */
  1467. rval = qla2x00_get_adapter_id(vha,
  1468. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1469. if (rval != QLA_SUCCESS) {
  1470. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1471. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1472. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1473. __func__, vha->host_no));
  1474. } else {
  1475. qla_printk(KERN_WARNING, ha,
  1476. "ERROR -- Unable to get host loop ID.\n");
  1477. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1478. }
  1479. return (rval);
  1480. }
  1481. if (topo == 4) {
  1482. qla_printk(KERN_INFO, ha,
  1483. "Cannot get topology - retrying.\n");
  1484. return (QLA_FUNCTION_FAILED);
  1485. }
  1486. vha->loop_id = loop_id;
  1487. /* initialize */
  1488. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1489. ha->operating_mode = LOOP;
  1490. ha->switch_cap = 0;
  1491. switch (topo) {
  1492. case 0:
  1493. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1494. vha->host_no));
  1495. ha->current_topology = ISP_CFG_NL;
  1496. strcpy(connect_type, "(Loop)");
  1497. break;
  1498. case 1:
  1499. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1500. vha->host_no));
  1501. ha->switch_cap = sw_cap;
  1502. ha->current_topology = ISP_CFG_FL;
  1503. strcpy(connect_type, "(FL_Port)");
  1504. break;
  1505. case 2:
  1506. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1507. vha->host_no));
  1508. ha->operating_mode = P2P;
  1509. ha->current_topology = ISP_CFG_N;
  1510. strcpy(connect_type, "(N_Port-to-N_Port)");
  1511. break;
  1512. case 3:
  1513. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1514. vha->host_no));
  1515. ha->switch_cap = sw_cap;
  1516. ha->operating_mode = P2P;
  1517. ha->current_topology = ISP_CFG_F;
  1518. strcpy(connect_type, "(F_Port)");
  1519. break;
  1520. default:
  1521. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1522. "Using NL.\n",
  1523. vha->host_no, topo));
  1524. ha->current_topology = ISP_CFG_NL;
  1525. strcpy(connect_type, "(Loop)");
  1526. break;
  1527. }
  1528. /* Save Host port and loop ID. */
  1529. /* byte order - Big Endian */
  1530. vha->d_id.b.domain = domain;
  1531. vha->d_id.b.area = area;
  1532. vha->d_id.b.al_pa = al_pa;
  1533. if (!vha->flags.init_done)
  1534. qla_printk(KERN_INFO, ha,
  1535. "Topology - %s, Host Loop address 0x%x\n",
  1536. connect_type, vha->loop_id);
  1537. if (rval) {
  1538. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1539. } else {
  1540. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1541. }
  1542. return(rval);
  1543. }
  1544. static inline void
  1545. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1546. char *def)
  1547. {
  1548. char *st, *en;
  1549. uint16_t index;
  1550. struct qla_hw_data *ha = vha->hw;
  1551. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1552. !IS_QLA81XX(ha);
  1553. if (memcmp(model, BINZERO, len) != 0) {
  1554. strncpy(ha->model_number, model, len);
  1555. st = en = ha->model_number;
  1556. en += len - 1;
  1557. while (en > st) {
  1558. if (*en != 0x20 && *en != 0x00)
  1559. break;
  1560. *en-- = '\0';
  1561. }
  1562. index = (ha->pdev->subsystem_device & 0xff);
  1563. if (use_tbl &&
  1564. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1565. index < QLA_MODEL_NAMES)
  1566. strncpy(ha->model_desc,
  1567. qla2x00_model_name[index * 2 + 1],
  1568. sizeof(ha->model_desc) - 1);
  1569. } else {
  1570. index = (ha->pdev->subsystem_device & 0xff);
  1571. if (use_tbl &&
  1572. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1573. index < QLA_MODEL_NAMES) {
  1574. strcpy(ha->model_number,
  1575. qla2x00_model_name[index * 2]);
  1576. strncpy(ha->model_desc,
  1577. qla2x00_model_name[index * 2 + 1],
  1578. sizeof(ha->model_desc) - 1);
  1579. } else {
  1580. strcpy(ha->model_number, def);
  1581. }
  1582. }
  1583. if (IS_FWI2_CAPABLE(ha))
  1584. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1585. sizeof(ha->model_desc));
  1586. }
  1587. /* On sparc systems, obtain port and node WWN from firmware
  1588. * properties.
  1589. */
  1590. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1591. {
  1592. #ifdef CONFIG_SPARC
  1593. struct qla_hw_data *ha = vha->hw;
  1594. struct pci_dev *pdev = ha->pdev;
  1595. struct device_node *dp = pci_device_to_OF_node(pdev);
  1596. const u8 *val;
  1597. int len;
  1598. val = of_get_property(dp, "port-wwn", &len);
  1599. if (val && len >= WWN_SIZE)
  1600. memcpy(nv->port_name, val, WWN_SIZE);
  1601. val = of_get_property(dp, "node-wwn", &len);
  1602. if (val && len >= WWN_SIZE)
  1603. memcpy(nv->node_name, val, WWN_SIZE);
  1604. #endif
  1605. }
  1606. /*
  1607. * NVRAM configuration for ISP 2xxx
  1608. *
  1609. * Input:
  1610. * ha = adapter block pointer.
  1611. *
  1612. * Output:
  1613. * initialization control block in response_ring
  1614. * host adapters parameters in host adapter block
  1615. *
  1616. * Returns:
  1617. * 0 = success.
  1618. */
  1619. int
  1620. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1621. {
  1622. int rval;
  1623. uint8_t chksum = 0;
  1624. uint16_t cnt;
  1625. uint8_t *dptr1, *dptr2;
  1626. struct qla_hw_data *ha = vha->hw;
  1627. init_cb_t *icb = ha->init_cb;
  1628. nvram_t *nv = ha->nvram;
  1629. uint8_t *ptr = ha->nvram;
  1630. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1631. rval = QLA_SUCCESS;
  1632. /* Determine NVRAM starting address. */
  1633. ha->nvram_size = sizeof(nvram_t);
  1634. ha->nvram_base = 0;
  1635. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1636. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1637. ha->nvram_base = 0x80;
  1638. /* Get NVRAM data and calculate checksum. */
  1639. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1640. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1641. chksum += *ptr++;
  1642. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1643. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1644. /* Bad NVRAM data, set defaults parameters. */
  1645. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1646. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1647. /* Reset NVRAM data. */
  1648. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1649. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1650. nv->nvram_version);
  1651. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1652. "invalid -- WWPN) defaults.\n");
  1653. /*
  1654. * Set default initialization control block.
  1655. */
  1656. memset(nv, 0, ha->nvram_size);
  1657. nv->parameter_block_version = ICB_VERSION;
  1658. if (IS_QLA23XX(ha)) {
  1659. nv->firmware_options[0] = BIT_2 | BIT_1;
  1660. nv->firmware_options[1] = BIT_7 | BIT_5;
  1661. nv->add_firmware_options[0] = BIT_5;
  1662. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1663. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1664. nv->special_options[1] = BIT_7;
  1665. } else if (IS_QLA2200(ha)) {
  1666. nv->firmware_options[0] = BIT_2 | BIT_1;
  1667. nv->firmware_options[1] = BIT_7 | BIT_5;
  1668. nv->add_firmware_options[0] = BIT_5;
  1669. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1670. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1671. } else if (IS_QLA2100(ha)) {
  1672. nv->firmware_options[0] = BIT_3 | BIT_1;
  1673. nv->firmware_options[1] = BIT_5;
  1674. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1675. }
  1676. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1677. nv->execution_throttle = __constant_cpu_to_le16(16);
  1678. nv->retry_count = 8;
  1679. nv->retry_delay = 1;
  1680. nv->port_name[0] = 33;
  1681. nv->port_name[3] = 224;
  1682. nv->port_name[4] = 139;
  1683. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1684. nv->login_timeout = 4;
  1685. /*
  1686. * Set default host adapter parameters
  1687. */
  1688. nv->host_p[1] = BIT_2;
  1689. nv->reset_delay = 5;
  1690. nv->port_down_retry_count = 8;
  1691. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1692. nv->link_down_timeout = 60;
  1693. rval = 1;
  1694. }
  1695. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1696. /*
  1697. * The SN2 does not provide BIOS emulation which means you can't change
  1698. * potentially bogus BIOS settings. Force the use of default settings
  1699. * for link rate and frame size. Hope that the rest of the settings
  1700. * are valid.
  1701. */
  1702. if (ia64_platform_is("sn2")) {
  1703. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1704. if (IS_QLA23XX(ha))
  1705. nv->special_options[1] = BIT_7;
  1706. }
  1707. #endif
  1708. /* Reset Initialization control block */
  1709. memset(icb, 0, ha->init_cb_size);
  1710. /*
  1711. * Setup driver NVRAM options.
  1712. */
  1713. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1714. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1715. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1716. nv->firmware_options[1] &= ~BIT_4;
  1717. if (IS_QLA23XX(ha)) {
  1718. nv->firmware_options[0] |= BIT_2;
  1719. nv->firmware_options[0] &= ~BIT_3;
  1720. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1721. if (IS_QLA2300(ha)) {
  1722. if (ha->fb_rev == FPM_2310) {
  1723. strcpy(ha->model_number, "QLA2310");
  1724. } else {
  1725. strcpy(ha->model_number, "QLA2300");
  1726. }
  1727. } else {
  1728. qla2x00_set_model_info(vha, nv->model_number,
  1729. sizeof(nv->model_number), "QLA23xx");
  1730. }
  1731. } else if (IS_QLA2200(ha)) {
  1732. nv->firmware_options[0] |= BIT_2;
  1733. /*
  1734. * 'Point-to-point preferred, else loop' is not a safe
  1735. * connection mode setting.
  1736. */
  1737. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1738. (BIT_5 | BIT_4)) {
  1739. /* Force 'loop preferred, else point-to-point'. */
  1740. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1741. nv->add_firmware_options[0] |= BIT_5;
  1742. }
  1743. strcpy(ha->model_number, "QLA22xx");
  1744. } else /*if (IS_QLA2100(ha))*/ {
  1745. strcpy(ha->model_number, "QLA2100");
  1746. }
  1747. /*
  1748. * Copy over NVRAM RISC parameter block to initialization control block.
  1749. */
  1750. dptr1 = (uint8_t *)icb;
  1751. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1752. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1753. while (cnt--)
  1754. *dptr1++ = *dptr2++;
  1755. /* Copy 2nd half. */
  1756. dptr1 = (uint8_t *)icb->add_firmware_options;
  1757. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1758. while (cnt--)
  1759. *dptr1++ = *dptr2++;
  1760. /* Use alternate WWN? */
  1761. if (nv->host_p[1] & BIT_7) {
  1762. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1763. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1764. }
  1765. /* Prepare nodename */
  1766. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1767. /*
  1768. * Firmware will apply the following mask if the nodename was
  1769. * not provided.
  1770. */
  1771. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1772. icb->node_name[0] &= 0xF0;
  1773. }
  1774. /*
  1775. * Set host adapter parameters.
  1776. */
  1777. if (nv->host_p[0] & BIT_7)
  1778. ql2xextended_error_logging = 1;
  1779. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1780. /* Always load RISC code on non ISP2[12]00 chips. */
  1781. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1782. ha->flags.disable_risc_code_load = 0;
  1783. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1784. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1785. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1786. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1787. ha->flags.disable_serdes = 0;
  1788. ha->operating_mode =
  1789. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1790. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1791. sizeof(ha->fw_seriallink_options));
  1792. /* save HBA serial number */
  1793. ha->serial0 = icb->port_name[5];
  1794. ha->serial1 = icb->port_name[6];
  1795. ha->serial2 = icb->port_name[7];
  1796. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1797. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1798. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1799. ha->retry_count = nv->retry_count;
  1800. /* Set minimum login_timeout to 4 seconds. */
  1801. if (nv->login_timeout < ql2xlogintimeout)
  1802. nv->login_timeout = ql2xlogintimeout;
  1803. if (nv->login_timeout < 4)
  1804. nv->login_timeout = 4;
  1805. ha->login_timeout = nv->login_timeout;
  1806. icb->login_timeout = nv->login_timeout;
  1807. /* Set minimum RATOV to 100 tenths of a second. */
  1808. ha->r_a_tov = 100;
  1809. ha->loop_reset_delay = nv->reset_delay;
  1810. /* Link Down Timeout = 0:
  1811. *
  1812. * When Port Down timer expires we will start returning
  1813. * I/O's to OS with "DID_NO_CONNECT".
  1814. *
  1815. * Link Down Timeout != 0:
  1816. *
  1817. * The driver waits for the link to come up after link down
  1818. * before returning I/Os to OS with "DID_NO_CONNECT".
  1819. */
  1820. if (nv->link_down_timeout == 0) {
  1821. ha->loop_down_abort_time =
  1822. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1823. } else {
  1824. ha->link_down_timeout = nv->link_down_timeout;
  1825. ha->loop_down_abort_time =
  1826. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1827. }
  1828. /*
  1829. * Need enough time to try and get the port back.
  1830. */
  1831. ha->port_down_retry_count = nv->port_down_retry_count;
  1832. if (qlport_down_retry)
  1833. ha->port_down_retry_count = qlport_down_retry;
  1834. /* Set login_retry_count */
  1835. ha->login_retry_count = nv->retry_count;
  1836. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1837. ha->port_down_retry_count > 3)
  1838. ha->login_retry_count = ha->port_down_retry_count;
  1839. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1840. ha->login_retry_count = ha->port_down_retry_count;
  1841. if (ql2xloginretrycount)
  1842. ha->login_retry_count = ql2xloginretrycount;
  1843. icb->lun_enables = __constant_cpu_to_le16(0);
  1844. icb->command_resource_count = 0;
  1845. icb->immediate_notify_resource_count = 0;
  1846. icb->timeout = __constant_cpu_to_le16(0);
  1847. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1848. /* Enable RIO */
  1849. icb->firmware_options[0] &= ~BIT_3;
  1850. icb->add_firmware_options[0] &=
  1851. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1852. icb->add_firmware_options[0] |= BIT_2;
  1853. icb->response_accumulation_timer = 3;
  1854. icb->interrupt_delay_timer = 5;
  1855. vha->flags.process_response_queue = 1;
  1856. } else {
  1857. /* Enable ZIO. */
  1858. if (!vha->flags.init_done) {
  1859. ha->zio_mode = icb->add_firmware_options[0] &
  1860. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1861. ha->zio_timer = icb->interrupt_delay_timer ?
  1862. icb->interrupt_delay_timer: 2;
  1863. }
  1864. icb->add_firmware_options[0] &=
  1865. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1866. vha->flags.process_response_queue = 0;
  1867. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1868. ha->zio_mode = QLA_ZIO_MODE_6;
  1869. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1870. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1871. ha->zio_timer * 100));
  1872. qla_printk(KERN_INFO, ha,
  1873. "ZIO mode %d enabled; timer delay (%d us).\n",
  1874. ha->zio_mode, ha->zio_timer * 100);
  1875. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1876. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1877. vha->flags.process_response_queue = 1;
  1878. }
  1879. }
  1880. if (rval) {
  1881. DEBUG2_3(printk(KERN_WARNING
  1882. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1883. }
  1884. return (rval);
  1885. }
  1886. static void
  1887. qla2x00_rport_del(void *data)
  1888. {
  1889. fc_port_t *fcport = data;
  1890. struct fc_rport *rport;
  1891. spin_lock_irq(fcport->vha->host->host_lock);
  1892. rport = fcport->drport ? fcport->drport: fcport->rport;
  1893. fcport->drport = NULL;
  1894. spin_unlock_irq(fcport->vha->host->host_lock);
  1895. if (rport)
  1896. fc_remote_port_delete(rport);
  1897. }
  1898. /**
  1899. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1900. * @ha: HA context
  1901. * @flags: allocation flags
  1902. *
  1903. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1904. */
  1905. fc_port_t *
  1906. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1907. {
  1908. fc_port_t *fcport;
  1909. fcport = kzalloc(sizeof(fc_port_t), flags);
  1910. if (!fcport)
  1911. return NULL;
  1912. /* Setup fcport template structure. */
  1913. fcport->vha = vha;
  1914. fcport->vp_idx = vha->vp_idx;
  1915. fcport->port_type = FCT_UNKNOWN;
  1916. fcport->loop_id = FC_NO_LOOP_ID;
  1917. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1918. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1919. return fcport;
  1920. }
  1921. /*
  1922. * qla2x00_configure_loop
  1923. * Updates Fibre Channel Device Database with what is actually on loop.
  1924. *
  1925. * Input:
  1926. * ha = adapter block pointer.
  1927. *
  1928. * Returns:
  1929. * 0 = success.
  1930. * 1 = error.
  1931. * 2 = database was full and device was not configured.
  1932. */
  1933. static int
  1934. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1935. {
  1936. int rval;
  1937. unsigned long flags, save_flags;
  1938. struct qla_hw_data *ha = vha->hw;
  1939. rval = QLA_SUCCESS;
  1940. /* Get Initiator ID */
  1941. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1942. rval = qla2x00_configure_hba(vha);
  1943. if (rval != QLA_SUCCESS) {
  1944. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1945. vha->host_no));
  1946. return (rval);
  1947. }
  1948. }
  1949. save_flags = flags = vha->dpc_flags;
  1950. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1951. vha->host_no, flags));
  1952. /*
  1953. * If we have both an RSCN and PORT UPDATE pending then handle them
  1954. * both at the same time.
  1955. */
  1956. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1957. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1958. qla2x00_get_data_rate(vha);
  1959. /* Determine what we need to do */
  1960. if (ha->current_topology == ISP_CFG_FL &&
  1961. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1962. vha->flags.rscn_queue_overflow = 1;
  1963. set_bit(RSCN_UPDATE, &flags);
  1964. } else if (ha->current_topology == ISP_CFG_F &&
  1965. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1966. vha->flags.rscn_queue_overflow = 1;
  1967. set_bit(RSCN_UPDATE, &flags);
  1968. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1969. } else if (ha->current_topology == ISP_CFG_N) {
  1970. clear_bit(RSCN_UPDATE, &flags);
  1971. } else if (!vha->flags.online ||
  1972. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1973. vha->flags.rscn_queue_overflow = 1;
  1974. set_bit(RSCN_UPDATE, &flags);
  1975. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1976. }
  1977. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1978. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1979. rval = QLA_FUNCTION_FAILED;
  1980. else
  1981. rval = qla2x00_configure_local_loop(vha);
  1982. }
  1983. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1984. if (LOOP_TRANSITION(vha))
  1985. rval = QLA_FUNCTION_FAILED;
  1986. else
  1987. rval = qla2x00_configure_fabric(vha);
  1988. }
  1989. if (rval == QLA_SUCCESS) {
  1990. if (atomic_read(&vha->loop_down_timer) ||
  1991. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1992. rval = QLA_FUNCTION_FAILED;
  1993. } else {
  1994. atomic_set(&vha->loop_state, LOOP_READY);
  1995. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1996. }
  1997. }
  1998. if (rval) {
  1999. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2000. __func__, vha->host_no));
  2001. } else {
  2002. DEBUG3(printk("%s: exiting normally\n", __func__));
  2003. }
  2004. /* Restore state if a resync event occurred during processing */
  2005. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2006. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2007. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2008. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2009. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2010. vha->flags.rscn_queue_overflow = 1;
  2011. }
  2012. }
  2013. return (rval);
  2014. }
  2015. /*
  2016. * qla2x00_configure_local_loop
  2017. * Updates Fibre Channel Device Database with local loop devices.
  2018. *
  2019. * Input:
  2020. * ha = adapter block pointer.
  2021. *
  2022. * Returns:
  2023. * 0 = success.
  2024. */
  2025. static int
  2026. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2027. {
  2028. int rval, rval2;
  2029. int found_devs;
  2030. int found;
  2031. fc_port_t *fcport, *new_fcport;
  2032. uint16_t index;
  2033. uint16_t entries;
  2034. char *id_iter;
  2035. uint16_t loop_id;
  2036. uint8_t domain, area, al_pa;
  2037. struct qla_hw_data *ha = vha->hw;
  2038. found_devs = 0;
  2039. new_fcport = NULL;
  2040. entries = MAX_FIBRE_DEVICES;
  2041. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2042. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2043. /* Get list of logged in devices. */
  2044. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2045. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2046. &entries);
  2047. if (rval != QLA_SUCCESS)
  2048. goto cleanup_allocation;
  2049. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2050. vha->host_no, entries));
  2051. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2052. entries * sizeof(struct gid_list_info)));
  2053. /* Allocate temporary fcport for any new fcports discovered. */
  2054. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2055. if (new_fcport == NULL) {
  2056. rval = QLA_MEMORY_ALLOC_FAILED;
  2057. goto cleanup_allocation;
  2058. }
  2059. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2060. /*
  2061. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2062. */
  2063. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2064. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2065. fcport->port_type != FCT_BROADCAST &&
  2066. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2067. DEBUG(printk("scsi(%ld): Marking port lost, "
  2068. "loop_id=0x%04x\n",
  2069. vha->host_no, fcport->loop_id));
  2070. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2071. }
  2072. }
  2073. /* Add devices to port list. */
  2074. id_iter = (char *)ha->gid_list;
  2075. for (index = 0; index < entries; index++) {
  2076. domain = ((struct gid_list_info *)id_iter)->domain;
  2077. area = ((struct gid_list_info *)id_iter)->area;
  2078. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2079. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2080. loop_id = (uint16_t)
  2081. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2082. else
  2083. loop_id = le16_to_cpu(
  2084. ((struct gid_list_info *)id_iter)->loop_id);
  2085. id_iter += ha->gid_list_info_size;
  2086. /* Bypass reserved domain fields. */
  2087. if ((domain & 0xf0) == 0xf0)
  2088. continue;
  2089. /* Bypass if not same domain and area of adapter. */
  2090. if (area && domain &&
  2091. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2092. continue;
  2093. /* Bypass invalid local loop ID. */
  2094. if (loop_id > LAST_LOCAL_LOOP_ID)
  2095. continue;
  2096. /* Fill in member data. */
  2097. new_fcport->d_id.b.domain = domain;
  2098. new_fcport->d_id.b.area = area;
  2099. new_fcport->d_id.b.al_pa = al_pa;
  2100. new_fcport->loop_id = loop_id;
  2101. new_fcport->vp_idx = vha->vp_idx;
  2102. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2103. if (rval2 != QLA_SUCCESS) {
  2104. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2105. "information -- get_port_database=%x, "
  2106. "loop_id=0x%04x\n",
  2107. vha->host_no, rval2, new_fcport->loop_id));
  2108. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2109. vha->host_no));
  2110. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2111. continue;
  2112. }
  2113. /* Check for matching device in port list. */
  2114. found = 0;
  2115. fcport = NULL;
  2116. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2117. if (memcmp(new_fcport->port_name, fcport->port_name,
  2118. WWN_SIZE))
  2119. continue;
  2120. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2121. fcport->loop_id = new_fcport->loop_id;
  2122. fcport->port_type = new_fcport->port_type;
  2123. fcport->d_id.b24 = new_fcport->d_id.b24;
  2124. memcpy(fcport->node_name, new_fcport->node_name,
  2125. WWN_SIZE);
  2126. found++;
  2127. break;
  2128. }
  2129. if (!found) {
  2130. /* New device, add to fcports list. */
  2131. if (vha->vp_idx) {
  2132. new_fcport->vha = vha;
  2133. new_fcport->vp_idx = vha->vp_idx;
  2134. }
  2135. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2136. /* Allocate a new replacement fcport. */
  2137. fcport = new_fcport;
  2138. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2139. if (new_fcport == NULL) {
  2140. rval = QLA_MEMORY_ALLOC_FAILED;
  2141. goto cleanup_allocation;
  2142. }
  2143. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2144. }
  2145. /* Base iIDMA settings on HBA port speed. */
  2146. fcport->fp_speed = ha->link_data_rate;
  2147. qla2x00_update_fcport(vha, fcport);
  2148. found_devs++;
  2149. }
  2150. cleanup_allocation:
  2151. kfree(new_fcport);
  2152. if (rval != QLA_SUCCESS) {
  2153. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2154. "rval=%x\n", vha->host_no, rval));
  2155. }
  2156. return (rval);
  2157. }
  2158. static void
  2159. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2160. {
  2161. #define LS_UNKNOWN 2
  2162. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2163. char *link_speed;
  2164. int rval;
  2165. uint16_t mb[4];
  2166. struct qla_hw_data *ha = vha->hw;
  2167. if (!IS_IIDMA_CAPABLE(ha))
  2168. return;
  2169. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2170. fcport->fp_speed > ha->link_data_rate)
  2171. return;
  2172. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2173. mb);
  2174. if (rval != QLA_SUCCESS) {
  2175. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2176. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2177. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2178. fcport->port_name[2], fcport->port_name[3],
  2179. fcport->port_name[4], fcport->port_name[5],
  2180. fcport->port_name[6], fcport->port_name[7], rval,
  2181. fcport->fp_speed, mb[0], mb[1]));
  2182. } else {
  2183. link_speed = link_speeds[LS_UNKNOWN];
  2184. if (fcport->fp_speed < 5)
  2185. link_speed = link_speeds[fcport->fp_speed];
  2186. else if (fcport->fp_speed == 0x13)
  2187. link_speed = link_speeds[5];
  2188. DEBUG2(qla_printk(KERN_INFO, ha,
  2189. "iIDMA adjusted to %s GB/s on "
  2190. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2191. link_speed, fcport->port_name[0],
  2192. fcport->port_name[1], fcport->port_name[2],
  2193. fcport->port_name[3], fcport->port_name[4],
  2194. fcport->port_name[5], fcport->port_name[6],
  2195. fcport->port_name[7]));
  2196. }
  2197. }
  2198. static void
  2199. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2200. {
  2201. struct fc_rport_identifiers rport_ids;
  2202. struct fc_rport *rport;
  2203. struct qla_hw_data *ha = vha->hw;
  2204. qla2x00_rport_del(fcport);
  2205. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2206. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2207. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2208. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2209. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2210. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2211. if (!rport) {
  2212. qla_printk(KERN_WARNING, ha,
  2213. "Unable to allocate fc remote port!\n");
  2214. return;
  2215. }
  2216. spin_lock_irq(fcport->vha->host->host_lock);
  2217. *((fc_port_t **)rport->dd_data) = fcport;
  2218. spin_unlock_irq(fcport->vha->host->host_lock);
  2219. rport->supported_classes = fcport->supported_classes;
  2220. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2221. if (fcport->port_type == FCT_INITIATOR)
  2222. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2223. if (fcport->port_type == FCT_TARGET)
  2224. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2225. fc_remote_port_rolechg(rport, rport_ids.roles);
  2226. }
  2227. /*
  2228. * qla2x00_update_fcport
  2229. * Updates device on list.
  2230. *
  2231. * Input:
  2232. * ha = adapter block pointer.
  2233. * fcport = port structure pointer.
  2234. *
  2235. * Return:
  2236. * 0 - Success
  2237. * BIT_0 - error
  2238. *
  2239. * Context:
  2240. * Kernel context.
  2241. */
  2242. void
  2243. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2244. {
  2245. struct qla_hw_data *ha = vha->hw;
  2246. fcport->vha = vha;
  2247. fcport->login_retry = 0;
  2248. fcport->port_login_retry_count = ha->port_down_retry_count *
  2249. PORT_RETRY_TIME;
  2250. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2251. PORT_RETRY_TIME);
  2252. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2253. qla2x00_iidma_fcport(vha, fcport);
  2254. atomic_set(&fcport->state, FCS_ONLINE);
  2255. qla2x00_reg_remote_port(vha, fcport);
  2256. }
  2257. /*
  2258. * qla2x00_configure_fabric
  2259. * Setup SNS devices with loop ID's.
  2260. *
  2261. * Input:
  2262. * ha = adapter block pointer.
  2263. *
  2264. * Returns:
  2265. * 0 = success.
  2266. * BIT_0 = error
  2267. */
  2268. static int
  2269. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2270. {
  2271. int rval, rval2;
  2272. fc_port_t *fcport, *fcptemp;
  2273. uint16_t next_loopid;
  2274. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2275. uint16_t loop_id;
  2276. LIST_HEAD(new_fcports);
  2277. struct qla_hw_data *ha = vha->hw;
  2278. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2279. /* If FL port exists, then SNS is present */
  2280. if (IS_FWI2_CAPABLE(ha))
  2281. loop_id = NPH_F_PORT;
  2282. else
  2283. loop_id = SNS_FL_PORT;
  2284. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2285. if (rval != QLA_SUCCESS) {
  2286. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2287. "Port\n", vha->host_no));
  2288. vha->device_flags &= ~SWITCH_FOUND;
  2289. return (QLA_SUCCESS);
  2290. }
  2291. vha->device_flags |= SWITCH_FOUND;
  2292. /* Mark devices that need re-synchronization. */
  2293. rval2 = qla2x00_device_resync(vha);
  2294. if (rval2 == QLA_RSCNS_HANDLED) {
  2295. /* No point doing the scan, just continue. */
  2296. return (QLA_SUCCESS);
  2297. }
  2298. do {
  2299. /* FDMI support. */
  2300. if (ql2xfdmienable &&
  2301. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2302. qla2x00_fdmi_register(vha);
  2303. /* Ensure we are logged into the SNS. */
  2304. if (IS_FWI2_CAPABLE(ha))
  2305. loop_id = NPH_SNS;
  2306. else
  2307. loop_id = SIMPLE_NAME_SERVER;
  2308. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2309. 0xfc, mb, BIT_1 | BIT_0);
  2310. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2311. DEBUG2(qla_printk(KERN_INFO, ha,
  2312. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2313. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2314. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2315. return (QLA_SUCCESS);
  2316. }
  2317. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2318. if (qla2x00_rft_id(vha)) {
  2319. /* EMPTY */
  2320. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2321. "TYPE failed.\n", vha->host_no));
  2322. }
  2323. if (qla2x00_rff_id(vha)) {
  2324. /* EMPTY */
  2325. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2326. "Features failed.\n", vha->host_no));
  2327. }
  2328. if (qla2x00_rnn_id(vha)) {
  2329. /* EMPTY */
  2330. DEBUG2(printk("scsi(%ld): Register Node Name "
  2331. "failed.\n", vha->host_no));
  2332. } else if (qla2x00_rsnn_nn(vha)) {
  2333. /* EMPTY */
  2334. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2335. "Node Name failed.\n", vha->host_no));
  2336. }
  2337. }
  2338. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2339. if (rval != QLA_SUCCESS)
  2340. break;
  2341. /*
  2342. * Logout all previous fabric devices marked lost, except
  2343. * FCP2 devices.
  2344. */
  2345. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2346. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2347. break;
  2348. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2349. continue;
  2350. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2351. qla2x00_mark_device_lost(vha, fcport,
  2352. ql2xplogiabsentdevice, 0);
  2353. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2354. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2355. fcport->port_type != FCT_INITIATOR &&
  2356. fcport->port_type != FCT_BROADCAST) {
  2357. ha->isp_ops->fabric_logout(vha,
  2358. fcport->loop_id,
  2359. fcport->d_id.b.domain,
  2360. fcport->d_id.b.area,
  2361. fcport->d_id.b.al_pa);
  2362. fcport->loop_id = FC_NO_LOOP_ID;
  2363. }
  2364. }
  2365. }
  2366. /* Starting free loop ID. */
  2367. next_loopid = ha->min_external_loopid;
  2368. /*
  2369. * Scan through our port list and login entries that need to be
  2370. * logged in.
  2371. */
  2372. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2373. if (atomic_read(&vha->loop_down_timer) ||
  2374. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2375. break;
  2376. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2377. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2378. continue;
  2379. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2380. fcport->loop_id = next_loopid;
  2381. rval = qla2x00_find_new_loop_id(
  2382. base_vha, fcport);
  2383. if (rval != QLA_SUCCESS) {
  2384. /* Ran out of IDs to use */
  2385. break;
  2386. }
  2387. }
  2388. /* Login and update database */
  2389. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2390. }
  2391. /* Exit if out of loop IDs. */
  2392. if (rval != QLA_SUCCESS) {
  2393. break;
  2394. }
  2395. /*
  2396. * Login and add the new devices to our port list.
  2397. */
  2398. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2399. if (atomic_read(&vha->loop_down_timer) ||
  2400. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2401. break;
  2402. /* Find a new loop ID to use. */
  2403. fcport->loop_id = next_loopid;
  2404. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2405. if (rval != QLA_SUCCESS) {
  2406. /* Ran out of IDs to use */
  2407. break;
  2408. }
  2409. /* Login and update database */
  2410. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2411. if (vha->vp_idx) {
  2412. fcport->vha = vha;
  2413. fcport->vp_idx = vha->vp_idx;
  2414. }
  2415. list_move_tail(&fcport->list, &vha->vp_fcports);
  2416. }
  2417. } while (0);
  2418. /* Free all new device structures not processed. */
  2419. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2420. list_del(&fcport->list);
  2421. kfree(fcport);
  2422. }
  2423. if (rval) {
  2424. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2425. "rval=%d\n", vha->host_no, rval));
  2426. }
  2427. return (rval);
  2428. }
  2429. /*
  2430. * qla2x00_find_all_fabric_devs
  2431. *
  2432. * Input:
  2433. * ha = adapter block pointer.
  2434. * dev = database device entry pointer.
  2435. *
  2436. * Returns:
  2437. * 0 = success.
  2438. *
  2439. * Context:
  2440. * Kernel context.
  2441. */
  2442. static int
  2443. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2444. struct list_head *new_fcports)
  2445. {
  2446. int rval;
  2447. uint16_t loop_id;
  2448. fc_port_t *fcport, *new_fcport, *fcptemp;
  2449. int found;
  2450. sw_info_t *swl;
  2451. int swl_idx;
  2452. int first_dev, last_dev;
  2453. port_id_t wrap, nxt_d_id;
  2454. struct qla_hw_data *ha = vha->hw;
  2455. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2456. struct scsi_qla_host *tvp;
  2457. rval = QLA_SUCCESS;
  2458. /* Try GID_PT to get device list, else GAN. */
  2459. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2460. if (!swl) {
  2461. /*EMPTY*/
  2462. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2463. "on GA_NXT\n", vha->host_no));
  2464. } else {
  2465. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2466. kfree(swl);
  2467. swl = NULL;
  2468. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2469. kfree(swl);
  2470. swl = NULL;
  2471. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2472. kfree(swl);
  2473. swl = NULL;
  2474. } else if (ql2xiidmaenable &&
  2475. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2476. qla2x00_gpsc(vha, swl);
  2477. }
  2478. }
  2479. swl_idx = 0;
  2480. /* Allocate temporary fcport for any new fcports discovered. */
  2481. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2482. if (new_fcport == NULL) {
  2483. kfree(swl);
  2484. return (QLA_MEMORY_ALLOC_FAILED);
  2485. }
  2486. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2487. /* Set start port ID scan at adapter ID. */
  2488. first_dev = 1;
  2489. last_dev = 0;
  2490. /* Starting free loop ID. */
  2491. loop_id = ha->min_external_loopid;
  2492. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2493. if (qla2x00_is_reserved_id(vha, loop_id))
  2494. continue;
  2495. if (atomic_read(&vha->loop_down_timer) ||
  2496. LOOP_TRANSITION(vha)) {
  2497. atomic_set(&vha->loop_down_timer, 0);
  2498. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2499. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2500. break;
  2501. }
  2502. if (swl != NULL) {
  2503. if (last_dev) {
  2504. wrap.b24 = new_fcport->d_id.b24;
  2505. } else {
  2506. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2507. memcpy(new_fcport->node_name,
  2508. swl[swl_idx].node_name, WWN_SIZE);
  2509. memcpy(new_fcport->port_name,
  2510. swl[swl_idx].port_name, WWN_SIZE);
  2511. memcpy(new_fcport->fabric_port_name,
  2512. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2513. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2514. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2515. last_dev = 1;
  2516. }
  2517. swl_idx++;
  2518. }
  2519. } else {
  2520. /* Send GA_NXT to the switch */
  2521. rval = qla2x00_ga_nxt(vha, new_fcport);
  2522. if (rval != QLA_SUCCESS) {
  2523. qla_printk(KERN_WARNING, ha,
  2524. "SNS scan failed -- assuming zero-entry "
  2525. "result...\n");
  2526. list_for_each_entry_safe(fcport, fcptemp,
  2527. new_fcports, list) {
  2528. list_del(&fcport->list);
  2529. kfree(fcport);
  2530. }
  2531. rval = QLA_SUCCESS;
  2532. break;
  2533. }
  2534. }
  2535. /* If wrap on switch device list, exit. */
  2536. if (first_dev) {
  2537. wrap.b24 = new_fcport->d_id.b24;
  2538. first_dev = 0;
  2539. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2540. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2541. vha->host_no, new_fcport->d_id.b.domain,
  2542. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2543. break;
  2544. }
  2545. /* Bypass if same physical adapter. */
  2546. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2547. continue;
  2548. /* Bypass virtual ports of the same host. */
  2549. found = 0;
  2550. if (ha->num_vhosts) {
  2551. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2552. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2553. found = 1;
  2554. break;
  2555. }
  2556. }
  2557. if (found)
  2558. continue;
  2559. }
  2560. /* Bypass if same domain and area of adapter. */
  2561. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2562. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2563. ISP_CFG_FL)
  2564. continue;
  2565. /* Bypass reserved domain fields. */
  2566. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2567. continue;
  2568. /* Locate matching device in database. */
  2569. found = 0;
  2570. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2571. if (memcmp(new_fcport->port_name, fcport->port_name,
  2572. WWN_SIZE))
  2573. continue;
  2574. found++;
  2575. /* Update port state. */
  2576. memcpy(fcport->fabric_port_name,
  2577. new_fcport->fabric_port_name, WWN_SIZE);
  2578. fcport->fp_speed = new_fcport->fp_speed;
  2579. /*
  2580. * If address the same and state FCS_ONLINE, nothing
  2581. * changed.
  2582. */
  2583. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2584. atomic_read(&fcport->state) == FCS_ONLINE) {
  2585. break;
  2586. }
  2587. /*
  2588. * If device was not a fabric device before.
  2589. */
  2590. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2591. fcport->d_id.b24 = new_fcport->d_id.b24;
  2592. fcport->loop_id = FC_NO_LOOP_ID;
  2593. fcport->flags |= (FCF_FABRIC_DEVICE |
  2594. FCF_LOGIN_NEEDED);
  2595. break;
  2596. }
  2597. /*
  2598. * Port ID changed or device was marked to be updated;
  2599. * Log it out if still logged in and mark it for
  2600. * relogin later.
  2601. */
  2602. fcport->d_id.b24 = new_fcport->d_id.b24;
  2603. fcport->flags |= FCF_LOGIN_NEEDED;
  2604. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2605. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2606. fcport->port_type != FCT_INITIATOR &&
  2607. fcport->port_type != FCT_BROADCAST) {
  2608. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2609. fcport->d_id.b.domain, fcport->d_id.b.area,
  2610. fcport->d_id.b.al_pa);
  2611. fcport->loop_id = FC_NO_LOOP_ID;
  2612. }
  2613. break;
  2614. }
  2615. if (found)
  2616. continue;
  2617. /* If device was not in our fcports list, then add it. */
  2618. list_add_tail(&new_fcport->list, new_fcports);
  2619. /* Allocate a new replacement fcport. */
  2620. nxt_d_id.b24 = new_fcport->d_id.b24;
  2621. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2622. if (new_fcport == NULL) {
  2623. kfree(swl);
  2624. return (QLA_MEMORY_ALLOC_FAILED);
  2625. }
  2626. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2627. new_fcport->d_id.b24 = nxt_d_id.b24;
  2628. }
  2629. kfree(swl);
  2630. kfree(new_fcport);
  2631. return (rval);
  2632. }
  2633. /*
  2634. * qla2x00_find_new_loop_id
  2635. * Scan through our port list and find a new usable loop ID.
  2636. *
  2637. * Input:
  2638. * ha: adapter state pointer.
  2639. * dev: port structure pointer.
  2640. *
  2641. * Returns:
  2642. * qla2x00 local function return status code.
  2643. *
  2644. * Context:
  2645. * Kernel context.
  2646. */
  2647. static int
  2648. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2649. {
  2650. int rval;
  2651. int found;
  2652. fc_port_t *fcport;
  2653. uint16_t first_loop_id;
  2654. struct qla_hw_data *ha = vha->hw;
  2655. struct scsi_qla_host *vp;
  2656. struct scsi_qla_host *tvp;
  2657. rval = QLA_SUCCESS;
  2658. /* Save starting loop ID. */
  2659. first_loop_id = dev->loop_id;
  2660. for (;;) {
  2661. /* Skip loop ID if already used by adapter. */
  2662. if (dev->loop_id == vha->loop_id)
  2663. dev->loop_id++;
  2664. /* Skip reserved loop IDs. */
  2665. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2666. dev->loop_id++;
  2667. /* Reset loop ID if passed the end. */
  2668. if (dev->loop_id > ha->max_loop_id) {
  2669. /* first loop ID. */
  2670. dev->loop_id = ha->min_external_loopid;
  2671. }
  2672. /* Check for loop ID being already in use. */
  2673. found = 0;
  2674. fcport = NULL;
  2675. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2676. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2677. if (fcport->loop_id == dev->loop_id &&
  2678. fcport != dev) {
  2679. /* ID possibly in use */
  2680. found++;
  2681. break;
  2682. }
  2683. }
  2684. if (found)
  2685. break;
  2686. }
  2687. /* If not in use then it is free to use. */
  2688. if (!found) {
  2689. break;
  2690. }
  2691. /* ID in use. Try next value. */
  2692. dev->loop_id++;
  2693. /* If wrap around. No free ID to use. */
  2694. if (dev->loop_id == first_loop_id) {
  2695. dev->loop_id = FC_NO_LOOP_ID;
  2696. rval = QLA_FUNCTION_FAILED;
  2697. break;
  2698. }
  2699. }
  2700. return (rval);
  2701. }
  2702. /*
  2703. * qla2x00_device_resync
  2704. * Marks devices in the database that needs resynchronization.
  2705. *
  2706. * Input:
  2707. * ha = adapter block pointer.
  2708. *
  2709. * Context:
  2710. * Kernel context.
  2711. */
  2712. static int
  2713. qla2x00_device_resync(scsi_qla_host_t *vha)
  2714. {
  2715. int rval;
  2716. uint32_t mask;
  2717. fc_port_t *fcport;
  2718. uint32_t rscn_entry;
  2719. uint8_t rscn_out_iter;
  2720. uint8_t format;
  2721. port_id_t d_id;
  2722. rval = QLA_RSCNS_HANDLED;
  2723. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2724. vha->flags.rscn_queue_overflow) {
  2725. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2726. format = MSB(MSW(rscn_entry));
  2727. d_id.b.domain = LSB(MSW(rscn_entry));
  2728. d_id.b.area = MSB(LSW(rscn_entry));
  2729. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2730. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2731. "[%02x/%02x%02x%02x].\n",
  2732. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2733. d_id.b.area, d_id.b.al_pa));
  2734. vha->rscn_out_ptr++;
  2735. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2736. vha->rscn_out_ptr = 0;
  2737. /* Skip duplicate entries. */
  2738. for (rscn_out_iter = vha->rscn_out_ptr;
  2739. !vha->flags.rscn_queue_overflow &&
  2740. rscn_out_iter != vha->rscn_in_ptr;
  2741. rscn_out_iter = (rscn_out_iter ==
  2742. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2743. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2744. break;
  2745. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2746. "entry found at [%d].\n", vha->host_no,
  2747. rscn_out_iter));
  2748. vha->rscn_out_ptr = rscn_out_iter;
  2749. }
  2750. /* Queue overflow, set switch default case. */
  2751. if (vha->flags.rscn_queue_overflow) {
  2752. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2753. "overflow.\n", vha->host_no));
  2754. format = 3;
  2755. vha->flags.rscn_queue_overflow = 0;
  2756. }
  2757. switch (format) {
  2758. case 0:
  2759. mask = 0xffffff;
  2760. break;
  2761. case 1:
  2762. mask = 0xffff00;
  2763. break;
  2764. case 2:
  2765. mask = 0xff0000;
  2766. break;
  2767. default:
  2768. mask = 0x0;
  2769. d_id.b24 = 0;
  2770. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2771. break;
  2772. }
  2773. rval = QLA_SUCCESS;
  2774. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2775. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2776. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2777. fcport->port_type == FCT_BROADCAST)
  2778. continue;
  2779. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2780. if (format != 3 ||
  2781. fcport->port_type != FCT_INITIATOR) {
  2782. qla2x00_mark_device_lost(vha, fcport,
  2783. 0, 0);
  2784. }
  2785. }
  2786. }
  2787. }
  2788. return (rval);
  2789. }
  2790. /*
  2791. * qla2x00_fabric_dev_login
  2792. * Login fabric target device and update FC port database.
  2793. *
  2794. * Input:
  2795. * ha: adapter state pointer.
  2796. * fcport: port structure list pointer.
  2797. * next_loopid: contains value of a new loop ID that can be used
  2798. * by the next login attempt.
  2799. *
  2800. * Returns:
  2801. * qla2x00 local function return status code.
  2802. *
  2803. * Context:
  2804. * Kernel context.
  2805. */
  2806. static int
  2807. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2808. uint16_t *next_loopid)
  2809. {
  2810. int rval;
  2811. int retry;
  2812. uint8_t opts;
  2813. struct qla_hw_data *ha = vha->hw;
  2814. rval = QLA_SUCCESS;
  2815. retry = 0;
  2816. if (IS_ALOGIO_CAPABLE(ha)) {
  2817. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2818. if (!rval)
  2819. return rval;
  2820. }
  2821. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2822. if (rval == QLA_SUCCESS) {
  2823. /* Send an ADISC to FCP2 devices.*/
  2824. opts = 0;
  2825. if (fcport->flags & FCF_FCP2_DEVICE)
  2826. opts |= BIT_1;
  2827. rval = qla2x00_get_port_database(vha, fcport, opts);
  2828. if (rval != QLA_SUCCESS) {
  2829. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2830. fcport->d_id.b.domain, fcport->d_id.b.area,
  2831. fcport->d_id.b.al_pa);
  2832. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2833. } else {
  2834. qla2x00_update_fcport(vha, fcport);
  2835. }
  2836. }
  2837. return (rval);
  2838. }
  2839. /*
  2840. * qla2x00_fabric_login
  2841. * Issue fabric login command.
  2842. *
  2843. * Input:
  2844. * ha = adapter block pointer.
  2845. * device = pointer to FC device type structure.
  2846. *
  2847. * Returns:
  2848. * 0 - Login successfully
  2849. * 1 - Login failed
  2850. * 2 - Initiator device
  2851. * 3 - Fatal error
  2852. */
  2853. int
  2854. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2855. uint16_t *next_loopid)
  2856. {
  2857. int rval;
  2858. int retry;
  2859. uint16_t tmp_loopid;
  2860. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2861. struct qla_hw_data *ha = vha->hw;
  2862. retry = 0;
  2863. tmp_loopid = 0;
  2864. for (;;) {
  2865. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2866. "for port %02x%02x%02x.\n",
  2867. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2868. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2869. /* Login fcport on switch. */
  2870. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2871. fcport->d_id.b.domain, fcport->d_id.b.area,
  2872. fcport->d_id.b.al_pa, mb, BIT_0);
  2873. if (mb[0] == MBS_PORT_ID_USED) {
  2874. /*
  2875. * Device has another loop ID. The firmware team
  2876. * recommends the driver perform an implicit login with
  2877. * the specified ID again. The ID we just used is save
  2878. * here so we return with an ID that can be tried by
  2879. * the next login.
  2880. */
  2881. retry++;
  2882. tmp_loopid = fcport->loop_id;
  2883. fcport->loop_id = mb[1];
  2884. DEBUG(printk("Fabric Login: port in use - next "
  2885. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2886. fcport->loop_id, fcport->d_id.b.domain,
  2887. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2888. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2889. /*
  2890. * Login succeeded.
  2891. */
  2892. if (retry) {
  2893. /* A retry occurred before. */
  2894. *next_loopid = tmp_loopid;
  2895. } else {
  2896. /*
  2897. * No retry occurred before. Just increment the
  2898. * ID value for next login.
  2899. */
  2900. *next_loopid = (fcport->loop_id + 1);
  2901. }
  2902. if (mb[1] & BIT_0) {
  2903. fcport->port_type = FCT_INITIATOR;
  2904. } else {
  2905. fcport->port_type = FCT_TARGET;
  2906. if (mb[1] & BIT_1) {
  2907. fcport->flags |= FCF_FCP2_DEVICE;
  2908. }
  2909. }
  2910. if (mb[10] & BIT_0)
  2911. fcport->supported_classes |= FC_COS_CLASS2;
  2912. if (mb[10] & BIT_1)
  2913. fcport->supported_classes |= FC_COS_CLASS3;
  2914. rval = QLA_SUCCESS;
  2915. break;
  2916. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2917. /*
  2918. * Loop ID already used, try next loop ID.
  2919. */
  2920. fcport->loop_id++;
  2921. rval = qla2x00_find_new_loop_id(vha, fcport);
  2922. if (rval != QLA_SUCCESS) {
  2923. /* Ran out of loop IDs to use */
  2924. break;
  2925. }
  2926. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2927. /*
  2928. * Firmware possibly timed out during login. If NO
  2929. * retries are left to do then the device is declared
  2930. * dead.
  2931. */
  2932. *next_loopid = fcport->loop_id;
  2933. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2934. fcport->d_id.b.domain, fcport->d_id.b.area,
  2935. fcport->d_id.b.al_pa);
  2936. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2937. rval = 1;
  2938. break;
  2939. } else {
  2940. /*
  2941. * unrecoverable / not handled error
  2942. */
  2943. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2944. "loop_id=%x jiffies=%lx.\n",
  2945. __func__, vha->host_no, mb[0],
  2946. fcport->d_id.b.domain, fcport->d_id.b.area,
  2947. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2948. *next_loopid = fcport->loop_id;
  2949. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2950. fcport->d_id.b.domain, fcport->d_id.b.area,
  2951. fcport->d_id.b.al_pa);
  2952. fcport->loop_id = FC_NO_LOOP_ID;
  2953. fcport->login_retry = 0;
  2954. rval = 3;
  2955. break;
  2956. }
  2957. }
  2958. return (rval);
  2959. }
  2960. /*
  2961. * qla2x00_local_device_login
  2962. * Issue local device login command.
  2963. *
  2964. * Input:
  2965. * ha = adapter block pointer.
  2966. * loop_id = loop id of device to login to.
  2967. *
  2968. * Returns (Where's the #define!!!!):
  2969. * 0 - Login successfully
  2970. * 1 - Login failed
  2971. * 3 - Fatal error
  2972. */
  2973. int
  2974. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2975. {
  2976. int rval;
  2977. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2978. memset(mb, 0, sizeof(mb));
  2979. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2980. if (rval == QLA_SUCCESS) {
  2981. /* Interrogate mailbox registers for any errors */
  2982. if (mb[0] == MBS_COMMAND_ERROR)
  2983. rval = 1;
  2984. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2985. /* device not in PCB table */
  2986. rval = 3;
  2987. }
  2988. return (rval);
  2989. }
  2990. /*
  2991. * qla2x00_loop_resync
  2992. * Resync with fibre channel devices.
  2993. *
  2994. * Input:
  2995. * ha = adapter block pointer.
  2996. *
  2997. * Returns:
  2998. * 0 = success
  2999. */
  3000. int
  3001. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3002. {
  3003. int rval = QLA_SUCCESS;
  3004. uint32_t wait_time;
  3005. struct req_que *req;
  3006. struct rsp_que *rsp;
  3007. if (vha->hw->flags.cpu_affinity_enabled)
  3008. req = vha->hw->req_q_map[0];
  3009. else
  3010. req = vha->req;
  3011. rsp = req->rsp;
  3012. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3013. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3014. if (vha->flags.online) {
  3015. if (!(rval = qla2x00_fw_ready(vha))) {
  3016. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3017. wait_time = 256;
  3018. do {
  3019. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3020. /* Issue a marker after FW becomes ready. */
  3021. qla2x00_marker(vha, req, rsp, 0, 0,
  3022. MK_SYNC_ALL);
  3023. vha->marker_needed = 0;
  3024. /* Remap devices on Loop. */
  3025. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3026. qla2x00_configure_loop(vha);
  3027. wait_time--;
  3028. } while (!atomic_read(&vha->loop_down_timer) &&
  3029. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3030. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3031. &vha->dpc_flags)));
  3032. }
  3033. }
  3034. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3035. return (QLA_FUNCTION_FAILED);
  3036. if (rval)
  3037. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3038. return (rval);
  3039. }
  3040. void
  3041. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3042. {
  3043. fc_port_t *fcport;
  3044. struct scsi_qla_host *tvp, *vha;
  3045. /* Go with deferred removal of rport references. */
  3046. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3047. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3048. if (fcport && fcport->drport &&
  3049. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3050. qla2x00_rport_del(fcport);
  3051. }
  3052. /*
  3053. * qla2x00_abort_isp
  3054. * Resets ISP and aborts all outstanding commands.
  3055. *
  3056. * Input:
  3057. * ha = adapter block pointer.
  3058. *
  3059. * Returns:
  3060. * 0 = success
  3061. */
  3062. int
  3063. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3064. {
  3065. int rval;
  3066. uint8_t status = 0;
  3067. struct qla_hw_data *ha = vha->hw;
  3068. struct scsi_qla_host *vp;
  3069. struct scsi_qla_host *tvp;
  3070. struct req_que *req = ha->req_q_map[0];
  3071. if (vha->flags.online) {
  3072. vha->flags.online = 0;
  3073. ha->flags.chip_reset_done = 0;
  3074. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3075. ha->qla_stats.total_isp_aborts++;
  3076. qla_printk(KERN_INFO, ha,
  3077. "Performing ISP error recovery - ha= %p.\n", ha);
  3078. ha->isp_ops->reset_chip(vha);
  3079. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3080. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3081. atomic_set(&vha->loop_state, LOOP_DOWN);
  3082. qla2x00_mark_all_devices_lost(vha, 0);
  3083. } else {
  3084. if (!atomic_read(&vha->loop_down_timer))
  3085. atomic_set(&vha->loop_down_timer,
  3086. LOOP_DOWN_TIME);
  3087. }
  3088. /* Requeue all commands in outstanding command list. */
  3089. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3090. if (unlikely(pci_channel_offline(ha->pdev) &&
  3091. ha->flags.pci_channel_io_perm_failure)) {
  3092. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3093. status = 0;
  3094. return status;
  3095. }
  3096. ha->isp_ops->get_flash_version(vha, req->ring);
  3097. ha->isp_ops->nvram_config(vha);
  3098. if (!qla2x00_restart_isp(vha)) {
  3099. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3100. if (!atomic_read(&vha->loop_down_timer)) {
  3101. /*
  3102. * Issue marker command only when we are going
  3103. * to start the I/O .
  3104. */
  3105. vha->marker_needed = 1;
  3106. }
  3107. vha->flags.online = 1;
  3108. ha->isp_ops->enable_intrs(ha);
  3109. ha->isp_abort_cnt = 0;
  3110. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3111. if (IS_QLA81XX(ha))
  3112. qla2x00_get_fw_version(vha,
  3113. &ha->fw_major_version,
  3114. &ha->fw_minor_version,
  3115. &ha->fw_subminor_version,
  3116. &ha->fw_attributes, &ha->fw_memory_size,
  3117. ha->mpi_version, &ha->mpi_capabilities,
  3118. ha->phy_version);
  3119. if (ha->fce) {
  3120. ha->flags.fce_enabled = 1;
  3121. memset(ha->fce, 0,
  3122. fce_calc_size(ha->fce_bufs));
  3123. rval = qla2x00_enable_fce_trace(vha,
  3124. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3125. &ha->fce_bufs);
  3126. if (rval) {
  3127. qla_printk(KERN_WARNING, ha,
  3128. "Unable to reinitialize FCE "
  3129. "(%d).\n", rval);
  3130. ha->flags.fce_enabled = 0;
  3131. }
  3132. }
  3133. if (ha->eft) {
  3134. memset(ha->eft, 0, EFT_SIZE);
  3135. rval = qla2x00_enable_eft_trace(vha,
  3136. ha->eft_dma, EFT_NUM_BUFFERS);
  3137. if (rval) {
  3138. qla_printk(KERN_WARNING, ha,
  3139. "Unable to reinitialize EFT "
  3140. "(%d).\n", rval);
  3141. }
  3142. }
  3143. } else { /* failed the ISP abort */
  3144. vha->flags.online = 1;
  3145. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3146. if (ha->isp_abort_cnt == 0) {
  3147. qla_printk(KERN_WARNING, ha,
  3148. "ISP error recovery failed - "
  3149. "board disabled\n");
  3150. /*
  3151. * The next call disables the board
  3152. * completely.
  3153. */
  3154. ha->isp_ops->reset_adapter(vha);
  3155. vha->flags.online = 0;
  3156. clear_bit(ISP_ABORT_RETRY,
  3157. &vha->dpc_flags);
  3158. status = 0;
  3159. } else { /* schedule another ISP abort */
  3160. ha->isp_abort_cnt--;
  3161. DEBUG(printk("qla%ld: ISP abort - "
  3162. "retry remaining %d\n",
  3163. vha->host_no, ha->isp_abort_cnt));
  3164. status = 1;
  3165. }
  3166. } else {
  3167. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3168. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3169. "- retrying (%d) more times\n",
  3170. vha->host_no, ha->isp_abort_cnt));
  3171. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3172. status = 1;
  3173. }
  3174. }
  3175. }
  3176. if (!status) {
  3177. DEBUG(printk(KERN_INFO
  3178. "qla2x00_abort_isp(%ld): succeeded.\n",
  3179. vha->host_no));
  3180. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3181. if (vp->vp_idx)
  3182. qla2x00_vp_abort_isp(vp);
  3183. }
  3184. } else {
  3185. qla_printk(KERN_INFO, ha,
  3186. "qla2x00_abort_isp: **** FAILED ****\n");
  3187. }
  3188. return(status);
  3189. }
  3190. /*
  3191. * qla2x00_restart_isp
  3192. * restarts the ISP after a reset
  3193. *
  3194. * Input:
  3195. * ha = adapter block pointer.
  3196. *
  3197. * Returns:
  3198. * 0 = success
  3199. */
  3200. static int
  3201. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3202. {
  3203. int status = 0;
  3204. uint32_t wait_time;
  3205. struct qla_hw_data *ha = vha->hw;
  3206. struct req_que *req = ha->req_q_map[0];
  3207. struct rsp_que *rsp = ha->rsp_q_map[0];
  3208. /* If firmware needs to be loaded */
  3209. if (qla2x00_isp_firmware(vha)) {
  3210. vha->flags.online = 0;
  3211. status = ha->isp_ops->chip_diag(vha);
  3212. if (!status)
  3213. status = qla2x00_setup_chip(vha);
  3214. }
  3215. if (!status && !(status = qla2x00_init_rings(vha))) {
  3216. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3217. ha->flags.chip_reset_done = 1;
  3218. /* Initialize the queues in use */
  3219. qla25xx_init_queues(ha);
  3220. status = qla2x00_fw_ready(vha);
  3221. if (!status) {
  3222. DEBUG(printk("%s(): Start configure loop, "
  3223. "status = %d\n", __func__, status));
  3224. /* Issue a marker after FW becomes ready. */
  3225. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3226. vha->flags.online = 1;
  3227. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3228. wait_time = 256;
  3229. do {
  3230. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3231. qla2x00_configure_loop(vha);
  3232. wait_time--;
  3233. } while (!atomic_read(&vha->loop_down_timer) &&
  3234. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3235. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3236. &vha->dpc_flags)));
  3237. }
  3238. /* if no cable then assume it's good */
  3239. if ((vha->device_flags & DFLG_NO_CABLE))
  3240. status = 0;
  3241. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3242. __func__,
  3243. status));
  3244. }
  3245. return (status);
  3246. }
  3247. static int
  3248. qla25xx_init_queues(struct qla_hw_data *ha)
  3249. {
  3250. struct rsp_que *rsp = NULL;
  3251. struct req_que *req = NULL;
  3252. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3253. int ret = -1;
  3254. int i;
  3255. for (i = 1; i < ha->max_rsp_queues; i++) {
  3256. rsp = ha->rsp_q_map[i];
  3257. if (rsp) {
  3258. rsp->options &= ~BIT_0;
  3259. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3260. if (ret != QLA_SUCCESS)
  3261. DEBUG2_17(printk(KERN_WARNING
  3262. "%s Rsp que:%d init failed\n", __func__,
  3263. rsp->id));
  3264. else
  3265. DEBUG2_17(printk(KERN_INFO
  3266. "%s Rsp que:%d inited\n", __func__,
  3267. rsp->id));
  3268. }
  3269. }
  3270. for (i = 1; i < ha->max_req_queues; i++) {
  3271. req = ha->req_q_map[i];
  3272. if (req) {
  3273. /* Clear outstanding commands array. */
  3274. req->options &= ~BIT_0;
  3275. ret = qla25xx_init_req_que(base_vha, req);
  3276. if (ret != QLA_SUCCESS)
  3277. DEBUG2_17(printk(KERN_WARNING
  3278. "%s Req que:%d init failed\n", __func__,
  3279. req->id));
  3280. else
  3281. DEBUG2_17(printk(KERN_WARNING
  3282. "%s Req que:%d inited\n", __func__,
  3283. req->id));
  3284. }
  3285. }
  3286. return ret;
  3287. }
  3288. /*
  3289. * qla2x00_reset_adapter
  3290. * Reset adapter.
  3291. *
  3292. * Input:
  3293. * ha = adapter block pointer.
  3294. */
  3295. void
  3296. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3297. {
  3298. unsigned long flags = 0;
  3299. struct qla_hw_data *ha = vha->hw;
  3300. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3301. vha->flags.online = 0;
  3302. ha->isp_ops->disable_intrs(ha);
  3303. spin_lock_irqsave(&ha->hardware_lock, flags);
  3304. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3305. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3306. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3307. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3308. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3309. }
  3310. void
  3311. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3312. {
  3313. unsigned long flags = 0;
  3314. struct qla_hw_data *ha = vha->hw;
  3315. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3316. vha->flags.online = 0;
  3317. ha->isp_ops->disable_intrs(ha);
  3318. spin_lock_irqsave(&ha->hardware_lock, flags);
  3319. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3320. RD_REG_DWORD(&reg->hccr);
  3321. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3322. RD_REG_DWORD(&reg->hccr);
  3323. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3324. if (IS_NOPOLLING_TYPE(ha))
  3325. ha->isp_ops->enable_intrs(ha);
  3326. }
  3327. /* On sparc systems, obtain port and node WWN from firmware
  3328. * properties.
  3329. */
  3330. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3331. struct nvram_24xx *nv)
  3332. {
  3333. #ifdef CONFIG_SPARC
  3334. struct qla_hw_data *ha = vha->hw;
  3335. struct pci_dev *pdev = ha->pdev;
  3336. struct device_node *dp = pci_device_to_OF_node(pdev);
  3337. const u8 *val;
  3338. int len;
  3339. val = of_get_property(dp, "port-wwn", &len);
  3340. if (val && len >= WWN_SIZE)
  3341. memcpy(nv->port_name, val, WWN_SIZE);
  3342. val = of_get_property(dp, "node-wwn", &len);
  3343. if (val && len >= WWN_SIZE)
  3344. memcpy(nv->node_name, val, WWN_SIZE);
  3345. #endif
  3346. }
  3347. int
  3348. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3349. {
  3350. int rval;
  3351. struct init_cb_24xx *icb;
  3352. struct nvram_24xx *nv;
  3353. uint32_t *dptr;
  3354. uint8_t *dptr1, *dptr2;
  3355. uint32_t chksum;
  3356. uint16_t cnt;
  3357. struct qla_hw_data *ha = vha->hw;
  3358. rval = QLA_SUCCESS;
  3359. icb = (struct init_cb_24xx *)ha->init_cb;
  3360. nv = ha->nvram;
  3361. /* Determine NVRAM starting address. */
  3362. if (ha->flags.port0) {
  3363. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3364. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3365. } else {
  3366. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3367. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3368. }
  3369. ha->nvram_size = sizeof(struct nvram_24xx);
  3370. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3371. /* Get VPD data into cache */
  3372. ha->vpd = ha->nvram + VPD_OFFSET;
  3373. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3374. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3375. /* Get NVRAM data into cache and calculate checksum. */
  3376. dptr = (uint32_t *)nv;
  3377. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3378. ha->nvram_size);
  3379. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3380. chksum += le32_to_cpu(*dptr++);
  3381. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3382. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3383. /* Bad NVRAM data, set defaults parameters. */
  3384. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3385. || nv->id[3] != ' ' ||
  3386. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3387. /* Reset NVRAM data. */
  3388. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3389. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3390. le16_to_cpu(nv->nvram_version));
  3391. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3392. "invalid -- WWPN) defaults.\n");
  3393. /*
  3394. * Set default initialization control block.
  3395. */
  3396. memset(nv, 0, ha->nvram_size);
  3397. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3398. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3399. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3400. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3401. nv->exchange_count = __constant_cpu_to_le16(0);
  3402. nv->hard_address = __constant_cpu_to_le16(124);
  3403. nv->port_name[0] = 0x21;
  3404. nv->port_name[1] = 0x00 + ha->port_no;
  3405. nv->port_name[2] = 0x00;
  3406. nv->port_name[3] = 0xe0;
  3407. nv->port_name[4] = 0x8b;
  3408. nv->port_name[5] = 0x1c;
  3409. nv->port_name[6] = 0x55;
  3410. nv->port_name[7] = 0x86;
  3411. nv->node_name[0] = 0x20;
  3412. nv->node_name[1] = 0x00;
  3413. nv->node_name[2] = 0x00;
  3414. nv->node_name[3] = 0xe0;
  3415. nv->node_name[4] = 0x8b;
  3416. nv->node_name[5] = 0x1c;
  3417. nv->node_name[6] = 0x55;
  3418. nv->node_name[7] = 0x86;
  3419. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3420. nv->login_retry_count = __constant_cpu_to_le16(8);
  3421. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3422. nv->login_timeout = __constant_cpu_to_le16(0);
  3423. nv->firmware_options_1 =
  3424. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3425. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3426. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3427. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3428. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3429. nv->efi_parameters = __constant_cpu_to_le32(0);
  3430. nv->reset_delay = 5;
  3431. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3432. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3433. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3434. rval = 1;
  3435. }
  3436. /* Reset Initialization control block */
  3437. memset(icb, 0, ha->init_cb_size);
  3438. /* Copy 1st segment. */
  3439. dptr1 = (uint8_t *)icb;
  3440. dptr2 = (uint8_t *)&nv->version;
  3441. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3442. while (cnt--)
  3443. *dptr1++ = *dptr2++;
  3444. icb->login_retry_count = nv->login_retry_count;
  3445. icb->link_down_on_nos = nv->link_down_on_nos;
  3446. /* Copy 2nd segment. */
  3447. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3448. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3449. cnt = (uint8_t *)&icb->reserved_3 -
  3450. (uint8_t *)&icb->interrupt_delay_timer;
  3451. while (cnt--)
  3452. *dptr1++ = *dptr2++;
  3453. /*
  3454. * Setup driver NVRAM options.
  3455. */
  3456. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3457. "QLA2462");
  3458. /* Use alternate WWN? */
  3459. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3460. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3461. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3462. }
  3463. /* Prepare nodename */
  3464. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3465. /*
  3466. * Firmware will apply the following mask if the nodename was
  3467. * not provided.
  3468. */
  3469. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3470. icb->node_name[0] &= 0xF0;
  3471. }
  3472. /* Set host adapter parameters. */
  3473. ha->flags.disable_risc_code_load = 0;
  3474. ha->flags.enable_lip_reset = 0;
  3475. ha->flags.enable_lip_full_login =
  3476. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3477. ha->flags.enable_target_reset =
  3478. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3479. ha->flags.enable_led_scheme = 0;
  3480. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3481. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3482. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3483. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3484. sizeof(ha->fw_seriallink_options24));
  3485. /* save HBA serial number */
  3486. ha->serial0 = icb->port_name[5];
  3487. ha->serial1 = icb->port_name[6];
  3488. ha->serial2 = icb->port_name[7];
  3489. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3490. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3491. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3492. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3493. /* Set minimum login_timeout to 4 seconds. */
  3494. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3495. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3496. if (le16_to_cpu(nv->login_timeout) < 4)
  3497. nv->login_timeout = __constant_cpu_to_le16(4);
  3498. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3499. icb->login_timeout = nv->login_timeout;
  3500. /* Set minimum RATOV to 100 tenths of a second. */
  3501. ha->r_a_tov = 100;
  3502. ha->loop_reset_delay = nv->reset_delay;
  3503. /* Link Down Timeout = 0:
  3504. *
  3505. * When Port Down timer expires we will start returning
  3506. * I/O's to OS with "DID_NO_CONNECT".
  3507. *
  3508. * Link Down Timeout != 0:
  3509. *
  3510. * The driver waits for the link to come up after link down
  3511. * before returning I/Os to OS with "DID_NO_CONNECT".
  3512. */
  3513. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3514. ha->loop_down_abort_time =
  3515. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3516. } else {
  3517. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3518. ha->loop_down_abort_time =
  3519. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3520. }
  3521. /* Need enough time to try and get the port back. */
  3522. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3523. if (qlport_down_retry)
  3524. ha->port_down_retry_count = qlport_down_retry;
  3525. /* Set login_retry_count */
  3526. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3527. if (ha->port_down_retry_count ==
  3528. le16_to_cpu(nv->port_down_retry_count) &&
  3529. ha->port_down_retry_count > 3)
  3530. ha->login_retry_count = ha->port_down_retry_count;
  3531. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3532. ha->login_retry_count = ha->port_down_retry_count;
  3533. if (ql2xloginretrycount)
  3534. ha->login_retry_count = ql2xloginretrycount;
  3535. /* Enable ZIO. */
  3536. if (!vha->flags.init_done) {
  3537. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3538. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3539. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3540. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3541. }
  3542. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3543. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3544. vha->flags.process_response_queue = 0;
  3545. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3546. ha->zio_mode = QLA_ZIO_MODE_6;
  3547. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3548. "(%d us).\n", vha->host_no, ha->zio_mode,
  3549. ha->zio_timer * 100));
  3550. qla_printk(KERN_INFO, ha,
  3551. "ZIO mode %d enabled; timer delay (%d us).\n",
  3552. ha->zio_mode, ha->zio_timer * 100);
  3553. icb->firmware_options_2 |= cpu_to_le32(
  3554. (uint32_t)ha->zio_mode);
  3555. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3556. vha->flags.process_response_queue = 1;
  3557. }
  3558. if (rval) {
  3559. DEBUG2_3(printk(KERN_WARNING
  3560. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3561. }
  3562. return (rval);
  3563. }
  3564. static int
  3565. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3566. uint32_t faddr)
  3567. {
  3568. int rval = QLA_SUCCESS;
  3569. int segments, fragment;
  3570. uint32_t *dcode, dlen;
  3571. uint32_t risc_addr;
  3572. uint32_t risc_size;
  3573. uint32_t i;
  3574. struct qla_hw_data *ha = vha->hw;
  3575. struct req_que *req = ha->req_q_map[0];
  3576. qla_printk(KERN_INFO, ha,
  3577. "FW: Loading from flash (%x)...\n", faddr);
  3578. rval = QLA_SUCCESS;
  3579. segments = FA_RISC_CODE_SEGMENTS;
  3580. dcode = (uint32_t *)req->ring;
  3581. *srisc_addr = 0;
  3582. /* Validate firmware image by checking version. */
  3583. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3584. for (i = 0; i < 4; i++)
  3585. dcode[i] = be32_to_cpu(dcode[i]);
  3586. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3587. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3588. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3589. dcode[3] == 0)) {
  3590. qla_printk(KERN_WARNING, ha,
  3591. "Unable to verify integrity of flash firmware image!\n");
  3592. qla_printk(KERN_WARNING, ha,
  3593. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3594. dcode[1], dcode[2], dcode[3]);
  3595. return QLA_FUNCTION_FAILED;
  3596. }
  3597. while (segments && rval == QLA_SUCCESS) {
  3598. /* Read segment's load information. */
  3599. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3600. risc_addr = be32_to_cpu(dcode[2]);
  3601. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3602. risc_size = be32_to_cpu(dcode[3]);
  3603. fragment = 0;
  3604. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3605. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3606. if (dlen > risc_size)
  3607. dlen = risc_size;
  3608. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3609. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3610. vha->host_no, risc_addr, dlen, faddr));
  3611. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3612. for (i = 0; i < dlen; i++)
  3613. dcode[i] = swab32(dcode[i]);
  3614. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3615. dlen);
  3616. if (rval) {
  3617. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3618. "segment %d of firmware\n", vha->host_no,
  3619. fragment));
  3620. qla_printk(KERN_WARNING, ha,
  3621. "[ERROR] Failed to load segment %d of "
  3622. "firmware\n", fragment);
  3623. break;
  3624. }
  3625. faddr += dlen;
  3626. risc_addr += dlen;
  3627. risc_size -= dlen;
  3628. fragment++;
  3629. }
  3630. /* Next segment. */
  3631. segments--;
  3632. }
  3633. return rval;
  3634. }
  3635. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3636. int
  3637. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3638. {
  3639. int rval;
  3640. int i, fragment;
  3641. uint16_t *wcode, *fwcode;
  3642. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3643. struct fw_blob *blob;
  3644. struct qla_hw_data *ha = vha->hw;
  3645. struct req_que *req = ha->req_q_map[0];
  3646. /* Load firmware blob. */
  3647. blob = qla2x00_request_firmware(vha);
  3648. if (!blob) {
  3649. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3650. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3651. "from: " QLA_FW_URL ".\n");
  3652. return QLA_FUNCTION_FAILED;
  3653. }
  3654. rval = QLA_SUCCESS;
  3655. wcode = (uint16_t *)req->ring;
  3656. *srisc_addr = 0;
  3657. fwcode = (uint16_t *)blob->fw->data;
  3658. fwclen = 0;
  3659. /* Validate firmware image by checking version. */
  3660. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3661. qla_printk(KERN_WARNING, ha,
  3662. "Unable to verify integrity of firmware image (%Zd)!\n",
  3663. blob->fw->size);
  3664. goto fail_fw_integrity;
  3665. }
  3666. for (i = 0; i < 4; i++)
  3667. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3668. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3669. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3670. wcode[2] == 0 && wcode[3] == 0)) {
  3671. qla_printk(KERN_WARNING, ha,
  3672. "Unable to verify integrity of firmware image!\n");
  3673. qla_printk(KERN_WARNING, ha,
  3674. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3675. wcode[1], wcode[2], wcode[3]);
  3676. goto fail_fw_integrity;
  3677. }
  3678. seg = blob->segs;
  3679. while (*seg && rval == QLA_SUCCESS) {
  3680. risc_addr = *seg;
  3681. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3682. risc_size = be16_to_cpu(fwcode[3]);
  3683. /* Validate firmware image size. */
  3684. fwclen += risc_size * sizeof(uint16_t);
  3685. if (blob->fw->size < fwclen) {
  3686. qla_printk(KERN_WARNING, ha,
  3687. "Unable to verify integrity of firmware image "
  3688. "(%Zd)!\n", blob->fw->size);
  3689. goto fail_fw_integrity;
  3690. }
  3691. fragment = 0;
  3692. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3693. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3694. if (wlen > risc_size)
  3695. wlen = risc_size;
  3696. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3697. "addr %x, number of words 0x%x.\n", vha->host_no,
  3698. risc_addr, wlen));
  3699. for (i = 0; i < wlen; i++)
  3700. wcode[i] = swab16(fwcode[i]);
  3701. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3702. wlen);
  3703. if (rval) {
  3704. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3705. "segment %d of firmware\n", vha->host_no,
  3706. fragment));
  3707. qla_printk(KERN_WARNING, ha,
  3708. "[ERROR] Failed to load segment %d of "
  3709. "firmware\n", fragment);
  3710. break;
  3711. }
  3712. fwcode += wlen;
  3713. risc_addr += wlen;
  3714. risc_size -= wlen;
  3715. fragment++;
  3716. }
  3717. /* Next segment. */
  3718. seg++;
  3719. }
  3720. return rval;
  3721. fail_fw_integrity:
  3722. return QLA_FUNCTION_FAILED;
  3723. }
  3724. static int
  3725. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3726. {
  3727. int rval;
  3728. int segments, fragment;
  3729. uint32_t *dcode, dlen;
  3730. uint32_t risc_addr;
  3731. uint32_t risc_size;
  3732. uint32_t i;
  3733. struct fw_blob *blob;
  3734. uint32_t *fwcode, fwclen;
  3735. struct qla_hw_data *ha = vha->hw;
  3736. struct req_que *req = ha->req_q_map[0];
  3737. /* Load firmware blob. */
  3738. blob = qla2x00_request_firmware(vha);
  3739. if (!blob) {
  3740. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3741. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3742. "from: " QLA_FW_URL ".\n");
  3743. return QLA_FUNCTION_FAILED;
  3744. }
  3745. qla_printk(KERN_INFO, ha,
  3746. "FW: Loading via request-firmware...\n");
  3747. rval = QLA_SUCCESS;
  3748. segments = FA_RISC_CODE_SEGMENTS;
  3749. dcode = (uint32_t *)req->ring;
  3750. *srisc_addr = 0;
  3751. fwcode = (uint32_t *)blob->fw->data;
  3752. fwclen = 0;
  3753. /* Validate firmware image by checking version. */
  3754. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3755. qla_printk(KERN_WARNING, ha,
  3756. "Unable to verify integrity of firmware image (%Zd)!\n",
  3757. blob->fw->size);
  3758. goto fail_fw_integrity;
  3759. }
  3760. for (i = 0; i < 4; i++)
  3761. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3762. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3763. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3764. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3765. dcode[3] == 0)) {
  3766. qla_printk(KERN_WARNING, ha,
  3767. "Unable to verify integrity of firmware image!\n");
  3768. qla_printk(KERN_WARNING, ha,
  3769. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3770. dcode[1], dcode[2], dcode[3]);
  3771. goto fail_fw_integrity;
  3772. }
  3773. while (segments && rval == QLA_SUCCESS) {
  3774. risc_addr = be32_to_cpu(fwcode[2]);
  3775. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3776. risc_size = be32_to_cpu(fwcode[3]);
  3777. /* Validate firmware image size. */
  3778. fwclen += risc_size * sizeof(uint32_t);
  3779. if (blob->fw->size < fwclen) {
  3780. qla_printk(KERN_WARNING, ha,
  3781. "Unable to verify integrity of firmware image "
  3782. "(%Zd)!\n", blob->fw->size);
  3783. goto fail_fw_integrity;
  3784. }
  3785. fragment = 0;
  3786. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3787. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3788. if (dlen > risc_size)
  3789. dlen = risc_size;
  3790. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3791. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3792. risc_addr, dlen));
  3793. for (i = 0; i < dlen; i++)
  3794. dcode[i] = swab32(fwcode[i]);
  3795. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3796. dlen);
  3797. if (rval) {
  3798. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3799. "segment %d of firmware\n", vha->host_no,
  3800. fragment));
  3801. qla_printk(KERN_WARNING, ha,
  3802. "[ERROR] Failed to load segment %d of "
  3803. "firmware\n", fragment);
  3804. break;
  3805. }
  3806. fwcode += dlen;
  3807. risc_addr += dlen;
  3808. risc_size -= dlen;
  3809. fragment++;
  3810. }
  3811. /* Next segment. */
  3812. segments--;
  3813. }
  3814. return rval;
  3815. fail_fw_integrity:
  3816. return QLA_FUNCTION_FAILED;
  3817. }
  3818. int
  3819. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3820. {
  3821. int rval;
  3822. if (ql2xfwloadbin == 1)
  3823. return qla81xx_load_risc(vha, srisc_addr);
  3824. /*
  3825. * FW Load priority:
  3826. * 1) Firmware via request-firmware interface (.bin file).
  3827. * 2) Firmware residing in flash.
  3828. */
  3829. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3830. if (rval == QLA_SUCCESS)
  3831. return rval;
  3832. return qla24xx_load_risc_flash(vha, srisc_addr,
  3833. vha->hw->flt_region_fw);
  3834. }
  3835. int
  3836. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3837. {
  3838. int rval;
  3839. struct qla_hw_data *ha = vha->hw;
  3840. if (ql2xfwloadbin == 2)
  3841. goto try_blob_fw;
  3842. /*
  3843. * FW Load priority:
  3844. * 1) Firmware residing in flash.
  3845. * 2) Firmware via request-firmware interface (.bin file).
  3846. * 3) Golden-Firmware residing in flash -- limited operation.
  3847. */
  3848. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3849. if (rval == QLA_SUCCESS)
  3850. return rval;
  3851. try_blob_fw:
  3852. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3853. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3854. return rval;
  3855. qla_printk(KERN_ERR, ha,
  3856. "FW: Attempting to fallback to golden firmware...\n");
  3857. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3858. if (rval != QLA_SUCCESS)
  3859. return rval;
  3860. qla_printk(KERN_ERR, ha,
  3861. "FW: Please update operational firmware...\n");
  3862. ha->flags.running_gold_fw = 1;
  3863. return rval;
  3864. }
  3865. void
  3866. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3867. {
  3868. int ret, retries;
  3869. struct qla_hw_data *ha = vha->hw;
  3870. if (ha->flags.pci_channel_io_perm_failure)
  3871. return;
  3872. if (!IS_FWI2_CAPABLE(ha))
  3873. return;
  3874. if (!ha->fw_major_version)
  3875. return;
  3876. ret = qla2x00_stop_firmware(vha);
  3877. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3878. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3879. ha->isp_ops->reset_chip(vha);
  3880. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3881. continue;
  3882. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3883. continue;
  3884. qla_printk(KERN_INFO, ha,
  3885. "Attempting retry of stop-firmware command...\n");
  3886. ret = qla2x00_stop_firmware(vha);
  3887. }
  3888. }
  3889. int
  3890. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3891. {
  3892. int rval = QLA_SUCCESS;
  3893. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3894. struct qla_hw_data *ha = vha->hw;
  3895. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3896. struct req_que *req;
  3897. struct rsp_que *rsp;
  3898. if (!vha->vp_idx)
  3899. return -EINVAL;
  3900. rval = qla2x00_fw_ready(base_vha);
  3901. if (ha->flags.cpu_affinity_enabled)
  3902. req = ha->req_q_map[0];
  3903. else
  3904. req = vha->req;
  3905. rsp = req->rsp;
  3906. if (rval == QLA_SUCCESS) {
  3907. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3908. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3909. }
  3910. vha->flags.management_server_logged_in = 0;
  3911. /* Login to SNS first */
  3912. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3913. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3914. DEBUG15(qla_printk(KERN_INFO, ha,
  3915. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3916. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3917. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3918. return (QLA_FUNCTION_FAILED);
  3919. }
  3920. atomic_set(&vha->loop_down_timer, 0);
  3921. atomic_set(&vha->loop_state, LOOP_UP);
  3922. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3923. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3924. rval = qla2x00_loop_resync(base_vha);
  3925. return rval;
  3926. }
  3927. /* 84XX Support **************************************************************/
  3928. static LIST_HEAD(qla_cs84xx_list);
  3929. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3930. static struct qla_chip_state_84xx *
  3931. qla84xx_get_chip(struct scsi_qla_host *vha)
  3932. {
  3933. struct qla_chip_state_84xx *cs84xx;
  3934. struct qla_hw_data *ha = vha->hw;
  3935. mutex_lock(&qla_cs84xx_mutex);
  3936. /* Find any shared 84xx chip. */
  3937. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3938. if (cs84xx->bus == ha->pdev->bus) {
  3939. kref_get(&cs84xx->kref);
  3940. goto done;
  3941. }
  3942. }
  3943. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3944. if (!cs84xx)
  3945. goto done;
  3946. kref_init(&cs84xx->kref);
  3947. spin_lock_init(&cs84xx->access_lock);
  3948. mutex_init(&cs84xx->fw_update_mutex);
  3949. cs84xx->bus = ha->pdev->bus;
  3950. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3951. done:
  3952. mutex_unlock(&qla_cs84xx_mutex);
  3953. return cs84xx;
  3954. }
  3955. static void
  3956. __qla84xx_chip_release(struct kref *kref)
  3957. {
  3958. struct qla_chip_state_84xx *cs84xx =
  3959. container_of(kref, struct qla_chip_state_84xx, kref);
  3960. mutex_lock(&qla_cs84xx_mutex);
  3961. list_del(&cs84xx->list);
  3962. mutex_unlock(&qla_cs84xx_mutex);
  3963. kfree(cs84xx);
  3964. }
  3965. void
  3966. qla84xx_put_chip(struct scsi_qla_host *vha)
  3967. {
  3968. struct qla_hw_data *ha = vha->hw;
  3969. if (ha->cs84xx)
  3970. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3971. }
  3972. static int
  3973. qla84xx_init_chip(scsi_qla_host_t *vha)
  3974. {
  3975. int rval;
  3976. uint16_t status[2];
  3977. struct qla_hw_data *ha = vha->hw;
  3978. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3979. rval = qla84xx_verify_chip(vha, status);
  3980. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3981. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3982. QLA_SUCCESS;
  3983. }
  3984. /* 81XX Support **************************************************************/
  3985. int
  3986. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3987. {
  3988. int rval;
  3989. struct init_cb_81xx *icb;
  3990. struct nvram_81xx *nv;
  3991. uint32_t *dptr;
  3992. uint8_t *dptr1, *dptr2;
  3993. uint32_t chksum;
  3994. uint16_t cnt;
  3995. struct qla_hw_data *ha = vha->hw;
  3996. rval = QLA_SUCCESS;
  3997. icb = (struct init_cb_81xx *)ha->init_cb;
  3998. nv = ha->nvram;
  3999. /* Determine NVRAM starting address. */
  4000. ha->nvram_size = sizeof(struct nvram_81xx);
  4001. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4002. /* Get VPD data into cache */
  4003. ha->vpd = ha->nvram + VPD_OFFSET;
  4004. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4005. ha->vpd_size);
  4006. /* Get NVRAM data into cache and calculate checksum. */
  4007. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4008. ha->nvram_size);
  4009. dptr = (uint32_t *)nv;
  4010. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4011. chksum += le32_to_cpu(*dptr++);
  4012. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4013. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4014. /* Bad NVRAM data, set defaults parameters. */
  4015. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4016. || nv->id[3] != ' ' ||
  4017. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4018. /* Reset NVRAM data. */
  4019. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4020. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4021. le16_to_cpu(nv->nvram_version));
  4022. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4023. "invalid -- WWPN) defaults.\n");
  4024. /*
  4025. * Set default initialization control block.
  4026. */
  4027. memset(nv, 0, ha->nvram_size);
  4028. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4029. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4030. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4031. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4032. nv->exchange_count = __constant_cpu_to_le16(0);
  4033. nv->port_name[0] = 0x21;
  4034. nv->port_name[1] = 0x00 + ha->port_no;
  4035. nv->port_name[2] = 0x00;
  4036. nv->port_name[3] = 0xe0;
  4037. nv->port_name[4] = 0x8b;
  4038. nv->port_name[5] = 0x1c;
  4039. nv->port_name[6] = 0x55;
  4040. nv->port_name[7] = 0x86;
  4041. nv->node_name[0] = 0x20;
  4042. nv->node_name[1] = 0x00;
  4043. nv->node_name[2] = 0x00;
  4044. nv->node_name[3] = 0xe0;
  4045. nv->node_name[4] = 0x8b;
  4046. nv->node_name[5] = 0x1c;
  4047. nv->node_name[6] = 0x55;
  4048. nv->node_name[7] = 0x86;
  4049. nv->login_retry_count = __constant_cpu_to_le16(8);
  4050. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4051. nv->login_timeout = __constant_cpu_to_le16(0);
  4052. nv->firmware_options_1 =
  4053. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4054. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4055. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4056. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4057. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4058. nv->efi_parameters = __constant_cpu_to_le32(0);
  4059. nv->reset_delay = 5;
  4060. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4061. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4062. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4063. nv->enode_mac[0] = 0x00;
  4064. nv->enode_mac[1] = 0x02;
  4065. nv->enode_mac[2] = 0x03;
  4066. nv->enode_mac[3] = 0x04;
  4067. nv->enode_mac[4] = 0x05;
  4068. nv->enode_mac[5] = 0x06 + ha->port_no;
  4069. rval = 1;
  4070. }
  4071. /* Reset Initialization control block */
  4072. memset(icb, 0, sizeof(struct init_cb_81xx));
  4073. /* Copy 1st segment. */
  4074. dptr1 = (uint8_t *)icb;
  4075. dptr2 = (uint8_t *)&nv->version;
  4076. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4077. while (cnt--)
  4078. *dptr1++ = *dptr2++;
  4079. icb->login_retry_count = nv->login_retry_count;
  4080. /* Copy 2nd segment. */
  4081. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4082. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4083. cnt = (uint8_t *)&icb->reserved_5 -
  4084. (uint8_t *)&icb->interrupt_delay_timer;
  4085. while (cnt--)
  4086. *dptr1++ = *dptr2++;
  4087. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4088. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4089. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4090. icb->enode_mac[0] = 0x01;
  4091. icb->enode_mac[1] = 0x02;
  4092. icb->enode_mac[2] = 0x03;
  4093. icb->enode_mac[3] = 0x04;
  4094. icb->enode_mac[4] = 0x05;
  4095. icb->enode_mac[5] = 0x06 + ha->port_no;
  4096. }
  4097. /* Use extended-initialization control block. */
  4098. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4099. /*
  4100. * Setup driver NVRAM options.
  4101. */
  4102. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4103. "QLE81XX");
  4104. /* Use alternate WWN? */
  4105. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4106. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4107. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4108. }
  4109. /* Prepare nodename */
  4110. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4111. /*
  4112. * Firmware will apply the following mask if the nodename was
  4113. * not provided.
  4114. */
  4115. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4116. icb->node_name[0] &= 0xF0;
  4117. }
  4118. /* Set host adapter parameters. */
  4119. ha->flags.disable_risc_code_load = 0;
  4120. ha->flags.enable_lip_reset = 0;
  4121. ha->flags.enable_lip_full_login =
  4122. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4123. ha->flags.enable_target_reset =
  4124. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4125. ha->flags.enable_led_scheme = 0;
  4126. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4127. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4128. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4129. /* save HBA serial number */
  4130. ha->serial0 = icb->port_name[5];
  4131. ha->serial1 = icb->port_name[6];
  4132. ha->serial2 = icb->port_name[7];
  4133. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4134. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4135. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4136. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4137. /* Set minimum login_timeout to 4 seconds. */
  4138. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4139. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4140. if (le16_to_cpu(nv->login_timeout) < 4)
  4141. nv->login_timeout = __constant_cpu_to_le16(4);
  4142. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4143. icb->login_timeout = nv->login_timeout;
  4144. /* Set minimum RATOV to 100 tenths of a second. */
  4145. ha->r_a_tov = 100;
  4146. ha->loop_reset_delay = nv->reset_delay;
  4147. /* Link Down Timeout = 0:
  4148. *
  4149. * When Port Down timer expires we will start returning
  4150. * I/O's to OS with "DID_NO_CONNECT".
  4151. *
  4152. * Link Down Timeout != 0:
  4153. *
  4154. * The driver waits for the link to come up after link down
  4155. * before returning I/Os to OS with "DID_NO_CONNECT".
  4156. */
  4157. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4158. ha->loop_down_abort_time =
  4159. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4160. } else {
  4161. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4162. ha->loop_down_abort_time =
  4163. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4164. }
  4165. /* Need enough time to try and get the port back. */
  4166. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4167. if (qlport_down_retry)
  4168. ha->port_down_retry_count = qlport_down_retry;
  4169. /* Set login_retry_count */
  4170. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4171. if (ha->port_down_retry_count ==
  4172. le16_to_cpu(nv->port_down_retry_count) &&
  4173. ha->port_down_retry_count > 3)
  4174. ha->login_retry_count = ha->port_down_retry_count;
  4175. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4176. ha->login_retry_count = ha->port_down_retry_count;
  4177. if (ql2xloginretrycount)
  4178. ha->login_retry_count = ql2xloginretrycount;
  4179. /* Enable ZIO. */
  4180. if (!vha->flags.init_done) {
  4181. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4182. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4183. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4184. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4185. }
  4186. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4187. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4188. vha->flags.process_response_queue = 0;
  4189. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4190. ha->zio_mode = QLA_ZIO_MODE_6;
  4191. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4192. "(%d us).\n", vha->host_no, ha->zio_mode,
  4193. ha->zio_timer * 100));
  4194. qla_printk(KERN_INFO, ha,
  4195. "ZIO mode %d enabled; timer delay (%d us).\n",
  4196. ha->zio_mode, ha->zio_timer * 100);
  4197. icb->firmware_options_2 |= cpu_to_le32(
  4198. (uint32_t)ha->zio_mode);
  4199. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4200. vha->flags.process_response_queue = 1;
  4201. }
  4202. if (rval) {
  4203. DEBUG2_3(printk(KERN_WARNING
  4204. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4205. }
  4206. return (rval);
  4207. }
  4208. void
  4209. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4210. {
  4211. struct qla_hw_data *ha = vha->hw;
  4212. if (!ql2xetsenable)
  4213. return;
  4214. /* Enable ETS Burst. */
  4215. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4216. ha->fw_options[2] |= BIT_9;
  4217. qla2x00_set_fw_options(vha, ha->fw_options);
  4218. }