pmcraid.c 153 KB

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  1. /*
  2. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  3. *
  4. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  5. * PMC-Sierra Inc
  6. *
  7. * Copyright (C) 2008, 2009 PMC Sierra Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
  22. * USA
  23. *
  24. */
  25. #include <linux/fs.h>
  26. #include <linux/init.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ioport.h>
  31. #include <linux/delay.h>
  32. #include <linux/pci.h>
  33. #include <linux/wait.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/firmware.h>
  39. #include <linux/module.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/hdreg.h>
  42. #include <linux/version.h>
  43. #include <linux/io.h>
  44. #include <linux/slab.h>
  45. #include <asm/irq.h>
  46. #include <asm/processor.h>
  47. #include <linux/libata.h>
  48. #include <linux/mutex.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/scsi_host.h>
  51. #include <scsi/scsi_device.h>
  52. #include <scsi/scsi_tcq.h>
  53. #include <scsi/scsi_eh.h>
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsicam.h>
  56. #include "pmcraid.h"
  57. /*
  58. * Module configuration parameters
  59. */
  60. static unsigned int pmcraid_debug_log;
  61. static unsigned int pmcraid_disable_aen;
  62. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  63. /*
  64. * Data structures to support multiple adapters by the LLD.
  65. * pmcraid_adapter_count - count of configured adapters
  66. */
  67. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  68. /*
  69. * Supporting user-level control interface through IOCTL commands.
  70. * pmcraid_major - major number to use
  71. * pmcraid_minor - minor number(s) to use
  72. */
  73. static unsigned int pmcraid_major;
  74. static struct class *pmcraid_class;
  75. DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  76. /*
  77. * Module parameters
  78. */
  79. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  80. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  81. MODULE_LICENSE("GPL");
  82. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  83. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  84. MODULE_PARM_DESC(log_level,
  85. "Enables firmware error code logging, default :1 high-severity"
  86. " errors, 2: all errors including high-severity errors,"
  87. " 0: disables logging");
  88. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  89. MODULE_PARM_DESC(debug,
  90. "Enable driver verbose message logging. Set 1 to enable."
  91. "(default: 0)");
  92. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  93. MODULE_PARM_DESC(disable_aen,
  94. "Disable driver aen notifications to apps. Set 1 to disable."
  95. "(default: 0)");
  96. /* chip specific constants for PMC MaxRAID controllers (same for
  97. * 0x5220 and 0x8010
  98. */
  99. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  100. {
  101. .ioastatus = 0x0,
  102. .ioarrin = 0x00040,
  103. .mailbox = 0x7FC30,
  104. .global_intr_mask = 0x00034,
  105. .ioa_host_intr = 0x0009C,
  106. .ioa_host_intr_clr = 0x000A0,
  107. .ioa_host_mask = 0x7FC28,
  108. .ioa_host_mask_clr = 0x7FC28,
  109. .host_ioa_intr = 0x00020,
  110. .host_ioa_intr_clr = 0x00020,
  111. .transop_timeout = 300
  112. }
  113. };
  114. /*
  115. * PCI device ids supported by pmcraid driver
  116. */
  117. static struct pci_device_id pmcraid_pci_table[] __devinitdata = {
  118. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  119. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  120. },
  121. {}
  122. };
  123. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  124. /**
  125. * pmcraid_slave_alloc - Prepare for commands to a device
  126. * @scsi_dev: scsi device struct
  127. *
  128. * This function is called by mid-layer prior to sending any command to the new
  129. * device. Stores resource entry details of the device in scsi_device struct.
  130. * Queuecommand uses the resource handle and other details to fill up IOARCB
  131. * while sending commands to the device.
  132. *
  133. * Return value:
  134. * 0 on success / -ENXIO if device does not exist
  135. */
  136. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  137. {
  138. struct pmcraid_resource_entry *temp, *res = NULL;
  139. struct pmcraid_instance *pinstance;
  140. u8 target, bus, lun;
  141. unsigned long lock_flags;
  142. int rc = -ENXIO;
  143. pinstance = shost_priv(scsi_dev->host);
  144. /* Driver exposes VSET and GSCSI resources only; all other device types
  145. * are not exposed. Resource list is synchronized using resource lock
  146. * so any traversal or modifications to the list should be done inside
  147. * this lock
  148. */
  149. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  150. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  151. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  152. if (RES_IS_VSET(temp->cfg_entry)) {
  153. target = temp->cfg_entry.unique_flags1;
  154. if (target > PMCRAID_MAX_VSET_TARGETS)
  155. continue;
  156. bus = PMCRAID_VSET_BUS_ID;
  157. lun = 0;
  158. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  159. target = RES_TARGET(temp->cfg_entry.resource_address);
  160. bus = PMCRAID_PHYS_BUS_ID;
  161. lun = RES_LUN(temp->cfg_entry.resource_address);
  162. } else {
  163. continue;
  164. }
  165. if (bus == scsi_dev->channel &&
  166. target == scsi_dev->id &&
  167. lun == scsi_dev->lun) {
  168. res = temp;
  169. break;
  170. }
  171. }
  172. if (res) {
  173. res->scsi_dev = scsi_dev;
  174. scsi_dev->hostdata = res;
  175. res->change_detected = 0;
  176. atomic_set(&res->read_failures, 0);
  177. atomic_set(&res->write_failures, 0);
  178. rc = 0;
  179. }
  180. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  181. return rc;
  182. }
  183. /**
  184. * pmcraid_slave_configure - Configures a SCSI device
  185. * @scsi_dev: scsi device struct
  186. *
  187. * This fucntion is executed by SCSI mid layer just after a device is first
  188. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  189. * timeout value (default 30s) will be over-written to a higher value (60s)
  190. * and max_sectors value will be over-written to 512. It also sets queue depth
  191. * to host->cmd_per_lun value
  192. *
  193. * Return value:
  194. * 0 on success
  195. */
  196. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  197. {
  198. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  199. if (!res)
  200. return 0;
  201. /* LLD exposes VSETs and Enclosure devices only */
  202. if (RES_IS_GSCSI(res->cfg_entry) &&
  203. scsi_dev->type != TYPE_ENCLOSURE)
  204. return -ENXIO;
  205. pmcraid_info("configuring %x:%x:%x:%x\n",
  206. scsi_dev->host->unique_id,
  207. scsi_dev->channel,
  208. scsi_dev->id,
  209. scsi_dev->lun);
  210. if (RES_IS_GSCSI(res->cfg_entry)) {
  211. scsi_dev->allow_restart = 1;
  212. } else if (RES_IS_VSET(res->cfg_entry)) {
  213. scsi_dev->allow_restart = 1;
  214. blk_queue_rq_timeout(scsi_dev->request_queue,
  215. PMCRAID_VSET_IO_TIMEOUT);
  216. blk_queue_max_hw_sectors(scsi_dev->request_queue,
  217. PMCRAID_VSET_MAX_SECTORS);
  218. }
  219. if (scsi_dev->tagged_supported &&
  220. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  221. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  222. scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG,
  223. scsi_dev->host->cmd_per_lun);
  224. } else {
  225. scsi_adjust_queue_depth(scsi_dev, 0,
  226. scsi_dev->host->cmd_per_lun);
  227. }
  228. return 0;
  229. }
  230. /**
  231. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  232. *
  233. * @scsi_dev: scsi device struct
  234. *
  235. * This is called by mid-layer before removing a device. Pointer assignments
  236. * done in pmcraid_slave_alloc will be reset to NULL here.
  237. *
  238. * Return value
  239. * none
  240. */
  241. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  242. {
  243. struct pmcraid_resource_entry *res;
  244. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  245. if (res)
  246. res->scsi_dev = NULL;
  247. scsi_dev->hostdata = NULL;
  248. }
  249. /**
  250. * pmcraid_change_queue_depth - Change the device's queue depth
  251. * @scsi_dev: scsi device struct
  252. * @depth: depth to set
  253. * @reason: calling context
  254. *
  255. * Return value
  256. * actual depth set
  257. */
  258. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth,
  259. int reason)
  260. {
  261. if (reason != SCSI_QDEPTH_DEFAULT)
  262. return -EOPNOTSUPP;
  263. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  264. depth = PMCRAID_MAX_CMD_PER_LUN;
  265. scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth);
  266. return scsi_dev->queue_depth;
  267. }
  268. /**
  269. * pmcraid_change_queue_type - Change the device's queue type
  270. * @scsi_dev: scsi device struct
  271. * @tag: type of tags to use
  272. *
  273. * Return value:
  274. * actual queue type set
  275. */
  276. static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
  277. {
  278. struct pmcraid_resource_entry *res;
  279. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  280. if ((res) && scsi_dev->tagged_supported &&
  281. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  282. scsi_set_tag_type(scsi_dev, tag);
  283. if (tag)
  284. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  285. else
  286. scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
  287. } else
  288. tag = 0;
  289. return tag;
  290. }
  291. /**
  292. * pmcraid_init_cmdblk - initializes a command block
  293. *
  294. * @cmd: pointer to struct pmcraid_cmd to be initialized
  295. * @index: if >=0 first time initialization; otherwise reinitialization
  296. *
  297. * Return Value
  298. * None
  299. */
  300. void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  301. {
  302. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  303. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  304. if (index >= 0) {
  305. /* first time initialization (called from probe) */
  306. u32 ioasa_offset =
  307. offsetof(struct pmcraid_control_block, ioasa);
  308. cmd->index = index;
  309. ioarcb->response_handle = cpu_to_le32(index << 2);
  310. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  311. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  312. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  313. } else {
  314. /* re-initialization of various lengths, called once command is
  315. * processed by IOA
  316. */
  317. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  318. ioarcb->request_flags0 = 0;
  319. ioarcb->request_flags1 = 0;
  320. ioarcb->cmd_timeout = 0;
  321. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  322. ioarcb->ioadl_bus_addr = 0;
  323. ioarcb->ioadl_length = 0;
  324. ioarcb->data_transfer_length = 0;
  325. ioarcb->add_cmd_param_length = 0;
  326. ioarcb->add_cmd_param_offset = 0;
  327. cmd->ioa_cb->ioasa.ioasc = 0;
  328. cmd->ioa_cb->ioasa.residual_data_length = 0;
  329. cmd->u.time_left = 0;
  330. }
  331. cmd->cmd_done = NULL;
  332. cmd->scsi_cmd = NULL;
  333. cmd->release = 0;
  334. cmd->completion_req = 0;
  335. cmd->dma_handle = 0;
  336. init_timer(&cmd->timer);
  337. }
  338. /**
  339. * pmcraid_reinit_cmdblk - reinitialize a command block
  340. *
  341. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  342. *
  343. * Return Value
  344. * None
  345. */
  346. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  347. {
  348. pmcraid_init_cmdblk(cmd, -1);
  349. }
  350. /**
  351. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  352. * @pinstance: adapter instance structure
  353. *
  354. * Return Value:
  355. * returns pointer to cmd block or NULL if no blocks are available
  356. */
  357. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  358. struct pmcraid_instance *pinstance
  359. )
  360. {
  361. struct pmcraid_cmd *cmd = NULL;
  362. unsigned long lock_flags;
  363. /* free cmd block list is protected by free_pool_lock */
  364. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  365. if (!list_empty(&pinstance->free_cmd_pool)) {
  366. cmd = list_entry(pinstance->free_cmd_pool.next,
  367. struct pmcraid_cmd, free_list);
  368. list_del(&cmd->free_list);
  369. }
  370. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  371. /* Initialize the command block before giving it the caller */
  372. if (cmd != NULL)
  373. pmcraid_reinit_cmdblk(cmd);
  374. return cmd;
  375. }
  376. /**
  377. * pmcraid_return_cmd - return a completed command block back into free pool
  378. * @cmd: pointer to the command block
  379. *
  380. * Return Value:
  381. * nothing
  382. */
  383. void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  384. {
  385. struct pmcraid_instance *pinstance = cmd->drv_inst;
  386. unsigned long lock_flags;
  387. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  388. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  389. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  390. }
  391. /**
  392. * pmcraid_read_interrupts - reads IOA interrupts
  393. *
  394. * @pinstance: pointer to adapter instance structure
  395. *
  396. * Return value
  397. * interrupts read from IOA
  398. */
  399. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  400. {
  401. return ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  402. }
  403. /**
  404. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  405. *
  406. * @pinstance: pointer to per adapter instance structure
  407. * @intrs: interrupts to disable
  408. *
  409. * Return Value
  410. * None
  411. */
  412. static void pmcraid_disable_interrupts(
  413. struct pmcraid_instance *pinstance,
  414. u32 intrs
  415. )
  416. {
  417. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  418. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  419. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  420. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  421. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_mask_reg);
  422. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  423. }
  424. /**
  425. * pmcraid_enable_interrupts - Enables specified interrupts
  426. *
  427. * @pinstance: pointer to per adapter instance structure
  428. * @intr: interrupts to enable
  429. *
  430. * Return Value
  431. * None
  432. */
  433. static void pmcraid_enable_interrupts(
  434. struct pmcraid_instance *pinstance,
  435. u32 intrs
  436. )
  437. {
  438. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  439. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  440. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  441. iowrite32(~intrs, pinstance->int_regs.ioa_host_interrupt_mask_reg);
  442. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  443. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  444. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  445. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  446. }
  447. /**
  448. * pmcraid_reset_type - Determine the required reset type
  449. * @pinstance: pointer to adapter instance structure
  450. *
  451. * IOA requires hard reset if any of the following conditions is true.
  452. * 1. If HRRQ valid interrupt is not masked
  453. * 2. IOA reset alert doorbell is set
  454. * 3. If there are any error interrupts
  455. */
  456. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  457. {
  458. u32 mask;
  459. u32 intrs;
  460. u32 alerts;
  461. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  462. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  463. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  464. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  465. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  466. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  467. pmcraid_info("IOA requires hard reset\n");
  468. pinstance->ioa_hard_reset = 1;
  469. }
  470. /* If unit check is active, trigger the dump */
  471. if (intrs & INTRS_IOA_UNIT_CHECK)
  472. pinstance->ioa_unit_check = 1;
  473. }
  474. /**
  475. * pmcraid_bist_done - completion function for PCI BIST
  476. * @cmd: pointer to reset command
  477. * Return Value
  478. * none
  479. */
  480. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  481. static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
  482. {
  483. struct pmcraid_instance *pinstance = cmd->drv_inst;
  484. unsigned long lock_flags;
  485. int rc;
  486. u16 pci_reg;
  487. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  488. /* If PCI config space can't be accessed wait for another two secs */
  489. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  490. cmd->u.time_left > 0) {
  491. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  492. cmd->timer.expires = jiffies + cmd->u.time_left;
  493. cmd->u.time_left = 0;
  494. cmd->timer.data = (unsigned long)cmd;
  495. cmd->timer.function =
  496. (void (*)(unsigned long))pmcraid_bist_done;
  497. add_timer(&cmd->timer);
  498. } else {
  499. cmd->u.time_left = 0;
  500. pmcraid_info("BIST is complete, proceeding with reset\n");
  501. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  502. pmcraid_ioa_reset(cmd);
  503. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  504. }
  505. }
  506. /**
  507. * pmcraid_start_bist - starts BIST
  508. * @cmd: pointer to reset cmd
  509. * Return Value
  510. * none
  511. */
  512. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  513. {
  514. struct pmcraid_instance *pinstance = cmd->drv_inst;
  515. u32 doorbells, intrs;
  516. /* proceed with bist and wait for 2 seconds */
  517. iowrite32(DOORBELL_IOA_START_BIST,
  518. pinstance->int_regs.host_ioa_interrupt_reg);
  519. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  520. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  521. pmcraid_info("doorbells after start bist: %x intrs: %x \n",
  522. doorbells, intrs);
  523. cmd->u.time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  524. cmd->timer.data = (unsigned long)cmd;
  525. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  526. cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
  527. add_timer(&cmd->timer);
  528. }
  529. /**
  530. * pmcraid_reset_alert_done - completion routine for reset_alert
  531. * @cmd: pointer to command block used in reset sequence
  532. * Return value
  533. * None
  534. */
  535. static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
  536. {
  537. struct pmcraid_instance *pinstance = cmd->drv_inst;
  538. u32 status = ioread32(pinstance->ioa_status);
  539. unsigned long lock_flags;
  540. /* if the critical operation in progress bit is set or the wait times
  541. * out, invoke reset engine to proceed with hard reset. If there is
  542. * some more time to wait, restart the timer
  543. */
  544. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  545. cmd->u.time_left <= 0) {
  546. pmcraid_info("critical op is reset proceeding with reset\n");
  547. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  548. pmcraid_ioa_reset(cmd);
  549. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  550. } else {
  551. pmcraid_info("critical op is not yet reset waiting again\n");
  552. /* restart timer if some more time is available to wait */
  553. cmd->u.time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  554. cmd->timer.data = (unsigned long)cmd;
  555. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  556. cmd->timer.function =
  557. (void (*)(unsigned long))pmcraid_reset_alert_done;
  558. add_timer(&cmd->timer);
  559. }
  560. }
  561. /**
  562. * pmcraid_reset_alert - alerts IOA for a possible reset
  563. * @cmd : command block to be used for reset sequence.
  564. *
  565. * Return Value
  566. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  567. * successfully written to IOA. Returns non-zero in case pci_config_space
  568. * is not accessible
  569. */
  570. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  571. {
  572. struct pmcraid_instance *pinstance = cmd->drv_inst;
  573. u32 doorbells;
  574. int rc;
  575. u16 pci_reg;
  576. /* If we are able to access IOA PCI config space, alert IOA that we are
  577. * going to reset it soon. This enables IOA to preserv persistent error
  578. * data if any. In case memory space is not accessible, proceed with
  579. * BIST or slot_reset
  580. */
  581. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  582. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  583. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  584. * reset IOA doesn't generate any interrupts when CRITICAL
  585. * OPERATION bit is reset. A timer is started to wait for this
  586. * bit to be reset.
  587. */
  588. cmd->u.time_left = PMCRAID_RESET_TIMEOUT;
  589. cmd->timer.data = (unsigned long)cmd;
  590. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  591. cmd->timer.function =
  592. (void (*)(unsigned long))pmcraid_reset_alert_done;
  593. add_timer(&cmd->timer);
  594. iowrite32(DOORBELL_IOA_RESET_ALERT,
  595. pinstance->int_regs.host_ioa_interrupt_reg);
  596. doorbells =
  597. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  598. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  599. } else {
  600. pmcraid_info("PCI config is not accessible starting BIST\n");
  601. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  602. pmcraid_start_bist(cmd);
  603. }
  604. }
  605. /**
  606. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  607. *
  608. * @cmd : pointer to command structure, that got timedout
  609. *
  610. * This function blocks host requests and initiates an adapter reset.
  611. *
  612. * Return value:
  613. * None
  614. */
  615. static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
  616. {
  617. struct pmcraid_instance *pinstance = cmd->drv_inst;
  618. unsigned long lock_flags;
  619. dev_info(&pinstance->pdev->dev,
  620. "Adapter being reset due to command timeout.\n");
  621. /* Command timeouts result in hard reset sequence. The command that got
  622. * timed out may be the one used as part of reset sequence. In this
  623. * case restart reset sequence using the same command block even if
  624. * reset is in progress. Otherwise fail this command and get a free
  625. * command block to restart the reset sequence.
  626. */
  627. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  628. if (!pinstance->ioa_reset_in_progress) {
  629. pinstance->ioa_reset_attempts = 0;
  630. cmd = pmcraid_get_free_cmd(pinstance);
  631. /* If we are out of command blocks, just return here itself.
  632. * Some other command's timeout handler can do the reset job
  633. */
  634. if (cmd == NULL) {
  635. spin_unlock_irqrestore(pinstance->host->host_lock,
  636. lock_flags);
  637. pmcraid_err("no free cmnd block for timeout handler\n");
  638. return;
  639. }
  640. pinstance->reset_cmd = cmd;
  641. pinstance->ioa_reset_in_progress = 1;
  642. } else {
  643. pmcraid_info("reset is already in progress\n");
  644. if (pinstance->reset_cmd != cmd) {
  645. /* This command should have been given to IOA, this
  646. * command will be completed by fail_outstanding_cmds
  647. * anyway
  648. */
  649. pmcraid_err("cmd is pending but reset in progress\n");
  650. }
  651. /* If this command was being used as part of the reset
  652. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  653. * causes fail_outstanding_commands not to return the command
  654. * block back to free pool
  655. */
  656. if (cmd == pinstance->reset_cmd)
  657. cmd->cmd_done = pmcraid_ioa_reset;
  658. }
  659. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  660. scsi_block_requests(pinstance->host);
  661. pmcraid_reset_alert(cmd);
  662. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  663. }
  664. /**
  665. * pmcraid_internal_done - completion routine for internally generated cmds
  666. *
  667. * @cmd: command that got response from IOA
  668. *
  669. * Return Value:
  670. * none
  671. */
  672. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  673. {
  674. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  675. cmd->ioa_cb->ioarcb.cdb[0],
  676. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  677. /* Some of the internal commands are sent with callers blocking for the
  678. * response. Same will be indicated as part of cmd->completion_req
  679. * field. Response path needs to wake up any waiters waiting for cmd
  680. * completion if this flag is set.
  681. */
  682. if (cmd->completion_req) {
  683. cmd->completion_req = 0;
  684. complete(&cmd->wait_for_completion);
  685. }
  686. /* most of the internal commands are completed by caller itself, so
  687. * no need to return the command block back to free pool until we are
  688. * required to do so (e.g once done with initialization).
  689. */
  690. if (cmd->release) {
  691. cmd->release = 0;
  692. pmcraid_return_cmd(cmd);
  693. }
  694. }
  695. /**
  696. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  697. *
  698. * @cmd: command that got response from IOA
  699. *
  700. * This routine is called after driver re-reads configuration table due to a
  701. * lost CCN. It returns the command block back to free pool and schedules
  702. * worker thread to add/delete devices into the system.
  703. *
  704. * Return Value:
  705. * none
  706. */
  707. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  708. {
  709. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  710. cmd->ioa_cb->ioarcb.cdb[0],
  711. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  712. if (cmd->release) {
  713. cmd->release = 0;
  714. pmcraid_return_cmd(cmd);
  715. }
  716. pmcraid_info("scheduling worker for config table reinitialization\n");
  717. schedule_work(&cmd->drv_inst->worker_q);
  718. }
  719. /**
  720. * pmcraid_erp_done - Process completion of SCSI error response from device
  721. * @cmd: pmcraid_command
  722. *
  723. * This function copies the sense buffer into the scsi_cmd struct and completes
  724. * scsi_cmd by calling scsi_done function.
  725. *
  726. * Return value:
  727. * none
  728. */
  729. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  730. {
  731. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  732. struct pmcraid_instance *pinstance = cmd->drv_inst;
  733. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  734. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  735. scsi_cmd->result |= (DID_ERROR << 16);
  736. scmd_printk(KERN_INFO, scsi_cmd,
  737. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  738. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  739. }
  740. /* if we had allocated sense buffers for request sense, copy the sense
  741. * release the buffers
  742. */
  743. if (cmd->sense_buffer != NULL) {
  744. memcpy(scsi_cmd->sense_buffer,
  745. cmd->sense_buffer,
  746. SCSI_SENSE_BUFFERSIZE);
  747. pci_free_consistent(pinstance->pdev,
  748. SCSI_SENSE_BUFFERSIZE,
  749. cmd->sense_buffer, cmd->sense_buffer_dma);
  750. cmd->sense_buffer = NULL;
  751. cmd->sense_buffer_dma = 0;
  752. }
  753. scsi_dma_unmap(scsi_cmd);
  754. pmcraid_return_cmd(cmd);
  755. scsi_cmd->scsi_done(scsi_cmd);
  756. }
  757. /**
  758. * pmcraid_fire_command - sends an IOA command to adapter
  759. *
  760. * This function adds the given block into pending command list
  761. * and returns without waiting
  762. *
  763. * @cmd : command to be sent to the device
  764. *
  765. * Return Value
  766. * None
  767. */
  768. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  769. {
  770. struct pmcraid_instance *pinstance = cmd->drv_inst;
  771. unsigned long lock_flags;
  772. /* Add this command block to pending cmd pool. We do this prior to
  773. * writting IOARCB to ioarrin because IOA might complete the command
  774. * by the time we are about to add it to the list. Response handler
  775. * (isr/tasklet) looks for cmb block in the pending pending list.
  776. */
  777. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  778. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  779. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  780. atomic_inc(&pinstance->outstanding_cmds);
  781. /* driver writes lower 32-bit value of IOARCB address only */
  782. mb();
  783. iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
  784. pinstance->ioarrin);
  785. }
  786. /**
  787. * pmcraid_send_cmd - fires a command to IOA
  788. *
  789. * This function also sets up timeout function, and command completion
  790. * function
  791. *
  792. * @cmd: pointer to the command block to be fired to IOA
  793. * @cmd_done: command completion function, called once IOA responds
  794. * @timeout: timeout to wait for this command completion
  795. * @timeout_func: timeout handler
  796. *
  797. * Return value
  798. * none
  799. */
  800. static void pmcraid_send_cmd(
  801. struct pmcraid_cmd *cmd,
  802. void (*cmd_done) (struct pmcraid_cmd *),
  803. unsigned long timeout,
  804. void (*timeout_func) (struct pmcraid_cmd *)
  805. )
  806. {
  807. /* initialize done function */
  808. cmd->cmd_done = cmd_done;
  809. if (timeout_func) {
  810. /* setup timeout handler */
  811. cmd->timer.data = (unsigned long)cmd;
  812. cmd->timer.expires = jiffies + timeout;
  813. cmd->timer.function = (void (*)(unsigned long))timeout_func;
  814. add_timer(&cmd->timer);
  815. }
  816. /* fire the command to IOA */
  817. _pmcraid_fire_command(cmd);
  818. }
  819. /**
  820. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  821. *
  822. * @cmd: pointer to the command block used as part of reset sequence
  823. *
  824. * Return Value
  825. * None
  826. */
  827. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  828. {
  829. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  830. cmd->ioa_cb->ioarcb.cdb[0],
  831. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  832. /* Note that commands sent during reset require next command to be sent
  833. * to IOA. Hence reinit the done function as well as timeout function
  834. */
  835. pmcraid_reinit_cmdblk(cmd);
  836. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  837. cmd->ioa_cb->ioarcb.resource_handle =
  838. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  839. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  840. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  841. /* fire shutdown command to hardware. */
  842. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  843. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  844. pmcraid_send_cmd(cmd, pmcraid_ioa_reset,
  845. PMCRAID_SHUTDOWN_TIMEOUT,
  846. pmcraid_timeout_handler);
  847. }
  848. /**
  849. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  850. * @cmd: pointer to command block to be used for identify hrrq
  851. *
  852. * Return Value
  853. * 0 in case of success, otherwise non-zero failure code
  854. */
  855. static void pmcraid_querycfg(struct pmcraid_cmd *);
  856. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  857. {
  858. struct pmcraid_instance *pinstance = cmd->drv_inst;
  859. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  860. int index = 0;
  861. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  862. u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  863. pmcraid_reinit_cmdblk(cmd);
  864. /* Initialize ioarcb */
  865. ioarcb->request_type = REQ_TYPE_IOACMD;
  866. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  867. /* initialize the hrrq number where IOA will respond to this command */
  868. ioarcb->hrrq_id = index;
  869. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  870. ioarcb->cdb[1] = index;
  871. /* IOA expects 64-bit pci address to be written in B.E format
  872. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  873. */
  874. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb => %llx:%llx\n",
  875. hrrq_addr, ioarcb->ioarcb_bus_addr);
  876. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  877. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  878. /* Subsequent commands require HRRQ identification to be successful.
  879. * Note that this gets called even during reset from SCSI mid-layer
  880. * or tasklet
  881. */
  882. pmcraid_send_cmd(cmd, pmcraid_querycfg,
  883. PMCRAID_INTERNAL_TIMEOUT,
  884. pmcraid_timeout_handler);
  885. }
  886. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  887. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  888. /**
  889. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  890. *
  891. * @cmd: initialized command block pointer
  892. *
  893. * Return Value
  894. * none
  895. */
  896. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  897. {
  898. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  899. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  900. else
  901. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  902. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  903. }
  904. /**
  905. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  906. *
  907. * @pinstance: pointer to adapter instance structure
  908. * @type: HCAM type
  909. *
  910. * Return Value
  911. * pointer to initialized pmcraid_cmd structure or NULL
  912. */
  913. static struct pmcraid_cmd *pmcraid_init_hcam
  914. (
  915. struct pmcraid_instance *pinstance,
  916. u8 type
  917. )
  918. {
  919. struct pmcraid_cmd *cmd;
  920. struct pmcraid_ioarcb *ioarcb;
  921. struct pmcraid_ioadl_desc *ioadl;
  922. struct pmcraid_hostrcb *hcam;
  923. void (*cmd_done) (struct pmcraid_cmd *);
  924. dma_addr_t dma;
  925. int rcb_size;
  926. cmd = pmcraid_get_free_cmd(pinstance);
  927. if (!cmd) {
  928. pmcraid_err("no free command blocks for hcam\n");
  929. return cmd;
  930. }
  931. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  932. rcb_size = sizeof(struct pmcraid_hcam_ccn);
  933. cmd_done = pmcraid_process_ccn;
  934. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  935. hcam = &pinstance->ccn;
  936. } else {
  937. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  938. cmd_done = pmcraid_process_ldn;
  939. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  940. hcam = &pinstance->ldn;
  941. }
  942. /* initialize command pointer used for HCAM registration */
  943. hcam->cmd = cmd;
  944. ioarcb = &cmd->ioa_cb->ioarcb;
  945. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  946. offsetof(struct pmcraid_ioarcb,
  947. add_data.u.ioadl[0]));
  948. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  949. ioadl = ioarcb->add_data.u.ioadl;
  950. /* Initialize ioarcb */
  951. ioarcb->request_type = REQ_TYPE_HCAM;
  952. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  953. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  954. ioarcb->cdb[1] = type;
  955. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  956. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  957. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  958. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  959. ioadl[0].data_len = cpu_to_le32(rcb_size);
  960. ioadl[0].address = cpu_to_le32(dma);
  961. cmd->cmd_done = cmd_done;
  962. return cmd;
  963. }
  964. /**
  965. * pmcraid_send_hcam - Send an HCAM to IOA
  966. * @pinstance: ioa config struct
  967. * @type: HCAM type
  968. *
  969. * This function will send a Host Controlled Async command to IOA.
  970. *
  971. * Return value:
  972. * none
  973. */
  974. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  975. {
  976. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  977. pmcraid_send_hcam_cmd(cmd);
  978. }
  979. /**
  980. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  981. *
  982. * @cmd: pointer to cmd that is used as cancelling command
  983. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  984. */
  985. static void pmcraid_prepare_cancel_cmd(
  986. struct pmcraid_cmd *cmd,
  987. struct pmcraid_cmd *cmd_to_cancel
  988. )
  989. {
  990. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  991. __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
  992. /* Get the resource handle to where the command to be aborted has been
  993. * sent.
  994. */
  995. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  996. ioarcb->request_type = REQ_TYPE_IOACMD;
  997. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  998. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  999. /* IOARCB address of the command to be cancelled is given in
  1000. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1001. * IOARCB address are not masked.
  1002. */
  1003. ioarcb_addr = cpu_to_be64(ioarcb_addr);
  1004. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1005. }
  1006. /**
  1007. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1008. *
  1009. * @cmd: command to be used as cancelling command
  1010. * @type: HCAM type
  1011. * @cmd_done: op done function for the cancelling command
  1012. */
  1013. static void pmcraid_cancel_hcam(
  1014. struct pmcraid_cmd *cmd,
  1015. u8 type,
  1016. void (*cmd_done) (struct pmcraid_cmd *)
  1017. )
  1018. {
  1019. struct pmcraid_instance *pinstance;
  1020. struct pmcraid_hostrcb *hcam;
  1021. pinstance = cmd->drv_inst;
  1022. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1023. &pinstance->ldn : &pinstance->ccn;
  1024. /* prepare for cancelling previous hcam command. If the HCAM is
  1025. * currently not pending with IOA, we would have hcam->cmd as non-null
  1026. */
  1027. if (hcam->cmd == NULL)
  1028. return;
  1029. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1030. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1031. * schedule queuecommand while we are doing this
  1032. */
  1033. pmcraid_send_cmd(cmd, cmd_done,
  1034. PMCRAID_INTERNAL_TIMEOUT,
  1035. pmcraid_timeout_handler);
  1036. }
  1037. /**
  1038. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1039. *
  1040. * @cmd: command block to be used for cancelling the HCAM
  1041. */
  1042. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1043. {
  1044. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1045. cmd->ioa_cb->ioarcb.cdb[0],
  1046. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1047. pmcraid_reinit_cmdblk(cmd);
  1048. pmcraid_cancel_hcam(cmd,
  1049. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1050. pmcraid_ioa_shutdown);
  1051. }
  1052. /**
  1053. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1054. *
  1055. * @cmd: command block to be used for cancelling the HCAM
  1056. */
  1057. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1058. {
  1059. pmcraid_cancel_hcam(cmd,
  1060. PMCRAID_HCAM_CODE_LOG_DATA,
  1061. pmcraid_cancel_ccn);
  1062. }
  1063. /**
  1064. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1065. *
  1066. * @cfgte: pointer to configuration table entry of the resource
  1067. *
  1068. * Return value:
  1069. * true if resource can be added to midlayer, false(0) otherwise
  1070. */
  1071. static int pmcraid_expose_resource(struct pmcraid_config_table_entry *cfgte)
  1072. {
  1073. int retval = 0;
  1074. if (cfgte->resource_type == RES_TYPE_VSET)
  1075. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1076. else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1077. retval = (RES_BUS(cfgte->resource_address) !=
  1078. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1079. return retval;
  1080. }
  1081. /* attributes supported by pmcraid_event_family */
  1082. enum {
  1083. PMCRAID_AEN_ATTR_UNSPEC,
  1084. PMCRAID_AEN_ATTR_EVENT,
  1085. __PMCRAID_AEN_ATTR_MAX,
  1086. };
  1087. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1088. /* commands supported by pmcraid_event_family */
  1089. enum {
  1090. PMCRAID_AEN_CMD_UNSPEC,
  1091. PMCRAID_AEN_CMD_EVENT,
  1092. __PMCRAID_AEN_CMD_MAX,
  1093. };
  1094. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1095. static struct genl_family pmcraid_event_family = {
  1096. .id = GENL_ID_GENERATE,
  1097. .name = "pmcraid",
  1098. .version = 1,
  1099. .maxattr = PMCRAID_AEN_ATTR_MAX
  1100. };
  1101. /**
  1102. * pmcraid_netlink_init - registers pmcraid_event_family
  1103. *
  1104. * Return value:
  1105. * 0 if the pmcraid_event_family is successfully registered
  1106. * with netlink generic, non-zero otherwise
  1107. */
  1108. static int pmcraid_netlink_init(void)
  1109. {
  1110. int result;
  1111. result = genl_register_family(&pmcraid_event_family);
  1112. if (result)
  1113. return result;
  1114. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1115. pmcraid_event_family.id);
  1116. return result;
  1117. }
  1118. /**
  1119. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1120. *
  1121. * Return value:
  1122. * none
  1123. */
  1124. static void pmcraid_netlink_release(void)
  1125. {
  1126. genl_unregister_family(&pmcraid_event_family);
  1127. }
  1128. /**
  1129. * pmcraid_notify_aen - sends event msg to user space application
  1130. * @pinstance: pointer to adapter instance structure
  1131. * @type: HCAM type
  1132. *
  1133. * Return value:
  1134. * 0 if success, error value in case of any failure.
  1135. */
  1136. static int pmcraid_notify_aen(struct pmcraid_instance *pinstance, u8 type)
  1137. {
  1138. struct sk_buff *skb;
  1139. struct pmcraid_aen_msg *aen_msg;
  1140. void *msg_header;
  1141. int data_size, total_size;
  1142. int result;
  1143. if (type == PMCRAID_HCAM_CODE_LOG_DATA) {
  1144. aen_msg = pinstance->ldn.msg;
  1145. data_size = pinstance->ldn.hcam->data_len;
  1146. } else {
  1147. aen_msg = pinstance->ccn.msg;
  1148. data_size = pinstance->ccn.hcam->data_len;
  1149. }
  1150. data_size += sizeof(struct pmcraid_hcam_hdr);
  1151. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1152. MINOR(pinstance->cdev.dev));
  1153. aen_msg->length = data_size;
  1154. data_size += sizeof(*aen_msg);
  1155. total_size = nla_total_size(data_size);
  1156. skb = genlmsg_new(total_size, GFP_ATOMIC);
  1157. if (!skb) {
  1158. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1159. total_size);
  1160. return -ENOMEM;
  1161. }
  1162. /* add the genetlink message header */
  1163. msg_header = genlmsg_put(skb, 0, 0,
  1164. &pmcraid_event_family, 0,
  1165. PMCRAID_AEN_CMD_EVENT);
  1166. if (!msg_header) {
  1167. pmcraid_err("failed to copy command details\n");
  1168. nlmsg_free(skb);
  1169. return -ENOMEM;
  1170. }
  1171. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1172. if (result) {
  1173. pmcraid_err("failed to copy AEN attribute data \n");
  1174. nlmsg_free(skb);
  1175. return -EINVAL;
  1176. }
  1177. /* send genetlink multicast message to notify appplications */
  1178. result = genlmsg_end(skb, msg_header);
  1179. if (result < 0) {
  1180. pmcraid_err("genlmsg_end failed\n");
  1181. nlmsg_free(skb);
  1182. return result;
  1183. }
  1184. result =
  1185. genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
  1186. /* If there are no listeners, genlmsg_multicast may return non-zero
  1187. * value.
  1188. */
  1189. if (result)
  1190. pmcraid_info("failed to send %s event message %x!\n",
  1191. type == PMCRAID_HCAM_CODE_LOG_DATA ? "LDN" : "CCN",
  1192. result);
  1193. return result;
  1194. }
  1195. /**
  1196. * pmcraid_handle_config_change - Handle a config change from the adapter
  1197. * @pinstance: pointer to per adapter instance structure
  1198. *
  1199. * Return value:
  1200. * none
  1201. */
  1202. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1203. {
  1204. struct pmcraid_config_table_entry *cfg_entry;
  1205. struct pmcraid_hcam_ccn *ccn_hcam;
  1206. struct pmcraid_cmd *cmd;
  1207. struct pmcraid_cmd *cfgcmd;
  1208. struct pmcraid_resource_entry *res = NULL;
  1209. unsigned long lock_flags;
  1210. unsigned long host_lock_flags;
  1211. u32 new_entry = 1;
  1212. u32 hidden_entry = 0;
  1213. int rc;
  1214. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1215. cfg_entry = &ccn_hcam->cfg_entry;
  1216. pmcraid_info
  1217. ("CCN(%x): %x type: %x lost: %x flags: %x res: %x:%x:%x:%x\n",
  1218. pinstance->ccn.hcam->ilid,
  1219. pinstance->ccn.hcam->op_code,
  1220. pinstance->ccn.hcam->notification_type,
  1221. pinstance->ccn.hcam->notification_lost,
  1222. pinstance->ccn.hcam->flags,
  1223. pinstance->host->unique_id,
  1224. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1225. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1226. RES_BUS(cfg_entry->resource_address)),
  1227. RES_IS_VSET(*cfg_entry) ? cfg_entry->unique_flags1 :
  1228. RES_TARGET(cfg_entry->resource_address),
  1229. RES_LUN(cfg_entry->resource_address));
  1230. /* If this HCAM indicates a lost notification, read the config table */
  1231. if (pinstance->ccn.hcam->notification_lost) {
  1232. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1233. if (cfgcmd) {
  1234. pmcraid_info("lost CCN, reading config table\b");
  1235. pinstance->reinit_cfg_table = 1;
  1236. pmcraid_querycfg(cfgcmd);
  1237. } else {
  1238. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1239. }
  1240. goto out_notify_apps;
  1241. }
  1242. /* If this resource is not going to be added to mid-layer, just notify
  1243. * applications and return. If this notification is about hiding a VSET
  1244. * resource, check if it was exposed already.
  1245. */
  1246. if (pinstance->ccn.hcam->notification_type ==
  1247. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1248. cfg_entry->resource_type == RES_TYPE_VSET &&
  1249. cfg_entry->unique_flags1 & 0x80) {
  1250. hidden_entry = 1;
  1251. } else if (!pmcraid_expose_resource(cfg_entry))
  1252. goto out_notify_apps;
  1253. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1254. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1255. rc = memcmp(&res->cfg_entry.resource_address,
  1256. &cfg_entry->resource_address,
  1257. sizeof(cfg_entry->resource_address));
  1258. if (!rc) {
  1259. new_entry = 0;
  1260. break;
  1261. }
  1262. }
  1263. if (new_entry) {
  1264. if (hidden_entry) {
  1265. spin_unlock_irqrestore(&pinstance->resource_lock,
  1266. lock_flags);
  1267. goto out_notify_apps;
  1268. }
  1269. /* If there are more number of resources than what driver can
  1270. * manage, do not notify the applications about the CCN. Just
  1271. * ignore this notifications and re-register the same HCAM
  1272. */
  1273. if (list_empty(&pinstance->free_res_q)) {
  1274. spin_unlock_irqrestore(&pinstance->resource_lock,
  1275. lock_flags);
  1276. pmcraid_err("too many resources attached\n");
  1277. spin_lock_irqsave(pinstance->host->host_lock,
  1278. host_lock_flags);
  1279. pmcraid_send_hcam(pinstance,
  1280. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1281. spin_unlock_irqrestore(pinstance->host->host_lock,
  1282. host_lock_flags);
  1283. return;
  1284. }
  1285. res = list_entry(pinstance->free_res_q.next,
  1286. struct pmcraid_resource_entry, queue);
  1287. list_del(&res->queue);
  1288. res->scsi_dev = NULL;
  1289. res->reset_progress = 0;
  1290. list_add_tail(&res->queue, &pinstance->used_res_q);
  1291. }
  1292. memcpy(&res->cfg_entry, cfg_entry,
  1293. sizeof(struct pmcraid_config_table_entry));
  1294. if (pinstance->ccn.hcam->notification_type ==
  1295. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1296. if (res->scsi_dev) {
  1297. res->cfg_entry.unique_flags1 &= 0x7F;
  1298. res->change_detected = RES_CHANGE_DEL;
  1299. res->cfg_entry.resource_handle =
  1300. PMCRAID_INVALID_RES_HANDLE;
  1301. schedule_work(&pinstance->worker_q);
  1302. } else {
  1303. /* This may be one of the non-exposed resources */
  1304. list_move_tail(&res->queue, &pinstance->free_res_q);
  1305. }
  1306. } else if (!res->scsi_dev) {
  1307. res->change_detected = RES_CHANGE_ADD;
  1308. schedule_work(&pinstance->worker_q);
  1309. }
  1310. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1311. out_notify_apps:
  1312. /* Notify configuration changes to registered applications.*/
  1313. if (!pmcraid_disable_aen)
  1314. pmcraid_notify_aen(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1315. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1316. if (cmd)
  1317. pmcraid_send_hcam_cmd(cmd);
  1318. }
  1319. /**
  1320. * pmcraid_get_error_info - return error string for an ioasc
  1321. * @ioasc: ioasc code
  1322. * Return Value
  1323. * none
  1324. */
  1325. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1326. {
  1327. int i;
  1328. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1329. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1330. return &pmcraid_ioasc_error_table[i];
  1331. }
  1332. return NULL;
  1333. }
  1334. /**
  1335. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1336. * @ioasc: ioasc code
  1337. * @cmd: pointer to command that resulted in 'ioasc'
  1338. */
  1339. void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1340. {
  1341. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1342. if (error_info == NULL ||
  1343. cmd->drv_inst->current_log_level < error_info->log_level)
  1344. return;
  1345. /* log the error string */
  1346. pmcraid_err("cmd [%d] for resource %x failed with %x(%s)\n",
  1347. cmd->ioa_cb->ioarcb.cdb[0],
  1348. cmd->ioa_cb->ioarcb.resource_handle,
  1349. le32_to_cpu(ioasc), error_info->error_string);
  1350. }
  1351. /**
  1352. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1353. *
  1354. * @pinstance: pointer to per adapter instance structure
  1355. *
  1356. * Return value:
  1357. * none
  1358. */
  1359. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1360. {
  1361. struct pmcraid_hcam_ldn *hcam_ldn;
  1362. u32 ioasc;
  1363. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1364. pmcraid_info
  1365. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1366. pinstance->ldn.hcam->ilid,
  1367. pinstance->ldn.hcam->op_code,
  1368. pinstance->ldn.hcam->notification_type,
  1369. pinstance->ldn.hcam->notification_lost,
  1370. pinstance->ldn.hcam->flags,
  1371. pinstance->ldn.hcam->overlay_id);
  1372. /* log only the errors, no need to log informational log entries */
  1373. if (pinstance->ldn.hcam->notification_type !=
  1374. NOTIFICATION_TYPE_ERROR_LOG)
  1375. return;
  1376. if (pinstance->ldn.hcam->notification_lost ==
  1377. HOSTRCB_NOTIFICATIONS_LOST)
  1378. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1379. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1380. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1381. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1382. dev_info(&pinstance->pdev->dev,
  1383. "UnitAttention due to IOA Bus Reset\n");
  1384. scsi_report_bus_reset(
  1385. pinstance->host,
  1386. RES_BUS(hcam_ldn->error_log.fd_ra));
  1387. }
  1388. return;
  1389. }
  1390. /**
  1391. * pmcraid_process_ccn - Op done function for a CCN.
  1392. * @cmd: pointer to command struct
  1393. *
  1394. * This function is the op done function for a configuration
  1395. * change notification
  1396. *
  1397. * Return value:
  1398. * none
  1399. */
  1400. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1401. {
  1402. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1403. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1404. unsigned long lock_flags;
  1405. pinstance->ccn.cmd = NULL;
  1406. pmcraid_return_cmd(cmd);
  1407. /* If driver initiated IOA reset happened while this hcam was pending
  1408. * with IOA, or IOA bringdown sequence is in progress, no need to
  1409. * re-register the hcam
  1410. */
  1411. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1412. atomic_read(&pinstance->ccn.ignore) == 1) {
  1413. return;
  1414. } else if (ioasc) {
  1415. dev_info(&pinstance->pdev->dev,
  1416. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1417. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1418. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1419. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1420. } else {
  1421. pmcraid_handle_config_change(pinstance);
  1422. }
  1423. }
  1424. /**
  1425. * pmcraid_process_ldn - op done function for an LDN
  1426. * @cmd: pointer to command block
  1427. *
  1428. * Return value
  1429. * none
  1430. */
  1431. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1432. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1433. {
  1434. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1435. struct pmcraid_hcam_ldn *ldn_hcam =
  1436. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1437. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1438. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1439. unsigned long lock_flags;
  1440. /* return the command block back to freepool */
  1441. pinstance->ldn.cmd = NULL;
  1442. pmcraid_return_cmd(cmd);
  1443. /* If driver initiated IOA reset happened while this hcam was pending
  1444. * with IOA, no need to re-register the hcam as reset engine will do it
  1445. * once reset sequence is complete
  1446. */
  1447. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1448. atomic_read(&pinstance->ccn.ignore) == 1) {
  1449. return;
  1450. } else if (!ioasc) {
  1451. pmcraid_handle_error_log(pinstance);
  1452. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1453. spin_lock_irqsave(pinstance->host->host_lock,
  1454. lock_flags);
  1455. pmcraid_initiate_reset(pinstance);
  1456. spin_unlock_irqrestore(pinstance->host->host_lock,
  1457. lock_flags);
  1458. return;
  1459. }
  1460. } else {
  1461. dev_info(&pinstance->pdev->dev,
  1462. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1463. }
  1464. /* send netlink message for HCAM notification if enabled */
  1465. if (!pmcraid_disable_aen)
  1466. pmcraid_notify_aen(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1467. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1468. if (cmd)
  1469. pmcraid_send_hcam_cmd(cmd);
  1470. }
  1471. /**
  1472. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1473. *
  1474. * @pinstance: pointer per adapter instance structure
  1475. *
  1476. * Return Value
  1477. * none
  1478. */
  1479. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1480. {
  1481. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1482. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1483. }
  1484. /**
  1485. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1486. * @cmd: pointer to command used as part of reset sequence
  1487. */
  1488. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1489. {
  1490. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1491. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1492. * handling hcam response though it is not necessary. In order to
  1493. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1494. * re-send any more hcams
  1495. */
  1496. atomic_set(&pinstance->ccn.ignore, 1);
  1497. atomic_set(&pinstance->ldn.ignore, 1);
  1498. /* If adapter reset was forced as part of runtime reset sequence,
  1499. * start the reset sequence.
  1500. */
  1501. if (pinstance->force_ioa_reset && !pinstance->ioa_bringdown) {
  1502. pinstance->force_ioa_reset = 0;
  1503. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1504. pmcraid_reset_alert(cmd);
  1505. return;
  1506. }
  1507. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1508. * one after the other. So CCN cancellation will be triggered by
  1509. * pmcraid_cancel_ldn itself.
  1510. */
  1511. pmcraid_cancel_ldn(cmd);
  1512. }
  1513. /**
  1514. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1515. * @pinstance: pointer to adapter instance structure
  1516. * Return Value
  1517. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1518. */
  1519. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1520. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1521. {
  1522. u32 intrs;
  1523. pmcraid_reinit_buffers(pinstance);
  1524. intrs = pmcraid_read_interrupts(pinstance);
  1525. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1526. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1527. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1528. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  1529. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1530. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1531. return 1;
  1532. } else {
  1533. return 0;
  1534. }
  1535. }
  1536. /**
  1537. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1538. * @cmd : pointer to reset command block
  1539. *
  1540. * Return Value
  1541. * none
  1542. */
  1543. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1544. {
  1545. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1546. u32 int_reg;
  1547. u32 doorbell;
  1548. /* There will be an interrupt when Transition to Operational bit is
  1549. * set so tasklet would execute next reset task. The timeout handler
  1550. * would re-initiate a reset
  1551. */
  1552. cmd->cmd_done = pmcraid_ioa_reset;
  1553. cmd->timer.data = (unsigned long)cmd;
  1554. cmd->timer.expires = jiffies +
  1555. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1556. cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
  1557. if (!timer_pending(&cmd->timer))
  1558. add_timer(&cmd->timer);
  1559. /* Enable destructive diagnostics on IOA if it is not yet in
  1560. * operational state
  1561. */
  1562. doorbell = DOORBELL_RUNTIME_RESET |
  1563. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1564. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1565. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1566. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1567. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1568. int_reg);
  1569. }
  1570. /**
  1571. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1572. *
  1573. * @pinstance: pointer to adapter instance structure
  1574. *
  1575. * Return Value
  1576. * none
  1577. */
  1578. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1579. {
  1580. pmcraid_info("%s is not yet implemented\n", __func__);
  1581. }
  1582. /**
  1583. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1584. * @pinstance: pointer to adapter instance structure
  1585. *
  1586. * This function fails all outstanding ops. If they are submitted to IOA
  1587. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1588. * otherwise just completes the commands and returns the cmd blocks to free
  1589. * pool.
  1590. *
  1591. * Return value:
  1592. * none
  1593. */
  1594. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1595. {
  1596. struct pmcraid_cmd *cmd, *temp;
  1597. unsigned long lock_flags;
  1598. /* pending command list is protected by pending_pool_lock. Its
  1599. * traversal must be done as within this lock
  1600. */
  1601. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1602. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1603. free_list) {
  1604. list_del(&cmd->free_list);
  1605. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1606. lock_flags);
  1607. cmd->ioa_cb->ioasa.ioasc =
  1608. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1609. cmd->ioa_cb->ioasa.ilid =
  1610. cpu_to_be32(PMCRAID_DRIVER_ILID);
  1611. /* In case the command timer is still running */
  1612. del_timer(&cmd->timer);
  1613. /* If this is an IO command, complete it by invoking scsi_done
  1614. * function. If this is one of the internal commands other
  1615. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1616. * complete it
  1617. */
  1618. if (cmd->scsi_cmd) {
  1619. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1620. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1621. scsi_cmd->result |= DID_ERROR << 16;
  1622. scsi_dma_unmap(scsi_cmd);
  1623. pmcraid_return_cmd(cmd);
  1624. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1625. le32_to_cpu(resp) >> 2,
  1626. cmd->ioa_cb->ioarcb.cdb[0],
  1627. scsi_cmd->result);
  1628. scsi_cmd->scsi_done(scsi_cmd);
  1629. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1630. cmd->cmd_done == pmcraid_erp_done) {
  1631. cmd->cmd_done(cmd);
  1632. } else if (cmd->cmd_done != pmcraid_ioa_reset) {
  1633. pmcraid_return_cmd(cmd);
  1634. }
  1635. atomic_dec(&pinstance->outstanding_cmds);
  1636. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1637. }
  1638. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1639. }
  1640. /**
  1641. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1642. *
  1643. * @cmd: pointer to the cmd block to be used for entire reset process
  1644. *
  1645. * This function executes most of the steps required for IOA reset. This gets
  1646. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1647. * 'eh_' thread. Access to variables used for controling the reset sequence is
  1648. * synchronized using host lock. Various functions called during reset process
  1649. * would make use of a single command block, pointer to which is also stored in
  1650. * adapter instance structure.
  1651. *
  1652. * Return Value
  1653. * None
  1654. */
  1655. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1656. {
  1657. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1658. u8 reset_complete = 0;
  1659. pinstance->ioa_reset_in_progress = 1;
  1660. if (pinstance->reset_cmd != cmd) {
  1661. pmcraid_err("reset is called with different command block\n");
  1662. pinstance->reset_cmd = cmd;
  1663. }
  1664. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1665. pinstance->ioa_state, cmd);
  1666. switch (pinstance->ioa_state) {
  1667. case IOA_STATE_DEAD:
  1668. /* If IOA is offline, whatever may be the reset reason, just
  1669. * return. callers might be waiting on the reset wait_q, wake
  1670. * up them
  1671. */
  1672. pmcraid_err("IOA is offline no reset is possible\n");
  1673. reset_complete = 1;
  1674. break;
  1675. case IOA_STATE_IN_BRINGDOWN:
  1676. /* we enter here, once ioa shutdown command is processed by IOA
  1677. * Alert IOA for a possible reset. If reset alert fails, IOA
  1678. * goes through hard-reset
  1679. */
  1680. pmcraid_disable_interrupts(pinstance, ~0);
  1681. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1682. pmcraid_reset_alert(cmd);
  1683. break;
  1684. case IOA_STATE_UNKNOWN:
  1685. /* We may be called during probe or resume. Some pre-processing
  1686. * is required for prior to reset
  1687. */
  1688. scsi_block_requests(pinstance->host);
  1689. /* If asked to reset while IOA was processing responses or
  1690. * there are any error responses then IOA may require
  1691. * hard-reset.
  1692. */
  1693. if (pinstance->ioa_hard_reset == 0) {
  1694. if (ioread32(pinstance->ioa_status) &
  1695. INTRS_TRANSITION_TO_OPERATIONAL) {
  1696. pmcraid_info("sticky bit set, bring-up\n");
  1697. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1698. pmcraid_reinit_cmdblk(cmd);
  1699. pmcraid_identify_hrrq(cmd);
  1700. } else {
  1701. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1702. pmcraid_soft_reset(cmd);
  1703. }
  1704. } else {
  1705. /* Alert IOA of a possible reset and wait for critical
  1706. * operation in progress bit to reset
  1707. */
  1708. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1709. pmcraid_reset_alert(cmd);
  1710. }
  1711. break;
  1712. case IOA_STATE_IN_RESET_ALERT:
  1713. /* If critical operation in progress bit is reset or wait gets
  1714. * timed out, reset proceeds with starting BIST on the IOA.
  1715. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1716. * they are 3 or more, reset engine marks IOA dead and returns
  1717. */
  1718. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1719. pmcraid_start_bist(cmd);
  1720. break;
  1721. case IOA_STATE_IN_HARD_RESET:
  1722. pinstance->ioa_reset_attempts++;
  1723. /* retry reset if we haven't reached maximum allowed limit */
  1724. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1725. pinstance->ioa_reset_attempts = 0;
  1726. pmcraid_err("IOA didn't respond marking it as dead\n");
  1727. pinstance->ioa_state = IOA_STATE_DEAD;
  1728. reset_complete = 1;
  1729. break;
  1730. }
  1731. /* Once either bist or pci reset is done, restore PCI config
  1732. * space. If this fails, proceed with hard reset again
  1733. */
  1734. if (pci_restore_state(pinstance->pdev)) {
  1735. pmcraid_info("config-space error resetting again\n");
  1736. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1737. pmcraid_reset_alert(cmd);
  1738. break;
  1739. }
  1740. /* fail all pending commands */
  1741. pmcraid_fail_outstanding_cmds(pinstance);
  1742. /* check if unit check is active, if so extract dump */
  1743. if (pinstance->ioa_unit_check) {
  1744. pmcraid_info("unit check is active\n");
  1745. pinstance->ioa_unit_check = 0;
  1746. pmcraid_get_dump(pinstance);
  1747. pinstance->ioa_reset_attempts--;
  1748. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1749. pmcraid_reset_alert(cmd);
  1750. break;
  1751. }
  1752. /* if the reset reason is to bring-down the ioa, we might be
  1753. * done with the reset restore pci_config_space and complete
  1754. * the reset
  1755. */
  1756. if (pinstance->ioa_bringdown) {
  1757. pmcraid_info("bringing down the adapter\n");
  1758. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1759. pinstance->ioa_bringdown = 0;
  1760. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1761. reset_complete = 1;
  1762. } else {
  1763. /* bring-up IOA, so proceed with soft reset
  1764. * Reinitialize hrrq_buffers and their indices also
  1765. * enable interrupts after a pci_restore_state
  1766. */
  1767. if (pmcraid_reset_enable_ioa(pinstance)) {
  1768. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1769. pmcraid_info("bringing up the adapter\n");
  1770. pmcraid_reinit_cmdblk(cmd);
  1771. pmcraid_identify_hrrq(cmd);
  1772. } else {
  1773. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1774. pmcraid_soft_reset(cmd);
  1775. }
  1776. }
  1777. break;
  1778. case IOA_STATE_IN_SOFT_RESET:
  1779. /* TRANSITION TO OPERATIONAL is on so start initialization
  1780. * sequence
  1781. */
  1782. pmcraid_info("In softreset proceeding with bring-up\n");
  1783. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1784. /* Initialization commands start with HRRQ identification. From
  1785. * now on tasklet completes most of the commands as IOA is up
  1786. * and intrs are enabled
  1787. */
  1788. pmcraid_identify_hrrq(cmd);
  1789. break;
  1790. case IOA_STATE_IN_BRINGUP:
  1791. /* we are done with bringing up of IOA, change the ioa_state to
  1792. * operational and wake up any waiters
  1793. */
  1794. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1795. reset_complete = 1;
  1796. break;
  1797. case IOA_STATE_OPERATIONAL:
  1798. default:
  1799. /* When IOA is operational and a reset is requested, check for
  1800. * the reset reason. If reset is to bring down IOA, unregister
  1801. * HCAMs and initiate shutdown; if adapter reset is forced then
  1802. * restart reset sequence again
  1803. */
  1804. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  1805. pinstance->force_ioa_reset == 0) {
  1806. reset_complete = 1;
  1807. } else {
  1808. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  1809. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  1810. pmcraid_reinit_cmdblk(cmd);
  1811. pmcraid_unregister_hcams(cmd);
  1812. }
  1813. break;
  1814. }
  1815. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  1816. * OPERATIONAL. Reset all control variables used during reset, wake up
  1817. * any waiting threads and let the SCSI mid-layer send commands. Note
  1818. * that host_lock must be held before invoking scsi_report_bus_reset.
  1819. */
  1820. if (reset_complete) {
  1821. pinstance->ioa_reset_in_progress = 0;
  1822. pinstance->ioa_reset_attempts = 0;
  1823. pinstance->reset_cmd = NULL;
  1824. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1825. pinstance->ioa_bringdown = 0;
  1826. pmcraid_return_cmd(cmd);
  1827. /* If target state is to bring up the adapter, proceed with
  1828. * hcam registration and resource exposure to mid-layer.
  1829. */
  1830. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  1831. pmcraid_register_hcams(pinstance);
  1832. wake_up_all(&pinstance->reset_wait_q);
  1833. }
  1834. return;
  1835. }
  1836. /**
  1837. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  1838. * ISR/tasklet during error interrupts including IOA unit check. If reset
  1839. * is already in progress, it just returns, otherwise initiates IOA reset
  1840. * to bring IOA up to operational state.
  1841. *
  1842. * @pinstance: pointer to adapter instance structure
  1843. *
  1844. * Return value
  1845. * none
  1846. */
  1847. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  1848. {
  1849. struct pmcraid_cmd *cmd;
  1850. /* If the reset is already in progress, just return, otherwise start
  1851. * reset sequence and return
  1852. */
  1853. if (!pinstance->ioa_reset_in_progress) {
  1854. scsi_block_requests(pinstance->host);
  1855. cmd = pmcraid_get_free_cmd(pinstance);
  1856. if (cmd == NULL) {
  1857. pmcraid_err("no cmnd blocks for initiate_reset\n");
  1858. return;
  1859. }
  1860. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1861. pinstance->reset_cmd = cmd;
  1862. pinstance->force_ioa_reset = 1;
  1863. pmcraid_ioa_reset(cmd);
  1864. }
  1865. }
  1866. /**
  1867. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  1868. * or bringdown IOA
  1869. * @pinstance: pointer adapter instance structure
  1870. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  1871. * @target_state: expected target state after reset
  1872. *
  1873. * Note: This command initiates reset and waits for its completion. Hence this
  1874. * should not be called from isr/timer/tasklet functions (timeout handlers,
  1875. * error response handlers and interrupt handlers).
  1876. *
  1877. * Return Value
  1878. * 1 in case ioa_state is not target_state, 0 otherwise.
  1879. */
  1880. static int pmcraid_reset_reload(
  1881. struct pmcraid_instance *pinstance,
  1882. u8 shutdown_type,
  1883. u8 target_state
  1884. )
  1885. {
  1886. struct pmcraid_cmd *reset_cmd = NULL;
  1887. unsigned long lock_flags;
  1888. int reset = 1;
  1889. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1890. if (pinstance->ioa_reset_in_progress) {
  1891. pmcraid_info("reset_reload: reset is already in progress\n");
  1892. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1893. wait_event(pinstance->reset_wait_q,
  1894. !pinstance->ioa_reset_in_progress);
  1895. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1896. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  1897. spin_unlock_irqrestore(pinstance->host->host_lock,
  1898. lock_flags);
  1899. pmcraid_info("reset_reload: IOA is dead\n");
  1900. return reset;
  1901. } else if (pinstance->ioa_state == target_state) {
  1902. reset = 0;
  1903. }
  1904. }
  1905. if (reset) {
  1906. pmcraid_info("reset_reload: proceeding with reset\n");
  1907. scsi_block_requests(pinstance->host);
  1908. reset_cmd = pmcraid_get_free_cmd(pinstance);
  1909. if (reset_cmd == NULL) {
  1910. pmcraid_err("no free cmnd for reset_reload\n");
  1911. spin_unlock_irqrestore(pinstance->host->host_lock,
  1912. lock_flags);
  1913. return reset;
  1914. }
  1915. if (shutdown_type == SHUTDOWN_NORMAL)
  1916. pinstance->ioa_bringdown = 1;
  1917. pinstance->ioa_shutdown_type = shutdown_type;
  1918. pinstance->reset_cmd = reset_cmd;
  1919. pinstance->force_ioa_reset = reset;
  1920. pmcraid_info("reset_reload: initiating reset\n");
  1921. pmcraid_ioa_reset(reset_cmd);
  1922. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1923. pmcraid_info("reset_reload: waiting for reset to complete\n");
  1924. wait_event(pinstance->reset_wait_q,
  1925. !pinstance->ioa_reset_in_progress);
  1926. pmcraid_info("reset_reload: reset is complete !! \n");
  1927. scsi_unblock_requests(pinstance->host);
  1928. if (pinstance->ioa_state == target_state)
  1929. reset = 0;
  1930. }
  1931. return reset;
  1932. }
  1933. /**
  1934. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  1935. *
  1936. * @pinstance: pointer to adapter instance structure
  1937. *
  1938. * Return Value
  1939. * whatever is returned from pmcraid_reset_reload
  1940. */
  1941. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  1942. {
  1943. return pmcraid_reset_reload(pinstance,
  1944. SHUTDOWN_NORMAL,
  1945. IOA_STATE_UNKNOWN);
  1946. }
  1947. /**
  1948. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  1949. *
  1950. * @pinstance: pointer to adapter instance structure
  1951. *
  1952. * Return Value
  1953. * whatever is returned from pmcraid_reset_reload
  1954. */
  1955. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  1956. {
  1957. return pmcraid_reset_reload(pinstance,
  1958. SHUTDOWN_NONE,
  1959. IOA_STATE_OPERATIONAL);
  1960. }
  1961. /**
  1962. * pmcraid_request_sense - Send request sense to a device
  1963. * @cmd: pmcraid command struct
  1964. *
  1965. * This function sends a request sense to a device as a result of a check
  1966. * condition. This method re-uses the same command block that failed earlier.
  1967. */
  1968. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  1969. {
  1970. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1971. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  1972. /* allocate DMAable memory for sense buffers */
  1973. cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
  1974. SCSI_SENSE_BUFFERSIZE,
  1975. &cmd->sense_buffer_dma);
  1976. if (cmd->sense_buffer == NULL) {
  1977. pmcraid_err
  1978. ("couldn't allocate sense buffer for request sense\n");
  1979. pmcraid_erp_done(cmd);
  1980. return;
  1981. }
  1982. /* re-use the command block */
  1983. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  1984. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1985. ioarcb->request_flags0 = (SYNC_COMPLETE |
  1986. NO_LINK_DESCS |
  1987. INHIBIT_UL_CHECK);
  1988. ioarcb->request_type = REQ_TYPE_SCSI;
  1989. ioarcb->cdb[0] = REQUEST_SENSE;
  1990. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  1991. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1992. offsetof(struct pmcraid_ioarcb,
  1993. add_data.u.ioadl[0]));
  1994. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1995. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  1996. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  1997. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  1998. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  1999. /* request sense might be called as part of error response processing
  2000. * which runs in tasklets context. It is possible that mid-layer might
  2001. * schedule queuecommand during this time, hence, writting to IOARRIN
  2002. * must be protect by host_lock
  2003. */
  2004. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2005. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2006. pmcraid_timeout_handler);
  2007. }
  2008. /**
  2009. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2010. * @cmd: command that failed
  2011. * @sense: true if request_sense is required after cancel all
  2012. *
  2013. * This function sends a cancel all to a device to clear the queue.
  2014. */
  2015. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
  2016. {
  2017. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2018. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2019. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2020. void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
  2021. : pmcraid_request_sense;
  2022. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2023. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2024. ioarcb->request_type = REQ_TYPE_IOACMD;
  2025. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2026. if (RES_IS_GSCSI(res->cfg_entry))
  2027. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2028. ioarcb->ioadl_bus_addr = 0;
  2029. ioarcb->ioadl_length = 0;
  2030. ioarcb->data_transfer_length = 0;
  2031. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  2032. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2033. * schedule queuecommand while we are doing this
  2034. */
  2035. pmcraid_send_cmd(cmd, cmd_done,
  2036. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2037. pmcraid_timeout_handler);
  2038. }
  2039. /**
  2040. * pmcraid_frame_auto_sense: frame fixed format sense information
  2041. *
  2042. * @cmd: pointer to failing command block
  2043. *
  2044. * Return value
  2045. * none
  2046. */
  2047. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2048. {
  2049. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2050. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2051. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2052. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2053. u32 failing_lba = 0;
  2054. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2055. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2056. if (RES_IS_VSET(res->cfg_entry) &&
  2057. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2058. ioasa->u.vset.failing_lba_hi != 0) {
  2059. sense_buf[0] = 0x72;
  2060. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2061. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2062. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2063. sense_buf[7] = 12;
  2064. sense_buf[8] = 0;
  2065. sense_buf[9] = 0x0A;
  2066. sense_buf[10] = 0x80;
  2067. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2068. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2069. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2070. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2071. sense_buf[15] = failing_lba & 0x000000ff;
  2072. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2073. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2074. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2075. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2076. sense_buf[19] = failing_lba & 0x000000ff;
  2077. } else {
  2078. sense_buf[0] = 0x70;
  2079. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2080. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2081. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2082. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2083. if (RES_IS_VSET(res->cfg_entry))
  2084. failing_lba =
  2085. le32_to_cpu(ioasa->u.
  2086. vset.failing_lba_lo);
  2087. sense_buf[0] |= 0x80;
  2088. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2089. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2090. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2091. sense_buf[6] = failing_lba & 0xff;
  2092. }
  2093. sense_buf[7] = 6; /* additional length */
  2094. }
  2095. }
  2096. /**
  2097. * pmcraid_error_handler - Error response handlers for a SCSI op
  2098. * @cmd: pointer to pmcraid_cmd that has failed
  2099. *
  2100. * This function determines whether or not to initiate ERP on the affected
  2101. * device. This is called from a tasklet, which doesn't hold any locks.
  2102. *
  2103. * Return value:
  2104. * 0 it caller can complete the request, otherwise 1 where in error
  2105. * handler itself completes the request and returns the command block
  2106. * back to free-pool
  2107. */
  2108. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2109. {
  2110. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2111. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2112. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2113. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2114. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2115. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2116. u32 sense_copied = 0;
  2117. if (!res) {
  2118. pmcraid_info("resource pointer is NULL\n");
  2119. return 0;
  2120. }
  2121. /* If this was a SCSI read/write command keep count of errors */
  2122. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2123. atomic_inc(&res->read_failures);
  2124. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2125. atomic_inc(&res->write_failures);
  2126. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2127. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2128. pmcraid_frame_auto_sense(cmd);
  2129. }
  2130. /* Log IOASC/IOASA information based on user settings */
  2131. pmcraid_ioasc_logger(ioasc, cmd);
  2132. switch (masked_ioasc) {
  2133. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2134. scsi_cmd->result |= (DID_ABORT << 16);
  2135. break;
  2136. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2137. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2138. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2139. break;
  2140. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2141. res->sync_reqd = 1;
  2142. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2143. break;
  2144. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2145. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2146. break;
  2147. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2148. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2149. if (!res->reset_progress)
  2150. scsi_report_bus_reset(pinstance->host,
  2151. scsi_cmd->device->channel);
  2152. scsi_cmd->result |= (DID_ERROR << 16);
  2153. break;
  2154. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2155. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2156. res->sync_reqd = 1;
  2157. /* if check_condition is not active return with error otherwise
  2158. * get/frame the sense buffer
  2159. */
  2160. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2161. SAM_STAT_CHECK_CONDITION &&
  2162. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2163. return 0;
  2164. /* If we have auto sense data as part of IOASA pass it to
  2165. * mid-layer
  2166. */
  2167. if (ioasa->auto_sense_length != 0) {
  2168. short sense_len = ioasa->auto_sense_length;
  2169. int data_size = min_t(u16, le16_to_cpu(sense_len),
  2170. SCSI_SENSE_BUFFERSIZE);
  2171. memcpy(scsi_cmd->sense_buffer,
  2172. ioasa->sense_data,
  2173. data_size);
  2174. sense_copied = 1;
  2175. }
  2176. if (RES_IS_GSCSI(res->cfg_entry))
  2177. pmcraid_cancel_all(cmd, sense_copied);
  2178. else if (sense_copied)
  2179. pmcraid_erp_done(cmd);
  2180. else
  2181. pmcraid_request_sense(cmd);
  2182. return 1;
  2183. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2184. break;
  2185. default:
  2186. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2187. scsi_cmd->result |= (DID_ERROR << 16);
  2188. break;
  2189. }
  2190. return 0;
  2191. }
  2192. /**
  2193. * pmcraid_reset_device - device reset handler functions
  2194. *
  2195. * @scsi_cmd: scsi command struct
  2196. * @modifier: reset modifier indicating the reset sequence to be performed
  2197. *
  2198. * This function issues a device reset to the affected device.
  2199. * A LUN reset will be sent to the device first. If that does
  2200. * not work, a target reset will be sent.
  2201. *
  2202. * Return value:
  2203. * SUCCESS / FAILED
  2204. */
  2205. static int pmcraid_reset_device(
  2206. struct scsi_cmnd *scsi_cmd,
  2207. unsigned long timeout,
  2208. u8 modifier
  2209. )
  2210. {
  2211. struct pmcraid_cmd *cmd;
  2212. struct pmcraid_instance *pinstance;
  2213. struct pmcraid_resource_entry *res;
  2214. struct pmcraid_ioarcb *ioarcb;
  2215. unsigned long lock_flags;
  2216. u32 ioasc;
  2217. pinstance =
  2218. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2219. res = scsi_cmd->device->hostdata;
  2220. if (!res) {
  2221. sdev_printk(KERN_ERR, scsi_cmd->device,
  2222. "reset_device: NULL resource pointer\n");
  2223. return FAILED;
  2224. }
  2225. /* If adapter is currently going through reset/reload, return failed.
  2226. * This will force the mid-layer to call _eh_bus/host reset, which
  2227. * will then go to sleep and wait for the reset to complete
  2228. */
  2229. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2230. if (pinstance->ioa_reset_in_progress ||
  2231. pinstance->ioa_state == IOA_STATE_DEAD) {
  2232. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2233. return FAILED;
  2234. }
  2235. res->reset_progress = 1;
  2236. pmcraid_info("Resetting %s resource with addr %x\n",
  2237. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2238. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2239. le32_to_cpu(res->cfg_entry.resource_address));
  2240. /* get a free cmd block */
  2241. cmd = pmcraid_get_free_cmd(pinstance);
  2242. if (cmd == NULL) {
  2243. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2244. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2245. return FAILED;
  2246. }
  2247. ioarcb = &cmd->ioa_cb->ioarcb;
  2248. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2249. ioarcb->request_type = REQ_TYPE_IOACMD;
  2250. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2251. /* Initialize reset modifier bits */
  2252. if (modifier)
  2253. modifier = ENABLE_RESET_MODIFIER | modifier;
  2254. ioarcb->cdb[1] = modifier;
  2255. init_completion(&cmd->wait_for_completion);
  2256. cmd->completion_req = 1;
  2257. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2258. cmd->ioa_cb->ioarcb.cdb[0],
  2259. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2260. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2261. pmcraid_send_cmd(cmd,
  2262. pmcraid_internal_done,
  2263. timeout,
  2264. pmcraid_timeout_handler);
  2265. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2266. /* RESET_DEVICE command completes after all pending IOARCBs are
  2267. * completed. Once this command is completed, pmcraind_internal_done
  2268. * will wake up the 'completion' queue.
  2269. */
  2270. wait_for_completion(&cmd->wait_for_completion);
  2271. /* complete the command here itself and return the command block
  2272. * to free list
  2273. */
  2274. pmcraid_return_cmd(cmd);
  2275. res->reset_progress = 0;
  2276. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2277. /* set the return value based on the returned ioasc */
  2278. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2279. }
  2280. /**
  2281. * _pmcraid_io_done - helper for pmcraid_io_done function
  2282. *
  2283. * @cmd: pointer to pmcraid command struct
  2284. * @reslen: residual data length to be set in the ioasa
  2285. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2286. *
  2287. * This function is invoked by pmcraid_io_done to complete mid-layer
  2288. * scsi ops.
  2289. *
  2290. * Return value:
  2291. * 0 if caller is required to return it to free_pool. Returns 1 if
  2292. * caller need not worry about freeing command block as error handler
  2293. * will take care of that.
  2294. */
  2295. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2296. {
  2297. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2298. int rc = 0;
  2299. scsi_set_resid(scsi_cmd, reslen);
  2300. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2301. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2302. cmd->ioa_cb->ioarcb.cdb[0],
  2303. ioasc, scsi_cmd->result);
  2304. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2305. rc = pmcraid_error_handler(cmd);
  2306. if (rc == 0) {
  2307. scsi_dma_unmap(scsi_cmd);
  2308. scsi_cmd->scsi_done(scsi_cmd);
  2309. }
  2310. return rc;
  2311. }
  2312. /**
  2313. * pmcraid_io_done - SCSI completion function
  2314. *
  2315. * @cmd: pointer to pmcraid command struct
  2316. *
  2317. * This function is invoked by tasklet/mid-layer error handler to completing
  2318. * the SCSI ops sent from mid-layer.
  2319. *
  2320. * Return value
  2321. * none
  2322. */
  2323. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2324. {
  2325. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2326. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2327. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2328. pmcraid_return_cmd(cmd);
  2329. }
  2330. /**
  2331. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2332. *
  2333. * @cmd: command block of the command to be aborted
  2334. *
  2335. * Return Value:
  2336. * returns pointer to command structure used as cancelling cmd
  2337. */
  2338. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2339. {
  2340. struct pmcraid_cmd *cancel_cmd;
  2341. struct pmcraid_instance *pinstance;
  2342. struct pmcraid_resource_entry *res;
  2343. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2344. res = cmd->scsi_cmd->device->hostdata;
  2345. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2346. if (cancel_cmd == NULL) {
  2347. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2348. return NULL;
  2349. }
  2350. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2351. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2352. cmd->ioa_cb->ioarcb.cdb[0],
  2353. cmd->ioa_cb->ioarcb.response_handle >> 2);
  2354. init_completion(&cancel_cmd->wait_for_completion);
  2355. cancel_cmd->completion_req = 1;
  2356. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2357. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2358. cmd->ioa_cb->ioarcb.cdb[0],
  2359. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2360. pmcraid_send_cmd(cancel_cmd,
  2361. pmcraid_internal_done,
  2362. PMCRAID_INTERNAL_TIMEOUT,
  2363. pmcraid_timeout_handler);
  2364. return cancel_cmd;
  2365. }
  2366. /**
  2367. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2368. *
  2369. * @cancel_cmd: command block use as cancelling command
  2370. *
  2371. * Return Value:
  2372. * returns SUCCESS if ABORT TASK has good completion
  2373. * otherwise FAILED
  2374. */
  2375. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2376. {
  2377. struct pmcraid_resource_entry *res;
  2378. u32 ioasc;
  2379. wait_for_completion(&cancel_cmd->wait_for_completion);
  2380. res = cancel_cmd->u.res;
  2381. cancel_cmd->u.res = NULL;
  2382. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2383. /* If the abort task is not timed out we will get a Good completion
  2384. * as sense_key, otherwise we may get one the following responses
  2385. * due to subsquent bus reset or device reset. In case IOASC is
  2386. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2387. */
  2388. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2389. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2390. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2391. res->sync_reqd = 1;
  2392. ioasc = 0;
  2393. }
  2394. /* complete the command here itself */
  2395. pmcraid_return_cmd(cancel_cmd);
  2396. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2397. }
  2398. /**
  2399. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2400. *
  2401. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2402. * mid-layer ensures that no other commands are queued. This
  2403. * never gets called under interrupt, but a separate eh thread.
  2404. *
  2405. * Return value:
  2406. * SUCCESS / FAILED
  2407. */
  2408. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2409. {
  2410. struct pmcraid_instance *pinstance;
  2411. struct pmcraid_cmd *cmd;
  2412. struct pmcraid_resource_entry *res;
  2413. unsigned long host_lock_flags;
  2414. unsigned long pending_lock_flags;
  2415. struct pmcraid_cmd *cancel_cmd = NULL;
  2416. int cmd_found = 0;
  2417. int rc = FAILED;
  2418. pinstance =
  2419. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2420. scmd_printk(KERN_INFO, scsi_cmd,
  2421. "I/O command timed out, aborting it.\n");
  2422. res = scsi_cmd->device->hostdata;
  2423. if (res == NULL)
  2424. return rc;
  2425. /* If we are currently going through reset/reload, return failed.
  2426. * This will force the mid-layer to eventually call
  2427. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2428. * reset to complete
  2429. */
  2430. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2431. if (pinstance->ioa_reset_in_progress ||
  2432. pinstance->ioa_state == IOA_STATE_DEAD) {
  2433. spin_unlock_irqrestore(pinstance->host->host_lock,
  2434. host_lock_flags);
  2435. return rc;
  2436. }
  2437. /* loop over pending cmd list to find cmd corresponding to this
  2438. * scsi_cmd. Note that this command might not have been completed
  2439. * already. locking: all pending commands are protected with
  2440. * pending_pool_lock.
  2441. */
  2442. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2443. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2444. if (cmd->scsi_cmd == scsi_cmd) {
  2445. cmd_found = 1;
  2446. break;
  2447. }
  2448. }
  2449. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2450. pending_lock_flags);
  2451. /* If the command to be aborted was given to IOA and still pending with
  2452. * it, send ABORT_TASK to abort this and wait for its completion
  2453. */
  2454. if (cmd_found)
  2455. cancel_cmd = pmcraid_abort_cmd(cmd);
  2456. spin_unlock_irqrestore(pinstance->host->host_lock,
  2457. host_lock_flags);
  2458. if (cancel_cmd) {
  2459. cancel_cmd->u.res = cmd->scsi_cmd->device->hostdata;
  2460. rc = pmcraid_abort_complete(cancel_cmd);
  2461. }
  2462. return cmd_found ? rc : SUCCESS;
  2463. }
  2464. /**
  2465. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2466. *
  2467. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2468. *
  2469. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2470. * Since these are called from mid-layer EH thread, no other IO will be queued
  2471. * to the resource being reset. However, control path (IOCTL) may be active so
  2472. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2473. * takes care by locking/unlocking host_lock.
  2474. *
  2475. * Return value
  2476. * SUCCESS or FAILED
  2477. */
  2478. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2479. {
  2480. scmd_printk(KERN_INFO, scmd,
  2481. "resetting device due to an I/O command timeout.\n");
  2482. return pmcraid_reset_device(scmd,
  2483. PMCRAID_INTERNAL_TIMEOUT,
  2484. RESET_DEVICE_LUN);
  2485. }
  2486. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2487. {
  2488. scmd_printk(KERN_INFO, scmd,
  2489. "Doing bus reset due to an I/O command timeout.\n");
  2490. return pmcraid_reset_device(scmd,
  2491. PMCRAID_RESET_BUS_TIMEOUT,
  2492. RESET_DEVICE_BUS);
  2493. }
  2494. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2495. {
  2496. scmd_printk(KERN_INFO, scmd,
  2497. "Doing target reset due to an I/O command timeout.\n");
  2498. return pmcraid_reset_device(scmd,
  2499. PMCRAID_INTERNAL_TIMEOUT,
  2500. RESET_DEVICE_TARGET);
  2501. }
  2502. /**
  2503. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2504. *
  2505. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2506. *
  2507. * Initiates adapter reset to bring it up to operational state
  2508. *
  2509. * Return value
  2510. * SUCCESS or FAILED
  2511. */
  2512. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2513. {
  2514. unsigned long interval = 10000; /* 10 seconds interval */
  2515. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2516. struct pmcraid_instance *pinstance =
  2517. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2518. /* wait for an additional 150 seconds just in case firmware could come
  2519. * up and if it could complete all the pending commands excluding the
  2520. * two HCAM (CCN and LDN).
  2521. */
  2522. while (waits--) {
  2523. if (atomic_read(&pinstance->outstanding_cmds) <=
  2524. PMCRAID_MAX_HCAM_CMD)
  2525. return SUCCESS;
  2526. msleep(interval);
  2527. }
  2528. dev_err(&pinstance->pdev->dev,
  2529. "Adapter being reset due to an I/O command timeout.\n");
  2530. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2531. }
  2532. /**
  2533. * pmcraid_task_attributes - Translate SPI Q-Tags to task attributes
  2534. * @scsi_cmd: scsi command struct
  2535. *
  2536. * Return value
  2537. * number of tags or 0 if the task is not tagged
  2538. */
  2539. static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd)
  2540. {
  2541. char tag[2];
  2542. u8 rc = 0;
  2543. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  2544. switch (tag[0]) {
  2545. case MSG_SIMPLE_TAG:
  2546. rc = TASK_TAG_SIMPLE;
  2547. break;
  2548. case MSG_HEAD_TAG:
  2549. rc = TASK_TAG_QUEUE_HEAD;
  2550. break;
  2551. case MSG_ORDERED_TAG:
  2552. rc = TASK_TAG_ORDERED;
  2553. break;
  2554. };
  2555. }
  2556. return rc;
  2557. }
  2558. /**
  2559. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2560. * @cmd: pmcraid command struct
  2561. * @sgcount: count of scatter-gather elements
  2562. *
  2563. * Return value
  2564. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2565. * or external IOADLs
  2566. */
  2567. struct pmcraid_ioadl_desc *
  2568. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2569. {
  2570. struct pmcraid_ioadl_desc *ioadl;
  2571. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2572. int ioadl_count = 0;
  2573. if (ioarcb->add_cmd_param_length)
  2574. ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
  2575. ioarcb->ioadl_length =
  2576. sizeof(struct pmcraid_ioadl_desc) * sgcount;
  2577. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2578. /* external ioadls start at offset 0x80 from control_block
  2579. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2580. * It is necessary to indicate to firmware that driver is
  2581. * using ioadls to be treated as external to IOARCB.
  2582. */
  2583. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  2584. ioarcb->ioadl_bus_addr =
  2585. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2586. offsetof(struct pmcraid_ioarcb,
  2587. add_data.u.ioadl[3]));
  2588. ioadl = &ioarcb->add_data.u.ioadl[3];
  2589. } else {
  2590. ioarcb->ioadl_bus_addr =
  2591. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2592. offsetof(struct pmcraid_ioarcb,
  2593. add_data.u.ioadl[ioadl_count]));
  2594. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2595. ioarcb->ioarcb_bus_addr |=
  2596. DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
  2597. }
  2598. return ioadl;
  2599. }
  2600. /**
  2601. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2602. * @pinstance: pointer to adapter instance structure
  2603. * @cmd: pmcraid command struct
  2604. *
  2605. * This function is invoked by queuecommand entry point while sending a command
  2606. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2607. *
  2608. * Return value:
  2609. * 0 on success or -1 on failure
  2610. */
  2611. static int pmcraid_build_ioadl(
  2612. struct pmcraid_instance *pinstance,
  2613. struct pmcraid_cmd *cmd
  2614. )
  2615. {
  2616. int i, nseg;
  2617. struct scatterlist *sglist;
  2618. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2619. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2620. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2621. u32 length = scsi_bufflen(scsi_cmd);
  2622. if (!length)
  2623. return 0;
  2624. nseg = scsi_dma_map(scsi_cmd);
  2625. if (nseg < 0) {
  2626. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2627. return -1;
  2628. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2629. scsi_dma_unmap(scsi_cmd);
  2630. scmd_printk(KERN_ERR, scsi_cmd,
  2631. "sg count is (%d) more than allowed!\n", nseg);
  2632. return -1;
  2633. }
  2634. /* Initialize IOARCB data transfer length fields */
  2635. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2636. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2637. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2638. ioarcb->data_transfer_length = cpu_to_le32(length);
  2639. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2640. /* Initialize IOADL descriptor addresses */
  2641. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2642. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2643. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2644. ioadl[i].flags = 0;
  2645. }
  2646. /* setup last descriptor */
  2647. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2648. return 0;
  2649. }
  2650. /**
  2651. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2652. * @sglist: scatter/gather list pointer
  2653. *
  2654. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2655. *
  2656. * Return value:
  2657. * none
  2658. */
  2659. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2660. {
  2661. int i;
  2662. for (i = 0; i < sglist->num_sg; i++)
  2663. __free_pages(sg_page(&(sglist->scatterlist[i])),
  2664. sglist->order);
  2665. kfree(sglist);
  2666. }
  2667. /**
  2668. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2669. * @buflen: buffer length
  2670. *
  2671. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2672. * list.
  2673. *
  2674. * Return value
  2675. * pointer to sglist / NULL on failure
  2676. */
  2677. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2678. {
  2679. struct pmcraid_sglist *sglist;
  2680. struct scatterlist *scatterlist;
  2681. struct page *page;
  2682. int num_elem, i, j;
  2683. int sg_size;
  2684. int order;
  2685. int bsize_elem;
  2686. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2687. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2688. bsize_elem = PAGE_SIZE * (1 << order);
  2689. /* Determine the actual number of sg entries needed */
  2690. if (buflen % bsize_elem)
  2691. num_elem = (buflen / bsize_elem) + 1;
  2692. else
  2693. num_elem = buflen / bsize_elem;
  2694. /* Allocate a scatter/gather list for the DMA */
  2695. sglist = kzalloc(sizeof(struct pmcraid_sglist) +
  2696. (sizeof(struct scatterlist) * (num_elem - 1)),
  2697. GFP_KERNEL);
  2698. if (sglist == NULL)
  2699. return NULL;
  2700. scatterlist = sglist->scatterlist;
  2701. sg_init_table(scatterlist, num_elem);
  2702. sglist->order = order;
  2703. sglist->num_sg = num_elem;
  2704. sg_size = buflen;
  2705. for (i = 0; i < num_elem; i++) {
  2706. page = alloc_pages(GFP_KERNEL|GFP_DMA, order);
  2707. if (!page) {
  2708. for (j = i - 1; j >= 0; j--)
  2709. __free_pages(sg_page(&scatterlist[j]), order);
  2710. kfree(sglist);
  2711. return NULL;
  2712. }
  2713. sg_set_page(&scatterlist[i], page,
  2714. sg_size < bsize_elem ? sg_size : bsize_elem, 0);
  2715. sg_size -= bsize_elem;
  2716. }
  2717. return sglist;
  2718. }
  2719. /**
  2720. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2721. * @sglist: scatter/gather list pointer
  2722. * @buffer: buffer pointer
  2723. * @len: buffer length
  2724. * @direction: data transfer direction
  2725. *
  2726. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2727. *
  2728. * Return value:
  2729. * 0 on success / other on failure
  2730. */
  2731. static int pmcraid_copy_sglist(
  2732. struct pmcraid_sglist *sglist,
  2733. unsigned long buffer,
  2734. u32 len,
  2735. int direction
  2736. )
  2737. {
  2738. struct scatterlist *scatterlist;
  2739. void *kaddr;
  2740. int bsize_elem;
  2741. int i;
  2742. int rc = 0;
  2743. /* Determine the actual number of bytes per element */
  2744. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2745. scatterlist = sglist->scatterlist;
  2746. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  2747. struct page *page = sg_page(&scatterlist[i]);
  2748. kaddr = kmap(page);
  2749. if (direction == DMA_TO_DEVICE)
  2750. rc = __copy_from_user(kaddr,
  2751. (void *)buffer,
  2752. bsize_elem);
  2753. else
  2754. rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
  2755. kunmap(page);
  2756. if (rc) {
  2757. pmcraid_err("failed to copy user data into sg list\n");
  2758. return -EFAULT;
  2759. }
  2760. scatterlist[i].length = bsize_elem;
  2761. }
  2762. if (len % bsize_elem) {
  2763. struct page *page = sg_page(&scatterlist[i]);
  2764. kaddr = kmap(page);
  2765. if (direction == DMA_TO_DEVICE)
  2766. rc = __copy_from_user(kaddr,
  2767. (void *)buffer,
  2768. len % bsize_elem);
  2769. else
  2770. rc = __copy_to_user((void *)buffer,
  2771. kaddr,
  2772. len % bsize_elem);
  2773. kunmap(page);
  2774. scatterlist[i].length = len % bsize_elem;
  2775. }
  2776. if (rc) {
  2777. pmcraid_err("failed to copy user data into sg list\n");
  2778. rc = -EFAULT;
  2779. }
  2780. return rc;
  2781. }
  2782. /**
  2783. * pmcraid_queuecommand - Queue a mid-layer request
  2784. * @scsi_cmd: scsi command struct
  2785. * @done: done function
  2786. *
  2787. * This function queues a request generated by the mid-layer. Midlayer calls
  2788. * this routine within host->lock. Some of the functions called by queuecommand
  2789. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2790. *
  2791. * Return value:
  2792. * 0 on success
  2793. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2794. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2795. */
  2796. static int pmcraid_queuecommand(
  2797. struct scsi_cmnd *scsi_cmd,
  2798. void (*done) (struct scsi_cmnd *)
  2799. )
  2800. {
  2801. struct pmcraid_instance *pinstance;
  2802. struct pmcraid_resource_entry *res;
  2803. struct pmcraid_ioarcb *ioarcb;
  2804. struct pmcraid_cmd *cmd;
  2805. int rc = 0;
  2806. pinstance =
  2807. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2808. scsi_cmd->scsi_done = done;
  2809. res = scsi_cmd->device->hostdata;
  2810. scsi_cmd->result = (DID_OK << 16);
  2811. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2812. * the command
  2813. */
  2814. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2815. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2816. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2817. scsi_cmd->scsi_done(scsi_cmd);
  2818. return 0;
  2819. }
  2820. /* If IOA reset is in progress, can't queue the commands */
  2821. if (pinstance->ioa_reset_in_progress)
  2822. return SCSI_MLQUEUE_HOST_BUSY;
  2823. /* initialize the command and IOARCB to be sent to IOA */
  2824. cmd = pmcraid_get_free_cmd(pinstance);
  2825. if (cmd == NULL) {
  2826. pmcraid_err("free command block is not available\n");
  2827. return SCSI_MLQUEUE_HOST_BUSY;
  2828. }
  2829. cmd->scsi_cmd = scsi_cmd;
  2830. ioarcb = &(cmd->ioa_cb->ioarcb);
  2831. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  2832. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2833. ioarcb->request_type = REQ_TYPE_SCSI;
  2834. cmd->cmd_done = pmcraid_io_done;
  2835. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  2836. if (scsi_cmd->underflow == 0)
  2837. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  2838. if (res->sync_reqd) {
  2839. ioarcb->request_flags0 |= SYNC_COMPLETE;
  2840. res->sync_reqd = 0;
  2841. }
  2842. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2843. ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
  2844. if (RES_IS_GSCSI(res->cfg_entry))
  2845. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  2846. }
  2847. rc = pmcraid_build_ioadl(pinstance, cmd);
  2848. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  2849. le32_to_cpu(ioarcb->response_handle) >> 2,
  2850. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  2851. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  2852. PMCRAID_PHYS_BUS_ID,
  2853. RES_IS_VSET(res->cfg_entry) ?
  2854. res->cfg_entry.unique_flags1 :
  2855. RES_TARGET(res->cfg_entry.resource_address),
  2856. RES_LUN(res->cfg_entry.resource_address));
  2857. if (likely(rc == 0)) {
  2858. _pmcraid_fire_command(cmd);
  2859. } else {
  2860. pmcraid_err("queuecommand could not build ioadl\n");
  2861. pmcraid_return_cmd(cmd);
  2862. rc = SCSI_MLQUEUE_HOST_BUSY;
  2863. }
  2864. return rc;
  2865. }
  2866. /**
  2867. * pmcraid_open -char node "open" entry, allowed only users with admin access
  2868. */
  2869. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  2870. {
  2871. struct pmcraid_instance *pinstance;
  2872. if (!capable(CAP_SYS_ADMIN))
  2873. return -EACCES;
  2874. /* Populate adapter instance * pointer for use by ioctl */
  2875. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  2876. filep->private_data = pinstance;
  2877. return 0;
  2878. }
  2879. /**
  2880. * pmcraid_release - char node "release" entry point
  2881. */
  2882. static int pmcraid_chr_release(struct inode *inode, struct file *filep)
  2883. {
  2884. struct pmcraid_instance *pinstance =
  2885. ((struct pmcraid_instance *)filep->private_data);
  2886. filep->private_data = NULL;
  2887. fasync_helper(-1, filep, 0, &pinstance->aen_queue);
  2888. return 0;
  2889. }
  2890. /**
  2891. * pmcraid_fasync - Async notifier registration from applications
  2892. *
  2893. * This function adds the calling process to a driver global queue. When an
  2894. * event occurs, SIGIO will be sent to all processes in this queue.
  2895. */
  2896. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  2897. {
  2898. struct pmcraid_instance *pinstance;
  2899. int rc;
  2900. pinstance = (struct pmcraid_instance *)filep->private_data;
  2901. mutex_lock(&pinstance->aen_queue_lock);
  2902. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  2903. mutex_unlock(&pinstance->aen_queue_lock);
  2904. return rc;
  2905. }
  2906. /**
  2907. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  2908. * commands sent over IOCTL interface
  2909. *
  2910. * @cmd : pointer to struct pmcraid_cmd
  2911. * @buflen : length of the request buffer
  2912. * @direction : data transfer direction
  2913. *
  2914. * Return value
  2915. * 0 on success, non-zero error code on failure
  2916. */
  2917. static int pmcraid_build_passthrough_ioadls(
  2918. struct pmcraid_cmd *cmd,
  2919. int buflen,
  2920. int direction
  2921. )
  2922. {
  2923. struct pmcraid_sglist *sglist = NULL;
  2924. struct scatterlist *sg = NULL;
  2925. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2926. struct pmcraid_ioadl_desc *ioadl;
  2927. int i;
  2928. sglist = pmcraid_alloc_sglist(buflen);
  2929. if (!sglist) {
  2930. pmcraid_err("can't allocate memory for passthrough SGls\n");
  2931. return -ENOMEM;
  2932. }
  2933. sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
  2934. sglist->scatterlist,
  2935. sglist->num_sg, direction);
  2936. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  2937. dev_err(&cmd->drv_inst->pdev->dev,
  2938. "Failed to map passthrough buffer!\n");
  2939. pmcraid_free_sglist(sglist);
  2940. return -EIO;
  2941. }
  2942. cmd->sglist = sglist;
  2943. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2944. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  2945. /* Initialize IOADL descriptor addresses */
  2946. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  2947. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  2948. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  2949. ioadl[i].flags = 0;
  2950. }
  2951. /* setup the last descriptor */
  2952. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2953. return 0;
  2954. }
  2955. /**
  2956. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  2957. *
  2958. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  2959. * @buflen: size of the request buffer
  2960. * @direction: data transfer direction
  2961. *
  2962. * Return value
  2963. * 0 on success, non-zero error code on failure
  2964. */
  2965. static void pmcraid_release_passthrough_ioadls(
  2966. struct pmcraid_cmd *cmd,
  2967. int buflen,
  2968. int direction
  2969. )
  2970. {
  2971. struct pmcraid_sglist *sglist = cmd->sglist;
  2972. if (buflen > 0) {
  2973. pci_unmap_sg(cmd->drv_inst->pdev,
  2974. sglist->scatterlist,
  2975. sglist->num_sg,
  2976. direction);
  2977. pmcraid_free_sglist(sglist);
  2978. cmd->sglist = NULL;
  2979. }
  2980. }
  2981. /**
  2982. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  2983. *
  2984. * @pinstance: pointer to adapter instance structure
  2985. * @cmd: ioctl code
  2986. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  2987. *
  2988. * Return value
  2989. * 0 on success, non-zero error code on failure
  2990. */
  2991. static long pmcraid_ioctl_passthrough(
  2992. struct pmcraid_instance *pinstance,
  2993. unsigned int ioctl_cmd,
  2994. unsigned int buflen,
  2995. unsigned long arg
  2996. )
  2997. {
  2998. struct pmcraid_passthrough_ioctl_buffer *buffer;
  2999. struct pmcraid_ioarcb *ioarcb;
  3000. struct pmcraid_cmd *cmd;
  3001. struct pmcraid_cmd *cancel_cmd;
  3002. unsigned long request_buffer;
  3003. unsigned long request_offset;
  3004. unsigned long lock_flags;
  3005. int request_size;
  3006. int buffer_size;
  3007. u8 access, direction;
  3008. int rc = 0;
  3009. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3010. if (pinstance->ioa_reset_in_progress) {
  3011. rc = wait_event_interruptible_timeout(
  3012. pinstance->reset_wait_q,
  3013. !pinstance->ioa_reset_in_progress,
  3014. msecs_to_jiffies(10000));
  3015. if (!rc)
  3016. return -ETIMEDOUT;
  3017. else if (rc < 0)
  3018. return -ERESTARTSYS;
  3019. }
  3020. /* If adapter is not in operational state, return error */
  3021. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3022. pmcraid_err("IOA is not operational\n");
  3023. return -ENOTTY;
  3024. }
  3025. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3026. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3027. if (!buffer) {
  3028. pmcraid_err("no memory for passthrough buffer\n");
  3029. return -ENOMEM;
  3030. }
  3031. request_offset =
  3032. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3033. request_buffer = arg + request_offset;
  3034. rc = __copy_from_user(buffer,
  3035. (struct pmcraid_passthrough_ioctl_buffer *) arg,
  3036. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3037. if (rc) {
  3038. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3039. rc = -EFAULT;
  3040. goto out_free_buffer;
  3041. }
  3042. request_size = buffer->ioarcb.data_transfer_length;
  3043. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3044. access = VERIFY_READ;
  3045. direction = DMA_TO_DEVICE;
  3046. } else {
  3047. access = VERIFY_WRITE;
  3048. direction = DMA_FROM_DEVICE;
  3049. }
  3050. if (request_size > 0) {
  3051. rc = access_ok(access, arg, request_offset + request_size);
  3052. if (!rc) {
  3053. rc = -EFAULT;
  3054. goto out_free_buffer;
  3055. }
  3056. }
  3057. /* check if we have any additional command parameters */
  3058. if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
  3059. rc = -EINVAL;
  3060. goto out_free_buffer;
  3061. }
  3062. cmd = pmcraid_get_free_cmd(pinstance);
  3063. if (!cmd) {
  3064. pmcraid_err("free command block is not available\n");
  3065. rc = -ENOMEM;
  3066. goto out_free_buffer;
  3067. }
  3068. cmd->scsi_cmd = NULL;
  3069. ioarcb = &(cmd->ioa_cb->ioarcb);
  3070. /* Copy the user-provided IOARCB stuff field by field */
  3071. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3072. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3073. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3074. ioarcb->request_type = buffer->ioarcb.request_type;
  3075. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3076. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3077. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3078. if (buffer->ioarcb.add_cmd_param_length) {
  3079. ioarcb->add_cmd_param_length =
  3080. buffer->ioarcb.add_cmd_param_length;
  3081. ioarcb->add_cmd_param_offset =
  3082. buffer->ioarcb.add_cmd_param_offset;
  3083. memcpy(ioarcb->add_data.u.add_cmd_params,
  3084. buffer->ioarcb.add_data.u.add_cmd_params,
  3085. buffer->ioarcb.add_cmd_param_length);
  3086. }
  3087. if (request_size) {
  3088. rc = pmcraid_build_passthrough_ioadls(cmd,
  3089. request_size,
  3090. direction);
  3091. if (rc) {
  3092. pmcraid_err("couldn't build passthrough ioadls\n");
  3093. goto out_free_buffer;
  3094. }
  3095. }
  3096. /* If data is being written into the device, copy the data from user
  3097. * buffers
  3098. */
  3099. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3100. rc = pmcraid_copy_sglist(cmd->sglist,
  3101. request_buffer,
  3102. request_size,
  3103. direction);
  3104. if (rc) {
  3105. pmcraid_err("failed to copy user buffer\n");
  3106. goto out_free_sglist;
  3107. }
  3108. }
  3109. /* passthrough ioctl is a blocking command so, put the user to sleep
  3110. * until timeout. Note that a timeout value of 0 means, do timeout.
  3111. */
  3112. cmd->cmd_done = pmcraid_internal_done;
  3113. init_completion(&cmd->wait_for_completion);
  3114. cmd->completion_req = 1;
  3115. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3116. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3117. cmd->ioa_cb->ioarcb.cdb[0],
  3118. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3119. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3120. _pmcraid_fire_command(cmd);
  3121. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3122. /* If command timeout is specified put caller to wait till that time,
  3123. * otherwise it would be blocking wait. If command gets timed out, it
  3124. * will be aborted.
  3125. */
  3126. if (buffer->ioarcb.cmd_timeout == 0) {
  3127. wait_for_completion(&cmd->wait_for_completion);
  3128. } else if (!wait_for_completion_timeout(
  3129. &cmd->wait_for_completion,
  3130. msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
  3131. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3132. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
  3133. cmd->ioa_cb->ioarcb.cdb[0]);
  3134. rc = -ETIMEDOUT;
  3135. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3136. cancel_cmd = pmcraid_abort_cmd(cmd);
  3137. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3138. if (cancel_cmd) {
  3139. wait_for_completion(&cancel_cmd->wait_for_completion);
  3140. pmcraid_return_cmd(cancel_cmd);
  3141. }
  3142. goto out_free_sglist;
  3143. }
  3144. /* If the command failed for any reason, copy entire IOASA buffer and
  3145. * return IOCTL success. If copying IOASA to user-buffer fails, return
  3146. * EFAULT
  3147. */
  3148. if (le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)) {
  3149. void *ioasa =
  3150. (void *)(arg +
  3151. offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
  3152. pmcraid_info("command failed with %x\n",
  3153. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  3154. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3155. sizeof(struct pmcraid_ioasa))) {
  3156. pmcraid_err("failed to copy ioasa buffer to user\n");
  3157. rc = -EFAULT;
  3158. }
  3159. }
  3160. /* If the data transfer was from device, copy the data onto user
  3161. * buffers
  3162. */
  3163. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3164. rc = pmcraid_copy_sglist(cmd->sglist,
  3165. request_buffer,
  3166. request_size,
  3167. direction);
  3168. if (rc) {
  3169. pmcraid_err("failed to copy user buffer\n");
  3170. rc = -EFAULT;
  3171. }
  3172. }
  3173. out_free_sglist:
  3174. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3175. pmcraid_return_cmd(cmd);
  3176. out_free_buffer:
  3177. kfree(buffer);
  3178. return rc;
  3179. }
  3180. /**
  3181. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3182. *
  3183. * @pinstance: pointer to adapter instance structure
  3184. * @cmd: ioctl command passed in
  3185. * @buflen: length of user_buffer
  3186. * @user_buffer: user buffer pointer
  3187. *
  3188. * Return Value
  3189. * 0 in case of success, otherwise appropriate error code
  3190. */
  3191. static long pmcraid_ioctl_driver(
  3192. struct pmcraid_instance *pinstance,
  3193. unsigned int cmd,
  3194. unsigned int buflen,
  3195. void __user *user_buffer
  3196. )
  3197. {
  3198. int rc = -ENOSYS;
  3199. if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
  3200. pmcraid_err("ioctl_driver: access fault in request buffer \n");
  3201. return -EFAULT;
  3202. }
  3203. switch (cmd) {
  3204. case PMCRAID_IOCTL_RESET_ADAPTER:
  3205. pmcraid_reset_bringup(pinstance);
  3206. rc = 0;
  3207. break;
  3208. default:
  3209. break;
  3210. }
  3211. return rc;
  3212. }
  3213. /**
  3214. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3215. *
  3216. * @cmd: ioctl command
  3217. * @arg: user buffer
  3218. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3219. *
  3220. * Return Value
  3221. * negetive error code if there are access issues, otherwise zero.
  3222. * Upon success, returns ioctl header copied out of user buffer.
  3223. */
  3224. static int pmcraid_check_ioctl_buffer(
  3225. int cmd,
  3226. void __user *arg,
  3227. struct pmcraid_ioctl_header *hdr
  3228. )
  3229. {
  3230. int rc = 0;
  3231. int access = VERIFY_READ;
  3232. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3233. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3234. return -EFAULT;
  3235. }
  3236. /* check for valid driver signature */
  3237. rc = memcmp(hdr->signature,
  3238. PMCRAID_IOCTL_SIGNATURE,
  3239. sizeof(hdr->signature));
  3240. if (rc) {
  3241. pmcraid_err("signature verification failed\n");
  3242. return -EINVAL;
  3243. }
  3244. /* buffer length can't be negetive */
  3245. if (hdr->buffer_length < 0) {
  3246. pmcraid_err("ioctl: invalid buffer length specified\n");
  3247. return -EINVAL;
  3248. }
  3249. /* check for appropriate buffer access */
  3250. if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
  3251. access = VERIFY_WRITE;
  3252. rc = access_ok(access,
  3253. (arg + sizeof(struct pmcraid_ioctl_header)),
  3254. hdr->buffer_length);
  3255. if (!rc) {
  3256. pmcraid_err("access failed for user buffer of size %d\n",
  3257. hdr->buffer_length);
  3258. return -EFAULT;
  3259. }
  3260. return 0;
  3261. }
  3262. /**
  3263. * pmcraid_ioctl - char node ioctl entry point
  3264. */
  3265. static long pmcraid_chr_ioctl(
  3266. struct file *filep,
  3267. unsigned int cmd,
  3268. unsigned long arg
  3269. )
  3270. {
  3271. struct pmcraid_instance *pinstance = NULL;
  3272. struct pmcraid_ioctl_header *hdr = NULL;
  3273. int retval = -ENOTTY;
  3274. hdr = kmalloc(GFP_KERNEL, sizeof(struct pmcraid_ioctl_header));
  3275. if (!hdr) {
  3276. pmcraid_err("faile to allocate memory for ioctl header\n");
  3277. return -ENOMEM;
  3278. }
  3279. retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
  3280. if (retval) {
  3281. pmcraid_info("chr_ioctl: header check failed\n");
  3282. kfree(hdr);
  3283. return retval;
  3284. }
  3285. pinstance = (struct pmcraid_instance *)filep->private_data;
  3286. if (!pinstance) {
  3287. pmcraid_info("adapter instance is not found\n");
  3288. kfree(hdr);
  3289. return -ENOTTY;
  3290. }
  3291. switch (_IOC_TYPE(cmd)) {
  3292. case PMCRAID_PASSTHROUGH_IOCTL:
  3293. /* If ioctl code is to download microcode, we need to block
  3294. * mid-layer requests.
  3295. */
  3296. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3297. scsi_block_requests(pinstance->host);
  3298. retval = pmcraid_ioctl_passthrough(pinstance,
  3299. cmd,
  3300. hdr->buffer_length,
  3301. arg);
  3302. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3303. scsi_unblock_requests(pinstance->host);
  3304. break;
  3305. case PMCRAID_DRIVER_IOCTL:
  3306. arg += sizeof(struct pmcraid_ioctl_header);
  3307. retval = pmcraid_ioctl_driver(pinstance,
  3308. cmd,
  3309. hdr->buffer_length,
  3310. (void __user *)arg);
  3311. break;
  3312. default:
  3313. retval = -ENOTTY;
  3314. break;
  3315. }
  3316. kfree(hdr);
  3317. return retval;
  3318. }
  3319. /**
  3320. * File operations structure for management interface
  3321. */
  3322. static const struct file_operations pmcraid_fops = {
  3323. .owner = THIS_MODULE,
  3324. .open = pmcraid_chr_open,
  3325. .release = pmcraid_chr_release,
  3326. .fasync = pmcraid_chr_fasync,
  3327. .unlocked_ioctl = pmcraid_chr_ioctl,
  3328. #ifdef CONFIG_COMPAT
  3329. .compat_ioctl = pmcraid_chr_ioctl,
  3330. #endif
  3331. };
  3332. /**
  3333. * pmcraid_show_log_level - Display adapter's error logging level
  3334. * @dev: class device struct
  3335. * @buf: buffer
  3336. *
  3337. * Return value:
  3338. * number of bytes printed to buffer
  3339. */
  3340. static ssize_t pmcraid_show_log_level(
  3341. struct device *dev,
  3342. struct device_attribute *attr,
  3343. char *buf)
  3344. {
  3345. struct Scsi_Host *shost = class_to_shost(dev);
  3346. struct pmcraid_instance *pinstance =
  3347. (struct pmcraid_instance *)shost->hostdata;
  3348. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3349. }
  3350. /**
  3351. * pmcraid_store_log_level - Change the adapter's error logging level
  3352. * @dev: class device struct
  3353. * @buf: buffer
  3354. * @count: not used
  3355. *
  3356. * Return value:
  3357. * number of bytes printed to buffer
  3358. */
  3359. static ssize_t pmcraid_store_log_level(
  3360. struct device *dev,
  3361. struct device_attribute *attr,
  3362. const char *buf,
  3363. size_t count
  3364. )
  3365. {
  3366. struct Scsi_Host *shost;
  3367. struct pmcraid_instance *pinstance;
  3368. unsigned long val;
  3369. if (strict_strtoul(buf, 10, &val))
  3370. return -EINVAL;
  3371. /* log-level should be from 0 to 2 */
  3372. if (val > 2)
  3373. return -EINVAL;
  3374. shost = class_to_shost(dev);
  3375. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3376. pinstance->current_log_level = val;
  3377. return strlen(buf);
  3378. }
  3379. static struct device_attribute pmcraid_log_level_attr = {
  3380. .attr = {
  3381. .name = "log_level",
  3382. .mode = S_IRUGO | S_IWUSR,
  3383. },
  3384. .show = pmcraid_show_log_level,
  3385. .store = pmcraid_store_log_level,
  3386. };
  3387. /**
  3388. * pmcraid_show_drv_version - Display driver version
  3389. * @dev: class device struct
  3390. * @buf: buffer
  3391. *
  3392. * Return value:
  3393. * number of bytes printed to buffer
  3394. */
  3395. static ssize_t pmcraid_show_drv_version(
  3396. struct device *dev,
  3397. struct device_attribute *attr,
  3398. char *buf
  3399. )
  3400. {
  3401. return snprintf(buf, PAGE_SIZE, "version: %s, build date: %s\n",
  3402. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  3403. }
  3404. static struct device_attribute pmcraid_driver_version_attr = {
  3405. .attr = {
  3406. .name = "drv_version",
  3407. .mode = S_IRUGO,
  3408. },
  3409. .show = pmcraid_show_drv_version,
  3410. };
  3411. /**
  3412. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3413. * @dev: class device struct
  3414. * @buf: buffer
  3415. *
  3416. * Return value:
  3417. * number of bytes printed to buffer
  3418. */
  3419. static ssize_t pmcraid_show_adapter_id(
  3420. struct device *dev,
  3421. struct device_attribute *attr,
  3422. char *buf
  3423. )
  3424. {
  3425. struct Scsi_Host *shost = class_to_shost(dev);
  3426. struct pmcraid_instance *pinstance =
  3427. (struct pmcraid_instance *)shost->hostdata;
  3428. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3429. pinstance->pdev->devfn;
  3430. u32 aen_group = pmcraid_event_family.id;
  3431. return snprintf(buf, PAGE_SIZE,
  3432. "adapter id: %d\nminor: %d\naen group: %d\n",
  3433. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3434. }
  3435. static struct device_attribute pmcraid_adapter_id_attr = {
  3436. .attr = {
  3437. .name = "adapter_id",
  3438. .mode = S_IRUGO | S_IWUSR,
  3439. },
  3440. .show = pmcraid_show_adapter_id,
  3441. };
  3442. static struct device_attribute *pmcraid_host_attrs[] = {
  3443. &pmcraid_log_level_attr,
  3444. &pmcraid_driver_version_attr,
  3445. &pmcraid_adapter_id_attr,
  3446. NULL,
  3447. };
  3448. /* host template structure for pmcraid driver */
  3449. static struct scsi_host_template pmcraid_host_template = {
  3450. .module = THIS_MODULE,
  3451. .name = PMCRAID_DRIVER_NAME,
  3452. .queuecommand = pmcraid_queuecommand,
  3453. .eh_abort_handler = pmcraid_eh_abort_handler,
  3454. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3455. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3456. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3457. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3458. .slave_alloc = pmcraid_slave_alloc,
  3459. .slave_configure = pmcraid_slave_configure,
  3460. .slave_destroy = pmcraid_slave_destroy,
  3461. .change_queue_depth = pmcraid_change_queue_depth,
  3462. .change_queue_type = pmcraid_change_queue_type,
  3463. .can_queue = PMCRAID_MAX_IO_CMD,
  3464. .this_id = -1,
  3465. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3466. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3467. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3468. .use_clustering = ENABLE_CLUSTERING,
  3469. .shost_attrs = pmcraid_host_attrs,
  3470. .proc_name = PMCRAID_DRIVER_NAME
  3471. };
  3472. /**
  3473. * pmcraid_isr_common - Common interrupt handler routine
  3474. *
  3475. * @pinstance: pointer to adapter instance
  3476. * @intrs: active interrupts (contents of ioa_host_interrupt register)
  3477. * @hrrq_id: Host RRQ index
  3478. *
  3479. * Return Value
  3480. * none
  3481. */
  3482. static void pmcraid_isr_common(
  3483. struct pmcraid_instance *pinstance,
  3484. u32 intrs,
  3485. int hrrq_id
  3486. )
  3487. {
  3488. u32 intrs_clear =
  3489. (intrs & INTRS_CRITICAL_OP_IN_PROGRESS) ? intrs
  3490. : INTRS_HRRQ_VALID;
  3491. iowrite32(intrs_clear,
  3492. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3493. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  3494. /* hrrq valid bit was set, schedule tasklet to handle the response */
  3495. if (intrs_clear == INTRS_HRRQ_VALID)
  3496. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3497. }
  3498. /**
  3499. * pmcraid_isr - implements interrupt handling routine
  3500. *
  3501. * @irq: interrupt vector number
  3502. * @dev_id: pointer hrrq_vector
  3503. *
  3504. * Return Value
  3505. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3506. */
  3507. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3508. {
  3509. struct pmcraid_isr_param *hrrq_vector;
  3510. struct pmcraid_instance *pinstance;
  3511. unsigned long lock_flags;
  3512. u32 intrs;
  3513. /* In case of legacy interrupt mode where interrupts are shared across
  3514. * isrs, it may be possible that the current interrupt is not from IOA
  3515. */
  3516. if (!dev_id) {
  3517. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3518. return IRQ_NONE;
  3519. }
  3520. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3521. pinstance = hrrq_vector->drv_inst;
  3522. /* Acquire the lock (currently host_lock) while processing interrupts.
  3523. * This interval is small as most of the response processing is done by
  3524. * tasklet without the lock.
  3525. */
  3526. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3527. intrs = pmcraid_read_interrupts(pinstance);
  3528. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) {
  3529. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3530. return IRQ_NONE;
  3531. }
  3532. /* Any error interrupts including unit_check, initiate IOA reset.
  3533. * In case of unit check indicate to reset_sequence that IOA unit
  3534. * checked and prepare for a dump during reset sequence
  3535. */
  3536. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3537. if (intrs & INTRS_IOA_UNIT_CHECK)
  3538. pinstance->ioa_unit_check = 1;
  3539. iowrite32(intrs,
  3540. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3541. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3542. intrs);
  3543. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  3544. pmcraid_initiate_reset(pinstance);
  3545. } else {
  3546. pmcraid_isr_common(pinstance, intrs, hrrq_vector->hrrq_id);
  3547. }
  3548. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3549. return IRQ_HANDLED;
  3550. }
  3551. /**
  3552. * pmcraid_worker_function - worker thread function
  3553. *
  3554. * @workp: pointer to struct work queue
  3555. *
  3556. * Return Value
  3557. * None
  3558. */
  3559. static void pmcraid_worker_function(struct work_struct *workp)
  3560. {
  3561. struct pmcraid_instance *pinstance;
  3562. struct pmcraid_resource_entry *res;
  3563. struct pmcraid_resource_entry *temp;
  3564. struct scsi_device *sdev;
  3565. unsigned long lock_flags;
  3566. unsigned long host_lock_flags;
  3567. u8 bus, target, lun;
  3568. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3569. /* add resources only after host is added into system */
  3570. if (!atomic_read(&pinstance->expose_resources))
  3571. return;
  3572. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3573. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3574. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3575. sdev = res->scsi_dev;
  3576. /* host_lock must be held before calling
  3577. * scsi_device_get
  3578. */
  3579. spin_lock_irqsave(pinstance->host->host_lock,
  3580. host_lock_flags);
  3581. if (!scsi_device_get(sdev)) {
  3582. spin_unlock_irqrestore(
  3583. pinstance->host->host_lock,
  3584. host_lock_flags);
  3585. pmcraid_info("deleting %x from midlayer\n",
  3586. res->cfg_entry.resource_address);
  3587. list_move_tail(&res->queue,
  3588. &pinstance->free_res_q);
  3589. spin_unlock_irqrestore(
  3590. &pinstance->resource_lock,
  3591. lock_flags);
  3592. scsi_remove_device(sdev);
  3593. scsi_device_put(sdev);
  3594. spin_lock_irqsave(&pinstance->resource_lock,
  3595. lock_flags);
  3596. res->change_detected = 0;
  3597. } else {
  3598. spin_unlock_irqrestore(
  3599. pinstance->host->host_lock,
  3600. host_lock_flags);
  3601. }
  3602. }
  3603. }
  3604. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3605. if (res->change_detected == RES_CHANGE_ADD) {
  3606. if (!pmcraid_expose_resource(&res->cfg_entry))
  3607. continue;
  3608. if (RES_IS_VSET(res->cfg_entry)) {
  3609. bus = PMCRAID_VSET_BUS_ID;
  3610. target = res->cfg_entry.unique_flags1;
  3611. lun = PMCRAID_VSET_LUN_ID;
  3612. } else {
  3613. bus = PMCRAID_PHYS_BUS_ID;
  3614. target =
  3615. RES_TARGET(
  3616. res->cfg_entry.resource_address);
  3617. lun = RES_LUN(res->cfg_entry.resource_address);
  3618. }
  3619. res->change_detected = 0;
  3620. spin_unlock_irqrestore(&pinstance->resource_lock,
  3621. lock_flags);
  3622. scsi_add_device(pinstance->host, bus, target, lun);
  3623. spin_lock_irqsave(&pinstance->resource_lock,
  3624. lock_flags);
  3625. }
  3626. }
  3627. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3628. }
  3629. /**
  3630. * pmcraid_tasklet_function - Tasklet function
  3631. *
  3632. * @instance: pointer to msix param structure
  3633. *
  3634. * Return Value
  3635. * None
  3636. */
  3637. void pmcraid_tasklet_function(unsigned long instance)
  3638. {
  3639. struct pmcraid_isr_param *hrrq_vector;
  3640. struct pmcraid_instance *pinstance;
  3641. unsigned long hrrq_lock_flags;
  3642. unsigned long pending_lock_flags;
  3643. unsigned long host_lock_flags;
  3644. spinlock_t *lockp; /* hrrq buffer lock */
  3645. int id;
  3646. u32 intrs;
  3647. __le32 resp;
  3648. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3649. pinstance = hrrq_vector->drv_inst;
  3650. id = hrrq_vector->hrrq_id;
  3651. lockp = &(pinstance->hrrq_lock[id]);
  3652. intrs = pmcraid_read_interrupts(pinstance);
  3653. /* If interrupts was as part of the ioa initialization, clear and mask
  3654. * it. Delete the timer and wakeup the reset engine to proceed with
  3655. * reset sequence
  3656. */
  3657. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3658. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  3659. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  3660. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  3661. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3662. if (pinstance->reset_cmd != NULL) {
  3663. del_timer(&pinstance->reset_cmd->timer);
  3664. spin_lock_irqsave(pinstance->host->host_lock,
  3665. host_lock_flags);
  3666. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  3667. spin_unlock_irqrestore(pinstance->host->host_lock,
  3668. host_lock_flags);
  3669. }
  3670. return;
  3671. }
  3672. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3673. * protected by its own lock. Traversals must be done within this lock
  3674. * as there may be multiple tasklets running on multiple CPUs. Note
  3675. * that the lock is held just for picking up the response handle and
  3676. * manipulating hrrq_curr/toggle_bit values.
  3677. */
  3678. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3679. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3680. while ((resp & HRRQ_TOGGLE_BIT) ==
  3681. pinstance->host_toggle_bit[id]) {
  3682. int cmd_index = resp >> 2;
  3683. struct pmcraid_cmd *cmd = NULL;
  3684. if (cmd_index < PMCRAID_MAX_CMD) {
  3685. cmd = pinstance->cmd_list[cmd_index];
  3686. } else {
  3687. /* In case of invalid response handle, initiate IOA
  3688. * reset sequence.
  3689. */
  3690. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3691. pmcraid_err("Invalid response %d initiating reset\n",
  3692. cmd_index);
  3693. spin_lock_irqsave(pinstance->host->host_lock,
  3694. host_lock_flags);
  3695. pmcraid_initiate_reset(pinstance);
  3696. spin_unlock_irqrestore(pinstance->host->host_lock,
  3697. host_lock_flags);
  3698. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3699. break;
  3700. }
  3701. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3702. pinstance->hrrq_curr[id]++;
  3703. } else {
  3704. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3705. pinstance->host_toggle_bit[id] ^= 1u;
  3706. }
  3707. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3708. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3709. pending_lock_flags);
  3710. list_del(&cmd->free_list);
  3711. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3712. pending_lock_flags);
  3713. del_timer(&cmd->timer);
  3714. atomic_dec(&pinstance->outstanding_cmds);
  3715. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3716. spin_lock_irqsave(pinstance->host->host_lock,
  3717. host_lock_flags);
  3718. cmd->cmd_done(cmd);
  3719. spin_unlock_irqrestore(pinstance->host->host_lock,
  3720. host_lock_flags);
  3721. } else if (cmd->cmd_done != NULL) {
  3722. cmd->cmd_done(cmd);
  3723. }
  3724. /* loop over until we are done with all responses */
  3725. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3726. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3727. }
  3728. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3729. }
  3730. /**
  3731. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3732. * @pinstance: pointer to adapter instance structure
  3733. *
  3734. * This routine un-registers registered interrupt handler and
  3735. * also frees irqs/vectors.
  3736. *
  3737. * Retun Value
  3738. * None
  3739. */
  3740. static
  3741. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3742. {
  3743. free_irq(pinstance->pdev->irq, &(pinstance->hrrq_vector[0]));
  3744. }
  3745. /**
  3746. * pmcraid_register_interrupt_handler - registers interrupt handler
  3747. * @pinstance: pointer to per-adapter instance structure
  3748. *
  3749. * Return Value
  3750. * 0 on success, non-zero error code otherwise.
  3751. */
  3752. static int
  3753. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3754. {
  3755. struct pci_dev *pdev = pinstance->pdev;
  3756. pinstance->hrrq_vector[0].hrrq_id = 0;
  3757. pinstance->hrrq_vector[0].drv_inst = pinstance;
  3758. pinstance->hrrq_vector[0].vector = 0;
  3759. pinstance->num_hrrq = 1;
  3760. return request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
  3761. PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
  3762. }
  3763. /**
  3764. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  3765. * @pinstance: per adapter instance structure pointer
  3766. * @max_index: number of buffer blocks to release
  3767. *
  3768. * Return Value
  3769. * None
  3770. */
  3771. static void
  3772. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  3773. {
  3774. int i;
  3775. for (i = 0; i < max_index; i++) {
  3776. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  3777. pinstance->cmd_list[i] = NULL;
  3778. }
  3779. kmem_cache_destroy(pinstance->cmd_cachep);
  3780. pinstance->cmd_cachep = NULL;
  3781. }
  3782. /**
  3783. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  3784. * @pinstance: pointer to per adapter instance structure
  3785. * @max_index: number of buffers (from 0 onwards) to release
  3786. *
  3787. * This function assumes that the command blocks for which control blocks are
  3788. * linked are not released.
  3789. *
  3790. * Return Value
  3791. * None
  3792. */
  3793. static void
  3794. pmcraid_release_control_blocks(
  3795. struct pmcraid_instance *pinstance,
  3796. int max_index
  3797. )
  3798. {
  3799. int i;
  3800. if (pinstance->control_pool == NULL)
  3801. return;
  3802. for (i = 0; i < max_index; i++) {
  3803. pci_pool_free(pinstance->control_pool,
  3804. pinstance->cmd_list[i]->ioa_cb,
  3805. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  3806. pinstance->cmd_list[i]->ioa_cb = NULL;
  3807. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  3808. }
  3809. pci_pool_destroy(pinstance->control_pool);
  3810. pinstance->control_pool = NULL;
  3811. }
  3812. /**
  3813. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  3814. * @pinstance - pointer to per adapter instance structure
  3815. *
  3816. * Allocates memory for command blocks using kernel slab allocator.
  3817. *
  3818. * Return Value
  3819. * 0 in case of success; -ENOMEM in case of failure
  3820. */
  3821. static int __devinit
  3822. pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  3823. {
  3824. int i;
  3825. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  3826. pinstance->host->unique_id);
  3827. pinstance->cmd_cachep = kmem_cache_create(
  3828. pinstance->cmd_pool_name,
  3829. sizeof(struct pmcraid_cmd), 0,
  3830. SLAB_HWCACHE_ALIGN, NULL);
  3831. if (!pinstance->cmd_cachep)
  3832. return -ENOMEM;
  3833. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3834. pinstance->cmd_list[i] =
  3835. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  3836. if (!pinstance->cmd_list[i]) {
  3837. pmcraid_release_cmd_blocks(pinstance, i);
  3838. return -ENOMEM;
  3839. }
  3840. }
  3841. return 0;
  3842. }
  3843. /**
  3844. * pmcraid_allocate_control_blocks - allocates memory control blocks
  3845. * @pinstance : pointer to per adapter instance structure
  3846. *
  3847. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  3848. * and IOASAs. This is called after command blocks are already allocated.
  3849. *
  3850. * Return Value
  3851. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  3852. */
  3853. static int __devinit
  3854. pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  3855. {
  3856. int i;
  3857. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  3858. pinstance->host->unique_id);
  3859. pinstance->control_pool =
  3860. pci_pool_create(pinstance->ctl_pool_name,
  3861. pinstance->pdev,
  3862. sizeof(struct pmcraid_control_block),
  3863. PMCRAID_IOARCB_ALIGNMENT, 0);
  3864. if (!pinstance->control_pool)
  3865. return -ENOMEM;
  3866. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3867. pinstance->cmd_list[i]->ioa_cb =
  3868. pci_pool_alloc(
  3869. pinstance->control_pool,
  3870. GFP_KERNEL,
  3871. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  3872. if (!pinstance->cmd_list[i]->ioa_cb) {
  3873. pmcraid_release_control_blocks(pinstance, i);
  3874. return -ENOMEM;
  3875. }
  3876. memset(pinstance->cmd_list[i]->ioa_cb, 0,
  3877. sizeof(struct pmcraid_control_block));
  3878. }
  3879. return 0;
  3880. }
  3881. /**
  3882. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  3883. * @pinstance: pointer to per adapter instance structure
  3884. * @maxindex: size of hrrq buffer pointer array
  3885. *
  3886. * Return Value
  3887. * None
  3888. */
  3889. static void
  3890. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  3891. {
  3892. int i;
  3893. for (i = 0; i < maxindex; i++) {
  3894. pci_free_consistent(pinstance->pdev,
  3895. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  3896. pinstance->hrrq_start[i],
  3897. pinstance->hrrq_start_bus_addr[i]);
  3898. /* reset pointers and toggle bit to zeros */
  3899. pinstance->hrrq_start[i] = NULL;
  3900. pinstance->hrrq_start_bus_addr[i] = 0;
  3901. pinstance->host_toggle_bit[i] = 0;
  3902. }
  3903. }
  3904. /**
  3905. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  3906. * @pinstance: pointer to per adapter instance structure
  3907. *
  3908. * Return value
  3909. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  3910. */
  3911. static int __devinit
  3912. pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  3913. {
  3914. int i;
  3915. int buf_count = PMCRAID_MAX_CMD / pinstance->num_hrrq;
  3916. for (i = 0; i < pinstance->num_hrrq; i++) {
  3917. int buffer_size = HRRQ_ENTRY_SIZE * buf_count;
  3918. pinstance->hrrq_start[i] =
  3919. pci_alloc_consistent(
  3920. pinstance->pdev,
  3921. buffer_size,
  3922. &(pinstance->hrrq_start_bus_addr[i]));
  3923. if (pinstance->hrrq_start[i] == 0) {
  3924. pmcraid_err("could not allocate host rrq: %d\n", i);
  3925. pmcraid_release_host_rrqs(pinstance, i);
  3926. return -ENOMEM;
  3927. }
  3928. memset(pinstance->hrrq_start[i], 0, buffer_size);
  3929. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  3930. pinstance->hrrq_end[i] =
  3931. pinstance->hrrq_start[i] + buf_count - 1;
  3932. pinstance->host_toggle_bit[i] = 1;
  3933. spin_lock_init(&pinstance->hrrq_lock[i]);
  3934. }
  3935. return 0;
  3936. }
  3937. /**
  3938. * pmcraid_release_hcams - release HCAM buffers
  3939. *
  3940. * @pinstance: pointer to per adapter instance structure
  3941. *
  3942. * Return value
  3943. * none
  3944. */
  3945. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  3946. {
  3947. if (pinstance->ccn.msg != NULL) {
  3948. pci_free_consistent(pinstance->pdev,
  3949. PMCRAID_AEN_HDR_SIZE +
  3950. sizeof(struct pmcraid_hcam_ccn),
  3951. pinstance->ccn.msg,
  3952. pinstance->ccn.baddr);
  3953. pinstance->ccn.msg = NULL;
  3954. pinstance->ccn.hcam = NULL;
  3955. pinstance->ccn.baddr = 0;
  3956. }
  3957. if (pinstance->ldn.msg != NULL) {
  3958. pci_free_consistent(pinstance->pdev,
  3959. PMCRAID_AEN_HDR_SIZE +
  3960. sizeof(struct pmcraid_hcam_ldn),
  3961. pinstance->ldn.msg,
  3962. pinstance->ldn.baddr);
  3963. pinstance->ldn.msg = NULL;
  3964. pinstance->ldn.hcam = NULL;
  3965. pinstance->ldn.baddr = 0;
  3966. }
  3967. }
  3968. /**
  3969. * pmcraid_allocate_hcams - allocates HCAM buffers
  3970. * @pinstance : pointer to per adapter instance structure
  3971. *
  3972. * Return Value:
  3973. * 0 in case of successful allocation, non-zero otherwise
  3974. */
  3975. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  3976. {
  3977. pinstance->ccn.msg = pci_alloc_consistent(
  3978. pinstance->pdev,
  3979. PMCRAID_AEN_HDR_SIZE +
  3980. sizeof(struct pmcraid_hcam_ccn),
  3981. &(pinstance->ccn.baddr));
  3982. pinstance->ldn.msg = pci_alloc_consistent(
  3983. pinstance->pdev,
  3984. PMCRAID_AEN_HDR_SIZE +
  3985. sizeof(struct pmcraid_hcam_ldn),
  3986. &(pinstance->ldn.baddr));
  3987. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  3988. pmcraid_release_hcams(pinstance);
  3989. } else {
  3990. pinstance->ccn.hcam =
  3991. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  3992. pinstance->ldn.hcam =
  3993. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  3994. atomic_set(&pinstance->ccn.ignore, 0);
  3995. atomic_set(&pinstance->ldn.ignore, 0);
  3996. }
  3997. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  3998. }
  3999. /**
  4000. * pmcraid_release_config_buffers - release config.table buffers
  4001. * @pinstance: pointer to per adapter instance structure
  4002. *
  4003. * Return Value
  4004. * none
  4005. */
  4006. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4007. {
  4008. if (pinstance->cfg_table != NULL &&
  4009. pinstance->cfg_table_bus_addr != 0) {
  4010. pci_free_consistent(pinstance->pdev,
  4011. sizeof(struct pmcraid_config_table),
  4012. pinstance->cfg_table,
  4013. pinstance->cfg_table_bus_addr);
  4014. pinstance->cfg_table = NULL;
  4015. pinstance->cfg_table_bus_addr = 0;
  4016. }
  4017. if (pinstance->res_entries != NULL) {
  4018. int i;
  4019. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4020. list_del(&pinstance->res_entries[i].queue);
  4021. kfree(pinstance->res_entries);
  4022. pinstance->res_entries = NULL;
  4023. }
  4024. pmcraid_release_hcams(pinstance);
  4025. }
  4026. /**
  4027. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4028. * @pinstance : pointer to per adapter instance structure
  4029. *
  4030. * Return Value
  4031. * 0 for successful allocation, -ENOMEM for any failure
  4032. */
  4033. static int __devinit
  4034. pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4035. {
  4036. int i;
  4037. pinstance->res_entries =
  4038. kzalloc(sizeof(struct pmcraid_resource_entry) *
  4039. PMCRAID_MAX_RESOURCES, GFP_KERNEL);
  4040. if (NULL == pinstance->res_entries) {
  4041. pmcraid_err("failed to allocate memory for resource table\n");
  4042. return -ENOMEM;
  4043. }
  4044. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4045. list_add_tail(&pinstance->res_entries[i].queue,
  4046. &pinstance->free_res_q);
  4047. pinstance->cfg_table =
  4048. pci_alloc_consistent(pinstance->pdev,
  4049. sizeof(struct pmcraid_config_table),
  4050. &pinstance->cfg_table_bus_addr);
  4051. if (NULL == pinstance->cfg_table) {
  4052. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4053. pmcraid_release_config_buffers(pinstance);
  4054. return -ENOMEM;
  4055. }
  4056. if (pmcraid_allocate_hcams(pinstance)) {
  4057. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4058. pmcraid_release_config_buffers(pinstance);
  4059. return -ENOMEM;
  4060. }
  4061. return 0;
  4062. }
  4063. /**
  4064. * pmcraid_init_tasklets - registers tasklets for response handling
  4065. *
  4066. * @pinstance: pointer adapter instance structure
  4067. *
  4068. * Return value
  4069. * none
  4070. */
  4071. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4072. {
  4073. int i;
  4074. for (i = 0; i < pinstance->num_hrrq; i++)
  4075. tasklet_init(&pinstance->isr_tasklet[i],
  4076. pmcraid_tasklet_function,
  4077. (unsigned long)&pinstance->hrrq_vector[i]);
  4078. }
  4079. /**
  4080. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4081. *
  4082. * @pinstance: pointer to adapter instance structure
  4083. *
  4084. * Return value
  4085. * none
  4086. */
  4087. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4088. {
  4089. int i;
  4090. for (i = 0; i < pinstance->num_hrrq; i++)
  4091. tasklet_kill(&pinstance->isr_tasklet[i]);
  4092. }
  4093. /**
  4094. * pmcraid_init_buffers - allocates memory and initializes various structures
  4095. * @pinstance: pointer to per adapter instance structure
  4096. *
  4097. * This routine pre-allocates memory based on the type of block as below:
  4098. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4099. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4100. * config-table entries : DMAable memory using pci_alloc_consistent
  4101. * HostRRQs : DMAable memory, using pci_alloc_consistent
  4102. *
  4103. * Return Value
  4104. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4105. */
  4106. static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4107. {
  4108. int i;
  4109. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4110. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4111. pinstance->num_hrrq);
  4112. return -ENOMEM;
  4113. }
  4114. if (pmcraid_allocate_config_buffers(pinstance)) {
  4115. pmcraid_err("couldn't allocate memory for config buffers\n");
  4116. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4117. return -ENOMEM;
  4118. }
  4119. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4120. pmcraid_err("couldn't allocate memory for cmd blocks \n");
  4121. pmcraid_release_config_buffers(pinstance);
  4122. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4123. return -ENOMEM;
  4124. }
  4125. if (pmcraid_allocate_control_blocks(pinstance)) {
  4126. pmcraid_err("couldn't allocate memory control blocks \n");
  4127. pmcraid_release_config_buffers(pinstance);
  4128. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4129. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4130. return -ENOMEM;
  4131. }
  4132. /* Initialize all the command blocks and add them to free pool. No
  4133. * need to lock (free_pool_lock) as this is done in initialization
  4134. * itself
  4135. */
  4136. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4137. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4138. pmcraid_init_cmdblk(cmdp, i);
  4139. cmdp->drv_inst = pinstance;
  4140. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4141. }
  4142. return 0;
  4143. }
  4144. /**
  4145. * pmcraid_reinit_buffers - resets various buffer pointers
  4146. * @pinstance: pointer to adapter instance
  4147. * Return value
  4148. * none
  4149. */
  4150. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4151. {
  4152. int i;
  4153. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4154. for (i = 0; i < pinstance->num_hrrq; i++) {
  4155. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4156. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4157. pinstance->hrrq_end[i] =
  4158. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4159. pinstance->host_toggle_bit[i] = 1;
  4160. }
  4161. }
  4162. /**
  4163. * pmcraid_init_instance - initialize per instance data structure
  4164. * @pdev: pointer to pci device structure
  4165. * @host: pointer to Scsi_Host structure
  4166. * @mapped_pci_addr: memory mapped IOA configuration registers
  4167. *
  4168. * Return Value
  4169. * 0 on success, non-zero in case of any failure
  4170. */
  4171. static int __devinit pmcraid_init_instance(
  4172. struct pci_dev *pdev,
  4173. struct Scsi_Host *host,
  4174. void __iomem *mapped_pci_addr
  4175. )
  4176. {
  4177. struct pmcraid_instance *pinstance =
  4178. (struct pmcraid_instance *)host->hostdata;
  4179. pinstance->host = host;
  4180. pinstance->pdev = pdev;
  4181. /* Initialize register addresses */
  4182. pinstance->mapped_dma_addr = mapped_pci_addr;
  4183. /* Initialize chip-specific details */
  4184. {
  4185. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4186. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4187. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4188. pint_regs->ioa_host_interrupt_reg =
  4189. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4190. pint_regs->ioa_host_interrupt_clr_reg =
  4191. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4192. pint_regs->host_ioa_interrupt_reg =
  4193. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4194. pint_regs->host_ioa_interrupt_clr_reg =
  4195. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4196. /* Current version of firmware exposes interrupt mask set
  4197. * and mask clr registers through memory mapped bar0.
  4198. */
  4199. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4200. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4201. pint_regs->ioa_host_interrupt_mask_reg =
  4202. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4203. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4204. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4205. pint_regs->global_interrupt_mask_reg =
  4206. mapped_pci_addr + chip_cfg->global_intr_mask;
  4207. };
  4208. pinstance->ioa_reset_attempts = 0;
  4209. init_waitqueue_head(&pinstance->reset_wait_q);
  4210. atomic_set(&pinstance->outstanding_cmds, 0);
  4211. atomic_set(&pinstance->expose_resources, 0);
  4212. INIT_LIST_HEAD(&pinstance->free_res_q);
  4213. INIT_LIST_HEAD(&pinstance->used_res_q);
  4214. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4215. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4216. spin_lock_init(&pinstance->free_pool_lock);
  4217. spin_lock_init(&pinstance->pending_pool_lock);
  4218. spin_lock_init(&pinstance->resource_lock);
  4219. mutex_init(&pinstance->aen_queue_lock);
  4220. /* Work-queue (Shared) for deferred processing error handling */
  4221. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4222. /* Initialize the default log_level */
  4223. pinstance->current_log_level = pmcraid_log_level;
  4224. /* Setup variables required for reset engine */
  4225. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4226. pinstance->reset_cmd = NULL;
  4227. return 0;
  4228. }
  4229. /**
  4230. * pmcraid_release_buffers - release per-adapter buffers allocated
  4231. *
  4232. * @pinstance: pointer to adapter soft state
  4233. *
  4234. * Return Value
  4235. * none
  4236. */
  4237. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4238. {
  4239. pmcraid_release_config_buffers(pinstance);
  4240. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4241. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4242. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4243. }
  4244. /**
  4245. * pmcraid_shutdown - shutdown adapter controller.
  4246. * @pdev: pci device struct
  4247. *
  4248. * Issues an adapter shutdown to the card waits for its completion
  4249. *
  4250. * Return value
  4251. * none
  4252. */
  4253. static void pmcraid_shutdown(struct pci_dev *pdev)
  4254. {
  4255. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4256. pmcraid_reset_bringdown(pinstance);
  4257. }
  4258. /**
  4259. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4260. */
  4261. static unsigned short pmcraid_get_minor(void)
  4262. {
  4263. int minor;
  4264. minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
  4265. __set_bit(minor, pmcraid_minor);
  4266. return minor;
  4267. }
  4268. /**
  4269. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4270. */
  4271. static void pmcraid_release_minor(unsigned short minor)
  4272. {
  4273. __clear_bit(minor, pmcraid_minor);
  4274. }
  4275. /**
  4276. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4277. *
  4278. * @pinstance: pointer to adapter instance for which to register device
  4279. *
  4280. * Return value
  4281. * 0 in case of success, otherwise non-zero
  4282. */
  4283. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4284. {
  4285. int minor;
  4286. int error;
  4287. minor = pmcraid_get_minor();
  4288. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4289. pinstance->cdev.owner = THIS_MODULE;
  4290. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4291. if (error)
  4292. pmcraid_release_minor(minor);
  4293. else
  4294. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4295. NULL, "pmcsas%u", minor);
  4296. return error;
  4297. }
  4298. /**
  4299. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4300. *
  4301. * @pinstance: pointer to adapter instance structure
  4302. *
  4303. * Return value
  4304. * none
  4305. */
  4306. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4307. {
  4308. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4309. device_destroy(pmcraid_class,
  4310. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4311. cdev_del(&pinstance->cdev);
  4312. }
  4313. /**
  4314. * pmcraid_remove - IOA hot plug remove entry point
  4315. * @pdev: pci device struct
  4316. *
  4317. * Return value
  4318. * none
  4319. */
  4320. static void __devexit pmcraid_remove(struct pci_dev *pdev)
  4321. {
  4322. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4323. /* remove the management interface (/dev file) for this device */
  4324. pmcraid_release_chrdev(pinstance);
  4325. /* remove host template from scsi midlayer */
  4326. scsi_remove_host(pinstance->host);
  4327. /* block requests from mid-layer */
  4328. scsi_block_requests(pinstance->host);
  4329. /* initiate shutdown adapter */
  4330. pmcraid_shutdown(pdev);
  4331. pmcraid_disable_interrupts(pinstance, ~0);
  4332. flush_scheduled_work();
  4333. pmcraid_kill_tasklets(pinstance);
  4334. pmcraid_unregister_interrupt_handler(pinstance);
  4335. pmcraid_release_buffers(pinstance);
  4336. iounmap(pinstance->mapped_dma_addr);
  4337. pci_release_regions(pdev);
  4338. scsi_host_put(pinstance->host);
  4339. pci_disable_device(pdev);
  4340. return;
  4341. }
  4342. #ifdef CONFIG_PM
  4343. /**
  4344. * pmcraid_suspend - driver suspend entry point for power management
  4345. * @pdev: PCI device structure
  4346. * @state: PCI power state to suspend routine
  4347. *
  4348. * Return Value - 0 always
  4349. */
  4350. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4351. {
  4352. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4353. pmcraid_shutdown(pdev);
  4354. pmcraid_disable_interrupts(pinstance, ~0);
  4355. pmcraid_kill_tasklets(pinstance);
  4356. pci_set_drvdata(pinstance->pdev, pinstance);
  4357. pmcraid_unregister_interrupt_handler(pinstance);
  4358. pci_save_state(pdev);
  4359. pci_disable_device(pdev);
  4360. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4361. return 0;
  4362. }
  4363. /**
  4364. * pmcraid_resume - driver resume entry point PCI power management
  4365. * @pdev: PCI device structure
  4366. *
  4367. * Return Value - 0 in case of success. Error code in case of any failure
  4368. */
  4369. static int pmcraid_resume(struct pci_dev *pdev)
  4370. {
  4371. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4372. struct Scsi_Host *host = pinstance->host;
  4373. int rc;
  4374. int hrrqs;
  4375. pci_set_power_state(pdev, PCI_D0);
  4376. pci_enable_wake(pdev, PCI_D0, 0);
  4377. pci_restore_state(pdev);
  4378. rc = pci_enable_device(pdev);
  4379. if (rc) {
  4380. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4381. return rc;
  4382. }
  4383. pci_set_master(pdev);
  4384. if ((sizeof(dma_addr_t) == 4) ||
  4385. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4386. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4387. if (rc == 0)
  4388. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4389. if (rc != 0) {
  4390. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4391. goto disable_device;
  4392. }
  4393. atomic_set(&pinstance->outstanding_cmds, 0);
  4394. hrrqs = pinstance->num_hrrq;
  4395. rc = pmcraid_register_interrupt_handler(pinstance);
  4396. if (rc) {
  4397. dev_err(&pdev->dev,
  4398. "resume: couldn't register interrupt handlers\n");
  4399. rc = -ENODEV;
  4400. goto release_host;
  4401. }
  4402. pmcraid_init_tasklets(pinstance);
  4403. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4404. /* Start with hard reset sequence which brings up IOA to operational
  4405. * state as well as completes the reset sequence.
  4406. */
  4407. pinstance->ioa_hard_reset = 1;
  4408. /* Start IOA firmware initialization and bring card to Operational
  4409. * state.
  4410. */
  4411. if (pmcraid_reset_bringup(pinstance)) {
  4412. dev_err(&pdev->dev, "couldn't initialize IOA \n");
  4413. rc = -ENODEV;
  4414. goto release_tasklets;
  4415. }
  4416. return 0;
  4417. release_tasklets:
  4418. pmcraid_kill_tasklets(pinstance);
  4419. pmcraid_unregister_interrupt_handler(pinstance);
  4420. release_host:
  4421. scsi_host_put(host);
  4422. disable_device:
  4423. pci_disable_device(pdev);
  4424. return rc;
  4425. }
  4426. #else
  4427. #define pmcraid_suspend NULL
  4428. #define pmcraid_resume NULL
  4429. #endif /* CONFIG_PM */
  4430. /**
  4431. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4432. * completion of the ioa reset
  4433. * @cmd: pointer to reset command block
  4434. */
  4435. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4436. {
  4437. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4438. unsigned long flags;
  4439. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4440. pmcraid_ioa_reset(cmd);
  4441. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4442. scsi_unblock_requests(pinstance->host);
  4443. schedule_work(&pinstance->worker_q);
  4444. }
  4445. /**
  4446. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4447. *
  4448. * @cmd: pointer to pmcraid_cmd structure
  4449. *
  4450. * Return Value
  4451. * 0 for success or non-zero for failure cases
  4452. */
  4453. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4454. {
  4455. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4456. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4457. pmcraid_reinit_cmdblk(cmd);
  4458. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4459. ioarcb->request_type = REQ_TYPE_IOACMD;
  4460. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4461. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4462. /* If this was called as part of resource table reinitialization due to
  4463. * lost CCN, it is enough to return the command block back to free pool
  4464. * as part of set_supported_devs completion function.
  4465. */
  4466. if (cmd->drv_inst->reinit_cfg_table) {
  4467. cmd->drv_inst->reinit_cfg_table = 0;
  4468. cmd->release = 1;
  4469. cmd_done = pmcraid_reinit_cfgtable_done;
  4470. }
  4471. /* we will be done with the reset sequence after set supported devices,
  4472. * setup the done function to return the command block back to free
  4473. * pool
  4474. */
  4475. pmcraid_send_cmd(cmd,
  4476. cmd_done,
  4477. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4478. pmcraid_timeout_handler);
  4479. return;
  4480. }
  4481. /**
  4482. * pmcraid_init_res_table - Initialize the resource table
  4483. * @cmd: pointer to pmcraid command struct
  4484. *
  4485. * This function looks through the existing resource table, comparing
  4486. * it with the config table. This function will take care of old/new
  4487. * devices and schedule adding/removing them from the mid-layer
  4488. * as appropriate.
  4489. *
  4490. * Return value
  4491. * None
  4492. */
  4493. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4494. {
  4495. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4496. struct pmcraid_resource_entry *res, *temp;
  4497. struct pmcraid_config_table_entry *cfgte;
  4498. unsigned long lock_flags;
  4499. int found, rc, i;
  4500. LIST_HEAD(old_res);
  4501. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4502. pmcraid_err("IOA requires microcode download\n");
  4503. /* resource list is protected by pinstance->resource_lock.
  4504. * init_res_table can be called from probe (user-thread) or runtime
  4505. * reset (timer/tasklet)
  4506. */
  4507. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4508. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4509. list_move_tail(&res->queue, &old_res);
  4510. for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
  4511. cfgte = &pinstance->cfg_table->entries[i];
  4512. if (!pmcraid_expose_resource(cfgte))
  4513. continue;
  4514. found = 0;
  4515. /* If this entry was already detected and initialized */
  4516. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4517. rc = memcmp(&res->cfg_entry.resource_address,
  4518. &cfgte->resource_address,
  4519. sizeof(cfgte->resource_address));
  4520. if (!rc) {
  4521. list_move_tail(&res->queue,
  4522. &pinstance->used_res_q);
  4523. found = 1;
  4524. break;
  4525. }
  4526. }
  4527. /* If this is new entry, initialize it and add it the queue */
  4528. if (!found) {
  4529. if (list_empty(&pinstance->free_res_q)) {
  4530. pmcraid_err("Too many devices attached\n");
  4531. break;
  4532. }
  4533. found = 1;
  4534. res = list_entry(pinstance->free_res_q.next,
  4535. struct pmcraid_resource_entry, queue);
  4536. res->scsi_dev = NULL;
  4537. res->change_detected = RES_CHANGE_ADD;
  4538. res->reset_progress = 0;
  4539. list_move_tail(&res->queue, &pinstance->used_res_q);
  4540. }
  4541. /* copy new configuration table entry details into driver
  4542. * maintained resource entry
  4543. */
  4544. if (found) {
  4545. memcpy(&res->cfg_entry, cfgte,
  4546. sizeof(struct pmcraid_config_table_entry));
  4547. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4548. res->cfg_entry.resource_type,
  4549. res->cfg_entry.unique_flags1,
  4550. le32_to_cpu(res->cfg_entry.resource_address));
  4551. }
  4552. }
  4553. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4554. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4555. if (res->scsi_dev) {
  4556. res->change_detected = RES_CHANGE_DEL;
  4557. res->cfg_entry.resource_handle =
  4558. PMCRAID_INVALID_RES_HANDLE;
  4559. list_move_tail(&res->queue, &pinstance->used_res_q);
  4560. } else {
  4561. list_move_tail(&res->queue, &pinstance->free_res_q);
  4562. }
  4563. }
  4564. /* release the resource list lock */
  4565. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4566. pmcraid_set_supported_devs(cmd);
  4567. }
  4568. /**
  4569. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4570. * @cmd: pointer pmcraid_cmd struct
  4571. *
  4572. * This function sends a Query IOA Configuration command to the adapter to
  4573. * retrieve the IOA configuration table.
  4574. *
  4575. * Return value:
  4576. * none
  4577. */
  4578. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4579. {
  4580. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4581. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4582. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4583. int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4584. ioarcb->request_type = REQ_TYPE_IOACMD;
  4585. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4586. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4587. /* firmware requires 4-byte length field, specified in B.E format */
  4588. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4589. /* Since entire config table can be described by single IOADL, it can
  4590. * be part of IOARCB itself
  4591. */
  4592. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4593. offsetof(struct pmcraid_ioarcb,
  4594. add_data.u.ioadl[0]));
  4595. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4596. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  4597. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4598. ioarcb->data_transfer_length =
  4599. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4600. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4601. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4602. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4603. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4604. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4605. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4606. }
  4607. /**
  4608. * pmcraid_probe - PCI probe entry pointer for PMC MaxRaid controller driver
  4609. * @pdev: pointer to pci device structure
  4610. * @dev_id: pointer to device ids structure
  4611. *
  4612. * Return Value
  4613. * returns 0 if the device is claimed and successfully configured.
  4614. * returns non-zero error code in case of any failure
  4615. */
  4616. static int __devinit pmcraid_probe(
  4617. struct pci_dev *pdev,
  4618. const struct pci_device_id *dev_id
  4619. )
  4620. {
  4621. struct pmcraid_instance *pinstance;
  4622. struct Scsi_Host *host;
  4623. void __iomem *mapped_pci_addr;
  4624. int rc = PCIBIOS_SUCCESSFUL;
  4625. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  4626. pmcraid_err
  4627. ("maximum number(%d) of supported adapters reached\n",
  4628. atomic_read(&pmcraid_adapter_count));
  4629. return -ENOMEM;
  4630. }
  4631. atomic_inc(&pmcraid_adapter_count);
  4632. rc = pci_enable_device(pdev);
  4633. if (rc) {
  4634. dev_err(&pdev->dev, "Cannot enable adapter\n");
  4635. atomic_dec(&pmcraid_adapter_count);
  4636. return rc;
  4637. }
  4638. dev_info(&pdev->dev,
  4639. "Found new IOA(%x:%x), Total IOA count: %d\n",
  4640. pdev->vendor, pdev->device,
  4641. atomic_read(&pmcraid_adapter_count));
  4642. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  4643. if (rc < 0) {
  4644. dev_err(&pdev->dev,
  4645. "Couldn't register memory range of registers\n");
  4646. goto out_disable_device;
  4647. }
  4648. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  4649. if (!mapped_pci_addr) {
  4650. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  4651. rc = -ENOMEM;
  4652. goto out_release_regions;
  4653. }
  4654. pci_set_master(pdev);
  4655. /* Firmware requires the system bus address of IOARCB to be within
  4656. * 32-bit addressable range though it has 64-bit IOARRIN register.
  4657. * However, firmware supports 64-bit streaming DMA buffers, whereas
  4658. * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
  4659. * returns memory within 4GB (if not, change this logic), coherent
  4660. * buffers are within firmware acceptible address ranges.
  4661. */
  4662. if ((sizeof(dma_addr_t) == 4) ||
  4663. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4664. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4665. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  4666. * bit mask for pci_alloc_consistent to return addresses within 4GB
  4667. */
  4668. if (rc == 0)
  4669. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4670. if (rc != 0) {
  4671. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  4672. goto cleanup_nomem;
  4673. }
  4674. host = scsi_host_alloc(&pmcraid_host_template,
  4675. sizeof(struct pmcraid_instance));
  4676. if (!host) {
  4677. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  4678. rc = -ENOMEM;
  4679. goto cleanup_nomem;
  4680. }
  4681. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  4682. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  4683. host->unique_id = host->host_no;
  4684. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  4685. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  4686. /* zero out entire instance structure */
  4687. pinstance = (struct pmcraid_instance *)host->hostdata;
  4688. memset(pinstance, 0, sizeof(*pinstance));
  4689. pinstance->chip_cfg =
  4690. (struct pmcraid_chip_details *)(dev_id->driver_data);
  4691. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  4692. if (rc < 0) {
  4693. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  4694. goto out_scsi_host_put;
  4695. }
  4696. pci_set_drvdata(pdev, pinstance);
  4697. /* Save PCI config-space for use following the reset */
  4698. rc = pci_save_state(pinstance->pdev);
  4699. if (rc != 0) {
  4700. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  4701. goto out_scsi_host_put;
  4702. }
  4703. pmcraid_disable_interrupts(pinstance, ~0);
  4704. rc = pmcraid_register_interrupt_handler(pinstance);
  4705. if (rc) {
  4706. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  4707. goto out_scsi_host_put;
  4708. }
  4709. pmcraid_init_tasklets(pinstance);
  4710. /* allocate verious buffers used by LLD.*/
  4711. rc = pmcraid_init_buffers(pinstance);
  4712. if (rc) {
  4713. pmcraid_err("couldn't allocate memory blocks\n");
  4714. goto out_unregister_isr;
  4715. }
  4716. /* check the reset type required */
  4717. pmcraid_reset_type(pinstance);
  4718. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4719. /* Start IOA firmware initialization and bring card to Operational
  4720. * state.
  4721. */
  4722. pmcraid_info("starting IOA initialization sequence\n");
  4723. if (pmcraid_reset_bringup(pinstance)) {
  4724. dev_err(&pdev->dev, "couldn't initialize IOA \n");
  4725. rc = 1;
  4726. goto out_release_bufs;
  4727. }
  4728. /* Add adapter instance into mid-layer list */
  4729. rc = scsi_add_host(pinstance->host, &pdev->dev);
  4730. if (rc != 0) {
  4731. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  4732. goto out_release_bufs;
  4733. }
  4734. scsi_scan_host(pinstance->host);
  4735. rc = pmcraid_setup_chrdev(pinstance);
  4736. if (rc != 0) {
  4737. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  4738. rc);
  4739. goto out_remove_host;
  4740. }
  4741. /* Schedule worker thread to handle CCN and take care of adding and
  4742. * removing devices to OS
  4743. */
  4744. atomic_set(&pinstance->expose_resources, 1);
  4745. schedule_work(&pinstance->worker_q);
  4746. return rc;
  4747. out_remove_host:
  4748. scsi_remove_host(host);
  4749. out_release_bufs:
  4750. pmcraid_release_buffers(pinstance);
  4751. out_unregister_isr:
  4752. pmcraid_kill_tasklets(pinstance);
  4753. pmcraid_unregister_interrupt_handler(pinstance);
  4754. out_scsi_host_put:
  4755. scsi_host_put(host);
  4756. cleanup_nomem:
  4757. iounmap(mapped_pci_addr);
  4758. out_release_regions:
  4759. pci_release_regions(pdev);
  4760. out_disable_device:
  4761. atomic_dec(&pmcraid_adapter_count);
  4762. pci_set_drvdata(pdev, NULL);
  4763. pci_disable_device(pdev);
  4764. return -ENODEV;
  4765. }
  4766. /*
  4767. * PCI driver structure of pcmraid driver
  4768. */
  4769. static struct pci_driver pmcraid_driver = {
  4770. .name = PMCRAID_DRIVER_NAME,
  4771. .id_table = pmcraid_pci_table,
  4772. .probe = pmcraid_probe,
  4773. .remove = pmcraid_remove,
  4774. .suspend = pmcraid_suspend,
  4775. .resume = pmcraid_resume,
  4776. .shutdown = pmcraid_shutdown
  4777. };
  4778. /**
  4779. * pmcraid_init - module load entry point
  4780. */
  4781. static int __init pmcraid_init(void)
  4782. {
  4783. dev_t dev;
  4784. int error;
  4785. pmcraid_info("%s Device Driver version: %s %s\n",
  4786. PMCRAID_DRIVER_NAME,
  4787. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  4788. error = alloc_chrdev_region(&dev, 0,
  4789. PMCRAID_MAX_ADAPTERS,
  4790. PMCRAID_DEVFILE);
  4791. if (error) {
  4792. pmcraid_err("failed to get a major number for adapters\n");
  4793. goto out_init;
  4794. }
  4795. pmcraid_major = MAJOR(dev);
  4796. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  4797. if (IS_ERR(pmcraid_class)) {
  4798. error = PTR_ERR(pmcraid_class);
  4799. pmcraid_err("failed to register with with sysfs, error = %x\n",
  4800. error);
  4801. goto out_unreg_chrdev;
  4802. }
  4803. error = pmcraid_netlink_init();
  4804. if (error)
  4805. goto out_unreg_chrdev;
  4806. error = pci_register_driver(&pmcraid_driver);
  4807. if (error == 0)
  4808. goto out_init;
  4809. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  4810. error);
  4811. class_destroy(pmcraid_class);
  4812. pmcraid_netlink_release();
  4813. out_unreg_chrdev:
  4814. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  4815. out_init:
  4816. return error;
  4817. }
  4818. /**
  4819. * pmcraid_exit - module unload entry point
  4820. */
  4821. static void __exit pmcraid_exit(void)
  4822. {
  4823. pmcraid_netlink_release();
  4824. class_destroy(pmcraid_class);
  4825. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  4826. PMCRAID_MAX_ADAPTERS);
  4827. pci_unregister_driver(&pmcraid_driver);
  4828. }
  4829. module_init(pmcraid_init);
  4830. module_exit(pmcraid_exit);