hpsa.c 106 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  84. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  85. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  86. {0,}
  87. };
  88. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  89. /* board_id = Subsystem Device ID & Vendor ID
  90. * product = Marketing Name for the board
  91. * access = Address of the struct of function pointers
  92. */
  93. static struct board_type products[] = {
  94. {0x3241103C, "Smart Array P212", &SA5_access},
  95. {0x3243103C, "Smart Array P410", &SA5_access},
  96. {0x3245103C, "Smart Array P410i", &SA5_access},
  97. {0x3247103C, "Smart Array P411", &SA5_access},
  98. {0x3249103C, "Smart Array P812", &SA5_access},
  99. {0x324a103C, "Smart Array P712m", &SA5_access},
  100. {0x324b103C, "Smart Array P711m", &SA5_access},
  101. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  102. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  103. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  104. };
  105. static int number_of_controllers;
  106. static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
  107. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  108. static void start_io(struct ctlr_info *h);
  109. #ifdef CONFIG_COMPAT
  110. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  111. #endif
  112. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  113. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  114. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  115. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  116. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  117. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  118. int cmd_type);
  119. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  120. void (*done)(struct scsi_cmnd *));
  121. static void hpsa_scan_start(struct Scsi_Host *);
  122. static int hpsa_scan_finished(struct Scsi_Host *sh,
  123. unsigned long elapsed_time);
  124. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  125. int qdepth, int reason);
  126. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  127. static int hpsa_slave_alloc(struct scsi_device *sdev);
  128. static void hpsa_slave_destroy(struct scsi_device *sdev);
  129. static ssize_t raid_level_show(struct device *dev,
  130. struct device_attribute *attr, char *buf);
  131. static ssize_t lunid_show(struct device *dev,
  132. struct device_attribute *attr, char *buf);
  133. static ssize_t unique_id_show(struct device *dev,
  134. struct device_attribute *attr, char *buf);
  135. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  136. static ssize_t host_store_rescan(struct device *dev,
  137. struct device_attribute *attr, const char *buf, size_t count);
  138. static int check_for_unit_attention(struct ctlr_info *h,
  139. struct CommandList *c);
  140. static void check_ioctl_unit_attention(struct ctlr_info *h,
  141. struct CommandList *c);
  142. /* performant mode helper functions */
  143. static void calc_bucket_map(int *bucket, int num_buckets,
  144. int nsgs, int *bucket_map);
  145. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  146. static inline u32 next_command(struct ctlr_info *h);
  147. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  148. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  149. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  150. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  151. static struct device_attribute *hpsa_sdev_attrs[] = {
  152. &dev_attr_raid_level,
  153. &dev_attr_lunid,
  154. &dev_attr_unique_id,
  155. NULL,
  156. };
  157. static struct device_attribute *hpsa_shost_attrs[] = {
  158. &dev_attr_rescan,
  159. NULL,
  160. };
  161. static struct scsi_host_template hpsa_driver_template = {
  162. .module = THIS_MODULE,
  163. .name = "hpsa",
  164. .proc_name = "hpsa",
  165. .queuecommand = hpsa_scsi_queue_command,
  166. .scan_start = hpsa_scan_start,
  167. .scan_finished = hpsa_scan_finished,
  168. .change_queue_depth = hpsa_change_queue_depth,
  169. .this_id = -1,
  170. .use_clustering = ENABLE_CLUSTERING,
  171. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  172. .ioctl = hpsa_ioctl,
  173. .slave_alloc = hpsa_slave_alloc,
  174. .slave_destroy = hpsa_slave_destroy,
  175. #ifdef CONFIG_COMPAT
  176. .compat_ioctl = hpsa_compat_ioctl,
  177. #endif
  178. .sdev_attrs = hpsa_sdev_attrs,
  179. .shost_attrs = hpsa_shost_attrs,
  180. };
  181. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  182. {
  183. unsigned long *priv = shost_priv(sdev->host);
  184. return (struct ctlr_info *) *priv;
  185. }
  186. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  187. {
  188. unsigned long *priv = shost_priv(sh);
  189. return (struct ctlr_info *) *priv;
  190. }
  191. static int check_for_unit_attention(struct ctlr_info *h,
  192. struct CommandList *c)
  193. {
  194. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  195. return 0;
  196. switch (c->err_info->SenseInfo[12]) {
  197. case STATE_CHANGED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  199. "detected, command retried\n", h->ctlr);
  200. break;
  201. case LUN_FAILED:
  202. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  203. "detected, action required\n", h->ctlr);
  204. break;
  205. case REPORT_LUNS_CHANGED:
  206. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  207. "changed, action required\n", h->ctlr);
  208. /*
  209. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  210. */
  211. break;
  212. case POWER_OR_RESET:
  213. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  214. "or device reset detected\n", h->ctlr);
  215. break;
  216. case UNIT_ATTENTION_CLEARED:
  217. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  218. "cleared by another initiator\n", h->ctlr);
  219. break;
  220. default:
  221. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  222. "unit attention detected\n", h->ctlr);
  223. break;
  224. }
  225. return 1;
  226. }
  227. static ssize_t host_store_rescan(struct device *dev,
  228. struct device_attribute *attr,
  229. const char *buf, size_t count)
  230. {
  231. struct ctlr_info *h;
  232. struct Scsi_Host *shost = class_to_shost(dev);
  233. h = shost_to_hba(shost);
  234. hpsa_scan_start(h->scsi_host);
  235. return count;
  236. }
  237. /* Enqueuing and dequeuing functions for cmdlists. */
  238. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  239. {
  240. hlist_add_head(&c->list, list);
  241. }
  242. static inline u32 next_command(struct ctlr_info *h)
  243. {
  244. u32 a;
  245. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  246. return h->access.command_completed(h);
  247. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  248. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  249. (h->reply_pool_head)++;
  250. h->commands_outstanding--;
  251. } else {
  252. a = FIFO_EMPTY;
  253. }
  254. /* Check for wraparound */
  255. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  256. h->reply_pool_head = h->reply_pool;
  257. h->reply_pool_wraparound ^= 1;
  258. }
  259. return a;
  260. }
  261. /* set_performant_mode: Modify the tag for cciss performant
  262. * set bit 0 for pull model, bits 3-1 for block fetch
  263. * register number
  264. */
  265. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  266. {
  267. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  268. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  269. }
  270. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  271. struct CommandList *c)
  272. {
  273. unsigned long flags;
  274. set_performant_mode(h, c);
  275. spin_lock_irqsave(&h->lock, flags);
  276. addQ(&h->reqQ, c);
  277. h->Qdepth++;
  278. start_io(h);
  279. spin_unlock_irqrestore(&h->lock, flags);
  280. }
  281. static inline void removeQ(struct CommandList *c)
  282. {
  283. if (WARN_ON(hlist_unhashed(&c->list)))
  284. return;
  285. hlist_del_init(&c->list);
  286. }
  287. static inline int is_hba_lunid(unsigned char scsi3addr[])
  288. {
  289. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  290. }
  291. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  292. {
  293. return (scsi3addr[3] & 0xC0) == 0x40;
  294. }
  295. static inline int is_scsi_rev_5(struct ctlr_info *h)
  296. {
  297. if (!h->hba_inquiry_data)
  298. return 0;
  299. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  300. return 1;
  301. return 0;
  302. }
  303. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  304. "UNKNOWN"
  305. };
  306. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  307. static ssize_t raid_level_show(struct device *dev,
  308. struct device_attribute *attr, char *buf)
  309. {
  310. ssize_t l = 0;
  311. unsigned char rlevel;
  312. struct ctlr_info *h;
  313. struct scsi_device *sdev;
  314. struct hpsa_scsi_dev_t *hdev;
  315. unsigned long flags;
  316. sdev = to_scsi_device(dev);
  317. h = sdev_to_hba(sdev);
  318. spin_lock_irqsave(&h->lock, flags);
  319. hdev = sdev->hostdata;
  320. if (!hdev) {
  321. spin_unlock_irqrestore(&h->lock, flags);
  322. return -ENODEV;
  323. }
  324. /* Is this even a logical drive? */
  325. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  326. spin_unlock_irqrestore(&h->lock, flags);
  327. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  328. return l;
  329. }
  330. rlevel = hdev->raid_level;
  331. spin_unlock_irqrestore(&h->lock, flags);
  332. if (rlevel > RAID_UNKNOWN)
  333. rlevel = RAID_UNKNOWN;
  334. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  335. return l;
  336. }
  337. static ssize_t lunid_show(struct device *dev,
  338. struct device_attribute *attr, char *buf)
  339. {
  340. struct ctlr_info *h;
  341. struct scsi_device *sdev;
  342. struct hpsa_scsi_dev_t *hdev;
  343. unsigned long flags;
  344. unsigned char lunid[8];
  345. sdev = to_scsi_device(dev);
  346. h = sdev_to_hba(sdev);
  347. spin_lock_irqsave(&h->lock, flags);
  348. hdev = sdev->hostdata;
  349. if (!hdev) {
  350. spin_unlock_irqrestore(&h->lock, flags);
  351. return -ENODEV;
  352. }
  353. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  356. lunid[0], lunid[1], lunid[2], lunid[3],
  357. lunid[4], lunid[5], lunid[6], lunid[7]);
  358. }
  359. static ssize_t unique_id_show(struct device *dev,
  360. struct device_attribute *attr, char *buf)
  361. {
  362. struct ctlr_info *h;
  363. struct scsi_device *sdev;
  364. struct hpsa_scsi_dev_t *hdev;
  365. unsigned long flags;
  366. unsigned char sn[16];
  367. sdev = to_scsi_device(dev);
  368. h = sdev_to_hba(sdev);
  369. spin_lock_irqsave(&h->lock, flags);
  370. hdev = sdev->hostdata;
  371. if (!hdev) {
  372. spin_unlock_irqrestore(&h->lock, flags);
  373. return -ENODEV;
  374. }
  375. memcpy(sn, hdev->device_id, sizeof(sn));
  376. spin_unlock_irqrestore(&h->lock, flags);
  377. return snprintf(buf, 16 * 2 + 2,
  378. "%02X%02X%02X%02X%02X%02X%02X%02X"
  379. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  380. sn[0], sn[1], sn[2], sn[3],
  381. sn[4], sn[5], sn[6], sn[7],
  382. sn[8], sn[9], sn[10], sn[11],
  383. sn[12], sn[13], sn[14], sn[15]);
  384. }
  385. static int hpsa_find_target_lun(struct ctlr_info *h,
  386. unsigned char scsi3addr[], int bus, int *target, int *lun)
  387. {
  388. /* finds an unused bus, target, lun for a new physical device
  389. * assumes h->devlock is held
  390. */
  391. int i, found = 0;
  392. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  393. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  394. for (i = 0; i < h->ndevices; i++) {
  395. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  396. set_bit(h->dev[i]->target, lun_taken);
  397. }
  398. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  399. if (!test_bit(i, lun_taken)) {
  400. /* *bus = 1; */
  401. *target = i;
  402. *lun = 0;
  403. found = 1;
  404. break;
  405. }
  406. }
  407. return !found;
  408. }
  409. /* Add an entry into h->dev[] array. */
  410. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  411. struct hpsa_scsi_dev_t *device,
  412. struct hpsa_scsi_dev_t *added[], int *nadded)
  413. {
  414. /* assumes h->devlock is held */
  415. int n = h->ndevices;
  416. int i;
  417. unsigned char addr1[8], addr2[8];
  418. struct hpsa_scsi_dev_t *sd;
  419. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  420. dev_err(&h->pdev->dev, "too many devices, some will be "
  421. "inaccessible.\n");
  422. return -1;
  423. }
  424. /* physical devices do not have lun or target assigned until now. */
  425. if (device->lun != -1)
  426. /* Logical device, lun is already assigned. */
  427. goto lun_assigned;
  428. /* If this device a non-zero lun of a multi-lun device
  429. * byte 4 of the 8-byte LUN addr will contain the logical
  430. * unit no, zero otherise.
  431. */
  432. if (device->scsi3addr[4] == 0) {
  433. /* This is not a non-zero lun of a multi-lun device */
  434. if (hpsa_find_target_lun(h, device->scsi3addr,
  435. device->bus, &device->target, &device->lun) != 0)
  436. return -1;
  437. goto lun_assigned;
  438. }
  439. /* This is a non-zero lun of a multi-lun device.
  440. * Search through our list and find the device which
  441. * has the same 8 byte LUN address, excepting byte 4.
  442. * Assign the same bus and target for this new LUN.
  443. * Use the logical unit number from the firmware.
  444. */
  445. memcpy(addr1, device->scsi3addr, 8);
  446. addr1[4] = 0;
  447. for (i = 0; i < n; i++) {
  448. sd = h->dev[i];
  449. memcpy(addr2, sd->scsi3addr, 8);
  450. addr2[4] = 0;
  451. /* differ only in byte 4? */
  452. if (memcmp(addr1, addr2, 8) == 0) {
  453. device->bus = sd->bus;
  454. device->target = sd->target;
  455. device->lun = device->scsi3addr[4];
  456. break;
  457. }
  458. }
  459. if (device->lun == -1) {
  460. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  461. " suspect firmware bug or unsupported hardware "
  462. "configuration.\n");
  463. return -1;
  464. }
  465. lun_assigned:
  466. h->dev[n] = device;
  467. h->ndevices++;
  468. added[*nadded] = device;
  469. (*nadded)++;
  470. /* initially, (before registering with scsi layer) we don't
  471. * know our hostno and we don't want to print anything first
  472. * time anyway (the scsi layer's inquiries will show that info)
  473. */
  474. /* if (hostno != -1) */
  475. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  476. scsi_device_type(device->devtype), hostno,
  477. device->bus, device->target, device->lun);
  478. return 0;
  479. }
  480. /* Replace an entry from h->dev[] array. */
  481. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  482. int entry, struct hpsa_scsi_dev_t *new_entry,
  483. struct hpsa_scsi_dev_t *added[], int *nadded,
  484. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  485. {
  486. /* assumes h->devlock is held */
  487. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  488. removed[*nremoved] = h->dev[entry];
  489. (*nremoved)++;
  490. h->dev[entry] = new_entry;
  491. added[*nadded] = new_entry;
  492. (*nadded)++;
  493. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  494. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  495. new_entry->target, new_entry->lun);
  496. }
  497. /* Remove an entry from h->dev[] array. */
  498. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  499. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  500. {
  501. /* assumes h->devlock is held */
  502. int i;
  503. struct hpsa_scsi_dev_t *sd;
  504. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  505. sd = h->dev[entry];
  506. removed[*nremoved] = h->dev[entry];
  507. (*nremoved)++;
  508. for (i = entry; i < h->ndevices-1; i++)
  509. h->dev[i] = h->dev[i+1];
  510. h->ndevices--;
  511. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  512. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  513. sd->lun);
  514. }
  515. #define SCSI3ADDR_EQ(a, b) ( \
  516. (a)[7] == (b)[7] && \
  517. (a)[6] == (b)[6] && \
  518. (a)[5] == (b)[5] && \
  519. (a)[4] == (b)[4] && \
  520. (a)[3] == (b)[3] && \
  521. (a)[2] == (b)[2] && \
  522. (a)[1] == (b)[1] && \
  523. (a)[0] == (b)[0])
  524. static void fixup_botched_add(struct ctlr_info *h,
  525. struct hpsa_scsi_dev_t *added)
  526. {
  527. /* called when scsi_add_device fails in order to re-adjust
  528. * h->dev[] to match the mid layer's view.
  529. */
  530. unsigned long flags;
  531. int i, j;
  532. spin_lock_irqsave(&h->lock, flags);
  533. for (i = 0; i < h->ndevices; i++) {
  534. if (h->dev[i] == added) {
  535. for (j = i; j < h->ndevices-1; j++)
  536. h->dev[j] = h->dev[j+1];
  537. h->ndevices--;
  538. break;
  539. }
  540. }
  541. spin_unlock_irqrestore(&h->lock, flags);
  542. kfree(added);
  543. }
  544. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  545. struct hpsa_scsi_dev_t *dev2)
  546. {
  547. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  548. (dev1->lun != -1 && dev2->lun != -1)) &&
  549. dev1->devtype != 0x0C)
  550. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  551. /* we compare everything except lun and target as these
  552. * are not yet assigned. Compare parts likely
  553. * to differ first
  554. */
  555. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  556. sizeof(dev1->scsi3addr)) != 0)
  557. return 0;
  558. if (memcmp(dev1->device_id, dev2->device_id,
  559. sizeof(dev1->device_id)) != 0)
  560. return 0;
  561. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  562. return 0;
  563. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  564. return 0;
  565. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  566. return 0;
  567. if (dev1->devtype != dev2->devtype)
  568. return 0;
  569. if (dev1->raid_level != dev2->raid_level)
  570. return 0;
  571. if (dev1->bus != dev2->bus)
  572. return 0;
  573. return 1;
  574. }
  575. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  576. * and return needle location in *index. If scsi3addr matches, but not
  577. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  578. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  579. */
  580. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  581. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  582. int *index)
  583. {
  584. int i;
  585. #define DEVICE_NOT_FOUND 0
  586. #define DEVICE_CHANGED 1
  587. #define DEVICE_SAME 2
  588. for (i = 0; i < haystack_size; i++) {
  589. if (haystack[i] == NULL) /* previously removed. */
  590. continue;
  591. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  592. *index = i;
  593. if (device_is_the_same(needle, haystack[i]))
  594. return DEVICE_SAME;
  595. else
  596. return DEVICE_CHANGED;
  597. }
  598. }
  599. *index = -1;
  600. return DEVICE_NOT_FOUND;
  601. }
  602. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  603. struct hpsa_scsi_dev_t *sd[], int nsds)
  604. {
  605. /* sd contains scsi3 addresses and devtypes, and inquiry
  606. * data. This function takes what's in sd to be the current
  607. * reality and updates h->dev[] to reflect that reality.
  608. */
  609. int i, entry, device_change, changes = 0;
  610. struct hpsa_scsi_dev_t *csd;
  611. unsigned long flags;
  612. struct hpsa_scsi_dev_t **added, **removed;
  613. int nadded, nremoved;
  614. struct Scsi_Host *sh = NULL;
  615. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  616. GFP_KERNEL);
  617. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  618. GFP_KERNEL);
  619. if (!added || !removed) {
  620. dev_warn(&h->pdev->dev, "out of memory in "
  621. "adjust_hpsa_scsi_table\n");
  622. goto free_and_out;
  623. }
  624. spin_lock_irqsave(&h->devlock, flags);
  625. /* find any devices in h->dev[] that are not in
  626. * sd[] and remove them from h->dev[], and for any
  627. * devices which have changed, remove the old device
  628. * info and add the new device info.
  629. */
  630. i = 0;
  631. nremoved = 0;
  632. nadded = 0;
  633. while (i < h->ndevices) {
  634. csd = h->dev[i];
  635. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  636. if (device_change == DEVICE_NOT_FOUND) {
  637. changes++;
  638. hpsa_scsi_remove_entry(h, hostno, i,
  639. removed, &nremoved);
  640. continue; /* remove ^^^, hence i not incremented */
  641. } else if (device_change == DEVICE_CHANGED) {
  642. changes++;
  643. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  644. added, &nadded, removed, &nremoved);
  645. /* Set it to NULL to prevent it from being freed
  646. * at the bottom of hpsa_update_scsi_devices()
  647. */
  648. sd[entry] = NULL;
  649. }
  650. i++;
  651. }
  652. /* Now, make sure every device listed in sd[] is also
  653. * listed in h->dev[], adding them if they aren't found
  654. */
  655. for (i = 0; i < nsds; i++) {
  656. if (!sd[i]) /* if already added above. */
  657. continue;
  658. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  659. h->ndevices, &entry);
  660. if (device_change == DEVICE_NOT_FOUND) {
  661. changes++;
  662. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  663. added, &nadded) != 0)
  664. break;
  665. sd[i] = NULL; /* prevent from being freed later. */
  666. } else if (device_change == DEVICE_CHANGED) {
  667. /* should never happen... */
  668. changes++;
  669. dev_warn(&h->pdev->dev,
  670. "device unexpectedly changed.\n");
  671. /* but if it does happen, we just ignore that device */
  672. }
  673. }
  674. spin_unlock_irqrestore(&h->devlock, flags);
  675. /* Don't notify scsi mid layer of any changes the first time through
  676. * (or if there are no changes) scsi_scan_host will do it later the
  677. * first time through.
  678. */
  679. if (hostno == -1 || !changes)
  680. goto free_and_out;
  681. sh = h->scsi_host;
  682. /* Notify scsi mid layer of any removed devices */
  683. for (i = 0; i < nremoved; i++) {
  684. struct scsi_device *sdev =
  685. scsi_device_lookup(sh, removed[i]->bus,
  686. removed[i]->target, removed[i]->lun);
  687. if (sdev != NULL) {
  688. scsi_remove_device(sdev);
  689. scsi_device_put(sdev);
  690. } else {
  691. /* We don't expect to get here.
  692. * future cmds to this device will get selection
  693. * timeout as if the device was gone.
  694. */
  695. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  696. " for removal.", hostno, removed[i]->bus,
  697. removed[i]->target, removed[i]->lun);
  698. }
  699. kfree(removed[i]);
  700. removed[i] = NULL;
  701. }
  702. /* Notify scsi mid layer of any added devices */
  703. for (i = 0; i < nadded; i++) {
  704. if (scsi_add_device(sh, added[i]->bus,
  705. added[i]->target, added[i]->lun) == 0)
  706. continue;
  707. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  708. "device not added.\n", hostno, added[i]->bus,
  709. added[i]->target, added[i]->lun);
  710. /* now we have to remove it from h->dev,
  711. * since it didn't get added to scsi mid layer
  712. */
  713. fixup_botched_add(h, added[i]);
  714. }
  715. free_and_out:
  716. kfree(added);
  717. kfree(removed);
  718. }
  719. /*
  720. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  721. * Assume's h->devlock is held.
  722. */
  723. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  724. int bus, int target, int lun)
  725. {
  726. int i;
  727. struct hpsa_scsi_dev_t *sd;
  728. for (i = 0; i < h->ndevices; i++) {
  729. sd = h->dev[i];
  730. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  731. return sd;
  732. }
  733. return NULL;
  734. }
  735. /* link sdev->hostdata to our per-device structure. */
  736. static int hpsa_slave_alloc(struct scsi_device *sdev)
  737. {
  738. struct hpsa_scsi_dev_t *sd;
  739. unsigned long flags;
  740. struct ctlr_info *h;
  741. h = sdev_to_hba(sdev);
  742. spin_lock_irqsave(&h->devlock, flags);
  743. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  744. sdev_id(sdev), sdev->lun);
  745. if (sd != NULL)
  746. sdev->hostdata = sd;
  747. spin_unlock_irqrestore(&h->devlock, flags);
  748. return 0;
  749. }
  750. static void hpsa_slave_destroy(struct scsi_device *sdev)
  751. {
  752. /* nothing to do. */
  753. }
  754. static void hpsa_scsi_setup(struct ctlr_info *h)
  755. {
  756. h->ndevices = 0;
  757. h->scsi_host = NULL;
  758. spin_lock_init(&h->devlock);
  759. }
  760. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  761. {
  762. int i;
  763. if (!h->cmd_sg_list)
  764. return;
  765. for (i = 0; i < h->nr_cmds; i++) {
  766. kfree(h->cmd_sg_list[i]);
  767. h->cmd_sg_list[i] = NULL;
  768. }
  769. kfree(h->cmd_sg_list);
  770. h->cmd_sg_list = NULL;
  771. }
  772. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  773. {
  774. int i;
  775. if (h->chainsize <= 0)
  776. return 0;
  777. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  778. GFP_KERNEL);
  779. if (!h->cmd_sg_list)
  780. return -ENOMEM;
  781. for (i = 0; i < h->nr_cmds; i++) {
  782. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  783. h->chainsize, GFP_KERNEL);
  784. if (!h->cmd_sg_list[i])
  785. goto clean;
  786. }
  787. return 0;
  788. clean:
  789. hpsa_free_sg_chain_blocks(h);
  790. return -ENOMEM;
  791. }
  792. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  793. struct CommandList *c)
  794. {
  795. struct SGDescriptor *chain_sg, *chain_block;
  796. u64 temp64;
  797. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  798. chain_block = h->cmd_sg_list[c->cmdindex];
  799. chain_sg->Ext = HPSA_SG_CHAIN;
  800. chain_sg->Len = sizeof(*chain_sg) *
  801. (c->Header.SGTotal - h->max_cmd_sg_entries);
  802. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  803. PCI_DMA_TODEVICE);
  804. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  805. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  806. }
  807. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  808. struct CommandList *c)
  809. {
  810. struct SGDescriptor *chain_sg;
  811. union u64bit temp64;
  812. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  813. return;
  814. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  815. temp64.val32.lower = chain_sg->Addr.lower;
  816. temp64.val32.upper = chain_sg->Addr.upper;
  817. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  818. }
  819. static void complete_scsi_command(struct CommandList *cp,
  820. int timeout, u32 tag)
  821. {
  822. struct scsi_cmnd *cmd;
  823. struct ctlr_info *h;
  824. struct ErrorInfo *ei;
  825. unsigned char sense_key;
  826. unsigned char asc; /* additional sense code */
  827. unsigned char ascq; /* additional sense code qualifier */
  828. ei = cp->err_info;
  829. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  830. h = cp->h;
  831. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  832. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  833. hpsa_unmap_sg_chain_block(h, cp);
  834. cmd->result = (DID_OK << 16); /* host byte */
  835. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  836. cmd->result |= ei->ScsiStatus;
  837. /* copy the sense data whether we need to or not. */
  838. memcpy(cmd->sense_buffer, ei->SenseInfo,
  839. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  840. SCSI_SENSE_BUFFERSIZE :
  841. ei->SenseLen);
  842. scsi_set_resid(cmd, ei->ResidualCnt);
  843. if (ei->CommandStatus == 0) {
  844. cmd->scsi_done(cmd);
  845. cmd_free(h, cp);
  846. return;
  847. }
  848. /* an error has occurred */
  849. switch (ei->CommandStatus) {
  850. case CMD_TARGET_STATUS:
  851. if (ei->ScsiStatus) {
  852. /* Get sense key */
  853. sense_key = 0xf & ei->SenseInfo[2];
  854. /* Get additional sense code */
  855. asc = ei->SenseInfo[12];
  856. /* Get addition sense code qualifier */
  857. ascq = ei->SenseInfo[13];
  858. }
  859. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  860. if (check_for_unit_attention(h, cp)) {
  861. cmd->result = DID_SOFT_ERROR << 16;
  862. break;
  863. }
  864. if (sense_key == ILLEGAL_REQUEST) {
  865. /*
  866. * SCSI REPORT_LUNS is commonly unsupported on
  867. * Smart Array. Suppress noisy complaint.
  868. */
  869. if (cp->Request.CDB[0] == REPORT_LUNS)
  870. break;
  871. /* If ASC/ASCQ indicate Logical Unit
  872. * Not Supported condition,
  873. */
  874. if ((asc == 0x25) && (ascq == 0x0)) {
  875. dev_warn(&h->pdev->dev, "cp %p "
  876. "has check condition\n", cp);
  877. break;
  878. }
  879. }
  880. if (sense_key == NOT_READY) {
  881. /* If Sense is Not Ready, Logical Unit
  882. * Not ready, Manual Intervention
  883. * required
  884. */
  885. if ((asc == 0x04) && (ascq == 0x03)) {
  886. dev_warn(&h->pdev->dev, "cp %p "
  887. "has check condition: unit "
  888. "not ready, manual "
  889. "intervention required\n", cp);
  890. break;
  891. }
  892. }
  893. if (sense_key == ABORTED_COMMAND) {
  894. /* Aborted command is retryable */
  895. dev_warn(&h->pdev->dev, "cp %p "
  896. "has check condition: aborted command: "
  897. "ASC: 0x%x, ASCQ: 0x%x\n",
  898. cp, asc, ascq);
  899. cmd->result = DID_SOFT_ERROR << 16;
  900. break;
  901. }
  902. /* Must be some other type of check condition */
  903. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  904. "unknown type: "
  905. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  906. "Returning result: 0x%x, "
  907. "cmd=[%02x %02x %02x %02x %02x "
  908. "%02x %02x %02x %02x %02x %02x "
  909. "%02x %02x %02x %02x %02x]\n",
  910. cp, sense_key, asc, ascq,
  911. cmd->result,
  912. cmd->cmnd[0], cmd->cmnd[1],
  913. cmd->cmnd[2], cmd->cmnd[3],
  914. cmd->cmnd[4], cmd->cmnd[5],
  915. cmd->cmnd[6], cmd->cmnd[7],
  916. cmd->cmnd[8], cmd->cmnd[9],
  917. cmd->cmnd[10], cmd->cmnd[11],
  918. cmd->cmnd[12], cmd->cmnd[13],
  919. cmd->cmnd[14], cmd->cmnd[15]);
  920. break;
  921. }
  922. /* Problem was not a check condition
  923. * Pass it up to the upper layers...
  924. */
  925. if (ei->ScsiStatus) {
  926. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  927. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  928. "Returning result: 0x%x\n",
  929. cp, ei->ScsiStatus,
  930. sense_key, asc, ascq,
  931. cmd->result);
  932. } else { /* scsi status is zero??? How??? */
  933. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  934. "Returning no connection.\n", cp),
  935. /* Ordinarily, this case should never happen,
  936. * but there is a bug in some released firmware
  937. * revisions that allows it to happen if, for
  938. * example, a 4100 backplane loses power and
  939. * the tape drive is in it. We assume that
  940. * it's a fatal error of some kind because we
  941. * can't show that it wasn't. We will make it
  942. * look like selection timeout since that is
  943. * the most common reason for this to occur,
  944. * and it's severe enough.
  945. */
  946. cmd->result = DID_NO_CONNECT << 16;
  947. }
  948. break;
  949. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  950. break;
  951. case CMD_DATA_OVERRUN:
  952. dev_warn(&h->pdev->dev, "cp %p has"
  953. " completed with data overrun "
  954. "reported\n", cp);
  955. break;
  956. case CMD_INVALID: {
  957. /* print_bytes(cp, sizeof(*cp), 1, 0);
  958. print_cmd(cp); */
  959. /* We get CMD_INVALID if you address a non-existent device
  960. * instead of a selection timeout (no response). You will
  961. * see this if you yank out a drive, then try to access it.
  962. * This is kind of a shame because it means that any other
  963. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  964. * missing target. */
  965. cmd->result = DID_NO_CONNECT << 16;
  966. }
  967. break;
  968. case CMD_PROTOCOL_ERR:
  969. dev_warn(&h->pdev->dev, "cp %p has "
  970. "protocol error \n", cp);
  971. break;
  972. case CMD_HARDWARE_ERR:
  973. cmd->result = DID_ERROR << 16;
  974. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  975. break;
  976. case CMD_CONNECTION_LOST:
  977. cmd->result = DID_ERROR << 16;
  978. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  979. break;
  980. case CMD_ABORTED:
  981. cmd->result = DID_ABORT << 16;
  982. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  983. cp, ei->ScsiStatus);
  984. break;
  985. case CMD_ABORT_FAILED:
  986. cmd->result = DID_ERROR << 16;
  987. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  988. break;
  989. case CMD_UNSOLICITED_ABORT:
  990. cmd->result = DID_RESET << 16;
  991. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  992. "abort\n", cp);
  993. break;
  994. case CMD_TIMEOUT:
  995. cmd->result = DID_TIME_OUT << 16;
  996. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  997. break;
  998. default:
  999. cmd->result = DID_ERROR << 16;
  1000. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1001. cp, ei->CommandStatus);
  1002. }
  1003. cmd->scsi_done(cmd);
  1004. cmd_free(h, cp);
  1005. }
  1006. static int hpsa_scsi_detect(struct ctlr_info *h)
  1007. {
  1008. struct Scsi_Host *sh;
  1009. int error;
  1010. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1011. if (sh == NULL)
  1012. goto fail;
  1013. sh->io_port = 0;
  1014. sh->n_io_port = 0;
  1015. sh->this_id = -1;
  1016. sh->max_channel = 3;
  1017. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1018. sh->max_lun = HPSA_MAX_LUN;
  1019. sh->max_id = HPSA_MAX_LUN;
  1020. sh->can_queue = h->nr_cmds;
  1021. sh->cmd_per_lun = h->nr_cmds;
  1022. sh->sg_tablesize = h->maxsgentries;
  1023. h->scsi_host = sh;
  1024. sh->hostdata[0] = (unsigned long) h;
  1025. sh->irq = h->intr[PERF_MODE_INT];
  1026. sh->unique_id = sh->irq;
  1027. error = scsi_add_host(sh, &h->pdev->dev);
  1028. if (error)
  1029. goto fail_host_put;
  1030. scsi_scan_host(sh);
  1031. return 0;
  1032. fail_host_put:
  1033. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1034. " failed for controller %d\n", h->ctlr);
  1035. scsi_host_put(sh);
  1036. return error;
  1037. fail:
  1038. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1039. " failed for controller %d\n", h->ctlr);
  1040. return -ENOMEM;
  1041. }
  1042. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1043. struct CommandList *c, int sg_used, int data_direction)
  1044. {
  1045. int i;
  1046. union u64bit addr64;
  1047. for (i = 0; i < sg_used; i++) {
  1048. addr64.val32.lower = c->SG[i].Addr.lower;
  1049. addr64.val32.upper = c->SG[i].Addr.upper;
  1050. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1051. data_direction);
  1052. }
  1053. }
  1054. static void hpsa_map_one(struct pci_dev *pdev,
  1055. struct CommandList *cp,
  1056. unsigned char *buf,
  1057. size_t buflen,
  1058. int data_direction)
  1059. {
  1060. u64 addr64;
  1061. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1062. cp->Header.SGList = 0;
  1063. cp->Header.SGTotal = 0;
  1064. return;
  1065. }
  1066. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1067. cp->SG[0].Addr.lower =
  1068. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1069. cp->SG[0].Addr.upper =
  1070. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1071. cp->SG[0].Len = buflen;
  1072. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1073. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1074. }
  1075. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1076. struct CommandList *c)
  1077. {
  1078. DECLARE_COMPLETION_ONSTACK(wait);
  1079. c->waiting = &wait;
  1080. enqueue_cmd_and_start_io(h, c);
  1081. wait_for_completion(&wait);
  1082. }
  1083. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1084. struct CommandList *c, int data_direction)
  1085. {
  1086. int retry_count = 0;
  1087. do {
  1088. memset(c->err_info, 0, sizeof(c->err_info));
  1089. hpsa_scsi_do_simple_cmd_core(h, c);
  1090. retry_count++;
  1091. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1092. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1093. }
  1094. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1095. {
  1096. struct ErrorInfo *ei;
  1097. struct device *d = &cp->h->pdev->dev;
  1098. ei = cp->err_info;
  1099. switch (ei->CommandStatus) {
  1100. case CMD_TARGET_STATUS:
  1101. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1102. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1103. ei->ScsiStatus);
  1104. if (ei->ScsiStatus == 0)
  1105. dev_warn(d, "SCSI status is abnormally zero. "
  1106. "(probably indicates selection timeout "
  1107. "reported incorrectly due to a known "
  1108. "firmware bug, circa July, 2001.)\n");
  1109. break;
  1110. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1111. dev_info(d, "UNDERRUN\n");
  1112. break;
  1113. case CMD_DATA_OVERRUN:
  1114. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1115. break;
  1116. case CMD_INVALID: {
  1117. /* controller unfortunately reports SCSI passthru's
  1118. * to non-existent targets as invalid commands.
  1119. */
  1120. dev_warn(d, "cp %p is reported invalid (probably means "
  1121. "target device no longer present)\n", cp);
  1122. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1123. print_cmd(cp); */
  1124. }
  1125. break;
  1126. case CMD_PROTOCOL_ERR:
  1127. dev_warn(d, "cp %p has protocol error \n", cp);
  1128. break;
  1129. case CMD_HARDWARE_ERR:
  1130. /* cmd->result = DID_ERROR << 16; */
  1131. dev_warn(d, "cp %p had hardware error\n", cp);
  1132. break;
  1133. case CMD_CONNECTION_LOST:
  1134. dev_warn(d, "cp %p had connection lost\n", cp);
  1135. break;
  1136. case CMD_ABORTED:
  1137. dev_warn(d, "cp %p was aborted\n", cp);
  1138. break;
  1139. case CMD_ABORT_FAILED:
  1140. dev_warn(d, "cp %p reports abort failed\n", cp);
  1141. break;
  1142. case CMD_UNSOLICITED_ABORT:
  1143. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1144. break;
  1145. case CMD_TIMEOUT:
  1146. dev_warn(d, "cp %p timed out\n", cp);
  1147. break;
  1148. default:
  1149. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1150. ei->CommandStatus);
  1151. }
  1152. }
  1153. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1154. unsigned char page, unsigned char *buf,
  1155. unsigned char bufsize)
  1156. {
  1157. int rc = IO_OK;
  1158. struct CommandList *c;
  1159. struct ErrorInfo *ei;
  1160. c = cmd_special_alloc(h);
  1161. if (c == NULL) { /* trouble... */
  1162. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1163. return -ENOMEM;
  1164. }
  1165. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1166. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1167. ei = c->err_info;
  1168. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1169. hpsa_scsi_interpret_error(c);
  1170. rc = -1;
  1171. }
  1172. cmd_special_free(h, c);
  1173. return rc;
  1174. }
  1175. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1176. {
  1177. int rc = IO_OK;
  1178. struct CommandList *c;
  1179. struct ErrorInfo *ei;
  1180. c = cmd_special_alloc(h);
  1181. if (c == NULL) { /* trouble... */
  1182. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1183. return -ENOMEM;
  1184. }
  1185. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1186. hpsa_scsi_do_simple_cmd_core(h, c);
  1187. /* no unmap needed here because no data xfer. */
  1188. ei = c->err_info;
  1189. if (ei->CommandStatus != 0) {
  1190. hpsa_scsi_interpret_error(c);
  1191. rc = -1;
  1192. }
  1193. cmd_special_free(h, c);
  1194. return rc;
  1195. }
  1196. static void hpsa_get_raid_level(struct ctlr_info *h,
  1197. unsigned char *scsi3addr, unsigned char *raid_level)
  1198. {
  1199. int rc;
  1200. unsigned char *buf;
  1201. *raid_level = RAID_UNKNOWN;
  1202. buf = kzalloc(64, GFP_KERNEL);
  1203. if (!buf)
  1204. return;
  1205. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1206. if (rc == 0)
  1207. *raid_level = buf[8];
  1208. if (*raid_level > RAID_UNKNOWN)
  1209. *raid_level = RAID_UNKNOWN;
  1210. kfree(buf);
  1211. return;
  1212. }
  1213. /* Get the device id from inquiry page 0x83 */
  1214. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1215. unsigned char *device_id, int buflen)
  1216. {
  1217. int rc;
  1218. unsigned char *buf;
  1219. if (buflen > 16)
  1220. buflen = 16;
  1221. buf = kzalloc(64, GFP_KERNEL);
  1222. if (!buf)
  1223. return -1;
  1224. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1225. if (rc == 0)
  1226. memcpy(device_id, &buf[8], buflen);
  1227. kfree(buf);
  1228. return rc != 0;
  1229. }
  1230. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1231. struct ReportLUNdata *buf, int bufsize,
  1232. int extended_response)
  1233. {
  1234. int rc = IO_OK;
  1235. struct CommandList *c;
  1236. unsigned char scsi3addr[8];
  1237. struct ErrorInfo *ei;
  1238. c = cmd_special_alloc(h);
  1239. if (c == NULL) { /* trouble... */
  1240. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1241. return -1;
  1242. }
  1243. /* address the controller */
  1244. memset(scsi3addr, 0, sizeof(scsi3addr));
  1245. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1246. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1247. if (extended_response)
  1248. c->Request.CDB[1] = extended_response;
  1249. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1250. ei = c->err_info;
  1251. if (ei->CommandStatus != 0 &&
  1252. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1253. hpsa_scsi_interpret_error(c);
  1254. rc = -1;
  1255. }
  1256. cmd_special_free(h, c);
  1257. return rc;
  1258. }
  1259. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1260. struct ReportLUNdata *buf,
  1261. int bufsize, int extended_response)
  1262. {
  1263. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1264. }
  1265. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1266. struct ReportLUNdata *buf, int bufsize)
  1267. {
  1268. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1269. }
  1270. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1271. int bus, int target, int lun)
  1272. {
  1273. device->bus = bus;
  1274. device->target = target;
  1275. device->lun = lun;
  1276. }
  1277. static int hpsa_update_device_info(struct ctlr_info *h,
  1278. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1279. {
  1280. #define OBDR_TAPE_INQ_SIZE 49
  1281. unsigned char *inq_buff;
  1282. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1283. if (!inq_buff)
  1284. goto bail_out;
  1285. /* Do an inquiry to the device to see what it is. */
  1286. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1287. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1288. /* Inquiry failed (msg printed already) */
  1289. dev_err(&h->pdev->dev,
  1290. "hpsa_update_device_info: inquiry failed\n");
  1291. goto bail_out;
  1292. }
  1293. /* As a side effect, record the firmware version number
  1294. * if we happen to be talking to the RAID controller.
  1295. */
  1296. if (is_hba_lunid(scsi3addr))
  1297. memcpy(h->firm_ver, &inq_buff[32], 4);
  1298. this_device->devtype = (inq_buff[0] & 0x1f);
  1299. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1300. memcpy(this_device->vendor, &inq_buff[8],
  1301. sizeof(this_device->vendor));
  1302. memcpy(this_device->model, &inq_buff[16],
  1303. sizeof(this_device->model));
  1304. memcpy(this_device->revision, &inq_buff[32],
  1305. sizeof(this_device->revision));
  1306. memset(this_device->device_id, 0,
  1307. sizeof(this_device->device_id));
  1308. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1309. sizeof(this_device->device_id));
  1310. if (this_device->devtype == TYPE_DISK &&
  1311. is_logical_dev_addr_mode(scsi3addr))
  1312. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1313. else
  1314. this_device->raid_level = RAID_UNKNOWN;
  1315. kfree(inq_buff);
  1316. return 0;
  1317. bail_out:
  1318. kfree(inq_buff);
  1319. return 1;
  1320. }
  1321. static unsigned char *msa2xxx_model[] = {
  1322. "MSA2012",
  1323. "MSA2024",
  1324. "MSA2312",
  1325. "MSA2324",
  1326. NULL,
  1327. };
  1328. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1329. {
  1330. int i;
  1331. for (i = 0; msa2xxx_model[i]; i++)
  1332. if (strncmp(device->model, msa2xxx_model[i],
  1333. strlen(msa2xxx_model[i])) == 0)
  1334. return 1;
  1335. return 0;
  1336. }
  1337. /* Helper function to assign bus, target, lun mapping of devices.
  1338. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1339. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1340. * Logical drive target and lun are assigned at this time, but
  1341. * physical device lun and target assignment are deferred (assigned
  1342. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1343. */
  1344. static void figure_bus_target_lun(struct ctlr_info *h,
  1345. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1346. struct hpsa_scsi_dev_t *device)
  1347. {
  1348. u32 lunid;
  1349. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1350. /* logical device */
  1351. if (unlikely(is_scsi_rev_5(h))) {
  1352. /* p1210m, logical drives lun assignments
  1353. * match SCSI REPORT LUNS data.
  1354. */
  1355. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1356. *bus = 0;
  1357. *target = 0;
  1358. *lun = (lunid & 0x3fff) + 1;
  1359. } else {
  1360. /* not p1210m... */
  1361. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1362. if (is_msa2xxx(h, device)) {
  1363. /* msa2xxx way, put logicals on bus 1
  1364. * and match target/lun numbers box
  1365. * reports.
  1366. */
  1367. *bus = 1;
  1368. *target = (lunid >> 16) & 0x3fff;
  1369. *lun = lunid & 0x00ff;
  1370. } else {
  1371. /* Traditional smart array way. */
  1372. *bus = 0;
  1373. *lun = 0;
  1374. *target = lunid & 0x3fff;
  1375. }
  1376. }
  1377. } else {
  1378. /* physical device */
  1379. if (is_hba_lunid(lunaddrbytes))
  1380. if (unlikely(is_scsi_rev_5(h))) {
  1381. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1382. *target = 0;
  1383. *lun = 0;
  1384. return;
  1385. } else
  1386. *bus = 3; /* traditional smartarray */
  1387. else
  1388. *bus = 2; /* physical disk */
  1389. *target = -1;
  1390. *lun = -1; /* we will fill these in later. */
  1391. }
  1392. }
  1393. /*
  1394. * If there is no lun 0 on a target, linux won't find any devices.
  1395. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1396. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1397. * it for some reason. *tmpdevice is the target we're adding,
  1398. * this_device is a pointer into the current element of currentsd[]
  1399. * that we're building up in update_scsi_devices(), below.
  1400. * lunzerobits is a bitmap that tracks which targets already have a
  1401. * lun 0 assigned.
  1402. * Returns 1 if an enclosure was added, 0 if not.
  1403. */
  1404. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1405. struct hpsa_scsi_dev_t *tmpdevice,
  1406. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1407. int bus, int target, int lun, unsigned long lunzerobits[],
  1408. int *nmsa2xxx_enclosures)
  1409. {
  1410. unsigned char scsi3addr[8];
  1411. if (test_bit(target, lunzerobits))
  1412. return 0; /* There is already a lun 0 on this target. */
  1413. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1414. return 0; /* It's the logical targets that may lack lun 0. */
  1415. if (!is_msa2xxx(h, tmpdevice))
  1416. return 0; /* It's only the MSA2xxx that have this problem. */
  1417. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1418. return 0;
  1419. if (is_hba_lunid(scsi3addr))
  1420. return 0; /* Don't add the RAID controller here. */
  1421. if (is_scsi_rev_5(h))
  1422. return 0; /* p1210m doesn't need to do this. */
  1423. #define MAX_MSA2XXX_ENCLOSURES 32
  1424. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1425. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1426. "enclosures exceeded. Check your hardware "
  1427. "configuration.");
  1428. return 0;
  1429. }
  1430. memset(scsi3addr, 0, 8);
  1431. scsi3addr[3] = target;
  1432. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1433. return 0;
  1434. (*nmsa2xxx_enclosures)++;
  1435. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1436. set_bit(target, lunzerobits);
  1437. return 1;
  1438. }
  1439. /*
  1440. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1441. * logdev. The number of luns in physdev and logdev are returned in
  1442. * *nphysicals and *nlogicals, respectively.
  1443. * Returns 0 on success, -1 otherwise.
  1444. */
  1445. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1446. int reportlunsize,
  1447. struct ReportLUNdata *physdev, u32 *nphysicals,
  1448. struct ReportLUNdata *logdev, u32 *nlogicals)
  1449. {
  1450. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1451. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1452. return -1;
  1453. }
  1454. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1455. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1456. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1457. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1458. *nphysicals - HPSA_MAX_PHYS_LUN);
  1459. *nphysicals = HPSA_MAX_PHYS_LUN;
  1460. }
  1461. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1462. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1463. return -1;
  1464. }
  1465. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1466. /* Reject Logicals in excess of our max capability. */
  1467. if (*nlogicals > HPSA_MAX_LUN) {
  1468. dev_warn(&h->pdev->dev,
  1469. "maximum logical LUNs (%d) exceeded. "
  1470. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1471. *nlogicals - HPSA_MAX_LUN);
  1472. *nlogicals = HPSA_MAX_LUN;
  1473. }
  1474. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1475. dev_warn(&h->pdev->dev,
  1476. "maximum logical + physical LUNs (%d) exceeded. "
  1477. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1478. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1479. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1480. }
  1481. return 0;
  1482. }
  1483. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1484. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1485. struct ReportLUNdata *logdev_list)
  1486. {
  1487. /* Helper function, figure out where the LUN ID info is coming from
  1488. * given index i, lists of physical and logical devices, where in
  1489. * the list the raid controller is supposed to appear (first or last)
  1490. */
  1491. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1492. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1493. if (i == raid_ctlr_position)
  1494. return RAID_CTLR_LUNID;
  1495. if (i < logicals_start)
  1496. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1497. if (i < last_device)
  1498. return &logdev_list->LUN[i - nphysicals -
  1499. (raid_ctlr_position == 0)][0];
  1500. BUG();
  1501. return NULL;
  1502. }
  1503. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1504. {
  1505. /* the idea here is we could get notified
  1506. * that some devices have changed, so we do a report
  1507. * physical luns and report logical luns cmd, and adjust
  1508. * our list of devices accordingly.
  1509. *
  1510. * The scsi3addr's of devices won't change so long as the
  1511. * adapter is not reset. That means we can rescan and
  1512. * tell which devices we already know about, vs. new
  1513. * devices, vs. disappearing devices.
  1514. */
  1515. struct ReportLUNdata *physdev_list = NULL;
  1516. struct ReportLUNdata *logdev_list = NULL;
  1517. unsigned char *inq_buff = NULL;
  1518. u32 nphysicals = 0;
  1519. u32 nlogicals = 0;
  1520. u32 ndev_allocated = 0;
  1521. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1522. int ncurrent = 0;
  1523. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1524. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1525. int bus, target, lun;
  1526. int raid_ctlr_position;
  1527. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1528. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1529. GFP_KERNEL);
  1530. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1531. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1532. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1533. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1534. if (!currentsd || !physdev_list || !logdev_list ||
  1535. !inq_buff || !tmpdevice) {
  1536. dev_err(&h->pdev->dev, "out of memory\n");
  1537. goto out;
  1538. }
  1539. memset(lunzerobits, 0, sizeof(lunzerobits));
  1540. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1541. logdev_list, &nlogicals))
  1542. goto out;
  1543. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1544. * but each of them 4 times through different paths. The plus 1
  1545. * is for the RAID controller.
  1546. */
  1547. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1548. /* Allocate the per device structures */
  1549. for (i = 0; i < ndevs_to_allocate; i++) {
  1550. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1551. if (!currentsd[i]) {
  1552. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1553. __FILE__, __LINE__);
  1554. goto out;
  1555. }
  1556. ndev_allocated++;
  1557. }
  1558. if (unlikely(is_scsi_rev_5(h)))
  1559. raid_ctlr_position = 0;
  1560. else
  1561. raid_ctlr_position = nphysicals + nlogicals;
  1562. /* adjust our table of devices */
  1563. nmsa2xxx_enclosures = 0;
  1564. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1565. u8 *lunaddrbytes;
  1566. /* Figure out where the LUN ID info is coming from */
  1567. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1568. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1569. /* skip masked physical devices. */
  1570. if (lunaddrbytes[3] & 0xC0 &&
  1571. i < nphysicals + (raid_ctlr_position == 0))
  1572. continue;
  1573. /* Get device type, vendor, model, device id */
  1574. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1575. continue; /* skip it if we can't talk to it. */
  1576. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1577. tmpdevice);
  1578. this_device = currentsd[ncurrent];
  1579. /*
  1580. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1581. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1582. * is nonetheless an enclosure device there. We have to
  1583. * present that otherwise linux won't find anything if
  1584. * there is no lun 0.
  1585. */
  1586. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1587. lunaddrbytes, bus, target, lun, lunzerobits,
  1588. &nmsa2xxx_enclosures)) {
  1589. ncurrent++;
  1590. this_device = currentsd[ncurrent];
  1591. }
  1592. *this_device = *tmpdevice;
  1593. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1594. switch (this_device->devtype) {
  1595. case TYPE_ROM: {
  1596. /* We don't *really* support actual CD-ROM devices,
  1597. * just "One Button Disaster Recovery" tape drive
  1598. * which temporarily pretends to be a CD-ROM drive.
  1599. * So we check that the device is really an OBDR tape
  1600. * device by checking for "$DR-10" in bytes 43-48 of
  1601. * the inquiry data.
  1602. */
  1603. char obdr_sig[7];
  1604. #define OBDR_TAPE_SIG "$DR-10"
  1605. strncpy(obdr_sig, &inq_buff[43], 6);
  1606. obdr_sig[6] = '\0';
  1607. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1608. /* Not OBDR device, ignore it. */
  1609. break;
  1610. }
  1611. ncurrent++;
  1612. break;
  1613. case TYPE_DISK:
  1614. if (i < nphysicals)
  1615. break;
  1616. ncurrent++;
  1617. break;
  1618. case TYPE_TAPE:
  1619. case TYPE_MEDIUM_CHANGER:
  1620. ncurrent++;
  1621. break;
  1622. case TYPE_RAID:
  1623. /* Only present the Smartarray HBA as a RAID controller.
  1624. * If it's a RAID controller other than the HBA itself
  1625. * (an external RAID controller, MSA500 or similar)
  1626. * don't present it.
  1627. */
  1628. if (!is_hba_lunid(lunaddrbytes))
  1629. break;
  1630. ncurrent++;
  1631. break;
  1632. default:
  1633. break;
  1634. }
  1635. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1636. break;
  1637. }
  1638. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1639. out:
  1640. kfree(tmpdevice);
  1641. for (i = 0; i < ndev_allocated; i++)
  1642. kfree(currentsd[i]);
  1643. kfree(currentsd);
  1644. kfree(inq_buff);
  1645. kfree(physdev_list);
  1646. kfree(logdev_list);
  1647. }
  1648. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1649. * dma mapping and fills in the scatter gather entries of the
  1650. * hpsa command, cp.
  1651. */
  1652. static int hpsa_scatter_gather(struct ctlr_info *h,
  1653. struct CommandList *cp,
  1654. struct scsi_cmnd *cmd)
  1655. {
  1656. unsigned int len;
  1657. struct scatterlist *sg;
  1658. u64 addr64;
  1659. int use_sg, i, sg_index, chained;
  1660. struct SGDescriptor *curr_sg;
  1661. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1662. use_sg = scsi_dma_map(cmd);
  1663. if (use_sg < 0)
  1664. return use_sg;
  1665. if (!use_sg)
  1666. goto sglist_finished;
  1667. curr_sg = cp->SG;
  1668. chained = 0;
  1669. sg_index = 0;
  1670. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1671. if (i == h->max_cmd_sg_entries - 1 &&
  1672. use_sg > h->max_cmd_sg_entries) {
  1673. chained = 1;
  1674. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1675. sg_index = 0;
  1676. }
  1677. addr64 = (u64) sg_dma_address(sg);
  1678. len = sg_dma_len(sg);
  1679. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1680. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1681. curr_sg->Len = len;
  1682. curr_sg->Ext = 0; /* we are not chaining */
  1683. curr_sg++;
  1684. }
  1685. if (use_sg + chained > h->maxSG)
  1686. h->maxSG = use_sg + chained;
  1687. if (chained) {
  1688. cp->Header.SGList = h->max_cmd_sg_entries;
  1689. cp->Header.SGTotal = (u16) (use_sg + 1);
  1690. hpsa_map_sg_chain_block(h, cp);
  1691. return 0;
  1692. }
  1693. sglist_finished:
  1694. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1695. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1696. return 0;
  1697. }
  1698. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  1699. void (*done)(struct scsi_cmnd *))
  1700. {
  1701. struct ctlr_info *h;
  1702. struct hpsa_scsi_dev_t *dev;
  1703. unsigned char scsi3addr[8];
  1704. struct CommandList *c;
  1705. unsigned long flags;
  1706. /* Get the ptr to our adapter structure out of cmd->host. */
  1707. h = sdev_to_hba(cmd->device);
  1708. dev = cmd->device->hostdata;
  1709. if (!dev) {
  1710. cmd->result = DID_NO_CONNECT << 16;
  1711. done(cmd);
  1712. return 0;
  1713. }
  1714. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1715. /* Need a lock as this is being allocated from the pool */
  1716. spin_lock_irqsave(&h->lock, flags);
  1717. c = cmd_alloc(h);
  1718. spin_unlock_irqrestore(&h->lock, flags);
  1719. if (c == NULL) { /* trouble... */
  1720. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1721. return SCSI_MLQUEUE_HOST_BUSY;
  1722. }
  1723. /* Fill in the command list header */
  1724. cmd->scsi_done = done; /* save this for use by completion code */
  1725. /* save c in case we have to abort it */
  1726. cmd->host_scribble = (unsigned char *) c;
  1727. c->cmd_type = CMD_SCSI;
  1728. c->scsi_cmd = cmd;
  1729. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1730. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1731. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1732. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1733. /* Fill in the request block... */
  1734. c->Request.Timeout = 0;
  1735. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1736. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1737. c->Request.CDBLen = cmd->cmd_len;
  1738. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1739. c->Request.Type.Type = TYPE_CMD;
  1740. c->Request.Type.Attribute = ATTR_SIMPLE;
  1741. switch (cmd->sc_data_direction) {
  1742. case DMA_TO_DEVICE:
  1743. c->Request.Type.Direction = XFER_WRITE;
  1744. break;
  1745. case DMA_FROM_DEVICE:
  1746. c->Request.Type.Direction = XFER_READ;
  1747. break;
  1748. case DMA_NONE:
  1749. c->Request.Type.Direction = XFER_NONE;
  1750. break;
  1751. case DMA_BIDIRECTIONAL:
  1752. /* This can happen if a buggy application does a scsi passthru
  1753. * and sets both inlen and outlen to non-zero. ( see
  1754. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1755. */
  1756. c->Request.Type.Direction = XFER_RSVD;
  1757. /* This is technically wrong, and hpsa controllers should
  1758. * reject it with CMD_INVALID, which is the most correct
  1759. * response, but non-fibre backends appear to let it
  1760. * slide by, and give the same results as if this field
  1761. * were set correctly. Either way is acceptable for
  1762. * our purposes here.
  1763. */
  1764. break;
  1765. default:
  1766. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1767. cmd->sc_data_direction);
  1768. BUG();
  1769. break;
  1770. }
  1771. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1772. cmd_free(h, c);
  1773. return SCSI_MLQUEUE_HOST_BUSY;
  1774. }
  1775. enqueue_cmd_and_start_io(h, c);
  1776. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1777. return 0;
  1778. }
  1779. static void hpsa_scan_start(struct Scsi_Host *sh)
  1780. {
  1781. struct ctlr_info *h = shost_to_hba(sh);
  1782. unsigned long flags;
  1783. /* wait until any scan already in progress is finished. */
  1784. while (1) {
  1785. spin_lock_irqsave(&h->scan_lock, flags);
  1786. if (h->scan_finished)
  1787. break;
  1788. spin_unlock_irqrestore(&h->scan_lock, flags);
  1789. wait_event(h->scan_wait_queue, h->scan_finished);
  1790. /* Note: We don't need to worry about a race between this
  1791. * thread and driver unload because the midlayer will
  1792. * have incremented the reference count, so unload won't
  1793. * happen if we're in here.
  1794. */
  1795. }
  1796. h->scan_finished = 0; /* mark scan as in progress */
  1797. spin_unlock_irqrestore(&h->scan_lock, flags);
  1798. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1799. spin_lock_irqsave(&h->scan_lock, flags);
  1800. h->scan_finished = 1; /* mark scan as finished. */
  1801. wake_up_all(&h->scan_wait_queue);
  1802. spin_unlock_irqrestore(&h->scan_lock, flags);
  1803. }
  1804. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1805. unsigned long elapsed_time)
  1806. {
  1807. struct ctlr_info *h = shost_to_hba(sh);
  1808. unsigned long flags;
  1809. int finished;
  1810. spin_lock_irqsave(&h->scan_lock, flags);
  1811. finished = h->scan_finished;
  1812. spin_unlock_irqrestore(&h->scan_lock, flags);
  1813. return finished;
  1814. }
  1815. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1816. int qdepth, int reason)
  1817. {
  1818. struct ctlr_info *h = sdev_to_hba(sdev);
  1819. if (reason != SCSI_QDEPTH_DEFAULT)
  1820. return -ENOTSUPP;
  1821. if (qdepth < 1)
  1822. qdepth = 1;
  1823. else
  1824. if (qdepth > h->nr_cmds)
  1825. qdepth = h->nr_cmds;
  1826. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1827. return sdev->queue_depth;
  1828. }
  1829. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1830. {
  1831. /* we are being forcibly unloaded, and may not refuse. */
  1832. scsi_remove_host(h->scsi_host);
  1833. scsi_host_put(h->scsi_host);
  1834. h->scsi_host = NULL;
  1835. }
  1836. static int hpsa_register_scsi(struct ctlr_info *h)
  1837. {
  1838. int rc;
  1839. rc = hpsa_scsi_detect(h);
  1840. if (rc != 0)
  1841. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1842. " hpsa_scsi_detect(), rc is %d\n", rc);
  1843. return rc;
  1844. }
  1845. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1846. unsigned char lunaddr[])
  1847. {
  1848. int rc = 0;
  1849. int count = 0;
  1850. int waittime = 1; /* seconds */
  1851. struct CommandList *c;
  1852. c = cmd_special_alloc(h);
  1853. if (!c) {
  1854. dev_warn(&h->pdev->dev, "out of memory in "
  1855. "wait_for_device_to_become_ready.\n");
  1856. return IO_ERROR;
  1857. }
  1858. /* Send test unit ready until device ready, or give up. */
  1859. while (count < HPSA_TUR_RETRY_LIMIT) {
  1860. /* Wait for a bit. do this first, because if we send
  1861. * the TUR right away, the reset will just abort it.
  1862. */
  1863. msleep(1000 * waittime);
  1864. count++;
  1865. /* Increase wait time with each try, up to a point. */
  1866. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1867. waittime = waittime * 2;
  1868. /* Send the Test Unit Ready */
  1869. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1870. hpsa_scsi_do_simple_cmd_core(h, c);
  1871. /* no unmap needed here because no data xfer. */
  1872. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1873. break;
  1874. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1875. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1876. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1877. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1878. break;
  1879. dev_warn(&h->pdev->dev, "waiting %d secs "
  1880. "for device to become ready.\n", waittime);
  1881. rc = 1; /* device not ready. */
  1882. }
  1883. if (rc)
  1884. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1885. else
  1886. dev_warn(&h->pdev->dev, "device is ready.\n");
  1887. cmd_special_free(h, c);
  1888. return rc;
  1889. }
  1890. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1891. * complaining. Doing a host- or bus-reset can't do anything good here.
  1892. */
  1893. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1894. {
  1895. int rc;
  1896. struct ctlr_info *h;
  1897. struct hpsa_scsi_dev_t *dev;
  1898. /* find the controller to which the command to be aborted was sent */
  1899. h = sdev_to_hba(scsicmd->device);
  1900. if (h == NULL) /* paranoia */
  1901. return FAILED;
  1902. dev = scsicmd->device->hostdata;
  1903. if (!dev) {
  1904. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1905. "device lookup failed.\n");
  1906. return FAILED;
  1907. }
  1908. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1909. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1910. /* send a reset to the SCSI LUN which the command was sent to */
  1911. rc = hpsa_send_reset(h, dev->scsi3addr);
  1912. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1913. return SUCCESS;
  1914. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1915. return FAILED;
  1916. }
  1917. /*
  1918. * For operations that cannot sleep, a command block is allocated at init,
  1919. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1920. * which ones are free or in use. Lock must be held when calling this.
  1921. * cmd_free() is the complement.
  1922. */
  1923. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1924. {
  1925. struct CommandList *c;
  1926. int i;
  1927. union u64bit temp64;
  1928. dma_addr_t cmd_dma_handle, err_dma_handle;
  1929. do {
  1930. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1931. if (i == h->nr_cmds)
  1932. return NULL;
  1933. } while (test_and_set_bit
  1934. (i & (BITS_PER_LONG - 1),
  1935. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1936. c = h->cmd_pool + i;
  1937. memset(c, 0, sizeof(*c));
  1938. cmd_dma_handle = h->cmd_pool_dhandle
  1939. + i * sizeof(*c);
  1940. c->err_info = h->errinfo_pool + i;
  1941. memset(c->err_info, 0, sizeof(*c->err_info));
  1942. err_dma_handle = h->errinfo_pool_dhandle
  1943. + i * sizeof(*c->err_info);
  1944. h->nr_allocs++;
  1945. c->cmdindex = i;
  1946. INIT_HLIST_NODE(&c->list);
  1947. c->busaddr = (u32) cmd_dma_handle;
  1948. temp64.val = (u64) err_dma_handle;
  1949. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1950. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1951. c->ErrDesc.Len = sizeof(*c->err_info);
  1952. c->h = h;
  1953. return c;
  1954. }
  1955. /* For operations that can wait for kmalloc to possibly sleep,
  1956. * this routine can be called. Lock need not be held to call
  1957. * cmd_special_alloc. cmd_special_free() is the complement.
  1958. */
  1959. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1960. {
  1961. struct CommandList *c;
  1962. union u64bit temp64;
  1963. dma_addr_t cmd_dma_handle, err_dma_handle;
  1964. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1965. if (c == NULL)
  1966. return NULL;
  1967. memset(c, 0, sizeof(*c));
  1968. c->cmdindex = -1;
  1969. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1970. &err_dma_handle);
  1971. if (c->err_info == NULL) {
  1972. pci_free_consistent(h->pdev,
  1973. sizeof(*c), c, cmd_dma_handle);
  1974. return NULL;
  1975. }
  1976. memset(c->err_info, 0, sizeof(*c->err_info));
  1977. INIT_HLIST_NODE(&c->list);
  1978. c->busaddr = (u32) cmd_dma_handle;
  1979. temp64.val = (u64) err_dma_handle;
  1980. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1981. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1982. c->ErrDesc.Len = sizeof(*c->err_info);
  1983. c->h = h;
  1984. return c;
  1985. }
  1986. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  1987. {
  1988. int i;
  1989. i = c - h->cmd_pool;
  1990. clear_bit(i & (BITS_PER_LONG - 1),
  1991. h->cmd_pool_bits + (i / BITS_PER_LONG));
  1992. h->nr_frees++;
  1993. }
  1994. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  1995. {
  1996. union u64bit temp64;
  1997. temp64.val32.lower = c->ErrDesc.Addr.lower;
  1998. temp64.val32.upper = c->ErrDesc.Addr.upper;
  1999. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2000. c->err_info, (dma_addr_t) temp64.val);
  2001. pci_free_consistent(h->pdev, sizeof(*c),
  2002. c, (dma_addr_t) c->busaddr);
  2003. }
  2004. #ifdef CONFIG_COMPAT
  2005. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2006. {
  2007. IOCTL32_Command_struct __user *arg32 =
  2008. (IOCTL32_Command_struct __user *) arg;
  2009. IOCTL_Command_struct arg64;
  2010. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2011. int err;
  2012. u32 cp;
  2013. err = 0;
  2014. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2015. sizeof(arg64.LUN_info));
  2016. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2017. sizeof(arg64.Request));
  2018. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2019. sizeof(arg64.error_info));
  2020. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2021. err |= get_user(cp, &arg32->buf);
  2022. arg64.buf = compat_ptr(cp);
  2023. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2024. if (err)
  2025. return -EFAULT;
  2026. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2027. if (err)
  2028. return err;
  2029. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2030. sizeof(arg32->error_info));
  2031. if (err)
  2032. return -EFAULT;
  2033. return err;
  2034. }
  2035. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2036. int cmd, void *arg)
  2037. {
  2038. BIG_IOCTL32_Command_struct __user *arg32 =
  2039. (BIG_IOCTL32_Command_struct __user *) arg;
  2040. BIG_IOCTL_Command_struct arg64;
  2041. BIG_IOCTL_Command_struct __user *p =
  2042. compat_alloc_user_space(sizeof(arg64));
  2043. int err;
  2044. u32 cp;
  2045. err = 0;
  2046. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2047. sizeof(arg64.LUN_info));
  2048. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2049. sizeof(arg64.Request));
  2050. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2051. sizeof(arg64.error_info));
  2052. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2053. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2054. err |= get_user(cp, &arg32->buf);
  2055. arg64.buf = compat_ptr(cp);
  2056. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2057. if (err)
  2058. return -EFAULT;
  2059. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2060. if (err)
  2061. return err;
  2062. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2063. sizeof(arg32->error_info));
  2064. if (err)
  2065. return -EFAULT;
  2066. return err;
  2067. }
  2068. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2069. {
  2070. switch (cmd) {
  2071. case CCISS_GETPCIINFO:
  2072. case CCISS_GETINTINFO:
  2073. case CCISS_SETINTINFO:
  2074. case CCISS_GETNODENAME:
  2075. case CCISS_SETNODENAME:
  2076. case CCISS_GETHEARTBEAT:
  2077. case CCISS_GETBUSTYPES:
  2078. case CCISS_GETFIRMVER:
  2079. case CCISS_GETDRIVVER:
  2080. case CCISS_REVALIDVOLS:
  2081. case CCISS_DEREGDISK:
  2082. case CCISS_REGNEWDISK:
  2083. case CCISS_REGNEWD:
  2084. case CCISS_RESCANDISK:
  2085. case CCISS_GETLUNINFO:
  2086. return hpsa_ioctl(dev, cmd, arg);
  2087. case CCISS_PASSTHRU32:
  2088. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2089. case CCISS_BIG_PASSTHRU32:
  2090. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2091. default:
  2092. return -ENOIOCTLCMD;
  2093. }
  2094. }
  2095. #endif
  2096. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2097. {
  2098. struct hpsa_pci_info pciinfo;
  2099. if (!argp)
  2100. return -EINVAL;
  2101. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2102. pciinfo.bus = h->pdev->bus->number;
  2103. pciinfo.dev_fn = h->pdev->devfn;
  2104. pciinfo.board_id = h->board_id;
  2105. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2106. return -EFAULT;
  2107. return 0;
  2108. }
  2109. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2110. {
  2111. DriverVer_type DriverVer;
  2112. unsigned char vmaj, vmin, vsubmin;
  2113. int rc;
  2114. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2115. &vmaj, &vmin, &vsubmin);
  2116. if (rc != 3) {
  2117. dev_info(&h->pdev->dev, "driver version string '%s' "
  2118. "unrecognized.", HPSA_DRIVER_VERSION);
  2119. vmaj = 0;
  2120. vmin = 0;
  2121. vsubmin = 0;
  2122. }
  2123. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2124. if (!argp)
  2125. return -EINVAL;
  2126. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2127. return -EFAULT;
  2128. return 0;
  2129. }
  2130. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2131. {
  2132. IOCTL_Command_struct iocommand;
  2133. struct CommandList *c;
  2134. char *buff = NULL;
  2135. union u64bit temp64;
  2136. if (!argp)
  2137. return -EINVAL;
  2138. if (!capable(CAP_SYS_RAWIO))
  2139. return -EPERM;
  2140. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2141. return -EFAULT;
  2142. if ((iocommand.buf_size < 1) &&
  2143. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2144. return -EINVAL;
  2145. }
  2146. if (iocommand.buf_size > 0) {
  2147. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2148. if (buff == NULL)
  2149. return -EFAULT;
  2150. }
  2151. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2152. /* Copy the data into the buffer we created */
  2153. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2154. kfree(buff);
  2155. return -EFAULT;
  2156. }
  2157. } else
  2158. memset(buff, 0, iocommand.buf_size);
  2159. c = cmd_special_alloc(h);
  2160. if (c == NULL) {
  2161. kfree(buff);
  2162. return -ENOMEM;
  2163. }
  2164. /* Fill in the command type */
  2165. c->cmd_type = CMD_IOCTL_PEND;
  2166. /* Fill in Command Header */
  2167. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2168. if (iocommand.buf_size > 0) { /* buffer to fill */
  2169. c->Header.SGList = 1;
  2170. c->Header.SGTotal = 1;
  2171. } else { /* no buffers to fill */
  2172. c->Header.SGList = 0;
  2173. c->Header.SGTotal = 0;
  2174. }
  2175. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2176. /* use the kernel address the cmd block for tag */
  2177. c->Header.Tag.lower = c->busaddr;
  2178. /* Fill in Request block */
  2179. memcpy(&c->Request, &iocommand.Request,
  2180. sizeof(c->Request));
  2181. /* Fill in the scatter gather information */
  2182. if (iocommand.buf_size > 0) {
  2183. temp64.val = pci_map_single(h->pdev, buff,
  2184. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2185. c->SG[0].Addr.lower = temp64.val32.lower;
  2186. c->SG[0].Addr.upper = temp64.val32.upper;
  2187. c->SG[0].Len = iocommand.buf_size;
  2188. c->SG[0].Ext = 0; /* we are not chaining*/
  2189. }
  2190. hpsa_scsi_do_simple_cmd_core(h, c);
  2191. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2192. check_ioctl_unit_attention(h, c);
  2193. /* Copy the error information out */
  2194. memcpy(&iocommand.error_info, c->err_info,
  2195. sizeof(iocommand.error_info));
  2196. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2197. kfree(buff);
  2198. cmd_special_free(h, c);
  2199. return -EFAULT;
  2200. }
  2201. if (iocommand.Request.Type.Direction == XFER_READ) {
  2202. /* Copy the data out of the buffer we created */
  2203. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2204. kfree(buff);
  2205. cmd_special_free(h, c);
  2206. return -EFAULT;
  2207. }
  2208. }
  2209. kfree(buff);
  2210. cmd_special_free(h, c);
  2211. return 0;
  2212. }
  2213. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2214. {
  2215. BIG_IOCTL_Command_struct *ioc;
  2216. struct CommandList *c;
  2217. unsigned char **buff = NULL;
  2218. int *buff_size = NULL;
  2219. union u64bit temp64;
  2220. BYTE sg_used = 0;
  2221. int status = 0;
  2222. int i;
  2223. u32 left;
  2224. u32 sz;
  2225. BYTE __user *data_ptr;
  2226. if (!argp)
  2227. return -EINVAL;
  2228. if (!capable(CAP_SYS_RAWIO))
  2229. return -EPERM;
  2230. ioc = (BIG_IOCTL_Command_struct *)
  2231. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2232. if (!ioc) {
  2233. status = -ENOMEM;
  2234. goto cleanup1;
  2235. }
  2236. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2237. status = -EFAULT;
  2238. goto cleanup1;
  2239. }
  2240. if ((ioc->buf_size < 1) &&
  2241. (ioc->Request.Type.Direction != XFER_NONE)) {
  2242. status = -EINVAL;
  2243. goto cleanup1;
  2244. }
  2245. /* Check kmalloc limits using all SGs */
  2246. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2247. status = -EINVAL;
  2248. goto cleanup1;
  2249. }
  2250. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2251. status = -EINVAL;
  2252. goto cleanup1;
  2253. }
  2254. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2255. if (!buff) {
  2256. status = -ENOMEM;
  2257. goto cleanup1;
  2258. }
  2259. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2260. if (!buff_size) {
  2261. status = -ENOMEM;
  2262. goto cleanup1;
  2263. }
  2264. left = ioc->buf_size;
  2265. data_ptr = ioc->buf;
  2266. while (left) {
  2267. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2268. buff_size[sg_used] = sz;
  2269. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2270. if (buff[sg_used] == NULL) {
  2271. status = -ENOMEM;
  2272. goto cleanup1;
  2273. }
  2274. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2275. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2276. status = -ENOMEM;
  2277. goto cleanup1;
  2278. }
  2279. } else
  2280. memset(buff[sg_used], 0, sz);
  2281. left -= sz;
  2282. data_ptr += sz;
  2283. sg_used++;
  2284. }
  2285. c = cmd_special_alloc(h);
  2286. if (c == NULL) {
  2287. status = -ENOMEM;
  2288. goto cleanup1;
  2289. }
  2290. c->cmd_type = CMD_IOCTL_PEND;
  2291. c->Header.ReplyQueue = 0;
  2292. if (ioc->buf_size > 0) {
  2293. c->Header.SGList = sg_used;
  2294. c->Header.SGTotal = sg_used;
  2295. } else {
  2296. c->Header.SGList = 0;
  2297. c->Header.SGTotal = 0;
  2298. }
  2299. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2300. c->Header.Tag.lower = c->busaddr;
  2301. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2302. if (ioc->buf_size > 0) {
  2303. int i;
  2304. for (i = 0; i < sg_used; i++) {
  2305. temp64.val = pci_map_single(h->pdev, buff[i],
  2306. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2307. c->SG[i].Addr.lower = temp64.val32.lower;
  2308. c->SG[i].Addr.upper = temp64.val32.upper;
  2309. c->SG[i].Len = buff_size[i];
  2310. /* we are not chaining */
  2311. c->SG[i].Ext = 0;
  2312. }
  2313. }
  2314. hpsa_scsi_do_simple_cmd_core(h, c);
  2315. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2316. check_ioctl_unit_attention(h, c);
  2317. /* Copy the error information out */
  2318. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2319. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2320. cmd_special_free(h, c);
  2321. status = -EFAULT;
  2322. goto cleanup1;
  2323. }
  2324. if (ioc->Request.Type.Direction == XFER_READ) {
  2325. /* Copy the data out of the buffer we created */
  2326. BYTE __user *ptr = ioc->buf;
  2327. for (i = 0; i < sg_used; i++) {
  2328. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2329. cmd_special_free(h, c);
  2330. status = -EFAULT;
  2331. goto cleanup1;
  2332. }
  2333. ptr += buff_size[i];
  2334. }
  2335. }
  2336. cmd_special_free(h, c);
  2337. status = 0;
  2338. cleanup1:
  2339. if (buff) {
  2340. for (i = 0; i < sg_used; i++)
  2341. kfree(buff[i]);
  2342. kfree(buff);
  2343. }
  2344. kfree(buff_size);
  2345. kfree(ioc);
  2346. return status;
  2347. }
  2348. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2349. struct CommandList *c)
  2350. {
  2351. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2352. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2353. (void) check_for_unit_attention(h, c);
  2354. }
  2355. /*
  2356. * ioctl
  2357. */
  2358. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2359. {
  2360. struct ctlr_info *h;
  2361. void __user *argp = (void __user *)arg;
  2362. h = sdev_to_hba(dev);
  2363. switch (cmd) {
  2364. case CCISS_DEREGDISK:
  2365. case CCISS_REGNEWDISK:
  2366. case CCISS_REGNEWD:
  2367. hpsa_scan_start(h->scsi_host);
  2368. return 0;
  2369. case CCISS_GETPCIINFO:
  2370. return hpsa_getpciinfo_ioctl(h, argp);
  2371. case CCISS_GETDRIVVER:
  2372. return hpsa_getdrivver_ioctl(h, argp);
  2373. case CCISS_PASSTHRU:
  2374. return hpsa_passthru_ioctl(h, argp);
  2375. case CCISS_BIG_PASSTHRU:
  2376. return hpsa_big_passthru_ioctl(h, argp);
  2377. default:
  2378. return -ENOTTY;
  2379. }
  2380. }
  2381. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2382. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2383. int cmd_type)
  2384. {
  2385. int pci_dir = XFER_NONE;
  2386. c->cmd_type = CMD_IOCTL_PEND;
  2387. c->Header.ReplyQueue = 0;
  2388. if (buff != NULL && size > 0) {
  2389. c->Header.SGList = 1;
  2390. c->Header.SGTotal = 1;
  2391. } else {
  2392. c->Header.SGList = 0;
  2393. c->Header.SGTotal = 0;
  2394. }
  2395. c->Header.Tag.lower = c->busaddr;
  2396. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2397. c->Request.Type.Type = cmd_type;
  2398. if (cmd_type == TYPE_CMD) {
  2399. switch (cmd) {
  2400. case HPSA_INQUIRY:
  2401. /* are we trying to read a vital product page */
  2402. if (page_code != 0) {
  2403. c->Request.CDB[1] = 0x01;
  2404. c->Request.CDB[2] = page_code;
  2405. }
  2406. c->Request.CDBLen = 6;
  2407. c->Request.Type.Attribute = ATTR_SIMPLE;
  2408. c->Request.Type.Direction = XFER_READ;
  2409. c->Request.Timeout = 0;
  2410. c->Request.CDB[0] = HPSA_INQUIRY;
  2411. c->Request.CDB[4] = size & 0xFF;
  2412. break;
  2413. case HPSA_REPORT_LOG:
  2414. case HPSA_REPORT_PHYS:
  2415. /* Talking to controller so It's a physical command
  2416. mode = 00 target = 0. Nothing to write.
  2417. */
  2418. c->Request.CDBLen = 12;
  2419. c->Request.Type.Attribute = ATTR_SIMPLE;
  2420. c->Request.Type.Direction = XFER_READ;
  2421. c->Request.Timeout = 0;
  2422. c->Request.CDB[0] = cmd;
  2423. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2424. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2425. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2426. c->Request.CDB[9] = size & 0xFF;
  2427. break;
  2428. case HPSA_READ_CAPACITY:
  2429. c->Request.CDBLen = 10;
  2430. c->Request.Type.Attribute = ATTR_SIMPLE;
  2431. c->Request.Type.Direction = XFER_READ;
  2432. c->Request.Timeout = 0;
  2433. c->Request.CDB[0] = cmd;
  2434. break;
  2435. case HPSA_CACHE_FLUSH:
  2436. c->Request.CDBLen = 12;
  2437. c->Request.Type.Attribute = ATTR_SIMPLE;
  2438. c->Request.Type.Direction = XFER_WRITE;
  2439. c->Request.Timeout = 0;
  2440. c->Request.CDB[0] = BMIC_WRITE;
  2441. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2442. break;
  2443. case TEST_UNIT_READY:
  2444. c->Request.CDBLen = 6;
  2445. c->Request.Type.Attribute = ATTR_SIMPLE;
  2446. c->Request.Type.Direction = XFER_NONE;
  2447. c->Request.Timeout = 0;
  2448. break;
  2449. default:
  2450. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2451. BUG();
  2452. return;
  2453. }
  2454. } else if (cmd_type == TYPE_MSG) {
  2455. switch (cmd) {
  2456. case HPSA_DEVICE_RESET_MSG:
  2457. c->Request.CDBLen = 16;
  2458. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2459. c->Request.Type.Attribute = ATTR_SIMPLE;
  2460. c->Request.Type.Direction = XFER_NONE;
  2461. c->Request.Timeout = 0; /* Don't time out */
  2462. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2463. c->Request.CDB[1] = 0x03; /* Reset target above */
  2464. /* If bytes 4-7 are zero, it means reset the */
  2465. /* LunID device */
  2466. c->Request.CDB[4] = 0x00;
  2467. c->Request.CDB[5] = 0x00;
  2468. c->Request.CDB[6] = 0x00;
  2469. c->Request.CDB[7] = 0x00;
  2470. break;
  2471. default:
  2472. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2473. cmd);
  2474. BUG();
  2475. }
  2476. } else {
  2477. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2478. BUG();
  2479. }
  2480. switch (c->Request.Type.Direction) {
  2481. case XFER_READ:
  2482. pci_dir = PCI_DMA_FROMDEVICE;
  2483. break;
  2484. case XFER_WRITE:
  2485. pci_dir = PCI_DMA_TODEVICE;
  2486. break;
  2487. case XFER_NONE:
  2488. pci_dir = PCI_DMA_NONE;
  2489. break;
  2490. default:
  2491. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2492. }
  2493. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2494. return;
  2495. }
  2496. /*
  2497. * Map (physical) PCI mem into (virtual) kernel space
  2498. */
  2499. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2500. {
  2501. ulong page_base = ((ulong) base) & PAGE_MASK;
  2502. ulong page_offs = ((ulong) base) - page_base;
  2503. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2504. return page_remapped ? (page_remapped + page_offs) : NULL;
  2505. }
  2506. /* Takes cmds off the submission queue and sends them to the hardware,
  2507. * then puts them on the queue of cmds waiting for completion.
  2508. */
  2509. static void start_io(struct ctlr_info *h)
  2510. {
  2511. struct CommandList *c;
  2512. while (!hlist_empty(&h->reqQ)) {
  2513. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2514. /* can't do anything if fifo is full */
  2515. if ((h->access.fifo_full(h))) {
  2516. dev_warn(&h->pdev->dev, "fifo full\n");
  2517. break;
  2518. }
  2519. /* Get the first entry from the Request Q */
  2520. removeQ(c);
  2521. h->Qdepth--;
  2522. /* Tell the controller execute command */
  2523. h->access.submit_command(h, c);
  2524. /* Put job onto the completed Q */
  2525. addQ(&h->cmpQ, c);
  2526. }
  2527. }
  2528. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2529. {
  2530. return h->access.command_completed(h);
  2531. }
  2532. static inline bool interrupt_pending(struct ctlr_info *h)
  2533. {
  2534. return h->access.intr_pending(h);
  2535. }
  2536. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2537. {
  2538. return !(h->msi_vector || h->msix_vector) &&
  2539. ((h->access.intr_pending(h) == 0) ||
  2540. (h->interrupts_enabled == 0));
  2541. }
  2542. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2543. u32 raw_tag)
  2544. {
  2545. if (unlikely(tag_index >= h->nr_cmds)) {
  2546. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2547. return 1;
  2548. }
  2549. return 0;
  2550. }
  2551. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2552. {
  2553. removeQ(c);
  2554. if (likely(c->cmd_type == CMD_SCSI))
  2555. complete_scsi_command(c, 0, raw_tag);
  2556. else if (c->cmd_type == CMD_IOCTL_PEND)
  2557. complete(c->waiting);
  2558. }
  2559. static inline u32 hpsa_tag_contains_index(u32 tag)
  2560. {
  2561. #define DIRECT_LOOKUP_BIT 0x10
  2562. return tag & DIRECT_LOOKUP_BIT;
  2563. }
  2564. static inline u32 hpsa_tag_to_index(u32 tag)
  2565. {
  2566. #define DIRECT_LOOKUP_SHIFT 5
  2567. return tag >> DIRECT_LOOKUP_SHIFT;
  2568. }
  2569. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2570. {
  2571. #define HPSA_ERROR_BITS 0x03
  2572. return tag & ~HPSA_ERROR_BITS;
  2573. }
  2574. /* process completion of an indexed ("direct lookup") command */
  2575. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2576. u32 raw_tag)
  2577. {
  2578. u32 tag_index;
  2579. struct CommandList *c;
  2580. tag_index = hpsa_tag_to_index(raw_tag);
  2581. if (bad_tag(h, tag_index, raw_tag))
  2582. return next_command(h);
  2583. c = h->cmd_pool + tag_index;
  2584. finish_cmd(c, raw_tag);
  2585. return next_command(h);
  2586. }
  2587. /* process completion of a non-indexed command */
  2588. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2589. u32 raw_tag)
  2590. {
  2591. u32 tag;
  2592. struct CommandList *c = NULL;
  2593. struct hlist_node *tmp;
  2594. tag = hpsa_tag_discard_error_bits(raw_tag);
  2595. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2596. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2597. finish_cmd(c, raw_tag);
  2598. return next_command(h);
  2599. }
  2600. }
  2601. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2602. return next_command(h);
  2603. }
  2604. static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
  2605. {
  2606. struct ctlr_info *h = dev_id;
  2607. unsigned long flags;
  2608. u32 raw_tag;
  2609. if (interrupt_not_for_us(h))
  2610. return IRQ_NONE;
  2611. spin_lock_irqsave(&h->lock, flags);
  2612. raw_tag = get_next_completion(h);
  2613. while (raw_tag != FIFO_EMPTY) {
  2614. if (hpsa_tag_contains_index(raw_tag))
  2615. raw_tag = process_indexed_cmd(h, raw_tag);
  2616. else
  2617. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2618. }
  2619. spin_unlock_irqrestore(&h->lock, flags);
  2620. return IRQ_HANDLED;
  2621. }
  2622. /* Send a message CDB to the firmware. */
  2623. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2624. unsigned char type)
  2625. {
  2626. struct Command {
  2627. struct CommandListHeader CommandHeader;
  2628. struct RequestBlock Request;
  2629. struct ErrDescriptor ErrorDescriptor;
  2630. };
  2631. struct Command *cmd;
  2632. static const size_t cmd_sz = sizeof(*cmd) +
  2633. sizeof(cmd->ErrorDescriptor);
  2634. dma_addr_t paddr64;
  2635. uint32_t paddr32, tag;
  2636. void __iomem *vaddr;
  2637. int i, err;
  2638. vaddr = pci_ioremap_bar(pdev, 0);
  2639. if (vaddr == NULL)
  2640. return -ENOMEM;
  2641. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2642. * CCISS commands, so they must be allocated from the lower 4GiB of
  2643. * memory.
  2644. */
  2645. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2646. if (err) {
  2647. iounmap(vaddr);
  2648. return -ENOMEM;
  2649. }
  2650. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2651. if (cmd == NULL) {
  2652. iounmap(vaddr);
  2653. return -ENOMEM;
  2654. }
  2655. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2656. * although there's no guarantee, we assume that the address is at
  2657. * least 4-byte aligned (most likely, it's page-aligned).
  2658. */
  2659. paddr32 = paddr64;
  2660. cmd->CommandHeader.ReplyQueue = 0;
  2661. cmd->CommandHeader.SGList = 0;
  2662. cmd->CommandHeader.SGTotal = 0;
  2663. cmd->CommandHeader.Tag.lower = paddr32;
  2664. cmd->CommandHeader.Tag.upper = 0;
  2665. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2666. cmd->Request.CDBLen = 16;
  2667. cmd->Request.Type.Type = TYPE_MSG;
  2668. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2669. cmd->Request.Type.Direction = XFER_NONE;
  2670. cmd->Request.Timeout = 0; /* Don't time out */
  2671. cmd->Request.CDB[0] = opcode;
  2672. cmd->Request.CDB[1] = type;
  2673. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2674. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2675. cmd->ErrorDescriptor.Addr.upper = 0;
  2676. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2677. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2678. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2679. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2680. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2681. break;
  2682. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2683. }
  2684. iounmap(vaddr);
  2685. /* we leak the DMA buffer here ... no choice since the controller could
  2686. * still complete the command.
  2687. */
  2688. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2689. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2690. opcode, type);
  2691. return -ETIMEDOUT;
  2692. }
  2693. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2694. if (tag & HPSA_ERROR_BIT) {
  2695. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2696. opcode, type);
  2697. return -EIO;
  2698. }
  2699. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2700. opcode, type);
  2701. return 0;
  2702. }
  2703. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2704. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2705. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2706. {
  2707. /* the #defines are stolen from drivers/pci/msi.h. */
  2708. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2709. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2710. int pos;
  2711. u16 control = 0;
  2712. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2713. if (pos) {
  2714. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2715. if (control & PCI_MSI_FLAGS_ENABLE) {
  2716. dev_info(&pdev->dev, "resetting MSI\n");
  2717. pci_write_config_word(pdev, msi_control_reg(pos),
  2718. control & ~PCI_MSI_FLAGS_ENABLE);
  2719. }
  2720. }
  2721. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2722. if (pos) {
  2723. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2724. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2725. dev_info(&pdev->dev, "resetting MSI-X\n");
  2726. pci_write_config_word(pdev, msi_control_reg(pos),
  2727. control & ~PCI_MSIX_FLAGS_ENABLE);
  2728. }
  2729. }
  2730. return 0;
  2731. }
  2732. /* This does a hard reset of the controller using PCI power management
  2733. * states.
  2734. */
  2735. static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
  2736. {
  2737. u16 pmcsr, saved_config_space[32];
  2738. int i, pos;
  2739. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2740. /* This is very nearly the same thing as
  2741. *
  2742. * pci_save_state(pci_dev);
  2743. * pci_set_power_state(pci_dev, PCI_D3hot);
  2744. * pci_set_power_state(pci_dev, PCI_D0);
  2745. * pci_restore_state(pci_dev);
  2746. *
  2747. * but we can't use these nice canned kernel routines on
  2748. * kexec, because they also check the MSI/MSI-X state in PCI
  2749. * configuration space and do the wrong thing when it is
  2750. * set/cleared. Also, the pci_save/restore_state functions
  2751. * violate the ordering requirements for restoring the
  2752. * configuration space from the CCISS document (see the
  2753. * comment below). So we roll our own ....
  2754. */
  2755. for (i = 0; i < 32; i++)
  2756. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2757. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2758. if (pos == 0) {
  2759. dev_err(&pdev->dev,
  2760. "hpsa_reset_controller: PCI PM not supported\n");
  2761. return -ENODEV;
  2762. }
  2763. /* Quoting from the Open CISS Specification: "The Power
  2764. * Management Control/Status Register (CSR) controls the power
  2765. * state of the device. The normal operating state is D0,
  2766. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2767. * the controller, place the interface device in D3 then to
  2768. * D0, this causes a secondary PCI reset which will reset the
  2769. * controller."
  2770. */
  2771. /* enter the D3hot power management state */
  2772. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2773. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2774. pmcsr |= PCI_D3hot;
  2775. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2776. msleep(500);
  2777. /* enter the D0 power management state */
  2778. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2779. pmcsr |= PCI_D0;
  2780. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2781. msleep(500);
  2782. /* Restore the PCI configuration space. The Open CISS
  2783. * Specification says, "Restore the PCI Configuration
  2784. * Registers, offsets 00h through 60h. It is important to
  2785. * restore the command register, 16-bits at offset 04h,
  2786. * last. Do not restore the configuration status register,
  2787. * 16-bits at offset 06h." Note that the offset is 2*i.
  2788. */
  2789. for (i = 0; i < 32; i++) {
  2790. if (i == 2 || i == 3)
  2791. continue;
  2792. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2793. }
  2794. wmb();
  2795. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2796. return 0;
  2797. }
  2798. /*
  2799. * We cannot read the structure directly, for portability we must use
  2800. * the io functions.
  2801. * This is for debug only.
  2802. */
  2803. #ifdef HPSA_DEBUG
  2804. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2805. {
  2806. int i;
  2807. char temp_name[17];
  2808. dev_info(dev, "Controller Configuration information\n");
  2809. dev_info(dev, "------------------------------------\n");
  2810. for (i = 0; i < 4; i++)
  2811. temp_name[i] = readb(&(tb->Signature[i]));
  2812. temp_name[4] = '\0';
  2813. dev_info(dev, " Signature = %s\n", temp_name);
  2814. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2815. dev_info(dev, " Transport methods supported = 0x%x\n",
  2816. readl(&(tb->TransportSupport)));
  2817. dev_info(dev, " Transport methods active = 0x%x\n",
  2818. readl(&(tb->TransportActive)));
  2819. dev_info(dev, " Requested transport Method = 0x%x\n",
  2820. readl(&(tb->HostWrite.TransportRequest)));
  2821. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2822. readl(&(tb->HostWrite.CoalIntDelay)));
  2823. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2824. readl(&(tb->HostWrite.CoalIntCount)));
  2825. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2826. readl(&(tb->CmdsOutMax)));
  2827. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2828. for (i = 0; i < 16; i++)
  2829. temp_name[i] = readb(&(tb->ServerName[i]));
  2830. temp_name[16] = '\0';
  2831. dev_info(dev, " Server Name = %s\n", temp_name);
  2832. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2833. readl(&(tb->HeartBeat)));
  2834. }
  2835. #endif /* HPSA_DEBUG */
  2836. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2837. {
  2838. int i, offset, mem_type, bar_type;
  2839. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2840. return 0;
  2841. offset = 0;
  2842. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2843. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2844. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2845. offset += 4;
  2846. else {
  2847. mem_type = pci_resource_flags(pdev, i) &
  2848. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2849. switch (mem_type) {
  2850. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2851. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2852. offset += 4; /* 32 bit */
  2853. break;
  2854. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2855. offset += 8;
  2856. break;
  2857. default: /* reserved in PCI 2.2 */
  2858. dev_warn(&pdev->dev,
  2859. "base address is invalid\n");
  2860. return -1;
  2861. break;
  2862. }
  2863. }
  2864. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2865. return i + 1;
  2866. }
  2867. return -1;
  2868. }
  2869. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2870. * controllers that are capable. If not, we use IO-APIC mode.
  2871. */
  2872. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h,
  2873. struct pci_dev *pdev, u32 board_id)
  2874. {
  2875. #ifdef CONFIG_PCI_MSI
  2876. int err;
  2877. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2878. {0, 2}, {0, 3}
  2879. };
  2880. /* Some boards advertise MSI but don't really support it */
  2881. if ((board_id == 0x40700E11) ||
  2882. (board_id == 0x40800E11) ||
  2883. (board_id == 0x40820E11) || (board_id == 0x40830E11))
  2884. goto default_int_mode;
  2885. if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
  2886. dev_info(&pdev->dev, "MSIX\n");
  2887. err = pci_enable_msix(pdev, hpsa_msix_entries, 4);
  2888. if (!err) {
  2889. h->intr[0] = hpsa_msix_entries[0].vector;
  2890. h->intr[1] = hpsa_msix_entries[1].vector;
  2891. h->intr[2] = hpsa_msix_entries[2].vector;
  2892. h->intr[3] = hpsa_msix_entries[3].vector;
  2893. h->msix_vector = 1;
  2894. return;
  2895. }
  2896. if (err > 0) {
  2897. dev_warn(&pdev->dev, "only %d MSI-X vectors "
  2898. "available\n", err);
  2899. goto default_int_mode;
  2900. } else {
  2901. dev_warn(&pdev->dev, "MSI-X init failed %d\n",
  2902. err);
  2903. goto default_int_mode;
  2904. }
  2905. }
  2906. if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
  2907. dev_info(&pdev->dev, "MSI\n");
  2908. if (!pci_enable_msi(pdev))
  2909. h->msi_vector = 1;
  2910. else
  2911. dev_warn(&pdev->dev, "MSI init failed\n");
  2912. }
  2913. default_int_mode:
  2914. #endif /* CONFIG_PCI_MSI */
  2915. /* if we get here we're going to use the default interrupt mode */
  2916. h->intr[PERF_MODE_INT] = pdev->irq;
  2917. }
  2918. static int __devinit hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
  2919. {
  2920. ushort subsystem_vendor_id, subsystem_device_id, command;
  2921. u32 board_id, scratchpad = 0;
  2922. u64 cfg_offset;
  2923. u32 cfg_base_addr;
  2924. u64 cfg_base_addr_index;
  2925. u32 trans_offset;
  2926. int i, prod_index, err;
  2927. subsystem_vendor_id = pdev->subsystem_vendor;
  2928. subsystem_device_id = pdev->subsystem_device;
  2929. board_id = (((u32) (subsystem_device_id << 16) & 0xffff0000) |
  2930. subsystem_vendor_id);
  2931. for (i = 0; i < ARRAY_SIZE(products); i++)
  2932. if (board_id == products[i].board_id)
  2933. break;
  2934. prod_index = i;
  2935. if (prod_index == ARRAY_SIZE(products)) {
  2936. prod_index--;
  2937. if (subsystem_vendor_id != PCI_VENDOR_ID_HP ||
  2938. !hpsa_allow_any) {
  2939. dev_warn(&pdev->dev, "unrecognized board ID:"
  2940. " 0x%08lx, ignoring.\n",
  2941. (unsigned long) board_id);
  2942. return -ENODEV;
  2943. }
  2944. }
  2945. /* check to see if controller has been disabled
  2946. * BEFORE trying to enable it
  2947. */
  2948. (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
  2949. if (!(command & 0x02)) {
  2950. dev_warn(&pdev->dev, "controller appears to be disabled\n");
  2951. return -ENODEV;
  2952. }
  2953. err = pci_enable_device(pdev);
  2954. if (err) {
  2955. dev_warn(&pdev->dev, "unable to enable PCI device\n");
  2956. return err;
  2957. }
  2958. err = pci_request_regions(pdev, "hpsa");
  2959. if (err) {
  2960. dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
  2961. return err;
  2962. }
  2963. /* If the kernel supports MSI/MSI-X we will try to enable that,
  2964. * else we use the IO-APIC interrupt assigned to us by system ROM.
  2965. */
  2966. hpsa_interrupt_mode(h, pdev, board_id);
  2967. /* find the memory BAR */
  2968. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2969. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
  2970. break;
  2971. }
  2972. if (i == DEVICE_COUNT_RESOURCE) {
  2973. dev_warn(&pdev->dev, "no memory BAR found\n");
  2974. err = -ENODEV;
  2975. goto err_out_free_res;
  2976. }
  2977. h->paddr = pci_resource_start(pdev, i); /* addressing mode bits
  2978. * already removed
  2979. */
  2980. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  2981. /* Wait for the board to become ready. */
  2982. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  2983. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  2984. if (scratchpad == HPSA_FIRMWARE_READY)
  2985. break;
  2986. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  2987. }
  2988. if (scratchpad != HPSA_FIRMWARE_READY) {
  2989. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  2990. err = -ENODEV;
  2991. goto err_out_free_res;
  2992. }
  2993. /* get the address index number */
  2994. cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
  2995. cfg_base_addr &= (u32) 0x0000ffff;
  2996. cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
  2997. if (cfg_base_addr_index == -1) {
  2998. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  2999. err = -ENODEV;
  3000. goto err_out_free_res;
  3001. }
  3002. cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
  3003. h->cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3004. cfg_base_addr_index) + cfg_offset,
  3005. sizeof(h->cfgtable));
  3006. /* Find performant mode table. */
  3007. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3008. h->transtable = remap_pci_mem(pci_resource_start(pdev,
  3009. cfg_base_addr_index)+cfg_offset+trans_offset,
  3010. sizeof(*h->transtable));
  3011. h->board_id = board_id;
  3012. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3013. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3014. /*
  3015. * Limit in-command s/g elements to 32 save dma'able memory.
  3016. * Howvever spec says if 0, use 31
  3017. */
  3018. h->max_cmd_sg_entries = 31;
  3019. if (h->maxsgentries > 512) {
  3020. h->max_cmd_sg_entries = 32;
  3021. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3022. h->maxsgentries--; /* save one for chain pointer */
  3023. } else {
  3024. h->maxsgentries = 31; /* default to traditional values */
  3025. h->chainsize = 0;
  3026. }
  3027. h->product_name = products[prod_index].product_name;
  3028. h->access = *(products[prod_index].access);
  3029. /* Allow room for some ioctls */
  3030. h->nr_cmds = h->max_commands - 4;
  3031. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3032. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3033. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3034. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3035. dev_warn(&pdev->dev, "not a valid CISS config table\n");
  3036. err = -ENODEV;
  3037. goto err_out_free_res;
  3038. }
  3039. #ifdef CONFIG_X86
  3040. {
  3041. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3042. u32 prefetch;
  3043. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3044. prefetch |= 0x100;
  3045. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3046. }
  3047. #endif
  3048. /* Disabling DMA prefetch for the P600
  3049. * An ASIC bug may result in a prefetch beyond
  3050. * physical memory.
  3051. */
  3052. if (board_id == 0x3225103C) {
  3053. u32 dma_prefetch;
  3054. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3055. dma_prefetch |= 0x8000;
  3056. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3057. }
  3058. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3059. /* Update the field, and then ring the doorbell */
  3060. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3061. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3062. /* under certain very rare conditions, this can take awhile.
  3063. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3064. * as we enter this code.)
  3065. */
  3066. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3067. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3068. break;
  3069. /* delay and try again */
  3070. msleep(10);
  3071. }
  3072. #ifdef HPSA_DEBUG
  3073. print_cfg_table(&pdev->dev, h->cfgtable);
  3074. #endif /* HPSA_DEBUG */
  3075. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3076. dev_warn(&pdev->dev, "unable to get board into simple mode\n");
  3077. err = -ENODEV;
  3078. goto err_out_free_res;
  3079. }
  3080. return 0;
  3081. err_out_free_res:
  3082. /*
  3083. * Deliberately omit pci_disable_device(): it does something nasty to
  3084. * Smart Array controllers that pci_enable_device does not undo
  3085. */
  3086. pci_release_regions(pdev);
  3087. return err;
  3088. }
  3089. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3090. {
  3091. int rc;
  3092. #define HBA_INQUIRY_BYTE_COUNT 64
  3093. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3094. if (!h->hba_inquiry_data)
  3095. return;
  3096. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3097. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3098. if (rc != 0) {
  3099. kfree(h->hba_inquiry_data);
  3100. h->hba_inquiry_data = NULL;
  3101. }
  3102. }
  3103. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3104. const struct pci_device_id *ent)
  3105. {
  3106. int i, rc;
  3107. int dac;
  3108. struct ctlr_info *h;
  3109. if (number_of_controllers == 0)
  3110. printk(KERN_INFO DRIVER_NAME "\n");
  3111. if (reset_devices) {
  3112. /* Reset the controller with a PCI power-cycle */
  3113. if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
  3114. return -ENODEV;
  3115. /* Some devices (notably the HP Smart Array 5i Controller)
  3116. need a little pause here */
  3117. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3118. /* Now try to get the controller to respond to a no-op */
  3119. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3120. if (hpsa_noop(pdev) == 0)
  3121. break;
  3122. else
  3123. dev_warn(&pdev->dev, "no-op failed%s\n",
  3124. (i < 11 ? "; re-trying" : ""));
  3125. }
  3126. }
  3127. /* Command structures must be aligned on a 32-byte boundary because
  3128. * the 5 lower bits of the address are used by the hardware. and by
  3129. * the driver. See comments in hpsa.h for more info.
  3130. */
  3131. #define COMMANDLIST_ALIGNMENT 32
  3132. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3133. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3134. if (!h)
  3135. return -ENOMEM;
  3136. h->busy_initializing = 1;
  3137. INIT_HLIST_HEAD(&h->cmpQ);
  3138. INIT_HLIST_HEAD(&h->reqQ);
  3139. rc = hpsa_pci_init(h, pdev);
  3140. if (rc != 0)
  3141. goto clean1;
  3142. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3143. h->ctlr = number_of_controllers;
  3144. number_of_controllers++;
  3145. h->pdev = pdev;
  3146. /* configure PCI DMA stuff */
  3147. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3148. if (rc == 0) {
  3149. dac = 1;
  3150. } else {
  3151. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3152. if (rc == 0) {
  3153. dac = 0;
  3154. } else {
  3155. dev_err(&pdev->dev, "no suitable DMA available\n");
  3156. goto clean1;
  3157. }
  3158. }
  3159. /* make sure the board interrupts are off */
  3160. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3161. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr,
  3162. IRQF_DISABLED, h->devname, h);
  3163. if (rc) {
  3164. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3165. h->intr[PERF_MODE_INT], h->devname);
  3166. goto clean2;
  3167. }
  3168. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3169. h->devname, pdev->device,
  3170. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3171. h->cmd_pool_bits =
  3172. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3173. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3174. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3175. h->nr_cmds * sizeof(*h->cmd_pool),
  3176. &(h->cmd_pool_dhandle));
  3177. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3178. h->nr_cmds * sizeof(*h->errinfo_pool),
  3179. &(h->errinfo_pool_dhandle));
  3180. if ((h->cmd_pool_bits == NULL)
  3181. || (h->cmd_pool == NULL)
  3182. || (h->errinfo_pool == NULL)) {
  3183. dev_err(&pdev->dev, "out of memory");
  3184. rc = -ENOMEM;
  3185. goto clean4;
  3186. }
  3187. if (hpsa_allocate_sg_chain_blocks(h))
  3188. goto clean4;
  3189. spin_lock_init(&h->lock);
  3190. spin_lock_init(&h->scan_lock);
  3191. init_waitqueue_head(&h->scan_wait_queue);
  3192. h->scan_finished = 1; /* no scan currently in progress */
  3193. pci_set_drvdata(pdev, h);
  3194. memset(h->cmd_pool_bits, 0,
  3195. ((h->nr_cmds + BITS_PER_LONG -
  3196. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3197. hpsa_scsi_setup(h);
  3198. /* Turn the interrupts on so we can service requests */
  3199. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3200. hpsa_put_ctlr_into_performant_mode(h);
  3201. hpsa_hba_inquiry(h);
  3202. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3203. h->busy_initializing = 0;
  3204. return 1;
  3205. clean4:
  3206. hpsa_free_sg_chain_blocks(h);
  3207. kfree(h->cmd_pool_bits);
  3208. if (h->cmd_pool)
  3209. pci_free_consistent(h->pdev,
  3210. h->nr_cmds * sizeof(struct CommandList),
  3211. h->cmd_pool, h->cmd_pool_dhandle);
  3212. if (h->errinfo_pool)
  3213. pci_free_consistent(h->pdev,
  3214. h->nr_cmds * sizeof(struct ErrorInfo),
  3215. h->errinfo_pool,
  3216. h->errinfo_pool_dhandle);
  3217. free_irq(h->intr[PERF_MODE_INT], h);
  3218. clean2:
  3219. clean1:
  3220. h->busy_initializing = 0;
  3221. kfree(h);
  3222. return rc;
  3223. }
  3224. static void hpsa_flush_cache(struct ctlr_info *h)
  3225. {
  3226. char *flush_buf;
  3227. struct CommandList *c;
  3228. flush_buf = kzalloc(4, GFP_KERNEL);
  3229. if (!flush_buf)
  3230. return;
  3231. c = cmd_special_alloc(h);
  3232. if (!c) {
  3233. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3234. goto out_of_memory;
  3235. }
  3236. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3237. RAID_CTLR_LUNID, TYPE_CMD);
  3238. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3239. if (c->err_info->CommandStatus != 0)
  3240. dev_warn(&h->pdev->dev,
  3241. "error flushing cache on controller\n");
  3242. cmd_special_free(h, c);
  3243. out_of_memory:
  3244. kfree(flush_buf);
  3245. }
  3246. static void hpsa_shutdown(struct pci_dev *pdev)
  3247. {
  3248. struct ctlr_info *h;
  3249. h = pci_get_drvdata(pdev);
  3250. /* Turn board interrupts off and send the flush cache command
  3251. * sendcmd will turn off interrupt, and send the flush...
  3252. * To write all data in the battery backed cache to disks
  3253. */
  3254. hpsa_flush_cache(h);
  3255. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3256. free_irq(h->intr[PERF_MODE_INT], h);
  3257. #ifdef CONFIG_PCI_MSI
  3258. if (h->msix_vector)
  3259. pci_disable_msix(h->pdev);
  3260. else if (h->msi_vector)
  3261. pci_disable_msi(h->pdev);
  3262. #endif /* CONFIG_PCI_MSI */
  3263. }
  3264. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3265. {
  3266. struct ctlr_info *h;
  3267. if (pci_get_drvdata(pdev) == NULL) {
  3268. dev_err(&pdev->dev, "unable to remove device \n");
  3269. return;
  3270. }
  3271. h = pci_get_drvdata(pdev);
  3272. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3273. hpsa_shutdown(pdev);
  3274. iounmap(h->vaddr);
  3275. hpsa_free_sg_chain_blocks(h);
  3276. pci_free_consistent(h->pdev,
  3277. h->nr_cmds * sizeof(struct CommandList),
  3278. h->cmd_pool, h->cmd_pool_dhandle);
  3279. pci_free_consistent(h->pdev,
  3280. h->nr_cmds * sizeof(struct ErrorInfo),
  3281. h->errinfo_pool, h->errinfo_pool_dhandle);
  3282. pci_free_consistent(h->pdev, h->reply_pool_size,
  3283. h->reply_pool, h->reply_pool_dhandle);
  3284. kfree(h->cmd_pool_bits);
  3285. kfree(h->blockFetchTable);
  3286. kfree(h->hba_inquiry_data);
  3287. /*
  3288. * Deliberately omit pci_disable_device(): it does something nasty to
  3289. * Smart Array controllers that pci_enable_device does not undo
  3290. */
  3291. pci_release_regions(pdev);
  3292. pci_set_drvdata(pdev, NULL);
  3293. kfree(h);
  3294. }
  3295. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3296. __attribute__((unused)) pm_message_t state)
  3297. {
  3298. return -ENOSYS;
  3299. }
  3300. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3301. {
  3302. return -ENOSYS;
  3303. }
  3304. static struct pci_driver hpsa_pci_driver = {
  3305. .name = "hpsa",
  3306. .probe = hpsa_init_one,
  3307. .remove = __devexit_p(hpsa_remove_one),
  3308. .id_table = hpsa_pci_device_id, /* id_table */
  3309. .shutdown = hpsa_shutdown,
  3310. .suspend = hpsa_suspend,
  3311. .resume = hpsa_resume,
  3312. };
  3313. /* Fill in bucket_map[], given nsgs (the max number of
  3314. * scatter gather elements supported) and bucket[],
  3315. * which is an array of 8 integers. The bucket[] array
  3316. * contains 8 different DMA transfer sizes (in 16
  3317. * byte increments) which the controller uses to fetch
  3318. * commands. This function fills in bucket_map[], which
  3319. * maps a given number of scatter gather elements to one of
  3320. * the 8 DMA transfer sizes. The point of it is to allow the
  3321. * controller to only do as much DMA as needed to fetch the
  3322. * command, with the DMA transfer size encoded in the lower
  3323. * bits of the command address.
  3324. */
  3325. static void calc_bucket_map(int bucket[], int num_buckets,
  3326. int nsgs, int *bucket_map)
  3327. {
  3328. int i, j, b, size;
  3329. /* even a command with 0 SGs requires 4 blocks */
  3330. #define MINIMUM_TRANSFER_BLOCKS 4
  3331. #define NUM_BUCKETS 8
  3332. /* Note, bucket_map must have nsgs+1 entries. */
  3333. for (i = 0; i <= nsgs; i++) {
  3334. /* Compute size of a command with i SG entries */
  3335. size = i + MINIMUM_TRANSFER_BLOCKS;
  3336. b = num_buckets; /* Assume the biggest bucket */
  3337. /* Find the bucket that is just big enough */
  3338. for (j = 0; j < 8; j++) {
  3339. if (bucket[j] >= size) {
  3340. b = j;
  3341. break;
  3342. }
  3343. }
  3344. /* for a command with i SG entries, use bucket b. */
  3345. bucket_map[i] = b;
  3346. }
  3347. }
  3348. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3349. {
  3350. u32 trans_support;
  3351. u64 trans_offset;
  3352. /* 5 = 1 s/g entry or 4k
  3353. * 6 = 2 s/g entry or 8k
  3354. * 8 = 4 s/g entry or 16k
  3355. * 10 = 6 s/g entry or 24k
  3356. */
  3357. int bft[8] = {5, 6, 8, 10, 12, 20, 28, 35}; /* for scatter/gathers */
  3358. int i = 0;
  3359. int l = 0;
  3360. unsigned long register_value;
  3361. trans_support = readl(&(h->cfgtable->TransportSupport));
  3362. if (!(trans_support & PERFORMANT_MODE))
  3363. return;
  3364. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3365. h->max_sg_entries = 32;
  3366. /* Performant mode ring buffer and supporting data structures */
  3367. h->reply_pool_size = h->max_commands * sizeof(u64);
  3368. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3369. &(h->reply_pool_dhandle));
  3370. /* Need a block fetch table for performant mode */
  3371. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3372. sizeof(u32)), GFP_KERNEL);
  3373. if ((h->reply_pool == NULL)
  3374. || (h->blockFetchTable == NULL))
  3375. goto clean_up;
  3376. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3377. /* Controller spec: zero out this buffer. */
  3378. memset(h->reply_pool, 0, h->reply_pool_size);
  3379. h->reply_pool_head = h->reply_pool;
  3380. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3381. bft[7] = h->max_sg_entries + 4;
  3382. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3383. for (i = 0; i < 8; i++)
  3384. writel(bft[i], &h->transtable->BlockFetch[i]);
  3385. /* size of controller ring buffer */
  3386. writel(h->max_commands, &h->transtable->RepQSize);
  3387. writel(1, &h->transtable->RepQCount);
  3388. writel(0, &h->transtable->RepQCtrAddrLow32);
  3389. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3390. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3391. writel(0, &h->transtable->RepQAddr0High32);
  3392. writel(CFGTBL_Trans_Performant,
  3393. &(h->cfgtable->HostWrite.TransportRequest));
  3394. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3395. /* under certain very rare conditions, this can take awhile.
  3396. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3397. * as we enter this code.) */
  3398. for (l = 0; l < MAX_CONFIG_WAIT; l++) {
  3399. register_value = readl(h->vaddr + SA5_DOORBELL);
  3400. if (!(register_value & CFGTBL_ChangeReq))
  3401. break;
  3402. /* delay and try again */
  3403. set_current_state(TASK_INTERRUPTIBLE);
  3404. schedule_timeout(10);
  3405. }
  3406. register_value = readl(&(h->cfgtable->TransportActive));
  3407. if (!(register_value & CFGTBL_Trans_Performant)) {
  3408. dev_warn(&h->pdev->dev, "unable to get board into"
  3409. " performant mode\n");
  3410. return;
  3411. }
  3412. /* Change the access methods to the performant access methods */
  3413. h->access = SA5_performant_access;
  3414. h->transMethod = CFGTBL_Trans_Performant;
  3415. return;
  3416. clean_up:
  3417. if (h->reply_pool)
  3418. pci_free_consistent(h->pdev, h->reply_pool_size,
  3419. h->reply_pool, h->reply_pool_dhandle);
  3420. kfree(h->blockFetchTable);
  3421. }
  3422. /*
  3423. * This is it. Register the PCI driver information for the cards we control
  3424. * the OS will call our registered routines when it finds one of our cards.
  3425. */
  3426. static int __init hpsa_init(void)
  3427. {
  3428. return pci_register_driver(&hpsa_pci_driver);
  3429. }
  3430. static void __exit hpsa_cleanup(void)
  3431. {
  3432. pci_unregister_driver(&hpsa_pci_driver);
  3433. }
  3434. module_init(hpsa_init);
  3435. module_exit(hpsa_cleanup);