rt2x00pci.c 9.2 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/slab.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00pci.h"
  28. /*
  29. * Register access.
  30. */
  31. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  32. const unsigned int offset,
  33. const struct rt2x00_field32 field,
  34. u32 *reg)
  35. {
  36. unsigned int i;
  37. if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
  38. return 0;
  39. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  40. rt2x00pci_register_read(rt2x00dev, offset, reg);
  41. if (!rt2x00_get_field32(*reg, field))
  42. return 1;
  43. udelay(REGISTER_BUSY_DELAY);
  44. }
  45. ERROR(rt2x00dev, "Indirect register access failed: "
  46. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  47. *reg = ~0;
  48. return 0;
  49. }
  50. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  51. /*
  52. * TX data handlers.
  53. */
  54. int rt2x00pci_write_tx_data(struct queue_entry *entry,
  55. struct txentry_desc *txdesc)
  56. {
  57. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  58. struct queue_entry_priv_pci *entry_priv = entry->priv_data;
  59. struct skb_frame_desc *skbdesc;
  60. /*
  61. * This should not happen, we already checked the entry
  62. * was ours. When the hardware disagrees there has been
  63. * a queue corruption!
  64. */
  65. if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
  66. ERROR(rt2x00dev,
  67. "Corrupt queue %d, accessing entry which is not ours.\n"
  68. "Please file bug report to %s.\n",
  69. entry->queue->qid, DRV_PROJECT);
  70. return -EINVAL;
  71. }
  72. /*
  73. * Fill in skb descriptor
  74. */
  75. skbdesc = get_skb_frame_desc(entry->skb);
  76. skbdesc->desc = entry_priv->desc;
  77. skbdesc->desc_len = entry->queue->desc_size;
  78. return 0;
  79. }
  80. EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
  81. /*
  82. * TX/RX data handlers.
  83. */
  84. void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  85. {
  86. struct data_queue *queue = rt2x00dev->rx;
  87. struct queue_entry *entry;
  88. struct queue_entry_priv_pci *entry_priv;
  89. struct skb_frame_desc *skbdesc;
  90. while (1) {
  91. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  92. entry_priv = entry->priv_data;
  93. if (rt2x00dev->ops->lib->get_entry_state(entry))
  94. break;
  95. /*
  96. * Fill in desc fields of the skb descriptor
  97. */
  98. skbdesc = get_skb_frame_desc(entry->skb);
  99. skbdesc->desc = entry_priv->desc;
  100. skbdesc->desc_len = entry->queue->desc_size;
  101. /*
  102. * Send the frame to rt2x00lib for further processing.
  103. */
  104. rt2x00lib_rxdone(rt2x00dev, entry);
  105. }
  106. }
  107. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  108. /*
  109. * Device initialization handlers.
  110. */
  111. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  112. struct data_queue *queue)
  113. {
  114. struct queue_entry_priv_pci *entry_priv;
  115. void *addr;
  116. dma_addr_t dma;
  117. unsigned int i;
  118. /*
  119. * Allocate DMA memory for descriptor and buffer.
  120. */
  121. addr = dma_alloc_coherent(rt2x00dev->dev,
  122. queue->limit * queue->desc_size,
  123. &dma, GFP_KERNEL | GFP_DMA);
  124. if (!addr)
  125. return -ENOMEM;
  126. memset(addr, 0, queue->limit * queue->desc_size);
  127. /*
  128. * Initialize all queue entries to contain valid addresses.
  129. */
  130. for (i = 0; i < queue->limit; i++) {
  131. entry_priv = queue->entries[i].priv_data;
  132. entry_priv->desc = addr + i * queue->desc_size;
  133. entry_priv->desc_dma = dma + i * queue->desc_size;
  134. }
  135. return 0;
  136. }
  137. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  138. struct data_queue *queue)
  139. {
  140. struct queue_entry_priv_pci *entry_priv =
  141. queue->entries[0].priv_data;
  142. if (entry_priv->desc)
  143. dma_free_coherent(rt2x00dev->dev,
  144. queue->limit * queue->desc_size,
  145. entry_priv->desc, entry_priv->desc_dma);
  146. entry_priv->desc = NULL;
  147. }
  148. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  149. {
  150. struct data_queue *queue;
  151. int status;
  152. /*
  153. * Allocate DMA
  154. */
  155. queue_for_each(rt2x00dev, queue) {
  156. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  157. if (status)
  158. goto exit;
  159. }
  160. /*
  161. * Register interrupt handler.
  162. */
  163. status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
  164. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  165. if (status) {
  166. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  167. rt2x00dev->irq, status);
  168. goto exit;
  169. }
  170. return 0;
  171. exit:
  172. queue_for_each(rt2x00dev, queue)
  173. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  174. return status;
  175. }
  176. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  177. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  178. {
  179. struct data_queue *queue;
  180. /*
  181. * Free irq line.
  182. */
  183. free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev);
  184. /*
  185. * Free DMA
  186. */
  187. queue_for_each(rt2x00dev, queue)
  188. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  189. }
  190. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  191. /*
  192. * PCI driver handlers.
  193. */
  194. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  195. {
  196. kfree(rt2x00dev->rf);
  197. rt2x00dev->rf = NULL;
  198. kfree(rt2x00dev->eeprom);
  199. rt2x00dev->eeprom = NULL;
  200. if (rt2x00dev->csr.base) {
  201. iounmap(rt2x00dev->csr.base);
  202. rt2x00dev->csr.base = NULL;
  203. }
  204. }
  205. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  206. {
  207. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  208. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  209. if (!rt2x00dev->csr.base)
  210. goto exit;
  211. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  212. if (!rt2x00dev->eeprom)
  213. goto exit;
  214. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  215. if (!rt2x00dev->rf)
  216. goto exit;
  217. return 0;
  218. exit:
  219. ERROR_PROBE("Failed to allocate registers.\n");
  220. rt2x00pci_free_reg(rt2x00dev);
  221. return -ENOMEM;
  222. }
  223. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
  224. {
  225. struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
  226. struct ieee80211_hw *hw;
  227. struct rt2x00_dev *rt2x00dev;
  228. int retval;
  229. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  230. if (retval) {
  231. ERROR_PROBE("PCI request regions failed.\n");
  232. return retval;
  233. }
  234. retval = pci_enable_device(pci_dev);
  235. if (retval) {
  236. ERROR_PROBE("Enable device failed.\n");
  237. goto exit_release_regions;
  238. }
  239. pci_set_master(pci_dev);
  240. if (pci_set_mwi(pci_dev))
  241. ERROR_PROBE("MWI not available.\n");
  242. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  243. ERROR_PROBE("PCI DMA not supported.\n");
  244. retval = -EIO;
  245. goto exit_disable_device;
  246. }
  247. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  248. if (!hw) {
  249. ERROR_PROBE("Failed to allocate hardware.\n");
  250. retval = -ENOMEM;
  251. goto exit_disable_device;
  252. }
  253. pci_set_drvdata(pci_dev, hw);
  254. rt2x00dev = hw->priv;
  255. rt2x00dev->dev = &pci_dev->dev;
  256. rt2x00dev->ops = ops;
  257. rt2x00dev->hw = hw;
  258. rt2x00dev->irq = pci_dev->irq;
  259. rt2x00dev->name = pci_name(pci_dev);
  260. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  261. retval = rt2x00pci_alloc_reg(rt2x00dev);
  262. if (retval)
  263. goto exit_free_device;
  264. retval = rt2x00lib_probe_dev(rt2x00dev);
  265. if (retval)
  266. goto exit_free_reg;
  267. return 0;
  268. exit_free_reg:
  269. rt2x00pci_free_reg(rt2x00dev);
  270. exit_free_device:
  271. ieee80211_free_hw(hw);
  272. exit_disable_device:
  273. if (retval != -EBUSY)
  274. pci_disable_device(pci_dev);
  275. exit_release_regions:
  276. pci_release_regions(pci_dev);
  277. pci_set_drvdata(pci_dev, NULL);
  278. return retval;
  279. }
  280. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  281. void rt2x00pci_remove(struct pci_dev *pci_dev)
  282. {
  283. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  284. struct rt2x00_dev *rt2x00dev = hw->priv;
  285. /*
  286. * Free all allocated data.
  287. */
  288. rt2x00lib_remove_dev(rt2x00dev);
  289. rt2x00pci_free_reg(rt2x00dev);
  290. ieee80211_free_hw(hw);
  291. /*
  292. * Free the PCI device data.
  293. */
  294. pci_set_drvdata(pci_dev, NULL);
  295. pci_disable_device(pci_dev);
  296. pci_release_regions(pci_dev);
  297. }
  298. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  299. #ifdef CONFIG_PM
  300. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  301. {
  302. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  303. struct rt2x00_dev *rt2x00dev = hw->priv;
  304. int retval;
  305. retval = rt2x00lib_suspend(rt2x00dev, state);
  306. if (retval)
  307. return retval;
  308. pci_save_state(pci_dev);
  309. pci_disable_device(pci_dev);
  310. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  311. }
  312. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  313. int rt2x00pci_resume(struct pci_dev *pci_dev)
  314. {
  315. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  316. struct rt2x00_dev *rt2x00dev = hw->priv;
  317. if (pci_set_power_state(pci_dev, PCI_D0) ||
  318. pci_enable_device(pci_dev) ||
  319. pci_restore_state(pci_dev)) {
  320. ERROR(rt2x00dev, "Failed to resume device.\n");
  321. return -EIO;
  322. }
  323. return rt2x00lib_resume(rt2x00dev);
  324. }
  325. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  326. #endif /* CONFIG_PM */
  327. /*
  328. * rt2x00pci module information.
  329. */
  330. MODULE_AUTHOR(DRV_PROJECT);
  331. MODULE_VERSION(DRV_VERSION);
  332. MODULE_DESCRIPTION("rt2x00 pci library");
  333. MODULE_LICENSE("GPL");