iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/ieee80211_radiotap.h>
  44. #include <net/mac80211.h>
  45. #include <asm/div64.h>
  46. #define DRV_NAME "iwl3945"
  47. #include "iwl-fh.h"
  48. #include "iwl-3945-fh.h"
  49. #include "iwl-commands.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-3945.h"
  52. #include "iwl-core.h"
  53. #include "iwl-helpers.h"
  54. #include "iwl-dev.h"
  55. #include "iwl-spectrum.h"
  56. /*
  57. * module name, copyright, version, etc.
  58. */
  59. #define DRV_DESCRIPTION \
  60. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  61. #ifdef CONFIG_IWLWIFI_DEBUG
  62. #define VD "d"
  63. #else
  64. #define VD
  65. #endif
  66. /*
  67. * add "s" to indicate spectrum measurement included.
  68. * we add it here to be consistent with previous releases in which
  69. * this was configurable.
  70. */
  71. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  72. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  73. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  74. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  75. MODULE_VERSION(DRV_VERSION);
  76. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  77. MODULE_LICENSE("GPL");
  78. /* module parameters */
  79. struct iwl_mod_params iwl3945_mod_params = {
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->_3945.shared_virt)
  290. dma_free_coherent(&priv->pci_dev->dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->_3945.shared_virt,
  293. priv->_3945.shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_device_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_device_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx_cmd->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  337. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  338. tx_flags |= TX_CMD_FLG_ACK_MSK;
  339. if (ieee80211_is_mgmt(fc))
  340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  341. if (ieee80211_is_probe_resp(fc) &&
  342. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  343. tx_flags |= TX_CMD_FLG_TSF_MSK;
  344. } else {
  345. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. }
  348. tx_cmd->sta_id = std_id;
  349. if (ieee80211_has_morefrags(fc))
  350. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  351. if (ieee80211_is_data_qos(fc)) {
  352. u8 *qc = ieee80211_get_qos_ctl(hdr);
  353. tx_cmd->tid_tspec = qc[0] & 0xf;
  354. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  355. } else {
  356. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  357. }
  358. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  359. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  360. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  361. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  362. if (ieee80211_is_mgmt(fc)) {
  363. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  365. else
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  367. } else {
  368. tx_cmd->timeout.pm_frame_timeout = 0;
  369. }
  370. tx_cmd->driver_txop = 0;
  371. tx_cmd->tx_flags = tx_flags;
  372. tx_cmd->next_frame_len = 0;
  373. }
  374. /*
  375. * start REPLY_TX command process
  376. */
  377. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  378. {
  379. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  380. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  381. struct iwl3945_tx_cmd *tx_cmd;
  382. struct iwl_tx_queue *txq = NULL;
  383. struct iwl_queue *q = NULL;
  384. struct iwl_device_cmd *out_cmd;
  385. struct iwl_cmd_meta *out_meta;
  386. dma_addr_t phys_addr;
  387. dma_addr_t txcmd_phys;
  388. int txq_id = skb_get_queue_mapping(skb);
  389. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  390. u8 id;
  391. u8 unicast;
  392. u8 sta_id;
  393. u8 tid = 0;
  394. u16 seq_number = 0;
  395. __le16 fc;
  396. u8 wait_write_ptr = 0;
  397. u8 *qc = NULL;
  398. unsigned long flags;
  399. spin_lock_irqsave(&priv->lock, flags);
  400. if (iwl_is_rfkill(priv)) {
  401. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  402. goto drop_unlock;
  403. }
  404. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  405. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  406. goto drop_unlock;
  407. }
  408. unicast = !is_multicast_ether_addr(hdr->addr1);
  409. id = 0;
  410. fc = hdr->frame_control;
  411. #ifdef CONFIG_IWLWIFI_DEBUG
  412. if (ieee80211_is_auth(fc))
  413. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  414. else if (ieee80211_is_assoc_req(fc))
  415. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  416. else if (ieee80211_is_reassoc_req(fc))
  417. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  418. #endif
  419. spin_unlock_irqrestore(&priv->lock, flags);
  420. hdr_len = ieee80211_hdrlen(fc);
  421. /* Find (or create) index into station table for destination station */
  422. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  423. sta_id = priv->hw_params.bcast_sta_id;
  424. else
  425. sta_id = iwl_get_sta_id(priv, hdr);
  426. if (sta_id == IWL_INVALID_STATION) {
  427. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  428. hdr->addr1);
  429. goto drop;
  430. }
  431. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  432. if (ieee80211_is_data_qos(fc)) {
  433. qc = ieee80211_get_qos_ctl(hdr);
  434. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  435. if (unlikely(tid >= MAX_TID_COUNT))
  436. goto drop;
  437. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  438. IEEE80211_SCTL_SEQ;
  439. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  440. (hdr->seq_ctrl &
  441. cpu_to_le16(IEEE80211_SCTL_FRAG));
  442. seq_number += 0x10;
  443. }
  444. /* Descriptor for chosen Tx queue */
  445. txq = &priv->txq[txq_id];
  446. q = &txq->q;
  447. if ((iwl_queue_space(q) < q->high_mark))
  448. goto drop;
  449. spin_lock_irqsave(&priv->lock, flags);
  450. idx = get_cmd_index(q, q->write_ptr, 0);
  451. /* Set up driver data for this TFD */
  452. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  453. txq->txb[q->write_ptr].skb[0] = skb;
  454. /* Init first empty entry in queue's array of Tx/cmd buffers */
  455. out_cmd = txq->cmd[idx];
  456. out_meta = &txq->meta[idx];
  457. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  458. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  459. memset(tx_cmd, 0, sizeof(*tx_cmd));
  460. /*
  461. * Set up the Tx-command (not MAC!) header.
  462. * Store the chosen Tx queue and TFD index within the sequence field;
  463. * after Tx, uCode's Tx response will return this value so driver can
  464. * locate the frame within the tx queue and do post-tx processing.
  465. */
  466. out_cmd->hdr.cmd = REPLY_TX;
  467. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  468. INDEX_TO_SEQ(q->write_ptr)));
  469. /* Copy MAC header from skb into command buffer */
  470. memcpy(tx_cmd->hdr, hdr, hdr_len);
  471. if (info->control.hw_key)
  472. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  473. /* TODO need this for burst mode later on */
  474. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  475. /* set is_hcca to 0; it probably will never be implemented */
  476. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  477. /* Total # bytes to be transmitted */
  478. len = (u16)skb->len;
  479. tx_cmd->len = cpu_to_le16(len);
  480. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  481. iwl_update_stats(priv, true, fc, len);
  482. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  483. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  484. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  485. txq->need_update = 1;
  486. if (qc)
  487. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  488. } else {
  489. wait_write_ptr = 1;
  490. txq->need_update = 0;
  491. }
  492. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  493. le16_to_cpu(out_cmd->hdr.sequence));
  494. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  495. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  496. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  497. ieee80211_hdrlen(fc));
  498. /*
  499. * Use the first empty entry in this queue's command buffer array
  500. * to contain the Tx command and MAC header concatenated together
  501. * (payload data will be in another buffer).
  502. * Size of this varies, due to varying MAC header length.
  503. * If end is not dword aligned, we'll have 2 extra bytes at the end
  504. * of the MAC header (device reads on dword boundaries).
  505. * We'll tell device about this padding later.
  506. */
  507. len = sizeof(struct iwl3945_tx_cmd) +
  508. sizeof(struct iwl_cmd_header) + hdr_len;
  509. len_org = len;
  510. len = (len + 3) & ~3;
  511. if (len_org != len)
  512. len_org = 1;
  513. else
  514. len_org = 0;
  515. /* Physical address of this Tx command's header (not MAC header!),
  516. * within command buffer array. */
  517. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  518. len, PCI_DMA_TODEVICE);
  519. /* we do not map meta data ... so we can safely access address to
  520. * provide to unmap command*/
  521. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  522. pci_unmap_len_set(out_meta, len, len);
  523. /* Add buffer containing Tx command and MAC(!) header to TFD's
  524. * first entry */
  525. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  526. txcmd_phys, len, 1, 0);
  527. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  528. * if any (802.11 null frames have no payload). */
  529. len = skb->len - hdr_len;
  530. if (len) {
  531. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  532. len, PCI_DMA_TODEVICE);
  533. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  534. phys_addr, len,
  535. 0, U32_PAD(len));
  536. }
  537. /* Tell device the write index *just past* this latest filled TFD */
  538. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  539. iwl_txq_update_write_ptr(priv, txq);
  540. spin_unlock_irqrestore(&priv->lock, flags);
  541. if ((iwl_queue_space(q) < q->high_mark)
  542. && priv->mac80211_registered) {
  543. if (wait_write_ptr) {
  544. spin_lock_irqsave(&priv->lock, flags);
  545. txq->need_update = 1;
  546. iwl_txq_update_write_ptr(priv, txq);
  547. spin_unlock_irqrestore(&priv->lock, flags);
  548. }
  549. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  550. }
  551. return 0;
  552. drop_unlock:
  553. spin_unlock_irqrestore(&priv->lock, flags);
  554. drop:
  555. return -1;
  556. }
  557. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  558. #define BEACON_TIME_MASK_HIGH 0xFF000000
  559. #define TIME_UNIT 1024
  560. /*
  561. * extended beacon time format
  562. * time in usec will be changed into a 32-bit value in 8:24 format
  563. * the high 1 byte is the beacon counts
  564. * the lower 3 bytes is the time in usec within one beacon interval
  565. */
  566. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  567. {
  568. u32 quot;
  569. u32 rem;
  570. u32 interval = beacon_interval * 1024;
  571. if (!interval || !usec)
  572. return 0;
  573. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  574. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  575. return (quot << 24) + rem;
  576. }
  577. /* base is usually what we get from ucode with each received frame,
  578. * the same as HW timer counter counting down
  579. */
  580. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  581. {
  582. u32 base_low = base & BEACON_TIME_MASK_LOW;
  583. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  584. u32 interval = beacon_interval * TIME_UNIT;
  585. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  586. (addon & BEACON_TIME_MASK_HIGH);
  587. if (base_low > addon_low)
  588. res += base_low - addon_low;
  589. else if (base_low < addon_low) {
  590. res += interval + base_low - addon_low;
  591. res += (1 << 24);
  592. } else
  593. res += (1 << 24);
  594. return cpu_to_le32(res);
  595. }
  596. static int iwl3945_get_measurement(struct iwl_priv *priv,
  597. struct ieee80211_measurement_params *params,
  598. u8 type)
  599. {
  600. struct iwl_spectrum_cmd spectrum;
  601. struct iwl_rx_packet *pkt;
  602. struct iwl_host_cmd cmd = {
  603. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  604. .data = (void *)&spectrum,
  605. .flags = CMD_WANT_SKB,
  606. };
  607. u32 add_time = le64_to_cpu(params->start_time);
  608. int rc;
  609. int spectrum_resp_status;
  610. int duration = le16_to_cpu(params->duration);
  611. if (iwl_is_associated(priv))
  612. add_time =
  613. iwl3945_usecs_to_beacons(
  614. le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
  615. le16_to_cpu(priv->rxon_timing.beacon_interval));
  616. memset(&spectrum, 0, sizeof(spectrum));
  617. spectrum.channel_count = cpu_to_le16(1);
  618. spectrum.flags =
  619. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  620. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  621. cmd.len = sizeof(spectrum);
  622. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  623. if (iwl_is_associated(priv))
  624. spectrum.start_time =
  625. iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
  626. add_time,
  627. le16_to_cpu(priv->rxon_timing.beacon_interval));
  628. else
  629. spectrum.start_time = 0;
  630. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  631. spectrum.channels[0].channel = params->channel;
  632. spectrum.channels[0].type = type;
  633. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  634. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  635. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  636. rc = iwl_send_cmd_sync(priv, &cmd);
  637. if (rc)
  638. return rc;
  639. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  640. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  641. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  642. rc = -EIO;
  643. }
  644. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  645. switch (spectrum_resp_status) {
  646. case 0: /* Command will be handled */
  647. if (pkt->u.spectrum.id != 0xff) {
  648. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  649. pkt->u.spectrum.id);
  650. priv->measurement_status &= ~MEASUREMENT_READY;
  651. }
  652. priv->measurement_status |= MEASUREMENT_ACTIVE;
  653. rc = 0;
  654. break;
  655. case 1: /* Command will not be handled */
  656. rc = -EAGAIN;
  657. break;
  658. }
  659. iwl_free_pages(priv, cmd.reply_page);
  660. return rc;
  661. }
  662. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  663. struct iwl_rx_mem_buffer *rxb)
  664. {
  665. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  666. struct iwl_alive_resp *palive;
  667. struct delayed_work *pwork;
  668. palive = &pkt->u.alive_frame;
  669. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  670. "0x%01X 0x%01X\n",
  671. palive->is_valid, palive->ver_type,
  672. palive->ver_subtype);
  673. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  674. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  675. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  676. sizeof(struct iwl_alive_resp));
  677. pwork = &priv->init_alive_start;
  678. } else {
  679. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  680. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  681. sizeof(struct iwl_alive_resp));
  682. pwork = &priv->alive_start;
  683. iwl3945_disable_events(priv);
  684. }
  685. /* We delay the ALIVE response by 5ms to
  686. * give the HW RF Kill time to activate... */
  687. if (palive->is_valid == UCODE_VALID_OK)
  688. queue_delayed_work(priv->workqueue, pwork,
  689. msecs_to_jiffies(5));
  690. else
  691. IWL_WARN(priv, "uCode did not respond OK.\n");
  692. }
  693. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  694. struct iwl_rx_mem_buffer *rxb)
  695. {
  696. #ifdef CONFIG_IWLWIFI_DEBUG
  697. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  698. #endif
  699. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  700. return;
  701. }
  702. static void iwl3945_bg_beacon_update(struct work_struct *work)
  703. {
  704. struct iwl_priv *priv =
  705. container_of(work, struct iwl_priv, beacon_update);
  706. struct sk_buff *beacon;
  707. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  708. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  709. if (!beacon) {
  710. IWL_ERR(priv, "update beacon failed\n");
  711. return;
  712. }
  713. mutex_lock(&priv->mutex);
  714. /* new beacon skb is allocated every time; dispose previous.*/
  715. if (priv->ibss_beacon)
  716. dev_kfree_skb(priv->ibss_beacon);
  717. priv->ibss_beacon = beacon;
  718. mutex_unlock(&priv->mutex);
  719. iwl3945_send_beacon_cmd(priv);
  720. }
  721. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  722. struct iwl_rx_mem_buffer *rxb)
  723. {
  724. #ifdef CONFIG_IWLWIFI_DEBUG
  725. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  726. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  727. u8 rate = beacon->beacon_notify_hdr.rate;
  728. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  729. "tsf %d %d rate %d\n",
  730. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  731. beacon->beacon_notify_hdr.failure_frame,
  732. le32_to_cpu(beacon->ibss_mgr_status),
  733. le32_to_cpu(beacon->high_tsf),
  734. le32_to_cpu(beacon->low_tsf), rate);
  735. #endif
  736. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  737. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  738. queue_work(priv->workqueue, &priv->beacon_update);
  739. }
  740. /* Handle notification from uCode that card's power state is changing
  741. * due to software, hardware, or critical temperature RFKILL */
  742. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  743. struct iwl_rx_mem_buffer *rxb)
  744. {
  745. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  746. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  747. unsigned long status = priv->status;
  748. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  749. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  750. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  751. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  752. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  753. if (flags & HW_CARD_DISABLED)
  754. set_bit(STATUS_RF_KILL_HW, &priv->status);
  755. else
  756. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  757. iwl_scan_cancel(priv);
  758. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  759. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  760. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  761. test_bit(STATUS_RF_KILL_HW, &priv->status));
  762. else
  763. wake_up_interruptible(&priv->wait_command_queue);
  764. }
  765. /**
  766. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  767. *
  768. * Setup the RX handlers for each of the reply types sent from the uCode
  769. * to the host.
  770. *
  771. * This function chains into the hardware specific files for them to setup
  772. * any hardware specific handlers as well.
  773. */
  774. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  775. {
  776. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  777. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  778. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  779. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  780. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  781. iwl_rx_spectrum_measure_notif;
  782. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  783. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  784. iwl_rx_pm_debug_statistics_notif;
  785. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  786. /*
  787. * The same handler is used for both the REPLY to a discrete
  788. * statistics request from the host as well as for the periodic
  789. * statistics notifications (after received beacons) from the uCode.
  790. */
  791. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
  792. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  793. iwl_setup_rx_scan_handlers(priv);
  794. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  795. /* Set up hardware specific Rx handlers */
  796. iwl3945_hw_rx_handler_setup(priv);
  797. }
  798. /************************** RX-FUNCTIONS ****************************/
  799. /*
  800. * Rx theory of operation
  801. *
  802. * The host allocates 32 DMA target addresses and passes the host address
  803. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  804. * 0 to 31
  805. *
  806. * Rx Queue Indexes
  807. * The host/firmware share two index registers for managing the Rx buffers.
  808. *
  809. * The READ index maps to the first position that the firmware may be writing
  810. * to -- the driver can read up to (but not including) this position and get
  811. * good data.
  812. * The READ index is managed by the firmware once the card is enabled.
  813. *
  814. * The WRITE index maps to the last position the driver has read from -- the
  815. * position preceding WRITE is the last slot the firmware can place a packet.
  816. *
  817. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  818. * WRITE = READ.
  819. *
  820. * During initialization, the host sets up the READ queue position to the first
  821. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  822. *
  823. * When the firmware places a packet in a buffer, it will advance the READ index
  824. * and fire the RX interrupt. The driver can then query the READ index and
  825. * process as many packets as possible, moving the WRITE index forward as it
  826. * resets the Rx queue buffers with new memory.
  827. *
  828. * The management in the driver is as follows:
  829. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  830. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  831. * to replenish the iwl->rxq->rx_free.
  832. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  833. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  834. * 'processed' and 'read' driver indexes as well)
  835. * + A received packet is processed and handed to the kernel network stack,
  836. * detached from the iwl->rxq. The driver 'processed' index is updated.
  837. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  838. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  839. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  840. * were enough free buffers and RX_STALLED is set it is cleared.
  841. *
  842. *
  843. * Driver sequence:
  844. *
  845. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  846. * iwl3945_rx_queue_restock
  847. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  848. * queue, updates firmware pointers, and updates
  849. * the WRITE index. If insufficient rx_free buffers
  850. * are available, schedules iwl3945_rx_replenish
  851. *
  852. * -- enable interrupts --
  853. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  854. * READ INDEX, detaching the SKB from the pool.
  855. * Moves the packet buffer from queue to rx_used.
  856. * Calls iwl3945_rx_queue_restock to refill any empty
  857. * slots.
  858. * ...
  859. *
  860. */
  861. /**
  862. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  863. */
  864. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  865. dma_addr_t dma_addr)
  866. {
  867. return cpu_to_le32((u32)dma_addr);
  868. }
  869. /**
  870. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  871. *
  872. * If there are slots in the RX queue that need to be restocked,
  873. * and we have free pre-allocated buffers, fill the ranks as much
  874. * as we can, pulling from rx_free.
  875. *
  876. * This moves the 'write' index forward to catch up with 'processed', and
  877. * also updates the memory address in the firmware to reference the new
  878. * target buffer.
  879. */
  880. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  881. {
  882. struct iwl_rx_queue *rxq = &priv->rxq;
  883. struct list_head *element;
  884. struct iwl_rx_mem_buffer *rxb;
  885. unsigned long flags;
  886. int write;
  887. spin_lock_irqsave(&rxq->lock, flags);
  888. write = rxq->write & ~0x7;
  889. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  890. /* Get next free Rx buffer, remove from free list */
  891. element = rxq->rx_free.next;
  892. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  893. list_del(element);
  894. /* Point to Rx buffer via next RBD in circular buffer */
  895. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  896. rxq->queue[rxq->write] = rxb;
  897. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  898. rxq->free_count--;
  899. }
  900. spin_unlock_irqrestore(&rxq->lock, flags);
  901. /* If the pre-allocated buffer pool is dropping low, schedule to
  902. * refill it */
  903. if (rxq->free_count <= RX_LOW_WATERMARK)
  904. queue_work(priv->workqueue, &priv->rx_replenish);
  905. /* If we've added more space for the firmware to place data, tell it.
  906. * Increment device's write pointer in multiples of 8. */
  907. if ((rxq->write_actual != (rxq->write & ~0x7))
  908. || (abs(rxq->write - rxq->read) > 7)) {
  909. spin_lock_irqsave(&rxq->lock, flags);
  910. rxq->need_update = 1;
  911. spin_unlock_irqrestore(&rxq->lock, flags);
  912. iwl_rx_queue_update_write_ptr(priv, rxq);
  913. }
  914. }
  915. /**
  916. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  917. *
  918. * When moving to rx_free an SKB is allocated for the slot.
  919. *
  920. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  921. * This is called as a scheduled work item (except for during initialization)
  922. */
  923. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  924. {
  925. struct iwl_rx_queue *rxq = &priv->rxq;
  926. struct list_head *element;
  927. struct iwl_rx_mem_buffer *rxb;
  928. struct page *page;
  929. unsigned long flags;
  930. gfp_t gfp_mask = priority;
  931. while (1) {
  932. spin_lock_irqsave(&rxq->lock, flags);
  933. if (list_empty(&rxq->rx_used)) {
  934. spin_unlock_irqrestore(&rxq->lock, flags);
  935. return;
  936. }
  937. spin_unlock_irqrestore(&rxq->lock, flags);
  938. if (rxq->free_count > RX_LOW_WATERMARK)
  939. gfp_mask |= __GFP_NOWARN;
  940. if (priv->hw_params.rx_page_order > 0)
  941. gfp_mask |= __GFP_COMP;
  942. /* Alloc a new receive buffer */
  943. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  944. if (!page) {
  945. if (net_ratelimit())
  946. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  947. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  948. net_ratelimit())
  949. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  950. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  951. rxq->free_count);
  952. /* We don't reschedule replenish work here -- we will
  953. * call the restock method and if it still needs
  954. * more buffers it will schedule replenish */
  955. break;
  956. }
  957. spin_lock_irqsave(&rxq->lock, flags);
  958. if (list_empty(&rxq->rx_used)) {
  959. spin_unlock_irqrestore(&rxq->lock, flags);
  960. __free_pages(page, priv->hw_params.rx_page_order);
  961. return;
  962. }
  963. element = rxq->rx_used.next;
  964. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  965. list_del(element);
  966. spin_unlock_irqrestore(&rxq->lock, flags);
  967. rxb->page = page;
  968. /* Get physical address of RB/SKB */
  969. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  970. PAGE_SIZE << priv->hw_params.rx_page_order,
  971. PCI_DMA_FROMDEVICE);
  972. spin_lock_irqsave(&rxq->lock, flags);
  973. list_add_tail(&rxb->list, &rxq->rx_free);
  974. rxq->free_count++;
  975. priv->alloc_rxb_page++;
  976. spin_unlock_irqrestore(&rxq->lock, flags);
  977. }
  978. }
  979. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  980. {
  981. unsigned long flags;
  982. int i;
  983. spin_lock_irqsave(&rxq->lock, flags);
  984. INIT_LIST_HEAD(&rxq->rx_free);
  985. INIT_LIST_HEAD(&rxq->rx_used);
  986. /* Fill the rx_used queue with _all_ of the Rx buffers */
  987. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  988. /* In the reset function, these buffers may have been allocated
  989. * to an SKB, so we need to unmap and free potential storage */
  990. if (rxq->pool[i].page != NULL) {
  991. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  992. PAGE_SIZE << priv->hw_params.rx_page_order,
  993. PCI_DMA_FROMDEVICE);
  994. __iwl_free_pages(priv, rxq->pool[i].page);
  995. rxq->pool[i].page = NULL;
  996. }
  997. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  998. }
  999. /* Set us so that we have processed and used all buffers, but have
  1000. * not restocked the Rx queue with fresh buffers */
  1001. rxq->read = rxq->write = 0;
  1002. rxq->write_actual = 0;
  1003. rxq->free_count = 0;
  1004. spin_unlock_irqrestore(&rxq->lock, flags);
  1005. }
  1006. void iwl3945_rx_replenish(void *data)
  1007. {
  1008. struct iwl_priv *priv = data;
  1009. unsigned long flags;
  1010. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1011. spin_lock_irqsave(&priv->lock, flags);
  1012. iwl3945_rx_queue_restock(priv);
  1013. spin_unlock_irqrestore(&priv->lock, flags);
  1014. }
  1015. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1016. {
  1017. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1018. iwl3945_rx_queue_restock(priv);
  1019. }
  1020. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1021. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1022. * This free routine walks the list of POOL entries and if SKB is set to
  1023. * non NULL it is unmapped and freed
  1024. */
  1025. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1026. {
  1027. int i;
  1028. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1029. if (rxq->pool[i].page != NULL) {
  1030. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1031. PAGE_SIZE << priv->hw_params.rx_page_order,
  1032. PCI_DMA_FROMDEVICE);
  1033. __iwl_free_pages(priv, rxq->pool[i].page);
  1034. rxq->pool[i].page = NULL;
  1035. }
  1036. }
  1037. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1038. rxq->dma_addr);
  1039. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  1040. rxq->rb_stts, rxq->rb_stts_dma);
  1041. rxq->bd = NULL;
  1042. rxq->rb_stts = NULL;
  1043. }
  1044. /* Convert linear signal-to-noise ratio into dB */
  1045. static u8 ratio2dB[100] = {
  1046. /* 0 1 2 3 4 5 6 7 8 9 */
  1047. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1048. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1049. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1050. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1051. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1052. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1053. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1054. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1055. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1056. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1057. };
  1058. /* Calculates a relative dB value from a ratio of linear
  1059. * (i.e. not dB) signal levels.
  1060. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1061. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1062. {
  1063. /* 1000:1 or higher just report as 60 dB */
  1064. if (sig_ratio >= 1000)
  1065. return 60;
  1066. /* 100:1 or higher, divide by 10 and use table,
  1067. * add 20 dB to make up for divide by 10 */
  1068. if (sig_ratio >= 100)
  1069. return 20 + (int)ratio2dB[sig_ratio/10];
  1070. /* We shouldn't see this */
  1071. if (sig_ratio < 1)
  1072. return 0;
  1073. /* Use table for ratios 1:1 - 99:1 */
  1074. return (int)ratio2dB[sig_ratio];
  1075. }
  1076. /**
  1077. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1078. *
  1079. * Uses the priv->rx_handlers callback function array to invoke
  1080. * the appropriate handlers, including command responses,
  1081. * frame-received notifications, and other notifications.
  1082. */
  1083. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1084. {
  1085. struct iwl_rx_mem_buffer *rxb;
  1086. struct iwl_rx_packet *pkt;
  1087. struct iwl_rx_queue *rxq = &priv->rxq;
  1088. u32 r, i;
  1089. int reclaim;
  1090. unsigned long flags;
  1091. u8 fill_rx = 0;
  1092. u32 count = 8;
  1093. int total_empty = 0;
  1094. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1095. * buffer that the driver may process (last buffer filled by ucode). */
  1096. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1097. i = rxq->read;
  1098. /* calculate total frames need to be restock after handling RX */
  1099. total_empty = r - rxq->write_actual;
  1100. if (total_empty < 0)
  1101. total_empty += RX_QUEUE_SIZE;
  1102. if (total_empty > (RX_QUEUE_SIZE / 2))
  1103. fill_rx = 1;
  1104. /* Rx interrupt, but nothing sent from uCode */
  1105. if (i == r)
  1106. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1107. while (i != r) {
  1108. rxb = rxq->queue[i];
  1109. /* If an RXB doesn't have a Rx queue slot associated with it,
  1110. * then a bug has been introduced in the queue refilling
  1111. * routines -- catch it here */
  1112. BUG_ON(rxb == NULL);
  1113. rxq->queue[i] = NULL;
  1114. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1115. PAGE_SIZE << priv->hw_params.rx_page_order,
  1116. PCI_DMA_FROMDEVICE);
  1117. pkt = rxb_addr(rxb);
  1118. trace_iwlwifi_dev_rx(priv, pkt,
  1119. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1120. /* Reclaim a command buffer only if this packet is a response
  1121. * to a (driver-originated) command.
  1122. * If the packet (e.g. Rx frame) originated from uCode,
  1123. * there is no command buffer to reclaim.
  1124. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1125. * but apparently a few don't get set; catch them here. */
  1126. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1127. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1128. (pkt->hdr.cmd != REPLY_TX);
  1129. /* Based on type of command response or notification,
  1130. * handle those that need handling via function in
  1131. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1132. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1133. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1134. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1135. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1136. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1137. } else {
  1138. /* No handling needed */
  1139. IWL_DEBUG_RX(priv,
  1140. "r %d i %d No handler needed for %s, 0x%02x\n",
  1141. r, i, get_cmd_string(pkt->hdr.cmd),
  1142. pkt->hdr.cmd);
  1143. }
  1144. /*
  1145. * XXX: After here, we should always check rxb->page
  1146. * against NULL before touching it or its virtual
  1147. * memory (pkt). Because some rx_handler might have
  1148. * already taken or freed the pages.
  1149. */
  1150. if (reclaim) {
  1151. /* Invoke any callbacks, transfer the buffer to caller,
  1152. * and fire off the (possibly) blocking iwl_send_cmd()
  1153. * as we reclaim the driver command queue */
  1154. if (rxb->page)
  1155. iwl_tx_cmd_complete(priv, rxb);
  1156. else
  1157. IWL_WARN(priv, "Claim null rxb?\n");
  1158. }
  1159. /* Reuse the page if possible. For notification packets and
  1160. * SKBs that fail to Rx correctly, add them back into the
  1161. * rx_free list for reuse later. */
  1162. spin_lock_irqsave(&rxq->lock, flags);
  1163. if (rxb->page != NULL) {
  1164. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1165. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1166. PCI_DMA_FROMDEVICE);
  1167. list_add_tail(&rxb->list, &rxq->rx_free);
  1168. rxq->free_count++;
  1169. } else
  1170. list_add_tail(&rxb->list, &rxq->rx_used);
  1171. spin_unlock_irqrestore(&rxq->lock, flags);
  1172. i = (i + 1) & RX_QUEUE_MASK;
  1173. /* If there are a lot of unused frames,
  1174. * restock the Rx queue so ucode won't assert. */
  1175. if (fill_rx) {
  1176. count++;
  1177. if (count >= 8) {
  1178. rxq->read = i;
  1179. iwl3945_rx_replenish_now(priv);
  1180. count = 0;
  1181. }
  1182. }
  1183. }
  1184. /* Backtrack one entry */
  1185. rxq->read = i;
  1186. if (fill_rx)
  1187. iwl3945_rx_replenish_now(priv);
  1188. else
  1189. iwl3945_rx_queue_restock(priv);
  1190. }
  1191. /* call this function to flush any scheduled tasklet */
  1192. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1193. {
  1194. /* wait to make sure we flush pending tasklet*/
  1195. synchronize_irq(priv->pci_dev->irq);
  1196. tasklet_kill(&priv->irq_tasklet);
  1197. }
  1198. static const char *desc_lookup(int i)
  1199. {
  1200. switch (i) {
  1201. case 1:
  1202. return "FAIL";
  1203. case 2:
  1204. return "BAD_PARAM";
  1205. case 3:
  1206. return "BAD_CHECKSUM";
  1207. case 4:
  1208. return "NMI_INTERRUPT";
  1209. case 5:
  1210. return "SYSASSERT";
  1211. case 6:
  1212. return "FATAL_ERROR";
  1213. }
  1214. return "UNKNOWN";
  1215. }
  1216. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1217. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1218. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1219. {
  1220. u32 i;
  1221. u32 desc, time, count, base, data1;
  1222. u32 blink1, blink2, ilink1, ilink2;
  1223. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1224. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1225. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1226. return;
  1227. }
  1228. count = iwl_read_targ_mem(priv, base);
  1229. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1230. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1231. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1232. priv->status, count);
  1233. }
  1234. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1235. "ilink1 nmiPC Line\n");
  1236. for (i = ERROR_START_OFFSET;
  1237. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1238. i += ERROR_ELEM_SIZE) {
  1239. desc = iwl_read_targ_mem(priv, base + i);
  1240. time =
  1241. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1242. blink1 =
  1243. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1244. blink2 =
  1245. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1246. ilink1 =
  1247. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1248. ilink2 =
  1249. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1250. data1 =
  1251. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1252. IWL_ERR(priv,
  1253. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1254. desc_lookup(desc), desc, time, blink1, blink2,
  1255. ilink1, ilink2, data1);
  1256. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1257. 0, blink1, blink2, ilink1, ilink2);
  1258. }
  1259. }
  1260. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1261. /**
  1262. * iwl3945_print_event_log - Dump error event log to syslog
  1263. *
  1264. */
  1265. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1266. u32 num_events, u32 mode,
  1267. int pos, char **buf, size_t bufsz)
  1268. {
  1269. u32 i;
  1270. u32 base; /* SRAM byte address of event log header */
  1271. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1272. u32 ptr; /* SRAM byte address of log data */
  1273. u32 ev, time, data; /* event log data */
  1274. unsigned long reg_flags;
  1275. if (num_events == 0)
  1276. return pos;
  1277. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1278. if (mode == 0)
  1279. event_size = 2 * sizeof(u32);
  1280. else
  1281. event_size = 3 * sizeof(u32);
  1282. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1283. /* Make sure device is powered up for SRAM reads */
  1284. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1285. iwl_grab_nic_access(priv);
  1286. /* Set starting address; reads will auto-increment */
  1287. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1288. rmb();
  1289. /* "time" is actually "data" for mode 0 (no timestamp).
  1290. * place event id # at far right for easier visual parsing. */
  1291. for (i = 0; i < num_events; i++) {
  1292. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1293. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1294. if (mode == 0) {
  1295. /* data, ev */
  1296. if (bufsz) {
  1297. pos += scnprintf(*buf + pos, bufsz - pos,
  1298. "0x%08x:%04u\n",
  1299. time, ev);
  1300. } else {
  1301. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1302. trace_iwlwifi_dev_ucode_event(priv, 0,
  1303. time, ev);
  1304. }
  1305. } else {
  1306. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1307. if (bufsz) {
  1308. pos += scnprintf(*buf + pos, bufsz - pos,
  1309. "%010u:0x%08x:%04u\n",
  1310. time, data, ev);
  1311. } else {
  1312. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1313. time, data, ev);
  1314. trace_iwlwifi_dev_ucode_event(priv, time,
  1315. data, ev);
  1316. }
  1317. }
  1318. }
  1319. /* Allow device to power down */
  1320. iwl_release_nic_access(priv);
  1321. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1322. return pos;
  1323. }
  1324. /**
  1325. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1326. */
  1327. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1328. u32 num_wraps, u32 next_entry,
  1329. u32 size, u32 mode,
  1330. int pos, char **buf, size_t bufsz)
  1331. {
  1332. /*
  1333. * display the newest DEFAULT_LOG_ENTRIES entries
  1334. * i.e the entries just before the next ont that uCode would fill.
  1335. */
  1336. if (num_wraps) {
  1337. if (next_entry < size) {
  1338. pos = iwl3945_print_event_log(priv,
  1339. capacity - (size - next_entry),
  1340. size - next_entry, mode,
  1341. pos, buf, bufsz);
  1342. pos = iwl3945_print_event_log(priv, 0,
  1343. next_entry, mode,
  1344. pos, buf, bufsz);
  1345. } else
  1346. pos = iwl3945_print_event_log(priv, next_entry - size,
  1347. size, mode,
  1348. pos, buf, bufsz);
  1349. } else {
  1350. if (next_entry < size)
  1351. pos = iwl3945_print_event_log(priv, 0,
  1352. next_entry, mode,
  1353. pos, buf, bufsz);
  1354. else
  1355. pos = iwl3945_print_event_log(priv, next_entry - size,
  1356. size, mode,
  1357. pos, buf, bufsz);
  1358. }
  1359. return pos;
  1360. }
  1361. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1362. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1363. char **buf, bool display)
  1364. {
  1365. u32 base; /* SRAM byte address of event log header */
  1366. u32 capacity; /* event log capacity in # entries */
  1367. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1368. u32 num_wraps; /* # times uCode wrapped to top of log */
  1369. u32 next_entry; /* index of next entry to be written by uCode */
  1370. u32 size; /* # entries that we'll print */
  1371. int pos = 0;
  1372. size_t bufsz = 0;
  1373. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1374. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1375. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1376. return -EINVAL;
  1377. }
  1378. /* event log header */
  1379. capacity = iwl_read_targ_mem(priv, base);
  1380. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1381. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1382. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1383. if (capacity > priv->cfg->max_event_log_size) {
  1384. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1385. capacity, priv->cfg->max_event_log_size);
  1386. capacity = priv->cfg->max_event_log_size;
  1387. }
  1388. if (next_entry > priv->cfg->max_event_log_size) {
  1389. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1390. next_entry, priv->cfg->max_event_log_size);
  1391. next_entry = priv->cfg->max_event_log_size;
  1392. }
  1393. size = num_wraps ? capacity : next_entry;
  1394. /* bail out if nothing in log */
  1395. if (size == 0) {
  1396. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1397. return pos;
  1398. }
  1399. #ifdef CONFIG_IWLWIFI_DEBUG
  1400. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1401. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1402. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1403. #else
  1404. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1405. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1406. #endif
  1407. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1408. size);
  1409. #ifdef CONFIG_IWLWIFI_DEBUG
  1410. if (display) {
  1411. if (full_log)
  1412. bufsz = capacity * 48;
  1413. else
  1414. bufsz = size * 48;
  1415. *buf = kmalloc(bufsz, GFP_KERNEL);
  1416. if (!*buf)
  1417. return -ENOMEM;
  1418. }
  1419. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1420. /* if uCode has wrapped back to top of log,
  1421. * start at the oldest entry,
  1422. * i.e the next one that uCode would fill.
  1423. */
  1424. if (num_wraps)
  1425. pos = iwl3945_print_event_log(priv, next_entry,
  1426. capacity - next_entry, mode,
  1427. pos, buf, bufsz);
  1428. /* (then/else) start at top of log */
  1429. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1430. pos, buf, bufsz);
  1431. } else
  1432. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1433. next_entry, size, mode,
  1434. pos, buf, bufsz);
  1435. #else
  1436. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1437. next_entry, size, mode,
  1438. pos, buf, bufsz);
  1439. #endif
  1440. return pos;
  1441. }
  1442. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1443. {
  1444. u32 inta, handled = 0;
  1445. u32 inta_fh;
  1446. unsigned long flags;
  1447. #ifdef CONFIG_IWLWIFI_DEBUG
  1448. u32 inta_mask;
  1449. #endif
  1450. spin_lock_irqsave(&priv->lock, flags);
  1451. /* Ack/clear/reset pending uCode interrupts.
  1452. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1453. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1454. inta = iwl_read32(priv, CSR_INT);
  1455. iwl_write32(priv, CSR_INT, inta);
  1456. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1457. * Any new interrupts that happen after this, either while we're
  1458. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1459. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1460. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1461. #ifdef CONFIG_IWLWIFI_DEBUG
  1462. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1463. /* just for debug */
  1464. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1465. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1466. inta, inta_mask, inta_fh);
  1467. }
  1468. #endif
  1469. spin_unlock_irqrestore(&priv->lock, flags);
  1470. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1471. * atomic, make sure that inta covers all the interrupts that
  1472. * we've discovered, even if FH interrupt came in just after
  1473. * reading CSR_INT. */
  1474. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1475. inta |= CSR_INT_BIT_FH_RX;
  1476. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1477. inta |= CSR_INT_BIT_FH_TX;
  1478. /* Now service all interrupt bits discovered above. */
  1479. if (inta & CSR_INT_BIT_HW_ERR) {
  1480. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1481. /* Tell the device to stop sending interrupts */
  1482. iwl_disable_interrupts(priv);
  1483. priv->isr_stats.hw++;
  1484. iwl_irq_handle_error(priv);
  1485. handled |= CSR_INT_BIT_HW_ERR;
  1486. return;
  1487. }
  1488. #ifdef CONFIG_IWLWIFI_DEBUG
  1489. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1490. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1491. if (inta & CSR_INT_BIT_SCD) {
  1492. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1493. "the frame/frames.\n");
  1494. priv->isr_stats.sch++;
  1495. }
  1496. /* Alive notification via Rx interrupt will do the real work */
  1497. if (inta & CSR_INT_BIT_ALIVE) {
  1498. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1499. priv->isr_stats.alive++;
  1500. }
  1501. }
  1502. #endif
  1503. /* Safely ignore these bits for debug checks below */
  1504. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1505. /* Error detected by uCode */
  1506. if (inta & CSR_INT_BIT_SW_ERR) {
  1507. IWL_ERR(priv, "Microcode SW error detected. "
  1508. "Restarting 0x%X.\n", inta);
  1509. priv->isr_stats.sw++;
  1510. priv->isr_stats.sw_err = inta;
  1511. iwl_irq_handle_error(priv);
  1512. handled |= CSR_INT_BIT_SW_ERR;
  1513. }
  1514. /* uCode wakes up after power-down sleep */
  1515. if (inta & CSR_INT_BIT_WAKEUP) {
  1516. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1517. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1518. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1519. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1520. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1521. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1522. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1523. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1524. priv->isr_stats.wakeup++;
  1525. handled |= CSR_INT_BIT_WAKEUP;
  1526. }
  1527. /* All uCode command responses, including Tx command responses,
  1528. * Rx "responses" (frame-received notification), and other
  1529. * notifications from uCode come through here*/
  1530. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1531. iwl3945_rx_handle(priv);
  1532. priv->isr_stats.rx++;
  1533. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1534. }
  1535. if (inta & CSR_INT_BIT_FH_TX) {
  1536. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1537. priv->isr_stats.tx++;
  1538. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1539. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1540. (FH39_SRVC_CHNL), 0x0);
  1541. handled |= CSR_INT_BIT_FH_TX;
  1542. }
  1543. if (inta & ~handled) {
  1544. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1545. priv->isr_stats.unhandled++;
  1546. }
  1547. if (inta & ~priv->inta_mask) {
  1548. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1549. inta & ~priv->inta_mask);
  1550. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1551. }
  1552. /* Re-enable all interrupts */
  1553. /* only Re-enable if disabled by irq */
  1554. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1555. iwl_enable_interrupts(priv);
  1556. #ifdef CONFIG_IWLWIFI_DEBUG
  1557. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1558. inta = iwl_read32(priv, CSR_INT);
  1559. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1560. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1561. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1562. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1563. }
  1564. #endif
  1565. }
  1566. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1567. enum ieee80211_band band,
  1568. u8 is_active, u8 n_probes,
  1569. struct iwl3945_scan_channel *scan_ch)
  1570. {
  1571. struct ieee80211_channel *chan;
  1572. const struct ieee80211_supported_band *sband;
  1573. const struct iwl_channel_info *ch_info;
  1574. u16 passive_dwell = 0;
  1575. u16 active_dwell = 0;
  1576. int added, i;
  1577. sband = iwl_get_hw_mode(priv, band);
  1578. if (!sband)
  1579. return 0;
  1580. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1581. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1582. if (passive_dwell <= active_dwell)
  1583. passive_dwell = active_dwell + 1;
  1584. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1585. chan = priv->scan_request->channels[i];
  1586. if (chan->band != band)
  1587. continue;
  1588. scan_ch->channel = chan->hw_value;
  1589. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1590. if (!is_channel_valid(ch_info)) {
  1591. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1592. scan_ch->channel);
  1593. continue;
  1594. }
  1595. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1596. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1597. /* If passive , set up for auto-switch
  1598. * and use long active_dwell time.
  1599. */
  1600. if (!is_active || is_channel_passive(ch_info) ||
  1601. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1602. scan_ch->type = 0; /* passive */
  1603. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1604. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1605. } else {
  1606. scan_ch->type = 1; /* active */
  1607. }
  1608. /* Set direct probe bits. These may be used both for active
  1609. * scan channels (probes gets sent right away),
  1610. * or for passive channels (probes get se sent only after
  1611. * hearing clear Rx packet).*/
  1612. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1613. if (n_probes)
  1614. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1615. } else {
  1616. /* uCode v1 does not allow setting direct probe bits on
  1617. * passive channel. */
  1618. if ((scan_ch->type & 1) && n_probes)
  1619. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1620. }
  1621. /* Set txpower levels to defaults */
  1622. scan_ch->tpc.dsp_atten = 110;
  1623. /* scan_pwr_info->tpc.dsp_atten; */
  1624. /*scan_pwr_info->tpc.tx_gain; */
  1625. if (band == IEEE80211_BAND_5GHZ)
  1626. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1627. else {
  1628. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1629. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1630. * power level:
  1631. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1632. */
  1633. }
  1634. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1635. scan_ch->channel,
  1636. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1637. (scan_ch->type & 1) ?
  1638. active_dwell : passive_dwell);
  1639. scan_ch++;
  1640. added++;
  1641. }
  1642. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  1643. return added;
  1644. }
  1645. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1646. struct ieee80211_rate *rates)
  1647. {
  1648. int i;
  1649. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1650. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1651. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1652. rates[i].hw_value_short = i;
  1653. rates[i].flags = 0;
  1654. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1655. /*
  1656. * If CCK != 1M then set short preamble rate flag.
  1657. */
  1658. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1659. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1660. }
  1661. }
  1662. }
  1663. /******************************************************************************
  1664. *
  1665. * uCode download functions
  1666. *
  1667. ******************************************************************************/
  1668. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1669. {
  1670. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1671. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1672. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1673. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1674. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1675. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1676. }
  1677. /**
  1678. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1679. * looking at all data.
  1680. */
  1681. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1682. {
  1683. u32 val;
  1684. u32 save_len = len;
  1685. int rc = 0;
  1686. u32 errcnt;
  1687. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1688. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1689. IWL39_RTC_INST_LOWER_BOUND);
  1690. errcnt = 0;
  1691. for (; len > 0; len -= sizeof(u32), image++) {
  1692. /* read data comes through single port, auto-incr addr */
  1693. /* NOTE: Use the debugless read so we don't flood kernel log
  1694. * if IWL_DL_IO is set */
  1695. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1696. if (val != le32_to_cpu(*image)) {
  1697. IWL_ERR(priv, "uCode INST section is invalid at "
  1698. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1699. save_len - len, val, le32_to_cpu(*image));
  1700. rc = -EIO;
  1701. errcnt++;
  1702. if (errcnt >= 20)
  1703. break;
  1704. }
  1705. }
  1706. if (!errcnt)
  1707. IWL_DEBUG_INFO(priv,
  1708. "ucode image in INSTRUCTION memory is good\n");
  1709. return rc;
  1710. }
  1711. /**
  1712. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1713. * using sample data 100 bytes apart. If these sample points are good,
  1714. * it's a pretty good bet that everything between them is good, too.
  1715. */
  1716. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1717. {
  1718. u32 val;
  1719. int rc = 0;
  1720. u32 errcnt = 0;
  1721. u32 i;
  1722. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1723. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1724. /* read data comes through single port, auto-incr addr */
  1725. /* NOTE: Use the debugless read so we don't flood kernel log
  1726. * if IWL_DL_IO is set */
  1727. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1728. i + IWL39_RTC_INST_LOWER_BOUND);
  1729. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1730. if (val != le32_to_cpu(*image)) {
  1731. #if 0 /* Enable this if you want to see details */
  1732. IWL_ERR(priv, "uCode INST section is invalid at "
  1733. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1734. i, val, *image);
  1735. #endif
  1736. rc = -EIO;
  1737. errcnt++;
  1738. if (errcnt >= 3)
  1739. break;
  1740. }
  1741. }
  1742. return rc;
  1743. }
  1744. /**
  1745. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1746. * and verify its contents
  1747. */
  1748. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1749. {
  1750. __le32 *image;
  1751. u32 len;
  1752. int rc = 0;
  1753. /* Try bootstrap */
  1754. image = (__le32 *)priv->ucode_boot.v_addr;
  1755. len = priv->ucode_boot.len;
  1756. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1757. if (rc == 0) {
  1758. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1759. return 0;
  1760. }
  1761. /* Try initialize */
  1762. image = (__le32 *)priv->ucode_init.v_addr;
  1763. len = priv->ucode_init.len;
  1764. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1765. if (rc == 0) {
  1766. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1767. return 0;
  1768. }
  1769. /* Try runtime/protocol */
  1770. image = (__le32 *)priv->ucode_code.v_addr;
  1771. len = priv->ucode_code.len;
  1772. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1773. if (rc == 0) {
  1774. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1775. return 0;
  1776. }
  1777. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1778. /* Since nothing seems to match, show first several data entries in
  1779. * instruction SRAM, so maybe visual inspection will give a clue.
  1780. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1781. image = (__le32 *)priv->ucode_boot.v_addr;
  1782. len = priv->ucode_boot.len;
  1783. rc = iwl3945_verify_inst_full(priv, image, len);
  1784. return rc;
  1785. }
  1786. static void iwl3945_nic_start(struct iwl_priv *priv)
  1787. {
  1788. /* Remove all resets to allow NIC to operate */
  1789. iwl_write32(priv, CSR_RESET, 0);
  1790. }
  1791. /**
  1792. * iwl3945_read_ucode - Read uCode images from disk file.
  1793. *
  1794. * Copy into buffers for card to fetch via bus-mastering
  1795. */
  1796. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1797. {
  1798. const struct iwl_ucode_header *ucode;
  1799. int ret = -EINVAL, index;
  1800. const struct firmware *ucode_raw;
  1801. /* firmware file name contains uCode/driver compatibility version */
  1802. const char *name_pre = priv->cfg->fw_name_pre;
  1803. const unsigned int api_max = priv->cfg->ucode_api_max;
  1804. const unsigned int api_min = priv->cfg->ucode_api_min;
  1805. char buf[25];
  1806. u8 *src;
  1807. size_t len;
  1808. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1809. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1810. * request_firmware() is synchronous, file is in memory on return. */
  1811. for (index = api_max; index >= api_min; index--) {
  1812. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1813. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1814. if (ret < 0) {
  1815. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1816. buf, ret);
  1817. if (ret == -ENOENT)
  1818. continue;
  1819. else
  1820. goto error;
  1821. } else {
  1822. if (index < api_max)
  1823. IWL_ERR(priv, "Loaded firmware %s, "
  1824. "which is deprecated. "
  1825. " Please use API v%u instead.\n",
  1826. buf, api_max);
  1827. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1828. "(%zd bytes) from disk\n",
  1829. buf, ucode_raw->size);
  1830. break;
  1831. }
  1832. }
  1833. if (ret < 0)
  1834. goto error;
  1835. /* Make sure that we got at least our header! */
  1836. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1837. IWL_ERR(priv, "File size way too small!\n");
  1838. ret = -EINVAL;
  1839. goto err_release;
  1840. }
  1841. /* Data from ucode file: header followed by uCode images */
  1842. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1843. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1844. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1845. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1846. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1847. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1848. init_data_size =
  1849. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1850. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1851. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1852. /* api_ver should match the api version forming part of the
  1853. * firmware filename ... but we don't check for that and only rely
  1854. * on the API version read from firmware header from here on forward */
  1855. if (api_ver < api_min || api_ver > api_max) {
  1856. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1857. "Driver supports v%u, firmware is v%u.\n",
  1858. api_max, api_ver);
  1859. priv->ucode_ver = 0;
  1860. ret = -EINVAL;
  1861. goto err_release;
  1862. }
  1863. if (api_ver != api_max)
  1864. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1865. "got %u. New firmware can be obtained "
  1866. "from http://www.intellinuxwireless.org.\n",
  1867. api_max, api_ver);
  1868. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1869. IWL_UCODE_MAJOR(priv->ucode_ver),
  1870. IWL_UCODE_MINOR(priv->ucode_ver),
  1871. IWL_UCODE_API(priv->ucode_ver),
  1872. IWL_UCODE_SERIAL(priv->ucode_ver));
  1873. snprintf(priv->hw->wiphy->fw_version,
  1874. sizeof(priv->hw->wiphy->fw_version),
  1875. "%u.%u.%u.%u",
  1876. IWL_UCODE_MAJOR(priv->ucode_ver),
  1877. IWL_UCODE_MINOR(priv->ucode_ver),
  1878. IWL_UCODE_API(priv->ucode_ver),
  1879. IWL_UCODE_SERIAL(priv->ucode_ver));
  1880. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1881. priv->ucode_ver);
  1882. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1883. inst_size);
  1884. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1885. data_size);
  1886. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1887. init_size);
  1888. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1889. init_data_size);
  1890. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1891. boot_size);
  1892. /* Verify size of file vs. image size info in file's header */
  1893. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1894. inst_size + data_size + init_size +
  1895. init_data_size + boot_size) {
  1896. IWL_DEBUG_INFO(priv,
  1897. "uCode file size %zd does not match expected size\n",
  1898. ucode_raw->size);
  1899. ret = -EINVAL;
  1900. goto err_release;
  1901. }
  1902. /* Verify that uCode images will fit in card's SRAM */
  1903. if (inst_size > IWL39_MAX_INST_SIZE) {
  1904. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1905. inst_size);
  1906. ret = -EINVAL;
  1907. goto err_release;
  1908. }
  1909. if (data_size > IWL39_MAX_DATA_SIZE) {
  1910. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1911. data_size);
  1912. ret = -EINVAL;
  1913. goto err_release;
  1914. }
  1915. if (init_size > IWL39_MAX_INST_SIZE) {
  1916. IWL_DEBUG_INFO(priv,
  1917. "uCode init instr len %d too large to fit in\n",
  1918. init_size);
  1919. ret = -EINVAL;
  1920. goto err_release;
  1921. }
  1922. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1923. IWL_DEBUG_INFO(priv,
  1924. "uCode init data len %d too large to fit in\n",
  1925. init_data_size);
  1926. ret = -EINVAL;
  1927. goto err_release;
  1928. }
  1929. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1930. IWL_DEBUG_INFO(priv,
  1931. "uCode boot instr len %d too large to fit in\n",
  1932. boot_size);
  1933. ret = -EINVAL;
  1934. goto err_release;
  1935. }
  1936. /* Allocate ucode buffers for card's bus-master loading ... */
  1937. /* Runtime instructions and 2 copies of data:
  1938. * 1) unmodified from disk
  1939. * 2) backup cache for save/restore during power-downs */
  1940. priv->ucode_code.len = inst_size;
  1941. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1942. priv->ucode_data.len = data_size;
  1943. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1944. priv->ucode_data_backup.len = data_size;
  1945. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1946. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1947. !priv->ucode_data_backup.v_addr)
  1948. goto err_pci_alloc;
  1949. /* Initialization instructions and data */
  1950. if (init_size && init_data_size) {
  1951. priv->ucode_init.len = init_size;
  1952. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1953. priv->ucode_init_data.len = init_data_size;
  1954. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1955. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1956. goto err_pci_alloc;
  1957. }
  1958. /* Bootstrap (instructions only, no data) */
  1959. if (boot_size) {
  1960. priv->ucode_boot.len = boot_size;
  1961. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1962. if (!priv->ucode_boot.v_addr)
  1963. goto err_pci_alloc;
  1964. }
  1965. /* Copy images into buffers for card's bus-master reads ... */
  1966. /* Runtime instructions (first block of data in file) */
  1967. len = inst_size;
  1968. IWL_DEBUG_INFO(priv,
  1969. "Copying (but not loading) uCode instr len %zd\n", len);
  1970. memcpy(priv->ucode_code.v_addr, src, len);
  1971. src += len;
  1972. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1973. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1974. /* Runtime data (2nd block)
  1975. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1976. len = data_size;
  1977. IWL_DEBUG_INFO(priv,
  1978. "Copying (but not loading) uCode data len %zd\n", len);
  1979. memcpy(priv->ucode_data.v_addr, src, len);
  1980. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1981. src += len;
  1982. /* Initialization instructions (3rd block) */
  1983. if (init_size) {
  1984. len = init_size;
  1985. IWL_DEBUG_INFO(priv,
  1986. "Copying (but not loading) init instr len %zd\n", len);
  1987. memcpy(priv->ucode_init.v_addr, src, len);
  1988. src += len;
  1989. }
  1990. /* Initialization data (4th block) */
  1991. if (init_data_size) {
  1992. len = init_data_size;
  1993. IWL_DEBUG_INFO(priv,
  1994. "Copying (but not loading) init data len %zd\n", len);
  1995. memcpy(priv->ucode_init_data.v_addr, src, len);
  1996. src += len;
  1997. }
  1998. /* Bootstrap instructions (5th block) */
  1999. len = boot_size;
  2000. IWL_DEBUG_INFO(priv,
  2001. "Copying (but not loading) boot instr len %zd\n", len);
  2002. memcpy(priv->ucode_boot.v_addr, src, len);
  2003. /* We have our copies now, allow OS release its copies */
  2004. release_firmware(ucode_raw);
  2005. return 0;
  2006. err_pci_alloc:
  2007. IWL_ERR(priv, "failed to allocate pci memory\n");
  2008. ret = -ENOMEM;
  2009. iwl3945_dealloc_ucode_pci(priv);
  2010. err_release:
  2011. release_firmware(ucode_raw);
  2012. error:
  2013. return ret;
  2014. }
  2015. /**
  2016. * iwl3945_set_ucode_ptrs - Set uCode address location
  2017. *
  2018. * Tell initialization uCode where to find runtime uCode.
  2019. *
  2020. * BSM registers initially contain pointers to initialization uCode.
  2021. * We need to replace them to load runtime uCode inst and data,
  2022. * and to save runtime data when powering down.
  2023. */
  2024. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2025. {
  2026. dma_addr_t pinst;
  2027. dma_addr_t pdata;
  2028. /* bits 31:0 for 3945 */
  2029. pinst = priv->ucode_code.p_addr;
  2030. pdata = priv->ucode_data_backup.p_addr;
  2031. /* Tell bootstrap uCode where to find image to load */
  2032. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2033. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2034. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2035. priv->ucode_data.len);
  2036. /* Inst byte count must be last to set up, bit 31 signals uCode
  2037. * that all new ptr/size info is in place */
  2038. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2039. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2040. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2041. return 0;
  2042. }
  2043. /**
  2044. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2045. *
  2046. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2047. *
  2048. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2049. */
  2050. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2051. {
  2052. /* Check alive response for "valid" sign from uCode */
  2053. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2054. /* We had an error bringing up the hardware, so take it
  2055. * all the way back down so we can try again */
  2056. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2057. goto restart;
  2058. }
  2059. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2060. * This is a paranoid check, because we would not have gotten the
  2061. * "initialize" alive if code weren't properly loaded. */
  2062. if (iwl3945_verify_ucode(priv)) {
  2063. /* Runtime instruction load was bad;
  2064. * take it all the way back down so we can try again */
  2065. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2066. goto restart;
  2067. }
  2068. /* Send pointers to protocol/runtime uCode image ... init code will
  2069. * load and launch runtime uCode, which will send us another "Alive"
  2070. * notification. */
  2071. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2072. if (iwl3945_set_ucode_ptrs(priv)) {
  2073. /* Runtime instruction load won't happen;
  2074. * take it all the way back down so we can try again */
  2075. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2076. goto restart;
  2077. }
  2078. return;
  2079. restart:
  2080. queue_work(priv->workqueue, &priv->restart);
  2081. }
  2082. /**
  2083. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2084. * from protocol/runtime uCode (initialization uCode's
  2085. * Alive gets handled by iwl3945_init_alive_start()).
  2086. */
  2087. static void iwl3945_alive_start(struct iwl_priv *priv)
  2088. {
  2089. int thermal_spin = 0;
  2090. u32 rfkill;
  2091. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2092. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2093. /* We had an error bringing up the hardware, so take it
  2094. * all the way back down so we can try again */
  2095. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2096. goto restart;
  2097. }
  2098. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2099. * This is a paranoid check, because we would not have gotten the
  2100. * "runtime" alive if code weren't properly loaded. */
  2101. if (iwl3945_verify_ucode(priv)) {
  2102. /* Runtime instruction load was bad;
  2103. * take it all the way back down so we can try again */
  2104. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2105. goto restart;
  2106. }
  2107. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2108. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2109. if (rfkill & 0x1) {
  2110. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2111. /* if RFKILL is not on, then wait for thermal
  2112. * sensor in adapter to kick in */
  2113. while (iwl3945_hw_get_temperature(priv) == 0) {
  2114. thermal_spin++;
  2115. udelay(10);
  2116. }
  2117. if (thermal_spin)
  2118. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2119. thermal_spin * 10);
  2120. } else
  2121. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2122. /* After the ALIVE response, we can send commands to 3945 uCode */
  2123. set_bit(STATUS_ALIVE, &priv->status);
  2124. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  2125. /* Enable timer to monitor the driver queues */
  2126. mod_timer(&priv->monitor_recover,
  2127. jiffies +
  2128. msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2129. }
  2130. if (iwl_is_rfkill(priv))
  2131. return;
  2132. ieee80211_wake_queues(priv->hw);
  2133. priv->active_rate = IWL_RATES_MASK;
  2134. iwl_power_update_mode(priv, true);
  2135. if (iwl_is_associated(priv)) {
  2136. struct iwl3945_rxon_cmd *active_rxon =
  2137. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2138. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2139. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2140. } else {
  2141. /* Initialize our rx_config data */
  2142. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2143. }
  2144. /* Configure Bluetooth device coexistence support */
  2145. priv->cfg->ops->hcmd->send_bt_config(priv);
  2146. /* Configure the adapter for unassociated operation */
  2147. iwlcore_commit_rxon(priv);
  2148. iwl3945_reg_txpower_periodic(priv);
  2149. iwl_leds_init(priv);
  2150. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2151. set_bit(STATUS_READY, &priv->status);
  2152. wake_up_interruptible(&priv->wait_command_queue);
  2153. return;
  2154. restart:
  2155. queue_work(priv->workqueue, &priv->restart);
  2156. }
  2157. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2158. static void __iwl3945_down(struct iwl_priv *priv)
  2159. {
  2160. unsigned long flags;
  2161. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2162. struct ieee80211_conf *conf = NULL;
  2163. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2164. conf = ieee80211_get_hw_conf(priv->hw);
  2165. if (!exit_pending)
  2166. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2167. /* Station information will now be cleared in device */
  2168. iwl_clear_ucode_stations(priv, true);
  2169. /* Unblock any waiting calls */
  2170. wake_up_interruptible_all(&priv->wait_command_queue);
  2171. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2172. * exiting the module */
  2173. if (!exit_pending)
  2174. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2175. /* stop and reset the on-board processor */
  2176. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2177. /* tell the device to stop sending interrupts */
  2178. spin_lock_irqsave(&priv->lock, flags);
  2179. iwl_disable_interrupts(priv);
  2180. spin_unlock_irqrestore(&priv->lock, flags);
  2181. iwl_synchronize_irq(priv);
  2182. if (priv->mac80211_registered)
  2183. ieee80211_stop_queues(priv->hw);
  2184. /* If we have not previously called iwl3945_init() then
  2185. * clear all bits but the RF Kill bits and return */
  2186. if (!iwl_is_init(priv)) {
  2187. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2188. STATUS_RF_KILL_HW |
  2189. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2190. STATUS_GEO_CONFIGURED |
  2191. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2192. STATUS_EXIT_PENDING;
  2193. goto exit;
  2194. }
  2195. /* ...otherwise clear out all the status bits but the RF Kill
  2196. * bit and continue taking the NIC down. */
  2197. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2198. STATUS_RF_KILL_HW |
  2199. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2200. STATUS_GEO_CONFIGURED |
  2201. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2202. STATUS_FW_ERROR |
  2203. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2204. STATUS_EXIT_PENDING;
  2205. iwl3945_hw_txq_ctx_stop(priv);
  2206. iwl3945_hw_rxq_stop(priv);
  2207. /* Power-down device's busmaster DMA clocks */
  2208. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2209. udelay(5);
  2210. /* Stop the device, and put it in low power state */
  2211. priv->cfg->ops->lib->apm_ops.stop(priv);
  2212. exit:
  2213. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2214. if (priv->ibss_beacon)
  2215. dev_kfree_skb(priv->ibss_beacon);
  2216. priv->ibss_beacon = NULL;
  2217. /* clear out any free frames */
  2218. iwl3945_clear_free_frames(priv);
  2219. }
  2220. static void iwl3945_down(struct iwl_priv *priv)
  2221. {
  2222. mutex_lock(&priv->mutex);
  2223. __iwl3945_down(priv);
  2224. mutex_unlock(&priv->mutex);
  2225. iwl3945_cancel_deferred_work(priv);
  2226. }
  2227. #define MAX_HW_RESTARTS 5
  2228. static int __iwl3945_up(struct iwl_priv *priv)
  2229. {
  2230. int rc, i;
  2231. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2232. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2233. return -EIO;
  2234. }
  2235. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2236. IWL_ERR(priv, "ucode not available for device bring up\n");
  2237. return -EIO;
  2238. }
  2239. /* If platform's RF_KILL switch is NOT set to KILL */
  2240. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2241. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2242. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2243. else {
  2244. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2245. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2246. return -ENODEV;
  2247. }
  2248. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2249. rc = iwl3945_hw_nic_init(priv);
  2250. if (rc) {
  2251. IWL_ERR(priv, "Unable to int nic\n");
  2252. return rc;
  2253. }
  2254. /* make sure rfkill handshake bits are cleared */
  2255. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2256. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2257. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2258. /* clear (again), then enable host interrupts */
  2259. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2260. iwl_enable_interrupts(priv);
  2261. /* really make sure rfkill handshake bits are cleared */
  2262. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2263. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2264. /* Copy original ucode data image from disk into backup cache.
  2265. * This will be used to initialize the on-board processor's
  2266. * data SRAM for a clean start when the runtime program first loads. */
  2267. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2268. priv->ucode_data.len);
  2269. /* We return success when we resume from suspend and rf_kill is on. */
  2270. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2271. return 0;
  2272. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2273. /* load bootstrap state machine,
  2274. * load bootstrap program into processor's memory,
  2275. * prepare to load the "initialize" uCode */
  2276. rc = priv->cfg->ops->lib->load_ucode(priv);
  2277. if (rc) {
  2278. IWL_ERR(priv,
  2279. "Unable to set up bootstrap uCode: %d\n", rc);
  2280. continue;
  2281. }
  2282. /* start card; "initialize" will load runtime ucode */
  2283. iwl3945_nic_start(priv);
  2284. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2285. return 0;
  2286. }
  2287. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2288. __iwl3945_down(priv);
  2289. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2290. /* tried to restart and config the device for as long as our
  2291. * patience could withstand */
  2292. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2293. return -EIO;
  2294. }
  2295. /*****************************************************************************
  2296. *
  2297. * Workqueue callbacks
  2298. *
  2299. *****************************************************************************/
  2300. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2301. {
  2302. struct iwl_priv *priv =
  2303. container_of(data, struct iwl_priv, init_alive_start.work);
  2304. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2305. return;
  2306. mutex_lock(&priv->mutex);
  2307. iwl3945_init_alive_start(priv);
  2308. mutex_unlock(&priv->mutex);
  2309. }
  2310. static void iwl3945_bg_alive_start(struct work_struct *data)
  2311. {
  2312. struct iwl_priv *priv =
  2313. container_of(data, struct iwl_priv, alive_start.work);
  2314. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2315. return;
  2316. mutex_lock(&priv->mutex);
  2317. iwl3945_alive_start(priv);
  2318. mutex_unlock(&priv->mutex);
  2319. }
  2320. /*
  2321. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2322. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2323. * *is* readable even when device has been SW_RESET into low power mode
  2324. * (e.g. during RF KILL).
  2325. */
  2326. static void iwl3945_rfkill_poll(struct work_struct *data)
  2327. {
  2328. struct iwl_priv *priv =
  2329. container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
  2330. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2331. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2332. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2333. if (new_rfkill != old_rfkill) {
  2334. if (new_rfkill)
  2335. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2336. else
  2337. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2338. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2339. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2340. new_rfkill ? "disable radio" : "enable radio");
  2341. }
  2342. /* Keep this running, even if radio now enabled. This will be
  2343. * cancelled in mac_start() if system decides to start again */
  2344. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2345. round_jiffies_relative(2 * HZ));
  2346. }
  2347. void iwl3945_request_scan(struct iwl_priv *priv)
  2348. {
  2349. struct iwl_host_cmd cmd = {
  2350. .id = REPLY_SCAN_CMD,
  2351. .len = sizeof(struct iwl3945_scan_cmd),
  2352. .flags = CMD_SIZE_HUGE,
  2353. };
  2354. struct iwl3945_scan_cmd *scan;
  2355. struct ieee80211_conf *conf = NULL;
  2356. u8 n_probes = 0;
  2357. enum ieee80211_band band;
  2358. bool is_active = false;
  2359. conf = ieee80211_get_hw_conf(priv->hw);
  2360. cancel_delayed_work(&priv->scan_check);
  2361. if (!iwl_is_ready(priv)) {
  2362. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2363. goto done;
  2364. }
  2365. /* Make sure the scan wasn't canceled before this queued work
  2366. * was given the chance to run... */
  2367. if (!test_bit(STATUS_SCANNING, &priv->status))
  2368. goto done;
  2369. /* This should never be called or scheduled if there is currently
  2370. * a scan active in the hardware. */
  2371. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2372. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2373. "Ignoring second request.\n");
  2374. goto done;
  2375. }
  2376. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2377. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2378. goto done;
  2379. }
  2380. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2381. IWL_DEBUG_HC(priv,
  2382. "Scan request while abort pending. Queuing.\n");
  2383. goto done;
  2384. }
  2385. if (iwl_is_rfkill(priv)) {
  2386. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2387. goto done;
  2388. }
  2389. if (!test_bit(STATUS_READY, &priv->status)) {
  2390. IWL_DEBUG_HC(priv,
  2391. "Scan request while uninitialized. Queuing.\n");
  2392. goto done;
  2393. }
  2394. if (!priv->scan_cmd) {
  2395. priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2396. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2397. if (!priv->scan_cmd) {
  2398. IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
  2399. goto done;
  2400. }
  2401. }
  2402. scan = priv->scan_cmd;
  2403. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2404. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2405. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2406. if (iwl_is_associated(priv)) {
  2407. u16 interval = 0;
  2408. u32 extra;
  2409. u32 suspend_time = 100;
  2410. u32 scan_suspend_time = 100;
  2411. unsigned long flags;
  2412. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2413. spin_lock_irqsave(&priv->lock, flags);
  2414. interval = priv->beacon_int;
  2415. spin_unlock_irqrestore(&priv->lock, flags);
  2416. scan->suspend_time = 0;
  2417. scan->max_out_time = cpu_to_le32(200 * 1024);
  2418. if (!interval)
  2419. interval = suspend_time;
  2420. /*
  2421. * suspend time format:
  2422. * 0-19: beacon interval in usec (time before exec.)
  2423. * 20-23: 0
  2424. * 24-31: number of beacons (suspend between channels)
  2425. */
  2426. extra = (suspend_time / interval) << 24;
  2427. scan_suspend_time = 0xFF0FFFFF &
  2428. (extra | ((suspend_time % interval) * 1024));
  2429. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2430. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2431. scan_suspend_time, interval);
  2432. }
  2433. if (priv->is_internal_short_scan) {
  2434. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  2435. } else if (priv->scan_request->n_ssids) {
  2436. int i, p = 0;
  2437. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2438. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2439. /* always does wildcard anyway */
  2440. if (!priv->scan_request->ssids[i].ssid_len)
  2441. continue;
  2442. scan->direct_scan[p].id = WLAN_EID_SSID;
  2443. scan->direct_scan[p].len =
  2444. priv->scan_request->ssids[i].ssid_len;
  2445. memcpy(scan->direct_scan[p].ssid,
  2446. priv->scan_request->ssids[i].ssid,
  2447. priv->scan_request->ssids[i].ssid_len);
  2448. n_probes++;
  2449. p++;
  2450. }
  2451. is_active = true;
  2452. } else
  2453. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2454. /* We don't build a direct scan probe request; the uCode will do
  2455. * that based on the direct_mask added to each channel entry */
  2456. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2457. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2458. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2459. /* flags + rate selection */
  2460. switch (priv->scan_band) {
  2461. case IEEE80211_BAND_2GHZ:
  2462. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2463. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2464. scan->good_CRC_th = 0;
  2465. band = IEEE80211_BAND_2GHZ;
  2466. break;
  2467. case IEEE80211_BAND_5GHZ:
  2468. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2469. /*
  2470. * If active scaning is requested but a certain channel
  2471. * is marked passive, we can do active scanning if we
  2472. * detect transmissions.
  2473. */
  2474. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  2475. IWL_GOOD_CRC_TH_DISABLED;
  2476. band = IEEE80211_BAND_5GHZ;
  2477. break;
  2478. default:
  2479. IWL_WARN(priv, "Invalid scan band\n");
  2480. goto done;
  2481. }
  2482. if (!priv->is_internal_short_scan) {
  2483. scan->tx_cmd.len = cpu_to_le16(
  2484. iwl_fill_probe_req(priv,
  2485. (struct ieee80211_mgmt *)scan->data,
  2486. priv->scan_request->ie,
  2487. priv->scan_request->ie_len,
  2488. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2489. } else {
  2490. scan->tx_cmd.len = cpu_to_le16(
  2491. iwl_fill_probe_req(priv,
  2492. (struct ieee80211_mgmt *)scan->data,
  2493. NULL, 0,
  2494. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2495. }
  2496. /* select Rx antennas */
  2497. scan->flags |= iwl3945_get_antenna_flags(priv);
  2498. scan->channel_count =
  2499. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2500. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2501. if (scan->channel_count == 0) {
  2502. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2503. goto done;
  2504. }
  2505. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2506. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2507. cmd.data = scan;
  2508. scan->len = cpu_to_le16(cmd.len);
  2509. set_bit(STATUS_SCAN_HW, &priv->status);
  2510. if (iwl_send_cmd_sync(priv, &cmd))
  2511. goto done;
  2512. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2513. IWL_SCAN_CHECK_WATCHDOG);
  2514. return;
  2515. done:
  2516. /* can not perform scan make sure we clear scanning
  2517. * bits from status so next scan request can be performed.
  2518. * if we dont clear scanning status bit here all next scan
  2519. * will fail
  2520. */
  2521. clear_bit(STATUS_SCAN_HW, &priv->status);
  2522. clear_bit(STATUS_SCANNING, &priv->status);
  2523. /* inform mac80211 scan aborted */
  2524. queue_work(priv->workqueue, &priv->scan_completed);
  2525. }
  2526. static void iwl3945_bg_restart(struct work_struct *data)
  2527. {
  2528. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2529. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2530. return;
  2531. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2532. mutex_lock(&priv->mutex);
  2533. priv->vif = NULL;
  2534. priv->is_open = 0;
  2535. mutex_unlock(&priv->mutex);
  2536. iwl3945_down(priv);
  2537. ieee80211_restart_hw(priv->hw);
  2538. } else {
  2539. iwl3945_down(priv);
  2540. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2541. return;
  2542. mutex_lock(&priv->mutex);
  2543. __iwl3945_up(priv);
  2544. mutex_unlock(&priv->mutex);
  2545. }
  2546. }
  2547. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2548. {
  2549. struct iwl_priv *priv =
  2550. container_of(data, struct iwl_priv, rx_replenish);
  2551. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2552. return;
  2553. mutex_lock(&priv->mutex);
  2554. iwl3945_rx_replenish(priv);
  2555. mutex_unlock(&priv->mutex);
  2556. }
  2557. void iwl3945_post_associate(struct iwl_priv *priv)
  2558. {
  2559. int rc = 0;
  2560. struct ieee80211_conf *conf = NULL;
  2561. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2562. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2563. return;
  2564. }
  2565. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2566. priv->assoc_id, priv->active_rxon.bssid_addr);
  2567. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2568. return;
  2569. if (!priv->vif || !priv->is_open)
  2570. return;
  2571. iwl_scan_cancel_timeout(priv, 200);
  2572. conf = ieee80211_get_hw_conf(priv->hw);
  2573. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2574. iwlcore_commit_rxon(priv);
  2575. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2576. iwl_setup_rxon_timing(priv);
  2577. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2578. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2579. if (rc)
  2580. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2581. "Attempting to continue.\n");
  2582. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2583. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2584. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2585. priv->assoc_id, priv->beacon_int);
  2586. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2587. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2588. else
  2589. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2590. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2591. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2592. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2593. else
  2594. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2595. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2596. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2597. }
  2598. iwlcore_commit_rxon(priv);
  2599. switch (priv->iw_mode) {
  2600. case NL80211_IFTYPE_STATION:
  2601. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2602. break;
  2603. case NL80211_IFTYPE_ADHOC:
  2604. priv->assoc_id = 1;
  2605. iwl_add_local_station(priv, priv->bssid, false);
  2606. iwl3945_sync_sta(priv, IWL_STA_ID,
  2607. (priv->band == IEEE80211_BAND_5GHZ) ?
  2608. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2609. CMD_ASYNC);
  2610. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2611. iwl3945_send_beacon_cmd(priv);
  2612. break;
  2613. default:
  2614. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2615. __func__, priv->iw_mode);
  2616. break;
  2617. }
  2618. }
  2619. /*****************************************************************************
  2620. *
  2621. * mac80211 entry point functions
  2622. *
  2623. *****************************************************************************/
  2624. #define UCODE_READY_TIMEOUT (2 * HZ)
  2625. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2626. {
  2627. struct iwl_priv *priv = hw->priv;
  2628. int ret;
  2629. IWL_DEBUG_MAC80211(priv, "enter\n");
  2630. /* we should be verifying the device is ready to be opened */
  2631. mutex_lock(&priv->mutex);
  2632. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2633. * ucode filename and max sizes are card-specific. */
  2634. if (!priv->ucode_code.len) {
  2635. ret = iwl3945_read_ucode(priv);
  2636. if (ret) {
  2637. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2638. mutex_unlock(&priv->mutex);
  2639. goto out_release_irq;
  2640. }
  2641. }
  2642. ret = __iwl3945_up(priv);
  2643. mutex_unlock(&priv->mutex);
  2644. if (ret)
  2645. goto out_release_irq;
  2646. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2647. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2648. * mac80211 will not be run successfully. */
  2649. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2650. test_bit(STATUS_READY, &priv->status),
  2651. UCODE_READY_TIMEOUT);
  2652. if (!ret) {
  2653. if (!test_bit(STATUS_READY, &priv->status)) {
  2654. IWL_ERR(priv,
  2655. "Wait for START_ALIVE timeout after %dms.\n",
  2656. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2657. ret = -ETIMEDOUT;
  2658. goto out_release_irq;
  2659. }
  2660. }
  2661. /* ucode is running and will send rfkill notifications,
  2662. * no need to poll the killswitch state anymore */
  2663. cancel_delayed_work(&priv->_3945.rfkill_poll);
  2664. iwl_led_start(priv);
  2665. priv->is_open = 1;
  2666. IWL_DEBUG_MAC80211(priv, "leave\n");
  2667. return 0;
  2668. out_release_irq:
  2669. priv->is_open = 0;
  2670. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2671. return ret;
  2672. }
  2673. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2674. {
  2675. struct iwl_priv *priv = hw->priv;
  2676. IWL_DEBUG_MAC80211(priv, "enter\n");
  2677. if (!priv->is_open) {
  2678. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2679. return;
  2680. }
  2681. priv->is_open = 0;
  2682. if (iwl_is_ready_rf(priv)) {
  2683. /* stop mac, cancel any scan request and clear
  2684. * RXON_FILTER_ASSOC_MSK BIT
  2685. */
  2686. mutex_lock(&priv->mutex);
  2687. iwl_scan_cancel_timeout(priv, 100);
  2688. mutex_unlock(&priv->mutex);
  2689. }
  2690. iwl3945_down(priv);
  2691. flush_workqueue(priv->workqueue);
  2692. /* start polling the killswitch state again */
  2693. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2694. round_jiffies_relative(2 * HZ));
  2695. IWL_DEBUG_MAC80211(priv, "leave\n");
  2696. }
  2697. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2698. {
  2699. struct iwl_priv *priv = hw->priv;
  2700. IWL_DEBUG_MAC80211(priv, "enter\n");
  2701. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2702. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2703. if (iwl3945_tx_skb(priv, skb))
  2704. dev_kfree_skb_any(skb);
  2705. IWL_DEBUG_MAC80211(priv, "leave\n");
  2706. return NETDEV_TX_OK;
  2707. }
  2708. void iwl3945_config_ap(struct iwl_priv *priv)
  2709. {
  2710. int rc = 0;
  2711. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2712. return;
  2713. /* The following should be done only at AP bring up */
  2714. if (!(iwl_is_associated(priv))) {
  2715. /* RXON - unassoc (to set timing command) */
  2716. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2717. iwlcore_commit_rxon(priv);
  2718. /* RXON Timing */
  2719. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2720. iwl_setup_rxon_timing(priv);
  2721. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2722. sizeof(priv->rxon_timing),
  2723. &priv->rxon_timing);
  2724. if (rc)
  2725. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2726. "Attempting to continue.\n");
  2727. /* FIXME: what should be the assoc_id for AP? */
  2728. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2729. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2730. priv->staging_rxon.flags |=
  2731. RXON_FLG_SHORT_PREAMBLE_MSK;
  2732. else
  2733. priv->staging_rxon.flags &=
  2734. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2735. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2736. if (priv->assoc_capability &
  2737. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2738. priv->staging_rxon.flags |=
  2739. RXON_FLG_SHORT_SLOT_MSK;
  2740. else
  2741. priv->staging_rxon.flags &=
  2742. ~RXON_FLG_SHORT_SLOT_MSK;
  2743. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2744. priv->staging_rxon.flags &=
  2745. ~RXON_FLG_SHORT_SLOT_MSK;
  2746. }
  2747. /* restore RXON assoc */
  2748. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2749. iwlcore_commit_rxon(priv);
  2750. iwl_add_local_station(priv, iwl_bcast_addr, false);
  2751. }
  2752. iwl3945_send_beacon_cmd(priv);
  2753. /* FIXME - we need to add code here to detect a totally new
  2754. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2755. * clear sta table, add BCAST sta... */
  2756. }
  2757. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2758. struct ieee80211_vif *vif,
  2759. struct ieee80211_sta *sta,
  2760. struct ieee80211_key_conf *key)
  2761. {
  2762. struct iwl_priv *priv = hw->priv;
  2763. const u8 *addr;
  2764. int ret = 0;
  2765. u8 sta_id = IWL_INVALID_STATION;
  2766. u8 static_key;
  2767. IWL_DEBUG_MAC80211(priv, "enter\n");
  2768. if (iwl3945_mod_params.sw_crypto) {
  2769. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2770. return -EOPNOTSUPP;
  2771. }
  2772. addr = sta ? sta->addr : iwl_bcast_addr;
  2773. static_key = !iwl_is_associated(priv);
  2774. if (!static_key) {
  2775. sta_id = iwl_find_station(priv, addr);
  2776. if (sta_id == IWL_INVALID_STATION) {
  2777. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2778. addr);
  2779. return -EINVAL;
  2780. }
  2781. }
  2782. mutex_lock(&priv->mutex);
  2783. iwl_scan_cancel_timeout(priv, 100);
  2784. switch (cmd) {
  2785. case SET_KEY:
  2786. if (static_key)
  2787. ret = iwl3945_set_static_key(priv, key);
  2788. else
  2789. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2790. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2791. break;
  2792. case DISABLE_KEY:
  2793. if (static_key)
  2794. ret = iwl3945_remove_static_key(priv);
  2795. else
  2796. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2797. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2798. break;
  2799. default:
  2800. ret = -EINVAL;
  2801. }
  2802. mutex_unlock(&priv->mutex);
  2803. IWL_DEBUG_MAC80211(priv, "leave\n");
  2804. return ret;
  2805. }
  2806. static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
  2807. struct ieee80211_vif *vif,
  2808. struct ieee80211_sta *sta)
  2809. {
  2810. struct iwl_priv *priv = hw->priv;
  2811. int ret;
  2812. bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
  2813. u8 sta_id;
  2814. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2815. sta->addr);
  2816. ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
  2817. &sta_id);
  2818. if (ret) {
  2819. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2820. sta->addr, ret);
  2821. /* Should we return success if return code is EEXIST ? */
  2822. return ret;
  2823. }
  2824. /* Initialize rate scaling */
  2825. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2826. sta->addr);
  2827. iwl3945_rs_rate_init(priv, sta, sta_id);
  2828. return 0;
  2829. return ret;
  2830. }
  2831. /*****************************************************************************
  2832. *
  2833. * sysfs attributes
  2834. *
  2835. *****************************************************************************/
  2836. #ifdef CONFIG_IWLWIFI_DEBUG
  2837. /*
  2838. * The following adds a new attribute to the sysfs representation
  2839. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2840. * used for controlling the debug level.
  2841. *
  2842. * See the level definitions in iwl for details.
  2843. *
  2844. * The debug_level being managed using sysfs below is a per device debug
  2845. * level that is used instead of the global debug level if it (the per
  2846. * device debug level) is set.
  2847. */
  2848. static ssize_t show_debug_level(struct device *d,
  2849. struct device_attribute *attr, char *buf)
  2850. {
  2851. struct iwl_priv *priv = dev_get_drvdata(d);
  2852. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2853. }
  2854. static ssize_t store_debug_level(struct device *d,
  2855. struct device_attribute *attr,
  2856. const char *buf, size_t count)
  2857. {
  2858. struct iwl_priv *priv = dev_get_drvdata(d);
  2859. unsigned long val;
  2860. int ret;
  2861. ret = strict_strtoul(buf, 0, &val);
  2862. if (ret)
  2863. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2864. else {
  2865. priv->debug_level = val;
  2866. if (iwl_alloc_traffic_mem(priv))
  2867. IWL_ERR(priv,
  2868. "Not enough memory to generate traffic log\n");
  2869. }
  2870. return strnlen(buf, count);
  2871. }
  2872. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2873. show_debug_level, store_debug_level);
  2874. #endif /* CONFIG_IWLWIFI_DEBUG */
  2875. static ssize_t show_temperature(struct device *d,
  2876. struct device_attribute *attr, char *buf)
  2877. {
  2878. struct iwl_priv *priv = dev_get_drvdata(d);
  2879. if (!iwl_is_alive(priv))
  2880. return -EAGAIN;
  2881. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2882. }
  2883. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2884. static ssize_t show_tx_power(struct device *d,
  2885. struct device_attribute *attr, char *buf)
  2886. {
  2887. struct iwl_priv *priv = dev_get_drvdata(d);
  2888. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2889. }
  2890. static ssize_t store_tx_power(struct device *d,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. struct iwl_priv *priv = dev_get_drvdata(d);
  2895. char *p = (char *)buf;
  2896. u32 val;
  2897. val = simple_strtoul(p, &p, 10);
  2898. if (p == buf)
  2899. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2900. else
  2901. iwl3945_hw_reg_set_txpower(priv, val);
  2902. return count;
  2903. }
  2904. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2905. static ssize_t show_flags(struct device *d,
  2906. struct device_attribute *attr, char *buf)
  2907. {
  2908. struct iwl_priv *priv = dev_get_drvdata(d);
  2909. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2910. }
  2911. static ssize_t store_flags(struct device *d,
  2912. struct device_attribute *attr,
  2913. const char *buf, size_t count)
  2914. {
  2915. struct iwl_priv *priv = dev_get_drvdata(d);
  2916. u32 flags = simple_strtoul(buf, NULL, 0);
  2917. mutex_lock(&priv->mutex);
  2918. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2919. /* Cancel any currently running scans... */
  2920. if (iwl_scan_cancel_timeout(priv, 100))
  2921. IWL_WARN(priv, "Could not cancel scan.\n");
  2922. else {
  2923. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2924. flags);
  2925. priv->staging_rxon.flags = cpu_to_le32(flags);
  2926. iwlcore_commit_rxon(priv);
  2927. }
  2928. }
  2929. mutex_unlock(&priv->mutex);
  2930. return count;
  2931. }
  2932. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2933. static ssize_t show_filter_flags(struct device *d,
  2934. struct device_attribute *attr, char *buf)
  2935. {
  2936. struct iwl_priv *priv = dev_get_drvdata(d);
  2937. return sprintf(buf, "0x%04X\n",
  2938. le32_to_cpu(priv->active_rxon.filter_flags));
  2939. }
  2940. static ssize_t store_filter_flags(struct device *d,
  2941. struct device_attribute *attr,
  2942. const char *buf, size_t count)
  2943. {
  2944. struct iwl_priv *priv = dev_get_drvdata(d);
  2945. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2946. mutex_lock(&priv->mutex);
  2947. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2948. /* Cancel any currently running scans... */
  2949. if (iwl_scan_cancel_timeout(priv, 100))
  2950. IWL_WARN(priv, "Could not cancel scan.\n");
  2951. else {
  2952. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2953. "0x%04X\n", filter_flags);
  2954. priv->staging_rxon.filter_flags =
  2955. cpu_to_le32(filter_flags);
  2956. iwlcore_commit_rxon(priv);
  2957. }
  2958. }
  2959. mutex_unlock(&priv->mutex);
  2960. return count;
  2961. }
  2962. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2963. store_filter_flags);
  2964. static ssize_t show_measurement(struct device *d,
  2965. struct device_attribute *attr, char *buf)
  2966. {
  2967. struct iwl_priv *priv = dev_get_drvdata(d);
  2968. struct iwl_spectrum_notification measure_report;
  2969. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2970. u8 *data = (u8 *)&measure_report;
  2971. unsigned long flags;
  2972. spin_lock_irqsave(&priv->lock, flags);
  2973. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2974. spin_unlock_irqrestore(&priv->lock, flags);
  2975. return 0;
  2976. }
  2977. memcpy(&measure_report, &priv->measure_report, size);
  2978. priv->measurement_status = 0;
  2979. spin_unlock_irqrestore(&priv->lock, flags);
  2980. while (size && (PAGE_SIZE - len)) {
  2981. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2982. PAGE_SIZE - len, 1);
  2983. len = strlen(buf);
  2984. if (PAGE_SIZE - len)
  2985. buf[len++] = '\n';
  2986. ofs += 16;
  2987. size -= min(size, 16U);
  2988. }
  2989. return len;
  2990. }
  2991. static ssize_t store_measurement(struct device *d,
  2992. struct device_attribute *attr,
  2993. const char *buf, size_t count)
  2994. {
  2995. struct iwl_priv *priv = dev_get_drvdata(d);
  2996. struct ieee80211_measurement_params params = {
  2997. .channel = le16_to_cpu(priv->active_rxon.channel),
  2998. .start_time = cpu_to_le64(priv->_3945.last_tsf),
  2999. .duration = cpu_to_le16(1),
  3000. };
  3001. u8 type = IWL_MEASURE_BASIC;
  3002. u8 buffer[32];
  3003. u8 channel;
  3004. if (count) {
  3005. char *p = buffer;
  3006. strncpy(buffer, buf, min(sizeof(buffer), count));
  3007. channel = simple_strtoul(p, NULL, 0);
  3008. if (channel)
  3009. params.channel = channel;
  3010. p = buffer;
  3011. while (*p && *p != ' ')
  3012. p++;
  3013. if (*p)
  3014. type = simple_strtoul(p + 1, NULL, 0);
  3015. }
  3016. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3017. "channel %d (for '%s')\n", type, params.channel, buf);
  3018. iwl3945_get_measurement(priv, &params, type);
  3019. return count;
  3020. }
  3021. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3022. show_measurement, store_measurement);
  3023. static ssize_t store_retry_rate(struct device *d,
  3024. struct device_attribute *attr,
  3025. const char *buf, size_t count)
  3026. {
  3027. struct iwl_priv *priv = dev_get_drvdata(d);
  3028. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3029. if (priv->retry_rate <= 0)
  3030. priv->retry_rate = 1;
  3031. return count;
  3032. }
  3033. static ssize_t show_retry_rate(struct device *d,
  3034. struct device_attribute *attr, char *buf)
  3035. {
  3036. struct iwl_priv *priv = dev_get_drvdata(d);
  3037. return sprintf(buf, "%d", priv->retry_rate);
  3038. }
  3039. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3040. store_retry_rate);
  3041. static ssize_t show_channels(struct device *d,
  3042. struct device_attribute *attr, char *buf)
  3043. {
  3044. /* all this shit doesn't belong into sysfs anyway */
  3045. return 0;
  3046. }
  3047. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3048. static ssize_t show_antenna(struct device *d,
  3049. struct device_attribute *attr, char *buf)
  3050. {
  3051. struct iwl_priv *priv = dev_get_drvdata(d);
  3052. if (!iwl_is_alive(priv))
  3053. return -EAGAIN;
  3054. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3055. }
  3056. static ssize_t store_antenna(struct device *d,
  3057. struct device_attribute *attr,
  3058. const char *buf, size_t count)
  3059. {
  3060. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3061. int ant;
  3062. if (count == 0)
  3063. return 0;
  3064. if (sscanf(buf, "%1i", &ant) != 1) {
  3065. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3066. return count;
  3067. }
  3068. if ((ant >= 0) && (ant <= 2)) {
  3069. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3070. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3071. } else
  3072. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3073. return count;
  3074. }
  3075. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3076. static ssize_t show_status(struct device *d,
  3077. struct device_attribute *attr, char *buf)
  3078. {
  3079. struct iwl_priv *priv = dev_get_drvdata(d);
  3080. if (!iwl_is_alive(priv))
  3081. return -EAGAIN;
  3082. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3083. }
  3084. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3085. static ssize_t dump_error_log(struct device *d,
  3086. struct device_attribute *attr,
  3087. const char *buf, size_t count)
  3088. {
  3089. struct iwl_priv *priv = dev_get_drvdata(d);
  3090. char *p = (char *)buf;
  3091. if (p[0] == '1')
  3092. iwl3945_dump_nic_error_log(priv);
  3093. return strnlen(buf, count);
  3094. }
  3095. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3096. /*****************************************************************************
  3097. *
  3098. * driver setup and tear down
  3099. *
  3100. *****************************************************************************/
  3101. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3102. {
  3103. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3104. init_waitqueue_head(&priv->wait_command_queue);
  3105. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3106. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3107. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3108. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3109. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3110. INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
  3111. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3112. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3113. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3114. iwl3945_hw_setup_deferred_work(priv);
  3115. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  3116. init_timer(&priv->monitor_recover);
  3117. priv->monitor_recover.data = (unsigned long)priv;
  3118. priv->monitor_recover.function =
  3119. priv->cfg->ops->lib->recover_from_tx_stall;
  3120. }
  3121. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3122. iwl3945_irq_tasklet, (unsigned long)priv);
  3123. }
  3124. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3125. {
  3126. iwl3945_hw_cancel_deferred_work(priv);
  3127. cancel_delayed_work_sync(&priv->init_alive_start);
  3128. cancel_delayed_work(&priv->scan_check);
  3129. cancel_delayed_work(&priv->alive_start);
  3130. cancel_work_sync(&priv->beacon_update);
  3131. if (priv->cfg->ops->lib->recover_from_tx_stall)
  3132. del_timer_sync(&priv->monitor_recover);
  3133. }
  3134. static struct attribute *iwl3945_sysfs_entries[] = {
  3135. &dev_attr_antenna.attr,
  3136. &dev_attr_channels.attr,
  3137. &dev_attr_dump_errors.attr,
  3138. &dev_attr_flags.attr,
  3139. &dev_attr_filter_flags.attr,
  3140. &dev_attr_measurement.attr,
  3141. &dev_attr_retry_rate.attr,
  3142. &dev_attr_status.attr,
  3143. &dev_attr_temperature.attr,
  3144. &dev_attr_tx_power.attr,
  3145. #ifdef CONFIG_IWLWIFI_DEBUG
  3146. &dev_attr_debug_level.attr,
  3147. #endif
  3148. NULL
  3149. };
  3150. static struct attribute_group iwl3945_attribute_group = {
  3151. .name = NULL, /* put in device directory */
  3152. .attrs = iwl3945_sysfs_entries,
  3153. };
  3154. static struct ieee80211_ops iwl3945_hw_ops = {
  3155. .tx = iwl3945_mac_tx,
  3156. .start = iwl3945_mac_start,
  3157. .stop = iwl3945_mac_stop,
  3158. .add_interface = iwl_mac_add_interface,
  3159. .remove_interface = iwl_mac_remove_interface,
  3160. .config = iwl_mac_config,
  3161. .configure_filter = iwl_configure_filter,
  3162. .set_key = iwl3945_mac_set_key,
  3163. .conf_tx = iwl_mac_conf_tx,
  3164. .reset_tsf = iwl_mac_reset_tsf,
  3165. .bss_info_changed = iwl_bss_info_changed,
  3166. .hw_scan = iwl_mac_hw_scan,
  3167. .sta_add = iwl3945_mac_sta_add,
  3168. .sta_remove = iwl_mac_sta_remove,
  3169. };
  3170. static int iwl3945_init_drv(struct iwl_priv *priv)
  3171. {
  3172. int ret;
  3173. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3174. priv->retry_rate = 1;
  3175. priv->ibss_beacon = NULL;
  3176. spin_lock_init(&priv->sta_lock);
  3177. spin_lock_init(&priv->hcmd_lock);
  3178. INIT_LIST_HEAD(&priv->free_frames);
  3179. mutex_init(&priv->mutex);
  3180. mutex_init(&priv->sync_cmd_mutex);
  3181. priv->ieee_channels = NULL;
  3182. priv->ieee_rates = NULL;
  3183. priv->band = IEEE80211_BAND_2GHZ;
  3184. priv->iw_mode = NL80211_IFTYPE_STATION;
  3185. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3186. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3187. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3188. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3189. eeprom->version);
  3190. ret = -EINVAL;
  3191. goto err;
  3192. }
  3193. ret = iwl_init_channel_map(priv);
  3194. if (ret) {
  3195. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3196. goto err;
  3197. }
  3198. /* Set up txpower settings in driver for all channels */
  3199. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3200. ret = -EIO;
  3201. goto err_free_channel_map;
  3202. }
  3203. ret = iwlcore_init_geos(priv);
  3204. if (ret) {
  3205. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3206. goto err_free_channel_map;
  3207. }
  3208. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3209. return 0;
  3210. err_free_channel_map:
  3211. iwl_free_channel_map(priv);
  3212. err:
  3213. return ret;
  3214. }
  3215. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3216. {
  3217. int ret;
  3218. struct ieee80211_hw *hw = priv->hw;
  3219. hw->rate_control_algorithm = "iwl-3945-rs";
  3220. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3221. /* Tell mac80211 our characteristics */
  3222. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3223. IEEE80211_HW_SPECTRUM_MGMT;
  3224. if (!priv->cfg->broken_powersave)
  3225. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3226. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3227. hw->wiphy->interface_modes =
  3228. BIT(NL80211_IFTYPE_STATION) |
  3229. BIT(NL80211_IFTYPE_ADHOC);
  3230. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3231. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3232. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3233. /* we create the 802.11 header and a zero-length SSID element */
  3234. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3235. /* Default value; 4 EDCA QOS priorities */
  3236. hw->queues = 4;
  3237. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3238. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3239. &priv->bands[IEEE80211_BAND_2GHZ];
  3240. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3241. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3242. &priv->bands[IEEE80211_BAND_5GHZ];
  3243. ret = ieee80211_register_hw(priv->hw);
  3244. if (ret) {
  3245. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3246. return ret;
  3247. }
  3248. priv->mac80211_registered = 1;
  3249. return 0;
  3250. }
  3251. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3252. {
  3253. int err = 0;
  3254. struct iwl_priv *priv;
  3255. struct ieee80211_hw *hw;
  3256. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3257. struct iwl3945_eeprom *eeprom;
  3258. unsigned long flags;
  3259. /***********************
  3260. * 1. Allocating HW data
  3261. * ********************/
  3262. /* mac80211 allocates memory for this device instance, including
  3263. * space for this driver's private structure */
  3264. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3265. if (hw == NULL) {
  3266. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3267. err = -ENOMEM;
  3268. goto out;
  3269. }
  3270. priv = hw->priv;
  3271. SET_IEEE80211_DEV(hw, &pdev->dev);
  3272. /*
  3273. * Disabling hardware scan means that mac80211 will perform scans
  3274. * "the hard way", rather than using device's scan.
  3275. */
  3276. if (iwl3945_mod_params.disable_hw_scan) {
  3277. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3278. iwl3945_hw_ops.hw_scan = NULL;
  3279. }
  3280. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3281. priv->cfg = cfg;
  3282. priv->pci_dev = pdev;
  3283. priv->inta_mask = CSR_INI_SET_MASK;
  3284. #ifdef CONFIG_IWLWIFI_DEBUG
  3285. atomic_set(&priv->restrict_refcnt, 0);
  3286. #endif
  3287. if (iwl_alloc_traffic_mem(priv))
  3288. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3289. /***************************
  3290. * 2. Initializing PCI bus
  3291. * *************************/
  3292. if (pci_enable_device(pdev)) {
  3293. err = -ENODEV;
  3294. goto out_ieee80211_free_hw;
  3295. }
  3296. pci_set_master(pdev);
  3297. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3298. if (!err)
  3299. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3300. if (err) {
  3301. IWL_WARN(priv, "No suitable DMA available.\n");
  3302. goto out_pci_disable_device;
  3303. }
  3304. pci_set_drvdata(pdev, priv);
  3305. err = pci_request_regions(pdev, DRV_NAME);
  3306. if (err)
  3307. goto out_pci_disable_device;
  3308. /***********************
  3309. * 3. Read REV Register
  3310. * ********************/
  3311. priv->hw_base = pci_iomap(pdev, 0, 0);
  3312. if (!priv->hw_base) {
  3313. err = -ENODEV;
  3314. goto out_pci_release_regions;
  3315. }
  3316. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3317. (unsigned long long) pci_resource_len(pdev, 0));
  3318. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3319. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3320. * PCI Tx retries from interfering with C3 CPU state */
  3321. pci_write_config_byte(pdev, 0x41, 0x00);
  3322. /* these spin locks will be used in apm_ops.init and EEPROM access
  3323. * we should init now
  3324. */
  3325. spin_lock_init(&priv->reg_lock);
  3326. spin_lock_init(&priv->lock);
  3327. /*
  3328. * stop and reset the on-board processor just in case it is in a
  3329. * strange state ... like being left stranded by a primary kernel
  3330. * and this is now the kdump kernel trying to start up
  3331. */
  3332. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3333. /***********************
  3334. * 4. Read EEPROM
  3335. * ********************/
  3336. /* Read the EEPROM */
  3337. err = iwl_eeprom_init(priv);
  3338. if (err) {
  3339. IWL_ERR(priv, "Unable to init EEPROM\n");
  3340. goto out_iounmap;
  3341. }
  3342. /* MAC Address location in EEPROM same for 3945/4965 */
  3343. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3344. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3345. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3346. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3347. /***********************
  3348. * 5. Setup HW Constants
  3349. * ********************/
  3350. /* Device-specific setup */
  3351. if (iwl3945_hw_set_hw_params(priv)) {
  3352. IWL_ERR(priv, "failed to set hw settings\n");
  3353. goto out_eeprom_free;
  3354. }
  3355. /***********************
  3356. * 6. Setup priv
  3357. * ********************/
  3358. err = iwl3945_init_drv(priv);
  3359. if (err) {
  3360. IWL_ERR(priv, "initializing driver failed\n");
  3361. goto out_unset_hw_params;
  3362. }
  3363. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3364. priv->cfg->name);
  3365. /***********************
  3366. * 7. Setup Services
  3367. * ********************/
  3368. spin_lock_irqsave(&priv->lock, flags);
  3369. iwl_disable_interrupts(priv);
  3370. spin_unlock_irqrestore(&priv->lock, flags);
  3371. pci_enable_msi(priv->pci_dev);
  3372. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3373. IRQF_SHARED, DRV_NAME, priv);
  3374. if (err) {
  3375. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3376. goto out_disable_msi;
  3377. }
  3378. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3379. if (err) {
  3380. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3381. goto out_release_irq;
  3382. }
  3383. iwl_set_rxon_channel(priv,
  3384. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3385. iwl3945_setup_deferred_work(priv);
  3386. iwl3945_setup_rx_handlers(priv);
  3387. iwl_power_initialize(priv);
  3388. /*********************************
  3389. * 8. Setup and Register mac80211
  3390. * *******************************/
  3391. iwl_enable_interrupts(priv);
  3392. err = iwl3945_setup_mac(priv);
  3393. if (err)
  3394. goto out_remove_sysfs;
  3395. err = iwl_dbgfs_register(priv, DRV_NAME);
  3396. if (err)
  3397. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3398. /* Start monitoring the killswitch */
  3399. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  3400. 2 * HZ);
  3401. return 0;
  3402. out_remove_sysfs:
  3403. destroy_workqueue(priv->workqueue);
  3404. priv->workqueue = NULL;
  3405. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3406. out_release_irq:
  3407. free_irq(priv->pci_dev->irq, priv);
  3408. out_disable_msi:
  3409. pci_disable_msi(priv->pci_dev);
  3410. iwlcore_free_geos(priv);
  3411. iwl_free_channel_map(priv);
  3412. out_unset_hw_params:
  3413. iwl3945_unset_hw_params(priv);
  3414. out_eeprom_free:
  3415. iwl_eeprom_free(priv);
  3416. out_iounmap:
  3417. pci_iounmap(pdev, priv->hw_base);
  3418. out_pci_release_regions:
  3419. pci_release_regions(pdev);
  3420. out_pci_disable_device:
  3421. pci_set_drvdata(pdev, NULL);
  3422. pci_disable_device(pdev);
  3423. out_ieee80211_free_hw:
  3424. iwl_free_traffic_mem(priv);
  3425. ieee80211_free_hw(priv->hw);
  3426. out:
  3427. return err;
  3428. }
  3429. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3430. {
  3431. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3432. unsigned long flags;
  3433. if (!priv)
  3434. return;
  3435. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3436. iwl_dbgfs_unregister(priv);
  3437. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3438. if (priv->mac80211_registered) {
  3439. ieee80211_unregister_hw(priv->hw);
  3440. priv->mac80211_registered = 0;
  3441. } else {
  3442. iwl3945_down(priv);
  3443. }
  3444. /*
  3445. * Make sure device is reset to low power before unloading driver.
  3446. * This may be redundant with iwl_down(), but there are paths to
  3447. * run iwl_down() without calling apm_ops.stop(), and there are
  3448. * paths to avoid running iwl_down() at all before leaving driver.
  3449. * This (inexpensive) call *makes sure* device is reset.
  3450. */
  3451. priv->cfg->ops->lib->apm_ops.stop(priv);
  3452. /* make sure we flush any pending irq or
  3453. * tasklet for the driver
  3454. */
  3455. spin_lock_irqsave(&priv->lock, flags);
  3456. iwl_disable_interrupts(priv);
  3457. spin_unlock_irqrestore(&priv->lock, flags);
  3458. iwl_synchronize_irq(priv);
  3459. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3460. cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
  3461. iwl3945_dealloc_ucode_pci(priv);
  3462. if (priv->rxq.bd)
  3463. iwl3945_rx_queue_free(priv, &priv->rxq);
  3464. iwl3945_hw_txq_ctx_free(priv);
  3465. iwl3945_unset_hw_params(priv);
  3466. /*netif_stop_queue(dev); */
  3467. flush_workqueue(priv->workqueue);
  3468. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3469. * priv->workqueue... so we can't take down the workqueue
  3470. * until now... */
  3471. destroy_workqueue(priv->workqueue);
  3472. priv->workqueue = NULL;
  3473. iwl_free_traffic_mem(priv);
  3474. free_irq(pdev->irq, priv);
  3475. pci_disable_msi(pdev);
  3476. pci_iounmap(pdev, priv->hw_base);
  3477. pci_release_regions(pdev);
  3478. pci_disable_device(pdev);
  3479. pci_set_drvdata(pdev, NULL);
  3480. iwl_free_channel_map(priv);
  3481. iwlcore_free_geos(priv);
  3482. kfree(priv->scan_cmd);
  3483. if (priv->ibss_beacon)
  3484. dev_kfree_skb(priv->ibss_beacon);
  3485. ieee80211_free_hw(priv->hw);
  3486. }
  3487. /*****************************************************************************
  3488. *
  3489. * driver and module entry point
  3490. *
  3491. *****************************************************************************/
  3492. static struct pci_driver iwl3945_driver = {
  3493. .name = DRV_NAME,
  3494. .id_table = iwl3945_hw_card_ids,
  3495. .probe = iwl3945_pci_probe,
  3496. .remove = __devexit_p(iwl3945_pci_remove),
  3497. #ifdef CONFIG_PM
  3498. .suspend = iwl_pci_suspend,
  3499. .resume = iwl_pci_resume,
  3500. #endif
  3501. };
  3502. static int __init iwl3945_init(void)
  3503. {
  3504. int ret;
  3505. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3506. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3507. ret = iwl3945_rate_control_register();
  3508. if (ret) {
  3509. printk(KERN_ERR DRV_NAME
  3510. "Unable to register rate control algorithm: %d\n", ret);
  3511. return ret;
  3512. }
  3513. ret = pci_register_driver(&iwl3945_driver);
  3514. if (ret) {
  3515. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3516. goto error_register;
  3517. }
  3518. return ret;
  3519. error_register:
  3520. iwl3945_rate_control_unregister();
  3521. return ret;
  3522. }
  3523. static void __exit iwl3945_exit(void)
  3524. {
  3525. pci_unregister_driver(&iwl3945_driver);
  3526. iwl3945_rate_control_unregister();
  3527. }
  3528. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3529. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3530. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3531. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3532. MODULE_PARM_DESC(swcrypto,
  3533. "using software crypto (default 1 [software])\n");
  3534. #ifdef CONFIG_IWLWIFI_DEBUG
  3535. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3536. MODULE_PARM_DESC(debug, "debug output mask");
  3537. #endif
  3538. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3539. int, S_IRUGO);
  3540. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3541. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3542. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3543. module_exit(iwl3945_exit);
  3544. module_init(iwl3945_init);