iwl-core.c 83 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl core");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. static bool bt_coex_active = true;
  63. module_param(bt_coex_active, bool, S_IRUGO);
  64. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  65. static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  66. {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  67. 0, COEX_UNASSOC_IDLE_FLAGS},
  68. {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  69. 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  70. {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  71. 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  72. {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  73. 0, COEX_CALIBRATION_FLAGS},
  74. {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  75. 0, COEX_PERIODIC_CALIBRATION_FLAGS},
  76. {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  77. 0, COEX_CONNECTION_ESTAB_FLAGS},
  78. {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  79. 0, COEX_ASSOCIATED_IDLE_FLAGS},
  80. {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  81. 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  82. {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  83. 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  84. {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  85. 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  86. {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  87. {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  88. {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  89. 0, COEX_STAND_ALONE_DEBUG_FLAGS},
  90. {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  91. 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  92. {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  93. {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  94. };
  95. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  96. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  97. IWL_RATE_SISO_##s##M_PLCP, \
  98. IWL_RATE_MIMO2_##s##M_PLCP,\
  99. IWL_RATE_MIMO3_##s##M_PLCP,\
  100. IWL_RATE_##r##M_IEEE, \
  101. IWL_RATE_##ip##M_INDEX, \
  102. IWL_RATE_##in##M_INDEX, \
  103. IWL_RATE_##rp##M_INDEX, \
  104. IWL_RATE_##rn##M_INDEX, \
  105. IWL_RATE_##pp##M_INDEX, \
  106. IWL_RATE_##np##M_INDEX }
  107. u32 iwl_debug_level;
  108. EXPORT_SYMBOL(iwl_debug_level);
  109. /*
  110. * Parameter order:
  111. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  112. *
  113. * If there isn't a valid next or previous rate then INV is used which
  114. * maps to IWL_RATE_INVALID
  115. *
  116. */
  117. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  118. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  119. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  120. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  121. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  122. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  123. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  124. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  125. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  126. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  127. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  128. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  129. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  130. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  131. /* FIXME:RS: ^^ should be INV (legacy) */
  132. };
  133. EXPORT_SYMBOL(iwl_rates);
  134. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  135. {
  136. int idx = 0;
  137. /* HT rate format */
  138. if (rate_n_flags & RATE_MCS_HT_MSK) {
  139. idx = (rate_n_flags & 0xff);
  140. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  141. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  142. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  143. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  144. idx += IWL_FIRST_OFDM_RATE;
  145. /* skip 9M not supported in ht*/
  146. if (idx >= IWL_RATE_9M_INDEX)
  147. idx += 1;
  148. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  149. return idx;
  150. /* legacy rate format, search for match in table */
  151. } else {
  152. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  153. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  154. return idx;
  155. }
  156. return -1;
  157. }
  158. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  159. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  160. {
  161. int i;
  162. u8 ind = ant;
  163. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  164. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  165. if (priv->hw_params.valid_tx_ant & BIT(ind))
  166. return ind;
  167. }
  168. return ant;
  169. }
  170. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  171. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  172. EXPORT_SYMBOL(iwl_bcast_addr);
  173. /* This function both allocates and initializes hw and priv. */
  174. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  175. struct ieee80211_ops *hw_ops)
  176. {
  177. struct iwl_priv *priv;
  178. /* mac80211 allocates memory for this device instance, including
  179. * space for this driver's private structure */
  180. struct ieee80211_hw *hw =
  181. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  182. if (hw == NULL) {
  183. printk(KERN_ERR "%s: Can not allocate network device\n",
  184. cfg->name);
  185. goto out;
  186. }
  187. priv = hw->priv;
  188. priv->hw = hw;
  189. out:
  190. return hw;
  191. }
  192. EXPORT_SYMBOL(iwl_alloc_all);
  193. void iwl_hw_detect(struct iwl_priv *priv)
  194. {
  195. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  196. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  197. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  198. }
  199. EXPORT_SYMBOL(iwl_hw_detect);
  200. /*
  201. * QoS support
  202. */
  203. static void iwl_update_qos(struct iwl_priv *priv)
  204. {
  205. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  206. return;
  207. priv->qos_data.def_qos_parm.qos_flags = 0;
  208. if (priv->qos_data.qos_active)
  209. priv->qos_data.def_qos_parm.qos_flags |=
  210. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  211. if (priv->current_ht_config.is_ht)
  212. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  213. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  214. priv->qos_data.qos_active,
  215. priv->qos_data.def_qos_parm.qos_flags);
  216. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  217. sizeof(struct iwl_qosparam_cmd),
  218. &priv->qos_data.def_qos_parm, NULL);
  219. }
  220. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  221. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  222. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  223. struct ieee80211_sta_ht_cap *ht_info,
  224. enum ieee80211_band band)
  225. {
  226. u16 max_bit_rate = 0;
  227. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  228. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  229. ht_info->cap = 0;
  230. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  231. ht_info->ht_supported = true;
  232. if (priv->cfg->ht_greenfield_support)
  233. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  234. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  235. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  236. if (priv->hw_params.ht40_channel & BIT(band)) {
  237. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  238. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  239. ht_info->mcs.rx_mask[4] = 0x01;
  240. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  241. }
  242. if (priv->cfg->mod_params->amsdu_size_8K)
  243. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  244. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  245. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  246. ht_info->mcs.rx_mask[0] = 0xFF;
  247. if (rx_chains_num >= 2)
  248. ht_info->mcs.rx_mask[1] = 0xFF;
  249. if (rx_chains_num >= 3)
  250. ht_info->mcs.rx_mask[2] = 0xFF;
  251. /* Highest supported Rx data rate */
  252. max_bit_rate *= rx_chains_num;
  253. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  254. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  255. /* Tx MCS capabilities */
  256. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  257. if (tx_chains_num != rx_chains_num) {
  258. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  259. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  260. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  261. }
  262. }
  263. /**
  264. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  265. */
  266. int iwlcore_init_geos(struct iwl_priv *priv)
  267. {
  268. struct iwl_channel_info *ch;
  269. struct ieee80211_supported_band *sband;
  270. struct ieee80211_channel *channels;
  271. struct ieee80211_channel *geo_ch;
  272. struct ieee80211_rate *rates;
  273. int i = 0;
  274. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  275. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  276. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  277. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  278. return 0;
  279. }
  280. channels = kzalloc(sizeof(struct ieee80211_channel) *
  281. priv->channel_count, GFP_KERNEL);
  282. if (!channels)
  283. return -ENOMEM;
  284. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  285. GFP_KERNEL);
  286. if (!rates) {
  287. kfree(channels);
  288. return -ENOMEM;
  289. }
  290. /* 5.2GHz channels start after the 2.4GHz channels */
  291. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  292. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  293. /* just OFDM */
  294. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  295. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  296. if (priv->cfg->sku & IWL_SKU_N)
  297. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  298. IEEE80211_BAND_5GHZ);
  299. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  300. sband->channels = channels;
  301. /* OFDM & CCK */
  302. sband->bitrates = rates;
  303. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  304. if (priv->cfg->sku & IWL_SKU_N)
  305. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  306. IEEE80211_BAND_2GHZ);
  307. priv->ieee_channels = channels;
  308. priv->ieee_rates = rates;
  309. for (i = 0; i < priv->channel_count; i++) {
  310. ch = &priv->channel_info[i];
  311. /* FIXME: might be removed if scan is OK */
  312. if (!is_channel_valid(ch))
  313. continue;
  314. if (is_channel_a_band(ch))
  315. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  316. else
  317. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  318. geo_ch = &sband->channels[sband->n_channels++];
  319. geo_ch->center_freq =
  320. ieee80211_channel_to_frequency(ch->channel);
  321. geo_ch->max_power = ch->max_power_avg;
  322. geo_ch->max_antenna_gain = 0xff;
  323. geo_ch->hw_value = ch->channel;
  324. if (is_channel_valid(ch)) {
  325. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  326. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  327. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  328. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  329. if (ch->flags & EEPROM_CHANNEL_RADAR)
  330. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  331. geo_ch->flags |= ch->ht40_extension_channel;
  332. if (ch->max_power_avg > priv->tx_power_device_lmt)
  333. priv->tx_power_device_lmt = ch->max_power_avg;
  334. } else {
  335. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  336. }
  337. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  338. ch->channel, geo_ch->center_freq,
  339. is_channel_a_band(ch) ? "5.2" : "2.4",
  340. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  341. "restricted" : "valid",
  342. geo_ch->flags);
  343. }
  344. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  345. priv->cfg->sku & IWL_SKU_A) {
  346. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  347. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  348. priv->pci_dev->device,
  349. priv->pci_dev->subsystem_device);
  350. priv->cfg->sku &= ~IWL_SKU_A;
  351. }
  352. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  353. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  354. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  355. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(iwlcore_init_geos);
  359. /*
  360. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  361. */
  362. void iwlcore_free_geos(struct iwl_priv *priv)
  363. {
  364. kfree(priv->ieee_channels);
  365. kfree(priv->ieee_rates);
  366. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  367. }
  368. EXPORT_SYMBOL(iwlcore_free_geos);
  369. /*
  370. * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
  371. * function.
  372. */
  373. void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
  374. __le32 *tx_flags)
  375. {
  376. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  377. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  378. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  379. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  380. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  381. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  382. }
  383. }
  384. EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
  385. static bool is_single_rx_stream(struct iwl_priv *priv)
  386. {
  387. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  388. priv->current_ht_config.single_chain_sufficient;
  389. }
  390. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  391. enum ieee80211_band band,
  392. u16 channel, u8 extension_chan_offset)
  393. {
  394. const struct iwl_channel_info *ch_info;
  395. ch_info = iwl_get_channel_info(priv, band, channel);
  396. if (!is_channel_valid(ch_info))
  397. return 0;
  398. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  399. return !(ch_info->ht40_extension_channel &
  400. IEEE80211_CHAN_NO_HT40PLUS);
  401. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  402. return !(ch_info->ht40_extension_channel &
  403. IEEE80211_CHAN_NO_HT40MINUS);
  404. return 0;
  405. }
  406. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  407. struct ieee80211_sta_ht_cap *sta_ht_inf)
  408. {
  409. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  410. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  411. return 0;
  412. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  413. * the bit will not set if it is pure 40MHz case
  414. */
  415. if (sta_ht_inf) {
  416. if (!sta_ht_inf->ht_supported)
  417. return 0;
  418. }
  419. #ifdef CONFIG_IWLWIFI_DEBUG
  420. if (priv->disable_ht40)
  421. return 0;
  422. #endif
  423. return iwl_is_channel_extension(priv, priv->band,
  424. le16_to_cpu(priv->staging_rxon.channel),
  425. ht_conf->extension_chan_offset);
  426. }
  427. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  428. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  429. {
  430. u16 new_val = 0;
  431. u16 beacon_factor = 0;
  432. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  433. new_val = beacon_val / beacon_factor;
  434. if (!new_val)
  435. new_val = max_beacon_val;
  436. return new_val;
  437. }
  438. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  439. {
  440. u64 tsf;
  441. s32 interval_tm, rem;
  442. unsigned long flags;
  443. struct ieee80211_conf *conf = NULL;
  444. u16 beacon_int;
  445. conf = ieee80211_get_hw_conf(priv->hw);
  446. spin_lock_irqsave(&priv->lock, flags);
  447. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  448. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  449. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  450. beacon_int = priv->beacon_int;
  451. priv->rxon_timing.atim_window = 0;
  452. } else {
  453. beacon_int = priv->vif->bss_conf.beacon_int;
  454. /* TODO: we need to get atim_window from upper stack
  455. * for now we set to 0 */
  456. priv->rxon_timing.atim_window = 0;
  457. }
  458. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  459. priv->hw_params.max_beacon_itrvl * 1024);
  460. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  461. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  462. interval_tm = beacon_int * 1024;
  463. rem = do_div(tsf, interval_tm);
  464. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  465. spin_unlock_irqrestore(&priv->lock, flags);
  466. IWL_DEBUG_ASSOC(priv,
  467. "beacon interval %d beacon timer %d beacon tim %d\n",
  468. le16_to_cpu(priv->rxon_timing.beacon_interval),
  469. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  470. le16_to_cpu(priv->rxon_timing.atim_window));
  471. }
  472. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  473. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  474. {
  475. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  476. if (hw_decrypt)
  477. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  478. else
  479. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  480. }
  481. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  482. /**
  483. * iwl_check_rxon_cmd - validate RXON structure is valid
  484. *
  485. * NOTE: This is really only useful during development and can eventually
  486. * be #ifdef'd out once the driver is stable and folks aren't actively
  487. * making changes
  488. */
  489. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  490. {
  491. int error = 0;
  492. int counter = 1;
  493. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  494. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  495. error |= le32_to_cpu(rxon->flags &
  496. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  497. RXON_FLG_RADAR_DETECT_MSK));
  498. if (error)
  499. IWL_WARN(priv, "check 24G fields %d | %d\n",
  500. counter++, error);
  501. } else {
  502. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  503. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  504. if (error)
  505. IWL_WARN(priv, "check 52 fields %d | %d\n",
  506. counter++, error);
  507. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  508. if (error)
  509. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  510. counter++, error);
  511. }
  512. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  513. if (error)
  514. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  515. /* make sure basic rates 6Mbps and 1Mbps are supported */
  516. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  517. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  518. if (error)
  519. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  520. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  521. if (error)
  522. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  523. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  524. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  525. if (error)
  526. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  527. counter++, error);
  528. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  529. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  530. if (error)
  531. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  532. counter++, error);
  533. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  534. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  535. if (error)
  536. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  537. counter++, error);
  538. if (error)
  539. IWL_WARN(priv, "Tuning to channel %d\n",
  540. le16_to_cpu(rxon->channel));
  541. if (error) {
  542. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  543. return -1;
  544. }
  545. return 0;
  546. }
  547. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  548. /**
  549. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  550. * @priv: staging_rxon is compared to active_rxon
  551. *
  552. * If the RXON structure is changing enough to require a new tune,
  553. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  554. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  555. */
  556. int iwl_full_rxon_required(struct iwl_priv *priv)
  557. {
  558. /* These items are only settable from the full RXON command */
  559. if (!(iwl_is_associated(priv)) ||
  560. compare_ether_addr(priv->staging_rxon.bssid_addr,
  561. priv->active_rxon.bssid_addr) ||
  562. compare_ether_addr(priv->staging_rxon.node_addr,
  563. priv->active_rxon.node_addr) ||
  564. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  565. priv->active_rxon.wlap_bssid_addr) ||
  566. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  567. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  568. (priv->staging_rxon.air_propagation !=
  569. priv->active_rxon.air_propagation) ||
  570. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  571. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  572. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  573. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  574. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  575. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  576. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  577. return 1;
  578. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  579. * be updated with the RXON_ASSOC command -- however only some
  580. * flag transitions are allowed using RXON_ASSOC */
  581. /* Check if we are not switching bands */
  582. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  583. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  584. return 1;
  585. /* Check if we are switching association toggle */
  586. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  587. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  588. return 1;
  589. return 0;
  590. }
  591. EXPORT_SYMBOL(iwl_full_rxon_required);
  592. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  593. {
  594. /*
  595. * Assign the lowest rate -- should really get this from
  596. * the beacon skb from mac80211.
  597. */
  598. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  599. return IWL_RATE_1M_PLCP;
  600. else
  601. return IWL_RATE_6M_PLCP;
  602. }
  603. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  604. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  605. {
  606. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  607. if (!ht_conf->is_ht) {
  608. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  609. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  610. RXON_FLG_HT40_PROT_MSK |
  611. RXON_FLG_HT_PROT_MSK);
  612. return;
  613. }
  614. /* FIXME: if the definition of ht_protection changed, the "translation"
  615. * will be needed for rxon->flags
  616. */
  617. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  618. /* Set up channel bandwidth:
  619. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  620. /* clear the HT channel mode before set the mode */
  621. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  622. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  623. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  624. /* pure ht40 */
  625. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  626. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  627. /* Note: control channel is opposite of extension channel */
  628. switch (ht_conf->extension_chan_offset) {
  629. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  630. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  631. break;
  632. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  633. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  634. break;
  635. }
  636. } else {
  637. /* Note: control channel is opposite of extension channel */
  638. switch (ht_conf->extension_chan_offset) {
  639. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  640. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  641. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  642. break;
  643. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  644. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  645. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  646. break;
  647. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  648. default:
  649. /* channel location only valid if in Mixed mode */
  650. IWL_ERR(priv, "invalid extension channel offset\n");
  651. break;
  652. }
  653. }
  654. } else {
  655. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  656. }
  657. if (priv->cfg->ops->hcmd->set_rxon_chain)
  658. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  659. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  660. "extension channel offset 0x%x\n",
  661. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  662. ht_conf->extension_chan_offset);
  663. return;
  664. }
  665. EXPORT_SYMBOL(iwl_set_rxon_ht);
  666. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  667. #define IWL_NUM_RX_CHAINS_SINGLE 2
  668. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  669. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  670. /*
  671. * Determine how many receiver/antenna chains to use.
  672. *
  673. * More provides better reception via diversity. Fewer saves power
  674. * at the expense of throughput, but only when not in powersave to
  675. * start with.
  676. *
  677. * MIMO (dual stream) requires at least 2, but works better with 3.
  678. * This does not determine *which* chains to use, just how many.
  679. */
  680. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  681. {
  682. /* # of Rx chains to use when expecting MIMO. */
  683. if (is_single_rx_stream(priv))
  684. return IWL_NUM_RX_CHAINS_SINGLE;
  685. else
  686. return IWL_NUM_RX_CHAINS_MULTIPLE;
  687. }
  688. /*
  689. * When we are in power saving mode, unless device support spatial
  690. * multiplexing power save, use the active count for rx chain count.
  691. */
  692. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  693. {
  694. /* # Rx chains when idling, depending on SMPS mode */
  695. switch (priv->current_ht_config.smps) {
  696. case IEEE80211_SMPS_STATIC:
  697. case IEEE80211_SMPS_DYNAMIC:
  698. return IWL_NUM_IDLE_CHAINS_SINGLE;
  699. case IEEE80211_SMPS_OFF:
  700. return active_cnt;
  701. default:
  702. WARN(1, "invalid SMPS mode %d",
  703. priv->current_ht_config.smps);
  704. return active_cnt;
  705. }
  706. }
  707. /* up to 4 chains */
  708. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  709. {
  710. u8 res;
  711. res = (chain_bitmap & BIT(0)) >> 0;
  712. res += (chain_bitmap & BIT(1)) >> 1;
  713. res += (chain_bitmap & BIT(2)) >> 2;
  714. res += (chain_bitmap & BIT(3)) >> 3;
  715. return res;
  716. }
  717. /**
  718. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  719. *
  720. * Selects how many and which Rx receivers/antennas/chains to use.
  721. * This should not be used for scan command ... it puts data in wrong place.
  722. */
  723. void iwl_set_rxon_chain(struct iwl_priv *priv)
  724. {
  725. bool is_single = is_single_rx_stream(priv);
  726. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  727. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  728. u32 active_chains;
  729. u16 rx_chain;
  730. /* Tell uCode which antennas are actually connected.
  731. * Before first association, we assume all antennas are connected.
  732. * Just after first association, iwl_chain_noise_calibration()
  733. * checks which antennas actually *are* connected. */
  734. if (priv->chain_noise_data.active_chains)
  735. active_chains = priv->chain_noise_data.active_chains;
  736. else
  737. active_chains = priv->hw_params.valid_rx_ant;
  738. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  739. /* How many receivers should we use? */
  740. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  741. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  742. /* correct rx chain count according hw settings
  743. * and chain noise calibration
  744. */
  745. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  746. if (valid_rx_cnt < active_rx_cnt)
  747. active_rx_cnt = valid_rx_cnt;
  748. if (valid_rx_cnt < idle_rx_cnt)
  749. idle_rx_cnt = valid_rx_cnt;
  750. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  751. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  752. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  753. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  754. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  755. else
  756. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  757. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  758. priv->staging_rxon.rx_chain,
  759. active_rx_cnt, idle_rx_cnt);
  760. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  761. active_rx_cnt < idle_rx_cnt);
  762. }
  763. EXPORT_SYMBOL(iwl_set_rxon_chain);
  764. /**
  765. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  766. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  767. * @channel: Any channel valid for the requested phymode
  768. * In addition to setting the staging RXON, priv->phymode is also set.
  769. *
  770. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  771. * in the staging RXON flag structure based on the phymode
  772. */
  773. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  774. {
  775. enum ieee80211_band band = ch->band;
  776. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  777. if (!iwl_get_channel_info(priv, band, channel)) {
  778. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  779. channel, band);
  780. return -EINVAL;
  781. }
  782. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  783. (priv->band == band))
  784. return 0;
  785. priv->staging_rxon.channel = cpu_to_le16(channel);
  786. if (band == IEEE80211_BAND_5GHZ)
  787. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  788. else
  789. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  790. priv->band = band;
  791. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  792. return 0;
  793. }
  794. EXPORT_SYMBOL(iwl_set_rxon_channel);
  795. void iwl_set_flags_for_band(struct iwl_priv *priv,
  796. enum ieee80211_band band)
  797. {
  798. if (band == IEEE80211_BAND_5GHZ) {
  799. priv->staging_rxon.flags &=
  800. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  801. | RXON_FLG_CCK_MSK);
  802. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  803. } else {
  804. /* Copied from iwl_post_associate() */
  805. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  806. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  807. else
  808. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  809. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  810. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  811. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  812. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  813. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  814. }
  815. }
  816. /*
  817. * initialize rxon structure with default values from eeprom
  818. */
  819. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  820. {
  821. const struct iwl_channel_info *ch_info;
  822. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  823. switch (mode) {
  824. case NL80211_IFTYPE_AP:
  825. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  826. break;
  827. case NL80211_IFTYPE_STATION:
  828. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  829. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  830. break;
  831. case NL80211_IFTYPE_ADHOC:
  832. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  833. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  834. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  835. RXON_FILTER_ACCEPT_GRP_MSK;
  836. break;
  837. default:
  838. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  839. break;
  840. }
  841. #if 0
  842. /* TODO: Figure out when short_preamble would be set and cache from
  843. * that */
  844. if (!hw_to_local(priv->hw)->short_preamble)
  845. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  846. else
  847. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  848. #endif
  849. ch_info = iwl_get_channel_info(priv, priv->band,
  850. le16_to_cpu(priv->active_rxon.channel));
  851. if (!ch_info)
  852. ch_info = &priv->channel_info[0];
  853. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  854. priv->band = ch_info->band;
  855. iwl_set_flags_for_band(priv, priv->band);
  856. priv->staging_rxon.ofdm_basic_rates =
  857. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  858. priv->staging_rxon.cck_basic_rates =
  859. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  860. /* clear both MIX and PURE40 mode flag */
  861. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  862. RXON_FLG_CHANNEL_MODE_PURE_40);
  863. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  864. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  865. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  866. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  867. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  868. }
  869. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  870. static void iwl_set_rate(struct iwl_priv *priv)
  871. {
  872. const struct ieee80211_supported_band *hw = NULL;
  873. struct ieee80211_rate *rate;
  874. int i;
  875. hw = iwl_get_hw_mode(priv, priv->band);
  876. if (!hw) {
  877. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  878. return;
  879. }
  880. priv->active_rate = 0;
  881. for (i = 0; i < hw->n_bitrates; i++) {
  882. rate = &(hw->bitrates[i]);
  883. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  884. priv->active_rate |= (1 << rate->hw_value);
  885. }
  886. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  887. priv->staging_rxon.cck_basic_rates =
  888. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  889. priv->staging_rxon.ofdm_basic_rates =
  890. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  891. }
  892. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  893. {
  894. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  895. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  896. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  897. if (priv->switch_rxon.switch_in_progress) {
  898. if (!le32_to_cpu(csa->status) &&
  899. (csa->channel == priv->switch_rxon.channel)) {
  900. rxon->channel = csa->channel;
  901. priv->staging_rxon.channel = csa->channel;
  902. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  903. le16_to_cpu(csa->channel));
  904. } else
  905. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  906. le16_to_cpu(csa->channel));
  907. priv->switch_rxon.switch_in_progress = false;
  908. }
  909. }
  910. EXPORT_SYMBOL(iwl_rx_csa);
  911. #ifdef CONFIG_IWLWIFI_DEBUG
  912. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  913. {
  914. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  915. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  916. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  917. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  918. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  919. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  920. le32_to_cpu(rxon->filter_flags));
  921. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  922. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  923. rxon->ofdm_basic_rates);
  924. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  925. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  926. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  927. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  928. }
  929. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  930. #endif
  931. /**
  932. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  933. */
  934. void iwl_irq_handle_error(struct iwl_priv *priv)
  935. {
  936. /* Set the FW error flag -- cleared on iwl_down */
  937. set_bit(STATUS_FW_ERROR, &priv->status);
  938. /* Cancel currently queued command. */
  939. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  940. priv->cfg->ops->lib->dump_nic_error_log(priv);
  941. if (priv->cfg->ops->lib->dump_csr)
  942. priv->cfg->ops->lib->dump_csr(priv);
  943. if (priv->cfg->ops->lib->dump_fh)
  944. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  945. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  946. #ifdef CONFIG_IWLWIFI_DEBUG
  947. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  948. iwl_print_rx_config_cmd(priv);
  949. #endif
  950. wake_up_interruptible(&priv->wait_command_queue);
  951. /* Keep the restart process from trying to send host
  952. * commands by clearing the INIT status bit */
  953. clear_bit(STATUS_READY, &priv->status);
  954. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  955. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  956. "Restarting adapter due to uCode error.\n");
  957. if (priv->cfg->mod_params->restart_fw)
  958. queue_work(priv->workqueue, &priv->restart);
  959. }
  960. }
  961. EXPORT_SYMBOL(iwl_irq_handle_error);
  962. static int iwl_apm_stop_master(struct iwl_priv *priv)
  963. {
  964. int ret = 0;
  965. /* stop device's busmaster DMA activity */
  966. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  967. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  968. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  969. if (ret)
  970. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  971. IWL_DEBUG_INFO(priv, "stop master\n");
  972. return ret;
  973. }
  974. void iwl_apm_stop(struct iwl_priv *priv)
  975. {
  976. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  977. /* Stop device's DMA activity */
  978. iwl_apm_stop_master(priv);
  979. /* Reset the entire device */
  980. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  981. udelay(10);
  982. /*
  983. * Clear "initialization complete" bit to move adapter from
  984. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  985. */
  986. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  987. }
  988. EXPORT_SYMBOL(iwl_apm_stop);
  989. /*
  990. * Start up NIC's basic functionality after it has been reset
  991. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  992. * NOTE: This does not load uCode nor start the embedded processor
  993. */
  994. int iwl_apm_init(struct iwl_priv *priv)
  995. {
  996. int ret = 0;
  997. u16 lctl;
  998. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  999. /*
  1000. * Use "set_bit" below rather than "write", to preserve any hardware
  1001. * bits already set by default after reset.
  1002. */
  1003. /* Disable L0S exit timer (platform NMI Work/Around) */
  1004. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1005. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  1006. /*
  1007. * Disable L0s without affecting L1;
  1008. * don't wait for ICH L0s (ICH bug W/A)
  1009. */
  1010. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1011. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  1012. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  1013. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  1014. /*
  1015. * Enable HAP INTA (interrupt from management bus) to
  1016. * wake device's PCI Express link L1a -> L0s
  1017. * NOTE: This is no-op for 3945 (non-existant bit)
  1018. */
  1019. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1020. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  1021. /*
  1022. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  1023. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  1024. * If so (likely), disable L0S, so device moves directly L0->L1;
  1025. * costs negligible amount of power savings.
  1026. * If not (unlikely), enable L0S, so there is at least some
  1027. * power savings, even without L1.
  1028. */
  1029. if (priv->cfg->set_l0s) {
  1030. lctl = iwl_pcie_link_ctl(priv);
  1031. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1032. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1033. /* L1-ASPM enabled; disable(!) L0S */
  1034. iwl_set_bit(priv, CSR_GIO_REG,
  1035. CSR_GIO_REG_VAL_L0S_ENABLED);
  1036. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1037. } else {
  1038. /* L1-ASPM disabled; enable(!) L0S */
  1039. iwl_clear_bit(priv, CSR_GIO_REG,
  1040. CSR_GIO_REG_VAL_L0S_ENABLED);
  1041. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1042. }
  1043. }
  1044. /* Configure analog phase-lock-loop before activating to D0A */
  1045. if (priv->cfg->pll_cfg_val)
  1046. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1047. /*
  1048. * Set "initialization complete" bit to move adapter from
  1049. * D0U* --> D0A* (powered-up active) state.
  1050. */
  1051. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1052. /*
  1053. * Wait for clock stabilization; once stabilized, access to
  1054. * device-internal resources is supported, e.g. iwl_write_prph()
  1055. * and accesses to uCode SRAM.
  1056. */
  1057. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1058. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1059. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1060. if (ret < 0) {
  1061. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1062. goto out;
  1063. }
  1064. /*
  1065. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1066. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1067. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1068. * and don't need BSM to restore data after power-saving sleep.
  1069. *
  1070. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1071. * do not disable clocks. This preserves any hardware bits already
  1072. * set by default in "CLK_CTRL_REG" after reset.
  1073. */
  1074. if (priv->cfg->use_bsm)
  1075. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1076. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1077. else
  1078. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1079. APMG_CLK_VAL_DMA_CLK_RQT);
  1080. udelay(20);
  1081. /* Disable L1-Active */
  1082. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1083. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1084. out:
  1085. return ret;
  1086. }
  1087. EXPORT_SYMBOL(iwl_apm_init);
  1088. void iwl_configure_filter(struct ieee80211_hw *hw,
  1089. unsigned int changed_flags,
  1090. unsigned int *total_flags,
  1091. u64 multicast)
  1092. {
  1093. struct iwl_priv *priv = hw->priv;
  1094. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1095. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1096. changed_flags, *total_flags);
  1097. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1098. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1099. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1100. else
  1101. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1102. }
  1103. if (changed_flags & FIF_ALLMULTI) {
  1104. if (*total_flags & FIF_ALLMULTI)
  1105. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1106. else
  1107. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1108. }
  1109. if (changed_flags & FIF_CONTROL) {
  1110. if (*total_flags & FIF_CONTROL)
  1111. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1112. else
  1113. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1114. }
  1115. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1116. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1117. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1118. else
  1119. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1120. }
  1121. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1122. * since mac80211 will call ieee80211_hw_config immediately.
  1123. * (mc_list is not supported at this time). Otherwise, we need to
  1124. * queue a background iwl_commit_rxon work.
  1125. */
  1126. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1127. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1128. }
  1129. EXPORT_SYMBOL(iwl_configure_filter);
  1130. int iwl_set_hw_params(struct iwl_priv *priv)
  1131. {
  1132. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1133. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1134. if (priv->cfg->mod_params->amsdu_size_8K)
  1135. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1136. else
  1137. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1138. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1139. if (priv->cfg->mod_params->disable_11n)
  1140. priv->cfg->sku &= ~IWL_SKU_N;
  1141. /* Device-specific setup */
  1142. return priv->cfg->ops->lib->set_hw_params(priv);
  1143. }
  1144. EXPORT_SYMBOL(iwl_set_hw_params);
  1145. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1146. {
  1147. int ret = 0;
  1148. s8 prev_tx_power = priv->tx_power_user_lmt;
  1149. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  1150. IWL_WARN(priv,
  1151. "Requested user TXPOWER %d below lower limit %d.\n",
  1152. tx_power,
  1153. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  1154. return -EINVAL;
  1155. }
  1156. if (tx_power > priv->tx_power_device_lmt) {
  1157. IWL_WARN(priv,
  1158. "Requested user TXPOWER %d above upper limit %d.\n",
  1159. tx_power, priv->tx_power_device_lmt);
  1160. return -EINVAL;
  1161. }
  1162. if (priv->tx_power_user_lmt != tx_power)
  1163. force = true;
  1164. /* if nic is not up don't send command */
  1165. if (iwl_is_ready_rf(priv)) {
  1166. priv->tx_power_user_lmt = tx_power;
  1167. if (force && priv->cfg->ops->lib->send_tx_power)
  1168. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1169. else if (!priv->cfg->ops->lib->send_tx_power)
  1170. ret = -EOPNOTSUPP;
  1171. /*
  1172. * if fail to set tx_power, restore the orig. tx power
  1173. */
  1174. if (ret)
  1175. priv->tx_power_user_lmt = prev_tx_power;
  1176. }
  1177. /*
  1178. * Even this is an async host command, the command
  1179. * will always report success from uCode
  1180. * So once driver can placing the command into the queue
  1181. * successfully, driver can use priv->tx_power_user_lmt
  1182. * to reflect the current tx power
  1183. */
  1184. return ret;
  1185. }
  1186. EXPORT_SYMBOL(iwl_set_tx_power);
  1187. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1188. {
  1189. struct iwl_priv *priv = data;
  1190. u32 inta, inta_mask;
  1191. u32 inta_fh;
  1192. unsigned long flags;
  1193. if (!priv)
  1194. return IRQ_NONE;
  1195. spin_lock_irqsave(&priv->lock, flags);
  1196. /* Disable (but don't clear!) interrupts here to avoid
  1197. * back-to-back ISRs and sporadic interrupts from our NIC.
  1198. * If we have something to service, the tasklet will re-enable ints.
  1199. * If we *don't* have something, we'll re-enable before leaving here. */
  1200. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1201. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1202. /* Discover which interrupts are active/pending */
  1203. inta = iwl_read32(priv, CSR_INT);
  1204. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1205. /* Ignore interrupt if there's nothing in NIC to service.
  1206. * This may be due to IRQ shared with another device,
  1207. * or due to sporadic interrupts thrown from our NIC. */
  1208. if (!inta && !inta_fh) {
  1209. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1210. goto none;
  1211. }
  1212. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1213. /* Hardware disappeared. It might have already raised
  1214. * an interrupt */
  1215. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1216. goto unplugged;
  1217. }
  1218. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1219. inta, inta_mask, inta_fh);
  1220. inta &= ~CSR_INT_BIT_SCD;
  1221. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1222. if (likely(inta || inta_fh))
  1223. tasklet_schedule(&priv->irq_tasklet);
  1224. unplugged:
  1225. spin_unlock_irqrestore(&priv->lock, flags);
  1226. return IRQ_HANDLED;
  1227. none:
  1228. /* re-enable interrupts here since we don't have anything to service. */
  1229. /* only Re-enable if diabled by irq */
  1230. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1231. iwl_enable_interrupts(priv);
  1232. spin_unlock_irqrestore(&priv->lock, flags);
  1233. return IRQ_NONE;
  1234. }
  1235. EXPORT_SYMBOL(iwl_isr_legacy);
  1236. void iwl_send_bt_config(struct iwl_priv *priv)
  1237. {
  1238. struct iwl_bt_cmd bt_cmd = {
  1239. .lead_time = BT_LEAD_TIME_DEF,
  1240. .max_kill = BT_MAX_KILL_DEF,
  1241. .kill_ack_mask = 0,
  1242. .kill_cts_mask = 0,
  1243. };
  1244. if (!bt_coex_active)
  1245. bt_cmd.flags = BT_COEX_DISABLE;
  1246. else
  1247. bt_cmd.flags = BT_COEX_ENABLE;
  1248. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1249. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1250. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1251. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1252. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1253. }
  1254. EXPORT_SYMBOL(iwl_send_bt_config);
  1255. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1256. {
  1257. struct iwl_statistics_cmd statistics_cmd = {
  1258. .configuration_flags =
  1259. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1260. };
  1261. if (flags & CMD_ASYNC)
  1262. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1263. sizeof(struct iwl_statistics_cmd),
  1264. &statistics_cmd, NULL);
  1265. else
  1266. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1267. sizeof(struct iwl_statistics_cmd),
  1268. &statistics_cmd);
  1269. }
  1270. EXPORT_SYMBOL(iwl_send_statistics_request);
  1271. /**
  1272. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1273. * using sample data 100 bytes apart. If these sample points are good,
  1274. * it's a pretty good bet that everything between them is good, too.
  1275. */
  1276. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1277. {
  1278. u32 val;
  1279. int ret = 0;
  1280. u32 errcnt = 0;
  1281. u32 i;
  1282. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1283. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1284. /* read data comes through single port, auto-incr addr */
  1285. /* NOTE: Use the debugless read so we don't flood kernel log
  1286. * if IWL_DL_IO is set */
  1287. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1288. i + IWL49_RTC_INST_LOWER_BOUND);
  1289. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1290. if (val != le32_to_cpu(*image)) {
  1291. ret = -EIO;
  1292. errcnt++;
  1293. if (errcnt >= 3)
  1294. break;
  1295. }
  1296. }
  1297. return ret;
  1298. }
  1299. /**
  1300. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1301. * looking at all data.
  1302. */
  1303. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1304. u32 len)
  1305. {
  1306. u32 val;
  1307. u32 save_len = len;
  1308. int ret = 0;
  1309. u32 errcnt;
  1310. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1311. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1312. IWL49_RTC_INST_LOWER_BOUND);
  1313. errcnt = 0;
  1314. for (; len > 0; len -= sizeof(u32), image++) {
  1315. /* read data comes through single port, auto-incr addr */
  1316. /* NOTE: Use the debugless read so we don't flood kernel log
  1317. * if IWL_DL_IO is set */
  1318. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1319. if (val != le32_to_cpu(*image)) {
  1320. IWL_ERR(priv, "uCode INST section is invalid at "
  1321. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1322. save_len - len, val, le32_to_cpu(*image));
  1323. ret = -EIO;
  1324. errcnt++;
  1325. if (errcnt >= 20)
  1326. break;
  1327. }
  1328. }
  1329. if (!errcnt)
  1330. IWL_DEBUG_INFO(priv,
  1331. "ucode image in INSTRUCTION memory is good\n");
  1332. return ret;
  1333. }
  1334. /**
  1335. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1336. * and verify its contents
  1337. */
  1338. int iwl_verify_ucode(struct iwl_priv *priv)
  1339. {
  1340. __le32 *image;
  1341. u32 len;
  1342. int ret;
  1343. /* Try bootstrap */
  1344. image = (__le32 *)priv->ucode_boot.v_addr;
  1345. len = priv->ucode_boot.len;
  1346. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1347. if (!ret) {
  1348. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1349. return 0;
  1350. }
  1351. /* Try initialize */
  1352. image = (__le32 *)priv->ucode_init.v_addr;
  1353. len = priv->ucode_init.len;
  1354. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1355. if (!ret) {
  1356. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1357. return 0;
  1358. }
  1359. /* Try runtime/protocol */
  1360. image = (__le32 *)priv->ucode_code.v_addr;
  1361. len = priv->ucode_code.len;
  1362. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1363. if (!ret) {
  1364. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1365. return 0;
  1366. }
  1367. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1368. /* Since nothing seems to match, show first several data entries in
  1369. * instruction SRAM, so maybe visual inspection will give a clue.
  1370. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1371. image = (__le32 *)priv->ucode_boot.v_addr;
  1372. len = priv->ucode_boot.len;
  1373. ret = iwl_verify_inst_full(priv, image, len);
  1374. return ret;
  1375. }
  1376. EXPORT_SYMBOL(iwl_verify_ucode);
  1377. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1378. {
  1379. struct iwl_ct_kill_config cmd;
  1380. struct iwl_ct_kill_throttling_config adv_cmd;
  1381. unsigned long flags;
  1382. int ret = 0;
  1383. spin_lock_irqsave(&priv->lock, flags);
  1384. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1385. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1386. spin_unlock_irqrestore(&priv->lock, flags);
  1387. priv->thermal_throttle.ct_kill_toggle = false;
  1388. if (priv->cfg->support_ct_kill_exit) {
  1389. adv_cmd.critical_temperature_enter =
  1390. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1391. adv_cmd.critical_temperature_exit =
  1392. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1393. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1394. sizeof(adv_cmd), &adv_cmd);
  1395. if (ret)
  1396. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1397. else
  1398. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1399. "succeeded, "
  1400. "critical temperature enter is %d,"
  1401. "exit is %d\n",
  1402. priv->hw_params.ct_kill_threshold,
  1403. priv->hw_params.ct_kill_exit_threshold);
  1404. } else {
  1405. cmd.critical_temperature_R =
  1406. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1407. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1408. sizeof(cmd), &cmd);
  1409. if (ret)
  1410. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1411. else
  1412. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1413. "succeeded, "
  1414. "critical temperature is %d\n",
  1415. priv->hw_params.ct_kill_threshold);
  1416. }
  1417. }
  1418. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1419. /*
  1420. * CARD_STATE_CMD
  1421. *
  1422. * Use: Sets the device's internal card state to enable, disable, or halt
  1423. *
  1424. * When in the 'enable' state the card operates as normal.
  1425. * When in the 'disable' state, the card enters into a low power mode.
  1426. * When in the 'halt' state, the card is shut down and must be fully
  1427. * restarted to come back on.
  1428. */
  1429. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1430. {
  1431. struct iwl_host_cmd cmd = {
  1432. .id = REPLY_CARD_STATE_CMD,
  1433. .len = sizeof(u32),
  1434. .data = &flags,
  1435. .flags = meta_flag,
  1436. };
  1437. return iwl_send_cmd(priv, &cmd);
  1438. }
  1439. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1440. struct iwl_rx_mem_buffer *rxb)
  1441. {
  1442. #ifdef CONFIG_IWLWIFI_DEBUG
  1443. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1444. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1445. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1446. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1447. #endif
  1448. }
  1449. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1450. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1451. struct iwl_rx_mem_buffer *rxb)
  1452. {
  1453. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1454. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1455. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1456. "notification for %s:\n", len,
  1457. get_cmd_string(pkt->hdr.cmd));
  1458. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1459. }
  1460. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1461. void iwl_rx_reply_error(struct iwl_priv *priv,
  1462. struct iwl_rx_mem_buffer *rxb)
  1463. {
  1464. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1465. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1466. "seq 0x%04X ser 0x%08X\n",
  1467. le32_to_cpu(pkt->u.err_resp.error_type),
  1468. get_cmd_string(pkt->u.err_resp.cmd_id),
  1469. pkt->u.err_resp.cmd_id,
  1470. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1471. le32_to_cpu(pkt->u.err_resp.error_info));
  1472. }
  1473. EXPORT_SYMBOL(iwl_rx_reply_error);
  1474. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1475. {
  1476. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1477. }
  1478. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1479. const struct ieee80211_tx_queue_params *params)
  1480. {
  1481. struct iwl_priv *priv = hw->priv;
  1482. unsigned long flags;
  1483. int q;
  1484. IWL_DEBUG_MAC80211(priv, "enter\n");
  1485. if (!iwl_is_ready_rf(priv)) {
  1486. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1487. return -EIO;
  1488. }
  1489. if (queue >= AC_NUM) {
  1490. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1491. return 0;
  1492. }
  1493. q = AC_NUM - 1 - queue;
  1494. spin_lock_irqsave(&priv->lock, flags);
  1495. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1496. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1497. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1498. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1499. cpu_to_le16((params->txop * 32));
  1500. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1501. spin_unlock_irqrestore(&priv->lock, flags);
  1502. IWL_DEBUG_MAC80211(priv, "leave\n");
  1503. return 0;
  1504. }
  1505. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1506. static void iwl_ht_conf(struct iwl_priv *priv,
  1507. struct ieee80211_bss_conf *bss_conf)
  1508. {
  1509. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1510. struct ieee80211_sta *sta;
  1511. IWL_DEBUG_MAC80211(priv, "enter:\n");
  1512. if (!ht_conf->is_ht)
  1513. return;
  1514. ht_conf->ht_protection =
  1515. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1516. ht_conf->non_GF_STA_present =
  1517. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1518. ht_conf->single_chain_sufficient = false;
  1519. switch (priv->iw_mode) {
  1520. case NL80211_IFTYPE_STATION:
  1521. rcu_read_lock();
  1522. sta = ieee80211_find_sta(priv->vif, priv->bssid);
  1523. if (sta) {
  1524. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1525. int maxstreams;
  1526. maxstreams = (ht_cap->mcs.tx_params &
  1527. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1528. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1529. maxstreams += 1;
  1530. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1531. (ht_cap->mcs.rx_mask[2] == 0))
  1532. ht_conf->single_chain_sufficient = true;
  1533. if (maxstreams <= 1)
  1534. ht_conf->single_chain_sufficient = true;
  1535. } else {
  1536. /*
  1537. * If at all, this can only happen through a race
  1538. * when the AP disconnects us while we're still
  1539. * setting up the connection, in that case mac80211
  1540. * will soon tell us about that.
  1541. */
  1542. ht_conf->single_chain_sufficient = true;
  1543. }
  1544. rcu_read_unlock();
  1545. break;
  1546. case NL80211_IFTYPE_ADHOC:
  1547. ht_conf->single_chain_sufficient = true;
  1548. break;
  1549. default:
  1550. break;
  1551. }
  1552. IWL_DEBUG_MAC80211(priv, "leave\n");
  1553. }
  1554. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1555. {
  1556. priv->assoc_id = 0;
  1557. iwl_led_disassociate(priv);
  1558. /*
  1559. * inform the ucode that there is no longer an
  1560. * association and that no more packets should be
  1561. * sent
  1562. */
  1563. priv->staging_rxon.filter_flags &=
  1564. ~RXON_FILTER_ASSOC_MSK;
  1565. priv->staging_rxon.assoc_id = 0;
  1566. iwlcore_commit_rxon(priv);
  1567. }
  1568. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1569. struct ieee80211_vif *vif,
  1570. struct ieee80211_bss_conf *bss_conf,
  1571. u32 changes)
  1572. {
  1573. struct iwl_priv *priv = hw->priv;
  1574. int ret;
  1575. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1576. if (!iwl_is_alive(priv))
  1577. return;
  1578. mutex_lock(&priv->mutex);
  1579. if (changes & BSS_CHANGED_BEACON &&
  1580. priv->iw_mode == NL80211_IFTYPE_AP) {
  1581. dev_kfree_skb(priv->ibss_beacon);
  1582. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1583. }
  1584. if (changes & BSS_CHANGED_BEACON_INT) {
  1585. priv->beacon_int = bss_conf->beacon_int;
  1586. /* TODO: in AP mode, do something to make this take effect */
  1587. }
  1588. if (changes & BSS_CHANGED_BSSID) {
  1589. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1590. /*
  1591. * If there is currently a HW scan going on in the
  1592. * background then we need to cancel it else the RXON
  1593. * below/in post_associate will fail.
  1594. */
  1595. if (iwl_scan_cancel_timeout(priv, 100)) {
  1596. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1597. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1598. mutex_unlock(&priv->mutex);
  1599. return;
  1600. }
  1601. /* mac80211 only sets assoc when in STATION mode */
  1602. if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
  1603. bss_conf->assoc) {
  1604. memcpy(priv->staging_rxon.bssid_addr,
  1605. bss_conf->bssid, ETH_ALEN);
  1606. /* currently needed in a few places */
  1607. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1608. } else {
  1609. priv->staging_rxon.filter_flags &=
  1610. ~RXON_FILTER_ASSOC_MSK;
  1611. }
  1612. }
  1613. /*
  1614. * This needs to be after setting the BSSID in case
  1615. * mac80211 decides to do both changes at once because
  1616. * it will invoke post_associate.
  1617. */
  1618. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  1619. changes & BSS_CHANGED_BEACON) {
  1620. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1621. if (beacon)
  1622. iwl_mac_beacon_update(hw, beacon);
  1623. }
  1624. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1625. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1626. bss_conf->use_short_preamble);
  1627. if (bss_conf->use_short_preamble)
  1628. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1629. else
  1630. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1631. }
  1632. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1633. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1634. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1635. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1636. else
  1637. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1638. }
  1639. if (changes & BSS_CHANGED_BASIC_RATES) {
  1640. /* XXX use this information
  1641. *
  1642. * To do that, remove code from iwl_set_rate() and put something
  1643. * like this here:
  1644. *
  1645. if (A-band)
  1646. priv->staging_rxon.ofdm_basic_rates =
  1647. bss_conf->basic_rates;
  1648. else
  1649. priv->staging_rxon.ofdm_basic_rates =
  1650. bss_conf->basic_rates >> 4;
  1651. priv->staging_rxon.cck_basic_rates =
  1652. bss_conf->basic_rates & 0xF;
  1653. */
  1654. }
  1655. if (changes & BSS_CHANGED_HT) {
  1656. iwl_ht_conf(priv, bss_conf);
  1657. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1658. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1659. }
  1660. if (changes & BSS_CHANGED_ASSOC) {
  1661. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1662. if (bss_conf->assoc) {
  1663. priv->assoc_id = bss_conf->aid;
  1664. priv->beacon_int = bss_conf->beacon_int;
  1665. priv->timestamp = bss_conf->timestamp;
  1666. priv->assoc_capability = bss_conf->assoc_capability;
  1667. iwl_led_associate(priv);
  1668. if (!iwl_is_rfkill(priv))
  1669. priv->cfg->ops->lib->post_associate(priv);
  1670. } else
  1671. iwl_set_no_assoc(priv);
  1672. }
  1673. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  1674. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1675. changes);
  1676. ret = iwl_send_rxon_assoc(priv);
  1677. if (!ret) {
  1678. /* Sync active_rxon with latest change. */
  1679. memcpy((void *)&priv->active_rxon,
  1680. &priv->staging_rxon,
  1681. sizeof(struct iwl_rxon_cmd));
  1682. }
  1683. }
  1684. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1685. if (vif->bss_conf.enable_beacon) {
  1686. memcpy(priv->staging_rxon.bssid_addr,
  1687. bss_conf->bssid, ETH_ALEN);
  1688. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1689. iwlcore_config_ap(priv);
  1690. } else
  1691. iwl_set_no_assoc(priv);
  1692. }
  1693. mutex_unlock(&priv->mutex);
  1694. IWL_DEBUG_MAC80211(priv, "leave\n");
  1695. }
  1696. EXPORT_SYMBOL(iwl_bss_info_changed);
  1697. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1698. {
  1699. struct iwl_priv *priv = hw->priv;
  1700. unsigned long flags;
  1701. __le64 timestamp;
  1702. IWL_DEBUG_MAC80211(priv, "enter\n");
  1703. if (!iwl_is_ready_rf(priv)) {
  1704. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1705. return -EIO;
  1706. }
  1707. spin_lock_irqsave(&priv->lock, flags);
  1708. if (priv->ibss_beacon)
  1709. dev_kfree_skb(priv->ibss_beacon);
  1710. priv->ibss_beacon = skb;
  1711. priv->assoc_id = 0;
  1712. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1713. priv->timestamp = le64_to_cpu(timestamp);
  1714. IWL_DEBUG_MAC80211(priv, "leave\n");
  1715. spin_unlock_irqrestore(&priv->lock, flags);
  1716. priv->cfg->ops->lib->post_associate(priv);
  1717. return 0;
  1718. }
  1719. EXPORT_SYMBOL(iwl_mac_beacon_update);
  1720. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1721. {
  1722. iwl_connection_init_rx_config(priv, vif->type);
  1723. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1724. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1725. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1726. return iwlcore_commit_rxon(priv);
  1727. }
  1728. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1729. {
  1730. struct iwl_priv *priv = hw->priv;
  1731. int err = 0;
  1732. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
  1733. mutex_lock(&priv->mutex);
  1734. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1735. err = -EINVAL;
  1736. goto out;
  1737. }
  1738. if (priv->vif) {
  1739. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1740. err = -EOPNOTSUPP;
  1741. goto out;
  1742. }
  1743. priv->vif = vif;
  1744. priv->iw_mode = vif->type;
  1745. IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
  1746. memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
  1747. err = iwl_set_mode(priv, vif);
  1748. if (err)
  1749. goto out_err;
  1750. /* Add the broadcast address so we can send broadcast frames */
  1751. priv->cfg->ops->lib->add_bcast_station(priv);
  1752. goto out;
  1753. out_err:
  1754. priv->vif = NULL;
  1755. priv->iw_mode = NL80211_IFTYPE_STATION;
  1756. out:
  1757. mutex_unlock(&priv->mutex);
  1758. IWL_DEBUG_MAC80211(priv, "leave\n");
  1759. return err;
  1760. }
  1761. EXPORT_SYMBOL(iwl_mac_add_interface);
  1762. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1763. struct ieee80211_vif *vif)
  1764. {
  1765. struct iwl_priv *priv = hw->priv;
  1766. IWL_DEBUG_MAC80211(priv, "enter\n");
  1767. mutex_lock(&priv->mutex);
  1768. iwl_clear_ucode_stations(priv, true);
  1769. if (iwl_is_ready_rf(priv)) {
  1770. iwl_scan_cancel_timeout(priv, 100);
  1771. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1772. iwlcore_commit_rxon(priv);
  1773. }
  1774. if (priv->vif == vif) {
  1775. priv->vif = NULL;
  1776. memset(priv->bssid, 0, ETH_ALEN);
  1777. }
  1778. mutex_unlock(&priv->mutex);
  1779. IWL_DEBUG_MAC80211(priv, "leave\n");
  1780. }
  1781. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1782. /**
  1783. * iwl_mac_config - mac80211 config callback
  1784. */
  1785. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1786. {
  1787. struct iwl_priv *priv = hw->priv;
  1788. const struct iwl_channel_info *ch_info;
  1789. struct ieee80211_conf *conf = &hw->conf;
  1790. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1791. unsigned long flags = 0;
  1792. int ret = 0;
  1793. u16 ch;
  1794. int scan_active = 0;
  1795. mutex_lock(&priv->mutex);
  1796. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1797. conf->channel->hw_value, changed);
  1798. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1799. test_bit(STATUS_SCANNING, &priv->status))) {
  1800. scan_active = 1;
  1801. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1802. }
  1803. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1804. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1805. /* mac80211 uses static for non-HT which is what we want */
  1806. priv->current_ht_config.smps = conf->smps_mode;
  1807. /*
  1808. * Recalculate chain counts.
  1809. *
  1810. * If monitor mode is enabled then mac80211 will
  1811. * set up the SM PS mode to OFF if an HT channel is
  1812. * configured.
  1813. */
  1814. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1815. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1816. }
  1817. /* during scanning mac80211 will delay channel setting until
  1818. * scan finish with changed = 0
  1819. */
  1820. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1821. if (scan_active)
  1822. goto set_ch_out;
  1823. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1824. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1825. if (!is_channel_valid(ch_info)) {
  1826. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1827. ret = -EINVAL;
  1828. goto set_ch_out;
  1829. }
  1830. spin_lock_irqsave(&priv->lock, flags);
  1831. /* Configure HT40 channels */
  1832. ht_conf->is_ht = conf_is_ht(conf);
  1833. if (ht_conf->is_ht) {
  1834. if (conf_is_ht40_minus(conf)) {
  1835. ht_conf->extension_chan_offset =
  1836. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1837. ht_conf->is_40mhz = true;
  1838. } else if (conf_is_ht40_plus(conf)) {
  1839. ht_conf->extension_chan_offset =
  1840. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1841. ht_conf->is_40mhz = true;
  1842. } else {
  1843. ht_conf->extension_chan_offset =
  1844. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1845. ht_conf->is_40mhz = false;
  1846. }
  1847. } else
  1848. ht_conf->is_40mhz = false;
  1849. /* Default to no protection. Protection mode will later be set
  1850. * from BSS config in iwl_ht_conf */
  1851. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1852. /* if we are switching from ht to 2.4 clear flags
  1853. * from any ht related info since 2.4 does not
  1854. * support ht */
  1855. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1856. priv->staging_rxon.flags = 0;
  1857. iwl_set_rxon_channel(priv, conf->channel);
  1858. iwl_set_rxon_ht(priv, ht_conf);
  1859. iwl_set_flags_for_band(priv, conf->channel->band);
  1860. spin_unlock_irqrestore(&priv->lock, flags);
  1861. if (iwl_is_associated(priv) &&
  1862. (le16_to_cpu(priv->active_rxon.channel) != ch) &&
  1863. priv->cfg->ops->lib->set_channel_switch) {
  1864. iwl_set_rate(priv);
  1865. /*
  1866. * at this point, staging_rxon has the
  1867. * configuration for channel switch
  1868. */
  1869. ret = priv->cfg->ops->lib->set_channel_switch(priv,
  1870. ch);
  1871. if (!ret) {
  1872. iwl_print_rx_config_cmd(priv);
  1873. goto out;
  1874. }
  1875. priv->switch_rxon.switch_in_progress = false;
  1876. }
  1877. set_ch_out:
  1878. /* The list of supported rates and rate mask can be different
  1879. * for each band; since the band may have changed, reset
  1880. * the rate mask to what mac80211 lists */
  1881. iwl_set_rate(priv);
  1882. }
  1883. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1884. IEEE80211_CONF_CHANGE_IDLE)) {
  1885. ret = iwl_power_update_mode(priv, false);
  1886. if (ret)
  1887. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  1888. }
  1889. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1890. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  1891. priv->tx_power_user_lmt, conf->power_level);
  1892. iwl_set_tx_power(priv, conf->power_level, false);
  1893. }
  1894. if (changed & IEEE80211_CONF_CHANGE_QOS) {
  1895. bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
  1896. spin_lock_irqsave(&priv->lock, flags);
  1897. priv->qos_data.qos_active = qos_active;
  1898. iwl_update_qos(priv);
  1899. spin_unlock_irqrestore(&priv->lock, flags);
  1900. }
  1901. if (!iwl_is_ready(priv)) {
  1902. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1903. goto out;
  1904. }
  1905. if (scan_active)
  1906. goto out;
  1907. if (memcmp(&priv->active_rxon,
  1908. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1909. iwlcore_commit_rxon(priv);
  1910. else
  1911. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  1912. out:
  1913. IWL_DEBUG_MAC80211(priv, "leave\n");
  1914. mutex_unlock(&priv->mutex);
  1915. return ret;
  1916. }
  1917. EXPORT_SYMBOL(iwl_mac_config);
  1918. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  1919. {
  1920. struct iwl_priv *priv = hw->priv;
  1921. unsigned long flags;
  1922. mutex_lock(&priv->mutex);
  1923. IWL_DEBUG_MAC80211(priv, "enter\n");
  1924. spin_lock_irqsave(&priv->lock, flags);
  1925. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  1926. spin_unlock_irqrestore(&priv->lock, flags);
  1927. spin_lock_irqsave(&priv->lock, flags);
  1928. priv->assoc_id = 0;
  1929. priv->assoc_capability = 0;
  1930. /* new association get rid of ibss beacon skb */
  1931. if (priv->ibss_beacon)
  1932. dev_kfree_skb(priv->ibss_beacon);
  1933. priv->ibss_beacon = NULL;
  1934. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  1935. priv->timestamp = 0;
  1936. spin_unlock_irqrestore(&priv->lock, flags);
  1937. if (!iwl_is_ready_rf(priv)) {
  1938. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1939. mutex_unlock(&priv->mutex);
  1940. return;
  1941. }
  1942. /* we are restarting association process
  1943. * clear RXON_FILTER_ASSOC_MSK bit
  1944. */
  1945. iwl_scan_cancel_timeout(priv, 100);
  1946. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1947. iwlcore_commit_rxon(priv);
  1948. iwl_set_rate(priv);
  1949. mutex_unlock(&priv->mutex);
  1950. IWL_DEBUG_MAC80211(priv, "leave\n");
  1951. }
  1952. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  1953. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1954. {
  1955. if (!priv->txq)
  1956. priv->txq = kzalloc(
  1957. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  1958. GFP_KERNEL);
  1959. if (!priv->txq) {
  1960. IWL_ERR(priv, "Not enough memory for txq\n");
  1961. return -ENOMEM;
  1962. }
  1963. return 0;
  1964. }
  1965. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1966. void iwl_free_txq_mem(struct iwl_priv *priv)
  1967. {
  1968. kfree(priv->txq);
  1969. priv->txq = NULL;
  1970. }
  1971. EXPORT_SYMBOL(iwl_free_txq_mem);
  1972. int iwl_send_wimax_coex(struct iwl_priv *priv)
  1973. {
  1974. struct iwl_wimax_coex_cmd coex_cmd;
  1975. if (priv->cfg->support_wimax_coexist) {
  1976. /* UnMask wake up src at associated sleep */
  1977. coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
  1978. /* UnMask wake up src at unassociated sleep */
  1979. coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
  1980. memcpy(coex_cmd.sta_prio, cu_priorities,
  1981. sizeof(struct iwl_wimax_coex_event_entry) *
  1982. COEX_NUM_OF_EVENTS);
  1983. /* enabling the coexistence feature */
  1984. coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
  1985. /* enabling the priorities tables */
  1986. coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
  1987. } else {
  1988. /* coexistence is disabled */
  1989. memset(&coex_cmd, 0, sizeof(coex_cmd));
  1990. }
  1991. return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
  1992. sizeof(coex_cmd), &coex_cmd);
  1993. }
  1994. EXPORT_SYMBOL(iwl_send_wimax_coex);
  1995. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1996. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1997. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1998. {
  1999. priv->tx_traffic_idx = 0;
  2000. priv->rx_traffic_idx = 0;
  2001. if (priv->tx_traffic)
  2002. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2003. if (priv->rx_traffic)
  2004. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  2005. }
  2006. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  2007. {
  2008. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  2009. if (iwl_debug_level & IWL_DL_TX) {
  2010. if (!priv->tx_traffic) {
  2011. priv->tx_traffic =
  2012. kzalloc(traffic_size, GFP_KERNEL);
  2013. if (!priv->tx_traffic)
  2014. return -ENOMEM;
  2015. }
  2016. }
  2017. if (iwl_debug_level & IWL_DL_RX) {
  2018. if (!priv->rx_traffic) {
  2019. priv->rx_traffic =
  2020. kzalloc(traffic_size, GFP_KERNEL);
  2021. if (!priv->rx_traffic)
  2022. return -ENOMEM;
  2023. }
  2024. }
  2025. iwl_reset_traffic_log(priv);
  2026. return 0;
  2027. }
  2028. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  2029. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2030. {
  2031. kfree(priv->tx_traffic);
  2032. priv->tx_traffic = NULL;
  2033. kfree(priv->rx_traffic);
  2034. priv->rx_traffic = NULL;
  2035. }
  2036. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2037. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2038. u16 length, struct ieee80211_hdr *header)
  2039. {
  2040. __le16 fc;
  2041. u16 len;
  2042. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2043. return;
  2044. if (!priv->tx_traffic)
  2045. return;
  2046. fc = header->frame_control;
  2047. if (ieee80211_is_data(fc)) {
  2048. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2049. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2050. memcpy((priv->tx_traffic +
  2051. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2052. header, len);
  2053. priv->tx_traffic_idx =
  2054. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2055. }
  2056. }
  2057. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2058. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2059. u16 length, struct ieee80211_hdr *header)
  2060. {
  2061. __le16 fc;
  2062. u16 len;
  2063. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2064. return;
  2065. if (!priv->rx_traffic)
  2066. return;
  2067. fc = header->frame_control;
  2068. if (ieee80211_is_data(fc)) {
  2069. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2070. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2071. memcpy((priv->rx_traffic +
  2072. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2073. header, len);
  2074. priv->rx_traffic_idx =
  2075. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2076. }
  2077. }
  2078. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2079. const char *get_mgmt_string(int cmd)
  2080. {
  2081. switch (cmd) {
  2082. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2083. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2084. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2085. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2086. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2087. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2088. IWL_CMD(MANAGEMENT_BEACON);
  2089. IWL_CMD(MANAGEMENT_ATIM);
  2090. IWL_CMD(MANAGEMENT_DISASSOC);
  2091. IWL_CMD(MANAGEMENT_AUTH);
  2092. IWL_CMD(MANAGEMENT_DEAUTH);
  2093. IWL_CMD(MANAGEMENT_ACTION);
  2094. default:
  2095. return "UNKNOWN";
  2096. }
  2097. }
  2098. const char *get_ctrl_string(int cmd)
  2099. {
  2100. switch (cmd) {
  2101. IWL_CMD(CONTROL_BACK_REQ);
  2102. IWL_CMD(CONTROL_BACK);
  2103. IWL_CMD(CONTROL_PSPOLL);
  2104. IWL_CMD(CONTROL_RTS);
  2105. IWL_CMD(CONTROL_CTS);
  2106. IWL_CMD(CONTROL_ACK);
  2107. IWL_CMD(CONTROL_CFEND);
  2108. IWL_CMD(CONTROL_CFENDACK);
  2109. default:
  2110. return "UNKNOWN";
  2111. }
  2112. }
  2113. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  2114. {
  2115. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2116. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2117. priv->led_tpt = 0;
  2118. }
  2119. /*
  2120. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2121. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2122. * Use debugFs to display the rx/rx_statistics
  2123. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2124. * information will be recorded, but DATA pkt still will be recorded
  2125. * for the reason of iwl_led.c need to control the led blinking based on
  2126. * number of tx and rx data.
  2127. *
  2128. */
  2129. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2130. {
  2131. struct traffic_stats *stats;
  2132. if (is_tx)
  2133. stats = &priv->tx_stats;
  2134. else
  2135. stats = &priv->rx_stats;
  2136. if (ieee80211_is_mgmt(fc)) {
  2137. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2138. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2139. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2140. break;
  2141. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2142. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2143. break;
  2144. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2145. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2146. break;
  2147. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2148. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2149. break;
  2150. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2151. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2152. break;
  2153. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2154. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2155. break;
  2156. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2157. stats->mgmt[MANAGEMENT_BEACON]++;
  2158. break;
  2159. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2160. stats->mgmt[MANAGEMENT_ATIM]++;
  2161. break;
  2162. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2163. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2164. break;
  2165. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2166. stats->mgmt[MANAGEMENT_AUTH]++;
  2167. break;
  2168. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2169. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2170. break;
  2171. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2172. stats->mgmt[MANAGEMENT_ACTION]++;
  2173. break;
  2174. }
  2175. } else if (ieee80211_is_ctl(fc)) {
  2176. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2177. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2178. stats->ctrl[CONTROL_BACK_REQ]++;
  2179. break;
  2180. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2181. stats->ctrl[CONTROL_BACK]++;
  2182. break;
  2183. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2184. stats->ctrl[CONTROL_PSPOLL]++;
  2185. break;
  2186. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2187. stats->ctrl[CONTROL_RTS]++;
  2188. break;
  2189. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2190. stats->ctrl[CONTROL_CTS]++;
  2191. break;
  2192. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2193. stats->ctrl[CONTROL_ACK]++;
  2194. break;
  2195. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2196. stats->ctrl[CONTROL_CFEND]++;
  2197. break;
  2198. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2199. stats->ctrl[CONTROL_CFENDACK]++;
  2200. break;
  2201. }
  2202. } else {
  2203. /* data */
  2204. stats->data_cnt++;
  2205. stats->data_bytes += len;
  2206. }
  2207. iwl_leds_background(priv);
  2208. }
  2209. EXPORT_SYMBOL(iwl_update_stats);
  2210. #endif
  2211. const static char *get_csr_string(int cmd)
  2212. {
  2213. switch (cmd) {
  2214. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2215. IWL_CMD(CSR_INT_COALESCING);
  2216. IWL_CMD(CSR_INT);
  2217. IWL_CMD(CSR_INT_MASK);
  2218. IWL_CMD(CSR_FH_INT_STATUS);
  2219. IWL_CMD(CSR_GPIO_IN);
  2220. IWL_CMD(CSR_RESET);
  2221. IWL_CMD(CSR_GP_CNTRL);
  2222. IWL_CMD(CSR_HW_REV);
  2223. IWL_CMD(CSR_EEPROM_REG);
  2224. IWL_CMD(CSR_EEPROM_GP);
  2225. IWL_CMD(CSR_OTP_GP_REG);
  2226. IWL_CMD(CSR_GIO_REG);
  2227. IWL_CMD(CSR_GP_UCODE_REG);
  2228. IWL_CMD(CSR_GP_DRIVER_REG);
  2229. IWL_CMD(CSR_UCODE_DRV_GP1);
  2230. IWL_CMD(CSR_UCODE_DRV_GP2);
  2231. IWL_CMD(CSR_LED_REG);
  2232. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2233. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2234. IWL_CMD(CSR_ANA_PLL_CFG);
  2235. IWL_CMD(CSR_HW_REV_WA_REG);
  2236. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2237. default:
  2238. return "UNKNOWN";
  2239. }
  2240. }
  2241. void iwl_dump_csr(struct iwl_priv *priv)
  2242. {
  2243. int i;
  2244. u32 csr_tbl[] = {
  2245. CSR_HW_IF_CONFIG_REG,
  2246. CSR_INT_COALESCING,
  2247. CSR_INT,
  2248. CSR_INT_MASK,
  2249. CSR_FH_INT_STATUS,
  2250. CSR_GPIO_IN,
  2251. CSR_RESET,
  2252. CSR_GP_CNTRL,
  2253. CSR_HW_REV,
  2254. CSR_EEPROM_REG,
  2255. CSR_EEPROM_GP,
  2256. CSR_OTP_GP_REG,
  2257. CSR_GIO_REG,
  2258. CSR_GP_UCODE_REG,
  2259. CSR_GP_DRIVER_REG,
  2260. CSR_UCODE_DRV_GP1,
  2261. CSR_UCODE_DRV_GP2,
  2262. CSR_LED_REG,
  2263. CSR_DRAM_INT_TBL_REG,
  2264. CSR_GIO_CHICKEN_BITS,
  2265. CSR_ANA_PLL_CFG,
  2266. CSR_HW_REV_WA_REG,
  2267. CSR_DBG_HPET_MEM_REG
  2268. };
  2269. IWL_ERR(priv, "CSR values:\n");
  2270. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2271. "CSR_INT_PERIODIC_REG)\n");
  2272. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2273. IWL_ERR(priv, " %25s: 0X%08x\n",
  2274. get_csr_string(csr_tbl[i]),
  2275. iwl_read32(priv, csr_tbl[i]));
  2276. }
  2277. }
  2278. EXPORT_SYMBOL(iwl_dump_csr);
  2279. const static char *get_fh_string(int cmd)
  2280. {
  2281. switch (cmd) {
  2282. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2283. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2284. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2285. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2286. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2287. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2288. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2289. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2290. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2291. default:
  2292. return "UNKNOWN";
  2293. }
  2294. }
  2295. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2296. {
  2297. int i;
  2298. #ifdef CONFIG_IWLWIFI_DEBUG
  2299. int pos = 0;
  2300. size_t bufsz = 0;
  2301. #endif
  2302. u32 fh_tbl[] = {
  2303. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2304. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2305. FH_RSCSR_CHNL0_WPTR,
  2306. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2307. FH_MEM_RSSR_SHARED_CTRL_REG,
  2308. FH_MEM_RSSR_RX_STATUS_REG,
  2309. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2310. FH_TSSR_TX_STATUS_REG,
  2311. FH_TSSR_TX_ERROR_REG
  2312. };
  2313. #ifdef CONFIG_IWLWIFI_DEBUG
  2314. if (display) {
  2315. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2316. *buf = kmalloc(bufsz, GFP_KERNEL);
  2317. if (!*buf)
  2318. return -ENOMEM;
  2319. pos += scnprintf(*buf + pos, bufsz - pos,
  2320. "FH register values:\n");
  2321. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2322. pos += scnprintf(*buf + pos, bufsz - pos,
  2323. " %34s: 0X%08x\n",
  2324. get_fh_string(fh_tbl[i]),
  2325. iwl_read_direct32(priv, fh_tbl[i]));
  2326. }
  2327. return pos;
  2328. }
  2329. #endif
  2330. IWL_ERR(priv, "FH register values:\n");
  2331. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2332. IWL_ERR(priv, " %34s: 0X%08x\n",
  2333. get_fh_string(fh_tbl[i]),
  2334. iwl_read_direct32(priv, fh_tbl[i]));
  2335. }
  2336. return 0;
  2337. }
  2338. EXPORT_SYMBOL(iwl_dump_fh);
  2339. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2340. {
  2341. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2342. return;
  2343. if (!iwl_is_associated(priv)) {
  2344. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2345. return;
  2346. }
  2347. /*
  2348. * There is no easy and better way to force reset the radio,
  2349. * the only known method is switching channel which will force to
  2350. * reset and tune the radio.
  2351. * Use internal short scan (single channel) operation to should
  2352. * achieve this objective.
  2353. * Driver should reset the radio when number of consecutive missed
  2354. * beacon, or any other uCode error condition detected.
  2355. */
  2356. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2357. iwl_internal_short_hw_scan(priv);
  2358. }
  2359. int iwl_force_reset(struct iwl_priv *priv, int mode)
  2360. {
  2361. struct iwl_force_reset *force_reset;
  2362. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2363. return -EINVAL;
  2364. if (mode >= IWL_MAX_FORCE_RESET) {
  2365. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2366. return -EINVAL;
  2367. }
  2368. force_reset = &priv->force_reset[mode];
  2369. force_reset->reset_request_count++;
  2370. if (force_reset->last_force_reset_jiffies &&
  2371. time_after(force_reset->last_force_reset_jiffies +
  2372. force_reset->reset_duration, jiffies)) {
  2373. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2374. force_reset->reset_reject_count++;
  2375. return -EAGAIN;
  2376. }
  2377. force_reset->reset_success_count++;
  2378. force_reset->last_force_reset_jiffies = jiffies;
  2379. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2380. switch (mode) {
  2381. case IWL_RF_RESET:
  2382. iwl_force_rf_reset(priv);
  2383. break;
  2384. case IWL_FW_RESET:
  2385. IWL_ERR(priv, "On demand firmware reload\n");
  2386. /* Set the FW error flag -- cleared on iwl_down */
  2387. set_bit(STATUS_FW_ERROR, &priv->status);
  2388. wake_up_interruptible(&priv->wait_command_queue);
  2389. /*
  2390. * Keep the restart process from trying to send host
  2391. * commands by clearing the INIT status bit
  2392. */
  2393. clear_bit(STATUS_READY, &priv->status);
  2394. queue_work(priv->workqueue, &priv->restart);
  2395. break;
  2396. }
  2397. return 0;
  2398. }
  2399. EXPORT_SYMBOL(iwl_force_reset);
  2400. /**
  2401. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2402. *
  2403. * During normal condition (no queue is stuck), the timer is continually set to
  2404. * execute every monitor_recover_period milliseconds after the last timer
  2405. * expired. When the queue read_ptr is at the same place, the timer is
  2406. * shorten to 100mSecs. This is
  2407. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2408. * 2) to detect the stuck queues quicker before the station and AP can
  2409. * disassociate each other.
  2410. *
  2411. * This function monitors all the tx queues and recover from it if any
  2412. * of the queues are stuck.
  2413. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2414. * it will recover by resetting the firmware and return.
  2415. * 2. Then, it checks for station association. If it associates it will check
  2416. * other queues. If any queue is stuck, it will recover by resetting
  2417. * the firmware.
  2418. * Note: It the number of times the queue read_ptr to be at the same place to
  2419. * be MAX_REPEAT+1 in order to consider to be stuck.
  2420. */
  2421. /*
  2422. * The maximum number of times the read pointer of the tx queue at the
  2423. * same place without considering to be stuck.
  2424. */
  2425. #define MAX_REPEAT (2)
  2426. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2427. {
  2428. struct iwl_tx_queue *txq;
  2429. struct iwl_queue *q;
  2430. txq = &priv->txq[cnt];
  2431. q = &txq->q;
  2432. /* queue is empty, skip */
  2433. if (q->read_ptr != q->write_ptr) {
  2434. if (q->read_ptr == q->last_read_ptr) {
  2435. /* a queue has not been read from last time */
  2436. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2437. IWL_ERR(priv,
  2438. "queue %d stuck %d time. Fw reload.\n",
  2439. q->id, q->repeat_same_read_ptr);
  2440. q->repeat_same_read_ptr = 0;
  2441. iwl_force_reset(priv, IWL_FW_RESET);
  2442. } else {
  2443. q->repeat_same_read_ptr++;
  2444. IWL_DEBUG_RADIO(priv,
  2445. "queue %d, not read %d time\n",
  2446. q->id,
  2447. q->repeat_same_read_ptr);
  2448. mod_timer(&priv->monitor_recover, jiffies +
  2449. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2450. }
  2451. return 1;
  2452. } else {
  2453. q->last_read_ptr = q->read_ptr;
  2454. q->repeat_same_read_ptr = 0;
  2455. }
  2456. }
  2457. return 0;
  2458. }
  2459. void iwl_bg_monitor_recover(unsigned long data)
  2460. {
  2461. struct iwl_priv *priv = (struct iwl_priv *)data;
  2462. int cnt;
  2463. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2464. return;
  2465. /* monitor and check for stuck cmd queue */
  2466. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2467. return;
  2468. /* monitor and check for other stuck queues */
  2469. if (iwl_is_associated(priv)) {
  2470. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2471. /* skip as we already checked the command queue */
  2472. if (cnt == IWL_CMD_QUEUE_NUM)
  2473. continue;
  2474. if (iwl_check_stuck_queue(priv, cnt))
  2475. return;
  2476. }
  2477. }
  2478. /*
  2479. * Reschedule the timer to occur in
  2480. * priv->cfg->monitor_recover_period
  2481. */
  2482. mod_timer(&priv->monitor_recover,
  2483. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2484. }
  2485. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2486. #ifdef CONFIG_PM
  2487. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2488. {
  2489. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2490. /*
  2491. * This function is called when system goes into suspend state
  2492. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2493. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2494. * it will not call apm_ops.stop() to stop the DMA operation.
  2495. * Calling apm_ops.stop here to make sure we stop the DMA.
  2496. */
  2497. priv->cfg->ops->lib->apm_ops.stop(priv);
  2498. pci_save_state(pdev);
  2499. pci_disable_device(pdev);
  2500. pci_set_power_state(pdev, PCI_D3hot);
  2501. return 0;
  2502. }
  2503. EXPORT_SYMBOL(iwl_pci_suspend);
  2504. int iwl_pci_resume(struct pci_dev *pdev)
  2505. {
  2506. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2507. int ret;
  2508. /*
  2509. * We disable the RETRY_TIMEOUT register (0x41) to keep
  2510. * PCI Tx retries from interfering with C3 CPU state.
  2511. */
  2512. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  2513. pci_set_power_state(pdev, PCI_D0);
  2514. ret = pci_enable_device(pdev);
  2515. if (ret)
  2516. return ret;
  2517. pci_restore_state(pdev);
  2518. iwl_enable_interrupts(priv);
  2519. return 0;
  2520. }
  2521. EXPORT_SYMBOL(iwl_pci_resume);
  2522. #endif /* CONFIG_PM */