htc_drv_init.c 21 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "htc.h"
  17. MODULE_AUTHOR("Atheros Communications");
  18. MODULE_LICENSE("Dual BSD/GPL");
  19. MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  20. static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  21. module_param_named(debug, ath9k_debug, uint, 0);
  22. MODULE_PARM_DESC(debug, "Debugging mask");
  23. int htc_modparam_nohwcrypt;
  24. module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  25. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  26. #define CHAN2G(_freq, _idx) { \
  27. .center_freq = (_freq), \
  28. .hw_value = (_idx), \
  29. .max_power = 20, \
  30. }
  31. static struct ieee80211_channel ath9k_2ghz_channels[] = {
  32. CHAN2G(2412, 0), /* Channel 1 */
  33. CHAN2G(2417, 1), /* Channel 2 */
  34. CHAN2G(2422, 2), /* Channel 3 */
  35. CHAN2G(2427, 3), /* Channel 4 */
  36. CHAN2G(2432, 4), /* Channel 5 */
  37. CHAN2G(2437, 5), /* Channel 6 */
  38. CHAN2G(2442, 6), /* Channel 7 */
  39. CHAN2G(2447, 7), /* Channel 8 */
  40. CHAN2G(2452, 8), /* Channel 9 */
  41. CHAN2G(2457, 9), /* Channel 10 */
  42. CHAN2G(2462, 10), /* Channel 11 */
  43. CHAN2G(2467, 11), /* Channel 12 */
  44. CHAN2G(2472, 12), /* Channel 13 */
  45. CHAN2G(2484, 13), /* Channel 14 */
  46. };
  47. /* Atheros hardware rate code addition for short premble */
  48. #define SHPCHECK(__hw_rate, __flags) \
  49. ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  50. #define RATE(_bitrate, _hw_rate, _flags) { \
  51. .bitrate = (_bitrate), \
  52. .flags = (_flags), \
  53. .hw_value = (_hw_rate), \
  54. .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
  55. }
  56. static struct ieee80211_rate ath9k_legacy_rates[] = {
  57. RATE(10, 0x1b, 0),
  58. RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
  59. RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
  60. RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
  61. RATE(60, 0x0b, 0),
  62. RATE(90, 0x0f, 0),
  63. RATE(120, 0x0a, 0),
  64. RATE(180, 0x0e, 0),
  65. RATE(240, 0x09, 0),
  66. RATE(360, 0x0d, 0),
  67. RATE(480, 0x08, 0),
  68. RATE(540, 0x0c, 0),
  69. };
  70. static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
  71. {
  72. int time_left;
  73. /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
  74. time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
  75. if (!time_left) {
  76. dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
  77. return -ETIMEDOUT;
  78. }
  79. return 0;
  80. }
  81. static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
  82. {
  83. ath9k_htc_exit_debug(priv->ah);
  84. ath9k_hw_deinit(priv->ah);
  85. tasklet_kill(&priv->wmi_tasklet);
  86. tasklet_kill(&priv->rx_tasklet);
  87. tasklet_kill(&priv->tx_tasklet);
  88. kfree(priv->ah);
  89. priv->ah = NULL;
  90. }
  91. static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
  92. {
  93. struct ieee80211_hw *hw = priv->hw;
  94. wiphy_rfkill_stop_polling(hw->wiphy);
  95. ath9k_deinit_leds(priv);
  96. ieee80211_unregister_hw(hw);
  97. ath9k_rx_cleanup(priv);
  98. ath9k_tx_cleanup(priv);
  99. ath9k_deinit_priv(priv);
  100. }
  101. static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
  102. u16 service_id,
  103. void (*tx) (void *,
  104. struct sk_buff *,
  105. enum htc_endpoint_id,
  106. bool txok),
  107. enum htc_endpoint_id *ep_id)
  108. {
  109. struct htc_service_connreq req;
  110. memset(&req, 0, sizeof(struct htc_service_connreq));
  111. req.service_id = service_id;
  112. req.ep_callbacks.priv = priv;
  113. req.ep_callbacks.rx = ath9k_htc_rxep;
  114. req.ep_callbacks.tx = tx;
  115. return htc_connect_service(priv->htc, &req, ep_id);
  116. }
  117. static int ath9k_init_htc_services(struct ath9k_htc_priv *priv)
  118. {
  119. int ret;
  120. /* WMI CMD*/
  121. ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
  122. if (ret)
  123. goto err;
  124. /* Beacon */
  125. ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, NULL,
  126. &priv->beacon_ep);
  127. if (ret)
  128. goto err;
  129. /* CAB */
  130. ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
  131. &priv->cab_ep);
  132. if (ret)
  133. goto err;
  134. /* UAPSD */
  135. ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
  136. &priv->uapsd_ep);
  137. if (ret)
  138. goto err;
  139. /* MGMT */
  140. ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
  141. &priv->mgmt_ep);
  142. if (ret)
  143. goto err;
  144. /* DATA BE */
  145. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
  146. &priv->data_be_ep);
  147. if (ret)
  148. goto err;
  149. /* DATA BK */
  150. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
  151. &priv->data_bk_ep);
  152. if (ret)
  153. goto err;
  154. /* DATA VI */
  155. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
  156. &priv->data_vi_ep);
  157. if (ret)
  158. goto err;
  159. /* DATA VO */
  160. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
  161. &priv->data_vo_ep);
  162. if (ret)
  163. goto err;
  164. ret = htc_init(priv->htc);
  165. if (ret)
  166. goto err;
  167. return 0;
  168. err:
  169. dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
  170. return ret;
  171. }
  172. static int ath9k_reg_notifier(struct wiphy *wiphy,
  173. struct regulatory_request *request)
  174. {
  175. struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
  176. struct ath9k_htc_priv *priv = hw->priv;
  177. return ath_reg_notifier_apply(wiphy, request,
  178. ath9k_hw_regulatory(priv->ah));
  179. }
  180. static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
  181. {
  182. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  183. struct ath_common *common = ath9k_hw_common(ah);
  184. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  185. __be32 val, reg = cpu_to_be32(reg_offset);
  186. int r;
  187. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
  188. (u8 *) &reg, sizeof(reg),
  189. (u8 *) &val, sizeof(val),
  190. 100);
  191. if (unlikely(r)) {
  192. ath_print(common, ATH_DBG_WMI,
  193. "REGISTER READ FAILED: (0x%04x, %d)\n",
  194. reg_offset, r);
  195. return -EIO;
  196. }
  197. return be32_to_cpu(val);
  198. }
  199. static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
  200. {
  201. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  202. struct ath_common *common = ath9k_hw_common(ah);
  203. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  204. __be32 buf[2] = {
  205. cpu_to_be32(reg_offset),
  206. cpu_to_be32(val),
  207. };
  208. int r;
  209. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  210. (u8 *) &buf, sizeof(buf),
  211. (u8 *) &val, sizeof(val),
  212. 100);
  213. if (unlikely(r)) {
  214. ath_print(common, ATH_DBG_WMI,
  215. "REGISTER WRITE FAILED:(0x%04x, %d)\n",
  216. reg_offset, r);
  217. }
  218. }
  219. static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
  220. {
  221. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  222. struct ath_common *common = ath9k_hw_common(ah);
  223. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  224. u32 rsp_status;
  225. int r;
  226. mutex_lock(&priv->wmi->multi_write_mutex);
  227. /* Store the register/value */
  228. priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
  229. cpu_to_be32(reg_offset);
  230. priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
  231. cpu_to_be32(val);
  232. priv->wmi->multi_write_idx++;
  233. /* If the buffer is full, send it out. */
  234. if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
  235. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  236. (u8 *) &priv->wmi->multi_write,
  237. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  238. (u8 *) &rsp_status, sizeof(rsp_status),
  239. 100);
  240. if (unlikely(r)) {
  241. ath_print(common, ATH_DBG_WMI,
  242. "REGISTER WRITE FAILED, multi len: %d\n",
  243. priv->wmi->multi_write_idx);
  244. }
  245. priv->wmi->multi_write_idx = 0;
  246. }
  247. mutex_unlock(&priv->wmi->multi_write_mutex);
  248. }
  249. static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
  250. {
  251. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  252. struct ath_common *common = ath9k_hw_common(ah);
  253. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  254. if (atomic_read(&priv->wmi->mwrite_cnt))
  255. ath9k_regwrite_buffer(hw_priv, val, reg_offset);
  256. else
  257. ath9k_regwrite_single(hw_priv, val, reg_offset);
  258. }
  259. static void ath9k_enable_regwrite_buffer(void *hw_priv)
  260. {
  261. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  262. struct ath_common *common = ath9k_hw_common(ah);
  263. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  264. atomic_inc(&priv->wmi->mwrite_cnt);
  265. }
  266. static void ath9k_disable_regwrite_buffer(void *hw_priv)
  267. {
  268. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  269. struct ath_common *common = ath9k_hw_common(ah);
  270. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  271. atomic_dec(&priv->wmi->mwrite_cnt);
  272. }
  273. static void ath9k_regwrite_flush(void *hw_priv)
  274. {
  275. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  276. struct ath_common *common = ath9k_hw_common(ah);
  277. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  278. u32 rsp_status;
  279. int r;
  280. mutex_lock(&priv->wmi->multi_write_mutex);
  281. if (priv->wmi->multi_write_idx) {
  282. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  283. (u8 *) &priv->wmi->multi_write,
  284. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  285. (u8 *) &rsp_status, sizeof(rsp_status),
  286. 100);
  287. if (unlikely(r)) {
  288. ath_print(common, ATH_DBG_WMI,
  289. "REGISTER WRITE FAILED, multi len: %d\n",
  290. priv->wmi->multi_write_idx);
  291. }
  292. priv->wmi->multi_write_idx = 0;
  293. }
  294. mutex_unlock(&priv->wmi->multi_write_mutex);
  295. }
  296. static const struct ath_ops ath9k_common_ops = {
  297. .read = ath9k_regread,
  298. .write = ath9k_regwrite,
  299. .enable_write_buffer = ath9k_enable_regwrite_buffer,
  300. .disable_write_buffer = ath9k_disable_regwrite_buffer,
  301. .write_flush = ath9k_regwrite_flush,
  302. };
  303. static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
  304. {
  305. *csz = L1_CACHE_BYTES >> 2;
  306. }
  307. static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  308. {
  309. struct ath_hw *ah = (struct ath_hw *) common->ah;
  310. (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
  311. if (!ath9k_hw_wait(ah,
  312. AR_EEPROM_STATUS_DATA,
  313. AR_EEPROM_STATUS_DATA_BUSY |
  314. AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
  315. AH_WAIT_TIMEOUT))
  316. return false;
  317. *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
  318. AR_EEPROM_STATUS_DATA_VAL);
  319. return true;
  320. }
  321. static const struct ath_bus_ops ath9k_usb_bus_ops = {
  322. .ath_bus_type = ATH_USB,
  323. .read_cachesize = ath_usb_read_cachesize,
  324. .eeprom_read = ath_usb_eeprom_read,
  325. };
  326. static void setup_ht_cap(struct ath9k_htc_priv *priv,
  327. struct ieee80211_sta_ht_cap *ht_info)
  328. {
  329. ht_info->ht_supported = true;
  330. ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
  331. IEEE80211_HT_CAP_SM_PS |
  332. IEEE80211_HT_CAP_SGI_40 |
  333. IEEE80211_HT_CAP_DSSSCCK40;
  334. ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  335. ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
  336. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  337. ht_info->mcs.rx_mask[0] = 0xff;
  338. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
  339. }
  340. static int ath9k_init_queues(struct ath9k_htc_priv *priv)
  341. {
  342. struct ath_common *common = ath9k_hw_common(priv->ah);
  343. int i;
  344. for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
  345. priv->hwq_map[i] = -1;
  346. if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) {
  347. ath_print(common, ATH_DBG_FATAL,
  348. "Unable to setup xmit queue for BE traffic\n");
  349. goto err;
  350. }
  351. if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BK)) {
  352. ath_print(common, ATH_DBG_FATAL,
  353. "Unable to setup xmit queue for BK traffic\n");
  354. goto err;
  355. }
  356. if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VI)) {
  357. ath_print(common, ATH_DBG_FATAL,
  358. "Unable to setup xmit queue for VI traffic\n");
  359. goto err;
  360. }
  361. if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VO)) {
  362. ath_print(common, ATH_DBG_FATAL,
  363. "Unable to setup xmit queue for VO traffic\n");
  364. goto err;
  365. }
  366. return 0;
  367. err:
  368. return -EINVAL;
  369. }
  370. static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
  371. {
  372. struct ath_common *common = ath9k_hw_common(priv->ah);
  373. int i = 0;
  374. /* Get the hardware key cache size. */
  375. common->keymax = priv->ah->caps.keycache_size;
  376. if (common->keymax > ATH_KEYMAX) {
  377. ath_print(common, ATH_DBG_ANY,
  378. "Warning, using only %u entries in %u key cache\n",
  379. ATH_KEYMAX, common->keymax);
  380. common->keymax = ATH_KEYMAX;
  381. }
  382. /*
  383. * Reset the key cache since some parts do not
  384. * reset the contents on initial power up.
  385. */
  386. for (i = 0; i < common->keymax; i++)
  387. ath9k_hw_keyreset(priv->ah, (u16) i);
  388. if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
  389. ATH9K_CIPHER_TKIP, NULL)) {
  390. /*
  391. * Whether we should enable h/w TKIP MIC.
  392. * XXX: if we don't support WME TKIP MIC, then we wouldn't
  393. * report WMM capable, so it's always safe to turn on
  394. * TKIP MIC in this case.
  395. */
  396. ath9k_hw_setcapability(priv->ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL);
  397. }
  398. /*
  399. * Check whether the separate key cache entries
  400. * are required to handle both tx+rx MIC keys.
  401. * With split mic keys the number of stations is limited
  402. * to 27 otherwise 59.
  403. */
  404. if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
  405. ATH9K_CIPHER_TKIP, NULL)
  406. && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
  407. ATH9K_CIPHER_MIC, NULL)
  408. && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_TKIP_SPLIT,
  409. 0, NULL))
  410. common->splitmic = 1;
  411. /* turn on mcast key search if possible */
  412. if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
  413. (void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH,
  414. 1, 1, NULL);
  415. }
  416. static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
  417. {
  418. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
  419. priv->sbands[IEEE80211_BAND_2GHZ].channels =
  420. ath9k_2ghz_channels;
  421. priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
  422. priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
  423. ARRAY_SIZE(ath9k_2ghz_channels);
  424. priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
  425. priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
  426. ARRAY_SIZE(ath9k_legacy_rates);
  427. }
  428. }
  429. static void ath9k_init_misc(struct ath9k_htc_priv *priv)
  430. {
  431. struct ath_common *common = ath9k_hw_common(priv->ah);
  432. common->tx_chainmask = priv->ah->caps.tx_chainmask;
  433. common->rx_chainmask = priv->ah->caps.rx_chainmask;
  434. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  435. memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
  436. priv->op_flags |= OP_TXAGGR;
  437. priv->ah->opmode = NL80211_IFTYPE_STATION;
  438. }
  439. static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
  440. {
  441. struct ath_hw *ah = NULL;
  442. struct ath_common *common;
  443. int ret = 0, csz = 0;
  444. priv->op_flags |= OP_INVALID;
  445. ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
  446. if (!ah)
  447. return -ENOMEM;
  448. ah->hw_version.devid = devid;
  449. ah->hw_version.subsysid = 0; /* FIXME */
  450. priv->ah = ah;
  451. common = ath9k_hw_common(ah);
  452. common->ops = &ath9k_common_ops;
  453. common->bus_ops = &ath9k_usb_bus_ops;
  454. common->ah = ah;
  455. common->hw = priv->hw;
  456. common->priv = priv;
  457. common->debug_mask = ath9k_debug;
  458. spin_lock_init(&priv->wmi->wmi_lock);
  459. spin_lock_init(&priv->beacon_lock);
  460. spin_lock_init(&priv->tx_lock);
  461. mutex_init(&priv->mutex);
  462. mutex_init(&priv->aggr_work.mutex);
  463. mutex_init(&priv->htc_pm_lock);
  464. tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
  465. (unsigned long)priv);
  466. tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
  467. (unsigned long)priv);
  468. tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
  469. INIT_DELAYED_WORK(&priv->ath9k_aggr_work, ath9k_htc_aggr_work);
  470. INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
  471. INIT_WORK(&priv->ps_work, ath9k_ps_work);
  472. /*
  473. * Cache line size is used to size and align various
  474. * structures used to communicate with the hardware.
  475. */
  476. ath_read_cachesize(common, &csz);
  477. common->cachelsz = csz << 2; /* convert to bytes */
  478. ret = ath9k_hw_init(ah);
  479. if (ret) {
  480. ath_print(common, ATH_DBG_FATAL,
  481. "Unable to initialize hardware; "
  482. "initialization status: %d\n", ret);
  483. goto err_hw;
  484. }
  485. ret = ath9k_htc_init_debug(ah);
  486. if (ret) {
  487. ath_print(common, ATH_DBG_FATAL,
  488. "Unable to create debugfs files\n");
  489. goto err_debug;
  490. }
  491. ret = ath9k_init_queues(priv);
  492. if (ret)
  493. goto err_queues;
  494. ath9k_init_crypto(priv);
  495. ath9k_init_channels_rates(priv);
  496. ath9k_init_misc(priv);
  497. return 0;
  498. err_queues:
  499. ath9k_htc_exit_debug(ah);
  500. err_debug:
  501. ath9k_hw_deinit(ah);
  502. err_hw:
  503. kfree(ah);
  504. priv->ah = NULL;
  505. return ret;
  506. }
  507. static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
  508. struct ieee80211_hw *hw)
  509. {
  510. struct ath_common *common = ath9k_hw_common(priv->ah);
  511. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  512. IEEE80211_HW_AMPDU_AGGREGATION |
  513. IEEE80211_HW_SPECTRUM_MGMT |
  514. IEEE80211_HW_HAS_RATE_CONTROL |
  515. IEEE80211_HW_RX_INCLUDES_FCS |
  516. IEEE80211_HW_SUPPORTS_PS |
  517. IEEE80211_HW_PS_NULLFUNC_STACK;
  518. hw->wiphy->interface_modes =
  519. BIT(NL80211_IFTYPE_STATION) |
  520. BIT(NL80211_IFTYPE_ADHOC);
  521. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  522. hw->queues = 4;
  523. hw->channel_change_time = 5000;
  524. hw->max_listen_interval = 10;
  525. hw->vif_data_size = sizeof(struct ath9k_htc_vif);
  526. hw->sta_data_size = sizeof(struct ath9k_htc_sta);
  527. /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
  528. hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
  529. sizeof(struct htc_frame_hdr) + 4;
  530. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  531. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  532. &priv->sbands[IEEE80211_BAND_2GHZ];
  533. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  534. if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
  535. setup_ht_cap(priv,
  536. &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
  537. }
  538. SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
  539. }
  540. static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
  541. {
  542. struct ieee80211_hw *hw = priv->hw;
  543. struct ath_common *common;
  544. struct ath_hw *ah;
  545. int error = 0;
  546. struct ath_regulatory *reg;
  547. /* Bring up device */
  548. error = ath9k_init_priv(priv, devid);
  549. if (error != 0)
  550. goto err_init;
  551. ah = priv->ah;
  552. common = ath9k_hw_common(ah);
  553. ath9k_set_hw_capab(priv, hw);
  554. /* Initialize regulatory */
  555. error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
  556. ath9k_reg_notifier);
  557. if (error)
  558. goto err_regd;
  559. reg = &common->regulatory;
  560. /* Setup TX */
  561. error = ath9k_tx_init(priv);
  562. if (error != 0)
  563. goto err_tx;
  564. /* Setup RX */
  565. error = ath9k_rx_init(priv);
  566. if (error != 0)
  567. goto err_rx;
  568. /* Register with mac80211 */
  569. error = ieee80211_register_hw(hw);
  570. if (error)
  571. goto err_register;
  572. /* Handle world regulatory */
  573. if (!ath_is_world_regd(reg)) {
  574. error = regulatory_hint(hw->wiphy, reg->alpha2);
  575. if (error)
  576. goto err_world;
  577. }
  578. ath9k_init_leds(priv);
  579. ath9k_start_rfkill_poll(priv);
  580. return 0;
  581. err_world:
  582. ieee80211_unregister_hw(hw);
  583. err_register:
  584. ath9k_rx_cleanup(priv);
  585. err_rx:
  586. ath9k_tx_cleanup(priv);
  587. err_tx:
  588. /* Nothing */
  589. err_regd:
  590. ath9k_deinit_priv(priv);
  591. err_init:
  592. return error;
  593. }
  594. int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
  595. u16 devid)
  596. {
  597. struct ieee80211_hw *hw;
  598. struct ath9k_htc_priv *priv;
  599. int ret;
  600. hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
  601. if (!hw)
  602. return -ENOMEM;
  603. priv = hw->priv;
  604. priv->hw = hw;
  605. priv->htc = htc_handle;
  606. priv->dev = dev;
  607. htc_handle->drv_priv = priv;
  608. SET_IEEE80211_DEV(hw, priv->dev);
  609. ret = ath9k_htc_wait_for_target(priv);
  610. if (ret)
  611. goto err_free;
  612. priv->wmi = ath9k_init_wmi(priv);
  613. if (!priv->wmi) {
  614. ret = -EINVAL;
  615. goto err_free;
  616. }
  617. ret = ath9k_init_htc_services(priv);
  618. if (ret)
  619. goto err_init;
  620. /* The device may have been unplugged earlier. */
  621. priv->op_flags &= ~OP_UNPLUGGED;
  622. ret = ath9k_init_device(priv, devid);
  623. if (ret)
  624. goto err_init;
  625. return 0;
  626. err_init:
  627. ath9k_deinit_wmi(priv);
  628. err_free:
  629. ieee80211_free_hw(hw);
  630. return ret;
  631. }
  632. void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
  633. {
  634. if (htc_handle->drv_priv) {
  635. /* Check if the device has been yanked out. */
  636. if (hotunplug)
  637. htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
  638. ath9k_deinit_device(htc_handle->drv_priv);
  639. ath9k_deinit_wmi(htc_handle->drv_priv);
  640. ieee80211_free_hw(htc_handle->drv_priv->hw);
  641. }
  642. }
  643. #ifdef CONFIG_PM
  644. int ath9k_htc_resume(struct htc_target *htc_handle)
  645. {
  646. int ret;
  647. ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
  648. if (ret)
  649. return ret;
  650. ret = ath9k_init_htc_services(htc_handle->drv_priv);
  651. return ret;
  652. }
  653. #endif
  654. static int __init ath9k_htc_init(void)
  655. {
  656. int error;
  657. error = ath9k_htc_debug_create_root();
  658. if (error < 0) {
  659. printk(KERN_ERR
  660. "ath9k_htc: Unable to create debugfs root: %d\n",
  661. error);
  662. goto err_dbg;
  663. }
  664. error = ath9k_hif_usb_init();
  665. if (error < 0) {
  666. printk(KERN_ERR
  667. "ath9k_htc: No USB devices found,"
  668. " driver not installed.\n");
  669. error = -ENODEV;
  670. goto err_usb;
  671. }
  672. return 0;
  673. err_usb:
  674. ath9k_htc_debug_remove_root();
  675. err_dbg:
  676. return error;
  677. }
  678. module_init(ath9k_htc_init);
  679. static void __exit ath9k_htc_exit(void)
  680. {
  681. ath9k_hif_usb_exit();
  682. ath9k_htc_debug_remove_root();
  683. printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
  684. }
  685. module_exit(ath9k_htc_exit);