time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/delay.h>
  40. #include <asm/s390_ext.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/timer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. /* change this if you have some constant time drift */
  49. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  50. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  51. u64 sched_clock_base_cc = -1; /* Force to data section. */
  52. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  53. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  54. /*
  55. * Scheduler clock - returns current time in nanosec units.
  56. */
  57. unsigned long long notrace sched_clock(void)
  58. {
  59. return (get_clock_monotonic() * 125) >> 9;
  60. }
  61. /*
  62. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  63. */
  64. unsigned long long monotonic_clock(void)
  65. {
  66. return sched_clock();
  67. }
  68. EXPORT_SYMBOL(monotonic_clock);
  69. void tod_to_timeval(__u64 todval, struct timespec *xt)
  70. {
  71. unsigned long long sec;
  72. sec = todval >> 12;
  73. do_div(sec, 1000000);
  74. xt->tv_sec = sec;
  75. todval -= (sec * 1000000) << 12;
  76. xt->tv_nsec = ((todval * 1000) >> 12);
  77. }
  78. EXPORT_SYMBOL(tod_to_timeval);
  79. void clock_comparator_work(void)
  80. {
  81. struct clock_event_device *cd;
  82. S390_lowcore.clock_comparator = -1ULL;
  83. set_clock_comparator(S390_lowcore.clock_comparator);
  84. cd = &__get_cpu_var(comparators);
  85. cd->event_handler(cd);
  86. }
  87. /*
  88. * Fixup the clock comparator.
  89. */
  90. static void fixup_clock_comparator(unsigned long long delta)
  91. {
  92. /* If nobody is waiting there's nothing to fix. */
  93. if (S390_lowcore.clock_comparator == -1ULL)
  94. return;
  95. S390_lowcore.clock_comparator += delta;
  96. set_clock_comparator(S390_lowcore.clock_comparator);
  97. }
  98. static int s390_next_event(unsigned long delta,
  99. struct clock_event_device *evt)
  100. {
  101. S390_lowcore.clock_comparator = get_clock() + delta;
  102. set_clock_comparator(S390_lowcore.clock_comparator);
  103. return 0;
  104. }
  105. static void s390_set_mode(enum clock_event_mode mode,
  106. struct clock_event_device *evt)
  107. {
  108. }
  109. /*
  110. * Set up lowcore and control register of the current cpu to
  111. * enable TOD clock and clock comparator interrupts.
  112. */
  113. void init_cpu_timer(void)
  114. {
  115. struct clock_event_device *cd;
  116. int cpu;
  117. S390_lowcore.clock_comparator = -1ULL;
  118. set_clock_comparator(S390_lowcore.clock_comparator);
  119. cpu = smp_processor_id();
  120. cd = &per_cpu(comparators, cpu);
  121. cd->name = "comparator";
  122. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  123. cd->mult = 16777;
  124. cd->shift = 12;
  125. cd->min_delta_ns = 1;
  126. cd->max_delta_ns = LONG_MAX;
  127. cd->rating = 400;
  128. cd->cpumask = cpumask_of(cpu);
  129. cd->set_next_event = s390_next_event;
  130. cd->set_mode = s390_set_mode;
  131. clockevents_register_device(cd);
  132. /* Enable clock comparator timer interrupt. */
  133. __ctl_set_bit(0,11);
  134. /* Always allow the timing alert external interrupt. */
  135. __ctl_set_bit(0, 4);
  136. }
  137. static void clock_comparator_interrupt(__u16 code)
  138. {
  139. if (S390_lowcore.clock_comparator == -1ULL)
  140. set_clock_comparator(S390_lowcore.clock_comparator);
  141. }
  142. static void etr_timing_alert(struct etr_irq_parm *);
  143. static void stp_timing_alert(struct stp_irq_parm *);
  144. static void timing_alert_interrupt(__u16 code)
  145. {
  146. if (S390_lowcore.ext_params & 0x00c40000)
  147. etr_timing_alert((struct etr_irq_parm *)
  148. &S390_lowcore.ext_params);
  149. if (S390_lowcore.ext_params & 0x00038000)
  150. stp_timing_alert((struct stp_irq_parm *)
  151. &S390_lowcore.ext_params);
  152. }
  153. static void etr_reset(void);
  154. static void stp_reset(void);
  155. void read_persistent_clock(struct timespec *ts)
  156. {
  157. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  158. }
  159. void read_boot_clock(struct timespec *ts)
  160. {
  161. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  162. }
  163. static cycle_t read_tod_clock(struct clocksource *cs)
  164. {
  165. return get_clock();
  166. }
  167. static struct clocksource clocksource_tod = {
  168. .name = "tod",
  169. .rating = 400,
  170. .read = read_tod_clock,
  171. .mask = -1ULL,
  172. .mult = 1000,
  173. .shift = 12,
  174. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  175. };
  176. struct clocksource * __init clocksource_default_clock(void)
  177. {
  178. return &clocksource_tod;
  179. }
  180. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
  181. u32 mult)
  182. {
  183. if (clock != &clocksource_tod)
  184. return;
  185. /* Make userspace gettimeofday spin until we're done. */
  186. ++vdso_data->tb_update_count;
  187. smp_wmb();
  188. vdso_data->xtime_tod_stamp = clock->cycle_last;
  189. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  190. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  191. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  192. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  193. smp_wmb();
  194. ++vdso_data->tb_update_count;
  195. }
  196. extern struct timezone sys_tz;
  197. void update_vsyscall_tz(void)
  198. {
  199. /* Make userspace gettimeofday spin until we're done. */
  200. ++vdso_data->tb_update_count;
  201. smp_wmb();
  202. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  203. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  204. smp_wmb();
  205. ++vdso_data->tb_update_count;
  206. }
  207. /*
  208. * Initialize the TOD clock and the CPU timer of
  209. * the boot cpu.
  210. */
  211. void __init time_init(void)
  212. {
  213. /* Reset time synchronization interfaces. */
  214. etr_reset();
  215. stp_reset();
  216. /* request the clock comparator external interrupt */
  217. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  218. panic("Couldn't request external interrupt 0x1004");
  219. /* request the timing alert external interrupt */
  220. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  221. panic("Couldn't request external interrupt 0x1406");
  222. if (clocksource_register(&clocksource_tod) != 0)
  223. panic("Could not register TOD clock source");
  224. /* Enable TOD clock interrupts on the boot cpu. */
  225. init_cpu_timer();
  226. /* Enable cpu timer interrupts on the boot cpu. */
  227. vtime_init();
  228. }
  229. /*
  230. * The time is "clock". old is what we think the time is.
  231. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  232. * "delay" is an approximation how long the synchronization took. If
  233. * the time correction is positive, then "delay" is subtracted from
  234. * the time difference and only the remaining part is passed to ntp.
  235. */
  236. static unsigned long long adjust_time(unsigned long long old,
  237. unsigned long long clock,
  238. unsigned long long delay)
  239. {
  240. unsigned long long delta, ticks;
  241. struct timex adjust;
  242. if (clock > old) {
  243. /* It is later than we thought. */
  244. delta = ticks = clock - old;
  245. delta = ticks = (delta < delay) ? 0 : delta - delay;
  246. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  247. adjust.offset = ticks * (1000000 / HZ);
  248. } else {
  249. /* It is earlier than we thought. */
  250. delta = ticks = old - clock;
  251. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  252. delta = -delta;
  253. adjust.offset = -ticks * (1000000 / HZ);
  254. }
  255. sched_clock_base_cc += delta;
  256. if (adjust.offset != 0) {
  257. pr_notice("The ETR interface has adjusted the clock "
  258. "by %li microseconds\n", adjust.offset);
  259. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  260. do_adjtimex(&adjust);
  261. }
  262. return delta;
  263. }
  264. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  265. static DEFINE_MUTEX(clock_sync_mutex);
  266. static unsigned long clock_sync_flags;
  267. #define CLOCK_SYNC_HAS_ETR 0
  268. #define CLOCK_SYNC_HAS_STP 1
  269. #define CLOCK_SYNC_ETR 2
  270. #define CLOCK_SYNC_STP 3
  271. /*
  272. * The synchronous get_clock function. It will write the current clock
  273. * value to the clock pointer and return 0 if the clock is in sync with
  274. * the external time source. If the clock mode is local it will return
  275. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  276. * reference.
  277. */
  278. int get_sync_clock(unsigned long long *clock)
  279. {
  280. atomic_t *sw_ptr;
  281. unsigned int sw0, sw1;
  282. sw_ptr = &get_cpu_var(clock_sync_word);
  283. sw0 = atomic_read(sw_ptr);
  284. *clock = get_clock();
  285. sw1 = atomic_read(sw_ptr);
  286. put_cpu_var(clock_sync_word);
  287. if (sw0 == sw1 && (sw0 & 0x80000000U))
  288. /* Success: time is in sync. */
  289. return 0;
  290. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  291. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  292. return -ENOSYS;
  293. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  294. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  295. return -EACCES;
  296. return -EAGAIN;
  297. }
  298. EXPORT_SYMBOL(get_sync_clock);
  299. /*
  300. * Make get_sync_clock return -EAGAIN.
  301. */
  302. static void disable_sync_clock(void *dummy)
  303. {
  304. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  305. /*
  306. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  307. * fail until the sync bit is turned back on. In addition
  308. * increase the "sequence" counter to avoid the race of an
  309. * etr event and the complete recovery against get_sync_clock.
  310. */
  311. atomic_clear_mask(0x80000000, sw_ptr);
  312. atomic_inc(sw_ptr);
  313. }
  314. /*
  315. * Make get_sync_clock return 0 again.
  316. * Needs to be called from a context disabled for preemption.
  317. */
  318. static void enable_sync_clock(void)
  319. {
  320. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  321. atomic_set_mask(0x80000000, sw_ptr);
  322. }
  323. /*
  324. * Function to check if the clock is in sync.
  325. */
  326. static inline int check_sync_clock(void)
  327. {
  328. atomic_t *sw_ptr;
  329. int rc;
  330. sw_ptr = &get_cpu_var(clock_sync_word);
  331. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  332. put_cpu_var(clock_sync_word);
  333. return rc;
  334. }
  335. /* Single threaded workqueue used for etr and stp sync events */
  336. static struct workqueue_struct *time_sync_wq;
  337. static void __init time_init_wq(void)
  338. {
  339. if (time_sync_wq)
  340. return;
  341. time_sync_wq = create_singlethread_workqueue("timesync");
  342. stop_machine_create();
  343. }
  344. /*
  345. * External Time Reference (ETR) code.
  346. */
  347. static int etr_port0_online;
  348. static int etr_port1_online;
  349. static int etr_steai_available;
  350. static int __init early_parse_etr(char *p)
  351. {
  352. if (strncmp(p, "off", 3) == 0)
  353. etr_port0_online = etr_port1_online = 0;
  354. else if (strncmp(p, "port0", 5) == 0)
  355. etr_port0_online = 1;
  356. else if (strncmp(p, "port1", 5) == 0)
  357. etr_port1_online = 1;
  358. else if (strncmp(p, "on", 2) == 0)
  359. etr_port0_online = etr_port1_online = 1;
  360. return 0;
  361. }
  362. early_param("etr", early_parse_etr);
  363. enum etr_event {
  364. ETR_EVENT_PORT0_CHANGE,
  365. ETR_EVENT_PORT1_CHANGE,
  366. ETR_EVENT_PORT_ALERT,
  367. ETR_EVENT_SYNC_CHECK,
  368. ETR_EVENT_SWITCH_LOCAL,
  369. ETR_EVENT_UPDATE,
  370. };
  371. /*
  372. * Valid bit combinations of the eacr register are (x = don't care):
  373. * e0 e1 dp p0 p1 ea es sl
  374. * 0 0 x 0 0 0 0 0 initial, disabled state
  375. * 0 0 x 0 1 1 0 0 port 1 online
  376. * 0 0 x 1 0 1 0 0 port 0 online
  377. * 0 0 x 1 1 1 0 0 both ports online
  378. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  379. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  380. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  381. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  382. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  383. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  384. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  385. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  386. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  387. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  388. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  389. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  390. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  391. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  392. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  393. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  394. */
  395. static struct etr_eacr etr_eacr;
  396. static u64 etr_tolec; /* time of last eacr update */
  397. static struct etr_aib etr_port0;
  398. static int etr_port0_uptodate;
  399. static struct etr_aib etr_port1;
  400. static int etr_port1_uptodate;
  401. static unsigned long etr_events;
  402. static struct timer_list etr_timer;
  403. static void etr_timeout(unsigned long dummy);
  404. static void etr_work_fn(struct work_struct *work);
  405. static DEFINE_MUTEX(etr_work_mutex);
  406. static DECLARE_WORK(etr_work, etr_work_fn);
  407. /*
  408. * Reset ETR attachment.
  409. */
  410. static void etr_reset(void)
  411. {
  412. etr_eacr = (struct etr_eacr) {
  413. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  414. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  415. .es = 0, .sl = 0 };
  416. if (etr_setr(&etr_eacr) == 0) {
  417. etr_tolec = get_clock();
  418. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  419. if (etr_port0_online && etr_port1_online)
  420. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  421. } else if (etr_port0_online || etr_port1_online) {
  422. pr_warning("The real or virtual hardware system does "
  423. "not provide an ETR interface\n");
  424. etr_port0_online = etr_port1_online = 0;
  425. }
  426. }
  427. static int __init etr_init(void)
  428. {
  429. struct etr_aib aib;
  430. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  431. return 0;
  432. time_init_wq();
  433. /* Check if this machine has the steai instruction. */
  434. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  435. etr_steai_available = 1;
  436. setup_timer(&etr_timer, etr_timeout, 0UL);
  437. if (etr_port0_online) {
  438. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  439. queue_work(time_sync_wq, &etr_work);
  440. }
  441. if (etr_port1_online) {
  442. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  443. queue_work(time_sync_wq, &etr_work);
  444. }
  445. return 0;
  446. }
  447. arch_initcall(etr_init);
  448. /*
  449. * Two sorts of ETR machine checks. The architecture reads:
  450. * "When a machine-check niterruption occurs and if a switch-to-local or
  451. * ETR-sync-check interrupt request is pending but disabled, this pending
  452. * disabled interruption request is indicated and is cleared".
  453. * Which means that we can get etr_switch_to_local events from the machine
  454. * check handler although the interruption condition is disabled. Lovely..
  455. */
  456. /*
  457. * Switch to local machine check. This is called when the last usable
  458. * ETR port goes inactive. After switch to local the clock is not in sync.
  459. */
  460. void etr_switch_to_local(void)
  461. {
  462. if (!etr_eacr.sl)
  463. return;
  464. disable_sync_clock(NULL);
  465. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  466. queue_work(time_sync_wq, &etr_work);
  467. }
  468. /*
  469. * ETR sync check machine check. This is called when the ETR OTE and the
  470. * local clock OTE are farther apart than the ETR sync check tolerance.
  471. * After a ETR sync check the clock is not in sync. The machine check
  472. * is broadcasted to all cpus at the same time.
  473. */
  474. void etr_sync_check(void)
  475. {
  476. if (!etr_eacr.es)
  477. return;
  478. disable_sync_clock(NULL);
  479. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  480. queue_work(time_sync_wq, &etr_work);
  481. }
  482. /*
  483. * ETR timing alert. There are two causes:
  484. * 1) port state change, check the usability of the port
  485. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  486. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  487. * or ETR-data word 4 (edf4) has changed.
  488. */
  489. static void etr_timing_alert(struct etr_irq_parm *intparm)
  490. {
  491. if (intparm->pc0)
  492. /* ETR port 0 state change. */
  493. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  494. if (intparm->pc1)
  495. /* ETR port 1 state change. */
  496. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  497. if (intparm->eai)
  498. /*
  499. * ETR port alert on either port 0, 1 or both.
  500. * Both ports are not up-to-date now.
  501. */
  502. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  503. queue_work(time_sync_wq, &etr_work);
  504. }
  505. static void etr_timeout(unsigned long dummy)
  506. {
  507. set_bit(ETR_EVENT_UPDATE, &etr_events);
  508. queue_work(time_sync_wq, &etr_work);
  509. }
  510. /*
  511. * Check if the etr mode is pss.
  512. */
  513. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  514. {
  515. return eacr.es && !eacr.sl;
  516. }
  517. /*
  518. * Check if the etr mode is etr.
  519. */
  520. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  521. {
  522. return eacr.es && eacr.sl;
  523. }
  524. /*
  525. * Check if the port can be used for TOD synchronization.
  526. * For PPS mode the port has to receive OTEs. For ETR mode
  527. * the port has to receive OTEs, the ETR stepping bit has to
  528. * be zero and the validity bits for data frame 1, 2, and 3
  529. * have to be 1.
  530. */
  531. static int etr_port_valid(struct etr_aib *aib, int port)
  532. {
  533. unsigned int psc;
  534. /* Check that this port is receiving OTEs. */
  535. if (aib->tsp == 0)
  536. return 0;
  537. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  538. if (psc == etr_lpsc_pps_mode)
  539. return 1;
  540. if (psc == etr_lpsc_operational_step)
  541. return !aib->esw.y && aib->slsw.v1 &&
  542. aib->slsw.v2 && aib->slsw.v3;
  543. return 0;
  544. }
  545. /*
  546. * Check if two ports are on the same network.
  547. */
  548. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  549. {
  550. // FIXME: any other fields we have to compare?
  551. return aib1->edf1.net_id == aib2->edf1.net_id;
  552. }
  553. /*
  554. * Wrapper for etr_stei that converts physical port states
  555. * to logical port states to be consistent with the output
  556. * of stetr (see etr_psc vs. etr_lpsc).
  557. */
  558. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  559. {
  560. BUG_ON(etr_steai(aib, func) != 0);
  561. /* Convert port state to logical port state. */
  562. if (aib->esw.psc0 == 1)
  563. aib->esw.psc0 = 2;
  564. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  565. aib->esw.psc0 = 1;
  566. if (aib->esw.psc1 == 1)
  567. aib->esw.psc1 = 2;
  568. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  569. aib->esw.psc1 = 1;
  570. }
  571. /*
  572. * Check if the aib a2 is still connected to the same attachment as
  573. * aib a1, the etv values differ by one and a2 is valid.
  574. */
  575. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  576. {
  577. int state_a1, state_a2;
  578. /* Paranoia check: e0/e1 should better be the same. */
  579. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  580. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  581. return 0;
  582. /* Still connected to the same etr ? */
  583. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  584. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  585. if (state_a1 == etr_lpsc_operational_step) {
  586. if (state_a2 != etr_lpsc_operational_step ||
  587. a1->edf1.net_id != a2->edf1.net_id ||
  588. a1->edf1.etr_id != a2->edf1.etr_id ||
  589. a1->edf1.etr_pn != a2->edf1.etr_pn)
  590. return 0;
  591. } else if (state_a2 != etr_lpsc_pps_mode)
  592. return 0;
  593. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  594. if (a1->edf2.etv + 1 != a2->edf2.etv)
  595. return 0;
  596. if (!etr_port_valid(a2, p))
  597. return 0;
  598. return 1;
  599. }
  600. struct clock_sync_data {
  601. atomic_t cpus;
  602. int in_sync;
  603. unsigned long long fixup_cc;
  604. int etr_port;
  605. struct etr_aib *etr_aib;
  606. };
  607. static void clock_sync_cpu(struct clock_sync_data *sync)
  608. {
  609. atomic_dec(&sync->cpus);
  610. enable_sync_clock();
  611. /*
  612. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  613. * is called on all other cpus while the TOD clocks is stopped.
  614. * __udelay will stop the cpu on an enabled wait psw until the
  615. * TOD is running again.
  616. */
  617. while (sync->in_sync == 0) {
  618. __udelay(1);
  619. /*
  620. * A different cpu changes *in_sync. Therefore use
  621. * barrier() to force memory access.
  622. */
  623. barrier();
  624. }
  625. if (sync->in_sync != 1)
  626. /* Didn't work. Clear per-cpu in sync bit again. */
  627. disable_sync_clock(NULL);
  628. /*
  629. * This round of TOD syncing is done. Set the clock comparator
  630. * to the next tick and let the processor continue.
  631. */
  632. fixup_clock_comparator(sync->fixup_cc);
  633. }
  634. /*
  635. * Sync the TOD clock using the port refered to by aibp. This port
  636. * has to be enabled and the other port has to be disabled. The
  637. * last eacr update has to be more than 1.6 seconds in the past.
  638. */
  639. static int etr_sync_clock(void *data)
  640. {
  641. static int first;
  642. unsigned long long clock, old_clock, delay, delta;
  643. struct clock_sync_data *etr_sync;
  644. struct etr_aib *sync_port, *aib;
  645. int port;
  646. int rc;
  647. etr_sync = data;
  648. if (xchg(&first, 1) == 1) {
  649. /* Slave */
  650. clock_sync_cpu(etr_sync);
  651. return 0;
  652. }
  653. /* Wait until all other cpus entered the sync function. */
  654. while (atomic_read(&etr_sync->cpus) != 0)
  655. cpu_relax();
  656. port = etr_sync->etr_port;
  657. aib = etr_sync->etr_aib;
  658. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  659. enable_sync_clock();
  660. /* Set clock to next OTE. */
  661. __ctl_set_bit(14, 21);
  662. __ctl_set_bit(0, 29);
  663. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  664. old_clock = get_clock();
  665. if (set_clock(clock) == 0) {
  666. __udelay(1); /* Wait for the clock to start. */
  667. __ctl_clear_bit(0, 29);
  668. __ctl_clear_bit(14, 21);
  669. etr_stetr(aib);
  670. /* Adjust Linux timing variables. */
  671. delay = (unsigned long long)
  672. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  673. delta = adjust_time(old_clock, clock, delay);
  674. etr_sync->fixup_cc = delta;
  675. fixup_clock_comparator(delta);
  676. /* Verify that the clock is properly set. */
  677. if (!etr_aib_follows(sync_port, aib, port)) {
  678. /* Didn't work. */
  679. disable_sync_clock(NULL);
  680. etr_sync->in_sync = -EAGAIN;
  681. rc = -EAGAIN;
  682. } else {
  683. etr_sync->in_sync = 1;
  684. rc = 0;
  685. }
  686. } else {
  687. /* Could not set the clock ?!? */
  688. __ctl_clear_bit(0, 29);
  689. __ctl_clear_bit(14, 21);
  690. disable_sync_clock(NULL);
  691. etr_sync->in_sync = -EAGAIN;
  692. rc = -EAGAIN;
  693. }
  694. xchg(&first, 0);
  695. return rc;
  696. }
  697. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  698. {
  699. struct clock_sync_data etr_sync;
  700. struct etr_aib *sync_port;
  701. int follows;
  702. int rc;
  703. /* Check if the current aib is adjacent to the sync port aib. */
  704. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  705. follows = etr_aib_follows(sync_port, aib, port);
  706. memcpy(sync_port, aib, sizeof(*aib));
  707. if (!follows)
  708. return -EAGAIN;
  709. memset(&etr_sync, 0, sizeof(etr_sync));
  710. etr_sync.etr_aib = aib;
  711. etr_sync.etr_port = port;
  712. get_online_cpus();
  713. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  714. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  715. put_online_cpus();
  716. return rc;
  717. }
  718. /*
  719. * Handle the immediate effects of the different events.
  720. * The port change event is used for online/offline changes.
  721. */
  722. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  723. {
  724. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  725. eacr.es = 0;
  726. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  727. eacr.es = eacr.sl = 0;
  728. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  729. etr_port0_uptodate = etr_port1_uptodate = 0;
  730. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  731. if (eacr.e0)
  732. /*
  733. * Port change of an enabled port. We have to
  734. * assume that this can have caused an stepping
  735. * port switch.
  736. */
  737. etr_tolec = get_clock();
  738. eacr.p0 = etr_port0_online;
  739. if (!eacr.p0)
  740. eacr.e0 = 0;
  741. etr_port0_uptodate = 0;
  742. }
  743. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  744. if (eacr.e1)
  745. /*
  746. * Port change of an enabled port. We have to
  747. * assume that this can have caused an stepping
  748. * port switch.
  749. */
  750. etr_tolec = get_clock();
  751. eacr.p1 = etr_port1_online;
  752. if (!eacr.p1)
  753. eacr.e1 = 0;
  754. etr_port1_uptodate = 0;
  755. }
  756. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  757. return eacr;
  758. }
  759. /*
  760. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  761. * one of the ports needs an update.
  762. */
  763. static void etr_set_tolec_timeout(unsigned long long now)
  764. {
  765. unsigned long micros;
  766. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  767. (!etr_eacr.p1 || etr_port1_uptodate))
  768. return;
  769. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  770. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  771. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  772. }
  773. /*
  774. * Set up a time that expires after 1/2 second.
  775. */
  776. static void etr_set_sync_timeout(void)
  777. {
  778. mod_timer(&etr_timer, jiffies + HZ/2);
  779. }
  780. /*
  781. * Update the aib information for one or both ports.
  782. */
  783. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  784. struct etr_eacr eacr)
  785. {
  786. /* With both ports disabled the aib information is useless. */
  787. if (!eacr.e0 && !eacr.e1)
  788. return eacr;
  789. /* Update port0 or port1 with aib stored in etr_work_fn. */
  790. if (aib->esw.q == 0) {
  791. /* Information for port 0 stored. */
  792. if (eacr.p0 && !etr_port0_uptodate) {
  793. etr_port0 = *aib;
  794. if (etr_port0_online)
  795. etr_port0_uptodate = 1;
  796. }
  797. } else {
  798. /* Information for port 1 stored. */
  799. if (eacr.p1 && !etr_port1_uptodate) {
  800. etr_port1 = *aib;
  801. if (etr_port0_online)
  802. etr_port1_uptodate = 1;
  803. }
  804. }
  805. /*
  806. * Do not try to get the alternate port aib if the clock
  807. * is not in sync yet.
  808. */
  809. if (!check_sync_clock())
  810. return eacr;
  811. /*
  812. * If steai is available we can get the information about
  813. * the other port immediately. If only stetr is available the
  814. * data-port bit toggle has to be used.
  815. */
  816. if (etr_steai_available) {
  817. if (eacr.p0 && !etr_port0_uptodate) {
  818. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  819. etr_port0_uptodate = 1;
  820. }
  821. if (eacr.p1 && !etr_port1_uptodate) {
  822. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  823. etr_port1_uptodate = 1;
  824. }
  825. } else {
  826. /*
  827. * One port was updated above, if the other
  828. * port is not uptodate toggle dp bit.
  829. */
  830. if ((eacr.p0 && !etr_port0_uptodate) ||
  831. (eacr.p1 && !etr_port1_uptodate))
  832. eacr.dp ^= 1;
  833. else
  834. eacr.dp = 0;
  835. }
  836. return eacr;
  837. }
  838. /*
  839. * Write new etr control register if it differs from the current one.
  840. * Return 1 if etr_tolec has been updated as well.
  841. */
  842. static void etr_update_eacr(struct etr_eacr eacr)
  843. {
  844. int dp_changed;
  845. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  846. /* No change, return. */
  847. return;
  848. /*
  849. * The disable of an active port of the change of the data port
  850. * bit can/will cause a change in the data port.
  851. */
  852. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  853. (etr_eacr.dp ^ eacr.dp) != 0;
  854. etr_eacr = eacr;
  855. etr_setr(&etr_eacr);
  856. if (dp_changed)
  857. etr_tolec = get_clock();
  858. }
  859. /*
  860. * ETR work. In this function you'll find the main logic. In
  861. * particular this is the only function that calls etr_update_eacr(),
  862. * it "controls" the etr control register.
  863. */
  864. static void etr_work_fn(struct work_struct *work)
  865. {
  866. unsigned long long now;
  867. struct etr_eacr eacr;
  868. struct etr_aib aib;
  869. int sync_port;
  870. /* prevent multiple execution. */
  871. mutex_lock(&etr_work_mutex);
  872. /* Create working copy of etr_eacr. */
  873. eacr = etr_eacr;
  874. /* Check for the different events and their immediate effects. */
  875. eacr = etr_handle_events(eacr);
  876. /* Check if ETR is supposed to be active. */
  877. eacr.ea = eacr.p0 || eacr.p1;
  878. if (!eacr.ea) {
  879. /* Both ports offline. Reset everything. */
  880. eacr.dp = eacr.es = eacr.sl = 0;
  881. on_each_cpu(disable_sync_clock, NULL, 1);
  882. del_timer_sync(&etr_timer);
  883. etr_update_eacr(eacr);
  884. goto out_unlock;
  885. }
  886. /* Store aib to get the current ETR status word. */
  887. BUG_ON(etr_stetr(&aib) != 0);
  888. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  889. now = get_clock();
  890. /*
  891. * Update the port information if the last stepping port change
  892. * or data port change is older than 1.6 seconds.
  893. */
  894. if (now >= etr_tolec + (1600000 << 12))
  895. eacr = etr_handle_update(&aib, eacr);
  896. /*
  897. * Select ports to enable. The prefered synchronization mode is PPS.
  898. * If a port can be enabled depends on a number of things:
  899. * 1) The port needs to be online and uptodate. A port is not
  900. * disabled just because it is not uptodate, but it is only
  901. * enabled if it is uptodate.
  902. * 2) The port needs to have the same mode (pps / etr).
  903. * 3) The port needs to be usable -> etr_port_valid() == 1
  904. * 4) To enable the second port the clock needs to be in sync.
  905. * 5) If both ports are useable and are ETR ports, the network id
  906. * has to be the same.
  907. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  908. */
  909. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  910. eacr.sl = 0;
  911. eacr.e0 = 1;
  912. if (!etr_mode_is_pps(etr_eacr))
  913. eacr.es = 0;
  914. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  915. eacr.e1 = 0;
  916. // FIXME: uptodate checks ?
  917. else if (etr_port0_uptodate && etr_port1_uptodate)
  918. eacr.e1 = 1;
  919. sync_port = (etr_port0_uptodate &&
  920. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  921. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  922. eacr.sl = 0;
  923. eacr.e0 = 0;
  924. eacr.e1 = 1;
  925. if (!etr_mode_is_pps(etr_eacr))
  926. eacr.es = 0;
  927. sync_port = (etr_port1_uptodate &&
  928. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  929. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  930. eacr.sl = 1;
  931. eacr.e0 = 1;
  932. if (!etr_mode_is_etr(etr_eacr))
  933. eacr.es = 0;
  934. if (!eacr.es || !eacr.p1 ||
  935. aib.esw.psc1 != etr_lpsc_operational_alt)
  936. eacr.e1 = 0;
  937. else if (etr_port0_uptodate && etr_port1_uptodate &&
  938. etr_compare_network(&etr_port0, &etr_port1))
  939. eacr.e1 = 1;
  940. sync_port = (etr_port0_uptodate &&
  941. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  942. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  943. eacr.sl = 1;
  944. eacr.e0 = 0;
  945. eacr.e1 = 1;
  946. if (!etr_mode_is_etr(etr_eacr))
  947. eacr.es = 0;
  948. sync_port = (etr_port1_uptodate &&
  949. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  950. } else {
  951. /* Both ports not usable. */
  952. eacr.es = eacr.sl = 0;
  953. sync_port = -1;
  954. }
  955. /*
  956. * If the clock is in sync just update the eacr and return.
  957. * If there is no valid sync port wait for a port update.
  958. */
  959. if (check_sync_clock() || sync_port < 0) {
  960. etr_update_eacr(eacr);
  961. etr_set_tolec_timeout(now);
  962. goto out_unlock;
  963. }
  964. /*
  965. * Prepare control register for clock syncing
  966. * (reset data port bit, set sync check control.
  967. */
  968. eacr.dp = 0;
  969. eacr.es = 1;
  970. /*
  971. * Update eacr and try to synchronize the clock. If the update
  972. * of eacr caused a stepping port switch (or if we have to
  973. * assume that a stepping port switch has occured) or the
  974. * clock syncing failed, reset the sync check control bit
  975. * and set up a timer to try again after 0.5 seconds
  976. */
  977. etr_update_eacr(eacr);
  978. if (now < etr_tolec + (1600000 << 12) ||
  979. etr_sync_clock_stop(&aib, sync_port) != 0) {
  980. /* Sync failed. Try again in 1/2 second. */
  981. eacr.es = 0;
  982. etr_update_eacr(eacr);
  983. etr_set_sync_timeout();
  984. } else
  985. etr_set_tolec_timeout(now);
  986. out_unlock:
  987. mutex_unlock(&etr_work_mutex);
  988. }
  989. /*
  990. * Sysfs interface functions
  991. */
  992. static struct sysdev_class etr_sysclass = {
  993. .name = "etr",
  994. };
  995. static struct sys_device etr_port0_dev = {
  996. .id = 0,
  997. .cls = &etr_sysclass,
  998. };
  999. static struct sys_device etr_port1_dev = {
  1000. .id = 1,
  1001. .cls = &etr_sysclass,
  1002. };
  1003. /*
  1004. * ETR class attributes
  1005. */
  1006. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1007. struct sysdev_class_attribute *attr,
  1008. char *buf)
  1009. {
  1010. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1011. }
  1012. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1013. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1014. struct sysdev_class_attribute *attr,
  1015. char *buf)
  1016. {
  1017. char *mode_str;
  1018. if (etr_mode_is_pps(etr_eacr))
  1019. mode_str = "pps";
  1020. else if (etr_mode_is_etr(etr_eacr))
  1021. mode_str = "etr";
  1022. else
  1023. mode_str = "local";
  1024. return sprintf(buf, "%s\n", mode_str);
  1025. }
  1026. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1027. /*
  1028. * ETR port attributes
  1029. */
  1030. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1031. {
  1032. if (dev == &etr_port0_dev)
  1033. return etr_port0_online ? &etr_port0 : NULL;
  1034. else
  1035. return etr_port1_online ? &etr_port1 : NULL;
  1036. }
  1037. static ssize_t etr_online_show(struct sys_device *dev,
  1038. struct sysdev_attribute *attr,
  1039. char *buf)
  1040. {
  1041. unsigned int online;
  1042. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1043. return sprintf(buf, "%i\n", online);
  1044. }
  1045. static ssize_t etr_online_store(struct sys_device *dev,
  1046. struct sysdev_attribute *attr,
  1047. const char *buf, size_t count)
  1048. {
  1049. unsigned int value;
  1050. value = simple_strtoul(buf, NULL, 0);
  1051. if (value != 0 && value != 1)
  1052. return -EINVAL;
  1053. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1054. return -EOPNOTSUPP;
  1055. mutex_lock(&clock_sync_mutex);
  1056. if (dev == &etr_port0_dev) {
  1057. if (etr_port0_online == value)
  1058. goto out; /* Nothing to do. */
  1059. etr_port0_online = value;
  1060. if (etr_port0_online && etr_port1_online)
  1061. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1062. else
  1063. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1064. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1065. queue_work(time_sync_wq, &etr_work);
  1066. } else {
  1067. if (etr_port1_online == value)
  1068. goto out; /* Nothing to do. */
  1069. etr_port1_online = value;
  1070. if (etr_port0_online && etr_port1_online)
  1071. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1072. else
  1073. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1074. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1075. queue_work(time_sync_wq, &etr_work);
  1076. }
  1077. out:
  1078. mutex_unlock(&clock_sync_mutex);
  1079. return count;
  1080. }
  1081. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1082. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1083. struct sysdev_attribute *attr,
  1084. char *buf)
  1085. {
  1086. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1087. etr_eacr.e0 : etr_eacr.e1);
  1088. }
  1089. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1090. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1091. struct sysdev_attribute *attr, char *buf)
  1092. {
  1093. if (!etr_port0_online && !etr_port1_online)
  1094. /* Status word is not uptodate if both ports are offline. */
  1095. return -ENODATA;
  1096. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1097. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1098. }
  1099. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1100. static ssize_t etr_untuned_show(struct sys_device *dev,
  1101. struct sysdev_attribute *attr, char *buf)
  1102. {
  1103. struct etr_aib *aib = etr_aib_from_dev(dev);
  1104. if (!aib || !aib->slsw.v1)
  1105. return -ENODATA;
  1106. return sprintf(buf, "%i\n", aib->edf1.u);
  1107. }
  1108. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1109. static ssize_t etr_network_id_show(struct sys_device *dev,
  1110. struct sysdev_attribute *attr, char *buf)
  1111. {
  1112. struct etr_aib *aib = etr_aib_from_dev(dev);
  1113. if (!aib || !aib->slsw.v1)
  1114. return -ENODATA;
  1115. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1116. }
  1117. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1118. static ssize_t etr_id_show(struct sys_device *dev,
  1119. struct sysdev_attribute *attr, char *buf)
  1120. {
  1121. struct etr_aib *aib = etr_aib_from_dev(dev);
  1122. if (!aib || !aib->slsw.v1)
  1123. return -ENODATA;
  1124. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1125. }
  1126. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1127. static ssize_t etr_port_number_show(struct sys_device *dev,
  1128. struct sysdev_attribute *attr, char *buf)
  1129. {
  1130. struct etr_aib *aib = etr_aib_from_dev(dev);
  1131. if (!aib || !aib->slsw.v1)
  1132. return -ENODATA;
  1133. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1134. }
  1135. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1136. static ssize_t etr_coupled_show(struct sys_device *dev,
  1137. struct sysdev_attribute *attr, char *buf)
  1138. {
  1139. struct etr_aib *aib = etr_aib_from_dev(dev);
  1140. if (!aib || !aib->slsw.v3)
  1141. return -ENODATA;
  1142. return sprintf(buf, "%i\n", aib->edf3.c);
  1143. }
  1144. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1145. static ssize_t etr_local_time_show(struct sys_device *dev,
  1146. struct sysdev_attribute *attr, char *buf)
  1147. {
  1148. struct etr_aib *aib = etr_aib_from_dev(dev);
  1149. if (!aib || !aib->slsw.v3)
  1150. return -ENODATA;
  1151. return sprintf(buf, "%i\n", aib->edf3.blto);
  1152. }
  1153. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1154. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1155. struct sysdev_attribute *attr, char *buf)
  1156. {
  1157. struct etr_aib *aib = etr_aib_from_dev(dev);
  1158. if (!aib || !aib->slsw.v3)
  1159. return -ENODATA;
  1160. return sprintf(buf, "%i\n", aib->edf3.buo);
  1161. }
  1162. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1163. static struct sysdev_attribute *etr_port_attributes[] = {
  1164. &attr_online,
  1165. &attr_stepping_control,
  1166. &attr_state_code,
  1167. &attr_untuned,
  1168. &attr_network,
  1169. &attr_id,
  1170. &attr_port,
  1171. &attr_coupled,
  1172. &attr_local_time,
  1173. &attr_utc_offset,
  1174. NULL
  1175. };
  1176. static int __init etr_register_port(struct sys_device *dev)
  1177. {
  1178. struct sysdev_attribute **attr;
  1179. int rc;
  1180. rc = sysdev_register(dev);
  1181. if (rc)
  1182. goto out;
  1183. for (attr = etr_port_attributes; *attr; attr++) {
  1184. rc = sysdev_create_file(dev, *attr);
  1185. if (rc)
  1186. goto out_unreg;
  1187. }
  1188. return 0;
  1189. out_unreg:
  1190. for (; attr >= etr_port_attributes; attr--)
  1191. sysdev_remove_file(dev, *attr);
  1192. sysdev_unregister(dev);
  1193. out:
  1194. return rc;
  1195. }
  1196. static void __init etr_unregister_port(struct sys_device *dev)
  1197. {
  1198. struct sysdev_attribute **attr;
  1199. for (attr = etr_port_attributes; *attr; attr++)
  1200. sysdev_remove_file(dev, *attr);
  1201. sysdev_unregister(dev);
  1202. }
  1203. static int __init etr_init_sysfs(void)
  1204. {
  1205. int rc;
  1206. rc = sysdev_class_register(&etr_sysclass);
  1207. if (rc)
  1208. goto out;
  1209. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1210. if (rc)
  1211. goto out_unreg_class;
  1212. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1213. if (rc)
  1214. goto out_remove_stepping_port;
  1215. rc = etr_register_port(&etr_port0_dev);
  1216. if (rc)
  1217. goto out_remove_stepping_mode;
  1218. rc = etr_register_port(&etr_port1_dev);
  1219. if (rc)
  1220. goto out_remove_port0;
  1221. return 0;
  1222. out_remove_port0:
  1223. etr_unregister_port(&etr_port0_dev);
  1224. out_remove_stepping_mode:
  1225. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1226. out_remove_stepping_port:
  1227. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1228. out_unreg_class:
  1229. sysdev_class_unregister(&etr_sysclass);
  1230. out:
  1231. return rc;
  1232. }
  1233. device_initcall(etr_init_sysfs);
  1234. /*
  1235. * Server Time Protocol (STP) code.
  1236. */
  1237. static int stp_online;
  1238. static struct stp_sstpi stp_info;
  1239. static void *stp_page;
  1240. static void stp_work_fn(struct work_struct *work);
  1241. static DEFINE_MUTEX(stp_work_mutex);
  1242. static DECLARE_WORK(stp_work, stp_work_fn);
  1243. static struct timer_list stp_timer;
  1244. static int __init early_parse_stp(char *p)
  1245. {
  1246. if (strncmp(p, "off", 3) == 0)
  1247. stp_online = 0;
  1248. else if (strncmp(p, "on", 2) == 0)
  1249. stp_online = 1;
  1250. return 0;
  1251. }
  1252. early_param("stp", early_parse_stp);
  1253. /*
  1254. * Reset STP attachment.
  1255. */
  1256. static void __init stp_reset(void)
  1257. {
  1258. int rc;
  1259. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1260. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1261. if (rc == 0)
  1262. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1263. else if (stp_online) {
  1264. pr_warning("The real or virtual hardware system does "
  1265. "not provide an STP interface\n");
  1266. free_page((unsigned long) stp_page);
  1267. stp_page = NULL;
  1268. stp_online = 0;
  1269. }
  1270. }
  1271. static void stp_timeout(unsigned long dummy)
  1272. {
  1273. queue_work(time_sync_wq, &stp_work);
  1274. }
  1275. static int __init stp_init(void)
  1276. {
  1277. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1278. return 0;
  1279. setup_timer(&stp_timer, stp_timeout, 0UL);
  1280. time_init_wq();
  1281. if (!stp_online)
  1282. return 0;
  1283. queue_work(time_sync_wq, &stp_work);
  1284. return 0;
  1285. }
  1286. arch_initcall(stp_init);
  1287. /*
  1288. * STP timing alert. There are three causes:
  1289. * 1) timing status change
  1290. * 2) link availability change
  1291. * 3) time control parameter change
  1292. * In all three cases we are only interested in the clock source state.
  1293. * If a STP clock source is now available use it.
  1294. */
  1295. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1296. {
  1297. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1298. queue_work(time_sync_wq, &stp_work);
  1299. }
  1300. /*
  1301. * STP sync check machine check. This is called when the timing state
  1302. * changes from the synchronized state to the unsynchronized state.
  1303. * After a STP sync check the clock is not in sync. The machine check
  1304. * is broadcasted to all cpus at the same time.
  1305. */
  1306. void stp_sync_check(void)
  1307. {
  1308. disable_sync_clock(NULL);
  1309. queue_work(time_sync_wq, &stp_work);
  1310. }
  1311. /*
  1312. * STP island condition machine check. This is called when an attached
  1313. * server attempts to communicate over an STP link and the servers
  1314. * have matching CTN ids and have a valid stratum-1 configuration
  1315. * but the configurations do not match.
  1316. */
  1317. void stp_island_check(void)
  1318. {
  1319. disable_sync_clock(NULL);
  1320. queue_work(time_sync_wq, &stp_work);
  1321. }
  1322. static int stp_sync_clock(void *data)
  1323. {
  1324. static int first;
  1325. unsigned long long old_clock, delta;
  1326. struct clock_sync_data *stp_sync;
  1327. int rc;
  1328. stp_sync = data;
  1329. if (xchg(&first, 1) == 1) {
  1330. /* Slave */
  1331. clock_sync_cpu(stp_sync);
  1332. return 0;
  1333. }
  1334. /* Wait until all other cpus entered the sync function. */
  1335. while (atomic_read(&stp_sync->cpus) != 0)
  1336. cpu_relax();
  1337. enable_sync_clock();
  1338. rc = 0;
  1339. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1340. stp_info.todoff[2] || stp_info.todoff[3] ||
  1341. stp_info.tmd != 2) {
  1342. old_clock = get_clock();
  1343. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1344. if (rc == 0) {
  1345. delta = adjust_time(old_clock, get_clock(), 0);
  1346. fixup_clock_comparator(delta);
  1347. rc = chsc_sstpi(stp_page, &stp_info,
  1348. sizeof(struct stp_sstpi));
  1349. if (rc == 0 && stp_info.tmd != 2)
  1350. rc = -EAGAIN;
  1351. }
  1352. }
  1353. if (rc) {
  1354. disable_sync_clock(NULL);
  1355. stp_sync->in_sync = -EAGAIN;
  1356. } else
  1357. stp_sync->in_sync = 1;
  1358. xchg(&first, 0);
  1359. return 0;
  1360. }
  1361. /*
  1362. * STP work. Check for the STP state and take over the clock
  1363. * synchronization if the STP clock source is usable.
  1364. */
  1365. static void stp_work_fn(struct work_struct *work)
  1366. {
  1367. struct clock_sync_data stp_sync;
  1368. int rc;
  1369. /* prevent multiple execution. */
  1370. mutex_lock(&stp_work_mutex);
  1371. if (!stp_online) {
  1372. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1373. del_timer_sync(&stp_timer);
  1374. goto out_unlock;
  1375. }
  1376. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1377. if (rc)
  1378. goto out_unlock;
  1379. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1380. if (rc || stp_info.c == 0)
  1381. goto out_unlock;
  1382. /* Skip synchronization if the clock is already in sync. */
  1383. if (check_sync_clock())
  1384. goto out_unlock;
  1385. memset(&stp_sync, 0, sizeof(stp_sync));
  1386. get_online_cpus();
  1387. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1388. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1389. put_online_cpus();
  1390. if (!check_sync_clock())
  1391. /*
  1392. * There is a usable clock but the synchonization failed.
  1393. * Retry after a second.
  1394. */
  1395. mod_timer(&stp_timer, jiffies + HZ);
  1396. out_unlock:
  1397. mutex_unlock(&stp_work_mutex);
  1398. }
  1399. /*
  1400. * STP class sysfs interface functions
  1401. */
  1402. static struct sysdev_class stp_sysclass = {
  1403. .name = "stp",
  1404. };
  1405. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1406. struct sysdev_class_attribute *attr,
  1407. char *buf)
  1408. {
  1409. if (!stp_online)
  1410. return -ENODATA;
  1411. return sprintf(buf, "%016llx\n",
  1412. *(unsigned long long *) stp_info.ctnid);
  1413. }
  1414. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1415. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1416. struct sysdev_class_attribute *attr,
  1417. char *buf)
  1418. {
  1419. if (!stp_online)
  1420. return -ENODATA;
  1421. return sprintf(buf, "%i\n", stp_info.ctn);
  1422. }
  1423. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1424. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1425. struct sysdev_class_attribute *attr,
  1426. char *buf)
  1427. {
  1428. if (!stp_online || !(stp_info.vbits & 0x2000))
  1429. return -ENODATA;
  1430. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1431. }
  1432. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1433. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1434. struct sysdev_class_attribute *attr,
  1435. char *buf)
  1436. {
  1437. if (!stp_online || !(stp_info.vbits & 0x8000))
  1438. return -ENODATA;
  1439. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1440. }
  1441. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1442. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1443. struct sysdev_class_attribute *attr,
  1444. char *buf)
  1445. {
  1446. if (!stp_online)
  1447. return -ENODATA;
  1448. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1449. }
  1450. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1451. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1452. struct sysdev_class_attribute *attr,
  1453. char *buf)
  1454. {
  1455. if (!stp_online || !(stp_info.vbits & 0x0800))
  1456. return -ENODATA;
  1457. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1458. }
  1459. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1460. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1461. struct sysdev_class_attribute *attr,
  1462. char *buf)
  1463. {
  1464. if (!stp_online || !(stp_info.vbits & 0x4000))
  1465. return -ENODATA;
  1466. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1467. }
  1468. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1469. stp_time_zone_offset_show, NULL);
  1470. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1471. struct sysdev_class_attribute *attr,
  1472. char *buf)
  1473. {
  1474. if (!stp_online)
  1475. return -ENODATA;
  1476. return sprintf(buf, "%i\n", stp_info.tmd);
  1477. }
  1478. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1479. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1480. struct sysdev_class_attribute *attr,
  1481. char *buf)
  1482. {
  1483. if (!stp_online)
  1484. return -ENODATA;
  1485. return sprintf(buf, "%i\n", stp_info.tst);
  1486. }
  1487. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1488. static ssize_t stp_online_show(struct sysdev_class *class,
  1489. struct sysdev_class_attribute *attr,
  1490. char *buf)
  1491. {
  1492. return sprintf(buf, "%i\n", stp_online);
  1493. }
  1494. static ssize_t stp_online_store(struct sysdev_class *class,
  1495. struct sysdev_class_attribute *attr,
  1496. const char *buf, size_t count)
  1497. {
  1498. unsigned int value;
  1499. value = simple_strtoul(buf, NULL, 0);
  1500. if (value != 0 && value != 1)
  1501. return -EINVAL;
  1502. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1503. return -EOPNOTSUPP;
  1504. mutex_lock(&clock_sync_mutex);
  1505. stp_online = value;
  1506. if (stp_online)
  1507. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1508. else
  1509. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1510. queue_work(time_sync_wq, &stp_work);
  1511. mutex_unlock(&clock_sync_mutex);
  1512. return count;
  1513. }
  1514. /*
  1515. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1516. * stp/online but attr_online already exists in this file ..
  1517. */
  1518. static struct sysdev_class_attribute attr_stp_online = {
  1519. .attr = { .name = "online", .mode = 0600 },
  1520. .show = stp_online_show,
  1521. .store = stp_online_store,
  1522. };
  1523. static struct sysdev_class_attribute *stp_attributes[] = {
  1524. &attr_ctn_id,
  1525. &attr_ctn_type,
  1526. &attr_dst_offset,
  1527. &attr_leap_seconds,
  1528. &attr_stp_online,
  1529. &attr_stratum,
  1530. &attr_time_offset,
  1531. &attr_time_zone_offset,
  1532. &attr_timing_mode,
  1533. &attr_timing_state,
  1534. NULL
  1535. };
  1536. static int __init stp_init_sysfs(void)
  1537. {
  1538. struct sysdev_class_attribute **attr;
  1539. int rc;
  1540. rc = sysdev_class_register(&stp_sysclass);
  1541. if (rc)
  1542. goto out;
  1543. for (attr = stp_attributes; *attr; attr++) {
  1544. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1545. if (rc)
  1546. goto out_unreg;
  1547. }
  1548. return 0;
  1549. out_unreg:
  1550. for (; attr >= stp_attributes; attr--)
  1551. sysdev_class_remove_file(&stp_sysclass, *attr);
  1552. sysdev_class_unregister(&stp_sysclass);
  1553. out:
  1554. return rc;
  1555. }
  1556. device_initcall(stp_init_sysfs);