ip22-int.c 8.6 KB

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  1. /*
  2. * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
  3. * found on INDY and Indigo2 workstations.
  4. *
  5. * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  6. * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
  7. * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
  8. * - Indigo2 changes
  9. * - Interrupt handling fixes
  10. * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
  11. */
  12. #include <linux/types.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/ftrace.h>
  17. #include <asm/irq_cpu.h>
  18. #include <asm/sgi/hpc3.h>
  19. #include <asm/sgi/ip22.h>
  20. /* So far nothing hangs here */
  21. #undef USE_LIO3_IRQ
  22. struct sgint_regs *sgint;
  23. static char lc0msk_to_irqnr[256];
  24. static char lc1msk_to_irqnr[256];
  25. static char lc2msk_to_irqnr[256];
  26. static char lc3msk_to_irqnr[256];
  27. extern int ip22_eisa_init(void);
  28. static void enable_local0_irq(unsigned int irq)
  29. {
  30. /* don't allow mappable interrupt to be enabled from setup_irq,
  31. * we have our own way to do so */
  32. if (irq != SGI_MAP_0_IRQ)
  33. sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
  34. }
  35. static void disable_local0_irq(unsigned int irq)
  36. {
  37. sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
  38. }
  39. static struct irq_chip ip22_local0_irq_type = {
  40. .name = "IP22 local 0",
  41. .ack = disable_local0_irq,
  42. .mask = disable_local0_irq,
  43. .mask_ack = disable_local0_irq,
  44. .unmask = enable_local0_irq,
  45. };
  46. static void enable_local1_irq(unsigned int irq)
  47. {
  48. /* don't allow mappable interrupt to be enabled from setup_irq,
  49. * we have our own way to do so */
  50. if (irq != SGI_MAP_1_IRQ)
  51. sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
  52. }
  53. static void disable_local1_irq(unsigned int irq)
  54. {
  55. sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
  56. }
  57. static struct irq_chip ip22_local1_irq_type = {
  58. .name = "IP22 local 1",
  59. .ack = disable_local1_irq,
  60. .mask = disable_local1_irq,
  61. .mask_ack = disable_local1_irq,
  62. .unmask = enable_local1_irq,
  63. };
  64. static void enable_local2_irq(unsigned int irq)
  65. {
  66. sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  67. sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
  68. }
  69. static void disable_local2_irq(unsigned int irq)
  70. {
  71. sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
  72. if (!sgint->cmeimask0)
  73. sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  74. }
  75. static struct irq_chip ip22_local2_irq_type = {
  76. .name = "IP22 local 2",
  77. .ack = disable_local2_irq,
  78. .mask = disable_local2_irq,
  79. .mask_ack = disable_local2_irq,
  80. .unmask = enable_local2_irq,
  81. };
  82. static void enable_local3_irq(unsigned int irq)
  83. {
  84. sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  85. sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
  86. }
  87. static void disable_local3_irq(unsigned int irq)
  88. {
  89. sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
  90. if (!sgint->cmeimask1)
  91. sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  92. }
  93. static struct irq_chip ip22_local3_irq_type = {
  94. .name = "IP22 local 3",
  95. .ack = disable_local3_irq,
  96. .mask = disable_local3_irq,
  97. .mask_ack = disable_local3_irq,
  98. .unmask = enable_local3_irq,
  99. };
  100. static void indy_local0_irqdispatch(void)
  101. {
  102. u8 mask = sgint->istat0 & sgint->imask0;
  103. u8 mask2;
  104. int irq;
  105. if (mask & SGINT_ISTAT0_LIO2) {
  106. mask2 = sgint->vmeistat & sgint->cmeimask0;
  107. irq = lc2msk_to_irqnr[mask2];
  108. } else
  109. irq = lc0msk_to_irqnr[mask];
  110. /* if irq == 0, then the interrupt has already been cleared */
  111. if (irq)
  112. do_IRQ(irq);
  113. }
  114. static void indy_local1_irqdispatch(void)
  115. {
  116. u8 mask = sgint->istat1 & sgint->imask1;
  117. u8 mask2;
  118. int irq;
  119. if (mask & SGINT_ISTAT1_LIO3) {
  120. mask2 = sgint->vmeistat & sgint->cmeimask1;
  121. irq = lc3msk_to_irqnr[mask2];
  122. } else
  123. irq = lc1msk_to_irqnr[mask];
  124. /* if irq == 0, then the interrupt has already been cleared */
  125. if (irq)
  126. do_IRQ(irq);
  127. }
  128. extern void ip22_be_interrupt(int irq);
  129. static void __irq_entry indy_buserror_irq(void)
  130. {
  131. int irq = SGI_BUSERR_IRQ;
  132. irq_enter();
  133. kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
  134. ip22_be_interrupt(irq);
  135. irq_exit();
  136. }
  137. static struct irqaction local0_cascade = {
  138. .handler = no_action,
  139. .flags = IRQF_DISABLED,
  140. .name = "local0 cascade",
  141. };
  142. static struct irqaction local1_cascade = {
  143. .handler = no_action,
  144. .flags = IRQF_DISABLED,
  145. .name = "local1 cascade",
  146. };
  147. static struct irqaction buserr = {
  148. .handler = no_action,
  149. .flags = IRQF_DISABLED,
  150. .name = "Bus Error",
  151. };
  152. static struct irqaction map0_cascade = {
  153. .handler = no_action,
  154. .flags = IRQF_DISABLED,
  155. .name = "mapable0 cascade",
  156. };
  157. #ifdef USE_LIO3_IRQ
  158. static struct irqaction map1_cascade = {
  159. .handler = no_action,
  160. .flags = IRQF_DISABLED,
  161. .name = "mapable1 cascade",
  162. };
  163. #define SGI_INTERRUPTS SGINT_END
  164. #else
  165. #define SGI_INTERRUPTS SGINT_LOCAL3
  166. #endif
  167. extern void indy_8254timer_irq(void);
  168. /*
  169. * IRQs on the INDY look basically (barring software IRQs which we don't use
  170. * at all) like:
  171. *
  172. * MIPS IRQ Source
  173. * -------- ------
  174. * 0 Software (ignored)
  175. * 1 Software (ignored)
  176. * 2 Local IRQ level zero
  177. * 3 Local IRQ level one
  178. * 4 8254 Timer zero
  179. * 5 8254 Timer one
  180. * 6 Bus Error
  181. * 7 R4k timer (what we use)
  182. *
  183. * We handle the IRQ according to _our_ priority which is:
  184. *
  185. * Highest ---- R4k Timer
  186. * Local IRQ zero
  187. * Local IRQ one
  188. * Bus Error
  189. * 8254 Timer zero
  190. * Lowest ---- 8254 Timer one
  191. *
  192. * then we just return, if multiple IRQs are pending then we will just take
  193. * another exception, big deal.
  194. */
  195. asmlinkage void plat_irq_dispatch(void)
  196. {
  197. unsigned int pending = read_c0_status() & read_c0_cause();
  198. /*
  199. * First we check for r4k counter/timer IRQ.
  200. */
  201. if (pending & CAUSEF_IP7)
  202. do_IRQ(SGI_TIMER_IRQ);
  203. else if (pending & CAUSEF_IP2)
  204. indy_local0_irqdispatch();
  205. else if (pending & CAUSEF_IP3)
  206. indy_local1_irqdispatch();
  207. else if (pending & CAUSEF_IP6)
  208. indy_buserror_irq();
  209. else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
  210. indy_8254timer_irq();
  211. }
  212. void __init arch_init_irq(void)
  213. {
  214. int i;
  215. /* Init local mask --> irq tables. */
  216. for (i = 0; i < 256; i++) {
  217. if (i & 0x80) {
  218. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
  219. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
  220. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
  221. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
  222. } else if (i & 0x40) {
  223. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
  224. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
  225. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
  226. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
  227. } else if (i & 0x20) {
  228. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
  229. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
  230. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
  231. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
  232. } else if (i & 0x10) {
  233. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
  234. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
  235. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
  236. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
  237. } else if (i & 0x08) {
  238. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
  239. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
  240. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
  241. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
  242. } else if (i & 0x04) {
  243. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
  244. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
  245. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
  246. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
  247. } else if (i & 0x02) {
  248. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
  249. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
  250. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
  251. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
  252. } else if (i & 0x01) {
  253. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
  254. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
  255. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
  256. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
  257. } else {
  258. lc0msk_to_irqnr[i] = 0;
  259. lc1msk_to_irqnr[i] = 0;
  260. lc2msk_to_irqnr[i] = 0;
  261. lc3msk_to_irqnr[i] = 0;
  262. }
  263. }
  264. /* Mask out all interrupts. */
  265. sgint->imask0 = 0;
  266. sgint->imask1 = 0;
  267. sgint->cmeimask0 = 0;
  268. sgint->cmeimask1 = 0;
  269. /* init CPU irqs */
  270. mips_cpu_irq_init();
  271. for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
  272. struct irq_chip *handler;
  273. if (i < SGINT_LOCAL1)
  274. handler = &ip22_local0_irq_type;
  275. else if (i < SGINT_LOCAL2)
  276. handler = &ip22_local1_irq_type;
  277. else if (i < SGINT_LOCAL3)
  278. handler = &ip22_local2_irq_type;
  279. else
  280. handler = &ip22_local3_irq_type;
  281. set_irq_chip_and_handler(i, handler, handle_level_irq);
  282. }
  283. /* vector handler. this register the IRQ as non-sharable */
  284. setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
  285. setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
  286. setup_irq(SGI_BUSERR_IRQ, &buserr);
  287. /* cascade in cascade. i love Indy ;-) */
  288. setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
  289. #ifdef USE_LIO3_IRQ
  290. setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
  291. #endif
  292. #ifdef CONFIG_EISA
  293. if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
  294. ip22_eisa_init();
  295. #endif
  296. }