csrc-powertv.c 4.7 KB

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  1. /*
  2. * Copyright (C) 2008 Scientific-Atlanta, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version 2
  7. * of the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. * The file comes from kernel/csrc-r4k.c
  20. */
  21. #include <linux/clocksource.h>
  22. #include <linux/init.h>
  23. #include <asm/time.h> /* Not included in linux/time.h */
  24. #include <asm/mach-powertv/asic_regs.h>
  25. #include "powertv-clock.h"
  26. /* MIPS PLL Register Definitions */
  27. #define PLL_GET_M(x) (((x) >> 8) & 0x000000FF)
  28. #define PLL_GET_N(x) (((x) >> 16) & 0x000000FF)
  29. #define PLL_GET_P(x) (((x) >> 24) & 0x00000007)
  30. /*
  31. * returns: Clock frequency in kHz
  32. */
  33. unsigned int __init mips_get_pll_freq(void)
  34. {
  35. unsigned int pll_reg, m, n, p;
  36. unsigned int fin = 54000; /* Base frequency in kHz */
  37. unsigned int fout;
  38. /* Read PLL register setting */
  39. pll_reg = asic_read(mips_pll_setup);
  40. m = PLL_GET_M(pll_reg);
  41. n = PLL_GET_N(pll_reg);
  42. p = PLL_GET_P(pll_reg);
  43. pr_info("MIPS PLL Register:0x%x M=%d N=%d P=%d\n", pll_reg, m, n, p);
  44. /* Calculate clock frequency = (2 * N * 54MHz) / (M * (2**P)) */
  45. fout = ((2 * n * fin) / (m * (0x01 << p)));
  46. pr_info("MIPS Clock Freq=%d kHz\n", fout);
  47. return fout;
  48. }
  49. static cycle_t c0_hpt_read(struct clocksource *cs)
  50. {
  51. return read_c0_count();
  52. }
  53. static struct clocksource clocksource_mips = {
  54. .name = "powertv-counter",
  55. .read = c0_hpt_read,
  56. .mask = CLOCKSOURCE_MASK(32),
  57. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  58. };
  59. static void __init powertv_c0_hpt_clocksource_init(void)
  60. {
  61. unsigned int pll_freq = mips_get_pll_freq();
  62. pr_info("CPU frequency %d.%02d MHz\n", pll_freq / 1000,
  63. (pll_freq % 1000) * 100 / 1000);
  64. mips_hpt_frequency = pll_freq / 2 * 1000;
  65. clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
  66. clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
  67. clocksource_register(&clocksource_mips);
  68. }
  69. /**
  70. * struct tim_c - free running counter
  71. * @hi: High 16 bits of the counter
  72. * @lo: Low 32 bits of the counter
  73. *
  74. * Lays out the structure of the free running counter in memory. This counter
  75. * increments at a rate of 27 MHz/8 on all platforms.
  76. */
  77. struct tim_c {
  78. unsigned int hi;
  79. unsigned int lo;
  80. };
  81. static struct tim_c *tim_c;
  82. static cycle_t tim_c_read(struct clocksource *cs)
  83. {
  84. unsigned int hi;
  85. unsigned int next_hi;
  86. unsigned int lo;
  87. hi = readl(&tim_c->hi);
  88. for (;;) {
  89. lo = readl(&tim_c->lo);
  90. next_hi = readl(&tim_c->hi);
  91. if (next_hi == hi)
  92. break;
  93. hi = next_hi;
  94. }
  95. pr_crit("%s: read %llx\n", __func__, ((u64) hi << 32) | lo);
  96. return ((u64) hi << 32) | lo;
  97. }
  98. #define TIM_C_SIZE 48 /* # bits in the timer */
  99. static struct clocksource clocksource_tim_c = {
  100. .name = "powertv-tim_c",
  101. .read = tim_c_read,
  102. .mask = CLOCKSOURCE_MASK(TIM_C_SIZE),
  103. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  104. };
  105. /**
  106. * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock
  107. *
  108. * The hard part here is coming up with a constant k and shift s such that
  109. * the 48-bit TIM_C value multiplied by k doesn't overflow and that value,
  110. * when shifted right by s, yields the corresponding number of nanoseconds.
  111. * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to
  112. * 1 / (27,000,000/8) seconds. Multiply that by a billion and you get the
  113. * number of nanoseconds. Since the TIM_C value has 48 bits and the math is
  114. * done in 64 bits, avoiding an overflow means that k must be less than
  115. * 64 - 48 = 16 bits.
  116. */
  117. static void __init powertv_tim_c_clocksource_init(void)
  118. {
  119. int prescale;
  120. unsigned long dividend;
  121. unsigned long k;
  122. int s;
  123. const int max_k_bits = (64 - 48) - 1;
  124. const unsigned long billion = 1000000000;
  125. const unsigned long counts_per_second = 27000000 / 8;
  126. prescale = BITS_PER_LONG - ilog2(billion) - 1;
  127. dividend = billion << prescale;
  128. k = dividend / counts_per_second;
  129. s = ilog2(k) - max_k_bits;
  130. if (s < 0)
  131. s = prescale;
  132. else {
  133. k >>= s;
  134. s += prescale;
  135. }
  136. clocksource_tim_c.mult = k;
  137. clocksource_tim_c.shift = s;
  138. clocksource_tim_c.rating = 200;
  139. clocksource_register(&clocksource_tim_c);
  140. tim_c = (struct tim_c *) asic_reg_addr(tim_ch);
  141. }
  142. /**
  143. powertv_clocksource_init - initialize all clocksources
  144. */
  145. void __init powertv_clocksource_init(void)
  146. {
  147. powertv_c0_hpt_clocksource_init();
  148. powertv_tim_c_clocksource_init();
  149. }