cx18-streams.c 29 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. .unlocked_ioctl = video_ioctl2,
  41. .release = cx18_v4l2_close,
  42. .poll = cx18_v4l2_enc_poll,
  43. .mmap = cx18_v4l2_mmap,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. void cx18_dma_free(struct videobuf_queue *q,
  95. struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
  96. {
  97. videobuf_waiton(q, &buf->vb, 0, 0);
  98. videobuf_vmalloc_free(&buf->vb);
  99. buf->vb.state = VIDEOBUF_NEEDS_INIT;
  100. }
  101. static int cx18_prepare_buffer(struct videobuf_queue *q,
  102. struct cx18_stream *s,
  103. struct cx18_videobuf_buffer *buf,
  104. u32 pixelformat,
  105. unsigned int width, unsigned int height,
  106. enum v4l2_field field)
  107. {
  108. struct cx18 *cx = s->cx;
  109. int rc = 0;
  110. /* check settings */
  111. buf->bytes_used = 0;
  112. if ((width < 48) || (height < 32))
  113. return -EINVAL;
  114. buf->vb.size = (width * height * 2);
  115. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  116. return -EINVAL;
  117. /* alloc + fill struct (if changed) */
  118. if (buf->vb.width != width || buf->vb.height != height ||
  119. buf->vb.field != field || s->pixelformat != pixelformat ||
  120. buf->tvnorm != cx->std) {
  121. buf->vb.width = width;
  122. buf->vb.height = height;
  123. buf->vb.field = field;
  124. buf->tvnorm = cx->std;
  125. s->pixelformat = pixelformat;
  126. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  127. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  128. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  129. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  130. else
  131. s->vb_bytes_per_frame = height * 720 * 2;
  132. cx18_dma_free(q, s, buf);
  133. }
  134. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  135. return -EINVAL;
  136. if (buf->vb.field == 0)
  137. buf->vb.field = V4L2_FIELD_INTERLACED;
  138. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  139. buf->vb.width = width;
  140. buf->vb.height = height;
  141. buf->vb.field = field;
  142. buf->tvnorm = cx->std;
  143. s->pixelformat = pixelformat;
  144. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  145. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  146. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  147. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  148. else
  149. s->vb_bytes_per_frame = height * 720 * 2;
  150. rc = videobuf_iolock(q, &buf->vb, NULL);
  151. if (rc != 0)
  152. goto fail;
  153. }
  154. buf->vb.state = VIDEOBUF_PREPARED;
  155. return 0;
  156. fail:
  157. cx18_dma_free(q, s, buf);
  158. return rc;
  159. }
  160. /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
  161. 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
  162. */
  163. #define VB_MIN_BUFFERS 32
  164. #define VB_MIN_BUFSIZE 4147200
  165. static int buffer_setup(struct videobuf_queue *q,
  166. unsigned int *count, unsigned int *size)
  167. {
  168. struct cx18_stream *s = q->priv_data;
  169. struct cx18 *cx = s->cx;
  170. *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
  171. if (*count == 0)
  172. *count = VB_MIN_BUFFERS;
  173. while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
  174. (*count)--;
  175. q->field = V4L2_FIELD_INTERLACED;
  176. q->last = V4L2_FIELD_INTERLACED;
  177. return 0;
  178. }
  179. static int buffer_prepare(struct videobuf_queue *q,
  180. struct videobuf_buffer *vb,
  181. enum v4l2_field field)
  182. {
  183. struct cx18_videobuf_buffer *buf =
  184. container_of(vb, struct cx18_videobuf_buffer, vb);
  185. struct cx18_stream *s = q->priv_data;
  186. struct cx18 *cx = s->cx;
  187. return cx18_prepare_buffer(q, s, buf, s->pixelformat,
  188. cx->cxhdl.width, cx->cxhdl.height, field);
  189. }
  190. static void buffer_release(struct videobuf_queue *q,
  191. struct videobuf_buffer *vb)
  192. {
  193. struct cx18_videobuf_buffer *buf =
  194. container_of(vb, struct cx18_videobuf_buffer, vb);
  195. struct cx18_stream *s = q->priv_data;
  196. cx18_dma_free(q, s, buf);
  197. }
  198. static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  199. {
  200. struct cx18_videobuf_buffer *buf =
  201. container_of(vb, struct cx18_videobuf_buffer, vb);
  202. struct cx18_stream *s = q->priv_data;
  203. buf->vb.state = VIDEOBUF_QUEUED;
  204. list_add_tail(&buf->vb.queue, &s->vb_capture);
  205. }
  206. static struct videobuf_queue_ops cx18_videobuf_qops = {
  207. .buf_setup = buffer_setup,
  208. .buf_prepare = buffer_prepare,
  209. .buf_queue = buffer_queue,
  210. .buf_release = buffer_release,
  211. };
  212. static void cx18_stream_init(struct cx18 *cx, int type)
  213. {
  214. struct cx18_stream *s = &cx->streams[type];
  215. struct video_device *video_dev = s->video_dev;
  216. /* we need to keep video_dev, so restore it afterwards */
  217. memset(s, 0, sizeof(*s));
  218. s->video_dev = video_dev;
  219. /* initialize cx18_stream fields */
  220. s->dvb = NULL;
  221. s->cx = cx;
  222. s->type = type;
  223. s->name = cx18_stream_info[type].name;
  224. s->handle = CX18_INVALID_TASK_HANDLE;
  225. s->dma = cx18_stream_info[type].dma;
  226. s->buffers = cx->stream_buffers[type];
  227. s->buf_size = cx->stream_buf_size[type];
  228. INIT_LIST_HEAD(&s->buf_pool);
  229. s->bufs_per_mdl = 1;
  230. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  231. init_waitqueue_head(&s->waitq);
  232. s->id = -1;
  233. spin_lock_init(&s->q_free.lock);
  234. cx18_queue_init(&s->q_free);
  235. spin_lock_init(&s->q_busy.lock);
  236. cx18_queue_init(&s->q_busy);
  237. spin_lock_init(&s->q_full.lock);
  238. cx18_queue_init(&s->q_full);
  239. spin_lock_init(&s->q_idle.lock);
  240. cx18_queue_init(&s->q_idle);
  241. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  242. INIT_LIST_HEAD(&s->vb_capture);
  243. s->vb_timeout.function = cx18_vb_timeout;
  244. s->vb_timeout.data = (unsigned long)s;
  245. init_timer(&s->vb_timeout);
  246. spin_lock_init(&s->vb_lock);
  247. if (type == CX18_ENC_STREAM_TYPE_YUV) {
  248. spin_lock_init(&s->vbuf_q_lock);
  249. s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  250. videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
  251. &cx->pci_dev->dev, &s->vbuf_q_lock,
  252. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  253. V4L2_FIELD_INTERLACED,
  254. sizeof(struct cx18_videobuf_buffer),
  255. s, &cx->serialize_lock);
  256. /* Assume the previous pixel default */
  257. s->pixelformat = V4L2_PIX_FMT_HM12;
  258. s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
  259. }
  260. }
  261. static int cx18_prep_dev(struct cx18 *cx, int type)
  262. {
  263. struct cx18_stream *s = &cx->streams[type];
  264. u32 cap = cx->v4l2_cap;
  265. int num_offset = cx18_stream_info[type].num_offset;
  266. int num = cx->instance + cx18_first_minor + num_offset;
  267. /*
  268. * These five fields are always initialized.
  269. * For analog capture related streams, if video_dev == NULL then the
  270. * stream is not in use.
  271. * For the TS stream, if dvb == NULL then the stream is not in use.
  272. * In those cases no other fields but these four can be used.
  273. */
  274. s->video_dev = NULL;
  275. s->dvb = NULL;
  276. s->cx = cx;
  277. s->type = type;
  278. s->name = cx18_stream_info[type].name;
  279. /* Check whether the radio is supported */
  280. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  281. return 0;
  282. /* Check whether VBI is supported */
  283. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  284. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  285. return 0;
  286. /* User explicitly selected 0 buffers for these streams, so don't
  287. create them. */
  288. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  289. cx->stream_buffers[type] == 0) {
  290. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  291. return 0;
  292. }
  293. cx18_stream_init(cx, type);
  294. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  295. if (type == CX18_ENC_STREAM_TYPE_TS) {
  296. if (cx->card->hw_all & CX18_HW_DVB) {
  297. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  298. if (s->dvb == NULL) {
  299. CX18_ERR("Couldn't allocate cx18_dvb structure"
  300. " for %s\n", s->name);
  301. return -ENOMEM;
  302. }
  303. } else {
  304. /* Don't need buffers for the TS, if there is no DVB */
  305. s->buffers = 0;
  306. }
  307. }
  308. if (num_offset == -1)
  309. return 0;
  310. /* allocate and initialize the v4l2 video device structure */
  311. s->video_dev = video_device_alloc();
  312. if (s->video_dev == NULL) {
  313. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  314. s->name);
  315. return -ENOMEM;
  316. }
  317. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  318. cx->v4l2_dev.name, s->name);
  319. s->video_dev->num = num;
  320. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  321. s->video_dev->fops = &cx18_v4l2_enc_fops;
  322. s->video_dev->release = video_device_release;
  323. s->video_dev->tvnorms = V4L2_STD_ALL;
  324. s->video_dev->lock = &cx->serialize_lock;
  325. set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags);
  326. cx18_set_funcs(s->video_dev);
  327. return 0;
  328. }
  329. /* Initialize v4l2 variables and register v4l2 devices */
  330. int cx18_streams_setup(struct cx18 *cx)
  331. {
  332. int type, ret;
  333. /* Setup V4L2 Devices */
  334. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  335. /* Prepare device */
  336. ret = cx18_prep_dev(cx, type);
  337. if (ret < 0)
  338. break;
  339. /* Allocate Stream */
  340. ret = cx18_stream_alloc(&cx->streams[type]);
  341. if (ret < 0)
  342. break;
  343. }
  344. if (type == CX18_MAX_STREAMS)
  345. return 0;
  346. /* One or more streams could not be initialized. Clean 'em all up. */
  347. cx18_streams_cleanup(cx, 0);
  348. return ret;
  349. }
  350. static int cx18_reg_dev(struct cx18 *cx, int type)
  351. {
  352. struct cx18_stream *s = &cx->streams[type];
  353. int vfl_type = cx18_stream_info[type].vfl_type;
  354. const char *name;
  355. int num, ret;
  356. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  357. ret = cx18_dvb_register(s);
  358. if (ret < 0) {
  359. CX18_ERR("DVB failed to register\n");
  360. return ret;
  361. }
  362. }
  363. if (s->video_dev == NULL)
  364. return 0;
  365. num = s->video_dev->num;
  366. /* card number + user defined offset + device offset */
  367. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  368. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  369. if (s_mpg->video_dev)
  370. num = s_mpg->video_dev->num
  371. + cx18_stream_info[type].num_offset;
  372. }
  373. video_set_drvdata(s->video_dev, s);
  374. /* Register device. First try the desired minor, then any free one. */
  375. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  376. if (ret < 0) {
  377. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  378. s->name, num);
  379. video_device_release(s->video_dev);
  380. s->video_dev = NULL;
  381. return ret;
  382. }
  383. name = video_device_node_name(s->video_dev);
  384. switch (vfl_type) {
  385. case VFL_TYPE_GRABBER:
  386. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  387. name, s->name, cx->stream_buffers[type],
  388. cx->stream_buf_size[type] / 1024,
  389. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  390. break;
  391. case VFL_TYPE_RADIO:
  392. CX18_INFO("Registered device %s for %s\n", name, s->name);
  393. break;
  394. case VFL_TYPE_VBI:
  395. if (cx->stream_buffers[type])
  396. CX18_INFO("Registered device %s for %s "
  397. "(%d x %d bytes)\n",
  398. name, s->name, cx->stream_buffers[type],
  399. cx->stream_buf_size[type]);
  400. else
  401. CX18_INFO("Registered device %s for %s\n",
  402. name, s->name);
  403. break;
  404. }
  405. return 0;
  406. }
  407. /* Register v4l2 devices */
  408. int cx18_streams_register(struct cx18 *cx)
  409. {
  410. int type;
  411. int err;
  412. int ret = 0;
  413. /* Register V4L2 devices */
  414. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  415. err = cx18_reg_dev(cx, type);
  416. if (err && ret == 0)
  417. ret = err;
  418. }
  419. if (ret == 0)
  420. return 0;
  421. /* One or more streams could not be initialized. Clean 'em all up. */
  422. cx18_streams_cleanup(cx, 1);
  423. return ret;
  424. }
  425. /* Unregister v4l2 devices */
  426. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  427. {
  428. struct video_device *vdev;
  429. int type;
  430. /* Teardown all streams */
  431. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  432. /* The TS has a cx18_dvb structure, not a video_device */
  433. if (type == CX18_ENC_STREAM_TYPE_TS) {
  434. if (cx->streams[type].dvb != NULL) {
  435. if (unregister)
  436. cx18_dvb_unregister(&cx->streams[type]);
  437. kfree(cx->streams[type].dvb);
  438. cx->streams[type].dvb = NULL;
  439. cx18_stream_free(&cx->streams[type]);
  440. }
  441. continue;
  442. }
  443. /* No struct video_device, but can have buffers allocated */
  444. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  445. /* If the module params didn't inhibit IDX ... */
  446. if (cx->stream_buffers[type] != 0) {
  447. cx->stream_buffers[type] = 0;
  448. /*
  449. * Before calling cx18_stream_free(),
  450. * check if the IDX stream was actually set up.
  451. * Needed, since the cx18_probe() error path
  452. * exits through here as well as normal clean up
  453. */
  454. if (cx->streams[type].buffers != 0)
  455. cx18_stream_free(&cx->streams[type]);
  456. }
  457. continue;
  458. }
  459. /* If struct video_device exists, can have buffers allocated */
  460. vdev = cx->streams[type].video_dev;
  461. cx->streams[type].video_dev = NULL;
  462. if (vdev == NULL)
  463. continue;
  464. if (type == CX18_ENC_STREAM_TYPE_YUV)
  465. videobuf_mmap_free(&cx->streams[type].vbuf_q);
  466. cx18_stream_free(&cx->streams[type]);
  467. /* Unregister or release device */
  468. if (unregister)
  469. video_unregister_device(vdev);
  470. else
  471. video_device_release(vdev);
  472. }
  473. }
  474. static void cx18_vbi_setup(struct cx18_stream *s)
  475. {
  476. struct cx18 *cx = s->cx;
  477. int raw = cx18_raw_vbi(cx);
  478. u32 data[CX2341X_MBOX_MAX_DATA];
  479. int lines;
  480. if (cx->is_60hz) {
  481. cx->vbi.count = 12;
  482. cx->vbi.start[0] = 10;
  483. cx->vbi.start[1] = 273;
  484. } else { /* PAL/SECAM */
  485. cx->vbi.count = 18;
  486. cx->vbi.start[0] = 6;
  487. cx->vbi.start[1] = 318;
  488. }
  489. /* setup VBI registers */
  490. if (raw)
  491. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  492. else
  493. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  494. /*
  495. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  496. * VBI when the first analog capture channel starts, as once it starts
  497. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  498. * (i.e. for the VBI capture channels). We also send it for each
  499. * analog capture channel anyway just to make sure we get the proper
  500. * behavior
  501. */
  502. if (raw) {
  503. lines = cx->vbi.count * 2;
  504. } else {
  505. /*
  506. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  507. * The EAV RP code's Field bit toggles on line 4, a few lines
  508. * after the Vertcal Blank bit has already toggled.
  509. * Tell the encoder to capture 21-4+1=18 lines per field,
  510. * since we want lines 10 through 21.
  511. *
  512. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  513. * The EAV RP code's Field bit toggles on line 1, a few lines
  514. * after the Vertcal Blank bit has already toggled.
  515. * (We've actually set the digitizer so that the Field bit
  516. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  517. * lines per field, since we want lines 6 through 23.
  518. */
  519. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  520. }
  521. data[0] = s->handle;
  522. /* Lines per field */
  523. data[1] = (lines / 2) | ((lines / 2) << 16);
  524. /* bytes per line */
  525. data[2] = (raw ? vbi_active_samples
  526. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  527. : vbi_hblank_samples_50Hz));
  528. /* Every X number of frames a VBI interrupt arrives
  529. (frames as in 25 or 30 fps) */
  530. data[3] = 1;
  531. /*
  532. * Set the SAV/EAV RP codes to look for as start/stop points
  533. * when in VIP-1.1 mode
  534. */
  535. if (raw) {
  536. /*
  537. * Start codes for beginning of "active" line in vertical blank
  538. * 0x20 ( VerticalBlank )
  539. * 0x60 ( EvenField VerticalBlank )
  540. */
  541. data[4] = 0x20602060;
  542. /*
  543. * End codes for end of "active" raw lines and regular lines
  544. * 0x30 ( VerticalBlank HorizontalBlank)
  545. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  546. * 0x90 (Task HorizontalBlank)
  547. * 0xd0 (Task EvenField HorizontalBlank)
  548. */
  549. data[5] = 0x307090d0;
  550. } else {
  551. /*
  552. * End codes for active video, we want data in the hblank region
  553. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  554. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  555. *
  556. * Since the V bit is only allowed to toggle in the EAV RP code,
  557. * just before the first active region line, these two
  558. * are problematic:
  559. * 0x90 (Task HorizontalBlank)
  560. * 0xd0 (Task EvenField HorizontalBlank)
  561. *
  562. * We have set the digitzer such that we don't have to worry
  563. * about these problem codes.
  564. */
  565. data[4] = 0xB0F0B0F0;
  566. /*
  567. * Start codes for beginning of active line in vertical blank
  568. * 0xa0 (Task VerticalBlank )
  569. * 0xe0 (Task EvenField VerticalBlank )
  570. */
  571. data[5] = 0xA0E0A0E0;
  572. }
  573. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  574. data[0], data[1], data[2], data[3], data[4], data[5]);
  575. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  576. }
  577. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  578. {
  579. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  580. struct cx18_mdl *mdl;
  581. if (!cx18_stream_enabled(s))
  582. return;
  583. /* Return if the firmware is not running low on MDLs */
  584. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  585. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  586. return;
  587. /* Return if there are no MDLs to rotate back to the firmware */
  588. if (atomic_read(&s->q_full.depth) < 2)
  589. return;
  590. /*
  591. * Take the oldest IDX MDL still holding data, and discard its index
  592. * entries by scheduling the MDL to go back to the firmware
  593. */
  594. mdl = cx18_dequeue(s, &s->q_full);
  595. if (mdl != NULL)
  596. cx18_enqueue(s, mdl, &s->q_free);
  597. }
  598. static
  599. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  600. struct cx18_mdl *mdl)
  601. {
  602. struct cx18 *cx = s->cx;
  603. struct cx18_queue *q;
  604. /* Don't give it to the firmware, if we're not running a capture */
  605. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  606. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  607. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  608. return cx18_enqueue(s, mdl, &s->q_free);
  609. q = cx18_enqueue(s, mdl, &s->q_busy);
  610. if (q != &s->q_busy)
  611. return q; /* The firmware has the max MDLs it can handle */
  612. cx18_mdl_sync_for_device(s, mdl);
  613. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  614. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  615. s->bufs_per_mdl, mdl->id, s->mdl_size);
  616. return q;
  617. }
  618. static
  619. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  620. {
  621. struct cx18_queue *q;
  622. struct cx18_mdl *mdl;
  623. if (atomic_read(&s->q_free.depth) == 0 ||
  624. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  625. return;
  626. /* Move from q_free to q_busy notifying the firmware, until the limit */
  627. do {
  628. mdl = cx18_dequeue(s, &s->q_free);
  629. if (mdl == NULL)
  630. break;
  631. q = _cx18_stream_put_mdl_fw(s, mdl);
  632. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  633. && q == &s->q_busy);
  634. }
  635. void cx18_out_work_handler(struct work_struct *work)
  636. {
  637. struct cx18_stream *s =
  638. container_of(work, struct cx18_stream, out_work_order);
  639. _cx18_stream_load_fw_queue(s);
  640. }
  641. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  642. {
  643. cx18_unload_queues(s);
  644. switch (s->type) {
  645. case CX18_ENC_STREAM_TYPE_YUV:
  646. /*
  647. * Height should be a multiple of 32 lines.
  648. * Set the MDL size to the exact size needed for one frame.
  649. * Use enough buffers per MDL to cover the MDL size
  650. */
  651. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  652. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  653. else
  654. s->mdl_size = 720 * s->cx->cxhdl.height * 2;
  655. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  656. if (s->mdl_size % s->buf_size)
  657. s->bufs_per_mdl++;
  658. break;
  659. case CX18_ENC_STREAM_TYPE_VBI:
  660. s->bufs_per_mdl = 1;
  661. if (cx18_raw_vbi(s->cx)) {
  662. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  663. * 2 * vbi_active_samples;
  664. } else {
  665. /*
  666. * See comment in cx18_vbi_setup() below about the
  667. * extra lines we capture in sliced VBI mode due to
  668. * the lines on which EAV RP codes toggle.
  669. */
  670. s->mdl_size = s->cx->is_60hz
  671. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  672. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  673. }
  674. break;
  675. default:
  676. s->bufs_per_mdl = 1;
  677. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  678. break;
  679. }
  680. cx18_load_queues(s);
  681. }
  682. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  683. {
  684. u32 data[MAX_MB_ARGUMENTS];
  685. struct cx18 *cx = s->cx;
  686. int captype = 0;
  687. struct cx18_stream *s_idx;
  688. if (!cx18_stream_enabled(s))
  689. return -EINVAL;
  690. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  691. switch (s->type) {
  692. case CX18_ENC_STREAM_TYPE_MPG:
  693. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  694. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  695. cx->dualwatch_jiffies = jiffies;
  696. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  697. cx->search_pack_header = 0;
  698. break;
  699. case CX18_ENC_STREAM_TYPE_IDX:
  700. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  701. break;
  702. case CX18_ENC_STREAM_TYPE_TS:
  703. captype = CAPTURE_CHANNEL_TYPE_TS;
  704. break;
  705. case CX18_ENC_STREAM_TYPE_YUV:
  706. captype = CAPTURE_CHANNEL_TYPE_YUV;
  707. break;
  708. case CX18_ENC_STREAM_TYPE_PCM:
  709. captype = CAPTURE_CHANNEL_TYPE_PCM;
  710. break;
  711. case CX18_ENC_STREAM_TYPE_VBI:
  712. #ifdef CX18_ENCODER_PARSES_SLICED
  713. captype = cx18_raw_vbi(cx) ?
  714. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  715. #else
  716. /*
  717. * Currently we set things up so that Sliced VBI from the
  718. * digitizer is handled as Raw VBI by the encoder
  719. */
  720. captype = CAPTURE_CHANNEL_TYPE_VBI;
  721. #endif
  722. cx->vbi.frame = 0;
  723. cx->vbi.inserted_frame = 0;
  724. memset(cx->vbi.sliced_mpeg_size,
  725. 0, sizeof(cx->vbi.sliced_mpeg_size));
  726. break;
  727. default:
  728. return -EINVAL;
  729. }
  730. /* Clear Streamoff flags in case left from last capture */
  731. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  732. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  733. s->handle = data[0];
  734. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  735. /*
  736. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  737. * set up all the parameters, as it is not obvious which parameters the
  738. * firmware shares across capture channel types and which it does not.
  739. *
  740. * Some of the cx18_vapi() calls below apply to only certain capture
  741. * channel types. We're hoping there's no harm in calling most of them
  742. * anyway, as long as the values are all consistent. Setting some
  743. * shared parameters will have no effect once an analog capture channel
  744. * has started streaming.
  745. */
  746. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  747. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  748. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  749. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  750. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  751. /*
  752. * Audio related reset according to
  753. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  754. */
  755. if (atomic_read(&cx->ana_capturing) == 0)
  756. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  757. s->handle, 12);
  758. /*
  759. * Number of lines for Field 1 & Field 2 according to
  760. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  761. * Field 1 is 312 for 625 line systems in BT.656
  762. * Field 2 is 313 for 625 line systems in BT.656
  763. */
  764. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  765. s->handle, 312, 313);
  766. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  767. cx18_vbi_setup(s);
  768. /*
  769. * Select to receive I, P, and B frame index entries, if the
  770. * index stream is enabled. Otherwise disable index entry
  771. * generation.
  772. */
  773. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  774. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  775. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  776. /* Call out to the common CX2341x API setup for user controls */
  777. cx->cxhdl.priv = s;
  778. cx2341x_handler_setup(&cx->cxhdl);
  779. /*
  780. * When starting a capture and we're set for radio,
  781. * ensure the video is muted, despite the user control.
  782. */
  783. if (!cx->cxhdl.video_mute &&
  784. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  785. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  786. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  787. /* Enable the Video Format Converter for UYVY 4:2:2 support,
  788. * rather than the default HM12 Macroblovk 4:2:0 support.
  789. */
  790. if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
  791. if (s->pixelformat == V4L2_PIX_FMT_UYVY)
  792. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  793. s->handle, 1);
  794. else
  795. /* If in doubt, default to HM12 */
  796. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  797. s->handle, 0);
  798. }
  799. }
  800. if (atomic_read(&cx->tot_capturing) == 0) {
  801. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  802. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  803. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  804. }
  805. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  806. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  807. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  808. /* Init all the cpu_mdls for this stream */
  809. cx18_stream_configure_mdls(s);
  810. _cx18_stream_load_fw_queue(s);
  811. /* begin_capture */
  812. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  813. CX18_DEBUG_WARN("Error starting capture!\n");
  814. /* Ensure we're really not capturing before releasing MDLs */
  815. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  816. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  817. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  818. else
  819. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  820. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  821. /* FIXME - CX18_F_S_STREAMOFF as well? */
  822. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  823. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  824. s->handle = CX18_INVALID_TASK_HANDLE;
  825. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  826. if (atomic_read(&cx->tot_capturing) == 0) {
  827. set_bit(CX18_F_I_EOS, &cx->i_flags);
  828. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  829. }
  830. return -EINVAL;
  831. }
  832. /* you're live! sit back and await interrupts :) */
  833. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  834. atomic_inc(&cx->ana_capturing);
  835. atomic_inc(&cx->tot_capturing);
  836. return 0;
  837. }
  838. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  839. void cx18_stop_all_captures(struct cx18 *cx)
  840. {
  841. int i;
  842. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  843. struct cx18_stream *s = &cx->streams[i];
  844. if (!cx18_stream_enabled(s))
  845. continue;
  846. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  847. cx18_stop_v4l2_encode_stream(s, 0);
  848. }
  849. }
  850. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  851. {
  852. struct cx18 *cx = s->cx;
  853. if (!cx18_stream_enabled(s))
  854. return -EINVAL;
  855. /* This function assumes that you are allowed to stop the capture
  856. and that we are actually capturing */
  857. CX18_DEBUG_INFO("Stop Capture\n");
  858. if (atomic_read(&cx->tot_capturing) == 0)
  859. return 0;
  860. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  861. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  862. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  863. else
  864. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  865. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  866. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  867. }
  868. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  869. atomic_dec(&cx->ana_capturing);
  870. atomic_dec(&cx->tot_capturing);
  871. /* Clear capture and no-read bits */
  872. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  873. /* Tell the CX23418 it can't use our buffers anymore */
  874. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  875. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  876. s->handle = CX18_INVALID_TASK_HANDLE;
  877. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  878. if (atomic_read(&cx->tot_capturing) > 0)
  879. return 0;
  880. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  881. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  882. wake_up(&s->waitq);
  883. return 0;
  884. }
  885. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  886. u32 cx18_find_handle(struct cx18 *cx)
  887. {
  888. int i;
  889. /* find first available handle to be used for global settings */
  890. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  891. struct cx18_stream *s = &cx->streams[i];
  892. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  893. return s->handle;
  894. }
  895. return CX18_INVALID_TASK_HANDLE;
  896. }
  897. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  898. {
  899. int i;
  900. struct cx18_stream *s;
  901. if (handle == CX18_INVALID_TASK_HANDLE)
  902. return NULL;
  903. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  904. s = &cx->streams[i];
  905. if (s->handle != handle)
  906. continue;
  907. if (cx18_stream_enabled(s))
  908. return s;
  909. }
  910. return NULL;
  911. }