pinctrl-samsung.h 7.6 KB

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  1. /*
  2. * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * Author: Thomas Abraham <thomas.ab@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. */
  16. #ifndef __PINCTRL_SAMSUNG_H
  17. #define __PINCTRL_SAMSUNG_H
  18. #include <linux/pinctrl/pinctrl.h>
  19. #include <linux/pinctrl/pinmux.h>
  20. #include <linux/pinctrl/pinconf.h>
  21. #include <linux/pinctrl/consumer.h>
  22. #include <linux/pinctrl/machine.h>
  23. /* register offsets within a pin bank */
  24. #define DAT_REG 0x4
  25. #define PUD_REG 0x8
  26. #define DRV_REG 0xC
  27. #define CONPDN_REG 0x10
  28. #define PUDPDN_REG 0x14
  29. /* pinmux function number for pin as gpio output line */
  30. #define FUNC_OUTPUT 0x1
  31. /**
  32. * enum pincfg_type - possible pin configuration types supported.
  33. * @PINCFG_TYPE_PUD: Pull up/down configuration.
  34. * @PINCFG_TYPE_DRV: Drive strength configuration.
  35. * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
  36. * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode.
  37. */
  38. enum pincfg_type {
  39. PINCFG_TYPE_PUD,
  40. PINCFG_TYPE_DRV,
  41. PINCFG_TYPE_CON_PDN,
  42. PINCFG_TYPE_PUD_PDN,
  43. };
  44. /*
  45. * pin configuration (pull up/down and drive strength) type and its value are
  46. * packed together into a 16-bits. The upper 8-bits represent the configuration
  47. * type and the lower 8-bits hold the value of the configuration type.
  48. */
  49. #define PINCFG_TYPE_MASK 0xFF
  50. #define PINCFG_VALUE_SHIFT 8
  51. #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
  52. #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
  53. #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
  54. #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
  55. PINCFG_VALUE_SHIFT)
  56. /**
  57. * enum eint_type - possible external interrupt types.
  58. * @EINT_TYPE_NONE: bank does not support external interrupts
  59. * @EINT_TYPE_GPIO: bank supportes external gpio interrupts
  60. * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
  61. *
  62. * Samsung GPIO controller groups all the available pins into banks. The pins
  63. * in a pin bank can support external gpio interrupts or external wakeup
  64. * interrupts or no interrupts at all. From a software perspective, the only
  65. * difference between external gpio and external wakeup interrupts is that
  66. * the wakeup interrupts can additionally wakeup the system if it is in
  67. * suspended state.
  68. */
  69. enum eint_type {
  70. EINT_TYPE_NONE,
  71. EINT_TYPE_GPIO,
  72. EINT_TYPE_WKUP,
  73. };
  74. /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
  75. #define PIN_NAME_LENGTH 10
  76. #define PIN_GROUP(n, p, f) \
  77. { \
  78. .name = n, \
  79. .pins = p, \
  80. .num_pins = ARRAY_SIZE(p), \
  81. .func = f \
  82. }
  83. #define PMX_FUNC(n, g) \
  84. { \
  85. .name = n, \
  86. .groups = g, \
  87. .num_groups = ARRAY_SIZE(g), \
  88. }
  89. struct samsung_pinctrl_drv_data;
  90. /**
  91. * struct samsung_pin_bank: represent a controller pin-bank.
  92. * @reg_offset: starting offset of the pin-bank registers.
  93. * @pin_base: starting pin number of the bank.
  94. * @nr_pins: number of pins included in this bank.
  95. * @func_width: width of the function selector bit field.
  96. * @pud_width: width of the pin pull up/down selector bit field.
  97. * @drv_width: width of the pin driver strength selector bit field.
  98. * @conpdn_width: width of the sleep mode function selector bin field.
  99. * @pudpdn_width: width of the sleep mode pull up/down selector bit field.
  100. * @eint_type: type of the external interrupt supported by the bank.
  101. * @irq_base: starting controller local irq number of the bank.
  102. * @name: name to be prefixed for each pin in this pin bank.
  103. * @of_node: OF node of the bank.
  104. * @drvdata: link to controller driver data
  105. */
  106. struct samsung_pin_bank {
  107. u32 pctl_offset;
  108. u32 pin_base;
  109. u8 nr_pins;
  110. u8 func_width;
  111. u8 pud_width;
  112. u8 drv_width;
  113. u8 conpdn_width;
  114. u8 pudpdn_width;
  115. enum eint_type eint_type;
  116. u32 irq_base;
  117. char *name;
  118. struct device_node *of_node;
  119. struct samsung_pinctrl_drv_data *drvdata;
  120. };
  121. /**
  122. * struct samsung_pin_ctrl: represent a pin controller.
  123. * @pin_banks: list of pin banks included in this controller.
  124. * @nr_banks: number of pin banks.
  125. * @base: starting system wide pin number.
  126. * @nr_pins: number of pins supported by the controller.
  127. * @nr_gint: number of external gpio interrupts supported.
  128. * @nr_wint: number of external wakeup interrupts supported.
  129. * @geint_con: offset of the ext-gpio controller registers.
  130. * @geint_mask: offset of the ext-gpio interrupt mask registers.
  131. * @geint_pend: offset of the ext-gpio interrupt pending registers.
  132. * @weint_con: offset of the ext-wakeup controller registers.
  133. * @weint_mask: offset of the ext-wakeup interrupt mask registers.
  134. * @weint_pend: offset of the ext-wakeup interrupt pending registers.
  135. * @svc: offset of the interrupt service register.
  136. * @eint_gpio_init: platform specific callback to setup the external gpio
  137. * interrupts for the controller.
  138. * @eint_wkup_init: platform specific callback to setup the external wakeup
  139. * interrupts for the controller.
  140. * @label: for debug information.
  141. */
  142. struct samsung_pin_ctrl {
  143. struct samsung_pin_bank *pin_banks;
  144. u32 nr_banks;
  145. u32 base;
  146. u32 nr_pins;
  147. u32 nr_gint;
  148. u32 nr_wint;
  149. u32 geint_con;
  150. u32 geint_mask;
  151. u32 geint_pend;
  152. u32 weint_con;
  153. u32 weint_mask;
  154. u32 weint_pend;
  155. u32 svc;
  156. int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
  157. int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
  158. char *label;
  159. };
  160. /**
  161. * struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
  162. * @virt_base: register base address of the controller.
  163. * @dev: device instance representing the controller.
  164. * @irq: interrpt number used by the controller to notify gpio interrupts.
  165. * @ctrl: pin controller instance managed by the driver.
  166. * @pctl: pin controller descriptor registered with the pinctrl subsystem.
  167. * @pctl_dev: cookie representing pinctrl device instance.
  168. * @pin_groups: list of pin groups available to the driver.
  169. * @nr_groups: number of such pin groups.
  170. * @pmx_functions: list of pin functions available to the driver.
  171. * @nr_function: number of such pin functions.
  172. * @gc: gpio_chip instance registered with gpiolib.
  173. * @grange: linux gpio pin range supported by this controller.
  174. */
  175. struct samsung_pinctrl_drv_data {
  176. void __iomem *virt_base;
  177. struct device *dev;
  178. int irq;
  179. struct samsung_pin_ctrl *ctrl;
  180. struct pinctrl_desc pctl;
  181. struct pinctrl_dev *pctl_dev;
  182. const struct samsung_pin_group *pin_groups;
  183. unsigned int nr_groups;
  184. const struct samsung_pmx_func *pmx_functions;
  185. unsigned int nr_functions;
  186. struct irq_domain *gpio_irqd;
  187. struct irq_domain *wkup_irqd;
  188. struct gpio_chip *gc;
  189. struct pinctrl_gpio_range grange;
  190. };
  191. /**
  192. * struct samsung_pin_group: represent group of pins of a pinmux function.
  193. * @name: name of the pin group, used to lookup the group.
  194. * @pins: the pins included in this group.
  195. * @num_pins: number of pins included in this group.
  196. * @func: the function number to be programmed when selected.
  197. */
  198. struct samsung_pin_group {
  199. const char *name;
  200. const unsigned int *pins;
  201. u8 num_pins;
  202. u8 func;
  203. };
  204. /**
  205. * struct samsung_pmx_func: represent a pin function.
  206. * @name: name of the pin function, used to lookup the function.
  207. * @groups: one or more names of pin groups that provide this function.
  208. * @num_groups: number of groups included in @groups.
  209. */
  210. struct samsung_pmx_func {
  211. const char *name;
  212. const char **groups;
  213. u8 num_groups;
  214. };
  215. /* list of all exported SoC specific data */
  216. extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
  217. #endif /* __PINCTRL_SAMSUNG_H */