be_main.c 70 KB

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  1. /*
  2. * Copyright (C) 2005 - 2010 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. static unsigned int num_vfs;
  27. module_param(rx_frag_size, uint, S_IRUGO);
  28. module_param(num_vfs, uint, S_IRUGO);
  29. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  30. MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
  31. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  32. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  33. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  34. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  35. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  36. { 0 }
  37. };
  38. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  39. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  40. {
  41. struct be_dma_mem *mem = &q->dma_mem;
  42. if (mem->va)
  43. pci_free_consistent(adapter->pdev, mem->size,
  44. mem->va, mem->dma);
  45. }
  46. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  47. u16 len, u16 entry_size)
  48. {
  49. struct be_dma_mem *mem = &q->dma_mem;
  50. memset(q, 0, sizeof(*q));
  51. q->len = len;
  52. q->entry_size = entry_size;
  53. mem->size = len * entry_size;
  54. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  55. if (!mem->va)
  56. return -1;
  57. memset(mem->va, 0, mem->size);
  58. return 0;
  59. }
  60. static void be_intr_set(struct be_adapter *adapter, bool enable)
  61. {
  62. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  63. u32 reg = ioread32(addr);
  64. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. if (adapter->eeh_err)
  66. return;
  67. if (!enabled && enable)
  68. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  69. else if (enabled && !enable)
  70. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  71. else
  72. return;
  73. iowrite32(reg, addr);
  74. }
  75. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  76. {
  77. u32 val = 0;
  78. val |= qid & DB_RQ_RING_ID_MASK;
  79. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  80. wmb();
  81. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  82. }
  83. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  84. {
  85. u32 val = 0;
  86. val |= qid & DB_TXULP_RING_ID_MASK;
  87. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  88. wmb();
  89. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  90. }
  91. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  92. bool arm, bool clear_int, u16 num_popped)
  93. {
  94. u32 val = 0;
  95. val |= qid & DB_EQ_RING_ID_MASK;
  96. if (adapter->eeh_err)
  97. return;
  98. if (arm)
  99. val |= 1 << DB_EQ_REARM_SHIFT;
  100. if (clear_int)
  101. val |= 1 << DB_EQ_CLR_SHIFT;
  102. val |= 1 << DB_EQ_EVNT_SHIFT;
  103. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  104. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  105. }
  106. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  107. {
  108. u32 val = 0;
  109. val |= qid & DB_CQ_RING_ID_MASK;
  110. if (adapter->eeh_err)
  111. return;
  112. if (arm)
  113. val |= 1 << DB_CQ_REARM_SHIFT;
  114. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  115. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  116. }
  117. static int be_mac_addr_set(struct net_device *netdev, void *p)
  118. {
  119. struct be_adapter *adapter = netdev_priv(netdev);
  120. struct sockaddr *addr = p;
  121. int status = 0;
  122. if (!is_valid_ether_addr(addr->sa_data))
  123. return -EADDRNOTAVAIL;
  124. /* MAC addr configuration will be done in hardware for VFs
  125. * by their corresponding PFs. Just copy to netdev addr here
  126. */
  127. if (!be_physfn(adapter))
  128. goto netdev_addr;
  129. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  130. if (status)
  131. return status;
  132. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  133. adapter->if_handle, &adapter->pmac_id);
  134. netdev_addr:
  135. if (!status)
  136. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  137. return status;
  138. }
  139. void netdev_stats_update(struct be_adapter *adapter)
  140. {
  141. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  142. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  143. struct be_port_rxf_stats *port_stats =
  144. &rxf_stats->port[adapter->port_num];
  145. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  146. struct be_erx_stats *erx_stats = &hw_stats->erx;
  147. dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
  148. dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
  149. dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
  150. dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
  151. /* bad pkts received */
  152. dev_stats->rx_errors = port_stats->rx_crc_errors +
  153. port_stats->rx_alignment_symbol_errors +
  154. port_stats->rx_in_range_errors +
  155. port_stats->rx_out_range_errors +
  156. port_stats->rx_frame_too_long +
  157. port_stats->rx_dropped_too_small +
  158. port_stats->rx_dropped_too_short +
  159. port_stats->rx_dropped_header_too_small +
  160. port_stats->rx_dropped_tcp_length +
  161. port_stats->rx_dropped_runt +
  162. port_stats->rx_tcp_checksum_errs +
  163. port_stats->rx_ip_checksum_errs +
  164. port_stats->rx_udp_checksum_errs;
  165. /* no space in linux buffers: best possible approximation */
  166. dev_stats->rx_dropped =
  167. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  168. /* detailed rx errors */
  169. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  170. port_stats->rx_out_range_errors +
  171. port_stats->rx_frame_too_long;
  172. /* receive ring buffer overflow */
  173. dev_stats->rx_over_errors = 0;
  174. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  175. /* frame alignment errors */
  176. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  177. /* receiver fifo overrun */
  178. /* drops_no_pbuf is no per i/f, it's per BE card */
  179. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  180. port_stats->rx_input_fifo_overflow +
  181. rxf_stats->rx_drops_no_pbuf;
  182. /* receiver missed packetd */
  183. dev_stats->rx_missed_errors = 0;
  184. /* packet transmit problems */
  185. dev_stats->tx_errors = 0;
  186. /* no space available in linux */
  187. dev_stats->tx_dropped = 0;
  188. dev_stats->multicast = port_stats->rx_multicast_frames;
  189. dev_stats->collisions = 0;
  190. /* detailed tx_errors */
  191. dev_stats->tx_aborted_errors = 0;
  192. dev_stats->tx_carrier_errors = 0;
  193. dev_stats->tx_fifo_errors = 0;
  194. dev_stats->tx_heartbeat_errors = 0;
  195. dev_stats->tx_window_errors = 0;
  196. }
  197. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  198. {
  199. struct net_device *netdev = adapter->netdev;
  200. /* If link came up or went down */
  201. if (adapter->link_up != link_up) {
  202. adapter->link_speed = -1;
  203. if (link_up) {
  204. netif_start_queue(netdev);
  205. netif_carrier_on(netdev);
  206. printk(KERN_INFO "%s: Link up\n", netdev->name);
  207. } else {
  208. netif_stop_queue(netdev);
  209. netif_carrier_off(netdev);
  210. printk(KERN_INFO "%s: Link down\n", netdev->name);
  211. }
  212. adapter->link_up = link_up;
  213. }
  214. }
  215. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  216. static void be_rx_eqd_update(struct be_adapter *adapter)
  217. {
  218. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  219. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  220. ulong now = jiffies;
  221. u32 eqd;
  222. if (!rx_eq->enable_aic)
  223. return;
  224. /* Wrapped around */
  225. if (time_before(now, stats->rx_fps_jiffies)) {
  226. stats->rx_fps_jiffies = now;
  227. return;
  228. }
  229. /* Update once a second */
  230. if ((now - stats->rx_fps_jiffies) < HZ)
  231. return;
  232. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  233. ((now - stats->rx_fps_jiffies) / HZ);
  234. stats->rx_fps_jiffies = now;
  235. stats->be_prev_rx_frags = stats->be_rx_frags;
  236. eqd = stats->be_rx_fps / 110000;
  237. eqd = eqd << 3;
  238. if (eqd > rx_eq->max_eqd)
  239. eqd = rx_eq->max_eqd;
  240. if (eqd < rx_eq->min_eqd)
  241. eqd = rx_eq->min_eqd;
  242. if (eqd < 10)
  243. eqd = 0;
  244. if (eqd != rx_eq->cur_eqd)
  245. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  246. rx_eq->cur_eqd = eqd;
  247. }
  248. static struct net_device_stats *be_get_stats(struct net_device *dev)
  249. {
  250. return &dev->stats;
  251. }
  252. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  253. {
  254. u64 rate = bytes;
  255. do_div(rate, ticks / HZ);
  256. rate <<= 3; /* bytes/sec -> bits/sec */
  257. do_div(rate, 1000000ul); /* MB/Sec */
  258. return rate;
  259. }
  260. static void be_tx_rate_update(struct be_adapter *adapter)
  261. {
  262. struct be_drvr_stats *stats = drvr_stats(adapter);
  263. ulong now = jiffies;
  264. /* Wrapped around? */
  265. if (time_before(now, stats->be_tx_jiffies)) {
  266. stats->be_tx_jiffies = now;
  267. return;
  268. }
  269. /* Update tx rate once in two seconds */
  270. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  271. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  272. - stats->be_tx_bytes_prev,
  273. now - stats->be_tx_jiffies);
  274. stats->be_tx_jiffies = now;
  275. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  276. }
  277. }
  278. static void be_tx_stats_update(struct be_adapter *adapter,
  279. u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
  280. {
  281. struct be_drvr_stats *stats = drvr_stats(adapter);
  282. stats->be_tx_reqs++;
  283. stats->be_tx_wrbs += wrb_cnt;
  284. stats->be_tx_bytes += copied;
  285. stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
  286. if (stopped)
  287. stats->be_tx_stops++;
  288. }
  289. /* Determine number of WRB entries needed to xmit data in an skb */
  290. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  291. {
  292. int cnt = (skb->len > skb->data_len);
  293. cnt += skb_shinfo(skb)->nr_frags;
  294. /* to account for hdr wrb */
  295. cnt++;
  296. if (cnt & 1) {
  297. /* add a dummy to make it an even num */
  298. cnt++;
  299. *dummy = true;
  300. } else
  301. *dummy = false;
  302. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  303. return cnt;
  304. }
  305. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  306. {
  307. wrb->frag_pa_hi = upper_32_bits(addr);
  308. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  309. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  310. }
  311. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  312. bool vlan, u32 wrb_cnt, u32 len)
  313. {
  314. memset(hdr, 0, sizeof(*hdr));
  315. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  316. if (skb_is_gso(skb)) {
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  318. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  319. hdr, skb_shinfo(skb)->gso_size);
  320. if (skb_is_gso_v6(skb))
  321. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
  322. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  323. if (is_tcp_pkt(skb))
  324. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  325. else if (is_udp_pkt(skb))
  326. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  327. }
  328. if (vlan && vlan_tx_tag_present(skb)) {
  329. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  330. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  331. hdr, vlan_tx_tag_get(skb));
  332. }
  333. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  334. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  335. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  336. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  337. }
  338. static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
  339. bool unmap_single)
  340. {
  341. dma_addr_t dma;
  342. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  343. dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
  344. if (wrb->frag_len) {
  345. if (unmap_single)
  346. pci_unmap_single(pdev, dma, wrb->frag_len,
  347. PCI_DMA_TODEVICE);
  348. else
  349. pci_unmap_page(pdev, dma, wrb->frag_len,
  350. PCI_DMA_TODEVICE);
  351. }
  352. }
  353. static int make_tx_wrbs(struct be_adapter *adapter,
  354. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  355. {
  356. dma_addr_t busaddr;
  357. int i, copied = 0;
  358. struct pci_dev *pdev = adapter->pdev;
  359. struct sk_buff *first_skb = skb;
  360. struct be_queue_info *txq = &adapter->tx_obj.q;
  361. struct be_eth_wrb *wrb;
  362. struct be_eth_hdr_wrb *hdr;
  363. bool map_single = false;
  364. u16 map_head;
  365. hdr = queue_head_node(txq);
  366. queue_head_inc(txq);
  367. map_head = txq->head;
  368. if (skb->len > skb->data_len) {
  369. int len = skb_headlen(skb);
  370. busaddr = pci_map_single(pdev, skb->data, len,
  371. PCI_DMA_TODEVICE);
  372. if (pci_dma_mapping_error(pdev, busaddr))
  373. goto dma_err;
  374. map_single = true;
  375. wrb = queue_head_node(txq);
  376. wrb_fill(wrb, busaddr, len);
  377. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  378. queue_head_inc(txq);
  379. copied += len;
  380. }
  381. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  382. struct skb_frag_struct *frag =
  383. &skb_shinfo(skb)->frags[i];
  384. busaddr = pci_map_page(pdev, frag->page,
  385. frag->page_offset,
  386. frag->size, PCI_DMA_TODEVICE);
  387. if (pci_dma_mapping_error(pdev, busaddr))
  388. goto dma_err;
  389. wrb = queue_head_node(txq);
  390. wrb_fill(wrb, busaddr, frag->size);
  391. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  392. queue_head_inc(txq);
  393. copied += frag->size;
  394. }
  395. if (dummy_wrb) {
  396. wrb = queue_head_node(txq);
  397. wrb_fill(wrb, 0, 0);
  398. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  399. queue_head_inc(txq);
  400. }
  401. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  402. wrb_cnt, copied);
  403. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  404. return copied;
  405. dma_err:
  406. txq->head = map_head;
  407. while (copied) {
  408. wrb = queue_head_node(txq);
  409. unmap_tx_frag(pdev, wrb, map_single);
  410. map_single = false;
  411. copied -= wrb->frag_len;
  412. queue_head_inc(txq);
  413. }
  414. return 0;
  415. }
  416. static netdev_tx_t be_xmit(struct sk_buff *skb,
  417. struct net_device *netdev)
  418. {
  419. struct be_adapter *adapter = netdev_priv(netdev);
  420. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  421. struct be_queue_info *txq = &tx_obj->q;
  422. u32 wrb_cnt = 0, copied = 0;
  423. u32 start = txq->head;
  424. bool dummy_wrb, stopped = false;
  425. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  426. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  427. if (copied) {
  428. /* record the sent skb in the sent_skb table */
  429. BUG_ON(tx_obj->sent_skb_list[start]);
  430. tx_obj->sent_skb_list[start] = skb;
  431. /* Ensure txq has space for the next skb; Else stop the queue
  432. * *BEFORE* ringing the tx doorbell, so that we serialze the
  433. * tx compls of the current transmit which'll wake up the queue
  434. */
  435. atomic_add(wrb_cnt, &txq->used);
  436. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  437. txq->len) {
  438. netif_stop_queue(netdev);
  439. stopped = true;
  440. }
  441. be_txq_notify(adapter, txq->id, wrb_cnt);
  442. be_tx_stats_update(adapter, wrb_cnt, copied,
  443. skb_shinfo(skb)->gso_segs, stopped);
  444. } else {
  445. txq->head = start;
  446. dev_kfree_skb_any(skb);
  447. }
  448. return NETDEV_TX_OK;
  449. }
  450. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  451. {
  452. struct be_adapter *adapter = netdev_priv(netdev);
  453. if (new_mtu < BE_MIN_MTU ||
  454. new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
  455. (ETH_HLEN + ETH_FCS_LEN))) {
  456. dev_info(&adapter->pdev->dev,
  457. "MTU must be between %d and %d bytes\n",
  458. BE_MIN_MTU,
  459. (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
  460. return -EINVAL;
  461. }
  462. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  463. netdev->mtu, new_mtu);
  464. netdev->mtu = new_mtu;
  465. return 0;
  466. }
  467. /*
  468. * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
  469. * If the user configures more, place BE in vlan promiscuous mode.
  470. */
  471. static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
  472. {
  473. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  474. u16 ntags = 0, i;
  475. int status = 0;
  476. u32 if_handle;
  477. if (vf) {
  478. if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
  479. vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
  480. status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
  481. }
  482. if (adapter->vlans_added <= adapter->max_vlans) {
  483. /* Construct VLAN Table to give to HW */
  484. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  485. if (adapter->vlan_tag[i]) {
  486. vtag[ntags] = cpu_to_le16(i);
  487. ntags++;
  488. }
  489. }
  490. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  491. vtag, ntags, 1, 0);
  492. } else {
  493. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  494. NULL, 0, 1, 1);
  495. }
  496. return status;
  497. }
  498. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  499. {
  500. struct be_adapter *adapter = netdev_priv(netdev);
  501. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  502. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  503. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  504. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  505. adapter->vlan_grp = grp;
  506. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  507. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  508. }
  509. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  510. {
  511. struct be_adapter *adapter = netdev_priv(netdev);
  512. adapter->vlans_added++;
  513. if (!be_physfn(adapter))
  514. return;
  515. adapter->vlan_tag[vid] = 1;
  516. if (adapter->vlans_added <= (adapter->max_vlans + 1))
  517. be_vid_config(adapter, false, 0);
  518. }
  519. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  520. {
  521. struct be_adapter *adapter = netdev_priv(netdev);
  522. adapter->vlans_added--;
  523. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  524. if (!be_physfn(adapter))
  525. return;
  526. adapter->vlan_tag[vid] = 0;
  527. if (adapter->vlans_added <= adapter->max_vlans)
  528. be_vid_config(adapter, false, 0);
  529. }
  530. static void be_set_multicast_list(struct net_device *netdev)
  531. {
  532. struct be_adapter *adapter = netdev_priv(netdev);
  533. if (netdev->flags & IFF_PROMISC) {
  534. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  535. adapter->promiscuous = true;
  536. goto done;
  537. }
  538. /* BE was previously in promiscous mode; disable it */
  539. if (adapter->promiscuous) {
  540. adapter->promiscuous = false;
  541. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  542. }
  543. /* Enable multicast promisc if num configured exceeds what we support */
  544. if (netdev->flags & IFF_ALLMULTI ||
  545. netdev_mc_count(netdev) > BE_MAX_MC) {
  546. be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
  547. &adapter->mc_cmd_mem);
  548. goto done;
  549. }
  550. be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
  551. &adapter->mc_cmd_mem);
  552. done:
  553. return;
  554. }
  555. static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  556. {
  557. struct be_adapter *adapter = netdev_priv(netdev);
  558. int status;
  559. if (!adapter->sriov_enabled)
  560. return -EPERM;
  561. if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
  562. return -EINVAL;
  563. if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
  564. status = be_cmd_pmac_del(adapter,
  565. adapter->vf_cfg[vf].vf_if_handle,
  566. adapter->vf_cfg[vf].vf_pmac_id);
  567. status = be_cmd_pmac_add(adapter, mac,
  568. adapter->vf_cfg[vf].vf_if_handle,
  569. &adapter->vf_cfg[vf].vf_pmac_id);
  570. if (status)
  571. dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
  572. mac, vf);
  573. else
  574. memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
  575. return status;
  576. }
  577. static int be_get_vf_config(struct net_device *netdev, int vf,
  578. struct ifla_vf_info *vi)
  579. {
  580. struct be_adapter *adapter = netdev_priv(netdev);
  581. if (!adapter->sriov_enabled)
  582. return -EPERM;
  583. if (vf >= num_vfs)
  584. return -EINVAL;
  585. vi->vf = vf;
  586. vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
  587. vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
  588. vi->qos = 0;
  589. memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
  590. return 0;
  591. }
  592. static int be_set_vf_vlan(struct net_device *netdev,
  593. int vf, u16 vlan, u8 qos)
  594. {
  595. struct be_adapter *adapter = netdev_priv(netdev);
  596. int status = 0;
  597. if (!adapter->sriov_enabled)
  598. return -EPERM;
  599. if ((vf >= num_vfs) || (vlan > 4095))
  600. return -EINVAL;
  601. if (vlan) {
  602. adapter->vf_cfg[vf].vf_vlan_tag = vlan;
  603. adapter->vlans_added++;
  604. } else {
  605. adapter->vf_cfg[vf].vf_vlan_tag = 0;
  606. adapter->vlans_added--;
  607. }
  608. status = be_vid_config(adapter, true, vf);
  609. if (status)
  610. dev_info(&adapter->pdev->dev,
  611. "VLAN %d config on VF %d failed\n", vlan, vf);
  612. return status;
  613. }
  614. static int be_set_vf_tx_rate(struct net_device *netdev,
  615. int vf, int rate)
  616. {
  617. struct be_adapter *adapter = netdev_priv(netdev);
  618. int status = 0;
  619. if (!adapter->sriov_enabled)
  620. return -EPERM;
  621. if ((vf >= num_vfs) || (rate < 0))
  622. return -EINVAL;
  623. if (rate > 10000)
  624. rate = 10000;
  625. adapter->vf_cfg[vf].vf_tx_rate = rate;
  626. status = be_cmd_set_qos(adapter, rate / 10, vf);
  627. if (status)
  628. dev_info(&adapter->pdev->dev,
  629. "tx rate %d on VF %d failed\n", rate, vf);
  630. return status;
  631. }
  632. static void be_rx_rate_update(struct be_adapter *adapter)
  633. {
  634. struct be_drvr_stats *stats = drvr_stats(adapter);
  635. ulong now = jiffies;
  636. /* Wrapped around */
  637. if (time_before(now, stats->be_rx_jiffies)) {
  638. stats->be_rx_jiffies = now;
  639. return;
  640. }
  641. /* Update the rate once in two seconds */
  642. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  643. return;
  644. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  645. - stats->be_rx_bytes_prev,
  646. now - stats->be_rx_jiffies);
  647. stats->be_rx_jiffies = now;
  648. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  649. }
  650. static void be_rx_stats_update(struct be_adapter *adapter,
  651. u32 pktsize, u16 numfrags)
  652. {
  653. struct be_drvr_stats *stats = drvr_stats(adapter);
  654. stats->be_rx_compl++;
  655. stats->be_rx_frags += numfrags;
  656. stats->be_rx_bytes += pktsize;
  657. stats->be_rx_pkts++;
  658. }
  659. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  660. {
  661. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  662. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  663. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  664. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  665. if (ip_version) {
  666. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  667. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  668. }
  669. ipv6_chk = (ip_version && (tcpf || udpf));
  670. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  671. }
  672. static struct be_rx_page_info *
  673. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  674. {
  675. struct be_rx_page_info *rx_page_info;
  676. struct be_queue_info *rxq = &adapter->rx_obj.q;
  677. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  678. BUG_ON(!rx_page_info->page);
  679. if (rx_page_info->last_page_user) {
  680. pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
  681. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  682. rx_page_info->last_page_user = false;
  683. }
  684. atomic_dec(&rxq->used);
  685. return rx_page_info;
  686. }
  687. /* Throwaway the data in the Rx completion */
  688. static void be_rx_compl_discard(struct be_adapter *adapter,
  689. struct be_eth_rx_compl *rxcp)
  690. {
  691. struct be_queue_info *rxq = &adapter->rx_obj.q;
  692. struct be_rx_page_info *page_info;
  693. u16 rxq_idx, i, num_rcvd;
  694. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  695. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  696. for (i = 0; i < num_rcvd; i++) {
  697. page_info = get_rx_page_info(adapter, rxq_idx);
  698. put_page(page_info->page);
  699. memset(page_info, 0, sizeof(*page_info));
  700. index_inc(&rxq_idx, rxq->len);
  701. }
  702. }
  703. /*
  704. * skb_fill_rx_data forms a complete skb for an ether frame
  705. * indicated by rxcp.
  706. */
  707. static void skb_fill_rx_data(struct be_adapter *adapter,
  708. struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
  709. u16 num_rcvd)
  710. {
  711. struct be_queue_info *rxq = &adapter->rx_obj.q;
  712. struct be_rx_page_info *page_info;
  713. u16 rxq_idx, i, j;
  714. u32 pktsize, hdr_len, curr_frag_len, size;
  715. u8 *start;
  716. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  717. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  718. page_info = get_rx_page_info(adapter, rxq_idx);
  719. start = page_address(page_info->page) + page_info->page_offset;
  720. prefetch(start);
  721. /* Copy data in the first descriptor of this completion */
  722. curr_frag_len = min(pktsize, rx_frag_size);
  723. /* Copy the header portion into skb_data */
  724. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  725. memcpy(skb->data, start, hdr_len);
  726. skb->len = curr_frag_len;
  727. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  728. /* Complete packet has now been moved to data */
  729. put_page(page_info->page);
  730. skb->data_len = 0;
  731. skb->tail += curr_frag_len;
  732. } else {
  733. skb_shinfo(skb)->nr_frags = 1;
  734. skb_shinfo(skb)->frags[0].page = page_info->page;
  735. skb_shinfo(skb)->frags[0].page_offset =
  736. page_info->page_offset + hdr_len;
  737. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  738. skb->data_len = curr_frag_len - hdr_len;
  739. skb->tail += hdr_len;
  740. }
  741. page_info->page = NULL;
  742. if (pktsize <= rx_frag_size) {
  743. BUG_ON(num_rcvd != 1);
  744. goto done;
  745. }
  746. /* More frags present for this completion */
  747. size = pktsize;
  748. for (i = 1, j = 0; i < num_rcvd; i++) {
  749. size -= curr_frag_len;
  750. index_inc(&rxq_idx, rxq->len);
  751. page_info = get_rx_page_info(adapter, rxq_idx);
  752. curr_frag_len = min(size, rx_frag_size);
  753. /* Coalesce all frags from the same physical page in one slot */
  754. if (page_info->page_offset == 0) {
  755. /* Fresh page */
  756. j++;
  757. skb_shinfo(skb)->frags[j].page = page_info->page;
  758. skb_shinfo(skb)->frags[j].page_offset =
  759. page_info->page_offset;
  760. skb_shinfo(skb)->frags[j].size = 0;
  761. skb_shinfo(skb)->nr_frags++;
  762. } else {
  763. put_page(page_info->page);
  764. }
  765. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  766. skb->len += curr_frag_len;
  767. skb->data_len += curr_frag_len;
  768. page_info->page = NULL;
  769. }
  770. BUG_ON(j > MAX_SKB_FRAGS);
  771. done:
  772. be_rx_stats_update(adapter, pktsize, num_rcvd);
  773. }
  774. /* Process the RX completion indicated by rxcp when GRO is disabled */
  775. static void be_rx_compl_process(struct be_adapter *adapter,
  776. struct be_eth_rx_compl *rxcp)
  777. {
  778. struct sk_buff *skb;
  779. u32 vlanf, vid;
  780. u16 num_rcvd;
  781. u8 vtm;
  782. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  783. /* Is it a flush compl that has no data */
  784. if (unlikely(num_rcvd == 0))
  785. return;
  786. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  787. if (unlikely(!skb)) {
  788. if (net_ratelimit())
  789. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  790. be_rx_compl_discard(adapter, rxcp);
  791. return;
  792. }
  793. skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
  794. if (do_pkt_csum(rxcp, adapter->rx_csum))
  795. skb->ip_summed = CHECKSUM_NONE;
  796. else
  797. skb->ip_summed = CHECKSUM_UNNECESSARY;
  798. skb->truesize = skb->len + sizeof(struct sk_buff);
  799. skb->protocol = eth_type_trans(skb, adapter->netdev);
  800. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  801. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  802. /* vlanf could be wrongly set in some cards.
  803. * ignore if vtm is not set */
  804. if ((adapter->function_mode & 0x400) && !vtm)
  805. vlanf = 0;
  806. if (unlikely(vlanf)) {
  807. if (!adapter->vlan_grp || adapter->vlans_added == 0) {
  808. kfree_skb(skb);
  809. return;
  810. }
  811. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  812. vid = swab16(vid);
  813. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  814. } else {
  815. netif_receive_skb(skb);
  816. }
  817. }
  818. /* Process the RX completion indicated by rxcp when GRO is enabled */
  819. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  820. struct be_eth_rx_compl *rxcp)
  821. {
  822. struct be_rx_page_info *page_info;
  823. struct sk_buff *skb = NULL;
  824. struct be_queue_info *rxq = &adapter->rx_obj.q;
  825. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  826. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  827. u16 i, rxq_idx = 0, vid, j;
  828. u8 vtm;
  829. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  830. /* Is it a flush compl that has no data */
  831. if (unlikely(num_rcvd == 0))
  832. return;
  833. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  834. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  835. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  836. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  837. /* vlanf could be wrongly set in some cards.
  838. * ignore if vtm is not set */
  839. if ((adapter->function_mode & 0x400) && !vtm)
  840. vlanf = 0;
  841. skb = napi_get_frags(&eq_obj->napi);
  842. if (!skb) {
  843. be_rx_compl_discard(adapter, rxcp);
  844. return;
  845. }
  846. remaining = pkt_size;
  847. for (i = 0, j = -1; i < num_rcvd; i++) {
  848. page_info = get_rx_page_info(adapter, rxq_idx);
  849. curr_frag_len = min(remaining, rx_frag_size);
  850. /* Coalesce all frags from the same physical page in one slot */
  851. if (i == 0 || page_info->page_offset == 0) {
  852. /* First frag or Fresh page */
  853. j++;
  854. skb_shinfo(skb)->frags[j].page = page_info->page;
  855. skb_shinfo(skb)->frags[j].page_offset =
  856. page_info->page_offset;
  857. skb_shinfo(skb)->frags[j].size = 0;
  858. } else {
  859. put_page(page_info->page);
  860. }
  861. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  862. remaining -= curr_frag_len;
  863. index_inc(&rxq_idx, rxq->len);
  864. memset(page_info, 0, sizeof(*page_info));
  865. }
  866. BUG_ON(j > MAX_SKB_FRAGS);
  867. skb_shinfo(skb)->nr_frags = j + 1;
  868. skb->len = pkt_size;
  869. skb->data_len = pkt_size;
  870. skb->truesize += pkt_size;
  871. skb->ip_summed = CHECKSUM_UNNECESSARY;
  872. if (likely(!vlanf)) {
  873. napi_gro_frags(&eq_obj->napi);
  874. } else {
  875. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  876. vid = swab16(vid);
  877. if (!adapter->vlan_grp || adapter->vlans_added == 0)
  878. return;
  879. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  880. }
  881. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  882. }
  883. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  884. {
  885. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  886. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  887. return NULL;
  888. rmb();
  889. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  890. queue_tail_inc(&adapter->rx_obj.cq);
  891. return rxcp;
  892. }
  893. /* To reset the valid bit, we need to reset the whole word as
  894. * when walking the queue the valid entries are little-endian
  895. * and invalid entries are host endian
  896. */
  897. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  898. {
  899. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  900. }
  901. static inline struct page *be_alloc_pages(u32 size)
  902. {
  903. gfp_t alloc_flags = GFP_ATOMIC;
  904. u32 order = get_order(size);
  905. if (order > 0)
  906. alloc_flags |= __GFP_COMP;
  907. return alloc_pages(alloc_flags, order);
  908. }
  909. /*
  910. * Allocate a page, split it to fragments of size rx_frag_size and post as
  911. * receive buffers to BE
  912. */
  913. static void be_post_rx_frags(struct be_adapter *adapter)
  914. {
  915. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  916. struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
  917. struct be_queue_info *rxq = &adapter->rx_obj.q;
  918. struct page *pagep = NULL;
  919. struct be_eth_rx_d *rxd;
  920. u64 page_dmaaddr = 0, frag_dmaaddr;
  921. u32 posted, page_offset = 0;
  922. page_info = &page_info_tbl[rxq->head];
  923. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  924. if (!pagep) {
  925. pagep = be_alloc_pages(adapter->big_page_size);
  926. if (unlikely(!pagep)) {
  927. drvr_stats(adapter)->be_ethrx_post_fail++;
  928. break;
  929. }
  930. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  931. adapter->big_page_size,
  932. PCI_DMA_FROMDEVICE);
  933. page_info->page_offset = 0;
  934. } else {
  935. get_page(pagep);
  936. page_info->page_offset = page_offset + rx_frag_size;
  937. }
  938. page_offset = page_info->page_offset;
  939. page_info->page = pagep;
  940. dma_unmap_addr_set(page_info, bus, page_dmaaddr);
  941. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  942. rxd = queue_head_node(rxq);
  943. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  944. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  945. /* Any space left in the current big page for another frag? */
  946. if ((page_offset + rx_frag_size + rx_frag_size) >
  947. adapter->big_page_size) {
  948. pagep = NULL;
  949. page_info->last_page_user = true;
  950. }
  951. prev_page_info = page_info;
  952. queue_head_inc(rxq);
  953. page_info = &page_info_tbl[rxq->head];
  954. }
  955. if (pagep)
  956. prev_page_info->last_page_user = true;
  957. if (posted) {
  958. atomic_add(posted, &rxq->used);
  959. be_rxq_notify(adapter, rxq->id, posted);
  960. } else if (atomic_read(&rxq->used) == 0) {
  961. /* Let be_worker replenish when memory is available */
  962. adapter->rx_post_starved = true;
  963. }
  964. }
  965. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  966. {
  967. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  968. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  969. return NULL;
  970. rmb();
  971. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  972. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  973. queue_tail_inc(tx_cq);
  974. return txcp;
  975. }
  976. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  977. {
  978. struct be_queue_info *txq = &adapter->tx_obj.q;
  979. struct be_eth_wrb *wrb;
  980. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  981. struct sk_buff *sent_skb;
  982. u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
  983. bool unmap_skb_hdr = true;
  984. sent_skb = sent_skbs[txq->tail];
  985. BUG_ON(!sent_skb);
  986. sent_skbs[txq->tail] = NULL;
  987. /* skip header wrb */
  988. queue_tail_inc(txq);
  989. do {
  990. cur_index = txq->tail;
  991. wrb = queue_tail_node(txq);
  992. unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
  993. skb_headlen(sent_skb)));
  994. unmap_skb_hdr = false;
  995. num_wrbs++;
  996. queue_tail_inc(txq);
  997. } while (cur_index != last_index);
  998. atomic_sub(num_wrbs, &txq->used);
  999. kfree_skb(sent_skb);
  1000. }
  1001. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  1002. {
  1003. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  1004. if (!eqe->evt)
  1005. return NULL;
  1006. rmb();
  1007. eqe->evt = le32_to_cpu(eqe->evt);
  1008. queue_tail_inc(&eq_obj->q);
  1009. return eqe;
  1010. }
  1011. static int event_handle(struct be_adapter *adapter,
  1012. struct be_eq_obj *eq_obj)
  1013. {
  1014. struct be_eq_entry *eqe;
  1015. u16 num = 0;
  1016. while ((eqe = event_get(eq_obj)) != NULL) {
  1017. eqe->evt = 0;
  1018. num++;
  1019. }
  1020. /* Deal with any spurious interrupts that come
  1021. * without events
  1022. */
  1023. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  1024. if (num)
  1025. napi_schedule(&eq_obj->napi);
  1026. return num;
  1027. }
  1028. /* Just read and notify events without processing them.
  1029. * Used at the time of destroying event queues */
  1030. static void be_eq_clean(struct be_adapter *adapter,
  1031. struct be_eq_obj *eq_obj)
  1032. {
  1033. struct be_eq_entry *eqe;
  1034. u16 num = 0;
  1035. while ((eqe = event_get(eq_obj)) != NULL) {
  1036. eqe->evt = 0;
  1037. num++;
  1038. }
  1039. if (num)
  1040. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  1041. }
  1042. static void be_rx_q_clean(struct be_adapter *adapter)
  1043. {
  1044. struct be_rx_page_info *page_info;
  1045. struct be_queue_info *rxq = &adapter->rx_obj.q;
  1046. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1047. struct be_eth_rx_compl *rxcp;
  1048. u16 tail;
  1049. /* First cleanup pending rx completions */
  1050. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  1051. be_rx_compl_discard(adapter, rxcp);
  1052. be_rx_compl_reset(rxcp);
  1053. be_cq_notify(adapter, rx_cq->id, true, 1);
  1054. }
  1055. /* Then free posted rx buffer that were not used */
  1056. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  1057. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  1058. page_info = get_rx_page_info(adapter, tail);
  1059. put_page(page_info->page);
  1060. memset(page_info, 0, sizeof(*page_info));
  1061. }
  1062. BUG_ON(atomic_read(&rxq->used));
  1063. }
  1064. static void be_tx_compl_clean(struct be_adapter *adapter)
  1065. {
  1066. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1067. struct be_queue_info *txq = &adapter->tx_obj.q;
  1068. struct be_eth_tx_compl *txcp;
  1069. u16 end_idx, cmpl = 0, timeo = 0;
  1070. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  1071. struct sk_buff *sent_skb;
  1072. bool dummy_wrb;
  1073. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  1074. do {
  1075. while ((txcp = be_tx_compl_get(tx_cq))) {
  1076. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1077. wrb_index, txcp);
  1078. be_tx_compl_process(adapter, end_idx);
  1079. cmpl++;
  1080. }
  1081. if (cmpl) {
  1082. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  1083. cmpl = 0;
  1084. }
  1085. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  1086. break;
  1087. mdelay(1);
  1088. } while (true);
  1089. if (atomic_read(&txq->used))
  1090. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  1091. atomic_read(&txq->used));
  1092. /* free posted tx for which compls will never arrive */
  1093. while (atomic_read(&txq->used)) {
  1094. sent_skb = sent_skbs[txq->tail];
  1095. end_idx = txq->tail;
  1096. index_adv(&end_idx,
  1097. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  1098. be_tx_compl_process(adapter, end_idx);
  1099. }
  1100. }
  1101. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  1102. {
  1103. struct be_queue_info *q;
  1104. q = &adapter->mcc_obj.q;
  1105. if (q->created)
  1106. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  1107. be_queue_free(adapter, q);
  1108. q = &adapter->mcc_obj.cq;
  1109. if (q->created)
  1110. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1111. be_queue_free(adapter, q);
  1112. }
  1113. /* Must be called only after TX qs are created as MCC shares TX EQ */
  1114. static int be_mcc_queues_create(struct be_adapter *adapter)
  1115. {
  1116. struct be_queue_info *q, *cq;
  1117. /* Alloc MCC compl queue */
  1118. cq = &adapter->mcc_obj.cq;
  1119. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  1120. sizeof(struct be_mcc_compl)))
  1121. goto err;
  1122. /* Ask BE to create MCC compl queue; share TX's eq */
  1123. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  1124. goto mcc_cq_free;
  1125. /* Alloc MCC queue */
  1126. q = &adapter->mcc_obj.q;
  1127. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  1128. goto mcc_cq_destroy;
  1129. /* Ask BE to create MCC queue */
  1130. if (be_cmd_mccq_create(adapter, q, cq))
  1131. goto mcc_q_free;
  1132. return 0;
  1133. mcc_q_free:
  1134. be_queue_free(adapter, q);
  1135. mcc_cq_destroy:
  1136. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1137. mcc_cq_free:
  1138. be_queue_free(adapter, cq);
  1139. err:
  1140. return -1;
  1141. }
  1142. static void be_tx_queues_destroy(struct be_adapter *adapter)
  1143. {
  1144. struct be_queue_info *q;
  1145. q = &adapter->tx_obj.q;
  1146. if (q->created)
  1147. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  1148. be_queue_free(adapter, q);
  1149. q = &adapter->tx_obj.cq;
  1150. if (q->created)
  1151. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1152. be_queue_free(adapter, q);
  1153. /* Clear any residual events */
  1154. be_eq_clean(adapter, &adapter->tx_eq);
  1155. q = &adapter->tx_eq.q;
  1156. if (q->created)
  1157. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1158. be_queue_free(adapter, q);
  1159. }
  1160. static int be_tx_queues_create(struct be_adapter *adapter)
  1161. {
  1162. struct be_queue_info *eq, *q, *cq;
  1163. adapter->tx_eq.max_eqd = 0;
  1164. adapter->tx_eq.min_eqd = 0;
  1165. adapter->tx_eq.cur_eqd = 96;
  1166. adapter->tx_eq.enable_aic = false;
  1167. /* Alloc Tx Event queue */
  1168. eq = &adapter->tx_eq.q;
  1169. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1170. return -1;
  1171. /* Ask BE to create Tx Event queue */
  1172. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1173. goto tx_eq_free;
  1174. adapter->base_eq_id = adapter->tx_eq.q.id;
  1175. /* Alloc TX eth compl queue */
  1176. cq = &adapter->tx_obj.cq;
  1177. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1178. sizeof(struct be_eth_tx_compl)))
  1179. goto tx_eq_destroy;
  1180. /* Ask BE to create Tx eth compl queue */
  1181. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1182. goto tx_cq_free;
  1183. /* Alloc TX eth queue */
  1184. q = &adapter->tx_obj.q;
  1185. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1186. goto tx_cq_destroy;
  1187. /* Ask BE to create Tx eth queue */
  1188. if (be_cmd_txq_create(adapter, q, cq))
  1189. goto tx_q_free;
  1190. return 0;
  1191. tx_q_free:
  1192. be_queue_free(adapter, q);
  1193. tx_cq_destroy:
  1194. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1195. tx_cq_free:
  1196. be_queue_free(adapter, cq);
  1197. tx_eq_destroy:
  1198. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1199. tx_eq_free:
  1200. be_queue_free(adapter, eq);
  1201. return -1;
  1202. }
  1203. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1204. {
  1205. struct be_queue_info *q;
  1206. q = &adapter->rx_obj.q;
  1207. if (q->created) {
  1208. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1209. /* After the rxq is invalidated, wait for a grace time
  1210. * of 1ms for all dma to end and the flush compl to arrive
  1211. */
  1212. mdelay(1);
  1213. be_rx_q_clean(adapter);
  1214. }
  1215. be_queue_free(adapter, q);
  1216. q = &adapter->rx_obj.cq;
  1217. if (q->created)
  1218. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1219. be_queue_free(adapter, q);
  1220. /* Clear any residual events */
  1221. be_eq_clean(adapter, &adapter->rx_eq);
  1222. q = &adapter->rx_eq.q;
  1223. if (q->created)
  1224. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1225. be_queue_free(adapter, q);
  1226. }
  1227. static int be_rx_queues_create(struct be_adapter *adapter)
  1228. {
  1229. struct be_queue_info *eq, *q, *cq;
  1230. int rc;
  1231. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1232. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1233. adapter->rx_eq.min_eqd = 0;
  1234. adapter->rx_eq.cur_eqd = 0;
  1235. adapter->rx_eq.enable_aic = true;
  1236. /* Alloc Rx Event queue */
  1237. eq = &adapter->rx_eq.q;
  1238. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1239. sizeof(struct be_eq_entry));
  1240. if (rc)
  1241. return rc;
  1242. /* Ask BE to create Rx Event queue */
  1243. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1244. if (rc)
  1245. goto rx_eq_free;
  1246. /* Alloc RX eth compl queue */
  1247. cq = &adapter->rx_obj.cq;
  1248. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1249. sizeof(struct be_eth_rx_compl));
  1250. if (rc)
  1251. goto rx_eq_destroy;
  1252. /* Ask BE to create Rx eth compl queue */
  1253. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1254. if (rc)
  1255. goto rx_cq_free;
  1256. /* Alloc RX eth queue */
  1257. q = &adapter->rx_obj.q;
  1258. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1259. if (rc)
  1260. goto rx_cq_destroy;
  1261. /* Ask BE to create Rx eth queue */
  1262. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1263. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1264. if (rc)
  1265. goto rx_q_free;
  1266. return 0;
  1267. rx_q_free:
  1268. be_queue_free(adapter, q);
  1269. rx_cq_destroy:
  1270. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1271. rx_cq_free:
  1272. be_queue_free(adapter, cq);
  1273. rx_eq_destroy:
  1274. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1275. rx_eq_free:
  1276. be_queue_free(adapter, eq);
  1277. return rc;
  1278. }
  1279. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1280. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1281. {
  1282. return eq_id - adapter->base_eq_id;
  1283. }
  1284. static irqreturn_t be_intx(int irq, void *dev)
  1285. {
  1286. struct be_adapter *adapter = dev;
  1287. int isr;
  1288. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1289. (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
  1290. if (!isr)
  1291. return IRQ_NONE;
  1292. event_handle(adapter, &adapter->tx_eq);
  1293. event_handle(adapter, &adapter->rx_eq);
  1294. return IRQ_HANDLED;
  1295. }
  1296. static irqreturn_t be_msix_rx(int irq, void *dev)
  1297. {
  1298. struct be_adapter *adapter = dev;
  1299. event_handle(adapter, &adapter->rx_eq);
  1300. return IRQ_HANDLED;
  1301. }
  1302. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1303. {
  1304. struct be_adapter *adapter = dev;
  1305. event_handle(adapter, &adapter->tx_eq);
  1306. return IRQ_HANDLED;
  1307. }
  1308. static inline bool do_gro(struct be_adapter *adapter,
  1309. struct be_eth_rx_compl *rxcp)
  1310. {
  1311. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1312. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1313. if (err)
  1314. drvr_stats(adapter)->be_rxcp_err++;
  1315. return (tcp_frame && !err) ? true : false;
  1316. }
  1317. int be_poll_rx(struct napi_struct *napi, int budget)
  1318. {
  1319. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1320. struct be_adapter *adapter =
  1321. container_of(rx_eq, struct be_adapter, rx_eq);
  1322. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1323. struct be_eth_rx_compl *rxcp;
  1324. u32 work_done;
  1325. adapter->stats.drvr_stats.be_rx_polls++;
  1326. for (work_done = 0; work_done < budget; work_done++) {
  1327. rxcp = be_rx_compl_get(adapter);
  1328. if (!rxcp)
  1329. break;
  1330. if (do_gro(adapter, rxcp))
  1331. be_rx_compl_process_gro(adapter, rxcp);
  1332. else
  1333. be_rx_compl_process(adapter, rxcp);
  1334. be_rx_compl_reset(rxcp);
  1335. }
  1336. /* Refill the queue */
  1337. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1338. be_post_rx_frags(adapter);
  1339. /* All consumed */
  1340. if (work_done < budget) {
  1341. napi_complete(napi);
  1342. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1343. } else {
  1344. /* More to be consumed; continue with interrupts disabled */
  1345. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1346. }
  1347. return work_done;
  1348. }
  1349. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1350. * For TX/MCC we don't honour budget; consume everything
  1351. */
  1352. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1353. {
  1354. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1355. struct be_adapter *adapter =
  1356. container_of(tx_eq, struct be_adapter, tx_eq);
  1357. struct be_queue_info *txq = &adapter->tx_obj.q;
  1358. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1359. struct be_eth_tx_compl *txcp;
  1360. int tx_compl = 0, mcc_compl, status = 0;
  1361. u16 end_idx;
  1362. while ((txcp = be_tx_compl_get(tx_cq))) {
  1363. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1364. wrb_index, txcp);
  1365. be_tx_compl_process(adapter, end_idx);
  1366. tx_compl++;
  1367. }
  1368. mcc_compl = be_process_mcc(adapter, &status);
  1369. napi_complete(napi);
  1370. if (mcc_compl) {
  1371. struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
  1372. be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
  1373. }
  1374. if (tx_compl) {
  1375. be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
  1376. /* As Tx wrbs have been freed up, wake up netdev queue if
  1377. * it was stopped due to lack of tx wrbs.
  1378. */
  1379. if (netif_queue_stopped(adapter->netdev) &&
  1380. atomic_read(&txq->used) < txq->len / 2) {
  1381. netif_wake_queue(adapter->netdev);
  1382. }
  1383. drvr_stats(adapter)->be_tx_events++;
  1384. drvr_stats(adapter)->be_tx_compl += tx_compl;
  1385. }
  1386. return 1;
  1387. }
  1388. static void be_worker(struct work_struct *work)
  1389. {
  1390. struct be_adapter *adapter =
  1391. container_of(work, struct be_adapter, work.work);
  1392. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1393. /* Set EQ delay */
  1394. be_rx_eqd_update(adapter);
  1395. be_tx_rate_update(adapter);
  1396. be_rx_rate_update(adapter);
  1397. if (adapter->rx_post_starved) {
  1398. adapter->rx_post_starved = false;
  1399. be_post_rx_frags(adapter);
  1400. }
  1401. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1402. }
  1403. static void be_msix_disable(struct be_adapter *adapter)
  1404. {
  1405. if (adapter->msix_enabled) {
  1406. pci_disable_msix(adapter->pdev);
  1407. adapter->msix_enabled = false;
  1408. }
  1409. }
  1410. static void be_msix_enable(struct be_adapter *adapter)
  1411. {
  1412. int i, status;
  1413. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1414. adapter->msix_entries[i].entry = i;
  1415. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1416. BE_NUM_MSIX_VECTORS);
  1417. if (status == 0)
  1418. adapter->msix_enabled = true;
  1419. }
  1420. static void be_sriov_enable(struct be_adapter *adapter)
  1421. {
  1422. be_check_sriov_fn_type(adapter);
  1423. #ifdef CONFIG_PCI_IOV
  1424. if (be_physfn(adapter) && num_vfs) {
  1425. int status;
  1426. status = pci_enable_sriov(adapter->pdev, num_vfs);
  1427. adapter->sriov_enabled = status ? false : true;
  1428. }
  1429. #endif
  1430. }
  1431. static void be_sriov_disable(struct be_adapter *adapter)
  1432. {
  1433. #ifdef CONFIG_PCI_IOV
  1434. if (adapter->sriov_enabled) {
  1435. pci_disable_sriov(adapter->pdev);
  1436. adapter->sriov_enabled = false;
  1437. }
  1438. #endif
  1439. }
  1440. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1441. {
  1442. return adapter->msix_entries[
  1443. be_evt_bit_get(adapter, eq_id)].vector;
  1444. }
  1445. static int be_request_irq(struct be_adapter *adapter,
  1446. struct be_eq_obj *eq_obj,
  1447. void *handler, char *desc)
  1448. {
  1449. struct net_device *netdev = adapter->netdev;
  1450. int vec;
  1451. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1452. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1453. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1454. }
  1455. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1456. {
  1457. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1458. free_irq(vec, adapter);
  1459. }
  1460. static int be_msix_register(struct be_adapter *adapter)
  1461. {
  1462. int status;
  1463. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1464. if (status)
  1465. goto err;
  1466. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1467. if (status)
  1468. goto free_tx_irq;
  1469. return 0;
  1470. free_tx_irq:
  1471. be_free_irq(adapter, &adapter->tx_eq);
  1472. err:
  1473. dev_warn(&adapter->pdev->dev,
  1474. "MSIX Request IRQ failed - err %d\n", status);
  1475. pci_disable_msix(adapter->pdev);
  1476. adapter->msix_enabled = false;
  1477. return status;
  1478. }
  1479. static int be_irq_register(struct be_adapter *adapter)
  1480. {
  1481. struct net_device *netdev = adapter->netdev;
  1482. int status;
  1483. if (adapter->msix_enabled) {
  1484. status = be_msix_register(adapter);
  1485. if (status == 0)
  1486. goto done;
  1487. /* INTx is not supported for VF */
  1488. if (!be_physfn(adapter))
  1489. return status;
  1490. }
  1491. /* INTx */
  1492. netdev->irq = adapter->pdev->irq;
  1493. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1494. adapter);
  1495. if (status) {
  1496. dev_err(&adapter->pdev->dev,
  1497. "INTx request IRQ failed - err %d\n", status);
  1498. return status;
  1499. }
  1500. done:
  1501. adapter->isr_registered = true;
  1502. return 0;
  1503. }
  1504. static void be_irq_unregister(struct be_adapter *adapter)
  1505. {
  1506. struct net_device *netdev = adapter->netdev;
  1507. if (!adapter->isr_registered)
  1508. return;
  1509. /* INTx */
  1510. if (!adapter->msix_enabled) {
  1511. free_irq(netdev->irq, adapter);
  1512. goto done;
  1513. }
  1514. /* MSIx */
  1515. be_free_irq(adapter, &adapter->tx_eq);
  1516. be_free_irq(adapter, &adapter->rx_eq);
  1517. done:
  1518. adapter->isr_registered = false;
  1519. }
  1520. static int be_close(struct net_device *netdev)
  1521. {
  1522. struct be_adapter *adapter = netdev_priv(netdev);
  1523. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1524. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1525. int vec;
  1526. cancel_delayed_work_sync(&adapter->work);
  1527. be_async_mcc_disable(adapter);
  1528. netif_stop_queue(netdev);
  1529. netif_carrier_off(netdev);
  1530. adapter->link_up = false;
  1531. be_intr_set(adapter, false);
  1532. if (adapter->msix_enabled) {
  1533. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1534. synchronize_irq(vec);
  1535. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1536. synchronize_irq(vec);
  1537. } else {
  1538. synchronize_irq(netdev->irq);
  1539. }
  1540. be_irq_unregister(adapter);
  1541. napi_disable(&rx_eq->napi);
  1542. napi_disable(&tx_eq->napi);
  1543. /* Wait for all pending tx completions to arrive so that
  1544. * all tx skbs are freed.
  1545. */
  1546. be_tx_compl_clean(adapter);
  1547. return 0;
  1548. }
  1549. static int be_open(struct net_device *netdev)
  1550. {
  1551. struct be_adapter *adapter = netdev_priv(netdev);
  1552. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1553. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1554. bool link_up;
  1555. int status;
  1556. u8 mac_speed;
  1557. u16 link_speed;
  1558. /* First time posting */
  1559. be_post_rx_frags(adapter);
  1560. napi_enable(&rx_eq->napi);
  1561. napi_enable(&tx_eq->napi);
  1562. be_irq_register(adapter);
  1563. be_intr_set(adapter, true);
  1564. /* The evt queues are created in unarmed state; arm them */
  1565. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1566. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1567. /* Rx compl queue may be in unarmed state; rearm it */
  1568. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1569. /* Now that interrupts are on we can process async mcc */
  1570. be_async_mcc_enable(adapter);
  1571. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1572. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1573. &link_speed);
  1574. if (status)
  1575. goto err;
  1576. be_link_status_update(adapter, link_up);
  1577. if (be_physfn(adapter)) {
  1578. status = be_vid_config(adapter, false, 0);
  1579. if (status)
  1580. goto err;
  1581. status = be_cmd_set_flow_control(adapter,
  1582. adapter->tx_fc, adapter->rx_fc);
  1583. if (status)
  1584. goto err;
  1585. }
  1586. return 0;
  1587. err:
  1588. be_close(adapter->netdev);
  1589. return -EIO;
  1590. }
  1591. static int be_setup_wol(struct be_adapter *adapter, bool enable)
  1592. {
  1593. struct be_dma_mem cmd;
  1594. int status = 0;
  1595. u8 mac[ETH_ALEN];
  1596. memset(mac, 0, ETH_ALEN);
  1597. cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
  1598. cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
  1599. if (cmd.va == NULL)
  1600. return -1;
  1601. memset(cmd.va, 0, cmd.size);
  1602. if (enable) {
  1603. status = pci_write_config_dword(adapter->pdev,
  1604. PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
  1605. if (status) {
  1606. dev_err(&adapter->pdev->dev,
  1607. "Could not enable Wake-on-lan\n");
  1608. pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
  1609. cmd.dma);
  1610. return status;
  1611. }
  1612. status = be_cmd_enable_magic_wol(adapter,
  1613. adapter->netdev->dev_addr, &cmd);
  1614. pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
  1615. pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
  1616. } else {
  1617. status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
  1618. pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
  1619. pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
  1620. }
  1621. pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
  1622. return status;
  1623. }
  1624. static int be_setup(struct be_adapter *adapter)
  1625. {
  1626. struct net_device *netdev = adapter->netdev;
  1627. u32 cap_flags, en_flags, vf = 0;
  1628. int status;
  1629. u8 mac[ETH_ALEN];
  1630. cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
  1631. if (be_physfn(adapter)) {
  1632. cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1633. BE_IF_FLAGS_PROMISCUOUS |
  1634. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1635. en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1636. }
  1637. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1638. netdev->dev_addr, false/* pmac_invalid */,
  1639. &adapter->if_handle, &adapter->pmac_id, 0);
  1640. if (status != 0)
  1641. goto do_none;
  1642. if (be_physfn(adapter)) {
  1643. while (vf < num_vfs) {
  1644. cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
  1645. | BE_IF_FLAGS_BROADCAST;
  1646. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1647. mac, true,
  1648. &adapter->vf_cfg[vf].vf_if_handle,
  1649. NULL, vf+1);
  1650. if (status) {
  1651. dev_err(&adapter->pdev->dev,
  1652. "Interface Create failed for VF %d\n", vf);
  1653. goto if_destroy;
  1654. }
  1655. adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
  1656. vf++;
  1657. }
  1658. } else if (!be_physfn(adapter)) {
  1659. status = be_cmd_mac_addr_query(adapter, mac,
  1660. MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
  1661. if (!status) {
  1662. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  1663. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  1664. }
  1665. }
  1666. status = be_tx_queues_create(adapter);
  1667. if (status != 0)
  1668. goto if_destroy;
  1669. status = be_rx_queues_create(adapter);
  1670. if (status != 0)
  1671. goto tx_qs_destroy;
  1672. status = be_mcc_queues_create(adapter);
  1673. if (status != 0)
  1674. goto rx_qs_destroy;
  1675. adapter->link_speed = -1;
  1676. return 0;
  1677. rx_qs_destroy:
  1678. be_rx_queues_destroy(adapter);
  1679. tx_qs_destroy:
  1680. be_tx_queues_destroy(adapter);
  1681. if_destroy:
  1682. for (vf = 0; vf < num_vfs; vf++)
  1683. if (adapter->vf_cfg[vf].vf_if_handle)
  1684. be_cmd_if_destroy(adapter,
  1685. adapter->vf_cfg[vf].vf_if_handle);
  1686. be_cmd_if_destroy(adapter, adapter->if_handle);
  1687. do_none:
  1688. return status;
  1689. }
  1690. static int be_clear(struct be_adapter *adapter)
  1691. {
  1692. be_mcc_queues_destroy(adapter);
  1693. be_rx_queues_destroy(adapter);
  1694. be_tx_queues_destroy(adapter);
  1695. be_cmd_if_destroy(adapter, adapter->if_handle);
  1696. /* tell fw we're done with firing cmds */
  1697. be_cmd_fw_clean(adapter);
  1698. return 0;
  1699. }
  1700. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1701. char flash_cookie[2][16] = {"*** SE FLAS",
  1702. "H DIRECTORY *** "};
  1703. static bool be_flash_redboot(struct be_adapter *adapter,
  1704. const u8 *p, u32 img_start, int image_size,
  1705. int hdr_size)
  1706. {
  1707. u32 crc_offset;
  1708. u8 flashed_crc[4];
  1709. int status;
  1710. crc_offset = hdr_size + img_start + image_size - 4;
  1711. p += crc_offset;
  1712. status = be_cmd_get_flash_crc(adapter, flashed_crc,
  1713. (image_size - 4));
  1714. if (status) {
  1715. dev_err(&adapter->pdev->dev,
  1716. "could not get crc from flash, not flashing redboot\n");
  1717. return false;
  1718. }
  1719. /*update redboot only if crc does not match*/
  1720. if (!memcmp(flashed_crc, p, 4))
  1721. return false;
  1722. else
  1723. return true;
  1724. }
  1725. static int be_flash_data(struct be_adapter *adapter,
  1726. const struct firmware *fw,
  1727. struct be_dma_mem *flash_cmd, int num_of_images)
  1728. {
  1729. int status = 0, i, filehdr_size = 0;
  1730. u32 total_bytes = 0, flash_op;
  1731. int num_bytes;
  1732. const u8 *p = fw->data;
  1733. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1734. struct flash_comp *pflashcomp;
  1735. int num_comp;
  1736. struct flash_comp gen3_flash_types[9] = {
  1737. { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
  1738. FLASH_IMAGE_MAX_SIZE_g3},
  1739. { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
  1740. FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
  1741. { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
  1742. FLASH_BIOS_IMAGE_MAX_SIZE_g3},
  1743. { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
  1744. FLASH_BIOS_IMAGE_MAX_SIZE_g3},
  1745. { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
  1746. FLASH_BIOS_IMAGE_MAX_SIZE_g3},
  1747. { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
  1748. FLASH_IMAGE_MAX_SIZE_g3},
  1749. { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
  1750. FLASH_IMAGE_MAX_SIZE_g3},
  1751. { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
  1752. FLASH_IMAGE_MAX_SIZE_g3},
  1753. { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
  1754. FLASH_NCSI_IMAGE_MAX_SIZE_g3}
  1755. };
  1756. struct flash_comp gen2_flash_types[8] = {
  1757. { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
  1758. FLASH_IMAGE_MAX_SIZE_g2},
  1759. { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
  1760. FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
  1761. { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
  1762. FLASH_BIOS_IMAGE_MAX_SIZE_g2},
  1763. { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
  1764. FLASH_BIOS_IMAGE_MAX_SIZE_g2},
  1765. { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
  1766. FLASH_BIOS_IMAGE_MAX_SIZE_g2},
  1767. { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
  1768. FLASH_IMAGE_MAX_SIZE_g2},
  1769. { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
  1770. FLASH_IMAGE_MAX_SIZE_g2},
  1771. { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
  1772. FLASH_IMAGE_MAX_SIZE_g2}
  1773. };
  1774. if (adapter->generation == BE_GEN3) {
  1775. pflashcomp = gen3_flash_types;
  1776. filehdr_size = sizeof(struct flash_file_hdr_g3);
  1777. num_comp = 9;
  1778. } else {
  1779. pflashcomp = gen2_flash_types;
  1780. filehdr_size = sizeof(struct flash_file_hdr_g2);
  1781. num_comp = 8;
  1782. }
  1783. for (i = 0; i < num_comp; i++) {
  1784. if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
  1785. memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
  1786. continue;
  1787. if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
  1788. (!be_flash_redboot(adapter, fw->data,
  1789. pflashcomp[i].offset, pflashcomp[i].size,
  1790. filehdr_size)))
  1791. continue;
  1792. p = fw->data;
  1793. p += filehdr_size + pflashcomp[i].offset
  1794. + (num_of_images * sizeof(struct image_hdr));
  1795. if (p + pflashcomp[i].size > fw->data + fw->size)
  1796. return -1;
  1797. total_bytes = pflashcomp[i].size;
  1798. while (total_bytes) {
  1799. if (total_bytes > 32*1024)
  1800. num_bytes = 32*1024;
  1801. else
  1802. num_bytes = total_bytes;
  1803. total_bytes -= num_bytes;
  1804. if (!total_bytes)
  1805. flash_op = FLASHROM_OPER_FLASH;
  1806. else
  1807. flash_op = FLASHROM_OPER_SAVE;
  1808. memcpy(req->params.data_buf, p, num_bytes);
  1809. p += num_bytes;
  1810. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1811. pflashcomp[i].optype, flash_op, num_bytes);
  1812. if (status) {
  1813. dev_err(&adapter->pdev->dev,
  1814. "cmd to write to flash rom failed.\n");
  1815. return -1;
  1816. }
  1817. yield();
  1818. }
  1819. }
  1820. return 0;
  1821. }
  1822. static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
  1823. {
  1824. if (fhdr == NULL)
  1825. return 0;
  1826. if (fhdr->build[0] == '3')
  1827. return BE_GEN3;
  1828. else if (fhdr->build[0] == '2')
  1829. return BE_GEN2;
  1830. else
  1831. return 0;
  1832. }
  1833. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1834. {
  1835. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1836. const struct firmware *fw;
  1837. struct flash_file_hdr_g2 *fhdr;
  1838. struct flash_file_hdr_g3 *fhdr3;
  1839. struct image_hdr *img_hdr_ptr = NULL;
  1840. struct be_dma_mem flash_cmd;
  1841. int status, i = 0, num_imgs = 0;
  1842. const u8 *p;
  1843. strcpy(fw_file, func);
  1844. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1845. if (status)
  1846. goto fw_exit;
  1847. p = fw->data;
  1848. fhdr = (struct flash_file_hdr_g2 *) p;
  1849. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1850. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1851. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1852. &flash_cmd.dma);
  1853. if (!flash_cmd.va) {
  1854. status = -ENOMEM;
  1855. dev_err(&adapter->pdev->dev,
  1856. "Memory allocation failure while flashing\n");
  1857. goto fw_exit;
  1858. }
  1859. if ((adapter->generation == BE_GEN3) &&
  1860. (get_ufigen_type(fhdr) == BE_GEN3)) {
  1861. fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
  1862. num_imgs = le32_to_cpu(fhdr3->num_imgs);
  1863. for (i = 0; i < num_imgs; i++) {
  1864. img_hdr_ptr = (struct image_hdr *) (fw->data +
  1865. (sizeof(struct flash_file_hdr_g3) +
  1866. i * sizeof(struct image_hdr)));
  1867. if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
  1868. status = be_flash_data(adapter, fw, &flash_cmd,
  1869. num_imgs);
  1870. }
  1871. } else if ((adapter->generation == BE_GEN2) &&
  1872. (get_ufigen_type(fhdr) == BE_GEN2)) {
  1873. status = be_flash_data(adapter, fw, &flash_cmd, 0);
  1874. } else {
  1875. dev_err(&adapter->pdev->dev,
  1876. "UFI and Interface are not compatible for flashing\n");
  1877. status = -1;
  1878. }
  1879. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1880. flash_cmd.dma);
  1881. if (status) {
  1882. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1883. goto fw_exit;
  1884. }
  1885. dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
  1886. fw_exit:
  1887. release_firmware(fw);
  1888. return status;
  1889. }
  1890. static struct net_device_ops be_netdev_ops = {
  1891. .ndo_open = be_open,
  1892. .ndo_stop = be_close,
  1893. .ndo_start_xmit = be_xmit,
  1894. .ndo_get_stats = be_get_stats,
  1895. .ndo_set_rx_mode = be_set_multicast_list,
  1896. .ndo_set_mac_address = be_mac_addr_set,
  1897. .ndo_change_mtu = be_change_mtu,
  1898. .ndo_validate_addr = eth_validate_addr,
  1899. .ndo_vlan_rx_register = be_vlan_register,
  1900. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1901. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1902. .ndo_set_vf_mac = be_set_vf_mac,
  1903. .ndo_set_vf_vlan = be_set_vf_vlan,
  1904. .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
  1905. .ndo_get_vf_config = be_get_vf_config
  1906. };
  1907. static void be_netdev_init(struct net_device *netdev)
  1908. {
  1909. struct be_adapter *adapter = netdev_priv(netdev);
  1910. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1911. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1912. NETIF_F_GRO | NETIF_F_TSO6;
  1913. netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  1914. netdev->flags |= IFF_MULTICAST;
  1915. adapter->rx_csum = true;
  1916. /* Default settings for Rx and Tx flow control */
  1917. adapter->rx_fc = true;
  1918. adapter->tx_fc = true;
  1919. netif_set_gso_max_size(netdev, 65535);
  1920. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1921. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1922. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1923. BE_NAPI_WEIGHT);
  1924. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1925. BE_NAPI_WEIGHT);
  1926. netif_carrier_off(netdev);
  1927. netif_stop_queue(netdev);
  1928. }
  1929. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1930. {
  1931. if (adapter->csr)
  1932. iounmap(adapter->csr);
  1933. if (adapter->db)
  1934. iounmap(adapter->db);
  1935. if (adapter->pcicfg && be_physfn(adapter))
  1936. iounmap(adapter->pcicfg);
  1937. }
  1938. static int be_map_pci_bars(struct be_adapter *adapter)
  1939. {
  1940. u8 __iomem *addr;
  1941. int pcicfg_reg, db_reg;
  1942. if (be_physfn(adapter)) {
  1943. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1944. pci_resource_len(adapter->pdev, 2));
  1945. if (addr == NULL)
  1946. return -ENOMEM;
  1947. adapter->csr = addr;
  1948. }
  1949. if (adapter->generation == BE_GEN2) {
  1950. pcicfg_reg = 1;
  1951. db_reg = 4;
  1952. } else {
  1953. pcicfg_reg = 0;
  1954. if (be_physfn(adapter))
  1955. db_reg = 4;
  1956. else
  1957. db_reg = 0;
  1958. }
  1959. addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
  1960. pci_resource_len(adapter->pdev, db_reg));
  1961. if (addr == NULL)
  1962. goto pci_map_err;
  1963. adapter->db = addr;
  1964. if (be_physfn(adapter)) {
  1965. addr = ioremap_nocache(
  1966. pci_resource_start(adapter->pdev, pcicfg_reg),
  1967. pci_resource_len(adapter->pdev, pcicfg_reg));
  1968. if (addr == NULL)
  1969. goto pci_map_err;
  1970. adapter->pcicfg = addr;
  1971. } else
  1972. adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
  1973. return 0;
  1974. pci_map_err:
  1975. be_unmap_pci_bars(adapter);
  1976. return -ENOMEM;
  1977. }
  1978. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1979. {
  1980. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1981. be_unmap_pci_bars(adapter);
  1982. if (mem->va)
  1983. pci_free_consistent(adapter->pdev, mem->size,
  1984. mem->va, mem->dma);
  1985. mem = &adapter->mc_cmd_mem;
  1986. if (mem->va)
  1987. pci_free_consistent(adapter->pdev, mem->size,
  1988. mem->va, mem->dma);
  1989. }
  1990. static int be_ctrl_init(struct be_adapter *adapter)
  1991. {
  1992. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1993. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1994. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1995. int status;
  1996. status = be_map_pci_bars(adapter);
  1997. if (status)
  1998. goto done;
  1999. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  2000. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  2001. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  2002. if (!mbox_mem_alloc->va) {
  2003. status = -ENOMEM;
  2004. goto unmap_pci_bars;
  2005. }
  2006. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  2007. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  2008. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  2009. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  2010. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  2011. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  2012. &mc_cmd_mem->dma);
  2013. if (mc_cmd_mem->va == NULL) {
  2014. status = -ENOMEM;
  2015. goto free_mbox;
  2016. }
  2017. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  2018. spin_lock_init(&adapter->mbox_lock);
  2019. spin_lock_init(&adapter->mcc_lock);
  2020. spin_lock_init(&adapter->mcc_cq_lock);
  2021. init_completion(&adapter->flash_compl);
  2022. pci_save_state(adapter->pdev);
  2023. return 0;
  2024. free_mbox:
  2025. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  2026. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  2027. unmap_pci_bars:
  2028. be_unmap_pci_bars(adapter);
  2029. done:
  2030. return status;
  2031. }
  2032. static void be_stats_cleanup(struct be_adapter *adapter)
  2033. {
  2034. struct be_stats_obj *stats = &adapter->stats;
  2035. struct be_dma_mem *cmd = &stats->cmd;
  2036. if (cmd->va)
  2037. pci_free_consistent(adapter->pdev, cmd->size,
  2038. cmd->va, cmd->dma);
  2039. }
  2040. static int be_stats_init(struct be_adapter *adapter)
  2041. {
  2042. struct be_stats_obj *stats = &adapter->stats;
  2043. struct be_dma_mem *cmd = &stats->cmd;
  2044. cmd->size = sizeof(struct be_cmd_req_get_stats);
  2045. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  2046. if (cmd->va == NULL)
  2047. return -1;
  2048. memset(cmd->va, 0, cmd->size);
  2049. return 0;
  2050. }
  2051. static void __devexit be_remove(struct pci_dev *pdev)
  2052. {
  2053. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2054. if (!adapter)
  2055. return;
  2056. unregister_netdev(adapter->netdev);
  2057. be_clear(adapter);
  2058. be_stats_cleanup(adapter);
  2059. be_ctrl_cleanup(adapter);
  2060. be_sriov_disable(adapter);
  2061. be_msix_disable(adapter);
  2062. pci_set_drvdata(pdev, NULL);
  2063. pci_release_regions(pdev);
  2064. pci_disable_device(pdev);
  2065. free_netdev(adapter->netdev);
  2066. }
  2067. static int be_get_config(struct be_adapter *adapter)
  2068. {
  2069. int status;
  2070. u8 mac[ETH_ALEN];
  2071. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  2072. if (status)
  2073. return status;
  2074. status = be_cmd_query_fw_cfg(adapter,
  2075. &adapter->port_num, &adapter->function_mode);
  2076. if (status)
  2077. return status;
  2078. memset(mac, 0, ETH_ALEN);
  2079. if (be_physfn(adapter)) {
  2080. status = be_cmd_mac_addr_query(adapter, mac,
  2081. MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
  2082. if (status)
  2083. return status;
  2084. if (!is_valid_ether_addr(mac))
  2085. return -EADDRNOTAVAIL;
  2086. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  2087. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  2088. }
  2089. if (adapter->function_mode & 0x400)
  2090. adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
  2091. else
  2092. adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
  2093. return 0;
  2094. }
  2095. static int __devinit be_probe(struct pci_dev *pdev,
  2096. const struct pci_device_id *pdev_id)
  2097. {
  2098. int status = 0;
  2099. struct be_adapter *adapter;
  2100. struct net_device *netdev;
  2101. status = pci_enable_device(pdev);
  2102. if (status)
  2103. goto do_none;
  2104. status = pci_request_regions(pdev, DRV_NAME);
  2105. if (status)
  2106. goto disable_dev;
  2107. pci_set_master(pdev);
  2108. netdev = alloc_etherdev(sizeof(struct be_adapter));
  2109. if (netdev == NULL) {
  2110. status = -ENOMEM;
  2111. goto rel_reg;
  2112. }
  2113. adapter = netdev_priv(netdev);
  2114. switch (pdev->device) {
  2115. case BE_DEVICE_ID1:
  2116. case OC_DEVICE_ID1:
  2117. adapter->generation = BE_GEN2;
  2118. break;
  2119. case BE_DEVICE_ID2:
  2120. case OC_DEVICE_ID2:
  2121. adapter->generation = BE_GEN3;
  2122. break;
  2123. default:
  2124. adapter->generation = 0;
  2125. }
  2126. adapter->pdev = pdev;
  2127. pci_set_drvdata(pdev, adapter);
  2128. adapter->netdev = netdev;
  2129. be_netdev_init(netdev);
  2130. SET_NETDEV_DEV(netdev, &pdev->dev);
  2131. be_msix_enable(adapter);
  2132. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  2133. if (!status) {
  2134. netdev->features |= NETIF_F_HIGHDMA;
  2135. } else {
  2136. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  2137. if (status) {
  2138. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  2139. goto free_netdev;
  2140. }
  2141. }
  2142. be_sriov_enable(adapter);
  2143. status = be_ctrl_init(adapter);
  2144. if (status)
  2145. goto free_netdev;
  2146. /* sync up with fw's ready state */
  2147. if (be_physfn(adapter)) {
  2148. status = be_cmd_POST(adapter);
  2149. if (status)
  2150. goto ctrl_clean;
  2151. }
  2152. /* tell fw we're ready to fire cmds */
  2153. status = be_cmd_fw_init(adapter);
  2154. if (status)
  2155. goto ctrl_clean;
  2156. if (be_physfn(adapter)) {
  2157. status = be_cmd_reset_function(adapter);
  2158. if (status)
  2159. goto ctrl_clean;
  2160. }
  2161. status = be_stats_init(adapter);
  2162. if (status)
  2163. goto ctrl_clean;
  2164. status = be_get_config(adapter);
  2165. if (status)
  2166. goto stats_clean;
  2167. INIT_DELAYED_WORK(&adapter->work, be_worker);
  2168. status = be_setup(adapter);
  2169. if (status)
  2170. goto stats_clean;
  2171. status = register_netdev(netdev);
  2172. if (status != 0)
  2173. goto unsetup;
  2174. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  2175. return 0;
  2176. unsetup:
  2177. be_clear(adapter);
  2178. stats_clean:
  2179. be_stats_cleanup(adapter);
  2180. ctrl_clean:
  2181. be_ctrl_cleanup(adapter);
  2182. free_netdev:
  2183. be_msix_disable(adapter);
  2184. be_sriov_disable(adapter);
  2185. free_netdev(adapter->netdev);
  2186. pci_set_drvdata(pdev, NULL);
  2187. rel_reg:
  2188. pci_release_regions(pdev);
  2189. disable_dev:
  2190. pci_disable_device(pdev);
  2191. do_none:
  2192. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  2193. return status;
  2194. }
  2195. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  2196. {
  2197. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2198. struct net_device *netdev = adapter->netdev;
  2199. if (adapter->wol)
  2200. be_setup_wol(adapter, true);
  2201. netif_device_detach(netdev);
  2202. if (netif_running(netdev)) {
  2203. rtnl_lock();
  2204. be_close(netdev);
  2205. rtnl_unlock();
  2206. }
  2207. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  2208. be_clear(adapter);
  2209. pci_save_state(pdev);
  2210. pci_disable_device(pdev);
  2211. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2212. return 0;
  2213. }
  2214. static int be_resume(struct pci_dev *pdev)
  2215. {
  2216. int status = 0;
  2217. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2218. struct net_device *netdev = adapter->netdev;
  2219. netif_device_detach(netdev);
  2220. status = pci_enable_device(pdev);
  2221. if (status)
  2222. return status;
  2223. pci_set_power_state(pdev, 0);
  2224. pci_restore_state(pdev);
  2225. /* tell fw we're ready to fire cmds */
  2226. status = be_cmd_fw_init(adapter);
  2227. if (status)
  2228. return status;
  2229. be_setup(adapter);
  2230. if (netif_running(netdev)) {
  2231. rtnl_lock();
  2232. be_open(netdev);
  2233. rtnl_unlock();
  2234. }
  2235. netif_device_attach(netdev);
  2236. if (adapter->wol)
  2237. be_setup_wol(adapter, false);
  2238. return 0;
  2239. }
  2240. /*
  2241. * An FLR will stop BE from DMAing any data.
  2242. */
  2243. static void be_shutdown(struct pci_dev *pdev)
  2244. {
  2245. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2246. struct net_device *netdev = adapter->netdev;
  2247. netif_device_detach(netdev);
  2248. be_cmd_reset_function(adapter);
  2249. if (adapter->wol)
  2250. be_setup_wol(adapter, true);
  2251. pci_disable_device(pdev);
  2252. }
  2253. static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
  2254. pci_channel_state_t state)
  2255. {
  2256. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2257. struct net_device *netdev = adapter->netdev;
  2258. dev_err(&adapter->pdev->dev, "EEH error detected\n");
  2259. adapter->eeh_err = true;
  2260. netif_device_detach(netdev);
  2261. if (netif_running(netdev)) {
  2262. rtnl_lock();
  2263. be_close(netdev);
  2264. rtnl_unlock();
  2265. }
  2266. be_clear(adapter);
  2267. if (state == pci_channel_io_perm_failure)
  2268. return PCI_ERS_RESULT_DISCONNECT;
  2269. pci_disable_device(pdev);
  2270. return PCI_ERS_RESULT_NEED_RESET;
  2271. }
  2272. static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
  2273. {
  2274. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2275. int status;
  2276. dev_info(&adapter->pdev->dev, "EEH reset\n");
  2277. adapter->eeh_err = false;
  2278. status = pci_enable_device(pdev);
  2279. if (status)
  2280. return PCI_ERS_RESULT_DISCONNECT;
  2281. pci_set_master(pdev);
  2282. pci_set_power_state(pdev, 0);
  2283. pci_restore_state(pdev);
  2284. /* Check if card is ok and fw is ready */
  2285. status = be_cmd_POST(adapter);
  2286. if (status)
  2287. return PCI_ERS_RESULT_DISCONNECT;
  2288. return PCI_ERS_RESULT_RECOVERED;
  2289. }
  2290. static void be_eeh_resume(struct pci_dev *pdev)
  2291. {
  2292. int status = 0;
  2293. struct be_adapter *adapter = pci_get_drvdata(pdev);
  2294. struct net_device *netdev = adapter->netdev;
  2295. dev_info(&adapter->pdev->dev, "EEH resume\n");
  2296. pci_save_state(pdev);
  2297. /* tell fw we're ready to fire cmds */
  2298. status = be_cmd_fw_init(adapter);
  2299. if (status)
  2300. goto err;
  2301. status = be_setup(adapter);
  2302. if (status)
  2303. goto err;
  2304. if (netif_running(netdev)) {
  2305. status = be_open(netdev);
  2306. if (status)
  2307. goto err;
  2308. }
  2309. netif_device_attach(netdev);
  2310. return;
  2311. err:
  2312. dev_err(&adapter->pdev->dev, "EEH resume failed\n");
  2313. }
  2314. static struct pci_error_handlers be_eeh_handlers = {
  2315. .error_detected = be_eeh_err_detected,
  2316. .slot_reset = be_eeh_reset,
  2317. .resume = be_eeh_resume,
  2318. };
  2319. static struct pci_driver be_driver = {
  2320. .name = DRV_NAME,
  2321. .id_table = be_dev_ids,
  2322. .probe = be_probe,
  2323. .remove = be_remove,
  2324. .suspend = be_suspend,
  2325. .resume = be_resume,
  2326. .shutdown = be_shutdown,
  2327. .err_handler = &be_eeh_handlers
  2328. };
  2329. static int __init be_init_module(void)
  2330. {
  2331. if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
  2332. rx_frag_size != 2048) {
  2333. printk(KERN_WARNING DRV_NAME
  2334. " : Module param rx_frag_size must be 2048/4096/8192."
  2335. " Using 2048\n");
  2336. rx_frag_size = 2048;
  2337. }
  2338. if (num_vfs > 32) {
  2339. printk(KERN_WARNING DRV_NAME
  2340. " : Module param num_vfs must not be greater than 32."
  2341. "Using 32\n");
  2342. num_vfs = 32;
  2343. }
  2344. return pci_register_driver(&be_driver);
  2345. }
  2346. module_init(be_init_module);
  2347. static void __exit be_exit_module(void)
  2348. {
  2349. pci_unregister_driver(&be_driver);
  2350. }
  2351. module_exit(be_exit_module);