mach-mxs.c 11 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. * Copyright 2012 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clkdev.h>
  14. #include <linux/can/platform/flexcan.h>
  15. #include <linux/delay.h>
  16. #include <linux/err.h>
  17. #include <linux/gpio.h>
  18. #include <linux/init.h>
  19. #include <linux/irqdomain.h>
  20. #include <linux/micrel_phy.h>
  21. #include <linux/mxsfb.h>
  22. #include <linux/of_irq.h>
  23. #include <linux/of_platform.h>
  24. #include <linux/phy.h>
  25. #include <linux/pinctrl/consumer.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/time.h>
  28. #include <mach/common.h>
  29. #include <mach/digctl.h>
  30. #include <mach/mxs.h>
  31. static struct fb_videomode mx23evk_video_modes[] = {
  32. {
  33. .name = "Samsung-LMS430HF02",
  34. .refresh = 60,
  35. .xres = 480,
  36. .yres = 272,
  37. .pixclock = 108096, /* picosecond (9.2 MHz) */
  38. .left_margin = 15,
  39. .right_margin = 8,
  40. .upper_margin = 12,
  41. .lower_margin = 4,
  42. .hsync_len = 1,
  43. .vsync_len = 1,
  44. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  45. FB_SYNC_DOTCLK_FAILING_ACT,
  46. },
  47. };
  48. static struct fb_videomode mx28evk_video_modes[] = {
  49. {
  50. .name = "Seiko-43WVF1G",
  51. .refresh = 60,
  52. .xres = 800,
  53. .yres = 480,
  54. .pixclock = 29851, /* picosecond (33.5 MHz) */
  55. .left_margin = 89,
  56. .right_margin = 164,
  57. .upper_margin = 23,
  58. .lower_margin = 10,
  59. .hsync_len = 10,
  60. .vsync_len = 10,
  61. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
  62. FB_SYNC_DOTCLK_FAILING_ACT,
  63. },
  64. };
  65. static struct fb_videomode m28evk_video_modes[] = {
  66. {
  67. .name = "Ampire AM-800480R2TMQW-T01H",
  68. .refresh = 60,
  69. .xres = 800,
  70. .yres = 480,
  71. .pixclock = 30066, /* picosecond (33.26 MHz) */
  72. .left_margin = 0,
  73. .right_margin = 256,
  74. .upper_margin = 0,
  75. .lower_margin = 45,
  76. .hsync_len = 1,
  77. .vsync_len = 1,
  78. .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
  79. },
  80. };
  81. static struct fb_videomode apx4devkit_video_modes[] = {
  82. {
  83. .name = "HannStar PJ70112A",
  84. .refresh = 60,
  85. .xres = 800,
  86. .yres = 480,
  87. .pixclock = 33333, /* picosecond (30.00 MHz) */
  88. .left_margin = 88,
  89. .right_margin = 40,
  90. .upper_margin = 32,
  91. .lower_margin = 13,
  92. .hsync_len = 48,
  93. .vsync_len = 3,
  94. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
  95. FB_SYNC_DATA_ENABLE_HIGH_ACT |
  96. FB_SYNC_DOTCLK_FAILING_ACT,
  97. },
  98. };
  99. static struct mxsfb_platform_data mxsfb_pdata __initdata;
  100. /*
  101. * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
  102. */
  103. #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
  104. static int flexcan0_en, flexcan1_en;
  105. static void mx28evk_flexcan_switch(void)
  106. {
  107. if (flexcan0_en || flexcan1_en)
  108. gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
  109. else
  110. gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
  111. }
  112. static void mx28evk_flexcan0_switch(int enable)
  113. {
  114. flexcan0_en = enable;
  115. mx28evk_flexcan_switch();
  116. }
  117. static void mx28evk_flexcan1_switch(int enable)
  118. {
  119. flexcan1_en = enable;
  120. mx28evk_flexcan_switch();
  121. }
  122. static struct flexcan_platform_data flexcan_pdata[2];
  123. static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
  124. OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  125. OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
  126. OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
  127. OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
  128. { /* sentinel */ }
  129. };
  130. static int __init mxs_icoll_add_irq_domain(struct device_node *np,
  131. struct device_node *interrupt_parent)
  132. {
  133. irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
  134. return 0;
  135. }
  136. static int __init mxs_gpio_add_irq_domain(struct device_node *np,
  137. struct device_node *interrupt_parent)
  138. {
  139. static int gpio_irq_base = MXS_GPIO_IRQ_START;
  140. irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
  141. gpio_irq_base += 32;
  142. return 0;
  143. }
  144. static const struct of_device_id mxs_irq_match[] __initconst = {
  145. { .compatible = "fsl,mxs-icoll", .data = mxs_icoll_add_irq_domain, },
  146. { .compatible = "fsl,mxs-gpio", .data = mxs_gpio_add_irq_domain, },
  147. { /* sentinel */ }
  148. };
  149. static void __init mxs_dt_init_irq(void)
  150. {
  151. icoll_init_irq();
  152. of_irq_init(mxs_irq_match);
  153. }
  154. static void __init imx23_timer_init(void)
  155. {
  156. mx23_clocks_init();
  157. }
  158. static struct sys_timer imx23_timer = {
  159. .init = imx23_timer_init,
  160. };
  161. static void __init imx28_timer_init(void)
  162. {
  163. mx28_clocks_init();
  164. }
  165. static struct sys_timer imx28_timer = {
  166. .init = imx28_timer_init,
  167. };
  168. enum mac_oui {
  169. OUI_FSL,
  170. OUI_DENX,
  171. };
  172. static void __init update_fec_mac_prop(enum mac_oui oui)
  173. {
  174. struct device_node *np, *from = NULL;
  175. struct property *newmac;
  176. const u32 *ocotp = mxs_get_ocotp();
  177. u8 *macaddr;
  178. u32 val;
  179. int i;
  180. for (i = 0; i < 2; i++) {
  181. np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
  182. if (!np)
  183. return;
  184. from = np;
  185. newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
  186. if (!newmac)
  187. return;
  188. newmac->value = newmac + 1;
  189. newmac->length = 6;
  190. newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
  191. if (!newmac->name) {
  192. kfree(newmac);
  193. return;
  194. }
  195. /*
  196. * OCOTP only stores the last 4 octets for each mac address,
  197. * so hard-code OUI here.
  198. */
  199. macaddr = newmac->value;
  200. switch (oui) {
  201. case OUI_FSL:
  202. macaddr[0] = 0x00;
  203. macaddr[1] = 0x04;
  204. macaddr[2] = 0x9f;
  205. break;
  206. case OUI_DENX:
  207. macaddr[0] = 0xc0;
  208. macaddr[1] = 0xe5;
  209. macaddr[2] = 0x4e;
  210. break;
  211. }
  212. val = ocotp[i];
  213. macaddr[3] = (val >> 16) & 0xff;
  214. macaddr[4] = (val >> 8) & 0xff;
  215. macaddr[5] = (val >> 0) & 0xff;
  216. prom_update_property(np, newmac);
  217. }
  218. }
  219. static void __init imx23_evk_init(void)
  220. {
  221. mxsfb_pdata.mode_list = mx23evk_video_modes;
  222. mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
  223. mxsfb_pdata.default_bpp = 32;
  224. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  225. }
  226. static inline void enable_clk_enet_out(void)
  227. {
  228. struct clk *clk = clk_get_sys("enet_out", NULL);
  229. if (!IS_ERR(clk))
  230. clk_prepare_enable(clk);
  231. }
  232. static void __init imx28_evk_init(void)
  233. {
  234. enable_clk_enet_out();
  235. update_fec_mac_prop(OUI_FSL);
  236. mxsfb_pdata.mode_list = mx28evk_video_modes;
  237. mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
  238. mxsfb_pdata.default_bpp = 32;
  239. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  240. mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
  241. }
  242. static void __init imx28_evk_post_init(void)
  243. {
  244. if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
  245. "flexcan-switch")) {
  246. flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
  247. flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
  248. }
  249. }
  250. static void __init m28evk_init(void)
  251. {
  252. mxsfb_pdata.mode_list = m28evk_video_modes;
  253. mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
  254. mxsfb_pdata.default_bpp = 16;
  255. mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
  256. }
  257. static int apx4devkit_phy_fixup(struct phy_device *phy)
  258. {
  259. phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
  260. return 0;
  261. }
  262. static void __init apx4devkit_init(void)
  263. {
  264. enable_clk_enet_out();
  265. if (IS_BUILTIN(CONFIG_PHYLIB))
  266. phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
  267. apx4devkit_phy_fixup);
  268. mxsfb_pdata.mode_list = apx4devkit_video_modes;
  269. mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
  270. mxsfb_pdata.default_bpp = 32;
  271. mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
  272. }
  273. #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
  274. #define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
  275. #define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
  276. #define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
  277. #define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
  278. #define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
  279. #define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
  280. #define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
  281. #define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
  282. #define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
  283. #define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
  284. #define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
  285. static const struct gpio tx28_gpios[] __initconst = {
  286. { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
  287. { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
  288. { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
  289. { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
  290. { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
  291. { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
  292. { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
  293. { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
  294. { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
  295. { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
  296. { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
  297. { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
  298. };
  299. static void __init tx28_post_init(void)
  300. {
  301. struct device_node *np;
  302. struct platform_device *pdev;
  303. struct pinctrl *pctl;
  304. int ret;
  305. enable_clk_enet_out();
  306. np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
  307. pdev = of_find_device_by_node(np);
  308. if (!pdev) {
  309. pr_err("%s: failed to find fec device\n", __func__);
  310. return;
  311. }
  312. pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
  313. if (IS_ERR(pctl)) {
  314. pr_err("%s: failed to get pinctrl state\n", __func__);
  315. return;
  316. }
  317. ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
  318. if (ret) {
  319. pr_err("%s: failed to request gpios: %d\n", __func__, ret);
  320. return;
  321. }
  322. /* Power up fec phy */
  323. gpio_set_value(TX28_FEC_PHY_POWER, 1);
  324. msleep(26); /* 25ms according to data sheet */
  325. /* Mode strap pins */
  326. gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
  327. gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
  328. gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
  329. udelay(100); /* minimum assertion time for nRST */
  330. /* Deasserting FEC PHY RESET */
  331. gpio_set_value(TX28_FEC_PHY_RESET, 1);
  332. pinctrl_put(pctl);
  333. }
  334. static void __init mxs_machine_init(void)
  335. {
  336. if (of_machine_is_compatible("fsl,imx28-evk"))
  337. imx28_evk_init();
  338. else if (of_machine_is_compatible("fsl,imx23-evk"))
  339. imx23_evk_init();
  340. else if (of_machine_is_compatible("denx,m28evk"))
  341. m28evk_init();
  342. else if (of_machine_is_compatible("bluegiga,apx4devkit"))
  343. apx4devkit_init();
  344. of_platform_populate(NULL, of_default_bus_match_table,
  345. mxs_auxdata_lookup, NULL);
  346. if (of_machine_is_compatible("karo,tx28"))
  347. tx28_post_init();
  348. if (of_machine_is_compatible("fsl,imx28-evk"))
  349. imx28_evk_post_init();
  350. }
  351. static const char *imx23_dt_compat[] __initdata = {
  352. "fsl,imx23",
  353. NULL,
  354. };
  355. static const char *imx28_dt_compat[] __initdata = {
  356. "fsl,imx28",
  357. NULL,
  358. };
  359. DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
  360. .map_io = mx23_map_io,
  361. .init_irq = mxs_dt_init_irq,
  362. .timer = &imx23_timer,
  363. .init_machine = mxs_machine_init,
  364. .dt_compat = imx23_dt_compat,
  365. .restart = mxs_restart,
  366. MACHINE_END
  367. DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
  368. .map_io = mx28_map_io,
  369. .init_irq = mxs_dt_init_irq,
  370. .timer = &imx28_timer,
  371. .init_machine = mxs_machine_init,
  372. .dt_compat = imx28_dt_compat,
  373. .restart = mxs_restart,
  374. MACHINE_END