sh_mobile_lcdcfb.c 31 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <video/sh_mobile_lcdc.h>
  23. #include <asm/atomic.h>
  24. #include "sh_mobile_lcdcfb.h"
  25. #define SIDE_B_OFFSET 0x1000
  26. #define MIRROR_OFFSET 0x2000
  27. /* shared registers */
  28. #define _LDDCKR 0x410
  29. #define _LDDCKSTPR 0x414
  30. #define _LDINTR 0x468
  31. #define _LDSR 0x46c
  32. #define _LDCNT1R 0x470
  33. #define _LDCNT2R 0x474
  34. #define _LDRCNTR 0x478
  35. #define _LDDDSR 0x47c
  36. #define _LDDWD0R 0x800
  37. #define _LDDRDR 0x840
  38. #define _LDDWAR 0x900
  39. #define _LDDRAR 0x904
  40. /* shared registers and their order for context save/restore */
  41. static int lcdc_shared_regs[] = {
  42. _LDDCKR,
  43. _LDDCKSTPR,
  44. _LDINTR,
  45. _LDDDSR,
  46. _LDCNT1R,
  47. _LDCNT2R,
  48. };
  49. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  50. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  51. [LDDCKPAT1R] = 0x400,
  52. [LDDCKPAT2R] = 0x404,
  53. [LDMT1R] = 0x418,
  54. [LDMT2R] = 0x41c,
  55. [LDMT3R] = 0x420,
  56. [LDDFR] = 0x424,
  57. [LDSM1R] = 0x428,
  58. [LDSM2R] = 0x42c,
  59. [LDSA1R] = 0x430,
  60. [LDMLSR] = 0x438,
  61. [LDHCNR] = 0x448,
  62. [LDHSYNR] = 0x44c,
  63. [LDVLNR] = 0x450,
  64. [LDVSYNR] = 0x454,
  65. [LDPMR] = 0x460,
  66. [LDHAJR] = 0x4a0,
  67. };
  68. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  69. [LDDCKPAT1R] = 0x408,
  70. [LDDCKPAT2R] = 0x40c,
  71. [LDMT1R] = 0x600,
  72. [LDMT2R] = 0x604,
  73. [LDMT3R] = 0x608,
  74. [LDDFR] = 0x60c,
  75. [LDSM1R] = 0x610,
  76. [LDSM2R] = 0x614,
  77. [LDSA1R] = 0x618,
  78. [LDMLSR] = 0x620,
  79. [LDHCNR] = 0x624,
  80. [LDHSYNR] = 0x628,
  81. [LDVLNR] = 0x62c,
  82. [LDVSYNR] = 0x630,
  83. [LDPMR] = 0x63c,
  84. };
  85. #define START_LCDC 0x00000001
  86. #define LCDC_RESET 0x00000100
  87. #define DISPLAY_BEU 0x00000008
  88. #define LCDC_ENABLE 0x00000001
  89. #define LDINTR_FE 0x00000400
  90. #define LDINTR_VSE 0x00000200
  91. #define LDINTR_VEE 0x00000100
  92. #define LDINTR_FS 0x00000004
  93. #define LDINTR_VSS 0x00000002
  94. #define LDINTR_VES 0x00000001
  95. #define LDRCNTR_SRS 0x00020000
  96. #define LDRCNTR_SRC 0x00010000
  97. #define LDRCNTR_MRS 0x00000002
  98. #define LDRCNTR_MRC 0x00000001
  99. #define LDSR_MRS 0x00000100
  100. struct sh_mobile_lcdc_priv {
  101. void __iomem *base;
  102. int irq;
  103. atomic_t hw_usecnt;
  104. struct device *dev;
  105. struct clk *dot_clk;
  106. unsigned long lddckr;
  107. struct sh_mobile_lcdc_chan ch[2];
  108. struct notifier_block notifier;
  109. unsigned long saved_shared_regs[NR_SHARED_REGS];
  110. int started;
  111. };
  112. static bool banked(int reg_nr)
  113. {
  114. switch (reg_nr) {
  115. case LDMT1R:
  116. case LDMT2R:
  117. case LDMT3R:
  118. case LDDFR:
  119. case LDSM1R:
  120. case LDSA1R:
  121. case LDMLSR:
  122. case LDHCNR:
  123. case LDHSYNR:
  124. case LDVLNR:
  125. case LDVSYNR:
  126. return true;
  127. }
  128. return false;
  129. }
  130. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  131. int reg_nr, unsigned long data)
  132. {
  133. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  134. if (banked(reg_nr))
  135. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  136. SIDE_B_OFFSET);
  137. }
  138. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  139. int reg_nr, unsigned long data)
  140. {
  141. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  142. MIRROR_OFFSET);
  143. }
  144. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  145. int reg_nr)
  146. {
  147. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  148. }
  149. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  150. unsigned long reg_offs, unsigned long data)
  151. {
  152. iowrite32(data, priv->base + reg_offs);
  153. }
  154. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  155. unsigned long reg_offs)
  156. {
  157. return ioread32(priv->base + reg_offs);
  158. }
  159. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  160. unsigned long reg_offs,
  161. unsigned long mask, unsigned long until)
  162. {
  163. while ((lcdc_read(priv, reg_offs) & mask) != until)
  164. cpu_relax();
  165. }
  166. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  167. {
  168. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  169. }
  170. static void lcdc_sys_write_index(void *handle, unsigned long data)
  171. {
  172. struct sh_mobile_lcdc_chan *ch = handle;
  173. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
  174. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  175. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  176. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  177. }
  178. static void lcdc_sys_write_data(void *handle, unsigned long data)
  179. {
  180. struct sh_mobile_lcdc_chan *ch = handle;
  181. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
  182. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  183. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  184. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  185. }
  186. static unsigned long lcdc_sys_read_data(void *handle)
  187. {
  188. struct sh_mobile_lcdc_chan *ch = handle;
  189. lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
  190. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  191. lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  192. udelay(1);
  193. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  194. return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
  195. }
  196. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  197. lcdc_sys_write_index,
  198. lcdc_sys_write_data,
  199. lcdc_sys_read_data,
  200. };
  201. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  202. {
  203. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  204. pm_runtime_get_sync(priv->dev);
  205. if (priv->dot_clk)
  206. clk_enable(priv->dot_clk);
  207. }
  208. }
  209. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  210. {
  211. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  212. if (priv->dot_clk)
  213. clk_disable(priv->dot_clk);
  214. pm_runtime_put(priv->dev);
  215. }
  216. }
  217. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  218. struct list_head *pagelist)
  219. {
  220. struct sh_mobile_lcdc_chan *ch = info->par;
  221. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  222. struct page *page;
  223. int nr_pages = 0;
  224. sg_init_table(ch->sglist, nr_pages_max);
  225. list_for_each_entry(page, pagelist, lru)
  226. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  227. return nr_pages;
  228. }
  229. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  230. struct list_head *pagelist)
  231. {
  232. struct sh_mobile_lcdc_chan *ch = info->par;
  233. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  234. /* enable clocks before accessing hardware */
  235. sh_mobile_lcdc_clk_on(ch->lcdc);
  236. /*
  237. * It's possible to get here without anything on the pagelist via
  238. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  239. * invocation. In the former case, the acceleration routines are
  240. * stepped in to when using the framebuffer console causing the
  241. * workqueue to be scheduled without any dirty pages on the list.
  242. *
  243. * Despite this, a panel update is still needed given that the
  244. * acceleration routines have their own methods for writing in
  245. * that still need to be updated.
  246. *
  247. * The fsync() and empty pagelist case could be optimized for,
  248. * but we don't bother, as any application exhibiting such
  249. * behaviour is fundamentally broken anyways.
  250. */
  251. if (!list_empty(pagelist)) {
  252. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  253. /* trigger panel update */
  254. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  255. if (bcfg->start_transfer)
  256. bcfg->start_transfer(bcfg->board_data, ch,
  257. &sh_mobile_lcdc_sys_bus_ops);
  258. lcdc_write_chan(ch, LDSM2R, 1);
  259. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  260. } else {
  261. if (bcfg->start_transfer)
  262. bcfg->start_transfer(bcfg->board_data, ch,
  263. &sh_mobile_lcdc_sys_bus_ops);
  264. lcdc_write_chan(ch, LDSM2R, 1);
  265. }
  266. }
  267. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  268. {
  269. struct fb_deferred_io *fbdefio = info->fbdefio;
  270. if (fbdefio)
  271. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  272. }
  273. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  274. {
  275. struct sh_mobile_lcdc_priv *priv = data;
  276. struct sh_mobile_lcdc_chan *ch;
  277. unsigned long tmp;
  278. unsigned long ldintr;
  279. int is_sub;
  280. int k;
  281. /* acknowledge interrupt */
  282. ldintr = tmp = lcdc_read(priv, _LDINTR);
  283. /*
  284. * disable further VSYNC End IRQs, preserve all other enabled IRQs,
  285. * write 0 to bits 0-6 to ack all triggered IRQs.
  286. */
  287. tmp &= 0xffffff00 & ~LDINTR_VEE;
  288. lcdc_write(priv, _LDINTR, tmp);
  289. /* figure out if this interrupt is for main or sub lcd */
  290. is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
  291. /* wake up channel and disable clocks */
  292. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  293. ch = &priv->ch[k];
  294. if (!ch->enabled)
  295. continue;
  296. /* Frame Start */
  297. if (ldintr & LDINTR_FS) {
  298. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  299. ch->frame_end = 1;
  300. wake_up(&ch->frame_end_wait);
  301. sh_mobile_lcdc_clk_off(priv);
  302. }
  303. }
  304. /* VSYNC End */
  305. if (ldintr & LDINTR_VES)
  306. complete(&ch->vsync_completion);
  307. }
  308. return IRQ_HANDLED;
  309. }
  310. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  311. int start)
  312. {
  313. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  314. int k;
  315. /* start or stop the lcdc */
  316. if (start)
  317. lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
  318. else
  319. lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
  320. /* wait until power is applied/stopped on all channels */
  321. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  322. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  323. while (1) {
  324. tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
  325. if (start && tmp == 3)
  326. break;
  327. if (!start && tmp == 0)
  328. break;
  329. cpu_relax();
  330. }
  331. if (!start)
  332. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  333. }
  334. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  335. {
  336. struct fb_var_screeninfo *var = &ch->info->var;
  337. unsigned long h_total, hsync_pos;
  338. u32 tmp;
  339. tmp = ch->ldmt1r_value;
  340. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
  341. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
  342. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
  343. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
  344. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
  345. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
  346. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
  347. lcdc_write_chan(ch, LDMT1R, tmp);
  348. /* setup SYS bus */
  349. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  350. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  351. /* horizontal configuration */
  352. h_total = var->xres + var->hsync_len +
  353. var->left_margin + var->right_margin;
  354. tmp = h_total / 8; /* HTCN */
  355. tmp |= (var->xres / 8) << 16; /* HDCN */
  356. lcdc_write_chan(ch, LDHCNR, tmp);
  357. hsync_pos = var->xres + var->right_margin;
  358. tmp = hsync_pos / 8; /* HSYNP */
  359. tmp |= (var->hsync_len / 8) << 16; /* HSYNW */
  360. lcdc_write_chan(ch, LDHSYNR, tmp);
  361. /* vertical configuration */
  362. tmp = var->yres + var->vsync_len +
  363. var->upper_margin + var->lower_margin; /* VTLN */
  364. tmp |= var->yres << 16; /* VDLN */
  365. lcdc_write_chan(ch, LDVLNR, tmp);
  366. tmp = var->yres + var->lower_margin; /* VSYNP */
  367. tmp |= var->vsync_len << 16; /* VSYNW */
  368. lcdc_write_chan(ch, LDVSYNR, tmp);
  369. /* Adjust horizontal synchronisation for HDMI */
  370. tmp = ((var->xres & 7) << 24) |
  371. ((h_total & 7) << 16) |
  372. ((var->hsync_len & 7) << 8) |
  373. hsync_pos;
  374. lcdc_write_chan(ch, LDHAJR, tmp);
  375. }
  376. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  377. {
  378. struct sh_mobile_lcdc_chan *ch;
  379. struct sh_mobile_lcdc_board_cfg *board_cfg;
  380. unsigned long tmp;
  381. int k, m;
  382. int ret = 0;
  383. /* enable clocks before accessing the hardware */
  384. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  385. if (priv->ch[k].enabled)
  386. sh_mobile_lcdc_clk_on(priv);
  387. /* reset */
  388. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
  389. lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
  390. /* enable LCDC channels */
  391. tmp = lcdc_read(priv, _LDCNT2R);
  392. tmp |= priv->ch[0].enabled;
  393. tmp |= priv->ch[1].enabled;
  394. lcdc_write(priv, _LDCNT2R, tmp);
  395. /* read data from external memory, avoid using the BEU for now */
  396. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
  397. /* stop the lcdc first */
  398. sh_mobile_lcdc_start_stop(priv, 0);
  399. /* configure clocks */
  400. tmp = priv->lddckr;
  401. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  402. ch = &priv->ch[k];
  403. if (!priv->ch[k].enabled)
  404. continue;
  405. m = ch->cfg.clock_divider;
  406. if (!m)
  407. continue;
  408. if (m == 1)
  409. m = 1 << 6;
  410. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  411. lcdc_write_chan(ch, LDDCKPAT1R, 0x00000000);
  412. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  413. }
  414. lcdc_write(priv, _LDDCKR, tmp);
  415. /* start dotclock again */
  416. lcdc_write(priv, _LDDCKSTPR, 0);
  417. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  418. /* interrupts are disabled to begin with */
  419. lcdc_write(priv, _LDINTR, 0);
  420. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  421. ch = &priv->ch[k];
  422. if (!ch->enabled)
  423. continue;
  424. sh_mobile_lcdc_geometry(ch);
  425. /* power supply */
  426. lcdc_write_chan(ch, LDPMR, 0);
  427. board_cfg = &ch->cfg.board_cfg;
  428. if (board_cfg->setup_sys)
  429. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  430. &sh_mobile_lcdc_sys_bus_ops);
  431. if (ret)
  432. return ret;
  433. }
  434. /* word and long word swap */
  435. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
  436. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  437. ch = &priv->ch[k];
  438. if (!priv->ch[k].enabled)
  439. continue;
  440. /* set bpp format in PKF[4:0] */
  441. tmp = lcdc_read_chan(ch, LDDFR);
  442. tmp &= ~(0x0001001f);
  443. tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
  444. lcdc_write_chan(ch, LDDFR, tmp);
  445. /* point out our frame buffer */
  446. lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
  447. /* set line size */
  448. lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
  449. /* setup deferred io if SYS bus */
  450. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  451. if (ch->ldmt1r_value & (1 << 12) && tmp) {
  452. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  453. ch->defio.delay = msecs_to_jiffies(tmp);
  454. ch->info->fbdefio = &ch->defio;
  455. fb_deferred_io_init(ch->info);
  456. /* one-shot mode */
  457. lcdc_write_chan(ch, LDSM1R, 1);
  458. /* enable "Frame End Interrupt Enable" bit */
  459. lcdc_write(priv, _LDINTR, LDINTR_FE);
  460. } else {
  461. /* continuous read mode */
  462. lcdc_write_chan(ch, LDSM1R, 0);
  463. }
  464. }
  465. /* display output */
  466. lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
  467. /* start the lcdc */
  468. sh_mobile_lcdc_start_stop(priv, 1);
  469. priv->started = 1;
  470. /* tell the board code to enable the panel */
  471. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  472. ch = &priv->ch[k];
  473. if (!ch->enabled)
  474. continue;
  475. board_cfg = &ch->cfg.board_cfg;
  476. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  477. board_cfg->display_on(board_cfg->board_data, ch->info);
  478. module_put(board_cfg->owner);
  479. }
  480. }
  481. return 0;
  482. }
  483. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  484. {
  485. struct sh_mobile_lcdc_chan *ch;
  486. struct sh_mobile_lcdc_board_cfg *board_cfg;
  487. int k;
  488. /* clean up deferred io and ask board code to disable panel */
  489. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  490. ch = &priv->ch[k];
  491. if (!ch->enabled)
  492. continue;
  493. /* deferred io mode:
  494. * flush frame, and wait for frame end interrupt
  495. * clean up deferred io and enable clock
  496. */
  497. if (ch->info && ch->info->fbdefio) {
  498. ch->frame_end = 0;
  499. schedule_delayed_work(&ch->info->deferred_work, 0);
  500. wait_event(ch->frame_end_wait, ch->frame_end);
  501. fb_deferred_io_cleanup(ch->info);
  502. ch->info->fbdefio = NULL;
  503. sh_mobile_lcdc_clk_on(priv);
  504. }
  505. board_cfg = &ch->cfg.board_cfg;
  506. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  507. board_cfg->display_off(board_cfg->board_data);
  508. module_put(board_cfg->owner);
  509. }
  510. }
  511. /* stop the lcdc */
  512. if (priv->started) {
  513. sh_mobile_lcdc_start_stop(priv, 0);
  514. priv->started = 0;
  515. }
  516. /* stop clocks */
  517. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  518. if (priv->ch[k].enabled)
  519. sh_mobile_lcdc_clk_off(priv);
  520. }
  521. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  522. {
  523. int ifm, miftyp;
  524. switch (ch->cfg.interface_type) {
  525. case RGB8: ifm = 0; miftyp = 0; break;
  526. case RGB9: ifm = 0; miftyp = 4; break;
  527. case RGB12A: ifm = 0; miftyp = 5; break;
  528. case RGB12B: ifm = 0; miftyp = 6; break;
  529. case RGB16: ifm = 0; miftyp = 7; break;
  530. case RGB18: ifm = 0; miftyp = 10; break;
  531. case RGB24: ifm = 0; miftyp = 11; break;
  532. case SYS8A: ifm = 1; miftyp = 0; break;
  533. case SYS8B: ifm = 1; miftyp = 1; break;
  534. case SYS8C: ifm = 1; miftyp = 2; break;
  535. case SYS8D: ifm = 1; miftyp = 3; break;
  536. case SYS9: ifm = 1; miftyp = 4; break;
  537. case SYS12: ifm = 1; miftyp = 5; break;
  538. case SYS16A: ifm = 1; miftyp = 7; break;
  539. case SYS16B: ifm = 1; miftyp = 8; break;
  540. case SYS16C: ifm = 1; miftyp = 9; break;
  541. case SYS18: ifm = 1; miftyp = 10; break;
  542. case SYS24: ifm = 1; miftyp = 11; break;
  543. default: goto bad;
  544. }
  545. /* SUBLCD only supports SYS interface */
  546. if (lcdc_chan_is_sublcd(ch)) {
  547. if (ifm == 0)
  548. goto bad;
  549. else
  550. ifm = 0;
  551. }
  552. ch->ldmt1r_value = (ifm << 12) | miftyp;
  553. return 0;
  554. bad:
  555. return -EINVAL;
  556. }
  557. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  558. int clock_source,
  559. struct sh_mobile_lcdc_priv *priv)
  560. {
  561. char *str;
  562. int icksel;
  563. switch (clock_source) {
  564. case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
  565. case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
  566. case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
  567. default:
  568. return -EINVAL;
  569. }
  570. priv->lddckr = icksel << 16;
  571. if (str) {
  572. priv->dot_clk = clk_get(&pdev->dev, str);
  573. if (IS_ERR(priv->dot_clk)) {
  574. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  575. return PTR_ERR(priv->dot_clk);
  576. }
  577. }
  578. /* Runtime PM support involves two step for this driver:
  579. * 1) Enable Runtime PM
  580. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  581. */
  582. priv->dev = &pdev->dev;
  583. pm_runtime_enable(priv->dev);
  584. pm_runtime_resume(priv->dev);
  585. return 0;
  586. }
  587. static int sh_mobile_lcdc_setcolreg(u_int regno,
  588. u_int red, u_int green, u_int blue,
  589. u_int transp, struct fb_info *info)
  590. {
  591. u32 *palette = info->pseudo_palette;
  592. if (regno >= PALETTE_NR)
  593. return -EINVAL;
  594. /* only FB_VISUAL_TRUECOLOR supported */
  595. red >>= 16 - info->var.red.length;
  596. green >>= 16 - info->var.green.length;
  597. blue >>= 16 - info->var.blue.length;
  598. transp >>= 16 - info->var.transp.length;
  599. palette[regno] = (red << info->var.red.offset) |
  600. (green << info->var.green.offset) |
  601. (blue << info->var.blue.offset) |
  602. (transp << info->var.transp.offset);
  603. return 0;
  604. }
  605. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  606. .id = "SH Mobile LCDC",
  607. .type = FB_TYPE_PACKED_PIXELS,
  608. .visual = FB_VISUAL_TRUECOLOR,
  609. .accel = FB_ACCEL_NONE,
  610. .xpanstep = 0,
  611. .ypanstep = 1,
  612. .ywrapstep = 0,
  613. };
  614. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  615. const struct fb_fillrect *rect)
  616. {
  617. sys_fillrect(info, rect);
  618. sh_mobile_lcdc_deferred_io_touch(info);
  619. }
  620. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  621. const struct fb_copyarea *area)
  622. {
  623. sys_copyarea(info, area);
  624. sh_mobile_lcdc_deferred_io_touch(info);
  625. }
  626. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  627. const struct fb_image *image)
  628. {
  629. sys_imageblit(info, image);
  630. sh_mobile_lcdc_deferred_io_touch(info);
  631. }
  632. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  633. struct fb_info *info)
  634. {
  635. struct sh_mobile_lcdc_chan *ch = info->par;
  636. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  637. unsigned long ldrcntr;
  638. unsigned long new_pan_offset;
  639. new_pan_offset = (var->yoffset * info->fix.line_length) +
  640. (var->xoffset * (info->var.bits_per_pixel / 8));
  641. if (new_pan_offset == ch->pan_offset)
  642. return 0; /* No change, do nothing */
  643. ldrcntr = lcdc_read(priv, _LDRCNTR);
  644. /* Set the source address for the next refresh */
  645. lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
  646. if (lcdc_chan_is_sublcd(ch))
  647. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  648. else
  649. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  650. ch->pan_offset = new_pan_offset;
  651. sh_mobile_lcdc_deferred_io_touch(info);
  652. return 0;
  653. }
  654. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  655. {
  656. struct sh_mobile_lcdc_chan *ch = info->par;
  657. unsigned long ldintr;
  658. int ret;
  659. /* Enable VSync End interrupt */
  660. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  661. ldintr |= LDINTR_VEE;
  662. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  663. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  664. msecs_to_jiffies(100));
  665. if (!ret)
  666. return -ETIMEDOUT;
  667. return 0;
  668. }
  669. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  670. unsigned long arg)
  671. {
  672. int retval;
  673. switch (cmd) {
  674. case FBIO_WAITFORVSYNC:
  675. retval = sh_mobile_wait_for_vsync(info);
  676. break;
  677. default:
  678. retval = -ENOIOCTLCMD;
  679. break;
  680. }
  681. return retval;
  682. }
  683. static struct fb_ops sh_mobile_lcdc_ops = {
  684. .owner = THIS_MODULE,
  685. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  686. .fb_read = fb_sys_read,
  687. .fb_write = fb_sys_write,
  688. .fb_fillrect = sh_mobile_lcdc_fillrect,
  689. .fb_copyarea = sh_mobile_lcdc_copyarea,
  690. .fb_imageblit = sh_mobile_lcdc_imageblit,
  691. .fb_pan_display = sh_mobile_fb_pan_display,
  692. .fb_ioctl = sh_mobile_ioctl,
  693. };
  694. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
  695. {
  696. switch (bpp) {
  697. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  698. var->red.offset = 11;
  699. var->red.length = 5;
  700. var->green.offset = 5;
  701. var->green.length = 6;
  702. var->blue.offset = 0;
  703. var->blue.length = 5;
  704. var->transp.offset = 0;
  705. var->transp.length = 0;
  706. break;
  707. case 32: /* PKF[4:0] = 00000 - RGB 888
  708. * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
  709. * this may be because LDDDSR has word swap enabled..
  710. */
  711. var->red.offset = 0;
  712. var->red.length = 8;
  713. var->green.offset = 24;
  714. var->green.length = 8;
  715. var->blue.offset = 16;
  716. var->blue.length = 8;
  717. var->transp.offset = 0;
  718. var->transp.length = 0;
  719. break;
  720. default:
  721. return -EINVAL;
  722. }
  723. var->bits_per_pixel = bpp;
  724. var->red.msb_right = 0;
  725. var->green.msb_right = 0;
  726. var->blue.msb_right = 0;
  727. var->transp.msb_right = 0;
  728. return 0;
  729. }
  730. static int sh_mobile_lcdc_suspend(struct device *dev)
  731. {
  732. struct platform_device *pdev = to_platform_device(dev);
  733. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  734. return 0;
  735. }
  736. static int sh_mobile_lcdc_resume(struct device *dev)
  737. {
  738. struct platform_device *pdev = to_platform_device(dev);
  739. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  740. }
  741. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  742. {
  743. struct platform_device *pdev = to_platform_device(dev);
  744. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  745. struct sh_mobile_lcdc_chan *ch;
  746. int k, n;
  747. /* save per-channel registers */
  748. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  749. ch = &p->ch[k];
  750. if (!ch->enabled)
  751. continue;
  752. for (n = 0; n < NR_CH_REGS; n++)
  753. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  754. }
  755. /* save shared registers */
  756. for (n = 0; n < NR_SHARED_REGS; n++)
  757. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  758. /* turn off LCDC hardware */
  759. lcdc_write(p, _LDCNT1R, 0);
  760. return 0;
  761. }
  762. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  763. {
  764. struct platform_device *pdev = to_platform_device(dev);
  765. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  766. struct sh_mobile_lcdc_chan *ch;
  767. int k, n;
  768. /* restore per-channel registers */
  769. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  770. ch = &p->ch[k];
  771. if (!ch->enabled)
  772. continue;
  773. for (n = 0; n < NR_CH_REGS; n++)
  774. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  775. }
  776. /* restore shared registers */
  777. for (n = 0; n < NR_SHARED_REGS; n++)
  778. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  779. return 0;
  780. }
  781. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  782. .suspend = sh_mobile_lcdc_suspend,
  783. .resume = sh_mobile_lcdc_resume,
  784. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  785. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  786. };
  787. /* locking: called with info->lock held */
  788. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  789. unsigned long action, void *data)
  790. {
  791. struct fb_event *event = data;
  792. struct fb_info *info = event->info;
  793. struct sh_mobile_lcdc_chan *ch = info->par;
  794. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  795. struct fb_var_screeninfo *var;
  796. if (&ch->lcdc->notifier != nb)
  797. return NOTIFY_DONE;
  798. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  799. __func__, action, event->data);
  800. switch(action) {
  801. case FB_EVENT_SUSPEND:
  802. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  803. board_cfg->display_off(board_cfg->board_data);
  804. module_put(board_cfg->owner);
  805. }
  806. pm_runtime_put(info->device);
  807. break;
  808. case FB_EVENT_RESUME:
  809. var = &info->var;
  810. /* HDMI must be enabled before LCDC configuration */
  811. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  812. board_cfg->display_on(board_cfg->board_data, ch->info);
  813. module_put(board_cfg->owner);
  814. }
  815. /* Check if the new display is not in our modelist */
  816. if (ch->info->modelist.next &&
  817. !fb_match_mode(var, &ch->info->modelist)) {
  818. struct fb_videomode mode;
  819. int ret;
  820. /* Can we handle this display? */
  821. if (var->xres > ch->cfg.lcd_cfg[0].xres ||
  822. var->yres > ch->cfg.lcd_cfg[0].yres)
  823. /*
  824. * LCDC resume failed, no need to continue with
  825. * the notifier chain
  826. */
  827. return notifier_from_errno(-ENOMEM);
  828. /* Add to the modelist */
  829. fb_var_to_videomode(&mode, var);
  830. ret = fb_add_videomode(&mode, &ch->info->modelist);
  831. if (ret < 0)
  832. return notifier_from_errno(ret);
  833. }
  834. pm_runtime_get_sync(info->device);
  835. sh_mobile_lcdc_geometry(ch);
  836. }
  837. return NOTIFY_OK;
  838. }
  839. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  840. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  841. {
  842. struct fb_info *info;
  843. struct sh_mobile_lcdc_priv *priv;
  844. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  845. struct sh_mobile_lcdc_chan_cfg *cfg;
  846. struct resource *res;
  847. int error;
  848. void *buf;
  849. int i, j;
  850. if (!pdata) {
  851. dev_err(&pdev->dev, "no platform data defined\n");
  852. return -EINVAL;
  853. }
  854. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  855. i = platform_get_irq(pdev, 0);
  856. if (!res || i < 0) {
  857. dev_err(&pdev->dev, "cannot get platform resources\n");
  858. return -ENOENT;
  859. }
  860. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  861. if (!priv) {
  862. dev_err(&pdev->dev, "cannot allocate device data\n");
  863. return -ENOMEM;
  864. }
  865. platform_set_drvdata(pdev, priv);
  866. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  867. dev_name(&pdev->dev), priv);
  868. if (error) {
  869. dev_err(&pdev->dev, "unable to request irq\n");
  870. goto err1;
  871. }
  872. priv->irq = i;
  873. atomic_set(&priv->hw_usecnt, -1);
  874. j = 0;
  875. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  876. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  877. ch->lcdc = priv;
  878. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  879. error = sh_mobile_lcdc_check_interface(ch);
  880. if (error) {
  881. dev_err(&pdev->dev, "unsupported interface type\n");
  882. goto err1;
  883. }
  884. init_waitqueue_head(&ch->frame_end_wait);
  885. init_completion(&ch->vsync_completion);
  886. ch->pan_offset = 0;
  887. switch (pdata->ch[i].chan) {
  888. case LCDC_CHAN_MAINLCD:
  889. ch->enabled = 1 << 1;
  890. ch->reg_offs = lcdc_offs_mainlcd;
  891. j++;
  892. break;
  893. case LCDC_CHAN_SUBLCD:
  894. ch->enabled = 1 << 2;
  895. ch->reg_offs = lcdc_offs_sublcd;
  896. j++;
  897. break;
  898. }
  899. }
  900. if (!j) {
  901. dev_err(&pdev->dev, "no channels defined\n");
  902. error = -EINVAL;
  903. goto err1;
  904. }
  905. priv->base = ioremap_nocache(res->start, resource_size(res));
  906. if (!priv->base)
  907. goto err1;
  908. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  909. if (error) {
  910. dev_err(&pdev->dev, "unable to setup clocks\n");
  911. goto err1;
  912. }
  913. for (i = 0; i < j; i++) {
  914. struct fb_var_screeninfo *var;
  915. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  916. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  917. unsigned long max_size = 0;
  918. int k;
  919. cfg = &ch->cfg;
  920. ch->info = framebuffer_alloc(0, &pdev->dev);
  921. if (!ch->info) {
  922. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  923. error = -ENOMEM;
  924. break;
  925. }
  926. info = ch->info;
  927. var = &info->var;
  928. info->fbops = &sh_mobile_lcdc_ops;
  929. fb_videomode_to_var(var, &cfg->lcd_cfg[0]);
  930. /* Default Y virtual resolution is 2x panel size */
  931. var->yres_virtual = var->yres * 2;
  932. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
  933. if (error)
  934. break;
  935. for (k = 0, lcd_cfg = cfg->lcd_cfg;
  936. k < cfg->num_cfg;
  937. k++, lcd_cfg++) {
  938. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  939. if (size > max_size) {
  940. max_cfg = lcd_cfg;
  941. max_size = size;
  942. }
  943. }
  944. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  945. max_cfg->xres, max_cfg->yres);
  946. info->fix = sh_mobile_lcdc_fix;
  947. info->fix.line_length = cfg->lcd_cfg[0].xres * (cfg->bpp / 8);
  948. info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
  949. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  950. &ch->dma_handle, GFP_KERNEL);
  951. if (!buf) {
  952. dev_err(&pdev->dev, "unable to allocate buffer\n");
  953. error = -ENOMEM;
  954. break;
  955. }
  956. info->pseudo_palette = &ch->pseudo_palette;
  957. info->flags = FBINFO_FLAG_DEFAULT;
  958. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  959. if (error < 0) {
  960. dev_err(&pdev->dev, "unable to allocate cmap\n");
  961. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  962. buf, ch->dma_handle);
  963. break;
  964. }
  965. info->fix.smem_start = ch->dma_handle;
  966. info->screen_base = buf;
  967. info->device = &pdev->dev;
  968. info->par = ch;
  969. }
  970. if (error)
  971. goto err1;
  972. error = sh_mobile_lcdc_start(priv);
  973. if (error) {
  974. dev_err(&pdev->dev, "unable to start hardware\n");
  975. goto err1;
  976. }
  977. for (i = 0; i < j; i++) {
  978. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  979. info = ch->info;
  980. if (info->fbdefio) {
  981. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  982. info->fix.smem_len >> PAGE_SHIFT);
  983. if (!ch->sglist) {
  984. dev_err(&pdev->dev, "cannot allocate sglist\n");
  985. goto err1;
  986. }
  987. }
  988. error = register_framebuffer(info);
  989. if (error < 0)
  990. goto err1;
  991. dev_info(info->dev,
  992. "registered %s/%s as %dx%d %dbpp.\n",
  993. pdev->name,
  994. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  995. "mainlcd" : "sublcd",
  996. (int) ch->cfg.lcd_cfg[0].xres,
  997. (int) ch->cfg.lcd_cfg[0].yres,
  998. ch->cfg.bpp);
  999. /* deferred io mode: disable clock to save power */
  1000. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1001. sh_mobile_lcdc_clk_off(priv);
  1002. }
  1003. /* Failure ignored */
  1004. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1005. fb_register_client(&priv->notifier);
  1006. return 0;
  1007. err1:
  1008. sh_mobile_lcdc_remove(pdev);
  1009. return error;
  1010. }
  1011. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1012. {
  1013. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1014. struct fb_info *info;
  1015. int i;
  1016. fb_unregister_client(&priv->notifier);
  1017. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1018. if (priv->ch[i].info && priv->ch[i].info->dev)
  1019. unregister_framebuffer(priv->ch[i].info);
  1020. sh_mobile_lcdc_stop(priv);
  1021. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1022. info = priv->ch[i].info;
  1023. if (!info || !info->device)
  1024. continue;
  1025. if (priv->ch[i].sglist)
  1026. vfree(priv->ch[i].sglist);
  1027. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1028. info->screen_base, priv->ch[i].dma_handle);
  1029. fb_dealloc_cmap(&info->cmap);
  1030. framebuffer_release(info);
  1031. }
  1032. if (priv->dot_clk)
  1033. clk_put(priv->dot_clk);
  1034. if (priv->dev)
  1035. pm_runtime_disable(priv->dev);
  1036. if (priv->base)
  1037. iounmap(priv->base);
  1038. if (priv->irq)
  1039. free_irq(priv->irq, priv);
  1040. kfree(priv);
  1041. return 0;
  1042. }
  1043. static struct platform_driver sh_mobile_lcdc_driver = {
  1044. .driver = {
  1045. .name = "sh_mobile_lcdc_fb",
  1046. .owner = THIS_MODULE,
  1047. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1048. },
  1049. .probe = sh_mobile_lcdc_probe,
  1050. .remove = sh_mobile_lcdc_remove,
  1051. };
  1052. static int __init sh_mobile_lcdc_init(void)
  1053. {
  1054. return platform_driver_register(&sh_mobile_lcdc_driver);
  1055. }
  1056. static void __exit sh_mobile_lcdc_exit(void)
  1057. {
  1058. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1059. }
  1060. module_init(sh_mobile_lcdc_init);
  1061. module_exit(sh_mobile_lcdc_exit);
  1062. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1063. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1064. MODULE_LICENSE("GPL v2");