mmu.c 76 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include "kvm_cache_regs.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. #include <asm/vmx.h>
  34. /*
  35. * When setting this variable to true it enables Two-Dimensional-Paging
  36. * where the hardware walks 2 page tables:
  37. * 1. the guest-virtual to guest-physical
  38. * 2. while doing 1. it walks guest-physical to host-physical
  39. * If the hardware supports that we don't need to do shadow paging.
  40. */
  41. bool tdp_enabled = false;
  42. #undef MMU_DEBUG
  43. #undef AUDIT
  44. #ifdef AUDIT
  45. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  46. #else
  47. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  48. #endif
  49. #ifdef MMU_DEBUG
  50. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  51. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  52. #else
  53. #define pgprintk(x...) do { } while (0)
  54. #define rmap_printk(x...) do { } while (0)
  55. #endif
  56. #if defined(MMU_DEBUG) || defined(AUDIT)
  57. static int dbg = 0;
  58. module_param(dbg, bool, 0644);
  59. #endif
  60. static int oos_shadow = 1;
  61. module_param(oos_shadow, bool, 0644);
  62. #ifndef MMU_DEBUG
  63. #define ASSERT(x) do { } while (0)
  64. #else
  65. #define ASSERT(x) \
  66. if (!(x)) { \
  67. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  68. __FILE__, __LINE__, #x); \
  69. }
  70. #endif
  71. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  72. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  73. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  74. #define PT64_LEVEL_BITS 9
  75. #define PT64_LEVEL_SHIFT(level) \
  76. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  77. #define PT64_LEVEL_MASK(level) \
  78. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  79. #define PT64_INDEX(address, level)\
  80. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  81. #define PT32_LEVEL_BITS 10
  82. #define PT32_LEVEL_SHIFT(level) \
  83. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  84. #define PT32_LEVEL_MASK(level) \
  85. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  86. #define PT32_INDEX(address, level)\
  87. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  88. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  89. #define PT64_DIR_BASE_ADDR_MASK \
  90. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  91. #define PT32_BASE_ADDR_MASK PAGE_MASK
  92. #define PT32_DIR_BASE_ADDR_MASK \
  93. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  94. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  95. | PT64_NX_MASK)
  96. #define PFERR_PRESENT_MASK (1U << 0)
  97. #define PFERR_WRITE_MASK (1U << 1)
  98. #define PFERR_USER_MASK (1U << 2)
  99. #define PFERR_RSVD_MASK (1U << 3)
  100. #define PFERR_FETCH_MASK (1U << 4)
  101. #define PT_DIRECTORY_LEVEL 2
  102. #define PT_PAGE_TABLE_LEVEL 1
  103. #define RMAP_EXT 4
  104. #define ACC_EXEC_MASK 1
  105. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  106. #define ACC_USER_MASK PT_USER_MASK
  107. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  108. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  109. struct kvm_rmap_desc {
  110. u64 *shadow_ptes[RMAP_EXT];
  111. struct kvm_rmap_desc *more;
  112. };
  113. struct kvm_shadow_walk_iterator {
  114. u64 addr;
  115. hpa_t shadow_addr;
  116. int level;
  117. u64 *sptep;
  118. unsigned index;
  119. };
  120. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  121. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  122. shadow_walk_okay(&(_walker)); \
  123. shadow_walk_next(&(_walker)))
  124. struct kvm_unsync_walk {
  125. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  126. };
  127. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  128. static struct kmem_cache *pte_chain_cache;
  129. static struct kmem_cache *rmap_desc_cache;
  130. static struct kmem_cache *mmu_page_header_cache;
  131. static u64 __read_mostly shadow_trap_nonpresent_pte;
  132. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  133. static u64 __read_mostly shadow_base_present_pte;
  134. static u64 __read_mostly shadow_nx_mask;
  135. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  136. static u64 __read_mostly shadow_user_mask;
  137. static u64 __read_mostly shadow_accessed_mask;
  138. static u64 __read_mostly shadow_dirty_mask;
  139. static inline u64 rsvd_bits(int s, int e)
  140. {
  141. return ((1ULL << (e - s + 1)) - 1) << s;
  142. }
  143. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  144. {
  145. shadow_trap_nonpresent_pte = trap_pte;
  146. shadow_notrap_nonpresent_pte = notrap_pte;
  147. }
  148. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  149. void kvm_mmu_set_base_ptes(u64 base_pte)
  150. {
  151. shadow_base_present_pte = base_pte;
  152. }
  153. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  154. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  155. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  156. {
  157. shadow_user_mask = user_mask;
  158. shadow_accessed_mask = accessed_mask;
  159. shadow_dirty_mask = dirty_mask;
  160. shadow_nx_mask = nx_mask;
  161. shadow_x_mask = x_mask;
  162. }
  163. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  164. static int is_write_protection(struct kvm_vcpu *vcpu)
  165. {
  166. return vcpu->arch.cr0 & X86_CR0_WP;
  167. }
  168. static int is_cpuid_PSE36(void)
  169. {
  170. return 1;
  171. }
  172. static int is_nx(struct kvm_vcpu *vcpu)
  173. {
  174. return vcpu->arch.shadow_efer & EFER_NX;
  175. }
  176. static int is_shadow_present_pte(u64 pte)
  177. {
  178. return pte != shadow_trap_nonpresent_pte
  179. && pte != shadow_notrap_nonpresent_pte;
  180. }
  181. static int is_large_pte(u64 pte)
  182. {
  183. return pte & PT_PAGE_SIZE_MASK;
  184. }
  185. static int is_writeble_pte(unsigned long pte)
  186. {
  187. return pte & PT_WRITABLE_MASK;
  188. }
  189. static int is_dirty_pte(unsigned long pte)
  190. {
  191. return pte & shadow_dirty_mask;
  192. }
  193. static int is_rmap_pte(u64 pte)
  194. {
  195. return is_shadow_present_pte(pte);
  196. }
  197. static pfn_t spte_to_pfn(u64 pte)
  198. {
  199. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  200. }
  201. static gfn_t pse36_gfn_delta(u32 gpte)
  202. {
  203. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  204. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  205. }
  206. static void set_shadow_pte(u64 *sptep, u64 spte)
  207. {
  208. #ifdef CONFIG_X86_64
  209. set_64bit((unsigned long *)sptep, spte);
  210. #else
  211. set_64bit((unsigned long long *)sptep, spte);
  212. #endif
  213. }
  214. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  215. struct kmem_cache *base_cache, int min)
  216. {
  217. void *obj;
  218. if (cache->nobjs >= min)
  219. return 0;
  220. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  221. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  222. if (!obj)
  223. return -ENOMEM;
  224. cache->objects[cache->nobjs++] = obj;
  225. }
  226. return 0;
  227. }
  228. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  229. {
  230. while (mc->nobjs)
  231. kfree(mc->objects[--mc->nobjs]);
  232. }
  233. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  234. int min)
  235. {
  236. struct page *page;
  237. if (cache->nobjs >= min)
  238. return 0;
  239. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  240. page = alloc_page(GFP_KERNEL);
  241. if (!page)
  242. return -ENOMEM;
  243. set_page_private(page, 0);
  244. cache->objects[cache->nobjs++] = page_address(page);
  245. }
  246. return 0;
  247. }
  248. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  249. {
  250. while (mc->nobjs)
  251. free_page((unsigned long)mc->objects[--mc->nobjs]);
  252. }
  253. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  254. {
  255. int r;
  256. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  257. pte_chain_cache, 4);
  258. if (r)
  259. goto out;
  260. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  261. rmap_desc_cache, 4);
  262. if (r)
  263. goto out;
  264. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  265. if (r)
  266. goto out;
  267. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  268. mmu_page_header_cache, 4);
  269. out:
  270. return r;
  271. }
  272. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  273. {
  274. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  275. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  276. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  277. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  278. }
  279. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  280. size_t size)
  281. {
  282. void *p;
  283. BUG_ON(!mc->nobjs);
  284. p = mc->objects[--mc->nobjs];
  285. return p;
  286. }
  287. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  288. {
  289. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  290. sizeof(struct kvm_pte_chain));
  291. }
  292. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  293. {
  294. kfree(pc);
  295. }
  296. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  297. {
  298. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  299. sizeof(struct kvm_rmap_desc));
  300. }
  301. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  302. {
  303. kfree(rd);
  304. }
  305. /*
  306. * Return the pointer to the largepage write count for a given
  307. * gfn, handling slots that are not large page aligned.
  308. */
  309. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  310. {
  311. unsigned long idx;
  312. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  313. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  314. return &slot->lpage_info[idx].write_count;
  315. }
  316. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  317. {
  318. int *write_count;
  319. gfn = unalias_gfn(kvm, gfn);
  320. write_count = slot_largepage_idx(gfn,
  321. gfn_to_memslot_unaliased(kvm, gfn));
  322. *write_count += 1;
  323. }
  324. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  325. {
  326. int *write_count;
  327. gfn = unalias_gfn(kvm, gfn);
  328. write_count = slot_largepage_idx(gfn,
  329. gfn_to_memslot_unaliased(kvm, gfn));
  330. *write_count -= 1;
  331. WARN_ON(*write_count < 0);
  332. }
  333. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  334. {
  335. struct kvm_memory_slot *slot;
  336. int *largepage_idx;
  337. gfn = unalias_gfn(kvm, gfn);
  338. slot = gfn_to_memslot_unaliased(kvm, gfn);
  339. if (slot) {
  340. largepage_idx = slot_largepage_idx(gfn, slot);
  341. return *largepage_idx;
  342. }
  343. return 1;
  344. }
  345. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  346. {
  347. struct vm_area_struct *vma;
  348. unsigned long addr;
  349. int ret = 0;
  350. addr = gfn_to_hva(kvm, gfn);
  351. if (kvm_is_error_hva(addr))
  352. return ret;
  353. down_read(&current->mm->mmap_sem);
  354. vma = find_vma(current->mm, addr);
  355. if (vma && is_vm_hugetlb_page(vma))
  356. ret = 1;
  357. up_read(&current->mm->mmap_sem);
  358. return ret;
  359. }
  360. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  361. {
  362. struct kvm_memory_slot *slot;
  363. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  364. return 0;
  365. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  366. return 0;
  367. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  368. if (slot && slot->dirty_bitmap)
  369. return 0;
  370. return 1;
  371. }
  372. /*
  373. * Take gfn and return the reverse mapping to it.
  374. * Note: gfn must be unaliased before this function get called
  375. */
  376. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  377. {
  378. struct kvm_memory_slot *slot;
  379. unsigned long idx;
  380. slot = gfn_to_memslot(kvm, gfn);
  381. if (!lpage)
  382. return &slot->rmap[gfn - slot->base_gfn];
  383. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  384. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  385. return &slot->lpage_info[idx].rmap_pde;
  386. }
  387. /*
  388. * Reverse mapping data structures:
  389. *
  390. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  391. * that points to page_address(page).
  392. *
  393. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  394. * containing more mappings.
  395. *
  396. * Returns the number of rmap entries before the spte was added or zero if
  397. * the spte was not added.
  398. *
  399. */
  400. static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  401. {
  402. struct kvm_mmu_page *sp;
  403. struct kvm_rmap_desc *desc;
  404. unsigned long *rmapp;
  405. int i, count = 0;
  406. if (!is_rmap_pte(*spte))
  407. return count;
  408. gfn = unalias_gfn(vcpu->kvm, gfn);
  409. sp = page_header(__pa(spte));
  410. sp->gfns[spte - sp->spt] = gfn;
  411. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  412. if (!*rmapp) {
  413. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  414. *rmapp = (unsigned long)spte;
  415. } else if (!(*rmapp & 1)) {
  416. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  417. desc = mmu_alloc_rmap_desc(vcpu);
  418. desc->shadow_ptes[0] = (u64 *)*rmapp;
  419. desc->shadow_ptes[1] = spte;
  420. *rmapp = (unsigned long)desc | 1;
  421. } else {
  422. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  423. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  424. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) {
  425. desc = desc->more;
  426. count += RMAP_EXT;
  427. }
  428. if (desc->shadow_ptes[RMAP_EXT-1]) {
  429. desc->more = mmu_alloc_rmap_desc(vcpu);
  430. desc = desc->more;
  431. }
  432. for (i = 0; desc->shadow_ptes[i]; ++i)
  433. ;
  434. desc->shadow_ptes[i] = spte;
  435. }
  436. return count;
  437. }
  438. static void rmap_desc_remove_entry(unsigned long *rmapp,
  439. struct kvm_rmap_desc *desc,
  440. int i,
  441. struct kvm_rmap_desc *prev_desc)
  442. {
  443. int j;
  444. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  445. ;
  446. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  447. desc->shadow_ptes[j] = NULL;
  448. if (j != 0)
  449. return;
  450. if (!prev_desc && !desc->more)
  451. *rmapp = (unsigned long)desc->shadow_ptes[0];
  452. else
  453. if (prev_desc)
  454. prev_desc->more = desc->more;
  455. else
  456. *rmapp = (unsigned long)desc->more | 1;
  457. mmu_free_rmap_desc(desc);
  458. }
  459. static void rmap_remove(struct kvm *kvm, u64 *spte)
  460. {
  461. struct kvm_rmap_desc *desc;
  462. struct kvm_rmap_desc *prev_desc;
  463. struct kvm_mmu_page *sp;
  464. pfn_t pfn;
  465. unsigned long *rmapp;
  466. int i;
  467. if (!is_rmap_pte(*spte))
  468. return;
  469. sp = page_header(__pa(spte));
  470. pfn = spte_to_pfn(*spte);
  471. if (*spte & shadow_accessed_mask)
  472. kvm_set_pfn_accessed(pfn);
  473. if (is_writeble_pte(*spte))
  474. kvm_release_pfn_dirty(pfn);
  475. else
  476. kvm_release_pfn_clean(pfn);
  477. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  478. if (!*rmapp) {
  479. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  480. BUG();
  481. } else if (!(*rmapp & 1)) {
  482. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  483. if ((u64 *)*rmapp != spte) {
  484. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  485. spte, *spte);
  486. BUG();
  487. }
  488. *rmapp = 0;
  489. } else {
  490. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  491. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  492. prev_desc = NULL;
  493. while (desc) {
  494. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  495. if (desc->shadow_ptes[i] == spte) {
  496. rmap_desc_remove_entry(rmapp,
  497. desc, i,
  498. prev_desc);
  499. return;
  500. }
  501. prev_desc = desc;
  502. desc = desc->more;
  503. }
  504. BUG();
  505. }
  506. }
  507. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  508. {
  509. struct kvm_rmap_desc *desc;
  510. struct kvm_rmap_desc *prev_desc;
  511. u64 *prev_spte;
  512. int i;
  513. if (!*rmapp)
  514. return NULL;
  515. else if (!(*rmapp & 1)) {
  516. if (!spte)
  517. return (u64 *)*rmapp;
  518. return NULL;
  519. }
  520. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  521. prev_desc = NULL;
  522. prev_spte = NULL;
  523. while (desc) {
  524. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  525. if (prev_spte == spte)
  526. return desc->shadow_ptes[i];
  527. prev_spte = desc->shadow_ptes[i];
  528. }
  529. desc = desc->more;
  530. }
  531. return NULL;
  532. }
  533. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  534. {
  535. unsigned long *rmapp;
  536. u64 *spte;
  537. int write_protected = 0;
  538. gfn = unalias_gfn(kvm, gfn);
  539. rmapp = gfn_to_rmap(kvm, gfn, 0);
  540. spte = rmap_next(kvm, rmapp, NULL);
  541. while (spte) {
  542. BUG_ON(!spte);
  543. BUG_ON(!(*spte & PT_PRESENT_MASK));
  544. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  545. if (is_writeble_pte(*spte)) {
  546. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  547. write_protected = 1;
  548. }
  549. spte = rmap_next(kvm, rmapp, spte);
  550. }
  551. if (write_protected) {
  552. pfn_t pfn;
  553. spte = rmap_next(kvm, rmapp, NULL);
  554. pfn = spte_to_pfn(*spte);
  555. kvm_set_pfn_dirty(pfn);
  556. }
  557. /* check for huge page mappings */
  558. rmapp = gfn_to_rmap(kvm, gfn, 1);
  559. spte = rmap_next(kvm, rmapp, NULL);
  560. while (spte) {
  561. BUG_ON(!spte);
  562. BUG_ON(!(*spte & PT_PRESENT_MASK));
  563. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  564. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  565. if (is_writeble_pte(*spte)) {
  566. rmap_remove(kvm, spte);
  567. --kvm->stat.lpages;
  568. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  569. spte = NULL;
  570. write_protected = 1;
  571. }
  572. spte = rmap_next(kvm, rmapp, spte);
  573. }
  574. return write_protected;
  575. }
  576. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  577. {
  578. u64 *spte;
  579. int need_tlb_flush = 0;
  580. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  581. BUG_ON(!(*spte & PT_PRESENT_MASK));
  582. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  583. rmap_remove(kvm, spte);
  584. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  585. need_tlb_flush = 1;
  586. }
  587. return need_tlb_flush;
  588. }
  589. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  590. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  591. {
  592. int i;
  593. int retval = 0;
  594. /*
  595. * If mmap_sem isn't taken, we can look the memslots with only
  596. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  597. */
  598. for (i = 0; i < kvm->nmemslots; i++) {
  599. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  600. unsigned long start = memslot->userspace_addr;
  601. unsigned long end;
  602. /* mmu_lock protects userspace_addr */
  603. if (!start)
  604. continue;
  605. end = start + (memslot->npages << PAGE_SHIFT);
  606. if (hva >= start && hva < end) {
  607. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  608. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  609. retval |= handler(kvm,
  610. &memslot->lpage_info[
  611. gfn_offset /
  612. KVM_PAGES_PER_HPAGE].rmap_pde);
  613. }
  614. }
  615. return retval;
  616. }
  617. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  618. {
  619. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  620. }
  621. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  622. {
  623. u64 *spte;
  624. int young = 0;
  625. /* always return old for EPT */
  626. if (!shadow_accessed_mask)
  627. return 0;
  628. spte = rmap_next(kvm, rmapp, NULL);
  629. while (spte) {
  630. int _young;
  631. u64 _spte = *spte;
  632. BUG_ON(!(_spte & PT_PRESENT_MASK));
  633. _young = _spte & PT_ACCESSED_MASK;
  634. if (_young) {
  635. young = 1;
  636. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  637. }
  638. spte = rmap_next(kvm, rmapp, spte);
  639. }
  640. return young;
  641. }
  642. #define RMAP_RECYCLE_THRESHOLD 1000
  643. static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
  644. {
  645. unsigned long *rmapp;
  646. gfn = unalias_gfn(vcpu->kvm, gfn);
  647. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  648. kvm_unmap_rmapp(vcpu->kvm, rmapp);
  649. kvm_flush_remote_tlbs(vcpu->kvm);
  650. }
  651. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  652. {
  653. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  654. }
  655. #ifdef MMU_DEBUG
  656. static int is_empty_shadow_page(u64 *spt)
  657. {
  658. u64 *pos;
  659. u64 *end;
  660. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  661. if (is_shadow_present_pte(*pos)) {
  662. printk(KERN_ERR "%s: %p %llx\n", __func__,
  663. pos, *pos);
  664. return 0;
  665. }
  666. return 1;
  667. }
  668. #endif
  669. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  670. {
  671. ASSERT(is_empty_shadow_page(sp->spt));
  672. list_del(&sp->link);
  673. __free_page(virt_to_page(sp->spt));
  674. __free_page(virt_to_page(sp->gfns));
  675. kfree(sp);
  676. ++kvm->arch.n_free_mmu_pages;
  677. }
  678. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  679. {
  680. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  681. }
  682. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  683. u64 *parent_pte)
  684. {
  685. struct kvm_mmu_page *sp;
  686. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  687. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  688. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  689. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  690. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  691. INIT_LIST_HEAD(&sp->oos_link);
  692. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  693. sp->multimapped = 0;
  694. sp->parent_pte = parent_pte;
  695. --vcpu->kvm->arch.n_free_mmu_pages;
  696. return sp;
  697. }
  698. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  699. struct kvm_mmu_page *sp, u64 *parent_pte)
  700. {
  701. struct kvm_pte_chain *pte_chain;
  702. struct hlist_node *node;
  703. int i;
  704. if (!parent_pte)
  705. return;
  706. if (!sp->multimapped) {
  707. u64 *old = sp->parent_pte;
  708. if (!old) {
  709. sp->parent_pte = parent_pte;
  710. return;
  711. }
  712. sp->multimapped = 1;
  713. pte_chain = mmu_alloc_pte_chain(vcpu);
  714. INIT_HLIST_HEAD(&sp->parent_ptes);
  715. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  716. pte_chain->parent_ptes[0] = old;
  717. }
  718. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  719. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  720. continue;
  721. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  722. if (!pte_chain->parent_ptes[i]) {
  723. pte_chain->parent_ptes[i] = parent_pte;
  724. return;
  725. }
  726. }
  727. pte_chain = mmu_alloc_pte_chain(vcpu);
  728. BUG_ON(!pte_chain);
  729. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  730. pte_chain->parent_ptes[0] = parent_pte;
  731. }
  732. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  733. u64 *parent_pte)
  734. {
  735. struct kvm_pte_chain *pte_chain;
  736. struct hlist_node *node;
  737. int i;
  738. if (!sp->multimapped) {
  739. BUG_ON(sp->parent_pte != parent_pte);
  740. sp->parent_pte = NULL;
  741. return;
  742. }
  743. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  744. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  745. if (!pte_chain->parent_ptes[i])
  746. break;
  747. if (pte_chain->parent_ptes[i] != parent_pte)
  748. continue;
  749. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  750. && pte_chain->parent_ptes[i + 1]) {
  751. pte_chain->parent_ptes[i]
  752. = pte_chain->parent_ptes[i + 1];
  753. ++i;
  754. }
  755. pte_chain->parent_ptes[i] = NULL;
  756. if (i == 0) {
  757. hlist_del(&pte_chain->link);
  758. mmu_free_pte_chain(pte_chain);
  759. if (hlist_empty(&sp->parent_ptes)) {
  760. sp->multimapped = 0;
  761. sp->parent_pte = NULL;
  762. }
  763. }
  764. return;
  765. }
  766. BUG();
  767. }
  768. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  769. mmu_parent_walk_fn fn)
  770. {
  771. struct kvm_pte_chain *pte_chain;
  772. struct hlist_node *node;
  773. struct kvm_mmu_page *parent_sp;
  774. int i;
  775. if (!sp->multimapped && sp->parent_pte) {
  776. parent_sp = page_header(__pa(sp->parent_pte));
  777. fn(vcpu, parent_sp);
  778. mmu_parent_walk(vcpu, parent_sp, fn);
  779. return;
  780. }
  781. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  782. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  783. if (!pte_chain->parent_ptes[i])
  784. break;
  785. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  786. fn(vcpu, parent_sp);
  787. mmu_parent_walk(vcpu, parent_sp, fn);
  788. }
  789. }
  790. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  791. {
  792. unsigned int index;
  793. struct kvm_mmu_page *sp = page_header(__pa(spte));
  794. index = spte - sp->spt;
  795. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  796. sp->unsync_children++;
  797. WARN_ON(!sp->unsync_children);
  798. }
  799. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  800. {
  801. struct kvm_pte_chain *pte_chain;
  802. struct hlist_node *node;
  803. int i;
  804. if (!sp->parent_pte)
  805. return;
  806. if (!sp->multimapped) {
  807. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  808. return;
  809. }
  810. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  811. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  812. if (!pte_chain->parent_ptes[i])
  813. break;
  814. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  815. }
  816. }
  817. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  818. {
  819. kvm_mmu_update_parents_unsync(sp);
  820. return 1;
  821. }
  822. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  823. struct kvm_mmu_page *sp)
  824. {
  825. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  826. kvm_mmu_update_parents_unsync(sp);
  827. }
  828. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  829. struct kvm_mmu_page *sp)
  830. {
  831. int i;
  832. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  833. sp->spt[i] = shadow_trap_nonpresent_pte;
  834. }
  835. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  836. struct kvm_mmu_page *sp)
  837. {
  838. return 1;
  839. }
  840. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  841. {
  842. }
  843. #define KVM_PAGE_ARRAY_NR 16
  844. struct kvm_mmu_pages {
  845. struct mmu_page_and_offset {
  846. struct kvm_mmu_page *sp;
  847. unsigned int idx;
  848. } page[KVM_PAGE_ARRAY_NR];
  849. unsigned int nr;
  850. };
  851. #define for_each_unsync_children(bitmap, idx) \
  852. for (idx = find_first_bit(bitmap, 512); \
  853. idx < 512; \
  854. idx = find_next_bit(bitmap, 512, idx+1))
  855. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  856. int idx)
  857. {
  858. int i;
  859. if (sp->unsync)
  860. for (i=0; i < pvec->nr; i++)
  861. if (pvec->page[i].sp == sp)
  862. return 0;
  863. pvec->page[pvec->nr].sp = sp;
  864. pvec->page[pvec->nr].idx = idx;
  865. pvec->nr++;
  866. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  867. }
  868. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  869. struct kvm_mmu_pages *pvec)
  870. {
  871. int i, ret, nr_unsync_leaf = 0;
  872. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  873. u64 ent = sp->spt[i];
  874. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  875. struct kvm_mmu_page *child;
  876. child = page_header(ent & PT64_BASE_ADDR_MASK);
  877. if (child->unsync_children) {
  878. if (mmu_pages_add(pvec, child, i))
  879. return -ENOSPC;
  880. ret = __mmu_unsync_walk(child, pvec);
  881. if (!ret)
  882. __clear_bit(i, sp->unsync_child_bitmap);
  883. else if (ret > 0)
  884. nr_unsync_leaf += ret;
  885. else
  886. return ret;
  887. }
  888. if (child->unsync) {
  889. nr_unsync_leaf++;
  890. if (mmu_pages_add(pvec, child, i))
  891. return -ENOSPC;
  892. }
  893. }
  894. }
  895. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  896. sp->unsync_children = 0;
  897. return nr_unsync_leaf;
  898. }
  899. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  900. struct kvm_mmu_pages *pvec)
  901. {
  902. if (!sp->unsync_children)
  903. return 0;
  904. mmu_pages_add(pvec, sp, 0);
  905. return __mmu_unsync_walk(sp, pvec);
  906. }
  907. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  908. {
  909. unsigned index;
  910. struct hlist_head *bucket;
  911. struct kvm_mmu_page *sp;
  912. struct hlist_node *node;
  913. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  914. index = kvm_page_table_hashfn(gfn);
  915. bucket = &kvm->arch.mmu_page_hash[index];
  916. hlist_for_each_entry(sp, node, bucket, hash_link)
  917. if (sp->gfn == gfn && !sp->role.direct
  918. && !sp->role.invalid) {
  919. pgprintk("%s: found role %x\n",
  920. __func__, sp->role.word);
  921. return sp;
  922. }
  923. return NULL;
  924. }
  925. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  926. {
  927. WARN_ON(!sp->unsync);
  928. sp->unsync = 0;
  929. --kvm->stat.mmu_unsync;
  930. }
  931. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  932. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  933. {
  934. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  935. kvm_mmu_zap_page(vcpu->kvm, sp);
  936. return 1;
  937. }
  938. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  939. kvm_flush_remote_tlbs(vcpu->kvm);
  940. kvm_unlink_unsync_page(vcpu->kvm, sp);
  941. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  942. kvm_mmu_zap_page(vcpu->kvm, sp);
  943. return 1;
  944. }
  945. kvm_mmu_flush_tlb(vcpu);
  946. return 0;
  947. }
  948. struct mmu_page_path {
  949. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  950. unsigned int idx[PT64_ROOT_LEVEL-1];
  951. };
  952. #define for_each_sp(pvec, sp, parents, i) \
  953. for (i = mmu_pages_next(&pvec, &parents, -1), \
  954. sp = pvec.page[i].sp; \
  955. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  956. i = mmu_pages_next(&pvec, &parents, i))
  957. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  958. struct mmu_page_path *parents,
  959. int i)
  960. {
  961. int n;
  962. for (n = i+1; n < pvec->nr; n++) {
  963. struct kvm_mmu_page *sp = pvec->page[n].sp;
  964. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  965. parents->idx[0] = pvec->page[n].idx;
  966. return n;
  967. }
  968. parents->parent[sp->role.level-2] = sp;
  969. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  970. }
  971. return n;
  972. }
  973. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  974. {
  975. struct kvm_mmu_page *sp;
  976. unsigned int level = 0;
  977. do {
  978. unsigned int idx = parents->idx[level];
  979. sp = parents->parent[level];
  980. if (!sp)
  981. return;
  982. --sp->unsync_children;
  983. WARN_ON((int)sp->unsync_children < 0);
  984. __clear_bit(idx, sp->unsync_child_bitmap);
  985. level++;
  986. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  987. }
  988. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  989. struct mmu_page_path *parents,
  990. struct kvm_mmu_pages *pvec)
  991. {
  992. parents->parent[parent->role.level-1] = NULL;
  993. pvec->nr = 0;
  994. }
  995. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  996. struct kvm_mmu_page *parent)
  997. {
  998. int i;
  999. struct kvm_mmu_page *sp;
  1000. struct mmu_page_path parents;
  1001. struct kvm_mmu_pages pages;
  1002. kvm_mmu_pages_init(parent, &parents, &pages);
  1003. while (mmu_unsync_walk(parent, &pages)) {
  1004. int protected = 0;
  1005. for_each_sp(pages, sp, parents, i)
  1006. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1007. if (protected)
  1008. kvm_flush_remote_tlbs(vcpu->kvm);
  1009. for_each_sp(pages, sp, parents, i) {
  1010. kvm_sync_page(vcpu, sp);
  1011. mmu_pages_clear_parents(&parents);
  1012. }
  1013. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1014. kvm_mmu_pages_init(parent, &parents, &pages);
  1015. }
  1016. }
  1017. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1018. gfn_t gfn,
  1019. gva_t gaddr,
  1020. unsigned level,
  1021. int direct,
  1022. unsigned access,
  1023. u64 *parent_pte)
  1024. {
  1025. union kvm_mmu_page_role role;
  1026. unsigned index;
  1027. unsigned quadrant;
  1028. struct hlist_head *bucket;
  1029. struct kvm_mmu_page *sp;
  1030. struct hlist_node *node, *tmp;
  1031. role = vcpu->arch.mmu.base_role;
  1032. role.level = level;
  1033. role.direct = direct;
  1034. role.access = access;
  1035. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1036. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1037. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1038. role.quadrant = quadrant;
  1039. }
  1040. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1041. gfn, role.word);
  1042. index = kvm_page_table_hashfn(gfn);
  1043. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1044. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1045. if (sp->gfn == gfn) {
  1046. if (sp->unsync)
  1047. if (kvm_sync_page(vcpu, sp))
  1048. continue;
  1049. if (sp->role.word != role.word)
  1050. continue;
  1051. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1052. if (sp->unsync_children) {
  1053. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1054. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1055. }
  1056. pgprintk("%s: found\n", __func__);
  1057. return sp;
  1058. }
  1059. ++vcpu->kvm->stat.mmu_cache_miss;
  1060. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1061. if (!sp)
  1062. return sp;
  1063. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1064. sp->gfn = gfn;
  1065. sp->role = role;
  1066. hlist_add_head(&sp->hash_link, bucket);
  1067. if (!direct) {
  1068. if (rmap_write_protect(vcpu->kvm, gfn))
  1069. kvm_flush_remote_tlbs(vcpu->kvm);
  1070. account_shadowed(vcpu->kvm, gfn);
  1071. }
  1072. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1073. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1074. else
  1075. nonpaging_prefetch_page(vcpu, sp);
  1076. return sp;
  1077. }
  1078. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1079. struct kvm_vcpu *vcpu, u64 addr)
  1080. {
  1081. iterator->addr = addr;
  1082. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1083. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1084. if (iterator->level == PT32E_ROOT_LEVEL) {
  1085. iterator->shadow_addr
  1086. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1087. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1088. --iterator->level;
  1089. if (!iterator->shadow_addr)
  1090. iterator->level = 0;
  1091. }
  1092. }
  1093. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1094. {
  1095. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1096. return false;
  1097. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1098. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1099. return true;
  1100. }
  1101. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1102. {
  1103. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1104. --iterator->level;
  1105. }
  1106. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1107. struct kvm_mmu_page *sp)
  1108. {
  1109. unsigned i;
  1110. u64 *pt;
  1111. u64 ent;
  1112. pt = sp->spt;
  1113. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1114. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1115. if (is_shadow_present_pte(pt[i]))
  1116. rmap_remove(kvm, &pt[i]);
  1117. pt[i] = shadow_trap_nonpresent_pte;
  1118. }
  1119. return;
  1120. }
  1121. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1122. ent = pt[i];
  1123. if (is_shadow_present_pte(ent)) {
  1124. if (!is_large_pte(ent)) {
  1125. ent &= PT64_BASE_ADDR_MASK;
  1126. mmu_page_remove_parent_pte(page_header(ent),
  1127. &pt[i]);
  1128. } else {
  1129. --kvm->stat.lpages;
  1130. rmap_remove(kvm, &pt[i]);
  1131. }
  1132. }
  1133. pt[i] = shadow_trap_nonpresent_pte;
  1134. }
  1135. }
  1136. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1137. {
  1138. mmu_page_remove_parent_pte(sp, parent_pte);
  1139. }
  1140. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1141. {
  1142. int i;
  1143. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1144. if (kvm->vcpus[i])
  1145. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1146. }
  1147. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1148. {
  1149. u64 *parent_pte;
  1150. while (sp->multimapped || sp->parent_pte) {
  1151. if (!sp->multimapped)
  1152. parent_pte = sp->parent_pte;
  1153. else {
  1154. struct kvm_pte_chain *chain;
  1155. chain = container_of(sp->parent_ptes.first,
  1156. struct kvm_pte_chain, link);
  1157. parent_pte = chain->parent_ptes[0];
  1158. }
  1159. BUG_ON(!parent_pte);
  1160. kvm_mmu_put_page(sp, parent_pte);
  1161. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1162. }
  1163. }
  1164. static int mmu_zap_unsync_children(struct kvm *kvm,
  1165. struct kvm_mmu_page *parent)
  1166. {
  1167. int i, zapped = 0;
  1168. struct mmu_page_path parents;
  1169. struct kvm_mmu_pages pages;
  1170. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1171. return 0;
  1172. kvm_mmu_pages_init(parent, &parents, &pages);
  1173. while (mmu_unsync_walk(parent, &pages)) {
  1174. struct kvm_mmu_page *sp;
  1175. for_each_sp(pages, sp, parents, i) {
  1176. kvm_mmu_zap_page(kvm, sp);
  1177. mmu_pages_clear_parents(&parents);
  1178. }
  1179. zapped += pages.nr;
  1180. kvm_mmu_pages_init(parent, &parents, &pages);
  1181. }
  1182. return zapped;
  1183. }
  1184. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1185. {
  1186. int ret;
  1187. ++kvm->stat.mmu_shadow_zapped;
  1188. ret = mmu_zap_unsync_children(kvm, sp);
  1189. kvm_mmu_page_unlink_children(kvm, sp);
  1190. kvm_mmu_unlink_parents(kvm, sp);
  1191. kvm_flush_remote_tlbs(kvm);
  1192. if (!sp->role.invalid && !sp->role.direct)
  1193. unaccount_shadowed(kvm, sp->gfn);
  1194. if (sp->unsync)
  1195. kvm_unlink_unsync_page(kvm, sp);
  1196. if (!sp->root_count) {
  1197. hlist_del(&sp->hash_link);
  1198. kvm_mmu_free_page(kvm, sp);
  1199. } else {
  1200. sp->role.invalid = 1;
  1201. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1202. kvm_reload_remote_mmus(kvm);
  1203. }
  1204. kvm_mmu_reset_last_pte_updated(kvm);
  1205. return ret;
  1206. }
  1207. /*
  1208. * Changing the number of mmu pages allocated to the vm
  1209. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1210. */
  1211. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1212. {
  1213. int used_pages;
  1214. used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
  1215. used_pages = max(0, used_pages);
  1216. /*
  1217. * If we set the number of mmu pages to be smaller be than the
  1218. * number of actived pages , we must to free some mmu pages before we
  1219. * change the value
  1220. */
  1221. if (used_pages > kvm_nr_mmu_pages) {
  1222. while (used_pages > kvm_nr_mmu_pages) {
  1223. struct kvm_mmu_page *page;
  1224. page = container_of(kvm->arch.active_mmu_pages.prev,
  1225. struct kvm_mmu_page, link);
  1226. kvm_mmu_zap_page(kvm, page);
  1227. used_pages--;
  1228. }
  1229. kvm->arch.n_free_mmu_pages = 0;
  1230. }
  1231. else
  1232. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1233. - kvm->arch.n_alloc_mmu_pages;
  1234. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1235. }
  1236. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1237. {
  1238. unsigned index;
  1239. struct hlist_head *bucket;
  1240. struct kvm_mmu_page *sp;
  1241. struct hlist_node *node, *n;
  1242. int r;
  1243. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1244. r = 0;
  1245. index = kvm_page_table_hashfn(gfn);
  1246. bucket = &kvm->arch.mmu_page_hash[index];
  1247. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1248. if (sp->gfn == gfn && !sp->role.direct) {
  1249. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1250. sp->role.word);
  1251. r = 1;
  1252. if (kvm_mmu_zap_page(kvm, sp))
  1253. n = bucket->first;
  1254. }
  1255. return r;
  1256. }
  1257. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1258. {
  1259. unsigned index;
  1260. struct hlist_head *bucket;
  1261. struct kvm_mmu_page *sp;
  1262. struct hlist_node *node, *nn;
  1263. index = kvm_page_table_hashfn(gfn);
  1264. bucket = &kvm->arch.mmu_page_hash[index];
  1265. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1266. if (sp->gfn == gfn && !sp->role.direct
  1267. && !sp->role.invalid) {
  1268. pgprintk("%s: zap %lx %x\n",
  1269. __func__, gfn, sp->role.word);
  1270. kvm_mmu_zap_page(kvm, sp);
  1271. }
  1272. }
  1273. }
  1274. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1275. {
  1276. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1277. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1278. __set_bit(slot, sp->slot_bitmap);
  1279. }
  1280. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1281. {
  1282. int i;
  1283. u64 *pt = sp->spt;
  1284. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1285. return;
  1286. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1287. if (pt[i] == shadow_notrap_nonpresent_pte)
  1288. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1289. }
  1290. }
  1291. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1292. {
  1293. struct page *page;
  1294. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1295. if (gpa == UNMAPPED_GVA)
  1296. return NULL;
  1297. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1298. return page;
  1299. }
  1300. /*
  1301. * The function is based on mtrr_type_lookup() in
  1302. * arch/x86/kernel/cpu/mtrr/generic.c
  1303. */
  1304. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1305. u64 start, u64 end)
  1306. {
  1307. int i;
  1308. u64 base, mask;
  1309. u8 prev_match, curr_match;
  1310. int num_var_ranges = KVM_NR_VAR_MTRR;
  1311. if (!mtrr_state->enabled)
  1312. return 0xFF;
  1313. /* Make end inclusive end, instead of exclusive */
  1314. end--;
  1315. /* Look in fixed ranges. Just return the type as per start */
  1316. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1317. int idx;
  1318. if (start < 0x80000) {
  1319. idx = 0;
  1320. idx += (start >> 16);
  1321. return mtrr_state->fixed_ranges[idx];
  1322. } else if (start < 0xC0000) {
  1323. idx = 1 * 8;
  1324. idx += ((start - 0x80000) >> 14);
  1325. return mtrr_state->fixed_ranges[idx];
  1326. } else if (start < 0x1000000) {
  1327. idx = 3 * 8;
  1328. idx += ((start - 0xC0000) >> 12);
  1329. return mtrr_state->fixed_ranges[idx];
  1330. }
  1331. }
  1332. /*
  1333. * Look in variable ranges
  1334. * Look of multiple ranges matching this address and pick type
  1335. * as per MTRR precedence
  1336. */
  1337. if (!(mtrr_state->enabled & 2))
  1338. return mtrr_state->def_type;
  1339. prev_match = 0xFF;
  1340. for (i = 0; i < num_var_ranges; ++i) {
  1341. unsigned short start_state, end_state;
  1342. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1343. continue;
  1344. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1345. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1346. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1347. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1348. start_state = ((start & mask) == (base & mask));
  1349. end_state = ((end & mask) == (base & mask));
  1350. if (start_state != end_state)
  1351. return 0xFE;
  1352. if ((start & mask) != (base & mask))
  1353. continue;
  1354. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1355. if (prev_match == 0xFF) {
  1356. prev_match = curr_match;
  1357. continue;
  1358. }
  1359. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1360. curr_match == MTRR_TYPE_UNCACHABLE)
  1361. return MTRR_TYPE_UNCACHABLE;
  1362. if ((prev_match == MTRR_TYPE_WRBACK &&
  1363. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1364. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1365. curr_match == MTRR_TYPE_WRBACK)) {
  1366. prev_match = MTRR_TYPE_WRTHROUGH;
  1367. curr_match = MTRR_TYPE_WRTHROUGH;
  1368. }
  1369. if (prev_match != curr_match)
  1370. return MTRR_TYPE_UNCACHABLE;
  1371. }
  1372. if (prev_match != 0xFF)
  1373. return prev_match;
  1374. return mtrr_state->def_type;
  1375. }
  1376. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1377. {
  1378. u8 mtrr;
  1379. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1380. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1381. if (mtrr == 0xfe || mtrr == 0xff)
  1382. mtrr = MTRR_TYPE_WRBACK;
  1383. return mtrr;
  1384. }
  1385. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1386. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1387. {
  1388. unsigned index;
  1389. struct hlist_head *bucket;
  1390. struct kvm_mmu_page *s;
  1391. struct hlist_node *node, *n;
  1392. index = kvm_page_table_hashfn(sp->gfn);
  1393. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1394. /* don't unsync if pagetable is shadowed with multiple roles */
  1395. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1396. if (s->gfn != sp->gfn || s->role.direct)
  1397. continue;
  1398. if (s->role.word != sp->role.word)
  1399. return 1;
  1400. }
  1401. ++vcpu->kvm->stat.mmu_unsync;
  1402. sp->unsync = 1;
  1403. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1404. mmu_convert_notrap(sp);
  1405. return 0;
  1406. }
  1407. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1408. bool can_unsync)
  1409. {
  1410. struct kvm_mmu_page *shadow;
  1411. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1412. if (shadow) {
  1413. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1414. return 1;
  1415. if (shadow->unsync)
  1416. return 0;
  1417. if (can_unsync && oos_shadow)
  1418. return kvm_unsync_page(vcpu, shadow);
  1419. return 1;
  1420. }
  1421. return 0;
  1422. }
  1423. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1424. unsigned pte_access, int user_fault,
  1425. int write_fault, int dirty, int largepage,
  1426. gfn_t gfn, pfn_t pfn, bool speculative,
  1427. bool can_unsync)
  1428. {
  1429. u64 spte;
  1430. int ret = 0;
  1431. /*
  1432. * We don't set the accessed bit, since we sometimes want to see
  1433. * whether the guest actually used the pte (in order to detect
  1434. * demand paging).
  1435. */
  1436. spte = shadow_base_present_pte | shadow_dirty_mask;
  1437. if (!speculative)
  1438. spte |= shadow_accessed_mask;
  1439. if (!dirty)
  1440. pte_access &= ~ACC_WRITE_MASK;
  1441. if (pte_access & ACC_EXEC_MASK)
  1442. spte |= shadow_x_mask;
  1443. else
  1444. spte |= shadow_nx_mask;
  1445. if (pte_access & ACC_USER_MASK)
  1446. spte |= shadow_user_mask;
  1447. if (largepage)
  1448. spte |= PT_PAGE_SIZE_MASK;
  1449. if (tdp_enabled)
  1450. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1451. kvm_is_mmio_pfn(pfn));
  1452. spte |= (u64)pfn << PAGE_SHIFT;
  1453. if ((pte_access & ACC_WRITE_MASK)
  1454. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1455. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1456. ret = 1;
  1457. spte = shadow_trap_nonpresent_pte;
  1458. goto set_pte;
  1459. }
  1460. spte |= PT_WRITABLE_MASK;
  1461. /*
  1462. * Optimization: for pte sync, if spte was writable the hash
  1463. * lookup is unnecessary (and expensive). Write protection
  1464. * is responsibility of mmu_get_page / kvm_sync_page.
  1465. * Same reasoning can be applied to dirty page accounting.
  1466. */
  1467. if (!can_unsync && is_writeble_pte(*shadow_pte))
  1468. goto set_pte;
  1469. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1470. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1471. __func__, gfn);
  1472. ret = 1;
  1473. pte_access &= ~ACC_WRITE_MASK;
  1474. if (is_writeble_pte(spte))
  1475. spte &= ~PT_WRITABLE_MASK;
  1476. }
  1477. }
  1478. if (pte_access & ACC_WRITE_MASK)
  1479. mark_page_dirty(vcpu->kvm, gfn);
  1480. set_pte:
  1481. set_shadow_pte(shadow_pte, spte);
  1482. return ret;
  1483. }
  1484. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1485. unsigned pt_access, unsigned pte_access,
  1486. int user_fault, int write_fault, int dirty,
  1487. int *ptwrite, int largepage, gfn_t gfn,
  1488. pfn_t pfn, bool speculative)
  1489. {
  1490. int was_rmapped = 0;
  1491. int was_writeble = is_writeble_pte(*shadow_pte);
  1492. int rmap_count;
  1493. pgprintk("%s: spte %llx access %x write_fault %d"
  1494. " user_fault %d gfn %lx\n",
  1495. __func__, *shadow_pte, pt_access,
  1496. write_fault, user_fault, gfn);
  1497. if (is_rmap_pte(*shadow_pte)) {
  1498. /*
  1499. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1500. * the parent of the now unreachable PTE.
  1501. */
  1502. if (largepage && !is_large_pte(*shadow_pte)) {
  1503. struct kvm_mmu_page *child;
  1504. u64 pte = *shadow_pte;
  1505. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1506. mmu_page_remove_parent_pte(child, shadow_pte);
  1507. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1508. pgprintk("hfn old %lx new %lx\n",
  1509. spte_to_pfn(*shadow_pte), pfn);
  1510. rmap_remove(vcpu->kvm, shadow_pte);
  1511. } else
  1512. was_rmapped = 1;
  1513. }
  1514. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1515. dirty, largepage, gfn, pfn, speculative, true)) {
  1516. if (write_fault)
  1517. *ptwrite = 1;
  1518. kvm_x86_ops->tlb_flush(vcpu);
  1519. }
  1520. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1521. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1522. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1523. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1524. *shadow_pte, shadow_pte);
  1525. if (!was_rmapped && is_large_pte(*shadow_pte))
  1526. ++vcpu->kvm->stat.lpages;
  1527. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1528. if (!was_rmapped) {
  1529. rmap_count = rmap_add(vcpu, shadow_pte, gfn, largepage);
  1530. if (!is_rmap_pte(*shadow_pte))
  1531. kvm_release_pfn_clean(pfn);
  1532. if (rmap_count > RMAP_RECYCLE_THRESHOLD)
  1533. rmap_recycle(vcpu, gfn, largepage);
  1534. } else {
  1535. if (was_writeble)
  1536. kvm_release_pfn_dirty(pfn);
  1537. else
  1538. kvm_release_pfn_clean(pfn);
  1539. }
  1540. if (speculative) {
  1541. vcpu->arch.last_pte_updated = shadow_pte;
  1542. vcpu->arch.last_pte_gfn = gfn;
  1543. }
  1544. }
  1545. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1546. {
  1547. }
  1548. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1549. int largepage, gfn_t gfn, pfn_t pfn)
  1550. {
  1551. struct kvm_shadow_walk_iterator iterator;
  1552. struct kvm_mmu_page *sp;
  1553. int pt_write = 0;
  1554. gfn_t pseudo_gfn;
  1555. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1556. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1557. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1558. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1559. 0, write, 1, &pt_write,
  1560. largepage, gfn, pfn, false);
  1561. ++vcpu->stat.pf_fixed;
  1562. break;
  1563. }
  1564. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1565. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1566. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1567. iterator.level - 1,
  1568. 1, ACC_ALL, iterator.sptep);
  1569. if (!sp) {
  1570. pgprintk("nonpaging_map: ENOMEM\n");
  1571. kvm_release_pfn_clean(pfn);
  1572. return -ENOMEM;
  1573. }
  1574. set_shadow_pte(iterator.sptep,
  1575. __pa(sp->spt)
  1576. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1577. | shadow_user_mask | shadow_x_mask);
  1578. }
  1579. }
  1580. return pt_write;
  1581. }
  1582. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1583. {
  1584. int r;
  1585. int largepage = 0;
  1586. pfn_t pfn;
  1587. unsigned long mmu_seq;
  1588. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1589. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1590. largepage = 1;
  1591. }
  1592. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1593. smp_rmb();
  1594. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1595. /* mmio */
  1596. if (is_error_pfn(pfn)) {
  1597. kvm_release_pfn_clean(pfn);
  1598. return 1;
  1599. }
  1600. spin_lock(&vcpu->kvm->mmu_lock);
  1601. if (mmu_notifier_retry(vcpu, mmu_seq))
  1602. goto out_unlock;
  1603. kvm_mmu_free_some_pages(vcpu);
  1604. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1605. spin_unlock(&vcpu->kvm->mmu_lock);
  1606. return r;
  1607. out_unlock:
  1608. spin_unlock(&vcpu->kvm->mmu_lock);
  1609. kvm_release_pfn_clean(pfn);
  1610. return 0;
  1611. }
  1612. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1613. {
  1614. int i;
  1615. struct kvm_mmu_page *sp;
  1616. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1617. return;
  1618. spin_lock(&vcpu->kvm->mmu_lock);
  1619. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1620. hpa_t root = vcpu->arch.mmu.root_hpa;
  1621. sp = page_header(root);
  1622. --sp->root_count;
  1623. if (!sp->root_count && sp->role.invalid)
  1624. kvm_mmu_zap_page(vcpu->kvm, sp);
  1625. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1626. spin_unlock(&vcpu->kvm->mmu_lock);
  1627. return;
  1628. }
  1629. for (i = 0; i < 4; ++i) {
  1630. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1631. if (root) {
  1632. root &= PT64_BASE_ADDR_MASK;
  1633. sp = page_header(root);
  1634. --sp->root_count;
  1635. if (!sp->root_count && sp->role.invalid)
  1636. kvm_mmu_zap_page(vcpu->kvm, sp);
  1637. }
  1638. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1639. }
  1640. spin_unlock(&vcpu->kvm->mmu_lock);
  1641. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1642. }
  1643. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1644. {
  1645. int ret = 0;
  1646. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1647. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1648. ret = 1;
  1649. }
  1650. return ret;
  1651. }
  1652. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1653. {
  1654. int i;
  1655. gfn_t root_gfn;
  1656. struct kvm_mmu_page *sp;
  1657. int direct = 0;
  1658. u64 pdptr;
  1659. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1660. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1661. hpa_t root = vcpu->arch.mmu.root_hpa;
  1662. ASSERT(!VALID_PAGE(root));
  1663. if (tdp_enabled)
  1664. direct = 1;
  1665. if (mmu_check_root(vcpu, root_gfn))
  1666. return 1;
  1667. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1668. PT64_ROOT_LEVEL, direct,
  1669. ACC_ALL, NULL);
  1670. root = __pa(sp->spt);
  1671. ++sp->root_count;
  1672. vcpu->arch.mmu.root_hpa = root;
  1673. return 0;
  1674. }
  1675. direct = !is_paging(vcpu);
  1676. if (tdp_enabled)
  1677. direct = 1;
  1678. for (i = 0; i < 4; ++i) {
  1679. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1680. ASSERT(!VALID_PAGE(root));
  1681. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1682. pdptr = kvm_pdptr_read(vcpu, i);
  1683. if (!is_present_pte(pdptr)) {
  1684. vcpu->arch.mmu.pae_root[i] = 0;
  1685. continue;
  1686. }
  1687. root_gfn = pdptr >> PAGE_SHIFT;
  1688. } else if (vcpu->arch.mmu.root_level == 0)
  1689. root_gfn = 0;
  1690. if (mmu_check_root(vcpu, root_gfn))
  1691. return 1;
  1692. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1693. PT32_ROOT_LEVEL, direct,
  1694. ACC_ALL, NULL);
  1695. root = __pa(sp->spt);
  1696. ++sp->root_count;
  1697. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1698. }
  1699. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1700. return 0;
  1701. }
  1702. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1703. {
  1704. int i;
  1705. struct kvm_mmu_page *sp;
  1706. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1707. return;
  1708. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1709. hpa_t root = vcpu->arch.mmu.root_hpa;
  1710. sp = page_header(root);
  1711. mmu_sync_children(vcpu, sp);
  1712. return;
  1713. }
  1714. for (i = 0; i < 4; ++i) {
  1715. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1716. if (root && VALID_PAGE(root)) {
  1717. root &= PT64_BASE_ADDR_MASK;
  1718. sp = page_header(root);
  1719. mmu_sync_children(vcpu, sp);
  1720. }
  1721. }
  1722. }
  1723. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1724. {
  1725. spin_lock(&vcpu->kvm->mmu_lock);
  1726. mmu_sync_roots(vcpu);
  1727. spin_unlock(&vcpu->kvm->mmu_lock);
  1728. }
  1729. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1730. {
  1731. return vaddr;
  1732. }
  1733. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1734. u32 error_code)
  1735. {
  1736. gfn_t gfn;
  1737. int r;
  1738. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1739. r = mmu_topup_memory_caches(vcpu);
  1740. if (r)
  1741. return r;
  1742. ASSERT(vcpu);
  1743. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1744. gfn = gva >> PAGE_SHIFT;
  1745. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1746. error_code & PFERR_WRITE_MASK, gfn);
  1747. }
  1748. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1749. u32 error_code)
  1750. {
  1751. pfn_t pfn;
  1752. int r;
  1753. int largepage = 0;
  1754. gfn_t gfn = gpa >> PAGE_SHIFT;
  1755. unsigned long mmu_seq;
  1756. ASSERT(vcpu);
  1757. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1758. r = mmu_topup_memory_caches(vcpu);
  1759. if (r)
  1760. return r;
  1761. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1762. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1763. largepage = 1;
  1764. }
  1765. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1766. smp_rmb();
  1767. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1768. if (is_error_pfn(pfn)) {
  1769. kvm_release_pfn_clean(pfn);
  1770. return 1;
  1771. }
  1772. spin_lock(&vcpu->kvm->mmu_lock);
  1773. if (mmu_notifier_retry(vcpu, mmu_seq))
  1774. goto out_unlock;
  1775. kvm_mmu_free_some_pages(vcpu);
  1776. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1777. largepage, gfn, pfn);
  1778. spin_unlock(&vcpu->kvm->mmu_lock);
  1779. return r;
  1780. out_unlock:
  1781. spin_unlock(&vcpu->kvm->mmu_lock);
  1782. kvm_release_pfn_clean(pfn);
  1783. return 0;
  1784. }
  1785. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1786. {
  1787. mmu_free_roots(vcpu);
  1788. }
  1789. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1790. {
  1791. struct kvm_mmu *context = &vcpu->arch.mmu;
  1792. context->new_cr3 = nonpaging_new_cr3;
  1793. context->page_fault = nonpaging_page_fault;
  1794. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1795. context->free = nonpaging_free;
  1796. context->prefetch_page = nonpaging_prefetch_page;
  1797. context->sync_page = nonpaging_sync_page;
  1798. context->invlpg = nonpaging_invlpg;
  1799. context->root_level = 0;
  1800. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1801. context->root_hpa = INVALID_PAGE;
  1802. return 0;
  1803. }
  1804. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1805. {
  1806. ++vcpu->stat.tlb_flush;
  1807. kvm_x86_ops->tlb_flush(vcpu);
  1808. }
  1809. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1810. {
  1811. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1812. mmu_free_roots(vcpu);
  1813. }
  1814. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1815. u64 addr,
  1816. u32 err_code)
  1817. {
  1818. kvm_inject_page_fault(vcpu, addr, err_code);
  1819. }
  1820. static void paging_free(struct kvm_vcpu *vcpu)
  1821. {
  1822. nonpaging_free(vcpu);
  1823. }
  1824. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1825. {
  1826. int bit7;
  1827. bit7 = (gpte >> 7) & 1;
  1828. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1829. }
  1830. #define PTTYPE 64
  1831. #include "paging_tmpl.h"
  1832. #undef PTTYPE
  1833. #define PTTYPE 32
  1834. #include "paging_tmpl.h"
  1835. #undef PTTYPE
  1836. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1837. {
  1838. struct kvm_mmu *context = &vcpu->arch.mmu;
  1839. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1840. u64 exb_bit_rsvd = 0;
  1841. if (!is_nx(vcpu))
  1842. exb_bit_rsvd = rsvd_bits(63, 63);
  1843. switch (level) {
  1844. case PT32_ROOT_LEVEL:
  1845. /* no rsvd bits for 2 level 4K page table entries */
  1846. context->rsvd_bits_mask[0][1] = 0;
  1847. context->rsvd_bits_mask[0][0] = 0;
  1848. if (is_cpuid_PSE36())
  1849. /* 36bits PSE 4MB page */
  1850. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1851. else
  1852. /* 32 bits PSE 4MB page */
  1853. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1854. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1855. break;
  1856. case PT32E_ROOT_LEVEL:
  1857. context->rsvd_bits_mask[0][2] =
  1858. rsvd_bits(maxphyaddr, 63) |
  1859. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1860. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1861. rsvd_bits(maxphyaddr, 62); /* PDE */
  1862. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1863. rsvd_bits(maxphyaddr, 62); /* PTE */
  1864. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1865. rsvd_bits(maxphyaddr, 62) |
  1866. rsvd_bits(13, 20); /* large page */
  1867. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1868. break;
  1869. case PT64_ROOT_LEVEL:
  1870. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1871. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1872. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1873. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1874. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1875. rsvd_bits(maxphyaddr, 51);
  1876. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1877. rsvd_bits(maxphyaddr, 51);
  1878. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1879. context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
  1880. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1881. rsvd_bits(maxphyaddr, 51) |
  1882. rsvd_bits(13, 20); /* large page */
  1883. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1884. break;
  1885. }
  1886. }
  1887. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1888. {
  1889. struct kvm_mmu *context = &vcpu->arch.mmu;
  1890. ASSERT(is_pae(vcpu));
  1891. context->new_cr3 = paging_new_cr3;
  1892. context->page_fault = paging64_page_fault;
  1893. context->gva_to_gpa = paging64_gva_to_gpa;
  1894. context->prefetch_page = paging64_prefetch_page;
  1895. context->sync_page = paging64_sync_page;
  1896. context->invlpg = paging64_invlpg;
  1897. context->free = paging_free;
  1898. context->root_level = level;
  1899. context->shadow_root_level = level;
  1900. context->root_hpa = INVALID_PAGE;
  1901. return 0;
  1902. }
  1903. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1904. {
  1905. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1906. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1907. }
  1908. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1909. {
  1910. struct kvm_mmu *context = &vcpu->arch.mmu;
  1911. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1912. context->new_cr3 = paging_new_cr3;
  1913. context->page_fault = paging32_page_fault;
  1914. context->gva_to_gpa = paging32_gva_to_gpa;
  1915. context->free = paging_free;
  1916. context->prefetch_page = paging32_prefetch_page;
  1917. context->sync_page = paging32_sync_page;
  1918. context->invlpg = paging32_invlpg;
  1919. context->root_level = PT32_ROOT_LEVEL;
  1920. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1921. context->root_hpa = INVALID_PAGE;
  1922. return 0;
  1923. }
  1924. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1925. {
  1926. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1927. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1928. }
  1929. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1930. {
  1931. struct kvm_mmu *context = &vcpu->arch.mmu;
  1932. context->new_cr3 = nonpaging_new_cr3;
  1933. context->page_fault = tdp_page_fault;
  1934. context->free = nonpaging_free;
  1935. context->prefetch_page = nonpaging_prefetch_page;
  1936. context->sync_page = nonpaging_sync_page;
  1937. context->invlpg = nonpaging_invlpg;
  1938. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1939. context->root_hpa = INVALID_PAGE;
  1940. if (!is_paging(vcpu)) {
  1941. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1942. context->root_level = 0;
  1943. } else if (is_long_mode(vcpu)) {
  1944. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1945. context->gva_to_gpa = paging64_gva_to_gpa;
  1946. context->root_level = PT64_ROOT_LEVEL;
  1947. } else if (is_pae(vcpu)) {
  1948. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1949. context->gva_to_gpa = paging64_gva_to_gpa;
  1950. context->root_level = PT32E_ROOT_LEVEL;
  1951. } else {
  1952. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1953. context->gva_to_gpa = paging32_gva_to_gpa;
  1954. context->root_level = PT32_ROOT_LEVEL;
  1955. }
  1956. return 0;
  1957. }
  1958. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1959. {
  1960. int r;
  1961. ASSERT(vcpu);
  1962. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1963. if (!is_paging(vcpu))
  1964. r = nonpaging_init_context(vcpu);
  1965. else if (is_long_mode(vcpu))
  1966. r = paging64_init_context(vcpu);
  1967. else if (is_pae(vcpu))
  1968. r = paging32E_init_context(vcpu);
  1969. else
  1970. r = paging32_init_context(vcpu);
  1971. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1972. return r;
  1973. }
  1974. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1975. {
  1976. vcpu->arch.update_pte.pfn = bad_pfn;
  1977. if (tdp_enabled)
  1978. return init_kvm_tdp_mmu(vcpu);
  1979. else
  1980. return init_kvm_softmmu(vcpu);
  1981. }
  1982. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1983. {
  1984. ASSERT(vcpu);
  1985. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1986. vcpu->arch.mmu.free(vcpu);
  1987. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1988. }
  1989. }
  1990. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1991. {
  1992. destroy_kvm_mmu(vcpu);
  1993. return init_kvm_mmu(vcpu);
  1994. }
  1995. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1996. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1997. {
  1998. int r;
  1999. r = mmu_topup_memory_caches(vcpu);
  2000. if (r)
  2001. goto out;
  2002. spin_lock(&vcpu->kvm->mmu_lock);
  2003. kvm_mmu_free_some_pages(vcpu);
  2004. r = mmu_alloc_roots(vcpu);
  2005. mmu_sync_roots(vcpu);
  2006. spin_unlock(&vcpu->kvm->mmu_lock);
  2007. if (r)
  2008. goto out;
  2009. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2010. kvm_mmu_flush_tlb(vcpu);
  2011. out:
  2012. return r;
  2013. }
  2014. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2015. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2016. {
  2017. mmu_free_roots(vcpu);
  2018. }
  2019. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2020. struct kvm_mmu_page *sp,
  2021. u64 *spte)
  2022. {
  2023. u64 pte;
  2024. struct kvm_mmu_page *child;
  2025. pte = *spte;
  2026. if (is_shadow_present_pte(pte)) {
  2027. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  2028. is_large_pte(pte))
  2029. rmap_remove(vcpu->kvm, spte);
  2030. else {
  2031. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2032. mmu_page_remove_parent_pte(child, spte);
  2033. }
  2034. }
  2035. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  2036. if (is_large_pte(pte))
  2037. --vcpu->kvm->stat.lpages;
  2038. }
  2039. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2040. struct kvm_mmu_page *sp,
  2041. u64 *spte,
  2042. const void *new)
  2043. {
  2044. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2045. if (!vcpu->arch.update_pte.largepage ||
  2046. sp->role.glevels == PT32_ROOT_LEVEL) {
  2047. ++vcpu->kvm->stat.mmu_pde_zapped;
  2048. return;
  2049. }
  2050. }
  2051. ++vcpu->kvm->stat.mmu_pte_updated;
  2052. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2053. paging32_update_pte(vcpu, sp, spte, new);
  2054. else
  2055. paging64_update_pte(vcpu, sp, spte, new);
  2056. }
  2057. static bool need_remote_flush(u64 old, u64 new)
  2058. {
  2059. if (!is_shadow_present_pte(old))
  2060. return false;
  2061. if (!is_shadow_present_pte(new))
  2062. return true;
  2063. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2064. return true;
  2065. old ^= PT64_NX_MASK;
  2066. new ^= PT64_NX_MASK;
  2067. return (old & ~new & PT64_PERM_MASK) != 0;
  2068. }
  2069. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2070. {
  2071. if (need_remote_flush(old, new))
  2072. kvm_flush_remote_tlbs(vcpu->kvm);
  2073. else
  2074. kvm_mmu_flush_tlb(vcpu);
  2075. }
  2076. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2077. {
  2078. u64 *spte = vcpu->arch.last_pte_updated;
  2079. return !!(spte && (*spte & shadow_accessed_mask));
  2080. }
  2081. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2082. const u8 *new, int bytes)
  2083. {
  2084. gfn_t gfn;
  2085. int r;
  2086. u64 gpte = 0;
  2087. pfn_t pfn;
  2088. vcpu->arch.update_pte.largepage = 0;
  2089. if (bytes != 4 && bytes != 8)
  2090. return;
  2091. /*
  2092. * Assume that the pte write on a page table of the same type
  2093. * as the current vcpu paging mode. This is nearly always true
  2094. * (might be false while changing modes). Note it is verified later
  2095. * by update_pte().
  2096. */
  2097. if (is_pae(vcpu)) {
  2098. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2099. if ((bytes == 4) && (gpa % 4 == 0)) {
  2100. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2101. if (r)
  2102. return;
  2103. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2104. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2105. memcpy((void *)&gpte, new, 8);
  2106. }
  2107. } else {
  2108. if ((bytes == 4) && (gpa % 4 == 0))
  2109. memcpy((void *)&gpte, new, 4);
  2110. }
  2111. if (!is_present_pte(gpte))
  2112. return;
  2113. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2114. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2115. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2116. vcpu->arch.update_pte.largepage = 1;
  2117. }
  2118. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2119. smp_rmb();
  2120. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2121. if (is_error_pfn(pfn)) {
  2122. kvm_release_pfn_clean(pfn);
  2123. return;
  2124. }
  2125. vcpu->arch.update_pte.gfn = gfn;
  2126. vcpu->arch.update_pte.pfn = pfn;
  2127. }
  2128. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2129. {
  2130. u64 *spte = vcpu->arch.last_pte_updated;
  2131. if (spte
  2132. && vcpu->arch.last_pte_gfn == gfn
  2133. && shadow_accessed_mask
  2134. && !(*spte & shadow_accessed_mask)
  2135. && is_shadow_present_pte(*spte))
  2136. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2137. }
  2138. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2139. const u8 *new, int bytes,
  2140. bool guest_initiated)
  2141. {
  2142. gfn_t gfn = gpa >> PAGE_SHIFT;
  2143. struct kvm_mmu_page *sp;
  2144. struct hlist_node *node, *n;
  2145. struct hlist_head *bucket;
  2146. unsigned index;
  2147. u64 entry, gentry;
  2148. u64 *spte;
  2149. unsigned offset = offset_in_page(gpa);
  2150. unsigned pte_size;
  2151. unsigned page_offset;
  2152. unsigned misaligned;
  2153. unsigned quadrant;
  2154. int level;
  2155. int flooded = 0;
  2156. int npte;
  2157. int r;
  2158. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2159. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2160. spin_lock(&vcpu->kvm->mmu_lock);
  2161. kvm_mmu_access_page(vcpu, gfn);
  2162. kvm_mmu_free_some_pages(vcpu);
  2163. ++vcpu->kvm->stat.mmu_pte_write;
  2164. kvm_mmu_audit(vcpu, "pre pte write");
  2165. if (guest_initiated) {
  2166. if (gfn == vcpu->arch.last_pt_write_gfn
  2167. && !last_updated_pte_accessed(vcpu)) {
  2168. ++vcpu->arch.last_pt_write_count;
  2169. if (vcpu->arch.last_pt_write_count >= 3)
  2170. flooded = 1;
  2171. } else {
  2172. vcpu->arch.last_pt_write_gfn = gfn;
  2173. vcpu->arch.last_pt_write_count = 1;
  2174. vcpu->arch.last_pte_updated = NULL;
  2175. }
  2176. }
  2177. index = kvm_page_table_hashfn(gfn);
  2178. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2179. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2180. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2181. continue;
  2182. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2183. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2184. misaligned |= bytes < 4;
  2185. if (misaligned || flooded) {
  2186. /*
  2187. * Misaligned accesses are too much trouble to fix
  2188. * up; also, they usually indicate a page is not used
  2189. * as a page table.
  2190. *
  2191. * If we're seeing too many writes to a page,
  2192. * it may no longer be a page table, or we may be
  2193. * forking, in which case it is better to unmap the
  2194. * page.
  2195. */
  2196. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2197. gpa, bytes, sp->role.word);
  2198. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2199. n = bucket->first;
  2200. ++vcpu->kvm->stat.mmu_flooded;
  2201. continue;
  2202. }
  2203. page_offset = offset;
  2204. level = sp->role.level;
  2205. npte = 1;
  2206. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2207. page_offset <<= 1; /* 32->64 */
  2208. /*
  2209. * A 32-bit pde maps 4MB while the shadow pdes map
  2210. * only 2MB. So we need to double the offset again
  2211. * and zap two pdes instead of one.
  2212. */
  2213. if (level == PT32_ROOT_LEVEL) {
  2214. page_offset &= ~7; /* kill rounding error */
  2215. page_offset <<= 1;
  2216. npte = 2;
  2217. }
  2218. quadrant = page_offset >> PAGE_SHIFT;
  2219. page_offset &= ~PAGE_MASK;
  2220. if (quadrant != sp->role.quadrant)
  2221. continue;
  2222. }
  2223. spte = &sp->spt[page_offset / sizeof(*spte)];
  2224. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2225. gentry = 0;
  2226. r = kvm_read_guest_atomic(vcpu->kvm,
  2227. gpa & ~(u64)(pte_size - 1),
  2228. &gentry, pte_size);
  2229. new = (const void *)&gentry;
  2230. if (r < 0)
  2231. new = NULL;
  2232. }
  2233. while (npte--) {
  2234. entry = *spte;
  2235. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2236. if (new)
  2237. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2238. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2239. ++spte;
  2240. }
  2241. }
  2242. kvm_mmu_audit(vcpu, "post pte write");
  2243. spin_unlock(&vcpu->kvm->mmu_lock);
  2244. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2245. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2246. vcpu->arch.update_pte.pfn = bad_pfn;
  2247. }
  2248. }
  2249. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2250. {
  2251. gpa_t gpa;
  2252. int r;
  2253. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2254. spin_lock(&vcpu->kvm->mmu_lock);
  2255. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2256. spin_unlock(&vcpu->kvm->mmu_lock);
  2257. return r;
  2258. }
  2259. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2260. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2261. {
  2262. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2263. struct kvm_mmu_page *sp;
  2264. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2265. struct kvm_mmu_page, link);
  2266. kvm_mmu_zap_page(vcpu->kvm, sp);
  2267. ++vcpu->kvm->stat.mmu_recycled;
  2268. }
  2269. }
  2270. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2271. {
  2272. int r;
  2273. enum emulation_result er;
  2274. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2275. if (r < 0)
  2276. goto out;
  2277. if (!r) {
  2278. r = 1;
  2279. goto out;
  2280. }
  2281. r = mmu_topup_memory_caches(vcpu);
  2282. if (r)
  2283. goto out;
  2284. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2285. switch (er) {
  2286. case EMULATE_DONE:
  2287. return 1;
  2288. case EMULATE_DO_MMIO:
  2289. ++vcpu->stat.mmio_exits;
  2290. return 0;
  2291. case EMULATE_FAIL:
  2292. kvm_report_emulation_failure(vcpu, "pagetable");
  2293. return 1;
  2294. default:
  2295. BUG();
  2296. }
  2297. out:
  2298. return r;
  2299. }
  2300. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2301. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2302. {
  2303. vcpu->arch.mmu.invlpg(vcpu, gva);
  2304. kvm_mmu_flush_tlb(vcpu);
  2305. ++vcpu->stat.invlpg;
  2306. }
  2307. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2308. void kvm_enable_tdp(void)
  2309. {
  2310. tdp_enabled = true;
  2311. }
  2312. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2313. void kvm_disable_tdp(void)
  2314. {
  2315. tdp_enabled = false;
  2316. }
  2317. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2318. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2319. {
  2320. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2321. }
  2322. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2323. {
  2324. struct page *page;
  2325. int i;
  2326. ASSERT(vcpu);
  2327. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2328. vcpu->kvm->arch.n_free_mmu_pages =
  2329. vcpu->kvm->arch.n_requested_mmu_pages;
  2330. else
  2331. vcpu->kvm->arch.n_free_mmu_pages =
  2332. vcpu->kvm->arch.n_alloc_mmu_pages;
  2333. /*
  2334. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2335. * Therefore we need to allocate shadow page tables in the first
  2336. * 4GB of memory, which happens to fit the DMA32 zone.
  2337. */
  2338. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2339. if (!page)
  2340. goto error_1;
  2341. vcpu->arch.mmu.pae_root = page_address(page);
  2342. for (i = 0; i < 4; ++i)
  2343. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2344. return 0;
  2345. error_1:
  2346. free_mmu_pages(vcpu);
  2347. return -ENOMEM;
  2348. }
  2349. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2350. {
  2351. ASSERT(vcpu);
  2352. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2353. return alloc_mmu_pages(vcpu);
  2354. }
  2355. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2356. {
  2357. ASSERT(vcpu);
  2358. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2359. return init_kvm_mmu(vcpu);
  2360. }
  2361. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2362. {
  2363. ASSERT(vcpu);
  2364. destroy_kvm_mmu(vcpu);
  2365. free_mmu_pages(vcpu);
  2366. mmu_free_memory_caches(vcpu);
  2367. }
  2368. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2369. {
  2370. struct kvm_mmu_page *sp;
  2371. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2372. int i;
  2373. u64 *pt;
  2374. if (!test_bit(slot, sp->slot_bitmap))
  2375. continue;
  2376. pt = sp->spt;
  2377. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2378. /* avoid RMW */
  2379. if (pt[i] & PT_WRITABLE_MASK)
  2380. pt[i] &= ~PT_WRITABLE_MASK;
  2381. }
  2382. kvm_flush_remote_tlbs(kvm);
  2383. }
  2384. void kvm_mmu_zap_all(struct kvm *kvm)
  2385. {
  2386. struct kvm_mmu_page *sp, *node;
  2387. spin_lock(&kvm->mmu_lock);
  2388. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2389. if (kvm_mmu_zap_page(kvm, sp))
  2390. node = container_of(kvm->arch.active_mmu_pages.next,
  2391. struct kvm_mmu_page, link);
  2392. spin_unlock(&kvm->mmu_lock);
  2393. kvm_flush_remote_tlbs(kvm);
  2394. }
  2395. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2396. {
  2397. struct kvm_mmu_page *page;
  2398. page = container_of(kvm->arch.active_mmu_pages.prev,
  2399. struct kvm_mmu_page, link);
  2400. kvm_mmu_zap_page(kvm, page);
  2401. }
  2402. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2403. {
  2404. struct kvm *kvm;
  2405. struct kvm *kvm_freed = NULL;
  2406. int cache_count = 0;
  2407. spin_lock(&kvm_lock);
  2408. list_for_each_entry(kvm, &vm_list, vm_list) {
  2409. int npages;
  2410. if (!down_read_trylock(&kvm->slots_lock))
  2411. continue;
  2412. spin_lock(&kvm->mmu_lock);
  2413. npages = kvm->arch.n_alloc_mmu_pages -
  2414. kvm->arch.n_free_mmu_pages;
  2415. cache_count += npages;
  2416. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2417. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2418. cache_count--;
  2419. kvm_freed = kvm;
  2420. }
  2421. nr_to_scan--;
  2422. spin_unlock(&kvm->mmu_lock);
  2423. up_read(&kvm->slots_lock);
  2424. }
  2425. if (kvm_freed)
  2426. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2427. spin_unlock(&kvm_lock);
  2428. return cache_count;
  2429. }
  2430. static struct shrinker mmu_shrinker = {
  2431. .shrink = mmu_shrink,
  2432. .seeks = DEFAULT_SEEKS * 10,
  2433. };
  2434. static void mmu_destroy_caches(void)
  2435. {
  2436. if (pte_chain_cache)
  2437. kmem_cache_destroy(pte_chain_cache);
  2438. if (rmap_desc_cache)
  2439. kmem_cache_destroy(rmap_desc_cache);
  2440. if (mmu_page_header_cache)
  2441. kmem_cache_destroy(mmu_page_header_cache);
  2442. }
  2443. void kvm_mmu_module_exit(void)
  2444. {
  2445. mmu_destroy_caches();
  2446. unregister_shrinker(&mmu_shrinker);
  2447. }
  2448. int kvm_mmu_module_init(void)
  2449. {
  2450. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2451. sizeof(struct kvm_pte_chain),
  2452. 0, 0, NULL);
  2453. if (!pte_chain_cache)
  2454. goto nomem;
  2455. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2456. sizeof(struct kvm_rmap_desc),
  2457. 0, 0, NULL);
  2458. if (!rmap_desc_cache)
  2459. goto nomem;
  2460. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2461. sizeof(struct kvm_mmu_page),
  2462. 0, 0, NULL);
  2463. if (!mmu_page_header_cache)
  2464. goto nomem;
  2465. register_shrinker(&mmu_shrinker);
  2466. return 0;
  2467. nomem:
  2468. mmu_destroy_caches();
  2469. return -ENOMEM;
  2470. }
  2471. /*
  2472. * Caculate mmu pages needed for kvm.
  2473. */
  2474. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2475. {
  2476. int i;
  2477. unsigned int nr_mmu_pages;
  2478. unsigned int nr_pages = 0;
  2479. for (i = 0; i < kvm->nmemslots; i++)
  2480. nr_pages += kvm->memslots[i].npages;
  2481. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2482. nr_mmu_pages = max(nr_mmu_pages,
  2483. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2484. return nr_mmu_pages;
  2485. }
  2486. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2487. unsigned len)
  2488. {
  2489. if (len > buffer->len)
  2490. return NULL;
  2491. return buffer->ptr;
  2492. }
  2493. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2494. unsigned len)
  2495. {
  2496. void *ret;
  2497. ret = pv_mmu_peek_buffer(buffer, len);
  2498. if (!ret)
  2499. return ret;
  2500. buffer->ptr += len;
  2501. buffer->len -= len;
  2502. buffer->processed += len;
  2503. return ret;
  2504. }
  2505. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2506. gpa_t addr, gpa_t value)
  2507. {
  2508. int bytes = 8;
  2509. int r;
  2510. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2511. bytes = 4;
  2512. r = mmu_topup_memory_caches(vcpu);
  2513. if (r)
  2514. return r;
  2515. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2516. return -EFAULT;
  2517. return 1;
  2518. }
  2519. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2520. {
  2521. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2522. return 1;
  2523. }
  2524. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2525. {
  2526. spin_lock(&vcpu->kvm->mmu_lock);
  2527. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2528. spin_unlock(&vcpu->kvm->mmu_lock);
  2529. return 1;
  2530. }
  2531. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2532. struct kvm_pv_mmu_op_buffer *buffer)
  2533. {
  2534. struct kvm_mmu_op_header *header;
  2535. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2536. if (!header)
  2537. return 0;
  2538. switch (header->op) {
  2539. case KVM_MMU_OP_WRITE_PTE: {
  2540. struct kvm_mmu_op_write_pte *wpte;
  2541. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2542. if (!wpte)
  2543. return 0;
  2544. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2545. wpte->pte_val);
  2546. }
  2547. case KVM_MMU_OP_FLUSH_TLB: {
  2548. struct kvm_mmu_op_flush_tlb *ftlb;
  2549. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2550. if (!ftlb)
  2551. return 0;
  2552. return kvm_pv_mmu_flush_tlb(vcpu);
  2553. }
  2554. case KVM_MMU_OP_RELEASE_PT: {
  2555. struct kvm_mmu_op_release_pt *rpt;
  2556. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2557. if (!rpt)
  2558. return 0;
  2559. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2560. }
  2561. default: return 0;
  2562. }
  2563. }
  2564. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2565. gpa_t addr, unsigned long *ret)
  2566. {
  2567. int r;
  2568. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2569. buffer->ptr = buffer->buf;
  2570. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2571. buffer->processed = 0;
  2572. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2573. if (r)
  2574. goto out;
  2575. while (buffer->len) {
  2576. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2577. if (r < 0)
  2578. goto out;
  2579. if (r == 0)
  2580. break;
  2581. }
  2582. r = 1;
  2583. out:
  2584. *ret = buffer->processed;
  2585. return r;
  2586. }
  2587. #ifdef AUDIT
  2588. static const char *audit_msg;
  2589. static gva_t canonicalize(gva_t gva)
  2590. {
  2591. #ifdef CONFIG_X86_64
  2592. gva = (long long)(gva << 16) >> 16;
  2593. #endif
  2594. return gva;
  2595. }
  2596. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2597. gva_t va, int level)
  2598. {
  2599. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2600. int i;
  2601. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2602. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2603. u64 ent = pt[i];
  2604. if (ent == shadow_trap_nonpresent_pte)
  2605. continue;
  2606. va = canonicalize(va);
  2607. if (level > 1) {
  2608. if (ent == shadow_notrap_nonpresent_pte)
  2609. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2610. " in nonleaf level: levels %d gva %lx"
  2611. " level %d pte %llx\n", audit_msg,
  2612. vcpu->arch.mmu.root_level, va, level, ent);
  2613. else
  2614. audit_mappings_page(vcpu, ent, va, level - 1);
  2615. } else {
  2616. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2617. gfn_t gfn = gpa >> PAGE_SHIFT;
  2618. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2619. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2620. if (is_shadow_present_pte(ent)
  2621. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2622. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2623. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2624. audit_msg, vcpu->arch.mmu.root_level,
  2625. va, gpa, hpa, ent,
  2626. is_shadow_present_pte(ent));
  2627. else if (ent == shadow_notrap_nonpresent_pte
  2628. && !is_error_hpa(hpa))
  2629. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2630. " valid guest gva %lx\n", audit_msg, va);
  2631. kvm_release_pfn_clean(pfn);
  2632. }
  2633. }
  2634. }
  2635. static void audit_mappings(struct kvm_vcpu *vcpu)
  2636. {
  2637. unsigned i;
  2638. if (vcpu->arch.mmu.root_level == 4)
  2639. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2640. else
  2641. for (i = 0; i < 4; ++i)
  2642. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2643. audit_mappings_page(vcpu,
  2644. vcpu->arch.mmu.pae_root[i],
  2645. i << 30,
  2646. 2);
  2647. }
  2648. static int count_rmaps(struct kvm_vcpu *vcpu)
  2649. {
  2650. int nmaps = 0;
  2651. int i, j, k;
  2652. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2653. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2654. struct kvm_rmap_desc *d;
  2655. for (j = 0; j < m->npages; ++j) {
  2656. unsigned long *rmapp = &m->rmap[j];
  2657. if (!*rmapp)
  2658. continue;
  2659. if (!(*rmapp & 1)) {
  2660. ++nmaps;
  2661. continue;
  2662. }
  2663. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2664. while (d) {
  2665. for (k = 0; k < RMAP_EXT; ++k)
  2666. if (d->shadow_ptes[k])
  2667. ++nmaps;
  2668. else
  2669. break;
  2670. d = d->more;
  2671. }
  2672. }
  2673. }
  2674. return nmaps;
  2675. }
  2676. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2677. {
  2678. int nmaps = 0;
  2679. struct kvm_mmu_page *sp;
  2680. int i;
  2681. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2682. u64 *pt = sp->spt;
  2683. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2684. continue;
  2685. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2686. u64 ent = pt[i];
  2687. if (!(ent & PT_PRESENT_MASK))
  2688. continue;
  2689. if (!(ent & PT_WRITABLE_MASK))
  2690. continue;
  2691. ++nmaps;
  2692. }
  2693. }
  2694. return nmaps;
  2695. }
  2696. static void audit_rmap(struct kvm_vcpu *vcpu)
  2697. {
  2698. int n_rmap = count_rmaps(vcpu);
  2699. int n_actual = count_writable_mappings(vcpu);
  2700. if (n_rmap != n_actual)
  2701. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2702. __func__, audit_msg, n_rmap, n_actual);
  2703. }
  2704. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2705. {
  2706. struct kvm_mmu_page *sp;
  2707. struct kvm_memory_slot *slot;
  2708. unsigned long *rmapp;
  2709. gfn_t gfn;
  2710. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2711. if (sp->role.direct)
  2712. continue;
  2713. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2714. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2715. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2716. if (*rmapp)
  2717. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2718. " mappings: gfn %lx role %x\n",
  2719. __func__, audit_msg, sp->gfn,
  2720. sp->role.word);
  2721. }
  2722. }
  2723. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2724. {
  2725. int olddbg = dbg;
  2726. dbg = 0;
  2727. audit_msg = msg;
  2728. audit_rmap(vcpu);
  2729. audit_write_protection(vcpu);
  2730. audit_mappings(vcpu);
  2731. dbg = olddbg;
  2732. }
  2733. #endif