tmio.h 2.6 KB

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  1. #ifndef MFD_TMIO_H
  2. #define MFD_TMIO_H
  3. #include <linux/fb.h>
  4. #include <linux/io.h>
  5. #include <linux/platform_device.h>
  6. #define tmio_ioread8(addr) readb(addr)
  7. #define tmio_ioread16(addr) readw(addr)
  8. #define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
  9. #define tmio_ioread32(addr) \
  10. (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
  11. #define tmio_iowrite8(val, addr) writeb((val), (addr))
  12. #define tmio_iowrite16(val, addr) writew((val), (addr))
  13. #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
  14. #define tmio_iowrite32(val, addr) \
  15. do { \
  16. writew((val), (addr)); \
  17. writew((val) >> 16, (addr) + 2); \
  18. } while (0)
  19. #define CNF_CMD 0x04
  20. #define CNF_CTL_BASE 0x10
  21. #define CNF_INT_PIN 0x3d
  22. #define CNF_STOP_CLK_CTL 0x40
  23. #define CNF_GCLK_CTL 0x41
  24. #define CNF_SD_CLK_MODE 0x42
  25. #define CNF_PIN_STATUS 0x44
  26. #define CNF_PWR_CTL_1 0x48
  27. #define CNF_PWR_CTL_2 0x49
  28. #define CNF_PWR_CTL_3 0x4a
  29. #define CNF_CARD_DETECT_MODE 0x4c
  30. #define CNF_SD_SLOT 0x50
  31. #define CNF_EXT_GCLK_CTL_1 0xf0
  32. #define CNF_EXT_GCLK_CTL_2 0xf1
  33. #define CNF_EXT_GCLK_CTL_3 0xf9
  34. #define CNF_SD_LED_EN_1 0xfa
  35. #define CNF_SD_LED_EN_2 0xfe
  36. #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
  37. #define sd_config_write8(base, shift, reg, val) \
  38. tmio_iowrite8((val), (base) + ((reg) << (shift)))
  39. #define sd_config_write16(base, shift, reg, val) \
  40. tmio_iowrite16((val), (base) + ((reg) << (shift)))
  41. #define sd_config_write32(base, shift, reg, val) \
  42. do { \
  43. tmio_iowrite16((val), (base) + ((reg) << (shift))); \
  44. tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
  45. } while (0)
  46. int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
  47. int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
  48. void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
  49. void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
  50. /*
  51. * data for the MMC controller
  52. */
  53. struct tmio_mmc_data {
  54. unsigned int hclk;
  55. unsigned long capabilities;
  56. void (*set_pwr)(struct platform_device *host, int state);
  57. void (*set_clk_div)(struct platform_device *host, int state);
  58. };
  59. /*
  60. * data for the NAND controller
  61. */
  62. struct tmio_nand_data {
  63. struct nand_bbt_descr *badblock_pattern;
  64. struct mtd_partition *partition;
  65. unsigned int num_partitions;
  66. };
  67. #define FBIO_TMIO_ACC_WRITE 0x7C639300
  68. #define FBIO_TMIO_ACC_SYNC 0x7C639301
  69. struct tmio_fb_data {
  70. int (*lcd_set_power)(struct platform_device *fb_dev,
  71. bool on);
  72. int (*lcd_mode)(struct platform_device *fb_dev,
  73. const struct fb_videomode *mode);
  74. int num_modes;
  75. struct fb_videomode *modes;
  76. /* in mm: size of screen */
  77. int height;
  78. int width;
  79. };
  80. #endif