devices.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/devices.c
  3. *
  4. * OMAP2 platform device setup/initialization
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/gpio.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/io.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <mach/hardware.h>
  21. #include <mach/irqs.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/pmu.h>
  25. #include <plat/tc.h>
  26. #include <plat/board.h>
  27. #include <plat/mcbsp.h>
  28. #include <plat/mmc.h>
  29. #include <plat/dma.h>
  30. #include <plat/omap_hwmod.h>
  31. #include <plat/omap_device.h>
  32. #include <plat/omap4-keypad.h>
  33. #include "mux.h"
  34. #include "control.h"
  35. #include "devices.h"
  36. #define L3_MODULES_MAX_LEN 12
  37. #define L3_MODULES 3
  38. static int __init omap3_l3_init(void)
  39. {
  40. int l;
  41. struct omap_hwmod *oh;
  42. struct platform_device *pdev;
  43. char oh_name[L3_MODULES_MAX_LEN];
  44. /*
  45. * To avoid code running on other OMAPs in
  46. * multi-omap builds
  47. */
  48. if (!(cpu_is_omap34xx()))
  49. return -ENODEV;
  50. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
  51. oh = omap_hwmod_lookup(oh_name);
  52. if (!oh)
  53. pr_err("could not look up %s\n", oh_name);
  54. pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
  55. NULL, 0, 0);
  56. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  57. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  58. }
  59. postcore_initcall(omap3_l3_init);
  60. static int __init omap4_l3_init(void)
  61. {
  62. int l, i;
  63. struct omap_hwmod *oh[3];
  64. struct platform_device *pdev;
  65. char oh_name[L3_MODULES_MAX_LEN];
  66. /* If dtb is there, the devices will be created dynamically */
  67. if (of_have_populated_dt())
  68. return -ENODEV;
  69. /*
  70. * To avoid code running on other OMAPs in
  71. * multi-omap builds
  72. */
  73. if (!(cpu_is_omap44xx()))
  74. return -ENODEV;
  75. for (i = 0; i < L3_MODULES; i++) {
  76. l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
  77. oh[i] = omap_hwmod_lookup(oh_name);
  78. if (!(oh[i]))
  79. pr_err("could not look up %s\n", oh_name);
  80. }
  81. pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
  82. 0, NULL, 0, 0);
  83. WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
  84. return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
  85. }
  86. postcore_initcall(omap4_l3_init);
  87. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  88. static struct resource omap2cam_resources[] = {
  89. {
  90. .start = OMAP24XX_CAMERA_BASE,
  91. .end = OMAP24XX_CAMERA_BASE + 0xfff,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. {
  95. .start = INT_24XX_CAM_IRQ,
  96. .flags = IORESOURCE_IRQ,
  97. }
  98. };
  99. static struct platform_device omap2cam_device = {
  100. .name = "omap24xxcam",
  101. .id = -1,
  102. .num_resources = ARRAY_SIZE(omap2cam_resources),
  103. .resource = omap2cam_resources,
  104. };
  105. #endif
  106. static struct resource omap3isp_resources[] = {
  107. {
  108. .start = OMAP3430_ISP_BASE,
  109. .end = OMAP3430_ISP_END,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. {
  113. .start = OMAP3430_ISP_CCP2_BASE,
  114. .end = OMAP3430_ISP_CCP2_END,
  115. .flags = IORESOURCE_MEM,
  116. },
  117. {
  118. .start = OMAP3430_ISP_CCDC_BASE,
  119. .end = OMAP3430_ISP_CCDC_END,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. {
  123. .start = OMAP3430_ISP_HIST_BASE,
  124. .end = OMAP3430_ISP_HIST_END,
  125. .flags = IORESOURCE_MEM,
  126. },
  127. {
  128. .start = OMAP3430_ISP_H3A_BASE,
  129. .end = OMAP3430_ISP_H3A_END,
  130. .flags = IORESOURCE_MEM,
  131. },
  132. {
  133. .start = OMAP3430_ISP_PREV_BASE,
  134. .end = OMAP3430_ISP_PREV_END,
  135. .flags = IORESOURCE_MEM,
  136. },
  137. {
  138. .start = OMAP3430_ISP_RESZ_BASE,
  139. .end = OMAP3430_ISP_RESZ_END,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. {
  143. .start = OMAP3430_ISP_SBL_BASE,
  144. .end = OMAP3430_ISP_SBL_END,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. {
  148. .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
  149. .end = OMAP3430_ISP_CSI2A_REGS1_END,
  150. .flags = IORESOURCE_MEM,
  151. },
  152. {
  153. .start = OMAP3430_ISP_CSIPHY2_BASE,
  154. .end = OMAP3430_ISP_CSIPHY2_END,
  155. .flags = IORESOURCE_MEM,
  156. },
  157. {
  158. .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
  159. .end = OMAP3630_ISP_CSI2A_REGS2_END,
  160. .flags = IORESOURCE_MEM,
  161. },
  162. {
  163. .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
  164. .end = OMAP3630_ISP_CSI2C_REGS1_END,
  165. .flags = IORESOURCE_MEM,
  166. },
  167. {
  168. .start = OMAP3630_ISP_CSIPHY1_BASE,
  169. .end = OMAP3630_ISP_CSIPHY1_END,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. {
  173. .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
  174. .end = OMAP3630_ISP_CSI2C_REGS2_END,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. {
  178. .start = INT_34XX_CAM_IRQ,
  179. .flags = IORESOURCE_IRQ,
  180. }
  181. };
  182. static struct platform_device omap3isp_device = {
  183. .name = "omap3isp",
  184. .id = -1,
  185. .num_resources = ARRAY_SIZE(omap3isp_resources),
  186. .resource = omap3isp_resources,
  187. };
  188. int omap3_init_camera(struct isp_platform_data *pdata)
  189. {
  190. omap3isp_device.dev.platform_data = pdata;
  191. return platform_device_register(&omap3isp_device);
  192. }
  193. static inline void omap_init_camera(void)
  194. {
  195. #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  196. if (cpu_is_omap24xx())
  197. platform_device_register(&omap2cam_device);
  198. #endif
  199. }
  200. int __init omap4_keyboard_init(struct omap4_keypad_platform_data
  201. *sdp4430_keypad_data, struct omap_board_data *bdata)
  202. {
  203. struct platform_device *pdev;
  204. struct omap_hwmod *oh;
  205. struct omap4_keypad_platform_data *keypad_data;
  206. unsigned int id = -1;
  207. char *oh_name = "kbd";
  208. char *name = "omap4-keypad";
  209. oh = omap_hwmod_lookup(oh_name);
  210. if (!oh) {
  211. pr_err("Could not look up %s\n", oh_name);
  212. return -ENODEV;
  213. }
  214. keypad_data = sdp4430_keypad_data;
  215. pdev = omap_device_build(name, id, oh, keypad_data,
  216. sizeof(struct omap4_keypad_platform_data), NULL, 0, 0);
  217. if (IS_ERR(pdev)) {
  218. WARN(1, "Can't build omap_device for %s:%s.\n",
  219. name, oh->name);
  220. return PTR_ERR(pdev);
  221. }
  222. oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
  223. return 0;
  224. }
  225. #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
  226. static inline void omap_init_mbox(void)
  227. {
  228. struct omap_hwmod *oh;
  229. struct platform_device *pdev;
  230. oh = omap_hwmod_lookup("mailbox");
  231. if (!oh) {
  232. pr_err("%s: unable to find hwmod\n", __func__);
  233. return;
  234. }
  235. pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0);
  236. WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
  237. __func__, PTR_ERR(pdev));
  238. }
  239. #else
  240. static inline void omap_init_mbox(void) { }
  241. #endif /* CONFIG_OMAP_MBOX_FWK */
  242. static inline void omap_init_sti(void) {}
  243. #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  244. static struct platform_device omap_pcm = {
  245. .name = "omap-pcm-audio",
  246. .id = -1,
  247. };
  248. /*
  249. * OMAP2420 has 2 McBSP ports
  250. * OMAP2430 has 5 McBSP ports
  251. * OMAP3 has 5 McBSP ports
  252. * OMAP4 has 4 McBSP ports
  253. */
  254. OMAP_MCBSP_PLATFORM_DEVICE(1);
  255. OMAP_MCBSP_PLATFORM_DEVICE(2);
  256. OMAP_MCBSP_PLATFORM_DEVICE(3);
  257. OMAP_MCBSP_PLATFORM_DEVICE(4);
  258. OMAP_MCBSP_PLATFORM_DEVICE(5);
  259. static void omap_init_audio(void)
  260. {
  261. platform_device_register(&omap_mcbsp1);
  262. platform_device_register(&omap_mcbsp2);
  263. if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
  264. platform_device_register(&omap_mcbsp3);
  265. platform_device_register(&omap_mcbsp4);
  266. }
  267. if (cpu_is_omap243x() || cpu_is_omap34xx())
  268. platform_device_register(&omap_mcbsp5);
  269. platform_device_register(&omap_pcm);
  270. }
  271. #else
  272. static inline void omap_init_audio(void) {}
  273. #endif
  274. #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
  275. defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
  276. static void omap_init_mcpdm(void)
  277. {
  278. struct omap_hwmod *oh;
  279. struct platform_device *pdev;
  280. oh = omap_hwmod_lookup("mcpdm");
  281. if (!oh) {
  282. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  283. return;
  284. }
  285. pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
  286. WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
  287. }
  288. #else
  289. static inline void omap_init_mcpdm(void) {}
  290. #endif
  291. #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
  292. defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
  293. static void omap_init_dmic(void)
  294. {
  295. struct omap_hwmod *oh;
  296. struct platform_device *pdev;
  297. oh = omap_hwmod_lookup("dmic");
  298. if (!oh) {
  299. printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
  300. return;
  301. }
  302. pdev = omap_device_build("omap-dmic", -1, oh, NULL, 0, NULL, 0, 0);
  303. WARN(IS_ERR(pdev), "Can't build omap_device for omap-dmic.\n");
  304. }
  305. #else
  306. static inline void omap_init_dmic(void) {}
  307. #endif
  308. #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
  309. #include <plat/mcspi.h>
  310. static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
  311. {
  312. struct platform_device *pdev;
  313. char *name = "omap2_mcspi";
  314. struct omap2_mcspi_platform_config *pdata;
  315. static int spi_num;
  316. struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
  317. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  318. if (!pdata) {
  319. pr_err("Memory allocation for McSPI device failed\n");
  320. return -ENOMEM;
  321. }
  322. pdata->num_cs = mcspi_attrib->num_chipselect;
  323. switch (oh->class->rev) {
  324. case OMAP2_MCSPI_REV:
  325. case OMAP3_MCSPI_REV:
  326. pdata->regs_offset = 0;
  327. break;
  328. case OMAP4_MCSPI_REV:
  329. pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
  330. break;
  331. default:
  332. pr_err("Invalid McSPI Revision value\n");
  333. return -EINVAL;
  334. }
  335. spi_num++;
  336. pdev = omap_device_build(name, spi_num, oh, pdata,
  337. sizeof(*pdata), NULL, 0, 0);
  338. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
  339. name, oh->name);
  340. kfree(pdata);
  341. return 0;
  342. }
  343. static void omap_init_mcspi(void)
  344. {
  345. omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
  346. }
  347. #else
  348. static inline void omap_init_mcspi(void) {}
  349. #endif
  350. static struct resource omap2_pmu_resource = {
  351. .start = 3,
  352. .end = 3,
  353. .flags = IORESOURCE_IRQ,
  354. };
  355. static struct resource omap3_pmu_resource = {
  356. .start = INT_34XX_BENCH_MPU_EMUL,
  357. .end = INT_34XX_BENCH_MPU_EMUL,
  358. .flags = IORESOURCE_IRQ,
  359. };
  360. static struct platform_device omap_pmu_device = {
  361. .name = "arm-pmu",
  362. .id = ARM_PMU_DEVICE_CPU,
  363. .num_resources = 1,
  364. };
  365. static void omap_init_pmu(void)
  366. {
  367. if (cpu_is_omap24xx())
  368. omap_pmu_device.resource = &omap2_pmu_resource;
  369. else if (cpu_is_omap34xx())
  370. omap_pmu_device.resource = &omap3_pmu_resource;
  371. else
  372. return;
  373. platform_device_register(&omap_pmu_device);
  374. }
  375. #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
  376. #ifdef CONFIG_ARCH_OMAP2
  377. static struct resource omap2_sham_resources[] = {
  378. {
  379. .start = OMAP24XX_SEC_SHA1MD5_BASE,
  380. .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
  381. .flags = IORESOURCE_MEM,
  382. },
  383. {
  384. .start = INT_24XX_SHA1MD5,
  385. .flags = IORESOURCE_IRQ,
  386. }
  387. };
  388. static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
  389. #else
  390. #define omap2_sham_resources NULL
  391. #define omap2_sham_resources_sz 0
  392. #endif
  393. #ifdef CONFIG_ARCH_OMAP3
  394. static struct resource omap3_sham_resources[] = {
  395. {
  396. .start = OMAP34XX_SEC_SHA1MD5_BASE,
  397. .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
  398. .flags = IORESOURCE_MEM,
  399. },
  400. {
  401. .start = INT_34XX_SHA1MD52_IRQ,
  402. .flags = IORESOURCE_IRQ,
  403. },
  404. {
  405. .start = OMAP34XX_DMA_SHA1MD5_RX,
  406. .flags = IORESOURCE_DMA,
  407. }
  408. };
  409. static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
  410. #else
  411. #define omap3_sham_resources NULL
  412. #define omap3_sham_resources_sz 0
  413. #endif
  414. static struct platform_device sham_device = {
  415. .name = "omap-sham",
  416. .id = -1,
  417. };
  418. static void omap_init_sham(void)
  419. {
  420. if (cpu_is_omap24xx()) {
  421. sham_device.resource = omap2_sham_resources;
  422. sham_device.num_resources = omap2_sham_resources_sz;
  423. } else if (cpu_is_omap34xx()) {
  424. sham_device.resource = omap3_sham_resources;
  425. sham_device.num_resources = omap3_sham_resources_sz;
  426. } else {
  427. pr_err("%s: platform not supported\n", __func__);
  428. return;
  429. }
  430. platform_device_register(&sham_device);
  431. }
  432. #else
  433. static inline void omap_init_sham(void) { }
  434. #endif
  435. #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
  436. #ifdef CONFIG_ARCH_OMAP2
  437. static struct resource omap2_aes_resources[] = {
  438. {
  439. .start = OMAP24XX_SEC_AES_BASE,
  440. .end = OMAP24XX_SEC_AES_BASE + 0x4C,
  441. .flags = IORESOURCE_MEM,
  442. },
  443. {
  444. .start = OMAP24XX_DMA_AES_TX,
  445. .flags = IORESOURCE_DMA,
  446. },
  447. {
  448. .start = OMAP24XX_DMA_AES_RX,
  449. .flags = IORESOURCE_DMA,
  450. }
  451. };
  452. static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
  453. #else
  454. #define omap2_aes_resources NULL
  455. #define omap2_aes_resources_sz 0
  456. #endif
  457. #ifdef CONFIG_ARCH_OMAP3
  458. static struct resource omap3_aes_resources[] = {
  459. {
  460. .start = OMAP34XX_SEC_AES_BASE,
  461. .end = OMAP34XX_SEC_AES_BASE + 0x4C,
  462. .flags = IORESOURCE_MEM,
  463. },
  464. {
  465. .start = OMAP34XX_DMA_AES2_TX,
  466. .flags = IORESOURCE_DMA,
  467. },
  468. {
  469. .start = OMAP34XX_DMA_AES2_RX,
  470. .flags = IORESOURCE_DMA,
  471. }
  472. };
  473. static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
  474. #else
  475. #define omap3_aes_resources NULL
  476. #define omap3_aes_resources_sz 0
  477. #endif
  478. static struct platform_device aes_device = {
  479. .name = "omap-aes",
  480. .id = -1,
  481. };
  482. static void omap_init_aes(void)
  483. {
  484. if (cpu_is_omap24xx()) {
  485. aes_device.resource = omap2_aes_resources;
  486. aes_device.num_resources = omap2_aes_resources_sz;
  487. } else if (cpu_is_omap34xx()) {
  488. aes_device.resource = omap3_aes_resources;
  489. aes_device.num_resources = omap3_aes_resources_sz;
  490. } else {
  491. pr_err("%s: platform not supported\n", __func__);
  492. return;
  493. }
  494. platform_device_register(&aes_device);
  495. }
  496. #else
  497. static inline void omap_init_aes(void) { }
  498. #endif
  499. /*-------------------------------------------------------------------------*/
  500. #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
  501. static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
  502. *mmc_controller)
  503. {
  504. if ((mmc_controller->slots[0].switch_pin > 0) && \
  505. (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
  506. omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
  507. OMAP_PIN_INPUT_PULLUP);
  508. if ((mmc_controller->slots[0].gpio_wp > 0) && \
  509. (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
  510. omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
  511. OMAP_PIN_INPUT_PULLUP);
  512. omap_mux_init_signal("sdmmc_cmd", 0);
  513. omap_mux_init_signal("sdmmc_clki", 0);
  514. omap_mux_init_signal("sdmmc_clko", 0);
  515. omap_mux_init_signal("sdmmc_dat0", 0);
  516. omap_mux_init_signal("sdmmc_dat_dir0", 0);
  517. omap_mux_init_signal("sdmmc_cmd_dir", 0);
  518. if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
  519. omap_mux_init_signal("sdmmc_dat1", 0);
  520. omap_mux_init_signal("sdmmc_dat2", 0);
  521. omap_mux_init_signal("sdmmc_dat3", 0);
  522. omap_mux_init_signal("sdmmc_dat_dir1", 0);
  523. omap_mux_init_signal("sdmmc_dat_dir2", 0);
  524. omap_mux_init_signal("sdmmc_dat_dir3", 0);
  525. }
  526. /*
  527. * Use internal loop-back in MMC/SDIO Module Input Clock
  528. * selection
  529. */
  530. if (mmc_controller->slots[0].internal_clock) {
  531. u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  532. v |= (1 << 24);
  533. omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  534. }
  535. }
  536. void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
  537. {
  538. char *name = "mmci-omap";
  539. if (!mmc_data[0]) {
  540. pr_err("%s fails: Incomplete platform data\n", __func__);
  541. return;
  542. }
  543. omap242x_mmc_mux(mmc_data[0]);
  544. omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
  545. INT_24XX_MMC_IRQ, mmc_data[0]);
  546. }
  547. #endif
  548. /*-------------------------------------------------------------------------*/
  549. #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
  550. #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
  551. #define OMAP_HDQ_BASE 0x480B2000
  552. #endif
  553. static struct resource omap_hdq_resources[] = {
  554. {
  555. .start = OMAP_HDQ_BASE,
  556. .end = OMAP_HDQ_BASE + 0x1C,
  557. .flags = IORESOURCE_MEM,
  558. },
  559. {
  560. .start = INT_24XX_HDQ_IRQ,
  561. .flags = IORESOURCE_IRQ,
  562. },
  563. };
  564. static struct platform_device omap_hdq_dev = {
  565. .name = "omap_hdq",
  566. .id = 0,
  567. .dev = {
  568. .platform_data = NULL,
  569. },
  570. .num_resources = ARRAY_SIZE(omap_hdq_resources),
  571. .resource = omap_hdq_resources,
  572. };
  573. static inline void omap_hdq_init(void)
  574. {
  575. (void) platform_device_register(&omap_hdq_dev);
  576. }
  577. #else
  578. static inline void omap_hdq_init(void) {}
  579. #endif
  580. /*---------------------------------------------------------------------------*/
  581. #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
  582. defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
  583. #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
  584. static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
  585. };
  586. #else
  587. static struct resource omap_vout_resource[2] = {
  588. };
  589. #endif
  590. static struct platform_device omap_vout_device = {
  591. .name = "omap_vout",
  592. .num_resources = ARRAY_SIZE(omap_vout_resource),
  593. .resource = &omap_vout_resource[0],
  594. .id = -1,
  595. };
  596. static void omap_init_vout(void)
  597. {
  598. if (platform_device_register(&omap_vout_device) < 0)
  599. printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
  600. }
  601. #else
  602. static inline void omap_init_vout(void) {}
  603. #endif
  604. /*-------------------------------------------------------------------------*/
  605. static int __init omap2_init_devices(void)
  606. {
  607. /*
  608. * please keep these calls, and their implementations above,
  609. * in alphabetical order so they're easier to sort through.
  610. */
  611. omap_init_audio();
  612. omap_init_mcpdm();
  613. omap_init_dmic();
  614. omap_init_camera();
  615. omap_init_mbox();
  616. omap_init_mcspi();
  617. omap_init_pmu();
  618. omap_hdq_init();
  619. omap_init_sti();
  620. omap_init_sham();
  621. omap_init_aes();
  622. omap_init_vout();
  623. return 0;
  624. }
  625. arch_initcall(omap2_init_devices);
  626. #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
  627. static int __init omap_init_wdt(void)
  628. {
  629. int id = -1;
  630. struct platform_device *pdev;
  631. struct omap_hwmod *oh;
  632. char *oh_name = "wd_timer2";
  633. char *dev_name = "omap_wdt";
  634. if (!cpu_class_is_omap2())
  635. return 0;
  636. oh = omap_hwmod_lookup(oh_name);
  637. if (!oh) {
  638. pr_err("Could not look up wd_timer%d hwmod\n", id);
  639. return -EINVAL;
  640. }
  641. pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
  642. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
  643. dev_name, oh->name);
  644. return 0;
  645. }
  646. subsys_initcall(omap_init_wdt);
  647. #endif