dz.c 20 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/bitops.h>
  33. #include <linux/compiler.h>
  34. #include <linux/console.h>
  35. #include <linux/delay.h>
  36. #include <linux/errno.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/kernel.h>
  40. #include <linux/major.h>
  41. #include <linux/module.h>
  42. #include <linux/serial.h>
  43. #include <linux/serial_core.h>
  44. #include <linux/sysrq.h>
  45. #include <linux/tty.h>
  46. #include <asm/bootinfo.h>
  47. #include <asm/system.h>
  48. #include <asm/dec/interrupts.h>
  49. #include <asm/dec/kn01.h>
  50. #include <asm/dec/kn02.h>
  51. #include <asm/dec/machtype.h>
  52. #include <asm/dec/prom.h>
  53. #include "dz.h"
  54. static char *dz_name = "DECstation DZ serial driver version ";
  55. static char *dz_version = "1.03";
  56. struct dz_port {
  57. struct uart_port port;
  58. unsigned int cflag;
  59. };
  60. static struct dz_port dz_ports[DZ_NB_PORT];
  61. /*
  62. * ------------------------------------------------------------
  63. * dz_in () and dz_out ()
  64. *
  65. * These routines are used to access the registers of the DZ
  66. * chip, hiding relocation differences between implementation.
  67. * ------------------------------------------------------------
  68. */
  69. static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
  70. {
  71. volatile unsigned short *addr =
  72. (volatile unsigned short *) (dport->port.membase + offset);
  73. return *addr;
  74. }
  75. static inline void dz_out(struct dz_port *dport, unsigned offset,
  76. unsigned short value)
  77. {
  78. volatile unsigned short *addr =
  79. (volatile unsigned short *) (dport->port.membase + offset);
  80. *addr = value;
  81. }
  82. /*
  83. * ------------------------------------------------------------
  84. * rs_stop () and rs_start ()
  85. *
  86. * These routines are called before setting or resetting
  87. * tty->stopped. They enable or disable transmitter interrupts,
  88. * as necessary.
  89. * ------------------------------------------------------------
  90. */
  91. static void dz_stop_tx(struct uart_port *uport)
  92. {
  93. struct dz_port *dport = (struct dz_port *)uport;
  94. unsigned short tmp, mask = 1 << dport->port.line;
  95. unsigned long flags;
  96. spin_lock_irqsave(&dport->port.lock, flags);
  97. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  98. tmp &= ~mask; /* clear the TX flag */
  99. dz_out(dport, DZ_TCR, tmp);
  100. spin_unlock_irqrestore(&dport->port.lock, flags);
  101. }
  102. static void dz_start_tx(struct uart_port *uport)
  103. {
  104. struct dz_port *dport = (struct dz_port *)uport;
  105. unsigned short tmp, mask = 1 << dport->port.line;
  106. unsigned long flags;
  107. spin_lock_irqsave(&dport->port.lock, flags);
  108. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  109. tmp |= mask; /* set the TX flag */
  110. dz_out(dport, DZ_TCR, tmp);
  111. spin_unlock_irqrestore(&dport->port.lock, flags);
  112. }
  113. static void dz_stop_rx(struct uart_port *uport)
  114. {
  115. struct dz_port *dport = (struct dz_port *)uport;
  116. unsigned long flags;
  117. spin_lock_irqsave(&dport->port.lock, flags);
  118. dport->cflag &= ~DZ_CREAD;
  119. dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
  120. spin_unlock_irqrestore(&dport->port.lock, flags);
  121. }
  122. static void dz_enable_ms(struct uart_port *port)
  123. {
  124. /* nothing to do */
  125. }
  126. /*
  127. * ------------------------------------------------------------
  128. *
  129. * Here start the interrupt handling routines. All of the following
  130. * subroutines are declared as inline and are folded into
  131. * dz_interrupt. They were separated out for readability's sake.
  132. *
  133. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  134. * runs with interrupts turned off. People who may want to modify
  135. * dz_interrupt() should try to keep the interrupt handler as fast as
  136. * possible. After you are done making modifications, it is not a bad
  137. * idea to do:
  138. *
  139. * make drivers/serial/dz.s
  140. *
  141. * and look at the resulting assemble code in dz.s.
  142. *
  143. * ------------------------------------------------------------
  144. */
  145. /*
  146. * ------------------------------------------------------------
  147. * receive_char ()
  148. *
  149. * This routine deals with inputs from any lines.
  150. * ------------------------------------------------------------
  151. */
  152. static inline void dz_receive_chars(struct dz_port *dport_in)
  153. {
  154. struct dz_port *dport;
  155. struct tty_struct *tty = NULL;
  156. struct uart_icount *icount;
  157. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  158. unsigned short status;
  159. unsigned char ch, flag;
  160. int i;
  161. while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
  162. dport = &dz_ports[LINE(status)];
  163. tty = dport->port.info->tty; /* point to the proper dev */
  164. ch = UCHAR(status); /* grab the char */
  165. icount = &dport->port.icount;
  166. icount->rx++;
  167. flag = TTY_NORMAL;
  168. if (status & DZ_FERR) { /* frame error */
  169. /*
  170. * There is no separate BREAK status bit, so
  171. * treat framing errors as BREAKs for Magic SysRq
  172. * and SAK; normally, otherwise.
  173. */
  174. if (uart_handle_break(&dport->port))
  175. continue;
  176. if (dport->port.flags & UPF_SAK)
  177. flag = TTY_BREAK;
  178. else
  179. flag = TTY_FRAME;
  180. } else if (status & DZ_OERR) /* overrun error */
  181. flag = TTY_OVERRUN;
  182. else if (status & DZ_PERR) /* parity error */
  183. flag = TTY_PARITY;
  184. /* keep track of the statistics */
  185. switch (flag) {
  186. case TTY_FRAME:
  187. icount->frame++;
  188. break;
  189. case TTY_PARITY:
  190. icount->parity++;
  191. break;
  192. case TTY_OVERRUN:
  193. icount->overrun++;
  194. break;
  195. case TTY_BREAK:
  196. icount->brk++;
  197. break;
  198. default:
  199. break;
  200. }
  201. if (uart_handle_sysrq_char(&dport->port, ch))
  202. continue;
  203. if ((status & dport->port.ignore_status_mask) == 0) {
  204. uart_insert_char(&dport->port,
  205. status, DZ_OERR, ch, flag);
  206. lines_rx[LINE(status)] = 1;
  207. }
  208. }
  209. for (i = 0; i < DZ_NB_PORT; i++)
  210. if (lines_rx[i])
  211. tty_flip_buffer_push(dz_ports[i].port.info->tty);
  212. }
  213. /*
  214. * ------------------------------------------------------------
  215. * transmit_char ()
  216. *
  217. * This routine deals with outputs to any lines.
  218. * ------------------------------------------------------------
  219. */
  220. static inline void dz_transmit_chars(struct dz_port *dport_in)
  221. {
  222. struct dz_port *dport;
  223. struct circ_buf *xmit;
  224. unsigned short status;
  225. unsigned char tmp;
  226. status = dz_in(dport_in, DZ_CSR);
  227. dport = &dz_ports[LINE(status)];
  228. xmit = &dport->port.info->xmit;
  229. if (dport->port.x_char) { /* XON/XOFF chars */
  230. dz_out(dport, DZ_TDR, dport->port.x_char);
  231. dport->port.icount.tx++;
  232. dport->port.x_char = 0;
  233. return;
  234. }
  235. /* If nothing to do or stopped or hardware stopped. */
  236. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  237. dz_stop_tx(&dport->port);
  238. return;
  239. }
  240. /*
  241. * If something to do... (remember the dz has no output fifo,
  242. * so we go one char at a time) :-<
  243. */
  244. tmp = xmit->buf[xmit->tail];
  245. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  246. dz_out(dport, DZ_TDR, tmp);
  247. dport->port.icount.tx++;
  248. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  249. uart_write_wakeup(&dport->port);
  250. /* Are we are done. */
  251. if (uart_circ_empty(xmit))
  252. dz_stop_tx(&dport->port);
  253. }
  254. /*
  255. * ------------------------------------------------------------
  256. * check_modem_status()
  257. *
  258. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  259. * DS 5000/200: Valid for the MODEM and PRINTER line.
  260. * ------------------------------------------------------------
  261. */
  262. static inline void check_modem_status(struct dz_port *dport)
  263. {
  264. /*
  265. * FIXME:
  266. * 1. No status change interrupt; use a timer.
  267. * 2. Handle the 3100/5000 as appropriate. --macro
  268. */
  269. unsigned short status;
  270. /* If not the modem line just return. */
  271. if (dport->port.line != DZ_MODEM)
  272. return;
  273. status = dz_in(dport, DZ_MSR);
  274. /* it's easy, since DSR2 is the only bit in the register */
  275. if (status)
  276. dport->port.icount.dsr++;
  277. }
  278. /*
  279. * ------------------------------------------------------------
  280. * dz_interrupt ()
  281. *
  282. * this is the main interrupt routine for the DZ chip.
  283. * It deals with the multiple ports.
  284. * ------------------------------------------------------------
  285. */
  286. static irqreturn_t dz_interrupt(int irq, void *dev)
  287. {
  288. struct dz_port *dport = dev;
  289. unsigned short status;
  290. /* get the reason why we just got an irq */
  291. status = dz_in(dport, DZ_CSR);
  292. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  293. dz_receive_chars(dport);
  294. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  295. dz_transmit_chars(dport);
  296. return IRQ_HANDLED;
  297. }
  298. /*
  299. * -------------------------------------------------------------------
  300. * Here ends the DZ interrupt routines.
  301. * -------------------------------------------------------------------
  302. */
  303. static unsigned int dz_get_mctrl(struct uart_port *uport)
  304. {
  305. /*
  306. * FIXME: Handle the 3100/5000 as appropriate. --macro
  307. */
  308. struct dz_port *dport = (struct dz_port *)uport;
  309. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  310. if (dport->port.line == DZ_MODEM) {
  311. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  312. mctrl &= ~TIOCM_DSR;
  313. }
  314. return mctrl;
  315. }
  316. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  317. {
  318. /*
  319. * FIXME: Handle the 3100/5000 as appropriate. --macro
  320. */
  321. struct dz_port *dport = (struct dz_port *)uport;
  322. unsigned short tmp;
  323. if (dport->port.line == DZ_MODEM) {
  324. tmp = dz_in(dport, DZ_TCR);
  325. if (mctrl & TIOCM_DTR)
  326. tmp &= ~DZ_MODEM_DTR;
  327. else
  328. tmp |= DZ_MODEM_DTR;
  329. dz_out(dport, DZ_TCR, tmp);
  330. }
  331. }
  332. /*
  333. * -------------------------------------------------------------------
  334. * startup ()
  335. *
  336. * various initialization tasks
  337. * -------------------------------------------------------------------
  338. */
  339. static int dz_startup(struct uart_port *uport)
  340. {
  341. struct dz_port *dport = (struct dz_port *)uport;
  342. unsigned long flags;
  343. unsigned short tmp;
  344. spin_lock_irqsave(&dport->port.lock, flags);
  345. /* enable the interrupt and the scanning */
  346. tmp = dz_in(dport, DZ_CSR);
  347. tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
  348. dz_out(dport, DZ_CSR, tmp);
  349. spin_unlock_irqrestore(&dport->port.lock, flags);
  350. return 0;
  351. }
  352. /*
  353. * -------------------------------------------------------------------
  354. * shutdown ()
  355. *
  356. * This routine will shutdown a serial port; interrupts are disabled, and
  357. * DTR is dropped if the hangup on close termio flag is on.
  358. * -------------------------------------------------------------------
  359. */
  360. static void dz_shutdown(struct uart_port *uport)
  361. {
  362. dz_stop_tx(uport);
  363. }
  364. /*
  365. * -------------------------------------------------------------------
  366. * dz_tx_empty() -- get the transmitter empty status
  367. *
  368. * Purpose: Let user call ioctl() to get info when the UART physically
  369. * is emptied. On bus types like RS485, the transmitter must
  370. * release the bus after transmitting. This must be done when
  371. * the transmit shift register is empty, not be done when the
  372. * transmit holding register is empty. This functionality
  373. * allows an RS485 driver to be written in user space.
  374. * -------------------------------------------------------------------
  375. */
  376. static unsigned int dz_tx_empty(struct uart_port *uport)
  377. {
  378. struct dz_port *dport = (struct dz_port *)uport;
  379. unsigned short tmp, mask = 1 << dport->port.line;
  380. tmp = dz_in(dport, DZ_TCR);
  381. tmp &= mask;
  382. return tmp ? 0 : TIOCSER_TEMT;
  383. }
  384. static void dz_break_ctl(struct uart_port *uport, int break_state)
  385. {
  386. /*
  387. * FIXME: Can't access BREAK bits in TDR easily;
  388. * reuse the code for polled TX. --macro
  389. */
  390. struct dz_port *dport = (struct dz_port *)uport;
  391. unsigned long flags;
  392. unsigned short tmp, mask = 1 << dport->port.line;
  393. spin_lock_irqsave(&uport->lock, flags);
  394. tmp = dz_in(dport, DZ_TCR);
  395. if (break_state)
  396. tmp |= mask;
  397. else
  398. tmp &= ~mask;
  399. dz_out(dport, DZ_TCR, tmp);
  400. spin_unlock_irqrestore(&uport->lock, flags);
  401. }
  402. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  403. struct ktermios *old_termios)
  404. {
  405. struct dz_port *dport = (struct dz_port *)uport;
  406. unsigned long flags;
  407. unsigned int cflag, baud;
  408. cflag = dport->port.line;
  409. switch (termios->c_cflag & CSIZE) {
  410. case CS5:
  411. cflag |= DZ_CS5;
  412. break;
  413. case CS6:
  414. cflag |= DZ_CS6;
  415. break;
  416. case CS7:
  417. cflag |= DZ_CS7;
  418. break;
  419. case CS8:
  420. default:
  421. cflag |= DZ_CS8;
  422. }
  423. if (termios->c_cflag & CSTOPB)
  424. cflag |= DZ_CSTOPB;
  425. if (termios->c_cflag & PARENB)
  426. cflag |= DZ_PARENB;
  427. if (termios->c_cflag & PARODD)
  428. cflag |= DZ_PARODD;
  429. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  430. switch (baud) {
  431. case 50:
  432. cflag |= DZ_B50;
  433. break;
  434. case 75:
  435. cflag |= DZ_B75;
  436. break;
  437. case 110:
  438. cflag |= DZ_B110;
  439. break;
  440. case 134:
  441. cflag |= DZ_B134;
  442. break;
  443. case 150:
  444. cflag |= DZ_B150;
  445. break;
  446. case 300:
  447. cflag |= DZ_B300;
  448. break;
  449. case 600:
  450. cflag |= DZ_B600;
  451. break;
  452. case 1200:
  453. cflag |= DZ_B1200;
  454. break;
  455. case 1800:
  456. cflag |= DZ_B1800;
  457. break;
  458. case 2000:
  459. cflag |= DZ_B2000;
  460. break;
  461. case 2400:
  462. cflag |= DZ_B2400;
  463. break;
  464. case 3600:
  465. cflag |= DZ_B3600;
  466. break;
  467. case 4800:
  468. cflag |= DZ_B4800;
  469. break;
  470. case 7200:
  471. cflag |= DZ_B7200;
  472. break;
  473. case 9600:
  474. default:
  475. cflag |= DZ_B9600;
  476. }
  477. if (termios->c_cflag & CREAD)
  478. cflag |= DZ_RXENAB;
  479. spin_lock_irqsave(&dport->port.lock, flags);
  480. dz_out(dport, DZ_LPR, cflag | dport->port.line);
  481. dport->cflag = cflag;
  482. /* setup accept flag */
  483. dport->port.read_status_mask = DZ_OERR;
  484. if (termios->c_iflag & INPCK)
  485. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  486. /* characters to ignore */
  487. uport->ignore_status_mask = 0;
  488. if (termios->c_iflag & IGNPAR)
  489. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  490. spin_unlock_irqrestore(&dport->port.lock, flags);
  491. }
  492. static const char *dz_type(struct uart_port *port)
  493. {
  494. return "DZ";
  495. }
  496. static void dz_release_port(struct uart_port *port)
  497. {
  498. /* nothing to do */
  499. }
  500. static int dz_request_port(struct uart_port *port)
  501. {
  502. return 0;
  503. }
  504. static void dz_config_port(struct uart_port *port, int flags)
  505. {
  506. if (flags & UART_CONFIG_TYPE)
  507. port->type = PORT_DZ;
  508. }
  509. /*
  510. * verify the new serial_struct (for TIOCSSERIAL).
  511. */
  512. static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
  513. {
  514. int ret = 0;
  515. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  516. ret = -EINVAL;
  517. if (ser->irq != port->irq)
  518. ret = -EINVAL;
  519. return ret;
  520. }
  521. static struct uart_ops dz_ops = {
  522. .tx_empty = dz_tx_empty,
  523. .get_mctrl = dz_get_mctrl,
  524. .set_mctrl = dz_set_mctrl,
  525. .stop_tx = dz_stop_tx,
  526. .start_tx = dz_start_tx,
  527. .stop_rx = dz_stop_rx,
  528. .enable_ms = dz_enable_ms,
  529. .break_ctl = dz_break_ctl,
  530. .startup = dz_startup,
  531. .shutdown = dz_shutdown,
  532. .set_termios = dz_set_termios,
  533. .type = dz_type,
  534. .release_port = dz_release_port,
  535. .request_port = dz_request_port,
  536. .config_port = dz_config_port,
  537. .verify_port = dz_verify_port,
  538. };
  539. static void __init dz_init_ports(void)
  540. {
  541. static int first = 1;
  542. struct dz_port *dport;
  543. unsigned long base;
  544. int i;
  545. if (!first)
  546. return;
  547. first = 0;
  548. if (mips_machtype == MACH_DS23100 ||
  549. mips_machtype == MACH_DS5100)
  550. base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
  551. else
  552. base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
  553. for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
  554. spin_lock_init(&dport->port.lock);
  555. dport->port.membase = (char *) base;
  556. dport->port.iotype = UPIO_MEM;
  557. dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
  558. dport->port.line = i;
  559. dport->port.fifosize = 1;
  560. dport->port.ops = &dz_ops;
  561. dport->port.flags = UPF_BOOT_AUTOCONF;
  562. }
  563. }
  564. static void dz_reset(struct dz_port *dport)
  565. {
  566. dz_out(dport, DZ_CSR, DZ_CLR);
  567. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  568. iob();
  569. /* enable scanning */
  570. dz_out(dport, DZ_CSR, DZ_MSE);
  571. }
  572. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  573. /*
  574. * -------------------------------------------------------------------
  575. * dz_console_putchar() -- transmit a character
  576. *
  577. * Polled transmission. This is tricky. We need to mask transmit
  578. * interrupts so that they do not interfere, enable the transmitter
  579. * for the line requested and then wait till the transmit scanner
  580. * requests data for this line. But it may request data for another
  581. * line first, in which case we have to disable its transmitter and
  582. * repeat waiting till our line pops up. Only then the character may
  583. * be transmitted. Finally, the state of the transmitter mask is
  584. * restored. Welcome to the world of PDP-11!
  585. * -------------------------------------------------------------------
  586. */
  587. static void dz_console_putchar(struct uart_port *uport, int ch)
  588. {
  589. struct dz_port *dport = (struct dz_port *)uport;
  590. unsigned long flags;
  591. unsigned short csr, tcr, trdy, mask;
  592. int loops = 10000;
  593. spin_lock_irqsave(&dport->port.lock, flags);
  594. csr = dz_in(dport, DZ_CSR);
  595. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  596. tcr = dz_in(dport, DZ_TCR);
  597. tcr |= 1 << dport->port.line;
  598. mask = tcr;
  599. dz_out(dport, DZ_TCR, mask);
  600. iob();
  601. spin_unlock_irqrestore(&dport->port.lock, flags);
  602. do {
  603. trdy = dz_in(dport, DZ_CSR);
  604. if (!(trdy & DZ_TRDY))
  605. continue;
  606. trdy = (trdy & DZ_TLINE) >> 8;
  607. if (trdy == dport->port.line)
  608. break;
  609. mask &= ~(1 << trdy);
  610. dz_out(dport, DZ_TCR, mask);
  611. iob();
  612. udelay(2);
  613. } while (loops--);
  614. if (loops) /* Cannot send otherwise. */
  615. dz_out(dport, DZ_TDR, ch);
  616. dz_out(dport, DZ_TCR, tcr);
  617. dz_out(dport, DZ_CSR, csr);
  618. }
  619. /*
  620. * -------------------------------------------------------------------
  621. * dz_console_print ()
  622. *
  623. * dz_console_print is registered for printk.
  624. * The console must be locked when we get here.
  625. * -------------------------------------------------------------------
  626. */
  627. static void dz_console_print(struct console *co,
  628. const char *str,
  629. unsigned int count)
  630. {
  631. struct dz_port *dport = &dz_ports[co->index];
  632. #ifdef DEBUG_DZ
  633. prom_printf((char *) str);
  634. #endif
  635. uart_console_write(&dport->port, str, count, dz_console_putchar);
  636. }
  637. static int __init dz_console_setup(struct console *co, char *options)
  638. {
  639. struct dz_port *dport = &dz_ports[co->index];
  640. int baud = 9600;
  641. int bits = 8;
  642. int parity = 'n';
  643. int flow = 'n';
  644. if (options)
  645. uart_parse_options(options, &baud, &parity, &bits, &flow);
  646. dz_reset(dport);
  647. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  648. }
  649. static struct uart_driver dz_reg;
  650. static struct console dz_console = {
  651. .name = "ttyS",
  652. .write = dz_console_print,
  653. .device = uart_console_device,
  654. .setup = dz_console_setup,
  655. .flags = CON_PRINTBUFFER,
  656. .index = -1,
  657. .data = &dz_reg,
  658. };
  659. static int __init dz_serial_console_init(void)
  660. {
  661. if (!IOASIC) {
  662. dz_init_ports();
  663. register_console(&dz_console);
  664. return 0;
  665. } else
  666. return -ENXIO;
  667. }
  668. console_initcall(dz_serial_console_init);
  669. #define SERIAL_DZ_CONSOLE &dz_console
  670. #else
  671. #define SERIAL_DZ_CONSOLE NULL
  672. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  673. static struct uart_driver dz_reg = {
  674. .owner = THIS_MODULE,
  675. .driver_name = "serial",
  676. .dev_name = "ttyS",
  677. .major = TTY_MAJOR,
  678. .minor = 64,
  679. .nr = DZ_NB_PORT,
  680. .cons = SERIAL_DZ_CONSOLE,
  681. };
  682. static int __init dz_init(void)
  683. {
  684. int ret, i;
  685. if (IOASIC)
  686. return -ENXIO;
  687. printk("%s%s\n", dz_name, dz_version);
  688. dz_init_ports();
  689. #ifndef CONFIG_SERIAL_DZ_CONSOLE
  690. /* reset the chip */
  691. dz_reset(&dz_ports[0]);
  692. #endif
  693. ret = uart_register_driver(&dz_reg);
  694. if (ret != 0)
  695. goto out;
  696. ret = request_irq(dz_ports[0].port.irq, dz_interrupt, IRQF_DISABLED,
  697. "DZ", &dz_ports[0]);
  698. if (ret != 0) {
  699. printk(KERN_ERR "dz: Cannot get IRQ %d!\n",
  700. dz_ports[0].port.irq);
  701. goto out_unregister;
  702. }
  703. for (i = 0; i < DZ_NB_PORT; i++)
  704. uart_add_one_port(&dz_reg, &dz_ports[i].port);
  705. return ret;
  706. out_unregister:
  707. uart_unregister_driver(&dz_reg);
  708. out:
  709. return ret;
  710. }
  711. module_init(dz_init);
  712. MODULE_DESCRIPTION("DECstation DZ serial driver");
  713. MODULE_LICENSE("GPL");