v2m.c 7.9 KB

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  1. /*
  2. * Versatile Express V2M Motherboard Support
  3. */
  4. #include <linux/device.h>
  5. #include <linux/amba/bus.h>
  6. #include <linux/amba/mmci.h>
  7. #include <linux/io.h>
  8. #include <linux/init.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/smsc911x.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/sysdev.h>
  13. #include <linux/usb/isp1760.h>
  14. #include <linux/clkdev.h>
  15. #include <asm/sizes.h>
  16. #include <asm/mach/flash.h>
  17. #include <asm/mach/map.h>
  18. #include <asm/mach/time.h>
  19. #include <asm/hardware/arm_timer.h>
  20. #include <mach/motherboard.h>
  21. #include <plat/timer-sp.h>
  22. #include "core.h"
  23. #define V2M_PA_CS0 0x40000000
  24. #define V2M_PA_CS1 0x44000000
  25. #define V2M_PA_CS2 0x48000000
  26. #define V2M_PA_CS3 0x4c000000
  27. #define V2M_PA_CS7 0x10000000
  28. static struct map_desc v2m_io_desc[] __initdata = {
  29. {
  30. .virtual = __MMIO_P2V(V2M_PA_CS7),
  31. .pfn = __phys_to_pfn(V2M_PA_CS7),
  32. .length = SZ_128K,
  33. .type = MT_DEVICE,
  34. },
  35. };
  36. void __init v2m_map_io(struct map_desc *tile, size_t num)
  37. {
  38. iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
  39. iotable_init(tile, num);
  40. }
  41. static void __init v2m_timer_init(void)
  42. {
  43. writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
  44. writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
  45. sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
  46. sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
  47. }
  48. struct sys_timer v2m_timer = {
  49. .init = v2m_timer_init,
  50. };
  51. static DEFINE_SPINLOCK(v2m_cfg_lock);
  52. int v2m_cfg_write(u32 devfn, u32 data)
  53. {
  54. /* Configuration interface broken? */
  55. u32 val;
  56. printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  57. devfn |= SYS_CFG_START | SYS_CFG_WRITE;
  58. spin_lock(&v2m_cfg_lock);
  59. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  60. writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
  61. writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
  62. writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
  63. do {
  64. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  65. } while (val == 0);
  66. spin_unlock(&v2m_cfg_lock);
  67. return !!(val & SYS_CFG_ERR);
  68. }
  69. int v2m_cfg_read(u32 devfn, u32 *data)
  70. {
  71. u32 val;
  72. devfn |= SYS_CFG_START;
  73. spin_lock(&v2m_cfg_lock);
  74. writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
  75. writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
  76. mb();
  77. do {
  78. cpu_relax();
  79. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  80. } while (val == 0);
  81. *data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
  82. spin_unlock(&v2m_cfg_lock);
  83. return !!(val & SYS_CFG_ERR);
  84. }
  85. static struct resource v2m_pcie_i2c_resource = {
  86. .start = V2M_SERIAL_BUS_PCI,
  87. .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
  88. .flags = IORESOURCE_MEM,
  89. };
  90. static struct platform_device v2m_pcie_i2c_device = {
  91. .name = "versatile-i2c",
  92. .id = 0,
  93. .num_resources = 1,
  94. .resource = &v2m_pcie_i2c_resource,
  95. };
  96. static struct resource v2m_ddc_i2c_resource = {
  97. .start = V2M_SERIAL_BUS_DVI,
  98. .end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
  99. .flags = IORESOURCE_MEM,
  100. };
  101. static struct platform_device v2m_ddc_i2c_device = {
  102. .name = "versatile-i2c",
  103. .id = 1,
  104. .num_resources = 1,
  105. .resource = &v2m_ddc_i2c_resource,
  106. };
  107. static struct resource v2m_eth_resources[] = {
  108. {
  109. .start = V2M_LAN9118,
  110. .end = V2M_LAN9118 + SZ_64K - 1,
  111. .flags = IORESOURCE_MEM,
  112. }, {
  113. .start = IRQ_V2M_LAN9118,
  114. .end = IRQ_V2M_LAN9118,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. static struct smsc911x_platform_config v2m_eth_config = {
  119. .flags = SMSC911X_USE_32BIT,
  120. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  121. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  122. .phy_interface = PHY_INTERFACE_MODE_MII,
  123. };
  124. static struct platform_device v2m_eth_device = {
  125. .name = "smsc911x",
  126. .id = -1,
  127. .resource = v2m_eth_resources,
  128. .num_resources = ARRAY_SIZE(v2m_eth_resources),
  129. .dev.platform_data = &v2m_eth_config,
  130. };
  131. static struct resource v2m_usb_resources[] = {
  132. {
  133. .start = V2M_ISP1761,
  134. .end = V2M_ISP1761 + SZ_128K - 1,
  135. .flags = IORESOURCE_MEM,
  136. }, {
  137. .start = IRQ_V2M_ISP1761,
  138. .end = IRQ_V2M_ISP1761,
  139. .flags = IORESOURCE_IRQ,
  140. },
  141. };
  142. static struct isp1760_platform_data v2m_usb_config = {
  143. .is_isp1761 = true,
  144. .bus_width_16 = false,
  145. .port1_otg = true,
  146. .analog_oc = false,
  147. .dack_polarity_high = false,
  148. .dreq_polarity_high = false,
  149. };
  150. static struct platform_device v2m_usb_device = {
  151. .name = "isp1760",
  152. .id = -1,
  153. .resource = v2m_usb_resources,
  154. .num_resources = ARRAY_SIZE(v2m_usb_resources),
  155. .dev.platform_data = &v2m_usb_config,
  156. };
  157. static int v2m_flash_init(void)
  158. {
  159. writel(0, MMIO_P2V(V2M_SYS_FLASH));
  160. return 0;
  161. }
  162. static void v2m_flash_exit(void)
  163. {
  164. writel(0, MMIO_P2V(V2M_SYS_FLASH));
  165. }
  166. static void v2m_flash_set_vpp(int on)
  167. {
  168. writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
  169. }
  170. static struct flash_platform_data v2m_flash_data = {
  171. .map_name = "cfi_probe",
  172. .width = 4,
  173. .init = v2m_flash_init,
  174. .exit = v2m_flash_exit,
  175. .set_vpp = v2m_flash_set_vpp,
  176. };
  177. static struct resource v2m_flash_resources[] = {
  178. {
  179. .start = V2M_NOR0,
  180. .end = V2M_NOR0 + SZ_64M - 1,
  181. .flags = IORESOURCE_MEM,
  182. }, {
  183. .start = V2M_NOR1,
  184. .end = V2M_NOR1 + SZ_64M - 1,
  185. .flags = IORESOURCE_MEM,
  186. },
  187. };
  188. static struct platform_device v2m_flash_device = {
  189. .name = "armflash",
  190. .id = -1,
  191. .resource = v2m_flash_resources,
  192. .num_resources = ARRAY_SIZE(v2m_flash_resources),
  193. .dev.platform_data = &v2m_flash_data,
  194. };
  195. static unsigned int v2m_mmci_status(struct device *dev)
  196. {
  197. return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
  198. }
  199. static struct mmci_platform_data v2m_mmci_data = {
  200. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  201. .status = v2m_mmci_status,
  202. };
  203. static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
  204. static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
  205. static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
  206. static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
  207. static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
  208. static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
  209. static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
  210. static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
  211. static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
  212. static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
  213. static struct amba_device *v2m_amba_devs[] __initdata = {
  214. &aaci_device,
  215. &mmci_device,
  216. &kmi0_device,
  217. &kmi1_device,
  218. &uart0_device,
  219. &uart1_device,
  220. &uart2_device,
  221. &uart3_device,
  222. &wdt_device,
  223. &rtc_device,
  224. };
  225. static long v2m_osc_round(struct clk *clk, unsigned long rate)
  226. {
  227. return rate;
  228. }
  229. static int v2m_osc1_set(struct clk *clk, unsigned long rate)
  230. {
  231. return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
  232. }
  233. static const struct clk_ops osc1_clk_ops = {
  234. .round = v2m_osc_round,
  235. .set = v2m_osc1_set,
  236. };
  237. static struct clk osc1_clk = {
  238. .ops = &osc1_clk_ops,
  239. .rate = 24000000,
  240. };
  241. static struct clk osc2_clk = {
  242. .rate = 24000000,
  243. };
  244. static struct clk dummy_apb_pclk;
  245. static struct clk_lookup v2m_lookups[] = {
  246. { /* AMBA bus clock */
  247. .con_id = "apb_pclk",
  248. .clk = &dummy_apb_pclk,
  249. }, { /* UART0 */
  250. .dev_id = "mb:uart0",
  251. .clk = &osc2_clk,
  252. }, { /* UART1 */
  253. .dev_id = "mb:uart1",
  254. .clk = &osc2_clk,
  255. }, { /* UART2 */
  256. .dev_id = "mb:uart2",
  257. .clk = &osc2_clk,
  258. }, { /* UART3 */
  259. .dev_id = "mb:uart3",
  260. .clk = &osc2_clk,
  261. }, { /* KMI0 */
  262. .dev_id = "mb:kmi0",
  263. .clk = &osc2_clk,
  264. }, { /* KMI1 */
  265. .dev_id = "mb:kmi1",
  266. .clk = &osc2_clk,
  267. }, { /* MMC0 */
  268. .dev_id = "mb:mmci",
  269. .clk = &osc2_clk,
  270. }, { /* CLCD */
  271. .dev_id = "mb:clcd",
  272. .clk = &osc1_clk,
  273. },
  274. };
  275. static void v2m_power_off(void)
  276. {
  277. if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
  278. printk(KERN_EMERG "Unable to shutdown\n");
  279. }
  280. static void v2m_restart(char str, const char *cmd)
  281. {
  282. if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
  283. printk(KERN_EMERG "Unable to reboot\n");
  284. }
  285. static int __init v2m_init(void)
  286. {
  287. int i;
  288. clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
  289. platform_device_register(&v2m_pcie_i2c_device);
  290. platform_device_register(&v2m_ddc_i2c_device);
  291. platform_device_register(&v2m_flash_device);
  292. platform_device_register(&v2m_eth_device);
  293. platform_device_register(&v2m_usb_device);
  294. for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
  295. amba_device_register(v2m_amba_devs[i], &iomem_resource);
  296. pm_power_off = v2m_power_off;
  297. arm_pm_restart = v2m_restart;
  298. return 0;
  299. }
  300. arch_initcall(v2m_init);