cm_bf537e.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/ata_platform.h>
  21. #include <linux/irq.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "Bluetechnix CM BF537E";
  30. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  31. /* all SPI peripherals info goes here */
  32. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  33. static struct mtd_partition bfin_spi_flash_partitions[] = {
  34. {
  35. .name = "bootloader(spi)",
  36. .size = 0x00020000,
  37. .offset = 0,
  38. .mask_flags = MTD_CAP_ROM
  39. }, {
  40. .name = "linux kernel(spi)",
  41. .size = 0xe0000,
  42. .offset = 0x20000
  43. }, {
  44. .name = "file system(spi)",
  45. .size = 0x700000,
  46. .offset = 0x00100000,
  47. }
  48. };
  49. static struct flash_platform_data bfin_spi_flash_data = {
  50. .name = "m25p80",
  51. .parts = bfin_spi_flash_partitions,
  52. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  53. .type = "m25p64",
  54. };
  55. /* SPI flash chip (m25p64) */
  56. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  57. .enable_dma = 0, /* use dma transfer with this chip*/
  58. };
  59. #endif
  60. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  61. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  62. .enable_dma = 0,
  63. };
  64. #endif
  65. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  66. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  67. {
  68. /* the modalias must be the same as spi device driver name */
  69. .modalias = "m25p80", /* Name of spi_driver for this device */
  70. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  71. .bus_num = 0, /* Framework bus number */
  72. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  73. .platform_data = &bfin_spi_flash_data,
  74. .controller_data = &spi_flash_chip_info,
  75. .mode = SPI_MODE_3,
  76. },
  77. #endif
  78. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  79. {
  80. .modalias = "ad183x",
  81. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  82. .bus_num = 0,
  83. .chip_select = 4,
  84. },
  85. #endif
  86. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  87. {
  88. .modalias = "mmc_spi",
  89. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  90. .bus_num = 0,
  91. .chip_select = 1,
  92. .controller_data = &mmc_spi_chip_info,
  93. .mode = SPI_MODE_3,
  94. },
  95. #endif
  96. };
  97. /* SPI (0) */
  98. static struct resource bfin_spi0_resource[] = {
  99. [0] = {
  100. .start = SPI0_REGBASE,
  101. .end = SPI0_REGBASE + 0xFF,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. [1] = {
  105. .start = CH_SPI,
  106. .end = CH_SPI,
  107. .flags = IORESOURCE_DMA,
  108. },
  109. [2] = {
  110. .start = IRQ_SPI,
  111. .end = IRQ_SPI,
  112. .flags = IORESOURCE_IRQ,
  113. },
  114. };
  115. /* SPI controller data */
  116. static struct bfin5xx_spi_master bfin_spi0_info = {
  117. .num_chipselect = 8,
  118. .enable_dma = 1, /* master has the ability to do dma transfer */
  119. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  120. };
  121. static struct platform_device bfin_spi0_device = {
  122. .name = "bfin-spi",
  123. .id = 0, /* Bus number */
  124. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  125. .resource = bfin_spi0_resource,
  126. .dev = {
  127. .platform_data = &bfin_spi0_info, /* Passed to driver */
  128. },
  129. };
  130. #endif /* spi master and devices */
  131. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  132. static struct platform_device rtc_device = {
  133. .name = "rtc-bfin",
  134. .id = -1,
  135. };
  136. #endif
  137. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  138. static struct platform_device hitachi_fb_device = {
  139. .name = "hitachi-tx09",
  140. };
  141. #endif
  142. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  143. #include <linux/smc91x.h>
  144. static struct smc91x_platdata smc91x_info = {
  145. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  146. .leda = RPC_LED_100_10,
  147. .ledb = RPC_LED_TX_RX,
  148. };
  149. static struct resource smc91x_resources[] = {
  150. {
  151. .start = 0x20200300,
  152. .end = 0x20200300 + 16,
  153. .flags = IORESOURCE_MEM,
  154. }, {
  155. .start = IRQ_PF14,
  156. .end = IRQ_PF14,
  157. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  158. },
  159. };
  160. static struct platform_device smc91x_device = {
  161. .name = "smc91x",
  162. .id = 0,
  163. .num_resources = ARRAY_SIZE(smc91x_resources),
  164. .resource = smc91x_resources,
  165. .dev = {
  166. .platform_data = &smc91x_info,
  167. },
  168. };
  169. #endif
  170. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  171. static struct resource isp1362_hcd_resources[] = {
  172. {
  173. .start = 0x20308000,
  174. .end = 0x20308000,
  175. .flags = IORESOURCE_MEM,
  176. }, {
  177. .start = 0x20308004,
  178. .end = 0x20308004,
  179. .flags = IORESOURCE_MEM,
  180. }, {
  181. .start = IRQ_PG15,
  182. .end = IRQ_PG15,
  183. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  184. },
  185. };
  186. static struct isp1362_platform_data isp1362_priv = {
  187. .sel15Kres = 1,
  188. .clknotstop = 0,
  189. .oc_enable = 0,
  190. .int_act_high = 0,
  191. .int_edge_triggered = 0,
  192. .remote_wakeup_connected = 0,
  193. .no_power_switching = 1,
  194. .power_switching_mode = 0,
  195. };
  196. static struct platform_device isp1362_hcd_device = {
  197. .name = "isp1362-hcd",
  198. .id = 0,
  199. .dev = {
  200. .platform_data = &isp1362_priv,
  201. },
  202. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  203. .resource = isp1362_hcd_resources,
  204. };
  205. #endif
  206. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  207. static struct resource net2272_bfin_resources[] = {
  208. {
  209. .start = 0x20300000,
  210. .end = 0x20300000 + 0x100,
  211. .flags = IORESOURCE_MEM,
  212. }, {
  213. .start = IRQ_PG13,
  214. .end = IRQ_PG13,
  215. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  216. },
  217. };
  218. static struct platform_device net2272_bfin_device = {
  219. .name = "net2272",
  220. .id = -1,
  221. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  222. .resource = net2272_bfin_resources,
  223. };
  224. #endif
  225. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  226. static struct mtd_partition cm_partitions[] = {
  227. {
  228. .name = "bootloader(nor)",
  229. .size = 0x40000,
  230. .offset = 0,
  231. }, {
  232. .name = "linux kernel(nor)",
  233. .size = 0x100000,
  234. .offset = MTDPART_OFS_APPEND,
  235. }, {
  236. .name = "file system(nor)",
  237. .size = MTDPART_SIZ_FULL,
  238. .offset = MTDPART_OFS_APPEND,
  239. }
  240. };
  241. static struct physmap_flash_data cm_flash_data = {
  242. .width = 2,
  243. .parts = cm_partitions,
  244. .nr_parts = ARRAY_SIZE(cm_partitions),
  245. };
  246. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  247. static struct resource cm_flash_resource[] = {
  248. {
  249. .name = "cfi_probe",
  250. .start = 0x20000000,
  251. .end = 0x201fffff,
  252. .flags = IORESOURCE_MEM,
  253. }, {
  254. .start = (unsigned long)cm_flash_gpios,
  255. .end = ARRAY_SIZE(cm_flash_gpios),
  256. .flags = IORESOURCE_IRQ,
  257. }
  258. };
  259. static struct platform_device cm_flash_device = {
  260. .name = "gpio-addr-flash",
  261. .id = 0,
  262. .dev = {
  263. .platform_data = &cm_flash_data,
  264. },
  265. .num_resources = ARRAY_SIZE(cm_flash_resource),
  266. .resource = cm_flash_resource,
  267. };
  268. #endif
  269. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  270. #ifdef CONFIG_SERIAL_BFIN_UART0
  271. static struct resource bfin_uart0_resources[] = {
  272. {
  273. .start = UART0_THR,
  274. .end = UART0_GCTL+2,
  275. .flags = IORESOURCE_MEM,
  276. },
  277. {
  278. .start = IRQ_UART0_RX,
  279. .end = IRQ_UART0_RX+1,
  280. .flags = IORESOURCE_IRQ,
  281. },
  282. {
  283. .start = IRQ_UART0_ERROR,
  284. .end = IRQ_UART0_ERROR,
  285. .flags = IORESOURCE_IRQ,
  286. },
  287. {
  288. .start = CH_UART0_TX,
  289. .end = CH_UART0_TX,
  290. .flags = IORESOURCE_DMA,
  291. },
  292. {
  293. .start = CH_UART0_RX,
  294. .end = CH_UART0_RX,
  295. .flags = IORESOURCE_DMA,
  296. },
  297. #ifdef CONFIG_BFIN_UART0_CTSRTS
  298. {
  299. /*
  300. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  301. */
  302. .start = -1,
  303. .end = -1,
  304. .flags = IORESOURCE_IO,
  305. },
  306. {
  307. /*
  308. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  309. */
  310. .start = -1,
  311. .end = -1,
  312. .flags = IORESOURCE_IO,
  313. },
  314. #endif
  315. };
  316. static unsigned short bfin_uart0_peripherals[] = {
  317. P_UART0_TX, P_UART0_RX, 0
  318. };
  319. static struct platform_device bfin_uart0_device = {
  320. .name = "bfin-uart",
  321. .id = 0,
  322. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  323. .resource = bfin_uart0_resources,
  324. .dev = {
  325. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  326. },
  327. };
  328. #endif
  329. #ifdef CONFIG_SERIAL_BFIN_UART1
  330. static struct resource bfin_uart1_resources[] = {
  331. {
  332. .start = UART1_THR,
  333. .end = UART1_GCTL+2,
  334. .flags = IORESOURCE_MEM,
  335. },
  336. {
  337. .start = IRQ_UART1_RX,
  338. .end = IRQ_UART1_RX+1,
  339. .flags = IORESOURCE_IRQ,
  340. },
  341. {
  342. .start = IRQ_UART1_ERROR,
  343. .end = IRQ_UART1_ERROR,
  344. .flags = IORESOURCE_IRQ,
  345. },
  346. {
  347. .start = CH_UART1_TX,
  348. .end = CH_UART1_TX,
  349. .flags = IORESOURCE_DMA,
  350. },
  351. {
  352. .start = CH_UART1_RX,
  353. .end = CH_UART1_RX,
  354. .flags = IORESOURCE_DMA,
  355. },
  356. #ifdef CONFIG_BFIN_UART1_CTSRTS
  357. {
  358. /*
  359. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  360. */
  361. .start = -1,
  362. .end = -1,
  363. .flags = IORESOURCE_IO,
  364. },
  365. {
  366. /*
  367. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  368. */
  369. .start = -1,
  370. .end = -1,
  371. .flags = IORESOURCE_IO,
  372. },
  373. #endif
  374. };
  375. static unsigned short bfin_uart1_peripherals[] = {
  376. P_UART1_TX, P_UART1_RX, 0
  377. };
  378. static struct platform_device bfin_uart1_device = {
  379. .name = "bfin-uart",
  380. .id = 1,
  381. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  382. .resource = bfin_uart1_resources,
  383. .dev = {
  384. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  385. },
  386. };
  387. #endif
  388. #endif
  389. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  390. #ifdef CONFIG_BFIN_SIR0
  391. static struct resource bfin_sir0_resources[] = {
  392. {
  393. .start = 0xFFC00400,
  394. .end = 0xFFC004FF,
  395. .flags = IORESOURCE_MEM,
  396. },
  397. {
  398. .start = IRQ_UART0_RX,
  399. .end = IRQ_UART0_RX+1,
  400. .flags = IORESOURCE_IRQ,
  401. },
  402. {
  403. .start = CH_UART0_RX,
  404. .end = CH_UART0_RX+1,
  405. .flags = IORESOURCE_DMA,
  406. },
  407. };
  408. static struct platform_device bfin_sir0_device = {
  409. .name = "bfin_sir",
  410. .id = 0,
  411. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  412. .resource = bfin_sir0_resources,
  413. };
  414. #endif
  415. #ifdef CONFIG_BFIN_SIR1
  416. static struct resource bfin_sir1_resources[] = {
  417. {
  418. .start = 0xFFC02000,
  419. .end = 0xFFC020FF,
  420. .flags = IORESOURCE_MEM,
  421. },
  422. {
  423. .start = IRQ_UART1_RX,
  424. .end = IRQ_UART1_RX+1,
  425. .flags = IORESOURCE_IRQ,
  426. },
  427. {
  428. .start = CH_UART1_RX,
  429. .end = CH_UART1_RX+1,
  430. .flags = IORESOURCE_DMA,
  431. },
  432. };
  433. static struct platform_device bfin_sir1_device = {
  434. .name = "bfin_sir",
  435. .id = 1,
  436. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  437. .resource = bfin_sir1_resources,
  438. };
  439. #endif
  440. #endif
  441. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  442. static struct resource bfin_twi0_resource[] = {
  443. [0] = {
  444. .start = TWI0_REGBASE,
  445. .end = TWI0_REGBASE,
  446. .flags = IORESOURCE_MEM,
  447. },
  448. [1] = {
  449. .start = IRQ_TWI,
  450. .end = IRQ_TWI,
  451. .flags = IORESOURCE_IRQ,
  452. },
  453. };
  454. static struct platform_device i2c_bfin_twi_device = {
  455. .name = "i2c-bfin-twi",
  456. .id = 0,
  457. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  458. .resource = bfin_twi0_resource,
  459. };
  460. #endif
  461. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  462. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  463. static struct resource bfin_sport0_uart_resources[] = {
  464. {
  465. .start = SPORT0_TCR1,
  466. .end = SPORT0_MRCS3+4,
  467. .flags = IORESOURCE_MEM,
  468. },
  469. {
  470. .start = IRQ_SPORT0_RX,
  471. .end = IRQ_SPORT0_RX+1,
  472. .flags = IORESOURCE_IRQ,
  473. },
  474. {
  475. .start = IRQ_SPORT0_ERROR,
  476. .end = IRQ_SPORT0_ERROR,
  477. .flags = IORESOURCE_IRQ,
  478. },
  479. };
  480. static unsigned short bfin_sport0_peripherals[] = {
  481. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  482. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  483. };
  484. static struct platform_device bfin_sport0_uart_device = {
  485. .name = "bfin-sport-uart",
  486. .id = 0,
  487. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  488. .resource = bfin_sport0_uart_resources,
  489. .dev = {
  490. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  491. },
  492. };
  493. #endif
  494. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  495. static struct resource bfin_sport1_uart_resources[] = {
  496. {
  497. .start = SPORT1_TCR1,
  498. .end = SPORT1_MRCS3+4,
  499. .flags = IORESOURCE_MEM,
  500. },
  501. {
  502. .start = IRQ_SPORT1_RX,
  503. .end = IRQ_SPORT1_RX+1,
  504. .flags = IORESOURCE_IRQ,
  505. },
  506. {
  507. .start = IRQ_SPORT1_ERROR,
  508. .end = IRQ_SPORT1_ERROR,
  509. .flags = IORESOURCE_IRQ,
  510. },
  511. };
  512. static unsigned short bfin_sport1_peripherals[] = {
  513. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  514. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  515. };
  516. static struct platform_device bfin_sport1_uart_device = {
  517. .name = "bfin-sport-uart",
  518. .id = 1,
  519. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  520. .resource = bfin_sport1_uart_resources,
  521. .dev = {
  522. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  523. },
  524. };
  525. #endif
  526. #endif
  527. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  528. #include <linux/bfin_mac.h>
  529. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  530. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  531. {
  532. .addr = 1,
  533. .irq = IRQ_MAC_PHYINT,
  534. },
  535. };
  536. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  537. .phydev_number = 1,
  538. .phydev_data = bfin_phydev_data,
  539. .phy_mode = PHY_INTERFACE_MODE_MII,
  540. .mac_peripherals = bfin_mac_peripherals,
  541. };
  542. static struct platform_device bfin_mii_bus = {
  543. .name = "bfin_mii_bus",
  544. .dev = {
  545. .platform_data = &bfin_mii_bus_data,
  546. }
  547. };
  548. static struct platform_device bfin_mac_device = {
  549. .name = "bfin_mac",
  550. .dev = {
  551. .platform_data = &bfin_mii_bus,
  552. }
  553. };
  554. #endif
  555. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  556. #define PATA_INT IRQ_PF14
  557. static struct pata_platform_info bfin_pata_platform_data = {
  558. .ioport_shift = 2,
  559. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  560. };
  561. static struct resource bfin_pata_resources[] = {
  562. {
  563. .start = 0x2030C000,
  564. .end = 0x2030C01F,
  565. .flags = IORESOURCE_MEM,
  566. },
  567. {
  568. .start = 0x2030D018,
  569. .end = 0x2030D01B,
  570. .flags = IORESOURCE_MEM,
  571. },
  572. {
  573. .start = PATA_INT,
  574. .end = PATA_INT,
  575. .flags = IORESOURCE_IRQ,
  576. },
  577. };
  578. static struct platform_device bfin_pata_device = {
  579. .name = "pata_platform",
  580. .id = -1,
  581. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  582. .resource = bfin_pata_resources,
  583. .dev = {
  584. .platform_data = &bfin_pata_platform_data,
  585. }
  586. };
  587. #endif
  588. static const unsigned int cclk_vlev_datasheet[] =
  589. {
  590. VRPAIR(VLEV_085, 250000000),
  591. VRPAIR(VLEV_090, 376000000),
  592. VRPAIR(VLEV_095, 426000000),
  593. VRPAIR(VLEV_100, 426000000),
  594. VRPAIR(VLEV_105, 476000000),
  595. VRPAIR(VLEV_110, 476000000),
  596. VRPAIR(VLEV_115, 476000000),
  597. VRPAIR(VLEV_120, 500000000),
  598. VRPAIR(VLEV_125, 533000000),
  599. VRPAIR(VLEV_130, 600000000),
  600. };
  601. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  602. .tuple_tab = cclk_vlev_datasheet,
  603. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  604. .vr_settling_time = 25 /* us */,
  605. };
  606. static struct platform_device bfin_dpmc = {
  607. .name = "bfin dpmc",
  608. .dev = {
  609. .platform_data = &bfin_dmpc_vreg_data,
  610. },
  611. };
  612. static struct platform_device *cm_bf537e_devices[] __initdata = {
  613. &bfin_dpmc,
  614. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  615. &hitachi_fb_device,
  616. #endif
  617. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  618. &rtc_device,
  619. #endif
  620. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  621. #ifdef CONFIG_SERIAL_BFIN_UART0
  622. &bfin_uart0_device,
  623. #endif
  624. #ifdef CONFIG_SERIAL_BFIN_UART1
  625. &bfin_uart1_device,
  626. #endif
  627. #endif
  628. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  629. #ifdef CONFIG_BFIN_SIR0
  630. &bfin_sir0_device,
  631. #endif
  632. #ifdef CONFIG_BFIN_SIR1
  633. &bfin_sir1_device,
  634. #endif
  635. #endif
  636. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  637. &i2c_bfin_twi_device,
  638. #endif
  639. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  640. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  641. &bfin_sport0_uart_device,
  642. #endif
  643. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  644. &bfin_sport1_uart_device,
  645. #endif
  646. #endif
  647. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  648. &isp1362_hcd_device,
  649. #endif
  650. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  651. &smc91x_device,
  652. #endif
  653. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  654. &bfin_mii_bus,
  655. &bfin_mac_device,
  656. #endif
  657. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  658. &net2272_bfin_device,
  659. #endif
  660. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  661. &bfin_spi0_device,
  662. #endif
  663. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  664. &bfin_pata_device,
  665. #endif
  666. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  667. &cm_flash_device,
  668. #endif
  669. };
  670. static int __init net2272_init(void)
  671. {
  672. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  673. int ret;
  674. ret = gpio_request(GPIO_PG14, "net2272");
  675. if (ret)
  676. return ret;
  677. /* Reset USB Chip, PG14 */
  678. gpio_direction_output(GPIO_PG14, 0);
  679. mdelay(2);
  680. gpio_set_value(GPIO_PG14, 1);
  681. #endif
  682. return 0;
  683. }
  684. static int __init cm_bf537e_init(void)
  685. {
  686. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  687. platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
  688. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  689. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  690. #endif
  691. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  692. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  693. #endif
  694. if (net2272_init())
  695. pr_warning("unable to configure net2272; it probably won't work\n");
  696. return 0;
  697. }
  698. arch_initcall(cm_bf537e_init);
  699. static struct platform_device *cm_bf537e_early_devices[] __initdata = {
  700. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  701. #ifdef CONFIG_SERIAL_BFIN_UART0
  702. &bfin_uart0_device,
  703. #endif
  704. #ifdef CONFIG_SERIAL_BFIN_UART1
  705. &bfin_uart1_device,
  706. #endif
  707. #endif
  708. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  709. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  710. &bfin_sport0_uart_device,
  711. #endif
  712. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  713. &bfin_sport1_uart_device,
  714. #endif
  715. #endif
  716. };
  717. void __init native_machine_early_platform_add_devices(void)
  718. {
  719. printk(KERN_INFO "register early platform devices\n");
  720. early_platform_add_devices(cm_bf537e_early_devices,
  721. ARRAY_SIZE(cm_bf537e_early_devices));
  722. }
  723. void bfin_get_ether_addr(char *addr)
  724. {
  725. random_ether_addr(addr);
  726. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  727. }
  728. EXPORT_SYMBOL(bfin_get_ether_addr);