libata-core.c 191 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. * Standards documents from:
  34. * http://www.t13.org (ATA standards, PCI DMA IDE spec)
  35. * http://www.t10.org (SCSI MMC - for ATAPI MMC)
  36. * http://www.sata-io.org (SATA)
  37. * http://www.compactflash.org (CF)
  38. * http://www.qic.org (QIC157 - Tape and DSC)
  39. * http://www.ce-ata.org (CE-ATA: not supported)
  40. *
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/pci.h>
  45. #include <linux/init.h>
  46. #include <linux/list.h>
  47. #include <linux/mm.h>
  48. #include <linux/highmem.h>
  49. #include <linux/spinlock.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/timer.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/completion.h>
  55. #include <linux/suspend.h>
  56. #include <linux/workqueue.h>
  57. #include <linux/jiffies.h>
  58. #include <linux/scatterlist.h>
  59. #include <linux/io.h>
  60. #include <scsi/scsi.h>
  61. #include <scsi/scsi_cmnd.h>
  62. #include <scsi/scsi_host.h>
  63. #include <linux/libata.h>
  64. #include <asm/semaphore.h>
  65. #include <asm/byteorder.h>
  66. #include "libata.h"
  67. /* debounce timing parameters in msecs { interval, duration, timeout } */
  68. const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
  69. const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
  70. const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
  71. static unsigned int ata_dev_init_params(struct ata_device *dev,
  72. u16 heads, u16 sectors);
  73. static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
  74. static unsigned int ata_dev_set_feature(struct ata_device *dev,
  75. u8 enable, u8 feature);
  76. static void ata_dev_xfermask(struct ata_device *dev);
  77. static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
  78. unsigned int ata_print_id = 1;
  79. static struct workqueue_struct *ata_wq;
  80. struct workqueue_struct *ata_aux_wq;
  81. int atapi_enabled = 1;
  82. module_param(atapi_enabled, int, 0444);
  83. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  84. int atapi_dmadir = 0;
  85. module_param(atapi_dmadir, int, 0444);
  86. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  87. int atapi_passthru16 = 1;
  88. module_param(atapi_passthru16, int, 0444);
  89. MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
  90. int libata_fua = 0;
  91. module_param_named(fua, libata_fua, int, 0444);
  92. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  93. static int ata_ignore_hpa;
  94. module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
  95. MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
  96. static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
  97. module_param_named(dma, libata_dma_mask, int, 0444);
  98. MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
  99. static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
  100. module_param(ata_probe_timeout, int, 0444);
  101. MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
  102. int libata_noacpi = 0;
  103. module_param_named(noacpi, libata_noacpi, int, 0444);
  104. MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
  105. MODULE_AUTHOR("Jeff Garzik");
  106. MODULE_DESCRIPTION("Library module for ATA devices");
  107. MODULE_LICENSE("GPL");
  108. MODULE_VERSION(DRV_VERSION);
  109. /**
  110. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  111. * @tf: Taskfile to convert
  112. * @pmp: Port multiplier port
  113. * @is_cmd: This FIS is for command
  114. * @fis: Buffer into which data will output
  115. *
  116. * Converts a standard ATA taskfile to a Serial ATA
  117. * FIS structure (Register - Host to Device).
  118. *
  119. * LOCKING:
  120. * Inherited from caller.
  121. */
  122. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
  123. {
  124. fis[0] = 0x27; /* Register - Host to Device FIS */
  125. fis[1] = pmp & 0xf; /* Port multiplier number*/
  126. if (is_cmd)
  127. fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
  128. fis[2] = tf->command;
  129. fis[3] = tf->feature;
  130. fis[4] = tf->lbal;
  131. fis[5] = tf->lbam;
  132. fis[6] = tf->lbah;
  133. fis[7] = tf->device;
  134. fis[8] = tf->hob_lbal;
  135. fis[9] = tf->hob_lbam;
  136. fis[10] = tf->hob_lbah;
  137. fis[11] = tf->hob_feature;
  138. fis[12] = tf->nsect;
  139. fis[13] = tf->hob_nsect;
  140. fis[14] = 0;
  141. fis[15] = tf->ctl;
  142. fis[16] = 0;
  143. fis[17] = 0;
  144. fis[18] = 0;
  145. fis[19] = 0;
  146. }
  147. /**
  148. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  149. * @fis: Buffer from which data will be input
  150. * @tf: Taskfile to output
  151. *
  152. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  153. *
  154. * LOCKING:
  155. * Inherited from caller.
  156. */
  157. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  158. {
  159. tf->command = fis[2]; /* status */
  160. tf->feature = fis[3]; /* error */
  161. tf->lbal = fis[4];
  162. tf->lbam = fis[5];
  163. tf->lbah = fis[6];
  164. tf->device = fis[7];
  165. tf->hob_lbal = fis[8];
  166. tf->hob_lbam = fis[9];
  167. tf->hob_lbah = fis[10];
  168. tf->nsect = fis[12];
  169. tf->hob_nsect = fis[13];
  170. }
  171. static const u8 ata_rw_cmds[] = {
  172. /* pio multi */
  173. ATA_CMD_READ_MULTI,
  174. ATA_CMD_WRITE_MULTI,
  175. ATA_CMD_READ_MULTI_EXT,
  176. ATA_CMD_WRITE_MULTI_EXT,
  177. 0,
  178. 0,
  179. 0,
  180. ATA_CMD_WRITE_MULTI_FUA_EXT,
  181. /* pio */
  182. ATA_CMD_PIO_READ,
  183. ATA_CMD_PIO_WRITE,
  184. ATA_CMD_PIO_READ_EXT,
  185. ATA_CMD_PIO_WRITE_EXT,
  186. 0,
  187. 0,
  188. 0,
  189. 0,
  190. /* dma */
  191. ATA_CMD_READ,
  192. ATA_CMD_WRITE,
  193. ATA_CMD_READ_EXT,
  194. ATA_CMD_WRITE_EXT,
  195. 0,
  196. 0,
  197. 0,
  198. ATA_CMD_WRITE_FUA_EXT
  199. };
  200. /**
  201. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  202. * @tf: command to examine and configure
  203. * @dev: device tf belongs to
  204. *
  205. * Examine the device configuration and tf->flags to calculate
  206. * the proper read/write commands and protocol to use.
  207. *
  208. * LOCKING:
  209. * caller.
  210. */
  211. static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
  212. {
  213. u8 cmd;
  214. int index, fua, lba48, write;
  215. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  216. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  217. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  218. if (dev->flags & ATA_DFLAG_PIO) {
  219. tf->protocol = ATA_PROT_PIO;
  220. index = dev->multi_count ? 0 : 8;
  221. } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
  222. /* Unable to use DMA due to host limitation */
  223. tf->protocol = ATA_PROT_PIO;
  224. index = dev->multi_count ? 0 : 8;
  225. } else {
  226. tf->protocol = ATA_PROT_DMA;
  227. index = 16;
  228. }
  229. cmd = ata_rw_cmds[index + fua + lba48 + write];
  230. if (cmd) {
  231. tf->command = cmd;
  232. return 0;
  233. }
  234. return -1;
  235. }
  236. /**
  237. * ata_tf_read_block - Read block address from ATA taskfile
  238. * @tf: ATA taskfile of interest
  239. * @dev: ATA device @tf belongs to
  240. *
  241. * LOCKING:
  242. * None.
  243. *
  244. * Read block address from @tf. This function can handle all
  245. * three address formats - LBA, LBA48 and CHS. tf->protocol and
  246. * flags select the address format to use.
  247. *
  248. * RETURNS:
  249. * Block address read from @tf.
  250. */
  251. u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
  252. {
  253. u64 block = 0;
  254. if (tf->flags & ATA_TFLAG_LBA) {
  255. if (tf->flags & ATA_TFLAG_LBA48) {
  256. block |= (u64)tf->hob_lbah << 40;
  257. block |= (u64)tf->hob_lbam << 32;
  258. block |= tf->hob_lbal << 24;
  259. } else
  260. block |= (tf->device & 0xf) << 24;
  261. block |= tf->lbah << 16;
  262. block |= tf->lbam << 8;
  263. block |= tf->lbal;
  264. } else {
  265. u32 cyl, head, sect;
  266. cyl = tf->lbam | (tf->lbah << 8);
  267. head = tf->device & 0xf;
  268. sect = tf->lbal;
  269. block = (cyl * dev->heads + head) * dev->sectors + sect;
  270. }
  271. return block;
  272. }
  273. /**
  274. * ata_build_rw_tf - Build ATA taskfile for given read/write request
  275. * @tf: Target ATA taskfile
  276. * @dev: ATA device @tf belongs to
  277. * @block: Block address
  278. * @n_block: Number of blocks
  279. * @tf_flags: RW/FUA etc...
  280. * @tag: tag
  281. *
  282. * LOCKING:
  283. * None.
  284. *
  285. * Build ATA taskfile @tf for read/write request described by
  286. * @block, @n_block, @tf_flags and @tag on @dev.
  287. *
  288. * RETURNS:
  289. *
  290. * 0 on success, -ERANGE if the request is too large for @dev,
  291. * -EINVAL if the request is invalid.
  292. */
  293. int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
  294. u64 block, u32 n_block, unsigned int tf_flags,
  295. unsigned int tag)
  296. {
  297. tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  298. tf->flags |= tf_flags;
  299. if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
  300. /* yay, NCQ */
  301. if (!lba_48_ok(block, n_block))
  302. return -ERANGE;
  303. tf->protocol = ATA_PROT_NCQ;
  304. tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
  305. if (tf->flags & ATA_TFLAG_WRITE)
  306. tf->command = ATA_CMD_FPDMA_WRITE;
  307. else
  308. tf->command = ATA_CMD_FPDMA_READ;
  309. tf->nsect = tag << 3;
  310. tf->hob_feature = (n_block >> 8) & 0xff;
  311. tf->feature = n_block & 0xff;
  312. tf->hob_lbah = (block >> 40) & 0xff;
  313. tf->hob_lbam = (block >> 32) & 0xff;
  314. tf->hob_lbal = (block >> 24) & 0xff;
  315. tf->lbah = (block >> 16) & 0xff;
  316. tf->lbam = (block >> 8) & 0xff;
  317. tf->lbal = block & 0xff;
  318. tf->device = 1 << 6;
  319. if (tf->flags & ATA_TFLAG_FUA)
  320. tf->device |= 1 << 7;
  321. } else if (dev->flags & ATA_DFLAG_LBA) {
  322. tf->flags |= ATA_TFLAG_LBA;
  323. if (lba_28_ok(block, n_block)) {
  324. /* use LBA28 */
  325. tf->device |= (block >> 24) & 0xf;
  326. } else if (lba_48_ok(block, n_block)) {
  327. if (!(dev->flags & ATA_DFLAG_LBA48))
  328. return -ERANGE;
  329. /* use LBA48 */
  330. tf->flags |= ATA_TFLAG_LBA48;
  331. tf->hob_nsect = (n_block >> 8) & 0xff;
  332. tf->hob_lbah = (block >> 40) & 0xff;
  333. tf->hob_lbam = (block >> 32) & 0xff;
  334. tf->hob_lbal = (block >> 24) & 0xff;
  335. } else
  336. /* request too large even for LBA48 */
  337. return -ERANGE;
  338. if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
  339. return -EINVAL;
  340. tf->nsect = n_block & 0xff;
  341. tf->lbah = (block >> 16) & 0xff;
  342. tf->lbam = (block >> 8) & 0xff;
  343. tf->lbal = block & 0xff;
  344. tf->device |= ATA_LBA;
  345. } else {
  346. /* CHS */
  347. u32 sect, head, cyl, track;
  348. /* The request -may- be too large for CHS addressing. */
  349. if (!lba_28_ok(block, n_block))
  350. return -ERANGE;
  351. if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
  352. return -EINVAL;
  353. /* Convert LBA to CHS */
  354. track = (u32)block / dev->sectors;
  355. cyl = track / dev->heads;
  356. head = track % dev->heads;
  357. sect = (u32)block % dev->sectors + 1;
  358. DPRINTK("block %u track %u cyl %u head %u sect %u\n",
  359. (u32)block, track, cyl, head, sect);
  360. /* Check whether the converted CHS can fit.
  361. Cylinder: 0-65535
  362. Head: 0-15
  363. Sector: 1-255*/
  364. if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
  365. return -ERANGE;
  366. tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
  367. tf->lbal = sect;
  368. tf->lbam = cyl;
  369. tf->lbah = cyl >> 8;
  370. tf->device |= head;
  371. }
  372. return 0;
  373. }
  374. /**
  375. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  376. * @pio_mask: pio_mask
  377. * @mwdma_mask: mwdma_mask
  378. * @udma_mask: udma_mask
  379. *
  380. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  381. * unsigned int xfer_mask.
  382. *
  383. * LOCKING:
  384. * None.
  385. *
  386. * RETURNS:
  387. * Packed xfer_mask.
  388. */
  389. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  390. unsigned int mwdma_mask,
  391. unsigned int udma_mask)
  392. {
  393. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  394. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  395. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  396. }
  397. /**
  398. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  399. * @xfer_mask: xfer_mask to unpack
  400. * @pio_mask: resulting pio_mask
  401. * @mwdma_mask: resulting mwdma_mask
  402. * @udma_mask: resulting udma_mask
  403. *
  404. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  405. * Any NULL distination masks will be ignored.
  406. */
  407. static void ata_unpack_xfermask(unsigned int xfer_mask,
  408. unsigned int *pio_mask,
  409. unsigned int *mwdma_mask,
  410. unsigned int *udma_mask)
  411. {
  412. if (pio_mask)
  413. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  414. if (mwdma_mask)
  415. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  416. if (udma_mask)
  417. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  418. }
  419. static const struct ata_xfer_ent {
  420. int shift, bits;
  421. u8 base;
  422. } ata_xfer_tbl[] = {
  423. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  424. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  425. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  426. { -1, },
  427. };
  428. /**
  429. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  430. * @xfer_mask: xfer_mask of interest
  431. *
  432. * Return matching XFER_* value for @xfer_mask. Only the highest
  433. * bit of @xfer_mask is considered.
  434. *
  435. * LOCKING:
  436. * None.
  437. *
  438. * RETURNS:
  439. * Matching XFER_* value, 0 if no match found.
  440. */
  441. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  442. {
  443. int highbit = fls(xfer_mask) - 1;
  444. const struct ata_xfer_ent *ent;
  445. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  446. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  447. return ent->base + highbit - ent->shift;
  448. return 0;
  449. }
  450. /**
  451. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  452. * @xfer_mode: XFER_* of interest
  453. *
  454. * Return matching xfer_mask for @xfer_mode.
  455. *
  456. * LOCKING:
  457. * None.
  458. *
  459. * RETURNS:
  460. * Matching xfer_mask, 0 if no match found.
  461. */
  462. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  463. {
  464. const struct ata_xfer_ent *ent;
  465. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  466. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  467. return 1 << (ent->shift + xfer_mode - ent->base);
  468. return 0;
  469. }
  470. /**
  471. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  472. * @xfer_mode: XFER_* of interest
  473. *
  474. * Return matching xfer_shift for @xfer_mode.
  475. *
  476. * LOCKING:
  477. * None.
  478. *
  479. * RETURNS:
  480. * Matching xfer_shift, -1 if no match found.
  481. */
  482. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  483. {
  484. const struct ata_xfer_ent *ent;
  485. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  486. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  487. return ent->shift;
  488. return -1;
  489. }
  490. /**
  491. * ata_mode_string - convert xfer_mask to string
  492. * @xfer_mask: mask of bits supported; only highest bit counts.
  493. *
  494. * Determine string which represents the highest speed
  495. * (highest bit in @modemask).
  496. *
  497. * LOCKING:
  498. * None.
  499. *
  500. * RETURNS:
  501. * Constant C string representing highest speed listed in
  502. * @mode_mask, or the constant C string "<n/a>".
  503. */
  504. static const char *ata_mode_string(unsigned int xfer_mask)
  505. {
  506. static const char * const xfer_mode_str[] = {
  507. "PIO0",
  508. "PIO1",
  509. "PIO2",
  510. "PIO3",
  511. "PIO4",
  512. "PIO5",
  513. "PIO6",
  514. "MWDMA0",
  515. "MWDMA1",
  516. "MWDMA2",
  517. "MWDMA3",
  518. "MWDMA4",
  519. "UDMA/16",
  520. "UDMA/25",
  521. "UDMA/33",
  522. "UDMA/44",
  523. "UDMA/66",
  524. "UDMA/100",
  525. "UDMA/133",
  526. "UDMA7",
  527. };
  528. int highbit;
  529. highbit = fls(xfer_mask) - 1;
  530. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  531. return xfer_mode_str[highbit];
  532. return "<n/a>";
  533. }
  534. static const char *sata_spd_string(unsigned int spd)
  535. {
  536. static const char * const spd_str[] = {
  537. "1.5 Gbps",
  538. "3.0 Gbps",
  539. };
  540. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  541. return "<unknown>";
  542. return spd_str[spd - 1];
  543. }
  544. void ata_dev_disable(struct ata_device *dev)
  545. {
  546. if (ata_dev_enabled(dev)) {
  547. if (ata_msg_drv(dev->link->ap))
  548. ata_dev_printk(dev, KERN_WARNING, "disabled\n");
  549. ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
  550. ATA_DNXFER_QUIET);
  551. dev->class++;
  552. }
  553. }
  554. static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy)
  555. {
  556. struct ata_link *link = dev->link;
  557. struct ata_port *ap = link->ap;
  558. u32 scontrol;
  559. unsigned int err_mask;
  560. int rc;
  561. /*
  562. * disallow DIPM for drivers which haven't set
  563. * ATA_FLAG_IPM. This is because when DIPM is enabled,
  564. * phy ready will be set in the interrupt status on
  565. * state changes, which will cause some drivers to
  566. * think there are errors - additionally drivers will
  567. * need to disable hot plug.
  568. */
  569. if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) {
  570. ap->pm_policy = NOT_AVAILABLE;
  571. return -EINVAL;
  572. }
  573. /*
  574. * For DIPM, we will only enable it for the
  575. * min_power setting.
  576. *
  577. * Why? Because Disks are too stupid to know that
  578. * If the host rejects a request to go to SLUMBER
  579. * they should retry at PARTIAL, and instead it
  580. * just would give up. So, for medium_power to
  581. * work at all, we need to only allow HIPM.
  582. */
  583. rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
  584. if (rc)
  585. return rc;
  586. switch (policy) {
  587. case MIN_POWER:
  588. /* no restrictions on IPM transitions */
  589. scontrol &= ~(0x3 << 8);
  590. rc = sata_scr_write(link, SCR_CONTROL, scontrol);
  591. if (rc)
  592. return rc;
  593. /* enable DIPM */
  594. if (dev->flags & ATA_DFLAG_DIPM)
  595. err_mask = ata_dev_set_feature(dev,
  596. SETFEATURES_SATA_ENABLE, SATA_DIPM);
  597. break;
  598. case MEDIUM_POWER:
  599. /* allow IPM to PARTIAL */
  600. scontrol &= ~(0x1 << 8);
  601. scontrol |= (0x2 << 8);
  602. rc = sata_scr_write(link, SCR_CONTROL, scontrol);
  603. if (rc)
  604. return rc;
  605. /*
  606. * we don't have to disable DIPM since IPM flags
  607. * disallow transitions to SLUMBER, which effectively
  608. * disable DIPM if it does not support PARTIAL
  609. */
  610. break;
  611. case NOT_AVAILABLE:
  612. case MAX_PERFORMANCE:
  613. /* disable all IPM transitions */
  614. scontrol |= (0x3 << 8);
  615. rc = sata_scr_write(link, SCR_CONTROL, scontrol);
  616. if (rc)
  617. return rc;
  618. /*
  619. * we don't have to disable DIPM since IPM flags
  620. * disallow all transitions which effectively
  621. * disable DIPM anyway.
  622. */
  623. break;
  624. }
  625. /* FIXME: handle SET FEATURES failure */
  626. (void) err_mask;
  627. return 0;
  628. }
  629. /**
  630. * ata_dev_enable_pm - enable SATA interface power management
  631. * @dev: device to enable power management
  632. * @policy: the link power management policy
  633. *
  634. * Enable SATA Interface power management. This will enable
  635. * Device Interface Power Management (DIPM) for min_power
  636. * policy, and then call driver specific callbacks for
  637. * enabling Host Initiated Power management.
  638. *
  639. * Locking: Caller.
  640. * Returns: -EINVAL if IPM is not supported, 0 otherwise.
  641. */
  642. void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy)
  643. {
  644. int rc = 0;
  645. struct ata_port *ap = dev->link->ap;
  646. /* set HIPM first, then DIPM */
  647. if (ap->ops->enable_pm)
  648. rc = ap->ops->enable_pm(ap, policy);
  649. if (rc)
  650. goto enable_pm_out;
  651. rc = ata_dev_set_dipm(dev, policy);
  652. enable_pm_out:
  653. if (rc)
  654. ap->pm_policy = MAX_PERFORMANCE;
  655. else
  656. ap->pm_policy = policy;
  657. return /* rc */; /* hopefully we can use 'rc' eventually */
  658. }
  659. #ifdef CONFIG_PM
  660. /**
  661. * ata_dev_disable_pm - disable SATA interface power management
  662. * @dev: device to disable power management
  663. *
  664. * Disable SATA Interface power management. This will disable
  665. * Device Interface Power Management (DIPM) without changing
  666. * policy, call driver specific callbacks for disabling Host
  667. * Initiated Power management.
  668. *
  669. * Locking: Caller.
  670. * Returns: void
  671. */
  672. static void ata_dev_disable_pm(struct ata_device *dev)
  673. {
  674. struct ata_port *ap = dev->link->ap;
  675. ata_dev_set_dipm(dev, MAX_PERFORMANCE);
  676. if (ap->ops->disable_pm)
  677. ap->ops->disable_pm(ap);
  678. }
  679. #endif /* CONFIG_PM */
  680. void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy)
  681. {
  682. ap->pm_policy = policy;
  683. ap->link.eh_info.action |= ATA_EHI_LPM;
  684. ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY;
  685. ata_port_schedule_eh(ap);
  686. }
  687. #ifdef CONFIG_PM
  688. static void ata_lpm_enable(struct ata_host *host)
  689. {
  690. struct ata_link *link;
  691. struct ata_port *ap;
  692. struct ata_device *dev;
  693. int i;
  694. for (i = 0; i < host->n_ports; i++) {
  695. ap = host->ports[i];
  696. ata_port_for_each_link(link, ap) {
  697. ata_link_for_each_dev(dev, link)
  698. ata_dev_disable_pm(dev);
  699. }
  700. }
  701. }
  702. static void ata_lpm_disable(struct ata_host *host)
  703. {
  704. int i;
  705. for (i = 0; i < host->n_ports; i++) {
  706. struct ata_port *ap = host->ports[i];
  707. ata_lpm_schedule(ap, ap->pm_policy);
  708. }
  709. }
  710. #endif /* CONFIG_PM */
  711. /**
  712. * ata_devchk - PATA device presence detection
  713. * @ap: ATA channel to examine
  714. * @device: Device to examine (starting at zero)
  715. *
  716. * This technique was originally described in
  717. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  718. * later found its way into the ATA/ATAPI spec.
  719. *
  720. * Write a pattern to the ATA shadow registers,
  721. * and if a device is present, it will respond by
  722. * correctly storing and echoing back the
  723. * ATA shadow register contents.
  724. *
  725. * LOCKING:
  726. * caller.
  727. */
  728. static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
  729. {
  730. struct ata_ioports *ioaddr = &ap->ioaddr;
  731. u8 nsect, lbal;
  732. ap->ops->dev_select(ap, device);
  733. iowrite8(0x55, ioaddr->nsect_addr);
  734. iowrite8(0xaa, ioaddr->lbal_addr);
  735. iowrite8(0xaa, ioaddr->nsect_addr);
  736. iowrite8(0x55, ioaddr->lbal_addr);
  737. iowrite8(0x55, ioaddr->nsect_addr);
  738. iowrite8(0xaa, ioaddr->lbal_addr);
  739. nsect = ioread8(ioaddr->nsect_addr);
  740. lbal = ioread8(ioaddr->lbal_addr);
  741. if ((nsect == 0x55) && (lbal == 0xaa))
  742. return 1; /* we found a device */
  743. return 0; /* nothing found */
  744. }
  745. /**
  746. * ata_dev_classify - determine device type based on ATA-spec signature
  747. * @tf: ATA taskfile register set for device to be identified
  748. *
  749. * Determine from taskfile register contents whether a device is
  750. * ATA or ATAPI, as per "Signature and persistence" section
  751. * of ATA/PI spec (volume 1, sect 5.14).
  752. *
  753. * LOCKING:
  754. * None.
  755. *
  756. * RETURNS:
  757. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
  758. * %ATA_DEV_UNKNOWN the event of failure.
  759. */
  760. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  761. {
  762. /* Apple's open source Darwin code hints that some devices only
  763. * put a proper signature into the LBA mid/high registers,
  764. * So, we only check those. It's sufficient for uniqueness.
  765. *
  766. * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
  767. * signatures for ATA and ATAPI devices attached on SerialATA,
  768. * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
  769. * spec has never mentioned about using different signatures
  770. * for ATA/ATAPI devices. Then, Serial ATA II: Port
  771. * Multiplier specification began to use 0x69/0x96 to identify
  772. * port multpliers and 0x3c/0xc3 to identify SEMB device.
  773. * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
  774. * 0x69/0x96 shortly and described them as reserved for
  775. * SerialATA.
  776. *
  777. * We follow the current spec and consider that 0x69/0x96
  778. * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
  779. */
  780. if ((tf->lbam == 0) && (tf->lbah == 0)) {
  781. DPRINTK("found ATA device by sig\n");
  782. return ATA_DEV_ATA;
  783. }
  784. if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
  785. DPRINTK("found ATAPI device by sig\n");
  786. return ATA_DEV_ATAPI;
  787. }
  788. if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
  789. DPRINTK("found PMP device by sig\n");
  790. return ATA_DEV_PMP;
  791. }
  792. if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
  793. printk(KERN_INFO "ata: SEMB device ignored\n");
  794. return ATA_DEV_SEMB_UNSUP; /* not yet */
  795. }
  796. DPRINTK("unknown device\n");
  797. return ATA_DEV_UNKNOWN;
  798. }
  799. /**
  800. * ata_dev_try_classify - Parse returned ATA device signature
  801. * @dev: ATA device to classify (starting at zero)
  802. * @present: device seems present
  803. * @r_err: Value of error register on completion
  804. *
  805. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  806. * an ATA/ATAPI-defined set of values is placed in the ATA
  807. * shadow registers, indicating the results of device detection
  808. * and diagnostics.
  809. *
  810. * Select the ATA device, and read the values from the ATA shadow
  811. * registers. Then parse according to the Error register value,
  812. * and the spec-defined values examined by ata_dev_classify().
  813. *
  814. * LOCKING:
  815. * caller.
  816. *
  817. * RETURNS:
  818. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  819. */
  820. unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
  821. u8 *r_err)
  822. {
  823. struct ata_port *ap = dev->link->ap;
  824. struct ata_taskfile tf;
  825. unsigned int class;
  826. u8 err;
  827. ap->ops->dev_select(ap, dev->devno);
  828. memset(&tf, 0, sizeof(tf));
  829. ap->ops->tf_read(ap, &tf);
  830. err = tf.feature;
  831. if (r_err)
  832. *r_err = err;
  833. /* see if device passed diags: if master then continue and warn later */
  834. if (err == 0 && dev->devno == 0)
  835. /* diagnostic fail : do nothing _YET_ */
  836. dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
  837. else if (err == 1)
  838. /* do nothing */ ;
  839. else if ((dev->devno == 0) && (err == 0x81))
  840. /* do nothing */ ;
  841. else
  842. return ATA_DEV_NONE;
  843. /* determine if device is ATA or ATAPI */
  844. class = ata_dev_classify(&tf);
  845. if (class == ATA_DEV_UNKNOWN) {
  846. /* If the device failed diagnostic, it's likely to
  847. * have reported incorrect device signature too.
  848. * Assume ATA device if the device seems present but
  849. * device signature is invalid with diagnostic
  850. * failure.
  851. */
  852. if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
  853. class = ATA_DEV_ATA;
  854. else
  855. class = ATA_DEV_NONE;
  856. } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  857. class = ATA_DEV_NONE;
  858. return class;
  859. }
  860. /**
  861. * ata_id_string - Convert IDENTIFY DEVICE page into string
  862. * @id: IDENTIFY DEVICE results we will examine
  863. * @s: string into which data is output
  864. * @ofs: offset into identify device page
  865. * @len: length of string to return. must be an even number.
  866. *
  867. * The strings in the IDENTIFY DEVICE page are broken up into
  868. * 16-bit chunks. Run through the string, and output each
  869. * 8-bit chunk linearly, regardless of platform.
  870. *
  871. * LOCKING:
  872. * caller.
  873. */
  874. void ata_id_string(const u16 *id, unsigned char *s,
  875. unsigned int ofs, unsigned int len)
  876. {
  877. unsigned int c;
  878. while (len > 0) {
  879. c = id[ofs] >> 8;
  880. *s = c;
  881. s++;
  882. c = id[ofs] & 0xff;
  883. *s = c;
  884. s++;
  885. ofs++;
  886. len -= 2;
  887. }
  888. }
  889. /**
  890. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  891. * @id: IDENTIFY DEVICE results we will examine
  892. * @s: string into which data is output
  893. * @ofs: offset into identify device page
  894. * @len: length of string to return. must be an odd number.
  895. *
  896. * This function is identical to ata_id_string except that it
  897. * trims trailing spaces and terminates the resulting string with
  898. * null. @len must be actual maximum length (even number) + 1.
  899. *
  900. * LOCKING:
  901. * caller.
  902. */
  903. void ata_id_c_string(const u16 *id, unsigned char *s,
  904. unsigned int ofs, unsigned int len)
  905. {
  906. unsigned char *p;
  907. WARN_ON(!(len & 1));
  908. ata_id_string(id, s, ofs, len - 1);
  909. p = s + strnlen(s, len - 1);
  910. while (p > s && p[-1] == ' ')
  911. p--;
  912. *p = '\0';
  913. }
  914. static u64 ata_id_n_sectors(const u16 *id)
  915. {
  916. if (ata_id_has_lba(id)) {
  917. if (ata_id_has_lba48(id))
  918. return ata_id_u64(id, 100);
  919. else
  920. return ata_id_u32(id, 60);
  921. } else {
  922. if (ata_id_current_chs_valid(id))
  923. return ata_id_u32(id, 57);
  924. else
  925. return id[1] * id[3] * id[6];
  926. }
  927. }
  928. static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
  929. {
  930. u64 sectors = 0;
  931. sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
  932. sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
  933. sectors |= (tf->hob_lbal & 0xff) << 24;
  934. sectors |= (tf->lbah & 0xff) << 16;
  935. sectors |= (tf->lbam & 0xff) << 8;
  936. sectors |= (tf->lbal & 0xff);
  937. return ++sectors;
  938. }
  939. static u64 ata_tf_to_lba(struct ata_taskfile *tf)
  940. {
  941. u64 sectors = 0;
  942. sectors |= (tf->device & 0x0f) << 24;
  943. sectors |= (tf->lbah & 0xff) << 16;
  944. sectors |= (tf->lbam & 0xff) << 8;
  945. sectors |= (tf->lbal & 0xff);
  946. return ++sectors;
  947. }
  948. /**
  949. * ata_read_native_max_address - Read native max address
  950. * @dev: target device
  951. * @max_sectors: out parameter for the result native max address
  952. *
  953. * Perform an LBA48 or LBA28 native size query upon the device in
  954. * question.
  955. *
  956. * RETURNS:
  957. * 0 on success, -EACCES if command is aborted by the drive.
  958. * -EIO on other errors.
  959. */
  960. static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
  961. {
  962. unsigned int err_mask;
  963. struct ata_taskfile tf;
  964. int lba48 = ata_id_has_lba48(dev->id);
  965. ata_tf_init(dev, &tf);
  966. /* always clear all address registers */
  967. tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
  968. if (lba48) {
  969. tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
  970. tf.flags |= ATA_TFLAG_LBA48;
  971. } else
  972. tf.command = ATA_CMD_READ_NATIVE_MAX;
  973. tf.protocol |= ATA_PROT_NODATA;
  974. tf.device |= ATA_LBA;
  975. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  976. if (err_mask) {
  977. ata_dev_printk(dev, KERN_WARNING, "failed to read native "
  978. "max address (err_mask=0x%x)\n", err_mask);
  979. if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
  980. return -EACCES;
  981. return -EIO;
  982. }
  983. if (lba48)
  984. *max_sectors = ata_tf_to_lba48(&tf);
  985. else
  986. *max_sectors = ata_tf_to_lba(&tf);
  987. if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
  988. (*max_sectors)--;
  989. return 0;
  990. }
  991. /**
  992. * ata_set_max_sectors - Set max sectors
  993. * @dev: target device
  994. * @new_sectors: new max sectors value to set for the device
  995. *
  996. * Set max sectors of @dev to @new_sectors.
  997. *
  998. * RETURNS:
  999. * 0 on success, -EACCES if command is aborted or denied (due to
  1000. * previous non-volatile SET_MAX) by the drive. -EIO on other
  1001. * errors.
  1002. */
  1003. static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
  1004. {
  1005. unsigned int err_mask;
  1006. struct ata_taskfile tf;
  1007. int lba48 = ata_id_has_lba48(dev->id);
  1008. new_sectors--;
  1009. ata_tf_init(dev, &tf);
  1010. tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
  1011. if (lba48) {
  1012. tf.command = ATA_CMD_SET_MAX_EXT;
  1013. tf.flags |= ATA_TFLAG_LBA48;
  1014. tf.hob_lbal = (new_sectors >> 24) & 0xff;
  1015. tf.hob_lbam = (new_sectors >> 32) & 0xff;
  1016. tf.hob_lbah = (new_sectors >> 40) & 0xff;
  1017. } else {
  1018. tf.command = ATA_CMD_SET_MAX;
  1019. tf.device |= (new_sectors >> 24) & 0xf;
  1020. }
  1021. tf.protocol |= ATA_PROT_NODATA;
  1022. tf.device |= ATA_LBA;
  1023. tf.lbal = (new_sectors >> 0) & 0xff;
  1024. tf.lbam = (new_sectors >> 8) & 0xff;
  1025. tf.lbah = (new_sectors >> 16) & 0xff;
  1026. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  1027. if (err_mask) {
  1028. ata_dev_printk(dev, KERN_WARNING, "failed to set "
  1029. "max address (err_mask=0x%x)\n", err_mask);
  1030. if (err_mask == AC_ERR_DEV &&
  1031. (tf.feature & (ATA_ABORTED | ATA_IDNF)))
  1032. return -EACCES;
  1033. return -EIO;
  1034. }
  1035. return 0;
  1036. }
  1037. /**
  1038. * ata_hpa_resize - Resize a device with an HPA set
  1039. * @dev: Device to resize
  1040. *
  1041. * Read the size of an LBA28 or LBA48 disk with HPA features and resize
  1042. * it if required to the full size of the media. The caller must check
  1043. * the drive has the HPA feature set enabled.
  1044. *
  1045. * RETURNS:
  1046. * 0 on success, -errno on failure.
  1047. */
  1048. static int ata_hpa_resize(struct ata_device *dev)
  1049. {
  1050. struct ata_eh_context *ehc = &dev->link->eh_context;
  1051. int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
  1052. u64 sectors = ata_id_n_sectors(dev->id);
  1053. u64 native_sectors;
  1054. int rc;
  1055. /* do we need to do it? */
  1056. if (dev->class != ATA_DEV_ATA ||
  1057. !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
  1058. (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
  1059. return 0;
  1060. /* read native max address */
  1061. rc = ata_read_native_max_address(dev, &native_sectors);
  1062. if (rc) {
  1063. /* If HPA isn't going to be unlocked, skip HPA
  1064. * resizing from the next try.
  1065. */
  1066. if (!ata_ignore_hpa) {
  1067. ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
  1068. "broken, will skip HPA handling\n");
  1069. dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
  1070. /* we can continue if device aborted the command */
  1071. if (rc == -EACCES)
  1072. rc = 0;
  1073. }
  1074. return rc;
  1075. }
  1076. /* nothing to do? */
  1077. if (native_sectors <= sectors || !ata_ignore_hpa) {
  1078. if (!print_info || native_sectors == sectors)
  1079. return 0;
  1080. if (native_sectors > sectors)
  1081. ata_dev_printk(dev, KERN_INFO,
  1082. "HPA detected: current %llu, native %llu\n",
  1083. (unsigned long long)sectors,
  1084. (unsigned long long)native_sectors);
  1085. else if (native_sectors < sectors)
  1086. ata_dev_printk(dev, KERN_WARNING,
  1087. "native sectors (%llu) is smaller than "
  1088. "sectors (%llu)\n",
  1089. (unsigned long long)native_sectors,
  1090. (unsigned long long)sectors);
  1091. return 0;
  1092. }
  1093. /* let's unlock HPA */
  1094. rc = ata_set_max_sectors(dev, native_sectors);
  1095. if (rc == -EACCES) {
  1096. /* if device aborted the command, skip HPA resizing */
  1097. ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
  1098. "(%llu -> %llu), skipping HPA handling\n",
  1099. (unsigned long long)sectors,
  1100. (unsigned long long)native_sectors);
  1101. dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
  1102. return 0;
  1103. } else if (rc)
  1104. return rc;
  1105. /* re-read IDENTIFY data */
  1106. rc = ata_dev_reread_id(dev, 0);
  1107. if (rc) {
  1108. ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
  1109. "data after HPA resizing\n");
  1110. return rc;
  1111. }
  1112. if (print_info) {
  1113. u64 new_sectors = ata_id_n_sectors(dev->id);
  1114. ata_dev_printk(dev, KERN_INFO,
  1115. "HPA unlocked: %llu -> %llu, native %llu\n",
  1116. (unsigned long long)sectors,
  1117. (unsigned long long)new_sectors,
  1118. (unsigned long long)native_sectors);
  1119. }
  1120. return 0;
  1121. }
  1122. /**
  1123. * ata_id_to_dma_mode - Identify DMA mode from id block
  1124. * @dev: device to identify
  1125. * @unknown: mode to assume if we cannot tell
  1126. *
  1127. * Set up the timing values for the device based upon the identify
  1128. * reported values for the DMA mode. This function is used by drivers
  1129. * which rely upon firmware configured modes, but wish to report the
  1130. * mode correctly when possible.
  1131. *
  1132. * In addition we emit similarly formatted messages to the default
  1133. * ata_dev_set_mode handler, in order to provide consistency of
  1134. * presentation.
  1135. */
  1136. void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
  1137. {
  1138. unsigned int mask;
  1139. u8 mode;
  1140. /* Pack the DMA modes */
  1141. mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
  1142. if (dev->id[53] & 0x04)
  1143. mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
  1144. /* Select the mode in use */
  1145. mode = ata_xfer_mask2mode(mask);
  1146. if (mode != 0) {
  1147. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  1148. ata_mode_string(mask));
  1149. } else {
  1150. /* SWDMA perhaps ? */
  1151. mode = unknown;
  1152. ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
  1153. }
  1154. /* Configure the device reporting */
  1155. dev->xfer_mode = mode;
  1156. dev->xfer_shift = ata_xfer_mode2shift(mode);
  1157. }
  1158. /**
  1159. * ata_noop_dev_select - Select device 0/1 on ATA bus
  1160. * @ap: ATA channel to manipulate
  1161. * @device: ATA device (numbered from zero) to select
  1162. *
  1163. * This function performs no actual function.
  1164. *
  1165. * May be used as the dev_select() entry in ata_port_operations.
  1166. *
  1167. * LOCKING:
  1168. * caller.
  1169. */
  1170. void ata_noop_dev_select(struct ata_port *ap, unsigned int device)
  1171. {
  1172. }
  1173. /**
  1174. * ata_std_dev_select - Select device 0/1 on ATA bus
  1175. * @ap: ATA channel to manipulate
  1176. * @device: ATA device (numbered from zero) to select
  1177. *
  1178. * Use the method defined in the ATA specification to
  1179. * make either device 0, or device 1, active on the
  1180. * ATA channel. Works with both PIO and MMIO.
  1181. *
  1182. * May be used as the dev_select() entry in ata_port_operations.
  1183. *
  1184. * LOCKING:
  1185. * caller.
  1186. */
  1187. void ata_std_dev_select(struct ata_port *ap, unsigned int device)
  1188. {
  1189. u8 tmp;
  1190. if (device == 0)
  1191. tmp = ATA_DEVICE_OBS;
  1192. else
  1193. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  1194. iowrite8(tmp, ap->ioaddr.device_addr);
  1195. ata_pause(ap); /* needed; also flushes, for mmio */
  1196. }
  1197. /**
  1198. * ata_dev_select - Select device 0/1 on ATA bus
  1199. * @ap: ATA channel to manipulate
  1200. * @device: ATA device (numbered from zero) to select
  1201. * @wait: non-zero to wait for Status register BSY bit to clear
  1202. * @can_sleep: non-zero if context allows sleeping
  1203. *
  1204. * Use the method defined in the ATA specification to
  1205. * make either device 0, or device 1, active on the
  1206. * ATA channel.
  1207. *
  1208. * This is a high-level version of ata_std_dev_select(),
  1209. * which additionally provides the services of inserting
  1210. * the proper pauses and status polling, where needed.
  1211. *
  1212. * LOCKING:
  1213. * caller.
  1214. */
  1215. void ata_dev_select(struct ata_port *ap, unsigned int device,
  1216. unsigned int wait, unsigned int can_sleep)
  1217. {
  1218. if (ata_msg_probe(ap))
  1219. ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
  1220. "device %u, wait %u\n", device, wait);
  1221. if (wait)
  1222. ata_wait_idle(ap);
  1223. ap->ops->dev_select(ap, device);
  1224. if (wait) {
  1225. if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
  1226. msleep(150);
  1227. ata_wait_idle(ap);
  1228. }
  1229. }
  1230. /**
  1231. * ata_dump_id - IDENTIFY DEVICE info debugging output
  1232. * @id: IDENTIFY DEVICE page to dump
  1233. *
  1234. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  1235. * page.
  1236. *
  1237. * LOCKING:
  1238. * caller.
  1239. */
  1240. static inline void ata_dump_id(const u16 *id)
  1241. {
  1242. DPRINTK("49==0x%04x "
  1243. "53==0x%04x "
  1244. "63==0x%04x "
  1245. "64==0x%04x "
  1246. "75==0x%04x \n",
  1247. id[49],
  1248. id[53],
  1249. id[63],
  1250. id[64],
  1251. id[75]);
  1252. DPRINTK("80==0x%04x "
  1253. "81==0x%04x "
  1254. "82==0x%04x "
  1255. "83==0x%04x "
  1256. "84==0x%04x \n",
  1257. id[80],
  1258. id[81],
  1259. id[82],
  1260. id[83],
  1261. id[84]);
  1262. DPRINTK("88==0x%04x "
  1263. "93==0x%04x\n",
  1264. id[88],
  1265. id[93]);
  1266. }
  1267. /**
  1268. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  1269. * @id: IDENTIFY data to compute xfer mask from
  1270. *
  1271. * Compute the xfermask for this device. This is not as trivial
  1272. * as it seems if we must consider early devices correctly.
  1273. *
  1274. * FIXME: pre IDE drive timing (do we care ?).
  1275. *
  1276. * LOCKING:
  1277. * None.
  1278. *
  1279. * RETURNS:
  1280. * Computed xfermask
  1281. */
  1282. static unsigned int ata_id_xfermask(const u16 *id)
  1283. {
  1284. unsigned int pio_mask, mwdma_mask, udma_mask;
  1285. /* Usual case. Word 53 indicates word 64 is valid */
  1286. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  1287. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  1288. pio_mask <<= 3;
  1289. pio_mask |= 0x7;
  1290. } else {
  1291. /* If word 64 isn't valid then Word 51 high byte holds
  1292. * the PIO timing number for the maximum. Turn it into
  1293. * a mask.
  1294. */
  1295. u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
  1296. if (mode < 5) /* Valid PIO range */
  1297. pio_mask = (2 << mode) - 1;
  1298. else
  1299. pio_mask = 1;
  1300. /* But wait.. there's more. Design your standards by
  1301. * committee and you too can get a free iordy field to
  1302. * process. However its the speeds not the modes that
  1303. * are supported... Note drivers using the timing API
  1304. * will get this right anyway
  1305. */
  1306. }
  1307. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  1308. if (ata_id_is_cfa(id)) {
  1309. /*
  1310. * Process compact flash extended modes
  1311. */
  1312. int pio = id[163] & 0x7;
  1313. int dma = (id[163] >> 3) & 7;
  1314. if (pio)
  1315. pio_mask |= (1 << 5);
  1316. if (pio > 1)
  1317. pio_mask |= (1 << 6);
  1318. if (dma)
  1319. mwdma_mask |= (1 << 3);
  1320. if (dma > 1)
  1321. mwdma_mask |= (1 << 4);
  1322. }
  1323. udma_mask = 0;
  1324. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  1325. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  1326. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  1327. }
  1328. /**
  1329. * ata_port_queue_task - Queue port_task
  1330. * @ap: The ata_port to queue port_task for
  1331. * @fn: workqueue function to be scheduled
  1332. * @data: data for @fn to use
  1333. * @delay: delay time for workqueue function
  1334. *
  1335. * Schedule @fn(@data) for execution after @delay jiffies using
  1336. * port_task. There is one port_task per port and it's the
  1337. * user(low level driver)'s responsibility to make sure that only
  1338. * one task is active at any given time.
  1339. *
  1340. * libata core layer takes care of synchronization between
  1341. * port_task and EH. ata_port_queue_task() may be ignored for EH
  1342. * synchronization.
  1343. *
  1344. * LOCKING:
  1345. * Inherited from caller.
  1346. */
  1347. void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
  1348. unsigned long delay)
  1349. {
  1350. PREPARE_DELAYED_WORK(&ap->port_task, fn);
  1351. ap->port_task_data = data;
  1352. /* may fail if ata_port_flush_task() in progress */
  1353. queue_delayed_work(ata_wq, &ap->port_task, delay);
  1354. }
  1355. /**
  1356. * ata_port_flush_task - Flush port_task
  1357. * @ap: The ata_port to flush port_task for
  1358. *
  1359. * After this function completes, port_task is guranteed not to
  1360. * be running or scheduled.
  1361. *
  1362. * LOCKING:
  1363. * Kernel thread context (may sleep)
  1364. */
  1365. void ata_port_flush_task(struct ata_port *ap)
  1366. {
  1367. DPRINTK("ENTER\n");
  1368. cancel_rearming_delayed_work(&ap->port_task);
  1369. if (ata_msg_ctl(ap))
  1370. ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
  1371. }
  1372. static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  1373. {
  1374. struct completion *waiting = qc->private_data;
  1375. complete(waiting);
  1376. }
  1377. /**
  1378. * ata_exec_internal_sg - execute libata internal command
  1379. * @dev: Device to which the command is sent
  1380. * @tf: Taskfile registers for the command and the result
  1381. * @cdb: CDB for packet command
  1382. * @dma_dir: Data tranfer direction of the command
  1383. * @sgl: sg list for the data buffer of the command
  1384. * @n_elem: Number of sg entries
  1385. * @timeout: Timeout in msecs (0 for default)
  1386. *
  1387. * Executes libata internal command with timeout. @tf contains
  1388. * command on entry and result on return. Timeout and error
  1389. * conditions are reported via return value. No recovery action
  1390. * is taken after a command times out. It's caller's duty to
  1391. * clean up after timeout.
  1392. *
  1393. * LOCKING:
  1394. * None. Should be called with kernel context, might sleep.
  1395. *
  1396. * RETURNS:
  1397. * Zero on success, AC_ERR_* mask on failure
  1398. */
  1399. unsigned ata_exec_internal_sg(struct ata_device *dev,
  1400. struct ata_taskfile *tf, const u8 *cdb,
  1401. int dma_dir, struct scatterlist *sgl,
  1402. unsigned int n_elem, unsigned long timeout)
  1403. {
  1404. struct ata_link *link = dev->link;
  1405. struct ata_port *ap = link->ap;
  1406. u8 command = tf->command;
  1407. struct ata_queued_cmd *qc;
  1408. unsigned int tag, preempted_tag;
  1409. u32 preempted_sactive, preempted_qc_active;
  1410. int preempted_nr_active_links;
  1411. DECLARE_COMPLETION_ONSTACK(wait);
  1412. unsigned long flags;
  1413. unsigned int err_mask;
  1414. int rc;
  1415. spin_lock_irqsave(ap->lock, flags);
  1416. /* no internal command while frozen */
  1417. if (ap->pflags & ATA_PFLAG_FROZEN) {
  1418. spin_unlock_irqrestore(ap->lock, flags);
  1419. return AC_ERR_SYSTEM;
  1420. }
  1421. /* initialize internal qc */
  1422. /* XXX: Tag 0 is used for drivers with legacy EH as some
  1423. * drivers choke if any other tag is given. This breaks
  1424. * ata_tag_internal() test for those drivers. Don't use new
  1425. * EH stuff without converting to it.
  1426. */
  1427. if (ap->ops->error_handler)
  1428. tag = ATA_TAG_INTERNAL;
  1429. else
  1430. tag = 0;
  1431. if (test_and_set_bit(tag, &ap->qc_allocated))
  1432. BUG();
  1433. qc = __ata_qc_from_tag(ap, tag);
  1434. qc->tag = tag;
  1435. qc->scsicmd = NULL;
  1436. qc->ap = ap;
  1437. qc->dev = dev;
  1438. ata_qc_reinit(qc);
  1439. preempted_tag = link->active_tag;
  1440. preempted_sactive = link->sactive;
  1441. preempted_qc_active = ap->qc_active;
  1442. preempted_nr_active_links = ap->nr_active_links;
  1443. link->active_tag = ATA_TAG_POISON;
  1444. link->sactive = 0;
  1445. ap->qc_active = 0;
  1446. ap->nr_active_links = 0;
  1447. /* prepare & issue qc */
  1448. qc->tf = *tf;
  1449. if (cdb)
  1450. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  1451. qc->flags |= ATA_QCFLAG_RESULT_TF;
  1452. qc->dma_dir = dma_dir;
  1453. if (dma_dir != DMA_NONE) {
  1454. unsigned int i, buflen = 0;
  1455. struct scatterlist *sg;
  1456. for_each_sg(sgl, sg, n_elem, i)
  1457. buflen += sg->length;
  1458. ata_sg_init(qc, sgl, n_elem);
  1459. qc->nbytes = buflen;
  1460. }
  1461. qc->private_data = &wait;
  1462. qc->complete_fn = ata_qc_complete_internal;
  1463. ata_qc_issue(qc);
  1464. spin_unlock_irqrestore(ap->lock, flags);
  1465. if (!timeout)
  1466. timeout = ata_probe_timeout * 1000 / HZ;
  1467. rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
  1468. ata_port_flush_task(ap);
  1469. if (!rc) {
  1470. spin_lock_irqsave(ap->lock, flags);
  1471. /* We're racing with irq here. If we lose, the
  1472. * following test prevents us from completing the qc
  1473. * twice. If we win, the port is frozen and will be
  1474. * cleaned up by ->post_internal_cmd().
  1475. */
  1476. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  1477. qc->err_mask |= AC_ERR_TIMEOUT;
  1478. if (ap->ops->error_handler)
  1479. ata_port_freeze(ap);
  1480. else
  1481. ata_qc_complete(qc);
  1482. if (ata_msg_warn(ap))
  1483. ata_dev_printk(dev, KERN_WARNING,
  1484. "qc timeout (cmd 0x%x)\n", command);
  1485. }
  1486. spin_unlock_irqrestore(ap->lock, flags);
  1487. }
  1488. /* do post_internal_cmd */
  1489. if (ap->ops->post_internal_cmd)
  1490. ap->ops->post_internal_cmd(qc);
  1491. /* perform minimal error analysis */
  1492. if (qc->flags & ATA_QCFLAG_FAILED) {
  1493. if (qc->result_tf.command & (ATA_ERR | ATA_DF))
  1494. qc->err_mask |= AC_ERR_DEV;
  1495. if (!qc->err_mask)
  1496. qc->err_mask |= AC_ERR_OTHER;
  1497. if (qc->err_mask & ~AC_ERR_OTHER)
  1498. qc->err_mask &= ~AC_ERR_OTHER;
  1499. }
  1500. /* finish up */
  1501. spin_lock_irqsave(ap->lock, flags);
  1502. *tf = qc->result_tf;
  1503. err_mask = qc->err_mask;
  1504. ata_qc_free(qc);
  1505. link->active_tag = preempted_tag;
  1506. link->sactive = preempted_sactive;
  1507. ap->qc_active = preempted_qc_active;
  1508. ap->nr_active_links = preempted_nr_active_links;
  1509. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  1510. * Until those drivers are fixed, we detect the condition
  1511. * here, fail the command with AC_ERR_SYSTEM and reenable the
  1512. * port.
  1513. *
  1514. * Note that this doesn't change any behavior as internal
  1515. * command failure results in disabling the device in the
  1516. * higher layer for LLDDs without new reset/EH callbacks.
  1517. *
  1518. * Kill the following code as soon as those drivers are fixed.
  1519. */
  1520. if (ap->flags & ATA_FLAG_DISABLED) {
  1521. err_mask |= AC_ERR_SYSTEM;
  1522. ata_port_probe(ap);
  1523. }
  1524. spin_unlock_irqrestore(ap->lock, flags);
  1525. return err_mask;
  1526. }
  1527. /**
  1528. * ata_exec_internal - execute libata internal command
  1529. * @dev: Device to which the command is sent
  1530. * @tf: Taskfile registers for the command and the result
  1531. * @cdb: CDB for packet command
  1532. * @dma_dir: Data tranfer direction of the command
  1533. * @buf: Data buffer of the command
  1534. * @buflen: Length of data buffer
  1535. * @timeout: Timeout in msecs (0 for default)
  1536. *
  1537. * Wrapper around ata_exec_internal_sg() which takes simple
  1538. * buffer instead of sg list.
  1539. *
  1540. * LOCKING:
  1541. * None. Should be called with kernel context, might sleep.
  1542. *
  1543. * RETURNS:
  1544. * Zero on success, AC_ERR_* mask on failure
  1545. */
  1546. unsigned ata_exec_internal(struct ata_device *dev,
  1547. struct ata_taskfile *tf, const u8 *cdb,
  1548. int dma_dir, void *buf, unsigned int buflen,
  1549. unsigned long timeout)
  1550. {
  1551. struct scatterlist *psg = NULL, sg;
  1552. unsigned int n_elem = 0;
  1553. if (dma_dir != DMA_NONE) {
  1554. WARN_ON(!buf);
  1555. sg_init_one(&sg, buf, buflen);
  1556. psg = &sg;
  1557. n_elem++;
  1558. }
  1559. return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
  1560. timeout);
  1561. }
  1562. /**
  1563. * ata_do_simple_cmd - execute simple internal command
  1564. * @dev: Device to which the command is sent
  1565. * @cmd: Opcode to execute
  1566. *
  1567. * Execute a 'simple' command, that only consists of the opcode
  1568. * 'cmd' itself, without filling any other registers
  1569. *
  1570. * LOCKING:
  1571. * Kernel thread context (may sleep).
  1572. *
  1573. * RETURNS:
  1574. * Zero on success, AC_ERR_* mask on failure
  1575. */
  1576. unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
  1577. {
  1578. struct ata_taskfile tf;
  1579. ata_tf_init(dev, &tf);
  1580. tf.command = cmd;
  1581. tf.flags |= ATA_TFLAG_DEVICE;
  1582. tf.protocol = ATA_PROT_NODATA;
  1583. return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  1584. }
  1585. /**
  1586. * ata_pio_need_iordy - check if iordy needed
  1587. * @adev: ATA device
  1588. *
  1589. * Check if the current speed of the device requires IORDY. Used
  1590. * by various controllers for chip configuration.
  1591. */
  1592. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  1593. {
  1594. /* Controller doesn't support IORDY. Probably a pointless check
  1595. as the caller should know this */
  1596. if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
  1597. return 0;
  1598. /* PIO3 and higher it is mandatory */
  1599. if (adev->pio_mode > XFER_PIO_2)
  1600. return 1;
  1601. /* We turn it on when possible */
  1602. if (ata_id_has_iordy(adev->id))
  1603. return 1;
  1604. return 0;
  1605. }
  1606. /**
  1607. * ata_pio_mask_no_iordy - Return the non IORDY mask
  1608. * @adev: ATA device
  1609. *
  1610. * Compute the highest mode possible if we are not using iordy. Return
  1611. * -1 if no iordy mode is available.
  1612. */
  1613. static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
  1614. {
  1615. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  1616. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  1617. u16 pio = adev->id[ATA_ID_EIDE_PIO];
  1618. /* Is the speed faster than the drive allows non IORDY ? */
  1619. if (pio) {
  1620. /* This is cycle times not frequency - watch the logic! */
  1621. if (pio > 240) /* PIO2 is 240nS per cycle */
  1622. return 3 << ATA_SHIFT_PIO;
  1623. return 7 << ATA_SHIFT_PIO;
  1624. }
  1625. }
  1626. return 3 << ATA_SHIFT_PIO;
  1627. }
  1628. /**
  1629. * ata_dev_read_id - Read ID data from the specified device
  1630. * @dev: target device
  1631. * @p_class: pointer to class of the target device (may be changed)
  1632. * @flags: ATA_READID_* flags
  1633. * @id: buffer to read IDENTIFY data into
  1634. *
  1635. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  1636. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  1637. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  1638. * for pre-ATA4 drives.
  1639. *
  1640. * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
  1641. * now we abort if we hit that case.
  1642. *
  1643. * LOCKING:
  1644. * Kernel thread context (may sleep)
  1645. *
  1646. * RETURNS:
  1647. * 0 on success, -errno otherwise.
  1648. */
  1649. int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
  1650. unsigned int flags, u16 *id)
  1651. {
  1652. struct ata_port *ap = dev->link->ap;
  1653. unsigned int class = *p_class;
  1654. struct ata_taskfile tf;
  1655. unsigned int err_mask = 0;
  1656. const char *reason;
  1657. int may_fallback = 1, tried_spinup = 0;
  1658. int rc;
  1659. if (ata_msg_ctl(ap))
  1660. ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
  1661. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  1662. retry:
  1663. ata_tf_init(dev, &tf);
  1664. switch (class) {
  1665. case ATA_DEV_ATA:
  1666. tf.command = ATA_CMD_ID_ATA;
  1667. break;
  1668. case ATA_DEV_ATAPI:
  1669. tf.command = ATA_CMD_ID_ATAPI;
  1670. break;
  1671. default:
  1672. rc = -ENODEV;
  1673. reason = "unsupported class";
  1674. goto err_out;
  1675. }
  1676. tf.protocol = ATA_PROT_PIO;
  1677. /* Some devices choke if TF registers contain garbage. Make
  1678. * sure those are properly initialized.
  1679. */
  1680. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  1681. /* Device presence detection is unreliable on some
  1682. * controllers. Always poll IDENTIFY if available.
  1683. */
  1684. tf.flags |= ATA_TFLAG_POLLING;
  1685. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
  1686. id, sizeof(id[0]) * ATA_ID_WORDS, 0);
  1687. if (err_mask) {
  1688. if (err_mask & AC_ERR_NODEV_HINT) {
  1689. DPRINTK("ata%u.%d: NODEV after polling detection\n",
  1690. ap->print_id, dev->devno);
  1691. return -ENOENT;
  1692. }
  1693. /* Device or controller might have reported the wrong
  1694. * device class. Give a shot at the other IDENTIFY if
  1695. * the current one is aborted by the device.
  1696. */
  1697. if (may_fallback &&
  1698. (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
  1699. may_fallback = 0;
  1700. if (class == ATA_DEV_ATA)
  1701. class = ATA_DEV_ATAPI;
  1702. else
  1703. class = ATA_DEV_ATA;
  1704. goto retry;
  1705. }
  1706. rc = -EIO;
  1707. reason = "I/O error";
  1708. goto err_out;
  1709. }
  1710. /* Falling back doesn't make sense if ID data was read
  1711. * successfully at least once.
  1712. */
  1713. may_fallback = 0;
  1714. swap_buf_le16(id, ATA_ID_WORDS);
  1715. /* sanity check */
  1716. rc = -EINVAL;
  1717. reason = "device reports invalid type";
  1718. if (class == ATA_DEV_ATA) {
  1719. if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
  1720. goto err_out;
  1721. } else {
  1722. if (ata_id_is_ata(id))
  1723. goto err_out;
  1724. }
  1725. if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
  1726. tried_spinup = 1;
  1727. /*
  1728. * Drive powered-up in standby mode, and requires a specific
  1729. * SET_FEATURES spin-up subcommand before it will accept
  1730. * anything other than the original IDENTIFY command.
  1731. */
  1732. err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
  1733. if (err_mask && id[2] != 0x738c) {
  1734. rc = -EIO;
  1735. reason = "SPINUP failed";
  1736. goto err_out;
  1737. }
  1738. /*
  1739. * If the drive initially returned incomplete IDENTIFY info,
  1740. * we now must reissue the IDENTIFY command.
  1741. */
  1742. if (id[2] == 0x37c8)
  1743. goto retry;
  1744. }
  1745. if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
  1746. /*
  1747. * The exact sequence expected by certain pre-ATA4 drives is:
  1748. * SRST RESET
  1749. * IDENTIFY (optional in early ATA)
  1750. * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
  1751. * anything else..
  1752. * Some drives were very specific about that exact sequence.
  1753. *
  1754. * Note that ATA4 says lba is mandatory so the second check
  1755. * shoud never trigger.
  1756. */
  1757. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1758. err_mask = ata_dev_init_params(dev, id[3], id[6]);
  1759. if (err_mask) {
  1760. rc = -EIO;
  1761. reason = "INIT_DEV_PARAMS failed";
  1762. goto err_out;
  1763. }
  1764. /* current CHS translation info (id[53-58]) might be
  1765. * changed. reread the identify device info.
  1766. */
  1767. flags &= ~ATA_READID_POSTRESET;
  1768. goto retry;
  1769. }
  1770. }
  1771. *p_class = class;
  1772. return 0;
  1773. err_out:
  1774. if (ata_msg_warn(ap))
  1775. ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
  1776. "(%s, err_mask=0x%x)\n", reason, err_mask);
  1777. return rc;
  1778. }
  1779. static inline u8 ata_dev_knobble(struct ata_device *dev)
  1780. {
  1781. struct ata_port *ap = dev->link->ap;
  1782. return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1783. }
  1784. static void ata_dev_config_ncq(struct ata_device *dev,
  1785. char *desc, size_t desc_sz)
  1786. {
  1787. struct ata_port *ap = dev->link->ap;
  1788. int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
  1789. if (!ata_id_has_ncq(dev->id)) {
  1790. desc[0] = '\0';
  1791. return;
  1792. }
  1793. if (dev->horkage & ATA_HORKAGE_NONCQ) {
  1794. snprintf(desc, desc_sz, "NCQ (not used)");
  1795. return;
  1796. }
  1797. if (ap->flags & ATA_FLAG_NCQ) {
  1798. hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
  1799. dev->flags |= ATA_DFLAG_NCQ;
  1800. }
  1801. if (hdepth >= ddepth)
  1802. snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
  1803. else
  1804. snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
  1805. }
  1806. /**
  1807. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1808. * @dev: Target device to configure
  1809. *
  1810. * Configure @dev according to @dev->id. Generic and low-level
  1811. * driver specific fixups are also applied.
  1812. *
  1813. * LOCKING:
  1814. * Kernel thread context (may sleep)
  1815. *
  1816. * RETURNS:
  1817. * 0 on success, -errno otherwise
  1818. */
  1819. int ata_dev_configure(struct ata_device *dev)
  1820. {
  1821. struct ata_port *ap = dev->link->ap;
  1822. struct ata_eh_context *ehc = &dev->link->eh_context;
  1823. int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
  1824. const u16 *id = dev->id;
  1825. unsigned int xfer_mask;
  1826. char revbuf[7]; /* XYZ-99\0 */
  1827. char fwrevbuf[ATA_ID_FW_REV_LEN+1];
  1828. char modelbuf[ATA_ID_PROD_LEN+1];
  1829. int rc;
  1830. if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
  1831. ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
  1832. __FUNCTION__);
  1833. return 0;
  1834. }
  1835. if (ata_msg_probe(ap))
  1836. ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
  1837. /* set horkage */
  1838. dev->horkage |= ata_dev_blacklisted(dev);
  1839. /* let ACPI work its magic */
  1840. rc = ata_acpi_on_devcfg(dev);
  1841. if (rc)
  1842. return rc;
  1843. /* massage HPA, do it early as it might change IDENTIFY data */
  1844. rc = ata_hpa_resize(dev);
  1845. if (rc)
  1846. return rc;
  1847. /* print device capabilities */
  1848. if (ata_msg_probe(ap))
  1849. ata_dev_printk(dev, KERN_DEBUG,
  1850. "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
  1851. "85:%04x 86:%04x 87:%04x 88:%04x\n",
  1852. __FUNCTION__,
  1853. id[49], id[82], id[83], id[84],
  1854. id[85], id[86], id[87], id[88]);
  1855. /* initialize to-be-configured parameters */
  1856. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1857. dev->max_sectors = 0;
  1858. dev->cdb_len = 0;
  1859. dev->n_sectors = 0;
  1860. dev->cylinders = 0;
  1861. dev->heads = 0;
  1862. dev->sectors = 0;
  1863. /*
  1864. * common ATA, ATAPI feature tests
  1865. */
  1866. /* find max transfer mode; for printk only */
  1867. xfer_mask = ata_id_xfermask(id);
  1868. if (ata_msg_probe(ap))
  1869. ata_dump_id(id);
  1870. /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
  1871. ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
  1872. sizeof(fwrevbuf));
  1873. ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
  1874. sizeof(modelbuf));
  1875. /* ATA-specific feature tests */
  1876. if (dev->class == ATA_DEV_ATA) {
  1877. if (ata_id_is_cfa(id)) {
  1878. if (id[162] & 1) /* CPRM may make this media unusable */
  1879. ata_dev_printk(dev, KERN_WARNING,
  1880. "supports DRM functions and may "
  1881. "not be fully accessable.\n");
  1882. snprintf(revbuf, 7, "CFA");
  1883. } else
  1884. snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
  1885. dev->n_sectors = ata_id_n_sectors(id);
  1886. if (dev->id[59] & 0x100)
  1887. dev->multi_count = dev->id[59] & 0xff;
  1888. if (ata_id_has_lba(id)) {
  1889. const char *lba_desc;
  1890. char ncq_desc[20];
  1891. lba_desc = "LBA";
  1892. dev->flags |= ATA_DFLAG_LBA;
  1893. if (ata_id_has_lba48(id)) {
  1894. dev->flags |= ATA_DFLAG_LBA48;
  1895. lba_desc = "LBA48";
  1896. if (dev->n_sectors >= (1UL << 28) &&
  1897. ata_id_has_flush_ext(id))
  1898. dev->flags |= ATA_DFLAG_FLUSH_EXT;
  1899. }
  1900. /* config NCQ */
  1901. ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
  1902. /* print device info to dmesg */
  1903. if (ata_msg_drv(ap) && print_info) {
  1904. ata_dev_printk(dev, KERN_INFO,
  1905. "%s: %s, %s, max %s\n",
  1906. revbuf, modelbuf, fwrevbuf,
  1907. ata_mode_string(xfer_mask));
  1908. ata_dev_printk(dev, KERN_INFO,
  1909. "%Lu sectors, multi %u: %s %s\n",
  1910. (unsigned long long)dev->n_sectors,
  1911. dev->multi_count, lba_desc, ncq_desc);
  1912. }
  1913. } else {
  1914. /* CHS */
  1915. /* Default translation */
  1916. dev->cylinders = id[1];
  1917. dev->heads = id[3];
  1918. dev->sectors = id[6];
  1919. if (ata_id_current_chs_valid(id)) {
  1920. /* Current CHS translation is valid. */
  1921. dev->cylinders = id[54];
  1922. dev->heads = id[55];
  1923. dev->sectors = id[56];
  1924. }
  1925. /* print device info to dmesg */
  1926. if (ata_msg_drv(ap) && print_info) {
  1927. ata_dev_printk(dev, KERN_INFO,
  1928. "%s: %s, %s, max %s\n",
  1929. revbuf, modelbuf, fwrevbuf,
  1930. ata_mode_string(xfer_mask));
  1931. ata_dev_printk(dev, KERN_INFO,
  1932. "%Lu sectors, multi %u, CHS %u/%u/%u\n",
  1933. (unsigned long long)dev->n_sectors,
  1934. dev->multi_count, dev->cylinders,
  1935. dev->heads, dev->sectors);
  1936. }
  1937. }
  1938. dev->cdb_len = 16;
  1939. }
  1940. /* ATAPI-specific feature tests */
  1941. else if (dev->class == ATA_DEV_ATAPI) {
  1942. const char *cdb_intr_string = "";
  1943. const char *atapi_an_string = "";
  1944. u32 sntf;
  1945. rc = atapi_cdb_len(id);
  1946. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1947. if (ata_msg_warn(ap))
  1948. ata_dev_printk(dev, KERN_WARNING,
  1949. "unsupported CDB len\n");
  1950. rc = -EINVAL;
  1951. goto err_out_nosup;
  1952. }
  1953. dev->cdb_len = (unsigned int) rc;
  1954. /* Enable ATAPI AN if both the host and device have
  1955. * the support. If PMP is attached, SNTF is required
  1956. * to enable ATAPI AN to discern between PHY status
  1957. * changed notifications and ATAPI ANs.
  1958. */
  1959. if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
  1960. (!ap->nr_pmp_links ||
  1961. sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
  1962. unsigned int err_mask;
  1963. /* issue SET feature command to turn this on */
  1964. err_mask = ata_dev_set_feature(dev,
  1965. SETFEATURES_SATA_ENABLE, SATA_AN);
  1966. if (err_mask)
  1967. ata_dev_printk(dev, KERN_ERR,
  1968. "failed to enable ATAPI AN "
  1969. "(err_mask=0x%x)\n", err_mask);
  1970. else {
  1971. dev->flags |= ATA_DFLAG_AN;
  1972. atapi_an_string = ", ATAPI AN";
  1973. }
  1974. }
  1975. if (ata_id_cdb_intr(dev->id)) {
  1976. dev->flags |= ATA_DFLAG_CDB_INTR;
  1977. cdb_intr_string = ", CDB intr";
  1978. }
  1979. /* print device info to dmesg */
  1980. if (ata_msg_drv(ap) && print_info)
  1981. ata_dev_printk(dev, KERN_INFO,
  1982. "ATAPI: %s, %s, max %s%s%s\n",
  1983. modelbuf, fwrevbuf,
  1984. ata_mode_string(xfer_mask),
  1985. cdb_intr_string, atapi_an_string);
  1986. }
  1987. /* determine max_sectors */
  1988. dev->max_sectors = ATA_MAX_SECTORS;
  1989. if (dev->flags & ATA_DFLAG_LBA48)
  1990. dev->max_sectors = ATA_MAX_SECTORS_LBA48;
  1991. if (!(dev->horkage & ATA_HORKAGE_IPM)) {
  1992. if (ata_id_has_hipm(dev->id))
  1993. dev->flags |= ATA_DFLAG_HIPM;
  1994. if (ata_id_has_dipm(dev->id))
  1995. dev->flags |= ATA_DFLAG_DIPM;
  1996. }
  1997. if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
  1998. /* Let the user know. We don't want to disallow opens for
  1999. rescue purposes, or in case the vendor is just a blithering
  2000. idiot */
  2001. if (print_info) {
  2002. ata_dev_printk(dev, KERN_WARNING,
  2003. "Drive reports diagnostics failure. This may indicate a drive\n");
  2004. ata_dev_printk(dev, KERN_WARNING,
  2005. "fault or invalid emulation. Contact drive vendor for information.\n");
  2006. }
  2007. }
  2008. /* limit bridge transfers to udma5, 200 sectors */
  2009. if (ata_dev_knobble(dev)) {
  2010. if (ata_msg_drv(ap) && print_info)
  2011. ata_dev_printk(dev, KERN_INFO,
  2012. "applying bridge limits\n");
  2013. dev->udma_mask &= ATA_UDMA5;
  2014. dev->max_sectors = ATA_MAX_SECTORS;
  2015. }
  2016. if ((dev->class == ATA_DEV_ATAPI) &&
  2017. (atapi_command_packet_set(id) == TYPE_TAPE)) {
  2018. dev->max_sectors = ATA_MAX_SECTORS_TAPE;
  2019. dev->horkage |= ATA_HORKAGE_STUCK_ERR;
  2020. }
  2021. if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
  2022. dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
  2023. dev->max_sectors);
  2024. if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) {
  2025. dev->horkage |= ATA_HORKAGE_IPM;
  2026. /* reset link pm_policy for this port to no pm */
  2027. ap->pm_policy = MAX_PERFORMANCE;
  2028. }
  2029. if (ap->ops->dev_config)
  2030. ap->ops->dev_config(dev);
  2031. if (ata_msg_probe(ap))
  2032. ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
  2033. __FUNCTION__, ata_chk_status(ap));
  2034. return 0;
  2035. err_out_nosup:
  2036. if (ata_msg_probe(ap))
  2037. ata_dev_printk(dev, KERN_DEBUG,
  2038. "%s: EXIT, err\n", __FUNCTION__);
  2039. return rc;
  2040. }
  2041. /**
  2042. * ata_cable_40wire - return 40 wire cable type
  2043. * @ap: port
  2044. *
  2045. * Helper method for drivers which want to hardwire 40 wire cable
  2046. * detection.
  2047. */
  2048. int ata_cable_40wire(struct ata_port *ap)
  2049. {
  2050. return ATA_CBL_PATA40;
  2051. }
  2052. /**
  2053. * ata_cable_80wire - return 80 wire cable type
  2054. * @ap: port
  2055. *
  2056. * Helper method for drivers which want to hardwire 80 wire cable
  2057. * detection.
  2058. */
  2059. int ata_cable_80wire(struct ata_port *ap)
  2060. {
  2061. return ATA_CBL_PATA80;
  2062. }
  2063. /**
  2064. * ata_cable_unknown - return unknown PATA cable.
  2065. * @ap: port
  2066. *
  2067. * Helper method for drivers which have no PATA cable detection.
  2068. */
  2069. int ata_cable_unknown(struct ata_port *ap)
  2070. {
  2071. return ATA_CBL_PATA_UNK;
  2072. }
  2073. /**
  2074. * ata_cable_sata - return SATA cable type
  2075. * @ap: port
  2076. *
  2077. * Helper method for drivers which have SATA cables
  2078. */
  2079. int ata_cable_sata(struct ata_port *ap)
  2080. {
  2081. return ATA_CBL_SATA;
  2082. }
  2083. /**
  2084. * ata_bus_probe - Reset and probe ATA bus
  2085. * @ap: Bus to probe
  2086. *
  2087. * Master ATA bus probing function. Initiates a hardware-dependent
  2088. * bus reset, then attempts to identify any devices found on
  2089. * the bus.
  2090. *
  2091. * LOCKING:
  2092. * PCI/etc. bus probe sem.
  2093. *
  2094. * RETURNS:
  2095. * Zero on success, negative errno otherwise.
  2096. */
  2097. int ata_bus_probe(struct ata_port *ap)
  2098. {
  2099. unsigned int classes[ATA_MAX_DEVICES];
  2100. int tries[ATA_MAX_DEVICES];
  2101. int rc;
  2102. struct ata_device *dev;
  2103. ata_port_probe(ap);
  2104. ata_link_for_each_dev(dev, &ap->link)
  2105. tries[dev->devno] = ATA_PROBE_MAX_TRIES;
  2106. retry:
  2107. ata_link_for_each_dev(dev, &ap->link) {
  2108. /* If we issue an SRST then an ATA drive (not ATAPI)
  2109. * may change configuration and be in PIO0 timing. If
  2110. * we do a hard reset (or are coming from power on)
  2111. * this is true for ATA or ATAPI. Until we've set a
  2112. * suitable controller mode we should not touch the
  2113. * bus as we may be talking too fast.
  2114. */
  2115. dev->pio_mode = XFER_PIO_0;
  2116. /* If the controller has a pio mode setup function
  2117. * then use it to set the chipset to rights. Don't
  2118. * touch the DMA setup as that will be dealt with when
  2119. * configuring devices.
  2120. */
  2121. if (ap->ops->set_piomode)
  2122. ap->ops->set_piomode(ap, dev);
  2123. }
  2124. /* reset and determine device classes */
  2125. ap->ops->phy_reset(ap);
  2126. ata_link_for_each_dev(dev, &ap->link) {
  2127. if (!(ap->flags & ATA_FLAG_DISABLED) &&
  2128. dev->class != ATA_DEV_UNKNOWN)
  2129. classes[dev->devno] = dev->class;
  2130. else
  2131. classes[dev->devno] = ATA_DEV_NONE;
  2132. dev->class = ATA_DEV_UNKNOWN;
  2133. }
  2134. ata_port_probe(ap);
  2135. /* read IDENTIFY page and configure devices. We have to do the identify
  2136. specific sequence bass-ackwards so that PDIAG- is released by
  2137. the slave device */
  2138. ata_link_for_each_dev(dev, &ap->link) {
  2139. if (tries[dev->devno])
  2140. dev->class = classes[dev->devno];
  2141. if (!ata_dev_enabled(dev))
  2142. continue;
  2143. rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
  2144. dev->id);
  2145. if (rc)
  2146. goto fail;
  2147. }
  2148. /* Now ask for the cable type as PDIAG- should have been released */
  2149. if (ap->ops->cable_detect)
  2150. ap->cbl = ap->ops->cable_detect(ap);
  2151. /* We may have SATA bridge glue hiding here irrespective of the
  2152. reported cable types and sensed types */
  2153. ata_link_for_each_dev(dev, &ap->link) {
  2154. if (!ata_dev_enabled(dev))
  2155. continue;
  2156. /* SATA drives indicate we have a bridge. We don't know which
  2157. end of the link the bridge is which is a problem */
  2158. if (ata_id_is_sata(dev->id))
  2159. ap->cbl = ATA_CBL_SATA;
  2160. }
  2161. /* After the identify sequence we can now set up the devices. We do
  2162. this in the normal order so that the user doesn't get confused */
  2163. ata_link_for_each_dev(dev, &ap->link) {
  2164. if (!ata_dev_enabled(dev))
  2165. continue;
  2166. ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
  2167. rc = ata_dev_configure(dev);
  2168. ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
  2169. if (rc)
  2170. goto fail;
  2171. }
  2172. /* configure transfer mode */
  2173. rc = ata_set_mode(&ap->link, &dev);
  2174. if (rc)
  2175. goto fail;
  2176. ata_link_for_each_dev(dev, &ap->link)
  2177. if (ata_dev_enabled(dev))
  2178. return 0;
  2179. /* no device present, disable port */
  2180. ata_port_disable(ap);
  2181. return -ENODEV;
  2182. fail:
  2183. tries[dev->devno]--;
  2184. switch (rc) {
  2185. case -EINVAL:
  2186. /* eeek, something went very wrong, give up */
  2187. tries[dev->devno] = 0;
  2188. break;
  2189. case -ENODEV:
  2190. /* give it just one more chance */
  2191. tries[dev->devno] = min(tries[dev->devno], 1);
  2192. case -EIO:
  2193. if (tries[dev->devno] == 1) {
  2194. /* This is the last chance, better to slow
  2195. * down than lose it.
  2196. */
  2197. sata_down_spd_limit(&ap->link);
  2198. ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
  2199. }
  2200. }
  2201. if (!tries[dev->devno])
  2202. ata_dev_disable(dev);
  2203. goto retry;
  2204. }
  2205. /**
  2206. * ata_port_probe - Mark port as enabled
  2207. * @ap: Port for which we indicate enablement
  2208. *
  2209. * Modify @ap data structure such that the system
  2210. * thinks that the entire port is enabled.
  2211. *
  2212. * LOCKING: host lock, or some other form of
  2213. * serialization.
  2214. */
  2215. void ata_port_probe(struct ata_port *ap)
  2216. {
  2217. ap->flags &= ~ATA_FLAG_DISABLED;
  2218. }
  2219. /**
  2220. * sata_print_link_status - Print SATA link status
  2221. * @link: SATA link to printk link status about
  2222. *
  2223. * This function prints link speed and status of a SATA link.
  2224. *
  2225. * LOCKING:
  2226. * None.
  2227. */
  2228. void sata_print_link_status(struct ata_link *link)
  2229. {
  2230. u32 sstatus, scontrol, tmp;
  2231. if (sata_scr_read(link, SCR_STATUS, &sstatus))
  2232. return;
  2233. sata_scr_read(link, SCR_CONTROL, &scontrol);
  2234. if (ata_link_online(link)) {
  2235. tmp = (sstatus >> 4) & 0xf;
  2236. ata_link_printk(link, KERN_INFO,
  2237. "SATA link up %s (SStatus %X SControl %X)\n",
  2238. sata_spd_string(tmp), sstatus, scontrol);
  2239. } else {
  2240. ata_link_printk(link, KERN_INFO,
  2241. "SATA link down (SStatus %X SControl %X)\n",
  2242. sstatus, scontrol);
  2243. }
  2244. }
  2245. /**
  2246. * ata_dev_pair - return other device on cable
  2247. * @adev: device
  2248. *
  2249. * Obtain the other device on the same cable, or if none is
  2250. * present NULL is returned
  2251. */
  2252. struct ata_device *ata_dev_pair(struct ata_device *adev)
  2253. {
  2254. struct ata_link *link = adev->link;
  2255. struct ata_device *pair = &link->device[1 - adev->devno];
  2256. if (!ata_dev_enabled(pair))
  2257. return NULL;
  2258. return pair;
  2259. }
  2260. /**
  2261. * ata_port_disable - Disable port.
  2262. * @ap: Port to be disabled.
  2263. *
  2264. * Modify @ap data structure such that the system
  2265. * thinks that the entire port is disabled, and should
  2266. * never attempt to probe or communicate with devices
  2267. * on this port.
  2268. *
  2269. * LOCKING: host lock, or some other form of
  2270. * serialization.
  2271. */
  2272. void ata_port_disable(struct ata_port *ap)
  2273. {
  2274. ap->link.device[0].class = ATA_DEV_NONE;
  2275. ap->link.device[1].class = ATA_DEV_NONE;
  2276. ap->flags |= ATA_FLAG_DISABLED;
  2277. }
  2278. /**
  2279. * sata_down_spd_limit - adjust SATA spd limit downward
  2280. * @link: Link to adjust SATA spd limit for
  2281. *
  2282. * Adjust SATA spd limit of @link downward. Note that this
  2283. * function only adjusts the limit. The change must be applied
  2284. * using sata_set_spd().
  2285. *
  2286. * LOCKING:
  2287. * Inherited from caller.
  2288. *
  2289. * RETURNS:
  2290. * 0 on success, negative errno on failure
  2291. */
  2292. int sata_down_spd_limit(struct ata_link *link)
  2293. {
  2294. u32 sstatus, spd, mask;
  2295. int rc, highbit;
  2296. if (!sata_scr_valid(link))
  2297. return -EOPNOTSUPP;
  2298. /* If SCR can be read, use it to determine the current SPD.
  2299. * If not, use cached value in link->sata_spd.
  2300. */
  2301. rc = sata_scr_read(link, SCR_STATUS, &sstatus);
  2302. if (rc == 0)
  2303. spd = (sstatus >> 4) & 0xf;
  2304. else
  2305. spd = link->sata_spd;
  2306. mask = link->sata_spd_limit;
  2307. if (mask <= 1)
  2308. return -EINVAL;
  2309. /* unconditionally mask off the highest bit */
  2310. highbit = fls(mask) - 1;
  2311. mask &= ~(1 << highbit);
  2312. /* Mask off all speeds higher than or equal to the current
  2313. * one. Force 1.5Gbps if current SPD is not available.
  2314. */
  2315. if (spd > 1)
  2316. mask &= (1 << (spd - 1)) - 1;
  2317. else
  2318. mask &= 1;
  2319. /* were we already at the bottom? */
  2320. if (!mask)
  2321. return -EINVAL;
  2322. link->sata_spd_limit = mask;
  2323. ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
  2324. sata_spd_string(fls(mask)));
  2325. return 0;
  2326. }
  2327. static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
  2328. {
  2329. struct ata_link *host_link = &link->ap->link;
  2330. u32 limit, target, spd;
  2331. limit = link->sata_spd_limit;
  2332. /* Don't configure downstream link faster than upstream link.
  2333. * It doesn't speed up anything and some PMPs choke on such
  2334. * configuration.
  2335. */
  2336. if (!ata_is_host_link(link) && host_link->sata_spd)
  2337. limit &= (1 << host_link->sata_spd) - 1;
  2338. if (limit == UINT_MAX)
  2339. target = 0;
  2340. else
  2341. target = fls(limit);
  2342. spd = (*scontrol >> 4) & 0xf;
  2343. *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
  2344. return spd != target;
  2345. }
  2346. /**
  2347. * sata_set_spd_needed - is SATA spd configuration needed
  2348. * @link: Link in question
  2349. *
  2350. * Test whether the spd limit in SControl matches
  2351. * @link->sata_spd_limit. This function is used to determine
  2352. * whether hardreset is necessary to apply SATA spd
  2353. * configuration.
  2354. *
  2355. * LOCKING:
  2356. * Inherited from caller.
  2357. *
  2358. * RETURNS:
  2359. * 1 if SATA spd configuration is needed, 0 otherwise.
  2360. */
  2361. int sata_set_spd_needed(struct ata_link *link)
  2362. {
  2363. u32 scontrol;
  2364. if (sata_scr_read(link, SCR_CONTROL, &scontrol))
  2365. return 1;
  2366. return __sata_set_spd_needed(link, &scontrol);
  2367. }
  2368. /**
  2369. * sata_set_spd - set SATA spd according to spd limit
  2370. * @link: Link to set SATA spd for
  2371. *
  2372. * Set SATA spd of @link according to sata_spd_limit.
  2373. *
  2374. * LOCKING:
  2375. * Inherited from caller.
  2376. *
  2377. * RETURNS:
  2378. * 0 if spd doesn't need to be changed, 1 if spd has been
  2379. * changed. Negative errno if SCR registers are inaccessible.
  2380. */
  2381. int sata_set_spd(struct ata_link *link)
  2382. {
  2383. u32 scontrol;
  2384. int rc;
  2385. if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
  2386. return rc;
  2387. if (!__sata_set_spd_needed(link, &scontrol))
  2388. return 0;
  2389. if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
  2390. return rc;
  2391. return 1;
  2392. }
  2393. /*
  2394. * This mode timing computation functionality is ported over from
  2395. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  2396. */
  2397. /*
  2398. * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  2399. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  2400. * for UDMA6, which is currently supported only by Maxtor drives.
  2401. *
  2402. * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
  2403. */
  2404. static const struct ata_timing ata_timing[] = {
  2405. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  2406. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  2407. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  2408. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  2409. { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
  2410. { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
  2411. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  2412. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  2413. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  2414. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  2415. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  2416. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  2417. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  2418. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  2419. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  2420. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  2421. { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
  2422. { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
  2423. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  2424. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  2425. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  2426. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  2427. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  2428. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  2429. { 0xFF }
  2430. };
  2431. #define ENOUGH(v, unit) (((v)-1)/(unit)+1)
  2432. #define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
  2433. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  2434. {
  2435. q->setup = EZ(t->setup * 1000, T);
  2436. q->act8b = EZ(t->act8b * 1000, T);
  2437. q->rec8b = EZ(t->rec8b * 1000, T);
  2438. q->cyc8b = EZ(t->cyc8b * 1000, T);
  2439. q->active = EZ(t->active * 1000, T);
  2440. q->recover = EZ(t->recover * 1000, T);
  2441. q->cycle = EZ(t->cycle * 1000, T);
  2442. q->udma = EZ(t->udma * 1000, UT);
  2443. }
  2444. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  2445. struct ata_timing *m, unsigned int what)
  2446. {
  2447. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  2448. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  2449. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  2450. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  2451. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  2452. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  2453. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  2454. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  2455. }
  2456. static const struct ata_timing *ata_timing_find_mode(unsigned short speed)
  2457. {
  2458. const struct ata_timing *t;
  2459. for (t = ata_timing; t->mode != speed; t++)
  2460. if (t->mode == 0xFF)
  2461. return NULL;
  2462. return t;
  2463. }
  2464. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  2465. struct ata_timing *t, int T, int UT)
  2466. {
  2467. const struct ata_timing *s;
  2468. struct ata_timing p;
  2469. /*
  2470. * Find the mode.
  2471. */
  2472. if (!(s = ata_timing_find_mode(speed)))
  2473. return -EINVAL;
  2474. memcpy(t, s, sizeof(*s));
  2475. /*
  2476. * If the drive is an EIDE drive, it can tell us it needs extended
  2477. * PIO/MW_DMA cycle timing.
  2478. */
  2479. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  2480. memset(&p, 0, sizeof(p));
  2481. if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  2482. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  2483. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  2484. } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  2485. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  2486. }
  2487. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  2488. }
  2489. /*
  2490. * Convert the timing to bus clock counts.
  2491. */
  2492. ata_timing_quantize(t, t, T, UT);
  2493. /*
  2494. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  2495. * S.M.A.R.T * and some other commands. We have to ensure that the
  2496. * DMA cycle timing is slower/equal than the fastest PIO timing.
  2497. */
  2498. if (speed > XFER_PIO_6) {
  2499. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  2500. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  2501. }
  2502. /*
  2503. * Lengthen active & recovery time so that cycle time is correct.
  2504. */
  2505. if (t->act8b + t->rec8b < t->cyc8b) {
  2506. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  2507. t->rec8b = t->cyc8b - t->act8b;
  2508. }
  2509. if (t->active + t->recover < t->cycle) {
  2510. t->active += (t->cycle - (t->active + t->recover)) / 2;
  2511. t->recover = t->cycle - t->active;
  2512. }
  2513. /* In a few cases quantisation may produce enough errors to
  2514. leave t->cycle too low for the sum of active and recovery
  2515. if so we must correct this */
  2516. if (t->active + t->recover > t->cycle)
  2517. t->cycle = t->active + t->recover;
  2518. return 0;
  2519. }
  2520. /**
  2521. * ata_down_xfermask_limit - adjust dev xfer masks downward
  2522. * @dev: Device to adjust xfer masks
  2523. * @sel: ATA_DNXFER_* selector
  2524. *
  2525. * Adjust xfer masks of @dev downward. Note that this function
  2526. * does not apply the change. Invoking ata_set_mode() afterwards
  2527. * will apply the limit.
  2528. *
  2529. * LOCKING:
  2530. * Inherited from caller.
  2531. *
  2532. * RETURNS:
  2533. * 0 on success, negative errno on failure
  2534. */
  2535. int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
  2536. {
  2537. char buf[32];
  2538. unsigned int orig_mask, xfer_mask;
  2539. unsigned int pio_mask, mwdma_mask, udma_mask;
  2540. int quiet, highbit;
  2541. quiet = !!(sel & ATA_DNXFER_QUIET);
  2542. sel &= ~ATA_DNXFER_QUIET;
  2543. xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
  2544. dev->mwdma_mask,
  2545. dev->udma_mask);
  2546. ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
  2547. switch (sel) {
  2548. case ATA_DNXFER_PIO:
  2549. highbit = fls(pio_mask) - 1;
  2550. pio_mask &= ~(1 << highbit);
  2551. break;
  2552. case ATA_DNXFER_DMA:
  2553. if (udma_mask) {
  2554. highbit = fls(udma_mask) - 1;
  2555. udma_mask &= ~(1 << highbit);
  2556. if (!udma_mask)
  2557. return -ENOENT;
  2558. } else if (mwdma_mask) {
  2559. highbit = fls(mwdma_mask) - 1;
  2560. mwdma_mask &= ~(1 << highbit);
  2561. if (!mwdma_mask)
  2562. return -ENOENT;
  2563. }
  2564. break;
  2565. case ATA_DNXFER_40C:
  2566. udma_mask &= ATA_UDMA_MASK_40C;
  2567. break;
  2568. case ATA_DNXFER_FORCE_PIO0:
  2569. pio_mask &= 1;
  2570. case ATA_DNXFER_FORCE_PIO:
  2571. mwdma_mask = 0;
  2572. udma_mask = 0;
  2573. break;
  2574. default:
  2575. BUG();
  2576. }
  2577. xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  2578. if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
  2579. return -ENOENT;
  2580. if (!quiet) {
  2581. if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
  2582. snprintf(buf, sizeof(buf), "%s:%s",
  2583. ata_mode_string(xfer_mask),
  2584. ata_mode_string(xfer_mask & ATA_MASK_PIO));
  2585. else
  2586. snprintf(buf, sizeof(buf), "%s",
  2587. ata_mode_string(xfer_mask));
  2588. ata_dev_printk(dev, KERN_WARNING,
  2589. "limiting speed to %s\n", buf);
  2590. }
  2591. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  2592. &dev->udma_mask);
  2593. return 0;
  2594. }
  2595. static int ata_dev_set_mode(struct ata_device *dev)
  2596. {
  2597. struct ata_eh_context *ehc = &dev->link->eh_context;
  2598. unsigned int err_mask;
  2599. int rc;
  2600. dev->flags &= ~ATA_DFLAG_PIO;
  2601. if (dev->xfer_shift == ATA_SHIFT_PIO)
  2602. dev->flags |= ATA_DFLAG_PIO;
  2603. err_mask = ata_dev_set_xfermode(dev);
  2604. /* Old CFA may refuse this command, which is just fine */
  2605. if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
  2606. err_mask &= ~AC_ERR_DEV;
  2607. /* Some very old devices and some bad newer ones fail any kind of
  2608. SET_XFERMODE request but support PIO0-2 timings and no IORDY */
  2609. if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
  2610. dev->pio_mode <= XFER_PIO_2)
  2611. err_mask &= ~AC_ERR_DEV;
  2612. /* Early MWDMA devices do DMA but don't allow DMA mode setting.
  2613. Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
  2614. if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
  2615. dev->dma_mode == XFER_MW_DMA_0 &&
  2616. (dev->id[63] >> 8) & 1)
  2617. err_mask &= ~AC_ERR_DEV;
  2618. if (err_mask) {
  2619. ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
  2620. "(err_mask=0x%x)\n", err_mask);
  2621. return -EIO;
  2622. }
  2623. ehc->i.flags |= ATA_EHI_POST_SETMODE;
  2624. rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
  2625. ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
  2626. if (rc)
  2627. return rc;
  2628. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  2629. dev->xfer_shift, (int)dev->xfer_mode);
  2630. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  2631. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  2632. return 0;
  2633. }
  2634. /**
  2635. * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
  2636. * @link: link on which timings will be programmed
  2637. * @r_failed_dev: out paramter for failed device
  2638. *
  2639. * Standard implementation of the function used to tune and set
  2640. * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  2641. * ata_dev_set_mode() fails, pointer to the failing device is
  2642. * returned in @r_failed_dev.
  2643. *
  2644. * LOCKING:
  2645. * PCI/etc. bus probe sem.
  2646. *
  2647. * RETURNS:
  2648. * 0 on success, negative errno otherwise
  2649. */
  2650. int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
  2651. {
  2652. struct ata_port *ap = link->ap;
  2653. struct ata_device *dev;
  2654. int rc = 0, used_dma = 0, found = 0;
  2655. /* step 1: calculate xfer_mask */
  2656. ata_link_for_each_dev(dev, link) {
  2657. unsigned int pio_mask, dma_mask;
  2658. unsigned int mode_mask;
  2659. if (!ata_dev_enabled(dev))
  2660. continue;
  2661. mode_mask = ATA_DMA_MASK_ATA;
  2662. if (dev->class == ATA_DEV_ATAPI)
  2663. mode_mask = ATA_DMA_MASK_ATAPI;
  2664. else if (ata_id_is_cfa(dev->id))
  2665. mode_mask = ATA_DMA_MASK_CFA;
  2666. ata_dev_xfermask(dev);
  2667. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  2668. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  2669. if (libata_dma_mask & mode_mask)
  2670. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  2671. else
  2672. dma_mask = 0;
  2673. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  2674. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  2675. found = 1;
  2676. if (dev->dma_mode)
  2677. used_dma = 1;
  2678. }
  2679. if (!found)
  2680. goto out;
  2681. /* step 2: always set host PIO timings */
  2682. ata_link_for_each_dev(dev, link) {
  2683. if (!ata_dev_enabled(dev))
  2684. continue;
  2685. if (!dev->pio_mode) {
  2686. ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
  2687. rc = -EINVAL;
  2688. goto out;
  2689. }
  2690. dev->xfer_mode = dev->pio_mode;
  2691. dev->xfer_shift = ATA_SHIFT_PIO;
  2692. if (ap->ops->set_piomode)
  2693. ap->ops->set_piomode(ap, dev);
  2694. }
  2695. /* step 3: set host DMA timings */
  2696. ata_link_for_each_dev(dev, link) {
  2697. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  2698. continue;
  2699. dev->xfer_mode = dev->dma_mode;
  2700. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  2701. if (ap->ops->set_dmamode)
  2702. ap->ops->set_dmamode(ap, dev);
  2703. }
  2704. /* step 4: update devices' xfer mode */
  2705. ata_link_for_each_dev(dev, link) {
  2706. /* don't update suspended devices' xfer mode */
  2707. if (!ata_dev_enabled(dev))
  2708. continue;
  2709. rc = ata_dev_set_mode(dev);
  2710. if (rc)
  2711. goto out;
  2712. }
  2713. /* Record simplex status. If we selected DMA then the other
  2714. * host channels are not permitted to do so.
  2715. */
  2716. if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
  2717. ap->host->simplex_claimed = ap;
  2718. out:
  2719. if (rc)
  2720. *r_failed_dev = dev;
  2721. return rc;
  2722. }
  2723. /**
  2724. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  2725. * @link: link on which timings will be programmed
  2726. * @r_failed_dev: out paramter for failed device
  2727. *
  2728. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  2729. * ata_set_mode() fails, pointer to the failing device is
  2730. * returned in @r_failed_dev.
  2731. *
  2732. * LOCKING:
  2733. * PCI/etc. bus probe sem.
  2734. *
  2735. * RETURNS:
  2736. * 0 on success, negative errno otherwise
  2737. */
  2738. int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
  2739. {
  2740. struct ata_port *ap = link->ap;
  2741. /* has private set_mode? */
  2742. if (ap->ops->set_mode)
  2743. return ap->ops->set_mode(link, r_failed_dev);
  2744. return ata_do_set_mode(link, r_failed_dev);
  2745. }
  2746. /**
  2747. * ata_tf_to_host - issue ATA taskfile to host controller
  2748. * @ap: port to which command is being issued
  2749. * @tf: ATA taskfile register set
  2750. *
  2751. * Issues ATA taskfile register set to ATA host controller,
  2752. * with proper synchronization with interrupt handler and
  2753. * other threads.
  2754. *
  2755. * LOCKING:
  2756. * spin_lock_irqsave(host lock)
  2757. */
  2758. static inline void ata_tf_to_host(struct ata_port *ap,
  2759. const struct ata_taskfile *tf)
  2760. {
  2761. ap->ops->tf_load(ap, tf);
  2762. ap->ops->exec_command(ap, tf);
  2763. }
  2764. /**
  2765. * ata_busy_sleep - sleep until BSY clears, or timeout
  2766. * @ap: port containing status register to be polled
  2767. * @tmout_pat: impatience timeout
  2768. * @tmout: overall timeout
  2769. *
  2770. * Sleep until ATA Status register bit BSY clears,
  2771. * or a timeout occurs.
  2772. *
  2773. * LOCKING:
  2774. * Kernel thread context (may sleep).
  2775. *
  2776. * RETURNS:
  2777. * 0 on success, -errno otherwise.
  2778. */
  2779. int ata_busy_sleep(struct ata_port *ap,
  2780. unsigned long tmout_pat, unsigned long tmout)
  2781. {
  2782. unsigned long timer_start, timeout;
  2783. u8 status;
  2784. status = ata_busy_wait(ap, ATA_BUSY, 300);
  2785. timer_start = jiffies;
  2786. timeout = timer_start + tmout_pat;
  2787. while (status != 0xff && (status & ATA_BUSY) &&
  2788. time_before(jiffies, timeout)) {
  2789. msleep(50);
  2790. status = ata_busy_wait(ap, ATA_BUSY, 3);
  2791. }
  2792. if (status != 0xff && (status & ATA_BUSY))
  2793. ata_port_printk(ap, KERN_WARNING,
  2794. "port is slow to respond, please be patient "
  2795. "(Status 0x%x)\n", status);
  2796. timeout = timer_start + tmout;
  2797. while (status != 0xff && (status & ATA_BUSY) &&
  2798. time_before(jiffies, timeout)) {
  2799. msleep(50);
  2800. status = ata_chk_status(ap);
  2801. }
  2802. if (status == 0xff)
  2803. return -ENODEV;
  2804. if (status & ATA_BUSY) {
  2805. ata_port_printk(ap, KERN_ERR, "port failed to respond "
  2806. "(%lu secs, Status 0x%x)\n",
  2807. tmout / HZ, status);
  2808. return -EBUSY;
  2809. }
  2810. return 0;
  2811. }
  2812. /**
  2813. * ata_wait_after_reset - wait before checking status after reset
  2814. * @ap: port containing status register to be polled
  2815. * @deadline: deadline jiffies for the operation
  2816. *
  2817. * After reset, we need to pause a while before reading status.
  2818. * Also, certain combination of controller and device report 0xff
  2819. * for some duration (e.g. until SATA PHY is up and running)
  2820. * which is interpreted as empty port in ATA world. This
  2821. * function also waits for such devices to get out of 0xff
  2822. * status.
  2823. *
  2824. * LOCKING:
  2825. * Kernel thread context (may sleep).
  2826. */
  2827. void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline)
  2828. {
  2829. unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;
  2830. if (time_before(until, deadline))
  2831. deadline = until;
  2832. /* Spec mandates ">= 2ms" before checking status. We wait
  2833. * 150ms, because that was the magic delay used for ATAPI
  2834. * devices in Hale Landis's ATADRVR, for the period of time
  2835. * between when the ATA command register is written, and then
  2836. * status is checked. Because waiting for "a while" before
  2837. * checking status is fine, post SRST, we perform this magic
  2838. * delay here as well.
  2839. *
  2840. * Old drivers/ide uses the 2mS rule and then waits for ready.
  2841. */
  2842. msleep(150);
  2843. /* Wait for 0xff to clear. Some SATA devices take a long time
  2844. * to clear 0xff after reset. For example, HHD424020F7SV00
  2845. * iVDR needs >= 800ms while. Quantum GoVault needs even more
  2846. * than that.
  2847. *
  2848. * Note that some PATA controllers (pata_ali) explode if
  2849. * status register is read more than once when there's no
  2850. * device attached.
  2851. */
  2852. if (ap->flags & ATA_FLAG_SATA) {
  2853. while (1) {
  2854. u8 status = ata_chk_status(ap);
  2855. if (status != 0xff || time_after(jiffies, deadline))
  2856. return;
  2857. msleep(50);
  2858. }
  2859. }
  2860. }
  2861. /**
  2862. * ata_wait_ready - sleep until BSY clears, or timeout
  2863. * @ap: port containing status register to be polled
  2864. * @deadline: deadline jiffies for the operation
  2865. *
  2866. * Sleep until ATA Status register bit BSY clears, or timeout
  2867. * occurs.
  2868. *
  2869. * LOCKING:
  2870. * Kernel thread context (may sleep).
  2871. *
  2872. * RETURNS:
  2873. * 0 on success, -errno otherwise.
  2874. */
  2875. int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
  2876. {
  2877. unsigned long start = jiffies;
  2878. int warned = 0;
  2879. while (1) {
  2880. u8 status = ata_chk_status(ap);
  2881. unsigned long now = jiffies;
  2882. if (!(status & ATA_BUSY))
  2883. return 0;
  2884. if (!ata_link_online(&ap->link) && status == 0xff)
  2885. return -ENODEV;
  2886. if (time_after(now, deadline))
  2887. return -EBUSY;
  2888. if (!warned && time_after(now, start + 5 * HZ) &&
  2889. (deadline - now > 3 * HZ)) {
  2890. ata_port_printk(ap, KERN_WARNING,
  2891. "port is slow to respond, please be patient "
  2892. "(Status 0x%x)\n", status);
  2893. warned = 1;
  2894. }
  2895. msleep(50);
  2896. }
  2897. }
  2898. static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
  2899. unsigned long deadline)
  2900. {
  2901. struct ata_ioports *ioaddr = &ap->ioaddr;
  2902. unsigned int dev0 = devmask & (1 << 0);
  2903. unsigned int dev1 = devmask & (1 << 1);
  2904. int rc, ret = 0;
  2905. /* if device 0 was found in ata_devchk, wait for its
  2906. * BSY bit to clear
  2907. */
  2908. if (dev0) {
  2909. rc = ata_wait_ready(ap, deadline);
  2910. if (rc) {
  2911. if (rc != -ENODEV)
  2912. return rc;
  2913. ret = rc;
  2914. }
  2915. }
  2916. /* if device 1 was found in ata_devchk, wait for register
  2917. * access briefly, then wait for BSY to clear.
  2918. */
  2919. if (dev1) {
  2920. int i;
  2921. ap->ops->dev_select(ap, 1);
  2922. /* Wait for register access. Some ATAPI devices fail
  2923. * to set nsect/lbal after reset, so don't waste too
  2924. * much time on it. We're gonna wait for !BSY anyway.
  2925. */
  2926. for (i = 0; i < 2; i++) {
  2927. u8 nsect, lbal;
  2928. nsect = ioread8(ioaddr->nsect_addr);
  2929. lbal = ioread8(ioaddr->lbal_addr);
  2930. if ((nsect == 1) && (lbal == 1))
  2931. break;
  2932. msleep(50); /* give drive a breather */
  2933. }
  2934. rc = ata_wait_ready(ap, deadline);
  2935. if (rc) {
  2936. if (rc != -ENODEV)
  2937. return rc;
  2938. ret = rc;
  2939. }
  2940. }
  2941. /* is all this really necessary? */
  2942. ap->ops->dev_select(ap, 0);
  2943. if (dev1)
  2944. ap->ops->dev_select(ap, 1);
  2945. if (dev0)
  2946. ap->ops->dev_select(ap, 0);
  2947. return ret;
  2948. }
  2949. static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
  2950. unsigned long deadline)
  2951. {
  2952. struct ata_ioports *ioaddr = &ap->ioaddr;
  2953. DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
  2954. /* software reset. causes dev0 to be selected */
  2955. iowrite8(ap->ctl, ioaddr->ctl_addr);
  2956. udelay(20); /* FIXME: flush */
  2957. iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  2958. udelay(20); /* FIXME: flush */
  2959. iowrite8(ap->ctl, ioaddr->ctl_addr);
  2960. /* wait a while before checking status */
  2961. ata_wait_after_reset(ap, deadline);
  2962. /* Before we perform post reset processing we want to see if
  2963. * the bus shows 0xFF because the odd clown forgets the D7
  2964. * pulldown resistor.
  2965. */
  2966. if (ata_chk_status(ap) == 0xFF)
  2967. return -ENODEV;
  2968. return ata_bus_post_reset(ap, devmask, deadline);
  2969. }
  2970. /**
  2971. * ata_bus_reset - reset host port and associated ATA channel
  2972. * @ap: port to reset
  2973. *
  2974. * This is typically the first time we actually start issuing
  2975. * commands to the ATA channel. We wait for BSY to clear, then
  2976. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  2977. * result. Determine what devices, if any, are on the channel
  2978. * by looking at the device 0/1 error register. Look at the signature
  2979. * stored in each device's taskfile registers, to determine if
  2980. * the device is ATA or ATAPI.
  2981. *
  2982. * LOCKING:
  2983. * PCI/etc. bus probe sem.
  2984. * Obtains host lock.
  2985. *
  2986. * SIDE EFFECTS:
  2987. * Sets ATA_FLAG_DISABLED if bus reset fails.
  2988. */
  2989. void ata_bus_reset(struct ata_port *ap)
  2990. {
  2991. struct ata_device *device = ap->link.device;
  2992. struct ata_ioports *ioaddr = &ap->ioaddr;
  2993. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2994. u8 err;
  2995. unsigned int dev0, dev1 = 0, devmask = 0;
  2996. int rc;
  2997. DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
  2998. /* determine if device 0/1 are present */
  2999. if (ap->flags & ATA_FLAG_SATA_RESET)
  3000. dev0 = 1;
  3001. else {
  3002. dev0 = ata_devchk(ap, 0);
  3003. if (slave_possible)
  3004. dev1 = ata_devchk(ap, 1);
  3005. }
  3006. if (dev0)
  3007. devmask |= (1 << 0);
  3008. if (dev1)
  3009. devmask |= (1 << 1);
  3010. /* select device 0 again */
  3011. ap->ops->dev_select(ap, 0);
  3012. /* issue bus reset */
  3013. if (ap->flags & ATA_FLAG_SRST) {
  3014. rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
  3015. if (rc && rc != -ENODEV)
  3016. goto err_out;
  3017. }
  3018. /*
  3019. * determine by signature whether we have ATA or ATAPI devices
  3020. */
  3021. device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
  3022. if ((slave_possible) && (err != 0x81))
  3023. device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
  3024. /* is double-select really necessary? */
  3025. if (device[1].class != ATA_DEV_NONE)
  3026. ap->ops->dev_select(ap, 1);
  3027. if (device[0].class != ATA_DEV_NONE)
  3028. ap->ops->dev_select(ap, 0);
  3029. /* if no devices were detected, disable this port */
  3030. if ((device[0].class == ATA_DEV_NONE) &&
  3031. (device[1].class == ATA_DEV_NONE))
  3032. goto err_out;
  3033. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  3034. /* set up device control for ATA_FLAG_SATA_RESET */
  3035. iowrite8(ap->ctl, ioaddr->ctl_addr);
  3036. }
  3037. DPRINTK("EXIT\n");
  3038. return;
  3039. err_out:
  3040. ata_port_printk(ap, KERN_ERR, "disabling port\n");
  3041. ata_port_disable(ap);
  3042. DPRINTK("EXIT\n");
  3043. }
  3044. /**
  3045. * sata_link_debounce - debounce SATA phy status
  3046. * @link: ATA link to debounce SATA phy status for
  3047. * @params: timing parameters { interval, duratinon, timeout } in msec
  3048. * @deadline: deadline jiffies for the operation
  3049. *
  3050. * Make sure SStatus of @link reaches stable state, determined by
  3051. * holding the same value where DET is not 1 for @duration polled
  3052. * every @interval, before @timeout. Timeout constraints the
  3053. * beginning of the stable state. Because DET gets stuck at 1 on
  3054. * some controllers after hot unplugging, this functions waits
  3055. * until timeout then returns 0 if DET is stable at 1.
  3056. *
  3057. * @timeout is further limited by @deadline. The sooner of the
  3058. * two is used.
  3059. *
  3060. * LOCKING:
  3061. * Kernel thread context (may sleep)
  3062. *
  3063. * RETURNS:
  3064. * 0 on success, -errno on failure.
  3065. */
  3066. int sata_link_debounce(struct ata_link *link, const unsigned long *params,
  3067. unsigned long deadline)
  3068. {
  3069. unsigned long interval_msec = params[0];
  3070. unsigned long duration = msecs_to_jiffies(params[1]);
  3071. unsigned long last_jiffies, t;
  3072. u32 last, cur;
  3073. int rc;
  3074. t = jiffies + msecs_to_jiffies(params[2]);
  3075. if (time_before(t, deadline))
  3076. deadline = t;
  3077. if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
  3078. return rc;
  3079. cur &= 0xf;
  3080. last = cur;
  3081. last_jiffies = jiffies;
  3082. while (1) {
  3083. msleep(interval_msec);
  3084. if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
  3085. return rc;
  3086. cur &= 0xf;
  3087. /* DET stable? */
  3088. if (cur == last) {
  3089. if (cur == 1 && time_before(jiffies, deadline))
  3090. continue;
  3091. if (time_after(jiffies, last_jiffies + duration))
  3092. return 0;
  3093. continue;
  3094. }
  3095. /* unstable, start over */
  3096. last = cur;
  3097. last_jiffies = jiffies;
  3098. /* Check deadline. If debouncing failed, return
  3099. * -EPIPE to tell upper layer to lower link speed.
  3100. */
  3101. if (time_after(jiffies, deadline))
  3102. return -EPIPE;
  3103. }
  3104. }
  3105. /**
  3106. * sata_link_resume - resume SATA link
  3107. * @link: ATA link to resume SATA
  3108. * @params: timing parameters { interval, duratinon, timeout } in msec
  3109. * @deadline: deadline jiffies for the operation
  3110. *
  3111. * Resume SATA phy @link and debounce it.
  3112. *
  3113. * LOCKING:
  3114. * Kernel thread context (may sleep)
  3115. *
  3116. * RETURNS:
  3117. * 0 on success, -errno on failure.
  3118. */
  3119. int sata_link_resume(struct ata_link *link, const unsigned long *params,
  3120. unsigned long deadline)
  3121. {
  3122. u32 scontrol;
  3123. int rc;
  3124. if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
  3125. return rc;
  3126. scontrol = (scontrol & 0x0f0) | 0x300;
  3127. if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
  3128. return rc;
  3129. /* Some PHYs react badly if SStatus is pounded immediately
  3130. * after resuming. Delay 200ms before debouncing.
  3131. */
  3132. msleep(200);
  3133. return sata_link_debounce(link, params, deadline);
  3134. }
  3135. /**
  3136. * ata_std_prereset - prepare for reset
  3137. * @link: ATA link to be reset
  3138. * @deadline: deadline jiffies for the operation
  3139. *
  3140. * @link is about to be reset. Initialize it. Failure from
  3141. * prereset makes libata abort whole reset sequence and give up
  3142. * that port, so prereset should be best-effort. It does its
  3143. * best to prepare for reset sequence but if things go wrong, it
  3144. * should just whine, not fail.
  3145. *
  3146. * LOCKING:
  3147. * Kernel thread context (may sleep)
  3148. *
  3149. * RETURNS:
  3150. * 0 on success, -errno otherwise.
  3151. */
  3152. int ata_std_prereset(struct ata_link *link, unsigned long deadline)
  3153. {
  3154. struct ata_port *ap = link->ap;
  3155. struct ata_eh_context *ehc = &link->eh_context;
  3156. const unsigned long *timing = sata_ehc_deb_timing(ehc);
  3157. int rc;
  3158. /* handle link resume */
  3159. if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
  3160. (link->flags & ATA_LFLAG_HRST_TO_RESUME))
  3161. ehc->i.action |= ATA_EH_HARDRESET;
  3162. /* Some PMPs don't work with only SRST, force hardreset if PMP
  3163. * is supported.
  3164. */
  3165. if (ap->flags & ATA_FLAG_PMP)
  3166. ehc->i.action |= ATA_EH_HARDRESET;
  3167. /* if we're about to do hardreset, nothing more to do */
  3168. if (ehc->i.action & ATA_EH_HARDRESET)
  3169. return 0;
  3170. /* if SATA, resume link */
  3171. if (ap->flags & ATA_FLAG_SATA) {
  3172. rc = sata_link_resume(link, timing, deadline);
  3173. /* whine about phy resume failure but proceed */
  3174. if (rc && rc != -EOPNOTSUPP)
  3175. ata_link_printk(link, KERN_WARNING, "failed to resume "
  3176. "link for reset (errno=%d)\n", rc);
  3177. }
  3178. /* Wait for !BSY if the controller can wait for the first D2H
  3179. * Reg FIS and we don't know that no device is attached.
  3180. */
  3181. if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
  3182. rc = ata_wait_ready(ap, deadline);
  3183. if (rc && rc != -ENODEV) {
  3184. ata_link_printk(link, KERN_WARNING, "device not ready "
  3185. "(errno=%d), forcing hardreset\n", rc);
  3186. ehc->i.action |= ATA_EH_HARDRESET;
  3187. }
  3188. }
  3189. return 0;
  3190. }
  3191. /**
  3192. * ata_std_softreset - reset host port via ATA SRST
  3193. * @link: ATA link to reset
  3194. * @classes: resulting classes of attached devices
  3195. * @deadline: deadline jiffies for the operation
  3196. *
  3197. * Reset host port using ATA SRST.
  3198. *
  3199. * LOCKING:
  3200. * Kernel thread context (may sleep)
  3201. *
  3202. * RETURNS:
  3203. * 0 on success, -errno otherwise.
  3204. */
  3205. int ata_std_softreset(struct ata_link *link, unsigned int *classes,
  3206. unsigned long deadline)
  3207. {
  3208. struct ata_port *ap = link->ap;
  3209. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  3210. unsigned int devmask = 0;
  3211. int rc;
  3212. u8 err;
  3213. DPRINTK("ENTER\n");
  3214. if (ata_link_offline(link)) {
  3215. classes[0] = ATA_DEV_NONE;
  3216. goto out;
  3217. }
  3218. /* determine if device 0/1 are present */
  3219. if (ata_devchk(ap, 0))
  3220. devmask |= (1 << 0);
  3221. if (slave_possible && ata_devchk(ap, 1))
  3222. devmask |= (1 << 1);
  3223. /* select device 0 again */
  3224. ap->ops->dev_select(ap, 0);
  3225. /* issue bus reset */
  3226. DPRINTK("about to softreset, devmask=%x\n", devmask);
  3227. rc = ata_bus_softreset(ap, devmask, deadline);
  3228. /* if link is occupied, -ENODEV too is an error */
  3229. if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
  3230. ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
  3231. return rc;
  3232. }
  3233. /* determine by signature whether we have ATA or ATAPI devices */
  3234. classes[0] = ata_dev_try_classify(&link->device[0],
  3235. devmask & (1 << 0), &err);
  3236. if (slave_possible && err != 0x81)
  3237. classes[1] = ata_dev_try_classify(&link->device[1],
  3238. devmask & (1 << 1), &err);
  3239. out:
  3240. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  3241. return 0;
  3242. }
  3243. /**
  3244. * sata_link_hardreset - reset link via SATA phy reset
  3245. * @link: link to reset
  3246. * @timing: timing parameters { interval, duratinon, timeout } in msec
  3247. * @deadline: deadline jiffies for the operation
  3248. *
  3249. * SATA phy-reset @link using DET bits of SControl register.
  3250. *
  3251. * LOCKING:
  3252. * Kernel thread context (may sleep)
  3253. *
  3254. * RETURNS:
  3255. * 0 on success, -errno otherwise.
  3256. */
  3257. int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
  3258. unsigned long deadline)
  3259. {
  3260. u32 scontrol;
  3261. int rc;
  3262. DPRINTK("ENTER\n");
  3263. if (sata_set_spd_needed(link)) {
  3264. /* SATA spec says nothing about how to reconfigure
  3265. * spd. To be on the safe side, turn off phy during
  3266. * reconfiguration. This works for at least ICH7 AHCI
  3267. * and Sil3124.
  3268. */
  3269. if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
  3270. goto out;
  3271. scontrol = (scontrol & 0x0f0) | 0x304;
  3272. if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
  3273. goto out;
  3274. sata_set_spd(link);
  3275. }
  3276. /* issue phy wake/reset */
  3277. if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
  3278. goto out;
  3279. scontrol = (scontrol & 0x0f0) | 0x301;
  3280. if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
  3281. goto out;
  3282. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  3283. * 10.4.2 says at least 1 ms.
  3284. */
  3285. msleep(1);
  3286. /* bring link back */
  3287. rc = sata_link_resume(link, timing, deadline);
  3288. out:
  3289. DPRINTK("EXIT, rc=%d\n", rc);
  3290. return rc;
  3291. }
  3292. /**
  3293. * sata_std_hardreset - reset host port via SATA phy reset
  3294. * @link: link to reset
  3295. * @class: resulting class of attached device
  3296. * @deadline: deadline jiffies for the operation
  3297. *
  3298. * SATA phy-reset host port using DET bits of SControl register,
  3299. * wait for !BSY and classify the attached device.
  3300. *
  3301. * LOCKING:
  3302. * Kernel thread context (may sleep)
  3303. *
  3304. * RETURNS:
  3305. * 0 on success, -errno otherwise.
  3306. */
  3307. int sata_std_hardreset(struct ata_link *link, unsigned int *class,
  3308. unsigned long deadline)
  3309. {
  3310. struct ata_port *ap = link->ap;
  3311. const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
  3312. int rc;
  3313. DPRINTK("ENTER\n");
  3314. /* do hardreset */
  3315. rc = sata_link_hardreset(link, timing, deadline);
  3316. if (rc) {
  3317. ata_link_printk(link, KERN_ERR,
  3318. "COMRESET failed (errno=%d)\n", rc);
  3319. return rc;
  3320. }
  3321. /* TODO: phy layer with polling, timeouts, etc. */
  3322. if (ata_link_offline(link)) {
  3323. *class = ATA_DEV_NONE;
  3324. DPRINTK("EXIT, link offline\n");
  3325. return 0;
  3326. }
  3327. /* wait a while before checking status */
  3328. ata_wait_after_reset(ap, deadline);
  3329. /* If PMP is supported, we have to do follow-up SRST. Note
  3330. * that some PMPs don't send D2H Reg FIS after hardreset at
  3331. * all if the first port is empty. Wait for it just for a
  3332. * second and request follow-up SRST.
  3333. */
  3334. if (ap->flags & ATA_FLAG_PMP) {
  3335. ata_wait_ready(ap, jiffies + HZ);
  3336. return -EAGAIN;
  3337. }
  3338. rc = ata_wait_ready(ap, deadline);
  3339. /* link occupied, -ENODEV too is an error */
  3340. if (rc) {
  3341. ata_link_printk(link, KERN_ERR,
  3342. "COMRESET failed (errno=%d)\n", rc);
  3343. return rc;
  3344. }
  3345. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  3346. *class = ata_dev_try_classify(link->device, 1, NULL);
  3347. DPRINTK("EXIT, class=%u\n", *class);
  3348. return 0;
  3349. }
  3350. /**
  3351. * ata_std_postreset - standard postreset callback
  3352. * @link: the target ata_link
  3353. * @classes: classes of attached devices
  3354. *
  3355. * This function is invoked after a successful reset. Note that
  3356. * the device might have been reset more than once using
  3357. * different reset methods before postreset is invoked.
  3358. *
  3359. * LOCKING:
  3360. * Kernel thread context (may sleep)
  3361. */
  3362. void ata_std_postreset(struct ata_link *link, unsigned int *classes)
  3363. {
  3364. struct ata_port *ap = link->ap;
  3365. u32 serror;
  3366. DPRINTK("ENTER\n");
  3367. /* print link status */
  3368. sata_print_link_status(link);
  3369. /* clear SError */
  3370. if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
  3371. sata_scr_write(link, SCR_ERROR, serror);
  3372. /* is double-select really necessary? */
  3373. if (classes[0] != ATA_DEV_NONE)
  3374. ap->ops->dev_select(ap, 1);
  3375. if (classes[1] != ATA_DEV_NONE)
  3376. ap->ops->dev_select(ap, 0);
  3377. /* bail out if no device is present */
  3378. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  3379. DPRINTK("EXIT, no device\n");
  3380. return;
  3381. }
  3382. /* set up device control */
  3383. if (ap->ioaddr.ctl_addr)
  3384. iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
  3385. DPRINTK("EXIT\n");
  3386. }
  3387. /**
  3388. * ata_dev_same_device - Determine whether new ID matches configured device
  3389. * @dev: device to compare against
  3390. * @new_class: class of the new device
  3391. * @new_id: IDENTIFY page of the new device
  3392. *
  3393. * Compare @new_class and @new_id against @dev and determine
  3394. * whether @dev is the device indicated by @new_class and
  3395. * @new_id.
  3396. *
  3397. * LOCKING:
  3398. * None.
  3399. *
  3400. * RETURNS:
  3401. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  3402. */
  3403. static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
  3404. const u16 *new_id)
  3405. {
  3406. const u16 *old_id = dev->id;
  3407. unsigned char model[2][ATA_ID_PROD_LEN + 1];
  3408. unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
  3409. if (dev->class != new_class) {
  3410. ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
  3411. dev->class, new_class);
  3412. return 0;
  3413. }
  3414. ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
  3415. ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
  3416. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
  3417. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
  3418. if (strcmp(model[0], model[1])) {
  3419. ata_dev_printk(dev, KERN_INFO, "model number mismatch "
  3420. "'%s' != '%s'\n", model[0], model[1]);
  3421. return 0;
  3422. }
  3423. if (strcmp(serial[0], serial[1])) {
  3424. ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
  3425. "'%s' != '%s'\n", serial[0], serial[1]);
  3426. return 0;
  3427. }
  3428. return 1;
  3429. }
  3430. /**
  3431. * ata_dev_reread_id - Re-read IDENTIFY data
  3432. * @dev: target ATA device
  3433. * @readid_flags: read ID flags
  3434. *
  3435. * Re-read IDENTIFY page and make sure @dev is still attached to
  3436. * the port.
  3437. *
  3438. * LOCKING:
  3439. * Kernel thread context (may sleep)
  3440. *
  3441. * RETURNS:
  3442. * 0 on success, negative errno otherwise
  3443. */
  3444. int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
  3445. {
  3446. unsigned int class = dev->class;
  3447. u16 *id = (void *)dev->link->ap->sector_buf;
  3448. int rc;
  3449. /* read ID data */
  3450. rc = ata_dev_read_id(dev, &class, readid_flags, id);
  3451. if (rc)
  3452. return rc;
  3453. /* is the device still there? */
  3454. if (!ata_dev_same_device(dev, class, id))
  3455. return -ENODEV;
  3456. memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
  3457. return 0;
  3458. }
  3459. /**
  3460. * ata_dev_revalidate - Revalidate ATA device
  3461. * @dev: device to revalidate
  3462. * @new_class: new class code
  3463. * @readid_flags: read ID flags
  3464. *
  3465. * Re-read IDENTIFY page, make sure @dev is still attached to the
  3466. * port and reconfigure it according to the new IDENTIFY page.
  3467. *
  3468. * LOCKING:
  3469. * Kernel thread context (may sleep)
  3470. *
  3471. * RETURNS:
  3472. * 0 on success, negative errno otherwise
  3473. */
  3474. int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
  3475. unsigned int readid_flags)
  3476. {
  3477. u64 n_sectors = dev->n_sectors;
  3478. int rc;
  3479. if (!ata_dev_enabled(dev))
  3480. return -ENODEV;
  3481. /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
  3482. if (ata_class_enabled(new_class) &&
  3483. new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
  3484. ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
  3485. dev->class, new_class);
  3486. rc = -ENODEV;
  3487. goto fail;
  3488. }
  3489. /* re-read ID */
  3490. rc = ata_dev_reread_id(dev, readid_flags);
  3491. if (rc)
  3492. goto fail;
  3493. /* configure device according to the new ID */
  3494. rc = ata_dev_configure(dev);
  3495. if (rc)
  3496. goto fail;
  3497. /* verify n_sectors hasn't changed */
  3498. if (dev->class == ATA_DEV_ATA && n_sectors &&
  3499. dev->n_sectors != n_sectors) {
  3500. ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
  3501. "%llu != %llu\n",
  3502. (unsigned long long)n_sectors,
  3503. (unsigned long long)dev->n_sectors);
  3504. /* restore original n_sectors */
  3505. dev->n_sectors = n_sectors;
  3506. rc = -ENODEV;
  3507. goto fail;
  3508. }
  3509. return 0;
  3510. fail:
  3511. ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
  3512. return rc;
  3513. }
  3514. struct ata_blacklist_entry {
  3515. const char *model_num;
  3516. const char *model_rev;
  3517. unsigned long horkage;
  3518. };
  3519. static const struct ata_blacklist_entry ata_device_blacklist [] = {
  3520. /* Devices with DMA related problems under Linux */
  3521. { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
  3522. { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
  3523. { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
  3524. { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
  3525. { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
  3526. { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
  3527. { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
  3528. { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
  3529. { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
  3530. { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
  3531. { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
  3532. { "CRD-84", NULL, ATA_HORKAGE_NODMA },
  3533. { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
  3534. { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
  3535. { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
  3536. { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
  3537. { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
  3538. { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
  3539. { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
  3540. { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
  3541. { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
  3542. { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
  3543. { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
  3544. { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
  3545. { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
  3546. { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
  3547. { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
  3548. { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
  3549. { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
  3550. { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
  3551. /* Odd clown on sil3726/4726 PMPs */
  3552. { "Config Disk", NULL, ATA_HORKAGE_NODMA |
  3553. ATA_HORKAGE_SKIP_PM },
  3554. /* Weird ATAPI devices */
  3555. { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
  3556. /* Devices we expect to fail diagnostics */
  3557. /* Devices where NCQ should be avoided */
  3558. /* NCQ is slow */
  3559. { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
  3560. /* http://thread.gmane.org/gmane.linux.ide/14907 */
  3561. { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
  3562. /* NCQ is broken */
  3563. { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
  3564. { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
  3565. { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ },
  3566. { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ },
  3567. { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
  3568. /* Blacklist entries taken from Silicon Image 3124/3132
  3569. Windows driver .inf file - also several Linux problem reports */
  3570. { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
  3571. { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
  3572. { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
  3573. /* Drives which do spurious command completion */
  3574. { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
  3575. { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
  3576. { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, },
  3577. { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
  3578. { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, },
  3579. { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
  3580. { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, },
  3581. { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
  3582. { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, },
  3583. { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
  3584. { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, },
  3585. { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, },
  3586. { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, },
  3587. { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, },
  3588. { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
  3589. { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, },
  3590. /* devices which puke on READ_NATIVE_MAX */
  3591. { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
  3592. { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
  3593. { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
  3594. { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
  3595. /* Devices which report 1 sector over size HPA */
  3596. { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
  3597. { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
  3598. /* Devices which get the IVB wrong */
  3599. { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
  3600. { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, },
  3601. /* End Marker */
  3602. { }
  3603. };
  3604. static int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
  3605. {
  3606. const char *p;
  3607. int len;
  3608. /*
  3609. * check for trailing wildcard: *\0
  3610. */
  3611. p = strchr(patt, wildchar);
  3612. if (p && ((*(p + 1)) == 0))
  3613. len = p - patt;
  3614. else {
  3615. len = strlen(name);
  3616. if (!len) {
  3617. if (!*patt)
  3618. return 0;
  3619. return -1;
  3620. }
  3621. }
  3622. return strncmp(patt, name, len);
  3623. }
  3624. static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
  3625. {
  3626. unsigned char model_num[ATA_ID_PROD_LEN + 1];
  3627. unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
  3628. const struct ata_blacklist_entry *ad = ata_device_blacklist;
  3629. ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
  3630. ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
  3631. while (ad->model_num) {
  3632. if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
  3633. if (ad->model_rev == NULL)
  3634. return ad->horkage;
  3635. if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
  3636. return ad->horkage;
  3637. }
  3638. ad++;
  3639. }
  3640. return 0;
  3641. }
  3642. static int ata_dma_blacklisted(const struct ata_device *dev)
  3643. {
  3644. /* We don't support polling DMA.
  3645. * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
  3646. * if the LLDD handles only interrupts in the HSM_ST_LAST state.
  3647. */
  3648. if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
  3649. (dev->flags & ATA_DFLAG_CDB_INTR))
  3650. return 1;
  3651. return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
  3652. }
  3653. /**
  3654. * ata_is_40wire - check drive side detection
  3655. * @dev: device
  3656. *
  3657. * Perform drive side detection decoding, allowing for device vendors
  3658. * who can't follow the documentation.
  3659. */
  3660. static int ata_is_40wire(struct ata_device *dev)
  3661. {
  3662. if (dev->horkage & ATA_HORKAGE_IVB)
  3663. return ata_drive_40wire_relaxed(dev->id);
  3664. return ata_drive_40wire(dev->id);
  3665. }
  3666. /**
  3667. * ata_dev_xfermask - Compute supported xfermask of the given device
  3668. * @dev: Device to compute xfermask for
  3669. *
  3670. * Compute supported xfermask of @dev and store it in
  3671. * dev->*_mask. This function is responsible for applying all
  3672. * known limits including host controller limits, device
  3673. * blacklist, etc...
  3674. *
  3675. * LOCKING:
  3676. * None.
  3677. */
  3678. static void ata_dev_xfermask(struct ata_device *dev)
  3679. {
  3680. struct ata_link *link = dev->link;
  3681. struct ata_port *ap = link->ap;
  3682. struct ata_host *host = ap->host;
  3683. unsigned long xfer_mask;
  3684. /* controller modes available */
  3685. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  3686. ap->mwdma_mask, ap->udma_mask);
  3687. /* drive modes available */
  3688. xfer_mask &= ata_pack_xfermask(dev->pio_mask,
  3689. dev->mwdma_mask, dev->udma_mask);
  3690. xfer_mask &= ata_id_xfermask(dev->id);
  3691. /*
  3692. * CFA Advanced TrueIDE timings are not allowed on a shared
  3693. * cable
  3694. */
  3695. if (ata_dev_pair(dev)) {
  3696. /* No PIO5 or PIO6 */
  3697. xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
  3698. /* No MWDMA3 or MWDMA 4 */
  3699. xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
  3700. }
  3701. if (ata_dma_blacklisted(dev)) {
  3702. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  3703. ata_dev_printk(dev, KERN_WARNING,
  3704. "device is on DMA blacklist, disabling DMA\n");
  3705. }
  3706. if ((host->flags & ATA_HOST_SIMPLEX) &&
  3707. host->simplex_claimed && host->simplex_claimed != ap) {
  3708. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  3709. ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
  3710. "other device, disabling DMA\n");
  3711. }
  3712. if (ap->flags & ATA_FLAG_NO_IORDY)
  3713. xfer_mask &= ata_pio_mask_no_iordy(dev);
  3714. if (ap->ops->mode_filter)
  3715. xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
  3716. /* Apply cable rule here. Don't apply it early because when
  3717. * we handle hot plug the cable type can itself change.
  3718. * Check this last so that we know if the transfer rate was
  3719. * solely limited by the cable.
  3720. * Unknown or 80 wire cables reported host side are checked
  3721. * drive side as well. Cases where we know a 40wire cable
  3722. * is used safely for 80 are not checked here.
  3723. */
  3724. if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
  3725. /* UDMA/44 or higher would be available */
  3726. if ((ap->cbl == ATA_CBL_PATA40) ||
  3727. (ata_is_40wire(dev) &&
  3728. (ap->cbl == ATA_CBL_PATA_UNK ||
  3729. ap->cbl == ATA_CBL_PATA80))) {
  3730. ata_dev_printk(dev, KERN_WARNING,
  3731. "limited to UDMA/33 due to 40-wire cable\n");
  3732. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  3733. }
  3734. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  3735. &dev->mwdma_mask, &dev->udma_mask);
  3736. }
  3737. /**
  3738. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  3739. * @dev: Device to which command will be sent
  3740. *
  3741. * Issue SET FEATURES - XFER MODE command to device @dev
  3742. * on port @ap.
  3743. *
  3744. * LOCKING:
  3745. * PCI/etc. bus probe sem.
  3746. *
  3747. * RETURNS:
  3748. * 0 on success, AC_ERR_* mask otherwise.
  3749. */
  3750. static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
  3751. {
  3752. struct ata_taskfile tf;
  3753. unsigned int err_mask;
  3754. /* set up set-features taskfile */
  3755. DPRINTK("set features - xfer mode\n");
  3756. /* Some controllers and ATAPI devices show flaky interrupt
  3757. * behavior after setting xfer mode. Use polling instead.
  3758. */
  3759. ata_tf_init(dev, &tf);
  3760. tf.command = ATA_CMD_SET_FEATURES;
  3761. tf.feature = SETFEATURES_XFER;
  3762. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
  3763. tf.protocol = ATA_PROT_NODATA;
  3764. tf.nsect = dev->xfer_mode;
  3765. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  3766. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  3767. return err_mask;
  3768. }
  3769. /**
  3770. * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
  3771. * @dev: Device to which command will be sent
  3772. * @enable: Whether to enable or disable the feature
  3773. * @feature: The sector count represents the feature to set
  3774. *
  3775. * Issue SET FEATURES - SATA FEATURES command to device @dev
  3776. * on port @ap with sector count
  3777. *
  3778. * LOCKING:
  3779. * PCI/etc. bus probe sem.
  3780. *
  3781. * RETURNS:
  3782. * 0 on success, AC_ERR_* mask otherwise.
  3783. */
  3784. static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable,
  3785. u8 feature)
  3786. {
  3787. struct ata_taskfile tf;
  3788. unsigned int err_mask;
  3789. /* set up set-features taskfile */
  3790. DPRINTK("set features - SATA features\n");
  3791. ata_tf_init(dev, &tf);
  3792. tf.command = ATA_CMD_SET_FEATURES;
  3793. tf.feature = enable;
  3794. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  3795. tf.protocol = ATA_PROT_NODATA;
  3796. tf.nsect = feature;
  3797. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  3798. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  3799. return err_mask;
  3800. }
  3801. /**
  3802. * ata_dev_init_params - Issue INIT DEV PARAMS command
  3803. * @dev: Device to which command will be sent
  3804. * @heads: Number of heads (taskfile parameter)
  3805. * @sectors: Number of sectors (taskfile parameter)
  3806. *
  3807. * LOCKING:
  3808. * Kernel thread context (may sleep)
  3809. *
  3810. * RETURNS:
  3811. * 0 on success, AC_ERR_* mask otherwise.
  3812. */
  3813. static unsigned int ata_dev_init_params(struct ata_device *dev,
  3814. u16 heads, u16 sectors)
  3815. {
  3816. struct ata_taskfile tf;
  3817. unsigned int err_mask;
  3818. /* Number of sectors per track 1-255. Number of heads 1-16 */
  3819. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  3820. return AC_ERR_INVALID;
  3821. /* set up init dev params taskfile */
  3822. DPRINTK("init dev params \n");
  3823. ata_tf_init(dev, &tf);
  3824. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  3825. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  3826. tf.protocol = ATA_PROT_NODATA;
  3827. tf.nsect = sectors;
  3828. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  3829. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
  3830. /* A clean abort indicates an original or just out of spec drive
  3831. and we should continue as we issue the setup based on the
  3832. drive reported working geometry */
  3833. if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
  3834. err_mask = 0;
  3835. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  3836. return err_mask;
  3837. }
  3838. /**
  3839. * ata_sg_clean - Unmap DMA memory associated with command
  3840. * @qc: Command containing DMA memory to be released
  3841. *
  3842. * Unmap all mapped DMA memory associated with this command.
  3843. *
  3844. * LOCKING:
  3845. * spin_lock_irqsave(host lock)
  3846. */
  3847. void ata_sg_clean(struct ata_queued_cmd *qc)
  3848. {
  3849. struct ata_port *ap = qc->ap;
  3850. struct scatterlist *sg = qc->__sg;
  3851. int dir = qc->dma_dir;
  3852. void *pad_buf = NULL;
  3853. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  3854. WARN_ON(sg == NULL);
  3855. if (qc->flags & ATA_QCFLAG_SINGLE)
  3856. WARN_ON(qc->n_elem > 1);
  3857. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  3858. /* if we padded the buffer out to 32-bit bound, and data
  3859. * xfer direction is from-device, we must copy from the
  3860. * pad buffer back into the supplied buffer
  3861. */
  3862. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  3863. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  3864. if (qc->flags & ATA_QCFLAG_SG) {
  3865. if (qc->n_elem)
  3866. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  3867. /* restore last sg */
  3868. sg_last(sg, qc->orig_n_elem)->length += qc->pad_len;
  3869. if (pad_buf) {
  3870. struct scatterlist *psg = &qc->pad_sgent;
  3871. void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
  3872. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  3873. kunmap_atomic(addr, KM_IRQ0);
  3874. }
  3875. } else {
  3876. if (qc->n_elem)
  3877. dma_unmap_single(ap->dev,
  3878. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  3879. dir);
  3880. /* restore sg */
  3881. sg->length += qc->pad_len;
  3882. if (pad_buf)
  3883. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  3884. pad_buf, qc->pad_len);
  3885. }
  3886. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3887. qc->__sg = NULL;
  3888. }
  3889. /**
  3890. * ata_fill_sg - Fill PCI IDE PRD table
  3891. * @qc: Metadata associated with taskfile to be transferred
  3892. *
  3893. * Fill PCI IDE PRD (scatter-gather) table with segments
  3894. * associated with the current disk command.
  3895. *
  3896. * LOCKING:
  3897. * spin_lock_irqsave(host lock)
  3898. *
  3899. */
  3900. static void ata_fill_sg(struct ata_queued_cmd *qc)
  3901. {
  3902. struct ata_port *ap = qc->ap;
  3903. struct scatterlist *sg;
  3904. unsigned int idx;
  3905. WARN_ON(qc->__sg == NULL);
  3906. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  3907. idx = 0;
  3908. ata_for_each_sg(sg, qc) {
  3909. u32 addr, offset;
  3910. u32 sg_len, len;
  3911. /* determine if physical DMA addr spans 64K boundary.
  3912. * Note h/w doesn't support 64-bit, so we unconditionally
  3913. * truncate dma_addr_t to u32.
  3914. */
  3915. addr = (u32) sg_dma_address(sg);
  3916. sg_len = sg_dma_len(sg);
  3917. while (sg_len) {
  3918. offset = addr & 0xffff;
  3919. len = sg_len;
  3920. if ((offset + sg_len) > 0x10000)
  3921. len = 0x10000 - offset;
  3922. ap->prd[idx].addr = cpu_to_le32(addr);
  3923. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  3924. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  3925. idx++;
  3926. sg_len -= len;
  3927. addr += len;
  3928. }
  3929. }
  3930. if (idx)
  3931. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  3932. }
  3933. /**
  3934. * ata_fill_sg_dumb - Fill PCI IDE PRD table
  3935. * @qc: Metadata associated with taskfile to be transferred
  3936. *
  3937. * Fill PCI IDE PRD (scatter-gather) table with segments
  3938. * associated with the current disk command. Perform the fill
  3939. * so that we avoid writing any length 64K records for
  3940. * controllers that don't follow the spec.
  3941. *
  3942. * LOCKING:
  3943. * spin_lock_irqsave(host lock)
  3944. *
  3945. */
  3946. static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
  3947. {
  3948. struct ata_port *ap = qc->ap;
  3949. struct scatterlist *sg;
  3950. unsigned int idx;
  3951. WARN_ON(qc->__sg == NULL);
  3952. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  3953. idx = 0;
  3954. ata_for_each_sg(sg, qc) {
  3955. u32 addr, offset;
  3956. u32 sg_len, len, blen;
  3957. /* determine if physical DMA addr spans 64K boundary.
  3958. * Note h/w doesn't support 64-bit, so we unconditionally
  3959. * truncate dma_addr_t to u32.
  3960. */
  3961. addr = (u32) sg_dma_address(sg);
  3962. sg_len = sg_dma_len(sg);
  3963. while (sg_len) {
  3964. offset = addr & 0xffff;
  3965. len = sg_len;
  3966. if ((offset + sg_len) > 0x10000)
  3967. len = 0x10000 - offset;
  3968. blen = len & 0xffff;
  3969. ap->prd[idx].addr = cpu_to_le32(addr);
  3970. if (blen == 0) {
  3971. /* Some PATA chipsets like the CS5530 can't
  3972. cope with 0x0000 meaning 64K as the spec says */
  3973. ap->prd[idx].flags_len = cpu_to_le32(0x8000);
  3974. blen = 0x8000;
  3975. ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
  3976. }
  3977. ap->prd[idx].flags_len = cpu_to_le32(blen);
  3978. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  3979. idx++;
  3980. sg_len -= len;
  3981. addr += len;
  3982. }
  3983. }
  3984. if (idx)
  3985. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  3986. }
  3987. /**
  3988. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  3989. * @qc: Metadata associated with taskfile to check
  3990. *
  3991. * Allow low-level driver to filter ATA PACKET commands, returning
  3992. * a status indicating whether or not it is OK to use DMA for the
  3993. * supplied PACKET command.
  3994. *
  3995. * LOCKING:
  3996. * spin_lock_irqsave(host lock)
  3997. *
  3998. * RETURNS: 0 when ATAPI DMA can be used
  3999. * nonzero otherwise
  4000. */
  4001. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  4002. {
  4003. struct ata_port *ap = qc->ap;
  4004. /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
  4005. * few ATAPI devices choke on such DMA requests.
  4006. */
  4007. if (unlikely(qc->nbytes & 15))
  4008. return 1;
  4009. if (ap->ops->check_atapi_dma)
  4010. return ap->ops->check_atapi_dma(qc);
  4011. return 0;
  4012. }
  4013. /**
  4014. * ata_std_qc_defer - Check whether a qc needs to be deferred
  4015. * @qc: ATA command in question
  4016. *
  4017. * Non-NCQ commands cannot run with any other command, NCQ or
  4018. * not. As upper layer only knows the queue depth, we are
  4019. * responsible for maintaining exclusion. This function checks
  4020. * whether a new command @qc can be issued.
  4021. *
  4022. * LOCKING:
  4023. * spin_lock_irqsave(host lock)
  4024. *
  4025. * RETURNS:
  4026. * ATA_DEFER_* if deferring is needed, 0 otherwise.
  4027. */
  4028. int ata_std_qc_defer(struct ata_queued_cmd *qc)
  4029. {
  4030. struct ata_link *link = qc->dev->link;
  4031. if (qc->tf.protocol == ATA_PROT_NCQ) {
  4032. if (!ata_tag_valid(link->active_tag))
  4033. return 0;
  4034. } else {
  4035. if (!ata_tag_valid(link->active_tag) && !link->sactive)
  4036. return 0;
  4037. }
  4038. return ATA_DEFER_LINK;
  4039. }
  4040. /**
  4041. * ata_qc_prep - Prepare taskfile for submission
  4042. * @qc: Metadata associated with taskfile to be prepared
  4043. *
  4044. * Prepare ATA taskfile for submission.
  4045. *
  4046. * LOCKING:
  4047. * spin_lock_irqsave(host lock)
  4048. */
  4049. void ata_qc_prep(struct ata_queued_cmd *qc)
  4050. {
  4051. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  4052. return;
  4053. ata_fill_sg(qc);
  4054. }
  4055. /**
  4056. * ata_dumb_qc_prep - Prepare taskfile for submission
  4057. * @qc: Metadata associated with taskfile to be prepared
  4058. *
  4059. * Prepare ATA taskfile for submission.
  4060. *
  4061. * LOCKING:
  4062. * spin_lock_irqsave(host lock)
  4063. */
  4064. void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
  4065. {
  4066. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  4067. return;
  4068. ata_fill_sg_dumb(qc);
  4069. }
  4070. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  4071. /**
  4072. * ata_sg_init_one - Associate command with memory buffer
  4073. * @qc: Command to be associated
  4074. * @buf: Memory buffer
  4075. * @buflen: Length of memory buffer, in bytes.
  4076. *
  4077. * Initialize the data-related elements of queued_cmd @qc
  4078. * to point to a single memory buffer, @buf of byte length @buflen.
  4079. *
  4080. * LOCKING:
  4081. * spin_lock_irqsave(host lock)
  4082. */
  4083. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  4084. {
  4085. qc->flags |= ATA_QCFLAG_SINGLE;
  4086. qc->__sg = &qc->sgent;
  4087. qc->n_elem = 1;
  4088. qc->orig_n_elem = 1;
  4089. qc->buf_virt = buf;
  4090. qc->nbytes = buflen;
  4091. qc->cursg = qc->__sg;
  4092. sg_init_one(&qc->sgent, buf, buflen);
  4093. }
  4094. /**
  4095. * ata_sg_init - Associate command with scatter-gather table.
  4096. * @qc: Command to be associated
  4097. * @sg: Scatter-gather table.
  4098. * @n_elem: Number of elements in s/g table.
  4099. *
  4100. * Initialize the data-related elements of queued_cmd @qc
  4101. * to point to a scatter-gather table @sg, containing @n_elem
  4102. * elements.
  4103. *
  4104. * LOCKING:
  4105. * spin_lock_irqsave(host lock)
  4106. */
  4107. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  4108. unsigned int n_elem)
  4109. {
  4110. qc->flags |= ATA_QCFLAG_SG;
  4111. qc->__sg = sg;
  4112. qc->n_elem = n_elem;
  4113. qc->orig_n_elem = n_elem;
  4114. qc->cursg = qc->__sg;
  4115. }
  4116. /**
  4117. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  4118. * @qc: Command with memory buffer to be mapped.
  4119. *
  4120. * DMA-map the memory buffer associated with queued_cmd @qc.
  4121. *
  4122. * LOCKING:
  4123. * spin_lock_irqsave(host lock)
  4124. *
  4125. * RETURNS:
  4126. * Zero on success, negative on error.
  4127. */
  4128. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  4129. {
  4130. struct ata_port *ap = qc->ap;
  4131. int dir = qc->dma_dir;
  4132. struct scatterlist *sg = qc->__sg;
  4133. dma_addr_t dma_address;
  4134. int trim_sg = 0;
  4135. /* we must lengthen transfers to end on a 32-bit boundary */
  4136. qc->pad_len = sg->length & 3;
  4137. if (qc->pad_len) {
  4138. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  4139. struct scatterlist *psg = &qc->pad_sgent;
  4140. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  4141. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  4142. if (qc->tf.flags & ATA_TFLAG_WRITE)
  4143. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  4144. qc->pad_len);
  4145. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  4146. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  4147. /* trim sg */
  4148. sg->length -= qc->pad_len;
  4149. if (sg->length == 0)
  4150. trim_sg = 1;
  4151. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  4152. sg->length, qc->pad_len);
  4153. }
  4154. if (trim_sg) {
  4155. qc->n_elem--;
  4156. goto skip_map;
  4157. }
  4158. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  4159. sg->length, dir);
  4160. if (dma_mapping_error(dma_address)) {
  4161. /* restore sg */
  4162. sg->length += qc->pad_len;
  4163. return -1;
  4164. }
  4165. sg_dma_address(sg) = dma_address;
  4166. sg_dma_len(sg) = sg->length;
  4167. skip_map:
  4168. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  4169. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  4170. return 0;
  4171. }
  4172. /**
  4173. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  4174. * @qc: Command with scatter-gather table to be mapped.
  4175. *
  4176. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  4177. *
  4178. * LOCKING:
  4179. * spin_lock_irqsave(host lock)
  4180. *
  4181. * RETURNS:
  4182. * Zero on success, negative on error.
  4183. *
  4184. */
  4185. static int ata_sg_setup(struct ata_queued_cmd *qc)
  4186. {
  4187. struct ata_port *ap = qc->ap;
  4188. struct scatterlist *sg = qc->__sg;
  4189. struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
  4190. int n_elem, pre_n_elem, dir, trim_sg = 0;
  4191. VPRINTK("ENTER, ata%u\n", ap->print_id);
  4192. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  4193. /* we must lengthen transfers to end on a 32-bit boundary */
  4194. qc->pad_len = lsg->length & 3;
  4195. if (qc->pad_len) {
  4196. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  4197. struct scatterlist *psg = &qc->pad_sgent;
  4198. unsigned int offset;
  4199. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  4200. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  4201. /*
  4202. * psg->page/offset are used to copy to-be-written
  4203. * data in this function or read data in ata_sg_clean.
  4204. */
  4205. offset = lsg->offset + lsg->length - qc->pad_len;
  4206. sg_init_table(psg, 1);
  4207. sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT),
  4208. qc->pad_len, offset_in_page(offset));
  4209. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  4210. void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
  4211. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  4212. kunmap_atomic(addr, KM_IRQ0);
  4213. }
  4214. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  4215. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  4216. /* trim last sg */
  4217. lsg->length -= qc->pad_len;
  4218. if (lsg->length == 0)
  4219. trim_sg = 1;
  4220. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  4221. qc->n_elem - 1, lsg->length, qc->pad_len);
  4222. }
  4223. pre_n_elem = qc->n_elem;
  4224. if (trim_sg && pre_n_elem)
  4225. pre_n_elem--;
  4226. if (!pre_n_elem) {
  4227. n_elem = 0;
  4228. goto skip_map;
  4229. }
  4230. dir = qc->dma_dir;
  4231. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  4232. if (n_elem < 1) {
  4233. /* restore last sg */
  4234. lsg->length += qc->pad_len;
  4235. return -1;
  4236. }
  4237. DPRINTK("%d sg elements mapped\n", n_elem);
  4238. skip_map:
  4239. qc->n_elem = n_elem;
  4240. return 0;
  4241. }
  4242. /**
  4243. * swap_buf_le16 - swap halves of 16-bit words in place
  4244. * @buf: Buffer to swap
  4245. * @buf_words: Number of 16-bit words in buffer.
  4246. *
  4247. * Swap halves of 16-bit words if needed to convert from
  4248. * little-endian byte order to native cpu byte order, or
  4249. * vice-versa.
  4250. *
  4251. * LOCKING:
  4252. * Inherited from caller.
  4253. */
  4254. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  4255. {
  4256. #ifdef __BIG_ENDIAN
  4257. unsigned int i;
  4258. for (i = 0; i < buf_words; i++)
  4259. buf[i] = le16_to_cpu(buf[i]);
  4260. #endif /* __BIG_ENDIAN */
  4261. }
  4262. /**
  4263. * ata_data_xfer - Transfer data by PIO
  4264. * @adev: device to target
  4265. * @buf: data buffer
  4266. * @buflen: buffer length
  4267. * @write_data: read/write
  4268. *
  4269. * Transfer data from/to the device data register by PIO.
  4270. *
  4271. * LOCKING:
  4272. * Inherited from caller.
  4273. */
  4274. void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
  4275. unsigned int buflen, int write_data)
  4276. {
  4277. struct ata_port *ap = adev->link->ap;
  4278. unsigned int words = buflen >> 1;
  4279. /* Transfer multiple of 2 bytes */
  4280. if (write_data)
  4281. iowrite16_rep(ap->ioaddr.data_addr, buf, words);
  4282. else
  4283. ioread16_rep(ap->ioaddr.data_addr, buf, words);
  4284. /* Transfer trailing 1 byte, if any. */
  4285. if (unlikely(buflen & 0x01)) {
  4286. u16 align_buf[1] = { 0 };
  4287. unsigned char *trailing_buf = buf + buflen - 1;
  4288. if (write_data) {
  4289. memcpy(align_buf, trailing_buf, 1);
  4290. iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  4291. } else {
  4292. align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
  4293. memcpy(trailing_buf, align_buf, 1);
  4294. }
  4295. }
  4296. }
  4297. /**
  4298. * ata_data_xfer_noirq - Transfer data by PIO
  4299. * @adev: device to target
  4300. * @buf: data buffer
  4301. * @buflen: buffer length
  4302. * @write_data: read/write
  4303. *
  4304. * Transfer data from/to the device data register by PIO. Do the
  4305. * transfer with interrupts disabled.
  4306. *
  4307. * LOCKING:
  4308. * Inherited from caller.
  4309. */
  4310. void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
  4311. unsigned int buflen, int write_data)
  4312. {
  4313. unsigned long flags;
  4314. local_irq_save(flags);
  4315. ata_data_xfer(adev, buf, buflen, write_data);
  4316. local_irq_restore(flags);
  4317. }
  4318. /**
  4319. * ata_pio_sector - Transfer a sector of data.
  4320. * @qc: Command on going
  4321. *
  4322. * Transfer qc->sect_size bytes of data from/to the ATA device.
  4323. *
  4324. * LOCKING:
  4325. * Inherited from caller.
  4326. */
  4327. static void ata_pio_sector(struct ata_queued_cmd *qc)
  4328. {
  4329. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  4330. struct ata_port *ap = qc->ap;
  4331. struct page *page;
  4332. unsigned int offset;
  4333. unsigned char *buf;
  4334. if (qc->curbytes == qc->nbytes - qc->sect_size)
  4335. ap->hsm_task_state = HSM_ST_LAST;
  4336. page = sg_page(qc->cursg);
  4337. offset = qc->cursg->offset + qc->cursg_ofs;
  4338. /* get the current page and offset */
  4339. page = nth_page(page, (offset >> PAGE_SHIFT));
  4340. offset %= PAGE_SIZE;
  4341. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  4342. if (PageHighMem(page)) {
  4343. unsigned long flags;
  4344. /* FIXME: use a bounce buffer */
  4345. local_irq_save(flags);
  4346. buf = kmap_atomic(page, KM_IRQ0);
  4347. /* do the actual data transfer */
  4348. ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
  4349. kunmap_atomic(buf, KM_IRQ0);
  4350. local_irq_restore(flags);
  4351. } else {
  4352. buf = page_address(page);
  4353. ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
  4354. }
  4355. qc->curbytes += qc->sect_size;
  4356. qc->cursg_ofs += qc->sect_size;
  4357. if (qc->cursg_ofs == qc->cursg->length) {
  4358. qc->cursg = sg_next(qc->cursg);
  4359. qc->cursg_ofs = 0;
  4360. }
  4361. }
  4362. /**
  4363. * ata_pio_sectors - Transfer one or many sectors.
  4364. * @qc: Command on going
  4365. *
  4366. * Transfer one or many sectors of data from/to the
  4367. * ATA device for the DRQ request.
  4368. *
  4369. * LOCKING:
  4370. * Inherited from caller.
  4371. */
  4372. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  4373. {
  4374. if (is_multi_taskfile(&qc->tf)) {
  4375. /* READ/WRITE MULTIPLE */
  4376. unsigned int nsect;
  4377. WARN_ON(qc->dev->multi_count == 0);
  4378. nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
  4379. qc->dev->multi_count);
  4380. while (nsect--)
  4381. ata_pio_sector(qc);
  4382. } else
  4383. ata_pio_sector(qc);
  4384. ata_altstatus(qc->ap); /* flush */
  4385. }
  4386. /**
  4387. * atapi_send_cdb - Write CDB bytes to hardware
  4388. * @ap: Port to which ATAPI device is attached.
  4389. * @qc: Taskfile currently active
  4390. *
  4391. * When device has indicated its readiness to accept
  4392. * a CDB, this function is called. Send the CDB.
  4393. *
  4394. * LOCKING:
  4395. * caller.
  4396. */
  4397. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  4398. {
  4399. /* send SCSI cdb */
  4400. DPRINTK("send cdb\n");
  4401. WARN_ON(qc->dev->cdb_len < 12);
  4402. ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
  4403. ata_altstatus(ap); /* flush */
  4404. switch (qc->tf.protocol) {
  4405. case ATA_PROT_ATAPI:
  4406. ap->hsm_task_state = HSM_ST;
  4407. break;
  4408. case ATA_PROT_ATAPI_NODATA:
  4409. ap->hsm_task_state = HSM_ST_LAST;
  4410. break;
  4411. case ATA_PROT_ATAPI_DMA:
  4412. ap->hsm_task_state = HSM_ST_LAST;
  4413. /* initiate bmdma */
  4414. ap->ops->bmdma_start(qc);
  4415. break;
  4416. }
  4417. }
  4418. /**
  4419. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  4420. * @qc: Command on going
  4421. * @bytes: number of bytes
  4422. *
  4423. * Transfer Transfer data from/to the ATAPI device.
  4424. *
  4425. * LOCKING:
  4426. * Inherited from caller.
  4427. *
  4428. */
  4429. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  4430. {
  4431. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  4432. struct scatterlist *sg = qc->__sg;
  4433. struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
  4434. struct ata_port *ap = qc->ap;
  4435. struct page *page;
  4436. unsigned char *buf;
  4437. unsigned int offset, count;
  4438. int no_more_sg = 0;
  4439. if (qc->curbytes + bytes >= qc->nbytes)
  4440. ap->hsm_task_state = HSM_ST_LAST;
  4441. next_sg:
  4442. if (unlikely(no_more_sg)) {
  4443. /*
  4444. * The end of qc->sg is reached and the device expects
  4445. * more data to transfer. In order not to overrun qc->sg
  4446. * and fulfill length specified in the byte count register,
  4447. * - for read case, discard trailing data from the device
  4448. * - for write case, padding zero data to the device
  4449. */
  4450. u16 pad_buf[1] = { 0 };
  4451. unsigned int words = bytes >> 1;
  4452. unsigned int i;
  4453. if (words) /* warning if bytes > 1 */
  4454. ata_dev_printk(qc->dev, KERN_WARNING,
  4455. "%u bytes trailing data\n", bytes);
  4456. for (i = 0; i < words; i++)
  4457. ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write);
  4458. ap->hsm_task_state = HSM_ST_LAST;
  4459. return;
  4460. }
  4461. sg = qc->cursg;
  4462. page = sg_page(sg);
  4463. offset = sg->offset + qc->cursg_ofs;
  4464. /* get the current page and offset */
  4465. page = nth_page(page, (offset >> PAGE_SHIFT));
  4466. offset %= PAGE_SIZE;
  4467. /* don't overrun current sg */
  4468. count = min(sg->length - qc->cursg_ofs, bytes);
  4469. /* don't cross page boundaries */
  4470. count = min(count, (unsigned int)PAGE_SIZE - offset);
  4471. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  4472. if (PageHighMem(page)) {
  4473. unsigned long flags;
  4474. /* FIXME: use bounce buffer */
  4475. local_irq_save(flags);
  4476. buf = kmap_atomic(page, KM_IRQ0);
  4477. /* do the actual data transfer */
  4478. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  4479. kunmap_atomic(buf, KM_IRQ0);
  4480. local_irq_restore(flags);
  4481. } else {
  4482. buf = page_address(page);
  4483. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  4484. }
  4485. bytes -= count;
  4486. qc->curbytes += count;
  4487. qc->cursg_ofs += count;
  4488. if (qc->cursg_ofs == sg->length) {
  4489. if (qc->cursg == lsg)
  4490. no_more_sg = 1;
  4491. qc->cursg = sg_next(qc->cursg);
  4492. qc->cursg_ofs = 0;
  4493. }
  4494. if (bytes)
  4495. goto next_sg;
  4496. }
  4497. /**
  4498. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  4499. * @qc: Command on going
  4500. *
  4501. * Transfer Transfer data from/to the ATAPI device.
  4502. *
  4503. * LOCKING:
  4504. * Inherited from caller.
  4505. */
  4506. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  4507. {
  4508. struct ata_port *ap = qc->ap;
  4509. struct ata_device *dev = qc->dev;
  4510. unsigned int ireason, bc_lo, bc_hi, bytes;
  4511. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  4512. /* Abuse qc->result_tf for temp storage of intermediate TF
  4513. * here to save some kernel stack usage.
  4514. * For normal completion, qc->result_tf is not relevant. For
  4515. * error, qc->result_tf is later overwritten by ata_qc_complete().
  4516. * So, the correctness of qc->result_tf is not affected.
  4517. */
  4518. ap->ops->tf_read(ap, &qc->result_tf);
  4519. ireason = qc->result_tf.nsect;
  4520. bc_lo = qc->result_tf.lbam;
  4521. bc_hi = qc->result_tf.lbah;
  4522. bytes = (bc_hi << 8) | bc_lo;
  4523. /* shall be cleared to zero, indicating xfer of data */
  4524. if (ireason & (1 << 0))
  4525. goto err_out;
  4526. /* make sure transfer direction matches expected */
  4527. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  4528. if (do_write != i_write)
  4529. goto err_out;
  4530. VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
  4531. __atapi_pio_bytes(qc, bytes);
  4532. ata_altstatus(ap); /* flush */
  4533. return;
  4534. err_out:
  4535. ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
  4536. qc->err_mask |= AC_ERR_HSM;
  4537. ap->hsm_task_state = HSM_ST_ERR;
  4538. }
  4539. /**
  4540. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  4541. * @ap: the target ata_port
  4542. * @qc: qc on going
  4543. *
  4544. * RETURNS:
  4545. * 1 if ok in workqueue, 0 otherwise.
  4546. */
  4547. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  4548. {
  4549. if (qc->tf.flags & ATA_TFLAG_POLLING)
  4550. return 1;
  4551. if (ap->hsm_task_state == HSM_ST_FIRST) {
  4552. if (qc->tf.protocol == ATA_PROT_PIO &&
  4553. (qc->tf.flags & ATA_TFLAG_WRITE))
  4554. return 1;
  4555. if (is_atapi_taskfile(&qc->tf) &&
  4556. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  4557. return 1;
  4558. }
  4559. return 0;
  4560. }
  4561. /**
  4562. * ata_hsm_qc_complete - finish a qc running on standard HSM
  4563. * @qc: Command to complete
  4564. * @in_wq: 1 if called from workqueue, 0 otherwise
  4565. *
  4566. * Finish @qc which is running on standard HSM.
  4567. *
  4568. * LOCKING:
  4569. * If @in_wq is zero, spin_lock_irqsave(host lock).
  4570. * Otherwise, none on entry and grabs host lock.
  4571. */
  4572. static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
  4573. {
  4574. struct ata_port *ap = qc->ap;
  4575. unsigned long flags;
  4576. if (ap->ops->error_handler) {
  4577. if (in_wq) {
  4578. spin_lock_irqsave(ap->lock, flags);
  4579. /* EH might have kicked in while host lock is
  4580. * released.
  4581. */
  4582. qc = ata_qc_from_tag(ap, qc->tag);
  4583. if (qc) {
  4584. if (likely(!(qc->err_mask & AC_ERR_HSM))) {
  4585. ap->ops->irq_on(ap);
  4586. ata_qc_complete(qc);
  4587. } else
  4588. ata_port_freeze(ap);
  4589. }
  4590. spin_unlock_irqrestore(ap->lock, flags);
  4591. } else {
  4592. if (likely(!(qc->err_mask & AC_ERR_HSM)))
  4593. ata_qc_complete(qc);
  4594. else
  4595. ata_port_freeze(ap);
  4596. }
  4597. } else {
  4598. if (in_wq) {
  4599. spin_lock_irqsave(ap->lock, flags);
  4600. ap->ops->irq_on(ap);
  4601. ata_qc_complete(qc);
  4602. spin_unlock_irqrestore(ap->lock, flags);
  4603. } else
  4604. ata_qc_complete(qc);
  4605. }
  4606. }
  4607. /**
  4608. * ata_hsm_move - move the HSM to the next state.
  4609. * @ap: the target ata_port
  4610. * @qc: qc on going
  4611. * @status: current device status
  4612. * @in_wq: 1 if called from workqueue, 0 otherwise
  4613. *
  4614. * RETURNS:
  4615. * 1 when poll next status needed, 0 otherwise.
  4616. */
  4617. int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  4618. u8 status, int in_wq)
  4619. {
  4620. unsigned long flags = 0;
  4621. int poll_next;
  4622. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  4623. /* Make sure ata_qc_issue_prot() does not throw things
  4624. * like DMA polling into the workqueue. Notice that
  4625. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  4626. */
  4627. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  4628. fsm_start:
  4629. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  4630. ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
  4631. switch (ap->hsm_task_state) {
  4632. case HSM_ST_FIRST:
  4633. /* Send first data block or PACKET CDB */
  4634. /* If polling, we will stay in the work queue after
  4635. * sending the data. Otherwise, interrupt handler
  4636. * takes over after sending the data.
  4637. */
  4638. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  4639. /* check device status */
  4640. if (unlikely((status & ATA_DRQ) == 0)) {
  4641. /* handle BSY=0, DRQ=0 as error */
  4642. if (likely(status & (ATA_ERR | ATA_DF)))
  4643. /* device stops HSM for abort/error */
  4644. qc->err_mask |= AC_ERR_DEV;
  4645. else
  4646. /* HSM violation. Let EH handle this */
  4647. qc->err_mask |= AC_ERR_HSM;
  4648. ap->hsm_task_state = HSM_ST_ERR;
  4649. goto fsm_start;
  4650. }
  4651. /* Device should not ask for data transfer (DRQ=1)
  4652. * when it finds something wrong.
  4653. * We ignore DRQ here and stop the HSM by
  4654. * changing hsm_task_state to HSM_ST_ERR and
  4655. * let the EH abort the command or reset the device.
  4656. */
  4657. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  4658. /* Some ATAPI tape drives forget to clear the ERR bit
  4659. * when doing the next command (mostly request sense).
  4660. * We ignore ERR here to workaround and proceed sending
  4661. * the CDB.
  4662. */
  4663. if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
  4664. ata_port_printk(ap, KERN_WARNING,
  4665. "DRQ=1 with device error, "
  4666. "dev_stat 0x%X\n", status);
  4667. qc->err_mask |= AC_ERR_HSM;
  4668. ap->hsm_task_state = HSM_ST_ERR;
  4669. goto fsm_start;
  4670. }
  4671. }
  4672. /* Send the CDB (atapi) or the first data block (ata pio out).
  4673. * During the state transition, interrupt handler shouldn't
  4674. * be invoked before the data transfer is complete and
  4675. * hsm_task_state is changed. Hence, the following locking.
  4676. */
  4677. if (in_wq)
  4678. spin_lock_irqsave(ap->lock, flags);
  4679. if (qc->tf.protocol == ATA_PROT_PIO) {
  4680. /* PIO data out protocol.
  4681. * send first data block.
  4682. */
  4683. /* ata_pio_sectors() might change the state
  4684. * to HSM_ST_LAST. so, the state is changed here
  4685. * before ata_pio_sectors().
  4686. */
  4687. ap->hsm_task_state = HSM_ST;
  4688. ata_pio_sectors(qc);
  4689. } else
  4690. /* send CDB */
  4691. atapi_send_cdb(ap, qc);
  4692. if (in_wq)
  4693. spin_unlock_irqrestore(ap->lock, flags);
  4694. /* if polling, ata_pio_task() handles the rest.
  4695. * otherwise, interrupt handler takes over from here.
  4696. */
  4697. break;
  4698. case HSM_ST:
  4699. /* complete command or read/write the data register */
  4700. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  4701. /* ATAPI PIO protocol */
  4702. if ((status & ATA_DRQ) == 0) {
  4703. /* No more data to transfer or device error.
  4704. * Device error will be tagged in HSM_ST_LAST.
  4705. */
  4706. ap->hsm_task_state = HSM_ST_LAST;
  4707. goto fsm_start;
  4708. }
  4709. /* Device should not ask for data transfer (DRQ=1)
  4710. * when it finds something wrong.
  4711. * We ignore DRQ here and stop the HSM by
  4712. * changing hsm_task_state to HSM_ST_ERR and
  4713. * let the EH abort the command or reset the device.
  4714. */
  4715. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  4716. ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
  4717. "device error, dev_stat 0x%X\n",
  4718. status);
  4719. qc->err_mask |= AC_ERR_HSM;
  4720. ap->hsm_task_state = HSM_ST_ERR;
  4721. goto fsm_start;
  4722. }
  4723. atapi_pio_bytes(qc);
  4724. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  4725. /* bad ireason reported by device */
  4726. goto fsm_start;
  4727. } else {
  4728. /* ATA PIO protocol */
  4729. if (unlikely((status & ATA_DRQ) == 0)) {
  4730. /* handle BSY=0, DRQ=0 as error */
  4731. if (likely(status & (ATA_ERR | ATA_DF)))
  4732. /* device stops HSM for abort/error */
  4733. qc->err_mask |= AC_ERR_DEV;
  4734. else
  4735. /* HSM violation. Let EH handle this.
  4736. * Phantom devices also trigger this
  4737. * condition. Mark hint.
  4738. */
  4739. qc->err_mask |= AC_ERR_HSM |
  4740. AC_ERR_NODEV_HINT;
  4741. ap->hsm_task_state = HSM_ST_ERR;
  4742. goto fsm_start;
  4743. }
  4744. /* For PIO reads, some devices may ask for
  4745. * data transfer (DRQ=1) alone with ERR=1.
  4746. * We respect DRQ here and transfer one
  4747. * block of junk data before changing the
  4748. * hsm_task_state to HSM_ST_ERR.
  4749. *
  4750. * For PIO writes, ERR=1 DRQ=1 doesn't make
  4751. * sense since the data block has been
  4752. * transferred to the device.
  4753. */
  4754. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  4755. /* data might be corrputed */
  4756. qc->err_mask |= AC_ERR_DEV;
  4757. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  4758. ata_pio_sectors(qc);
  4759. status = ata_wait_idle(ap);
  4760. }
  4761. if (status & (ATA_BUSY | ATA_DRQ))
  4762. qc->err_mask |= AC_ERR_HSM;
  4763. /* ata_pio_sectors() might change the
  4764. * state to HSM_ST_LAST. so, the state
  4765. * is changed after ata_pio_sectors().
  4766. */
  4767. ap->hsm_task_state = HSM_ST_ERR;
  4768. goto fsm_start;
  4769. }
  4770. ata_pio_sectors(qc);
  4771. if (ap->hsm_task_state == HSM_ST_LAST &&
  4772. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  4773. /* all data read */
  4774. status = ata_wait_idle(ap);
  4775. goto fsm_start;
  4776. }
  4777. }
  4778. poll_next = 1;
  4779. break;
  4780. case HSM_ST_LAST:
  4781. if (unlikely(!ata_ok(status))) {
  4782. qc->err_mask |= __ac_err_mask(status);
  4783. ap->hsm_task_state = HSM_ST_ERR;
  4784. goto fsm_start;
  4785. }
  4786. /* no more data to transfer */
  4787. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  4788. ap->print_id, qc->dev->devno, status);
  4789. WARN_ON(qc->err_mask);
  4790. ap->hsm_task_state = HSM_ST_IDLE;
  4791. /* complete taskfile transaction */
  4792. ata_hsm_qc_complete(qc, in_wq);
  4793. poll_next = 0;
  4794. break;
  4795. case HSM_ST_ERR:
  4796. /* make sure qc->err_mask is available to
  4797. * know what's wrong and recover
  4798. */
  4799. WARN_ON(qc->err_mask == 0);
  4800. ap->hsm_task_state = HSM_ST_IDLE;
  4801. /* complete taskfile transaction */
  4802. ata_hsm_qc_complete(qc, in_wq);
  4803. poll_next = 0;
  4804. break;
  4805. default:
  4806. poll_next = 0;
  4807. BUG();
  4808. }
  4809. return poll_next;
  4810. }
  4811. static void ata_pio_task(struct work_struct *work)
  4812. {
  4813. struct ata_port *ap =
  4814. container_of(work, struct ata_port, port_task.work);
  4815. struct ata_queued_cmd *qc = ap->port_task_data;
  4816. u8 status;
  4817. int poll_next;
  4818. fsm_start:
  4819. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  4820. /*
  4821. * This is purely heuristic. This is a fast path.
  4822. * Sometimes when we enter, BSY will be cleared in
  4823. * a chk-status or two. If not, the drive is probably seeking
  4824. * or something. Snooze for a couple msecs, then
  4825. * chk-status again. If still busy, queue delayed work.
  4826. */
  4827. status = ata_busy_wait(ap, ATA_BUSY, 5);
  4828. if (status & ATA_BUSY) {
  4829. msleep(2);
  4830. status = ata_busy_wait(ap, ATA_BUSY, 10);
  4831. if (status & ATA_BUSY) {
  4832. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  4833. return;
  4834. }
  4835. }
  4836. /* move the HSM */
  4837. poll_next = ata_hsm_move(ap, qc, status, 1);
  4838. /* another command or interrupt handler
  4839. * may be running at this point.
  4840. */
  4841. if (poll_next)
  4842. goto fsm_start;
  4843. }
  4844. /**
  4845. * ata_qc_new - Request an available ATA command, for queueing
  4846. * @ap: Port associated with device @dev
  4847. * @dev: Device from whom we request an available command structure
  4848. *
  4849. * LOCKING:
  4850. * None.
  4851. */
  4852. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  4853. {
  4854. struct ata_queued_cmd *qc = NULL;
  4855. unsigned int i;
  4856. /* no command while frozen */
  4857. if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
  4858. return NULL;
  4859. /* the last tag is reserved for internal command. */
  4860. for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
  4861. if (!test_and_set_bit(i, &ap->qc_allocated)) {
  4862. qc = __ata_qc_from_tag(ap, i);
  4863. break;
  4864. }
  4865. if (qc)
  4866. qc->tag = i;
  4867. return qc;
  4868. }
  4869. /**
  4870. * ata_qc_new_init - Request an available ATA command, and initialize it
  4871. * @dev: Device from whom we request an available command structure
  4872. *
  4873. * LOCKING:
  4874. * None.
  4875. */
  4876. struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
  4877. {
  4878. struct ata_port *ap = dev->link->ap;
  4879. struct ata_queued_cmd *qc;
  4880. qc = ata_qc_new(ap);
  4881. if (qc) {
  4882. qc->scsicmd = NULL;
  4883. qc->ap = ap;
  4884. qc->dev = dev;
  4885. ata_qc_reinit(qc);
  4886. }
  4887. return qc;
  4888. }
  4889. /**
  4890. * ata_qc_free - free unused ata_queued_cmd
  4891. * @qc: Command to complete
  4892. *
  4893. * Designed to free unused ata_queued_cmd object
  4894. * in case something prevents using it.
  4895. *
  4896. * LOCKING:
  4897. * spin_lock_irqsave(host lock)
  4898. */
  4899. void ata_qc_free(struct ata_queued_cmd *qc)
  4900. {
  4901. struct ata_port *ap = qc->ap;
  4902. unsigned int tag;
  4903. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  4904. qc->flags = 0;
  4905. tag = qc->tag;
  4906. if (likely(ata_tag_valid(tag))) {
  4907. qc->tag = ATA_TAG_POISON;
  4908. clear_bit(tag, &ap->qc_allocated);
  4909. }
  4910. }
  4911. void __ata_qc_complete(struct ata_queued_cmd *qc)
  4912. {
  4913. struct ata_port *ap = qc->ap;
  4914. struct ata_link *link = qc->dev->link;
  4915. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  4916. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  4917. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  4918. ata_sg_clean(qc);
  4919. /* command should be marked inactive atomically with qc completion */
  4920. if (qc->tf.protocol == ATA_PROT_NCQ) {
  4921. link->sactive &= ~(1 << qc->tag);
  4922. if (!link->sactive)
  4923. ap->nr_active_links--;
  4924. } else {
  4925. link->active_tag = ATA_TAG_POISON;
  4926. ap->nr_active_links--;
  4927. }
  4928. /* clear exclusive status */
  4929. if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
  4930. ap->excl_link == link))
  4931. ap->excl_link = NULL;
  4932. /* atapi: mark qc as inactive to prevent the interrupt handler
  4933. * from completing the command twice later, before the error handler
  4934. * is called. (when rc != 0 and atapi request sense is needed)
  4935. */
  4936. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  4937. ap->qc_active &= ~(1 << qc->tag);
  4938. /* call completion callback */
  4939. qc->complete_fn(qc);
  4940. }
  4941. static void fill_result_tf(struct ata_queued_cmd *qc)
  4942. {
  4943. struct ata_port *ap = qc->ap;
  4944. qc->result_tf.flags = qc->tf.flags;
  4945. ap->ops->tf_read(ap, &qc->result_tf);
  4946. }
  4947. /**
  4948. * ata_qc_complete - Complete an active ATA command
  4949. * @qc: Command to complete
  4950. * @err_mask: ATA Status register contents
  4951. *
  4952. * Indicate to the mid and upper layers that an ATA
  4953. * command has completed, with either an ok or not-ok status.
  4954. *
  4955. * LOCKING:
  4956. * spin_lock_irqsave(host lock)
  4957. */
  4958. void ata_qc_complete(struct ata_queued_cmd *qc)
  4959. {
  4960. struct ata_port *ap = qc->ap;
  4961. /* XXX: New EH and old EH use different mechanisms to
  4962. * synchronize EH with regular execution path.
  4963. *
  4964. * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
  4965. * Normal execution path is responsible for not accessing a
  4966. * failed qc. libata core enforces the rule by returning NULL
  4967. * from ata_qc_from_tag() for failed qcs.
  4968. *
  4969. * Old EH depends on ata_qc_complete() nullifying completion
  4970. * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
  4971. * not synchronize with interrupt handler. Only PIO task is
  4972. * taken care of.
  4973. */
  4974. if (ap->ops->error_handler) {
  4975. struct ata_device *dev = qc->dev;
  4976. struct ata_eh_info *ehi = &dev->link->eh_info;
  4977. WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
  4978. if (unlikely(qc->err_mask))
  4979. qc->flags |= ATA_QCFLAG_FAILED;
  4980. if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
  4981. if (!ata_tag_internal(qc->tag)) {
  4982. /* always fill result TF for failed qc */
  4983. fill_result_tf(qc);
  4984. ata_qc_schedule_eh(qc);
  4985. return;
  4986. }
  4987. }
  4988. /* read result TF if requested */
  4989. if (qc->flags & ATA_QCFLAG_RESULT_TF)
  4990. fill_result_tf(qc);
  4991. /* Some commands need post-processing after successful
  4992. * completion.
  4993. */
  4994. switch (qc->tf.command) {
  4995. case ATA_CMD_SET_FEATURES:
  4996. if (qc->tf.feature != SETFEATURES_WC_ON &&
  4997. qc->tf.feature != SETFEATURES_WC_OFF)
  4998. break;
  4999. /* fall through */
  5000. case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
  5001. case ATA_CMD_SET_MULTI: /* multi_count changed */
  5002. /* revalidate device */
  5003. ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
  5004. ata_port_schedule_eh(ap);
  5005. break;
  5006. case ATA_CMD_SLEEP:
  5007. dev->flags |= ATA_DFLAG_SLEEPING;
  5008. break;
  5009. }
  5010. __ata_qc_complete(qc);
  5011. } else {
  5012. if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
  5013. return;
  5014. /* read result TF if failed or requested */
  5015. if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
  5016. fill_result_tf(qc);
  5017. __ata_qc_complete(qc);
  5018. }
  5019. }
  5020. /**
  5021. * ata_qc_complete_multiple - Complete multiple qcs successfully
  5022. * @ap: port in question
  5023. * @qc_active: new qc_active mask
  5024. * @finish_qc: LLDD callback invoked before completing a qc
  5025. *
  5026. * Complete in-flight commands. This functions is meant to be
  5027. * called from low-level driver's interrupt routine to complete
  5028. * requests normally. ap->qc_active and @qc_active is compared
  5029. * and commands are completed accordingly.
  5030. *
  5031. * LOCKING:
  5032. * spin_lock_irqsave(host lock)
  5033. *
  5034. * RETURNS:
  5035. * Number of completed commands on success, -errno otherwise.
  5036. */
  5037. int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
  5038. void (*finish_qc)(struct ata_queued_cmd *))
  5039. {
  5040. int nr_done = 0;
  5041. u32 done_mask;
  5042. int i;
  5043. done_mask = ap->qc_active ^ qc_active;
  5044. if (unlikely(done_mask & qc_active)) {
  5045. ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
  5046. "(%08x->%08x)\n", ap->qc_active, qc_active);
  5047. return -EINVAL;
  5048. }
  5049. for (i = 0; i < ATA_MAX_QUEUE; i++) {
  5050. struct ata_queued_cmd *qc;
  5051. if (!(done_mask & (1 << i)))
  5052. continue;
  5053. if ((qc = ata_qc_from_tag(ap, i))) {
  5054. if (finish_qc)
  5055. finish_qc(qc);
  5056. ata_qc_complete(qc);
  5057. nr_done++;
  5058. }
  5059. }
  5060. return nr_done;
  5061. }
  5062. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  5063. {
  5064. struct ata_port *ap = qc->ap;
  5065. switch (qc->tf.protocol) {
  5066. case ATA_PROT_NCQ:
  5067. case ATA_PROT_DMA:
  5068. case ATA_PROT_ATAPI_DMA:
  5069. return 1;
  5070. case ATA_PROT_ATAPI:
  5071. case ATA_PROT_PIO:
  5072. if (ap->flags & ATA_FLAG_PIO_DMA)
  5073. return 1;
  5074. /* fall through */
  5075. default:
  5076. return 0;
  5077. }
  5078. /* never reached */
  5079. }
  5080. /**
  5081. * ata_qc_issue - issue taskfile to device
  5082. * @qc: command to issue to device
  5083. *
  5084. * Prepare an ATA command to submission to device.
  5085. * This includes mapping the data into a DMA-able
  5086. * area, filling in the S/G table, and finally
  5087. * writing the taskfile to hardware, starting the command.
  5088. *
  5089. * LOCKING:
  5090. * spin_lock_irqsave(host lock)
  5091. */
  5092. void ata_qc_issue(struct ata_queued_cmd *qc)
  5093. {
  5094. struct ata_port *ap = qc->ap;
  5095. struct ata_link *link = qc->dev->link;
  5096. /* Make sure only one non-NCQ command is outstanding. The
  5097. * check is skipped for old EH because it reuses active qc to
  5098. * request ATAPI sense.
  5099. */
  5100. WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
  5101. if (qc->tf.protocol == ATA_PROT_NCQ) {
  5102. WARN_ON(link->sactive & (1 << qc->tag));
  5103. if (!link->sactive)
  5104. ap->nr_active_links++;
  5105. link->sactive |= 1 << qc->tag;
  5106. } else {
  5107. WARN_ON(link->sactive);
  5108. ap->nr_active_links++;
  5109. link->active_tag = qc->tag;
  5110. }
  5111. qc->flags |= ATA_QCFLAG_ACTIVE;
  5112. ap->qc_active |= 1 << qc->tag;
  5113. if (ata_should_dma_map(qc)) {
  5114. if (qc->flags & ATA_QCFLAG_SG) {
  5115. if (ata_sg_setup(qc))
  5116. goto sg_err;
  5117. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  5118. if (ata_sg_setup_one(qc))
  5119. goto sg_err;
  5120. }
  5121. } else {
  5122. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  5123. }
  5124. /* if device is sleeping, schedule softreset and abort the link */
  5125. if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
  5126. link->eh_info.action |= ATA_EH_SOFTRESET;
  5127. ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
  5128. ata_link_abort(link);
  5129. return;
  5130. }
  5131. ap->ops->qc_prep(qc);
  5132. qc->err_mask |= ap->ops->qc_issue(qc);
  5133. if (unlikely(qc->err_mask))
  5134. goto err;
  5135. return;
  5136. sg_err:
  5137. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  5138. qc->err_mask |= AC_ERR_SYSTEM;
  5139. err:
  5140. ata_qc_complete(qc);
  5141. }
  5142. /**
  5143. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  5144. * @qc: command to issue to device
  5145. *
  5146. * Using various libata functions and hooks, this function
  5147. * starts an ATA command. ATA commands are grouped into
  5148. * classes called "protocols", and issuing each type of protocol
  5149. * is slightly different.
  5150. *
  5151. * May be used as the qc_issue() entry in ata_port_operations.
  5152. *
  5153. * LOCKING:
  5154. * spin_lock_irqsave(host lock)
  5155. *
  5156. * RETURNS:
  5157. * Zero on success, AC_ERR_* mask on failure
  5158. */
  5159. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  5160. {
  5161. struct ata_port *ap = qc->ap;
  5162. /* Use polling pio if the LLD doesn't handle
  5163. * interrupt driven pio and atapi CDB interrupt.
  5164. */
  5165. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  5166. switch (qc->tf.protocol) {
  5167. case ATA_PROT_PIO:
  5168. case ATA_PROT_NODATA:
  5169. case ATA_PROT_ATAPI:
  5170. case ATA_PROT_ATAPI_NODATA:
  5171. qc->tf.flags |= ATA_TFLAG_POLLING;
  5172. break;
  5173. case ATA_PROT_ATAPI_DMA:
  5174. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  5175. /* see ata_dma_blacklisted() */
  5176. BUG();
  5177. break;
  5178. default:
  5179. break;
  5180. }
  5181. }
  5182. /* select the device */
  5183. ata_dev_select(ap, qc->dev->devno, 1, 0);
  5184. /* start the command */
  5185. switch (qc->tf.protocol) {
  5186. case ATA_PROT_NODATA:
  5187. if (qc->tf.flags & ATA_TFLAG_POLLING)
  5188. ata_qc_set_polling(qc);
  5189. ata_tf_to_host(ap, &qc->tf);
  5190. ap->hsm_task_state = HSM_ST_LAST;
  5191. if (qc->tf.flags & ATA_TFLAG_POLLING)
  5192. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  5193. break;
  5194. case ATA_PROT_DMA:
  5195. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  5196. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  5197. ap->ops->bmdma_setup(qc); /* set up bmdma */
  5198. ap->ops->bmdma_start(qc); /* initiate bmdma */
  5199. ap->hsm_task_state = HSM_ST_LAST;
  5200. break;
  5201. case ATA_PROT_PIO:
  5202. if (qc->tf.flags & ATA_TFLAG_POLLING)
  5203. ata_qc_set_polling(qc);
  5204. ata_tf_to_host(ap, &qc->tf);
  5205. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  5206. /* PIO data out protocol */
  5207. ap->hsm_task_state = HSM_ST_FIRST;
  5208. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  5209. /* always send first data block using
  5210. * the ata_pio_task() codepath.
  5211. */
  5212. } else {
  5213. /* PIO data in protocol */
  5214. ap->hsm_task_state = HSM_ST;
  5215. if (qc->tf.flags & ATA_TFLAG_POLLING)
  5216. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  5217. /* if polling, ata_pio_task() handles the rest.
  5218. * otherwise, interrupt handler takes over from here.
  5219. */
  5220. }
  5221. break;
  5222. case ATA_PROT_ATAPI:
  5223. case ATA_PROT_ATAPI_NODATA:
  5224. if (qc->tf.flags & ATA_TFLAG_POLLING)
  5225. ata_qc_set_polling(qc);
  5226. ata_tf_to_host(ap, &qc->tf);
  5227. ap->hsm_task_state = HSM_ST_FIRST;
  5228. /* send cdb by polling if no cdb interrupt */
  5229. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  5230. (qc->tf.flags & ATA_TFLAG_POLLING))
  5231. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  5232. break;
  5233. case ATA_PROT_ATAPI_DMA:
  5234. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  5235. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  5236. ap->ops->bmdma_setup(qc); /* set up bmdma */
  5237. ap->hsm_task_state = HSM_ST_FIRST;
  5238. /* send cdb by polling if no cdb interrupt */
  5239. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  5240. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  5241. break;
  5242. default:
  5243. WARN_ON(1);
  5244. return AC_ERR_SYSTEM;
  5245. }
  5246. return 0;
  5247. }
  5248. /**
  5249. * ata_host_intr - Handle host interrupt for given (port, task)
  5250. * @ap: Port on which interrupt arrived (possibly...)
  5251. * @qc: Taskfile currently active in engine
  5252. *
  5253. * Handle host interrupt for given queued command. Currently,
  5254. * only DMA interrupts are handled. All other commands are
  5255. * handled via polling with interrupts disabled (nIEN bit).
  5256. *
  5257. * LOCKING:
  5258. * spin_lock_irqsave(host lock)
  5259. *
  5260. * RETURNS:
  5261. * One if interrupt was handled, zero if not (shared irq).
  5262. */
  5263. inline unsigned int ata_host_intr(struct ata_port *ap,
  5264. struct ata_queued_cmd *qc)
  5265. {
  5266. struct ata_eh_info *ehi = &ap->link.eh_info;
  5267. u8 status, host_stat = 0;
  5268. VPRINTK("ata%u: protocol %d task_state %d\n",
  5269. ap->print_id, qc->tf.protocol, ap->hsm_task_state);
  5270. /* Check whether we are expecting interrupt in this state */
  5271. switch (ap->hsm_task_state) {
  5272. case HSM_ST_FIRST:
  5273. /* Some pre-ATAPI-4 devices assert INTRQ
  5274. * at this state when ready to receive CDB.
  5275. */
  5276. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  5277. * The flag was turned on only for atapi devices.
  5278. * No need to check is_atapi_taskfile(&qc->tf) again.
  5279. */
  5280. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  5281. goto idle_irq;
  5282. break;
  5283. case HSM_ST_LAST:
  5284. if (qc->tf.protocol == ATA_PROT_DMA ||
  5285. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  5286. /* check status of DMA engine */
  5287. host_stat = ap->ops->bmdma_status(ap);
  5288. VPRINTK("ata%u: host_stat 0x%X\n",
  5289. ap->print_id, host_stat);
  5290. /* if it's not our irq... */
  5291. if (!(host_stat & ATA_DMA_INTR))
  5292. goto idle_irq;
  5293. /* before we do anything else, clear DMA-Start bit */
  5294. ap->ops->bmdma_stop(qc);
  5295. if (unlikely(host_stat & ATA_DMA_ERR)) {
  5296. /* error when transfering data to/from memory */
  5297. qc->err_mask |= AC_ERR_HOST_BUS;
  5298. ap->hsm_task_state = HSM_ST_ERR;
  5299. }
  5300. }
  5301. break;
  5302. case HSM_ST:
  5303. break;
  5304. default:
  5305. goto idle_irq;
  5306. }
  5307. /* check altstatus */
  5308. status = ata_altstatus(ap);
  5309. if (status & ATA_BUSY)
  5310. goto idle_irq;
  5311. /* check main status, clearing INTRQ */
  5312. status = ata_chk_status(ap);
  5313. if (unlikely(status & ATA_BUSY))
  5314. goto idle_irq;
  5315. /* ack bmdma irq events */
  5316. ap->ops->irq_clear(ap);
  5317. ata_hsm_move(ap, qc, status, 0);
  5318. if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
  5319. qc->tf.protocol == ATA_PROT_ATAPI_DMA))
  5320. ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
  5321. return 1; /* irq handled */
  5322. idle_irq:
  5323. ap->stats.idle_irq++;
  5324. #ifdef ATA_IRQ_TRAP
  5325. if ((ap->stats.idle_irq % 1000) == 0) {
  5326. ata_chk_status(ap);
  5327. ap->ops->irq_clear(ap);
  5328. ata_port_printk(ap, KERN_WARNING, "irq trap\n");
  5329. return 1;
  5330. }
  5331. #endif
  5332. return 0; /* irq not handled */
  5333. }
  5334. /**
  5335. * ata_interrupt - Default ATA host interrupt handler
  5336. * @irq: irq line (unused)
  5337. * @dev_instance: pointer to our ata_host information structure
  5338. *
  5339. * Default interrupt handler for PCI IDE devices. Calls
  5340. * ata_host_intr() for each port that is not disabled.
  5341. *
  5342. * LOCKING:
  5343. * Obtains host lock during operation.
  5344. *
  5345. * RETURNS:
  5346. * IRQ_NONE or IRQ_HANDLED.
  5347. */
  5348. irqreturn_t ata_interrupt(int irq, void *dev_instance)
  5349. {
  5350. struct ata_host *host = dev_instance;
  5351. unsigned int i;
  5352. unsigned int handled = 0;
  5353. unsigned long flags;
  5354. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  5355. spin_lock_irqsave(&host->lock, flags);
  5356. for (i = 0; i < host->n_ports; i++) {
  5357. struct ata_port *ap;
  5358. ap = host->ports[i];
  5359. if (ap &&
  5360. !(ap->flags & ATA_FLAG_DISABLED)) {
  5361. struct ata_queued_cmd *qc;
  5362. qc = ata_qc_from_tag(ap, ap->link.active_tag);
  5363. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  5364. (qc->flags & ATA_QCFLAG_ACTIVE))
  5365. handled |= ata_host_intr(ap, qc);
  5366. }
  5367. }
  5368. spin_unlock_irqrestore(&host->lock, flags);
  5369. return IRQ_RETVAL(handled);
  5370. }
  5371. /**
  5372. * sata_scr_valid - test whether SCRs are accessible
  5373. * @link: ATA link to test SCR accessibility for
  5374. *
  5375. * Test whether SCRs are accessible for @link.
  5376. *
  5377. * LOCKING:
  5378. * None.
  5379. *
  5380. * RETURNS:
  5381. * 1 if SCRs are accessible, 0 otherwise.
  5382. */
  5383. int sata_scr_valid(struct ata_link *link)
  5384. {
  5385. struct ata_port *ap = link->ap;
  5386. return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
  5387. }
  5388. /**
  5389. * sata_scr_read - read SCR register of the specified port
  5390. * @link: ATA link to read SCR for
  5391. * @reg: SCR to read
  5392. * @val: Place to store read value
  5393. *
  5394. * Read SCR register @reg of @link into *@val. This function is
  5395. * guaranteed to succeed if @link is ap->link, the cable type of
  5396. * the port is SATA and the port implements ->scr_read.
  5397. *
  5398. * LOCKING:
  5399. * None if @link is ap->link. Kernel thread context otherwise.
  5400. *
  5401. * RETURNS:
  5402. * 0 on success, negative errno on failure.
  5403. */
  5404. int sata_scr_read(struct ata_link *link, int reg, u32 *val)
  5405. {
  5406. if (ata_is_host_link(link)) {
  5407. struct ata_port *ap = link->ap;
  5408. if (sata_scr_valid(link))
  5409. return ap->ops->scr_read(ap, reg, val);
  5410. return -EOPNOTSUPP;
  5411. }
  5412. return sata_pmp_scr_read(link, reg, val);
  5413. }
  5414. /**
  5415. * sata_scr_write - write SCR register of the specified port
  5416. * @link: ATA link to write SCR for
  5417. * @reg: SCR to write
  5418. * @val: value to write
  5419. *
  5420. * Write @val to SCR register @reg of @link. This function is
  5421. * guaranteed to succeed if @link is ap->link, the cable type of
  5422. * the port is SATA and the port implements ->scr_read.
  5423. *
  5424. * LOCKING:
  5425. * None if @link is ap->link. Kernel thread context otherwise.
  5426. *
  5427. * RETURNS:
  5428. * 0 on success, negative errno on failure.
  5429. */
  5430. int sata_scr_write(struct ata_link *link, int reg, u32 val)
  5431. {
  5432. if (ata_is_host_link(link)) {
  5433. struct ata_port *ap = link->ap;
  5434. if (sata_scr_valid(link))
  5435. return ap->ops->scr_write(ap, reg, val);
  5436. return -EOPNOTSUPP;
  5437. }
  5438. return sata_pmp_scr_write(link, reg, val);
  5439. }
  5440. /**
  5441. * sata_scr_write_flush - write SCR register of the specified port and flush
  5442. * @link: ATA link to write SCR for
  5443. * @reg: SCR to write
  5444. * @val: value to write
  5445. *
  5446. * This function is identical to sata_scr_write() except that this
  5447. * function performs flush after writing to the register.
  5448. *
  5449. * LOCKING:
  5450. * None if @link is ap->link. Kernel thread context otherwise.
  5451. *
  5452. * RETURNS:
  5453. * 0 on success, negative errno on failure.
  5454. */
  5455. int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
  5456. {
  5457. if (ata_is_host_link(link)) {
  5458. struct ata_port *ap = link->ap;
  5459. int rc;
  5460. if (sata_scr_valid(link)) {
  5461. rc = ap->ops->scr_write(ap, reg, val);
  5462. if (rc == 0)
  5463. rc = ap->ops->scr_read(ap, reg, &val);
  5464. return rc;
  5465. }
  5466. return -EOPNOTSUPP;
  5467. }
  5468. return sata_pmp_scr_write(link, reg, val);
  5469. }
  5470. /**
  5471. * ata_link_online - test whether the given link is online
  5472. * @link: ATA link to test
  5473. *
  5474. * Test whether @link is online. Note that this function returns
  5475. * 0 if online status of @link cannot be obtained, so
  5476. * ata_link_online(link) != !ata_link_offline(link).
  5477. *
  5478. * LOCKING:
  5479. * None.
  5480. *
  5481. * RETURNS:
  5482. * 1 if the port online status is available and online.
  5483. */
  5484. int ata_link_online(struct ata_link *link)
  5485. {
  5486. u32 sstatus;
  5487. if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
  5488. (sstatus & 0xf) == 0x3)
  5489. return 1;
  5490. return 0;
  5491. }
  5492. /**
  5493. * ata_link_offline - test whether the given link is offline
  5494. * @link: ATA link to test
  5495. *
  5496. * Test whether @link is offline. Note that this function
  5497. * returns 0 if offline status of @link cannot be obtained, so
  5498. * ata_link_online(link) != !ata_link_offline(link).
  5499. *
  5500. * LOCKING:
  5501. * None.
  5502. *
  5503. * RETURNS:
  5504. * 1 if the port offline status is available and offline.
  5505. */
  5506. int ata_link_offline(struct ata_link *link)
  5507. {
  5508. u32 sstatus;
  5509. if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
  5510. (sstatus & 0xf) != 0x3)
  5511. return 1;
  5512. return 0;
  5513. }
  5514. int ata_flush_cache(struct ata_device *dev)
  5515. {
  5516. unsigned int err_mask;
  5517. u8 cmd;
  5518. if (!ata_try_flush_cache(dev))
  5519. return 0;
  5520. if (dev->flags & ATA_DFLAG_FLUSH_EXT)
  5521. cmd = ATA_CMD_FLUSH_EXT;
  5522. else
  5523. cmd = ATA_CMD_FLUSH;
  5524. /* This is wrong. On a failed flush we get back the LBA of the lost
  5525. sector and we should (assuming it wasn't aborted as unknown) issue
  5526. a further flush command to continue the writeback until it
  5527. does not error */
  5528. err_mask = ata_do_simple_cmd(dev, cmd);
  5529. if (err_mask) {
  5530. ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
  5531. return -EIO;
  5532. }
  5533. return 0;
  5534. }
  5535. #ifdef CONFIG_PM
  5536. static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
  5537. unsigned int action, unsigned int ehi_flags,
  5538. int wait)
  5539. {
  5540. unsigned long flags;
  5541. int i, rc;
  5542. for (i = 0; i < host->n_ports; i++) {
  5543. struct ata_port *ap = host->ports[i];
  5544. struct ata_link *link;
  5545. /* Previous resume operation might still be in
  5546. * progress. Wait for PM_PENDING to clear.
  5547. */
  5548. if (ap->pflags & ATA_PFLAG_PM_PENDING) {
  5549. ata_port_wait_eh(ap);
  5550. WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
  5551. }
  5552. /* request PM ops to EH */
  5553. spin_lock_irqsave(ap->lock, flags);
  5554. ap->pm_mesg = mesg;
  5555. if (wait) {
  5556. rc = 0;
  5557. ap->pm_result = &rc;
  5558. }
  5559. ap->pflags |= ATA_PFLAG_PM_PENDING;
  5560. __ata_port_for_each_link(link, ap) {
  5561. link->eh_info.action |= action;
  5562. link->eh_info.flags |= ehi_flags;
  5563. }
  5564. ata_port_schedule_eh(ap);
  5565. spin_unlock_irqrestore(ap->lock, flags);
  5566. /* wait and check result */
  5567. if (wait) {
  5568. ata_port_wait_eh(ap);
  5569. WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
  5570. if (rc)
  5571. return rc;
  5572. }
  5573. }
  5574. return 0;
  5575. }
  5576. /**
  5577. * ata_host_suspend - suspend host
  5578. * @host: host to suspend
  5579. * @mesg: PM message
  5580. *
  5581. * Suspend @host. Actual operation is performed by EH. This
  5582. * function requests EH to perform PM operations and waits for EH
  5583. * to finish.
  5584. *
  5585. * LOCKING:
  5586. * Kernel thread context (may sleep).
  5587. *
  5588. * RETURNS:
  5589. * 0 on success, -errno on failure.
  5590. */
  5591. int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
  5592. {
  5593. int rc;
  5594. /*
  5595. * disable link pm on all ports before requesting
  5596. * any pm activity
  5597. */
  5598. ata_lpm_enable(host);
  5599. rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
  5600. if (rc == 0)
  5601. host->dev->power.power_state = mesg;
  5602. return rc;
  5603. }
  5604. /**
  5605. * ata_host_resume - resume host
  5606. * @host: host to resume
  5607. *
  5608. * Resume @host. Actual operation is performed by EH. This
  5609. * function requests EH to perform PM operations and returns.
  5610. * Note that all resume operations are performed parallely.
  5611. *
  5612. * LOCKING:
  5613. * Kernel thread context (may sleep).
  5614. */
  5615. void ata_host_resume(struct ata_host *host)
  5616. {
  5617. ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
  5618. ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
  5619. host->dev->power.power_state = PMSG_ON;
  5620. /* reenable link pm */
  5621. ata_lpm_disable(host);
  5622. }
  5623. #endif
  5624. /**
  5625. * ata_port_start - Set port up for dma.
  5626. * @ap: Port to initialize
  5627. *
  5628. * Called just after data structures for each port are
  5629. * initialized. Allocates space for PRD table.
  5630. *
  5631. * May be used as the port_start() entry in ata_port_operations.
  5632. *
  5633. * LOCKING:
  5634. * Inherited from caller.
  5635. */
  5636. int ata_port_start(struct ata_port *ap)
  5637. {
  5638. struct device *dev = ap->dev;
  5639. int rc;
  5640. ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
  5641. GFP_KERNEL);
  5642. if (!ap->prd)
  5643. return -ENOMEM;
  5644. rc = ata_pad_alloc(ap, dev);
  5645. if (rc)
  5646. return rc;
  5647. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
  5648. (unsigned long long)ap->prd_dma);
  5649. return 0;
  5650. }
  5651. /**
  5652. * ata_dev_init - Initialize an ata_device structure
  5653. * @dev: Device structure to initialize
  5654. *
  5655. * Initialize @dev in preparation for probing.
  5656. *
  5657. * LOCKING:
  5658. * Inherited from caller.
  5659. */
  5660. void ata_dev_init(struct ata_device *dev)
  5661. {
  5662. struct ata_link *link = dev->link;
  5663. struct ata_port *ap = link->ap;
  5664. unsigned long flags;
  5665. /* SATA spd limit is bound to the first device */
  5666. link->sata_spd_limit = link->hw_sata_spd_limit;
  5667. link->sata_spd = 0;
  5668. /* High bits of dev->flags are used to record warm plug
  5669. * requests which occur asynchronously. Synchronize using
  5670. * host lock.
  5671. */
  5672. spin_lock_irqsave(ap->lock, flags);
  5673. dev->flags &= ~ATA_DFLAG_INIT_MASK;
  5674. dev->horkage = 0;
  5675. spin_unlock_irqrestore(ap->lock, flags);
  5676. memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
  5677. sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
  5678. dev->pio_mask = UINT_MAX;
  5679. dev->mwdma_mask = UINT_MAX;
  5680. dev->udma_mask = UINT_MAX;
  5681. }
  5682. /**
  5683. * ata_link_init - Initialize an ata_link structure
  5684. * @ap: ATA port link is attached to
  5685. * @link: Link structure to initialize
  5686. * @pmp: Port multiplier port number
  5687. *
  5688. * Initialize @link.
  5689. *
  5690. * LOCKING:
  5691. * Kernel thread context (may sleep)
  5692. */
  5693. void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
  5694. {
  5695. int i;
  5696. /* clear everything except for devices */
  5697. memset(link, 0, offsetof(struct ata_link, device[0]));
  5698. link->ap = ap;
  5699. link->pmp = pmp;
  5700. link->active_tag = ATA_TAG_POISON;
  5701. link->hw_sata_spd_limit = UINT_MAX;
  5702. /* can't use iterator, ap isn't initialized yet */
  5703. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  5704. struct ata_device *dev = &link->device[i];
  5705. dev->link = link;
  5706. dev->devno = dev - link->device;
  5707. ata_dev_init(dev);
  5708. }
  5709. }
  5710. /**
  5711. * sata_link_init_spd - Initialize link->sata_spd_limit
  5712. * @link: Link to configure sata_spd_limit for
  5713. *
  5714. * Initialize @link->[hw_]sata_spd_limit to the currently
  5715. * configured value.
  5716. *
  5717. * LOCKING:
  5718. * Kernel thread context (may sleep).
  5719. *
  5720. * RETURNS:
  5721. * 0 on success, -errno on failure.
  5722. */
  5723. int sata_link_init_spd(struct ata_link *link)
  5724. {
  5725. u32 scontrol, spd;
  5726. int rc;
  5727. rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
  5728. if (rc)
  5729. return rc;
  5730. spd = (scontrol >> 4) & 0xf;
  5731. if (spd)
  5732. link->hw_sata_spd_limit &= (1 << spd) - 1;
  5733. link->sata_spd_limit = link->hw_sata_spd_limit;
  5734. return 0;
  5735. }
  5736. /**
  5737. * ata_port_alloc - allocate and initialize basic ATA port resources
  5738. * @host: ATA host this allocated port belongs to
  5739. *
  5740. * Allocate and initialize basic ATA port resources.
  5741. *
  5742. * RETURNS:
  5743. * Allocate ATA port on success, NULL on failure.
  5744. *
  5745. * LOCKING:
  5746. * Inherited from calling layer (may sleep).
  5747. */
  5748. struct ata_port *ata_port_alloc(struct ata_host *host)
  5749. {
  5750. struct ata_port *ap;
  5751. DPRINTK("ENTER\n");
  5752. ap = kzalloc(sizeof(*ap), GFP_KERNEL);
  5753. if (!ap)
  5754. return NULL;
  5755. ap->pflags |= ATA_PFLAG_INITIALIZING;
  5756. ap->lock = &host->lock;
  5757. ap->flags = ATA_FLAG_DISABLED;
  5758. ap->print_id = -1;
  5759. ap->ctl = ATA_DEVCTL_OBS;
  5760. ap->host = host;
  5761. ap->dev = host->dev;
  5762. ap->last_ctl = 0xFF;
  5763. #if defined(ATA_VERBOSE_DEBUG)
  5764. /* turn on all debugging levels */
  5765. ap->msg_enable = 0x00FF;
  5766. #elif defined(ATA_DEBUG)
  5767. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
  5768. #else
  5769. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
  5770. #endif
  5771. INIT_DELAYED_WORK(&ap->port_task, NULL);
  5772. INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
  5773. INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
  5774. INIT_LIST_HEAD(&ap->eh_done_q);
  5775. init_waitqueue_head(&ap->eh_wait_q);
  5776. init_timer_deferrable(&ap->fastdrain_timer);
  5777. ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
  5778. ap->fastdrain_timer.data = (unsigned long)ap;
  5779. ap->cbl = ATA_CBL_NONE;
  5780. ata_link_init(ap, &ap->link, 0);
  5781. #ifdef ATA_IRQ_TRAP
  5782. ap->stats.unhandled_irq = 1;
  5783. ap->stats.idle_irq = 1;
  5784. #endif
  5785. return ap;
  5786. }
  5787. static void ata_host_release(struct device *gendev, void *res)
  5788. {
  5789. struct ata_host *host = dev_get_drvdata(gendev);
  5790. int i;
  5791. for (i = 0; i < host->n_ports; i++) {
  5792. struct ata_port *ap = host->ports[i];
  5793. if (!ap)
  5794. continue;
  5795. if (ap->scsi_host)
  5796. scsi_host_put(ap->scsi_host);
  5797. kfree(ap->pmp_link);
  5798. kfree(ap);
  5799. host->ports[i] = NULL;
  5800. }
  5801. dev_set_drvdata(gendev, NULL);
  5802. }
  5803. /**
  5804. * ata_host_alloc - allocate and init basic ATA host resources
  5805. * @dev: generic device this host is associated with
  5806. * @max_ports: maximum number of ATA ports associated with this host
  5807. *
  5808. * Allocate and initialize basic ATA host resources. LLD calls
  5809. * this function to allocate a host, initializes it fully and
  5810. * attaches it using ata_host_register().
  5811. *
  5812. * @max_ports ports are allocated and host->n_ports is
  5813. * initialized to @max_ports. The caller is allowed to decrease
  5814. * host->n_ports before calling ata_host_register(). The unused
  5815. * ports will be automatically freed on registration.
  5816. *
  5817. * RETURNS:
  5818. * Allocate ATA host on success, NULL on failure.
  5819. *
  5820. * LOCKING:
  5821. * Inherited from calling layer (may sleep).
  5822. */
  5823. struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
  5824. {
  5825. struct ata_host *host;
  5826. size_t sz;
  5827. int i;
  5828. DPRINTK("ENTER\n");
  5829. if (!devres_open_group(dev, NULL, GFP_KERNEL))
  5830. return NULL;
  5831. /* alloc a container for our list of ATA ports (buses) */
  5832. sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
  5833. /* alloc a container for our list of ATA ports (buses) */
  5834. host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
  5835. if (!host)
  5836. goto err_out;
  5837. devres_add(dev, host);
  5838. dev_set_drvdata(dev, host);
  5839. spin_lock_init(&host->lock);
  5840. host->dev = dev;
  5841. host->n_ports = max_ports;
  5842. /* allocate ports bound to this host */
  5843. for (i = 0; i < max_ports; i++) {
  5844. struct ata_port *ap;
  5845. ap = ata_port_alloc(host);
  5846. if (!ap)
  5847. goto err_out;
  5848. ap->port_no = i;
  5849. host->ports[i] = ap;
  5850. }
  5851. devres_remove_group(dev, NULL);
  5852. return host;
  5853. err_out:
  5854. devres_release_group(dev, NULL);
  5855. return NULL;
  5856. }
  5857. /**
  5858. * ata_host_alloc_pinfo - alloc host and init with port_info array
  5859. * @dev: generic device this host is associated with
  5860. * @ppi: array of ATA port_info to initialize host with
  5861. * @n_ports: number of ATA ports attached to this host
  5862. *
  5863. * Allocate ATA host and initialize with info from @ppi. If NULL
  5864. * terminated, @ppi may contain fewer entries than @n_ports. The
  5865. * last entry will be used for the remaining ports.
  5866. *
  5867. * RETURNS:
  5868. * Allocate ATA host on success, NULL on failure.
  5869. *
  5870. * LOCKING:
  5871. * Inherited from calling layer (may sleep).
  5872. */
  5873. struct ata_host *ata_host_alloc_pinfo(struct device *dev,
  5874. const struct ata_port_info * const * ppi,
  5875. int n_ports)
  5876. {
  5877. const struct ata_port_info *pi;
  5878. struct ata_host *host;
  5879. int i, j;
  5880. host = ata_host_alloc(dev, n_ports);
  5881. if (!host)
  5882. return NULL;
  5883. for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
  5884. struct ata_port *ap = host->ports[i];
  5885. if (ppi[j])
  5886. pi = ppi[j++];
  5887. ap->pio_mask = pi->pio_mask;
  5888. ap->mwdma_mask = pi->mwdma_mask;
  5889. ap->udma_mask = pi->udma_mask;
  5890. ap->flags |= pi->flags;
  5891. ap->link.flags |= pi->link_flags;
  5892. ap->ops = pi->port_ops;
  5893. if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
  5894. host->ops = pi->port_ops;
  5895. if (!host->private_data && pi->private_data)
  5896. host->private_data = pi->private_data;
  5897. }
  5898. return host;
  5899. }
  5900. static void ata_host_stop(struct device *gendev, void *res)
  5901. {
  5902. struct ata_host *host = dev_get_drvdata(gendev);
  5903. int i;
  5904. WARN_ON(!(host->flags & ATA_HOST_STARTED));
  5905. for (i = 0; i < host->n_ports; i++) {
  5906. struct ata_port *ap = host->ports[i];
  5907. if (ap->ops->port_stop)
  5908. ap->ops->port_stop(ap);
  5909. }
  5910. if (host->ops->host_stop)
  5911. host->ops->host_stop(host);
  5912. }
  5913. /**
  5914. * ata_host_start - start and freeze ports of an ATA host
  5915. * @host: ATA host to start ports for
  5916. *
  5917. * Start and then freeze ports of @host. Started status is
  5918. * recorded in host->flags, so this function can be called
  5919. * multiple times. Ports are guaranteed to get started only
  5920. * once. If host->ops isn't initialized yet, its set to the
  5921. * first non-dummy port ops.
  5922. *
  5923. * LOCKING:
  5924. * Inherited from calling layer (may sleep).
  5925. *
  5926. * RETURNS:
  5927. * 0 if all ports are started successfully, -errno otherwise.
  5928. */
  5929. int ata_host_start(struct ata_host *host)
  5930. {
  5931. int have_stop = 0;
  5932. void *start_dr = NULL;
  5933. int i, rc;
  5934. if (host->flags & ATA_HOST_STARTED)
  5935. return 0;
  5936. for (i = 0; i < host->n_ports; i++) {
  5937. struct ata_port *ap = host->ports[i];
  5938. if (!host->ops && !ata_port_is_dummy(ap))
  5939. host->ops = ap->ops;
  5940. if (ap->ops->port_stop)
  5941. have_stop = 1;
  5942. }
  5943. if (host->ops->host_stop)
  5944. have_stop = 1;
  5945. if (have_stop) {
  5946. start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
  5947. if (!start_dr)
  5948. return -ENOMEM;
  5949. }
  5950. for (i = 0; i < host->n_ports; i++) {
  5951. struct ata_port *ap = host->ports[i];
  5952. if (ap->ops->port_start) {
  5953. rc = ap->ops->port_start(ap);
  5954. if (rc) {
  5955. ata_port_printk(ap, KERN_ERR, "failed to "
  5956. "start port (errno=%d)\n", rc);
  5957. goto err_out;
  5958. }
  5959. }
  5960. ata_eh_freeze_port(ap);
  5961. }
  5962. if (start_dr)
  5963. devres_add(host->dev, start_dr);
  5964. host->flags |= ATA_HOST_STARTED;
  5965. return 0;
  5966. err_out:
  5967. while (--i >= 0) {
  5968. struct ata_port *ap = host->ports[i];
  5969. if (ap->ops->port_stop)
  5970. ap->ops->port_stop(ap);
  5971. }
  5972. devres_free(start_dr);
  5973. return rc;
  5974. }
  5975. /**
  5976. * ata_sas_host_init - Initialize a host struct
  5977. * @host: host to initialize
  5978. * @dev: device host is attached to
  5979. * @flags: host flags
  5980. * @ops: port_ops
  5981. *
  5982. * LOCKING:
  5983. * PCI/etc. bus probe sem.
  5984. *
  5985. */
  5986. /* KILLME - the only user left is ipr */
  5987. void ata_host_init(struct ata_host *host, struct device *dev,
  5988. unsigned long flags, const struct ata_port_operations *ops)
  5989. {
  5990. spin_lock_init(&host->lock);
  5991. host->dev = dev;
  5992. host->flags = flags;
  5993. host->ops = ops;
  5994. }
  5995. /**
  5996. * ata_host_register - register initialized ATA host
  5997. * @host: ATA host to register
  5998. * @sht: template for SCSI host
  5999. *
  6000. * Register initialized ATA host. @host is allocated using
  6001. * ata_host_alloc() and fully initialized by LLD. This function
  6002. * starts ports, registers @host with ATA and SCSI layers and
  6003. * probe registered devices.
  6004. *
  6005. * LOCKING:
  6006. * Inherited from calling layer (may sleep).
  6007. *
  6008. * RETURNS:
  6009. * 0 on success, -errno otherwise.
  6010. */
  6011. int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
  6012. {
  6013. int i, rc;
  6014. /* host must have been started */
  6015. if (!(host->flags & ATA_HOST_STARTED)) {
  6016. dev_printk(KERN_ERR, host->dev,
  6017. "BUG: trying to register unstarted host\n");
  6018. WARN_ON(1);
  6019. return -EINVAL;
  6020. }
  6021. /* Blow away unused ports. This happens when LLD can't
  6022. * determine the exact number of ports to allocate at
  6023. * allocation time.
  6024. */
  6025. for (i = host->n_ports; host->ports[i]; i++)
  6026. kfree(host->ports[i]);
  6027. /* give ports names and add SCSI hosts */
  6028. for (i = 0; i < host->n_ports; i++)
  6029. host->ports[i]->print_id = ata_print_id++;
  6030. rc = ata_scsi_add_hosts(host, sht);
  6031. if (rc)
  6032. return rc;
  6033. /* associate with ACPI nodes */
  6034. ata_acpi_associate(host);
  6035. /* set cable, sata_spd_limit and report */
  6036. for (i = 0; i < host->n_ports; i++) {
  6037. struct ata_port *ap = host->ports[i];
  6038. unsigned long xfer_mask;
  6039. /* set SATA cable type if still unset */
  6040. if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
  6041. ap->cbl = ATA_CBL_SATA;
  6042. /* init sata_spd_limit to the current value */
  6043. sata_link_init_spd(&ap->link);
  6044. /* print per-port info to dmesg */
  6045. xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
  6046. ap->udma_mask);
  6047. if (!ata_port_is_dummy(ap)) {
  6048. ata_port_printk(ap, KERN_INFO,
  6049. "%cATA max %s %s\n",
  6050. (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
  6051. ata_mode_string(xfer_mask),
  6052. ap->link.eh_info.desc);
  6053. ata_ehi_clear_desc(&ap->link.eh_info);
  6054. } else
  6055. ata_port_printk(ap, KERN_INFO, "DUMMY\n");
  6056. }
  6057. /* perform each probe synchronously */
  6058. DPRINTK("probe begin\n");
  6059. for (i = 0; i < host->n_ports; i++) {
  6060. struct ata_port *ap = host->ports[i];
  6061. int rc;
  6062. /* probe */
  6063. if (ap->ops->error_handler) {
  6064. struct ata_eh_info *ehi = &ap->link.eh_info;
  6065. unsigned long flags;
  6066. ata_port_probe(ap);
  6067. /* kick EH for boot probing */
  6068. spin_lock_irqsave(ap->lock, flags);
  6069. ehi->probe_mask =
  6070. (1 << ata_link_max_devices(&ap->link)) - 1;
  6071. ehi->action |= ATA_EH_SOFTRESET;
  6072. ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
  6073. ap->pflags &= ~ATA_PFLAG_INITIALIZING;
  6074. ap->pflags |= ATA_PFLAG_LOADING;
  6075. ata_port_schedule_eh(ap);
  6076. spin_unlock_irqrestore(ap->lock, flags);
  6077. /* wait for EH to finish */
  6078. ata_port_wait_eh(ap);
  6079. } else {
  6080. DPRINTK("ata%u: bus probe begin\n", ap->print_id);
  6081. rc = ata_bus_probe(ap);
  6082. DPRINTK("ata%u: bus probe end\n", ap->print_id);
  6083. if (rc) {
  6084. /* FIXME: do something useful here?
  6085. * Current libata behavior will
  6086. * tear down everything when
  6087. * the module is removed
  6088. * or the h/w is unplugged.
  6089. */
  6090. }
  6091. }
  6092. }
  6093. /* probes are done, now scan each port's disk(s) */
  6094. DPRINTK("host probe begin\n");
  6095. for (i = 0; i < host->n_ports; i++) {
  6096. struct ata_port *ap = host->ports[i];
  6097. ata_scsi_scan_host(ap, 1);
  6098. ata_lpm_schedule(ap, ap->pm_policy);
  6099. }
  6100. return 0;
  6101. }
  6102. /**
  6103. * ata_host_activate - start host, request IRQ and register it
  6104. * @host: target ATA host
  6105. * @irq: IRQ to request
  6106. * @irq_handler: irq_handler used when requesting IRQ
  6107. * @irq_flags: irq_flags used when requesting IRQ
  6108. * @sht: scsi_host_template to use when registering the host
  6109. *
  6110. * After allocating an ATA host and initializing it, most libata
  6111. * LLDs perform three steps to activate the host - start host,
  6112. * request IRQ and register it. This helper takes necessasry
  6113. * arguments and performs the three steps in one go.
  6114. *
  6115. * An invalid IRQ skips the IRQ registration and expects the host to
  6116. * have set polling mode on the port. In this case, @irq_handler
  6117. * should be NULL.
  6118. *
  6119. * LOCKING:
  6120. * Inherited from calling layer (may sleep).
  6121. *
  6122. * RETURNS:
  6123. * 0 on success, -errno otherwise.
  6124. */
  6125. int ata_host_activate(struct ata_host *host, int irq,
  6126. irq_handler_t irq_handler, unsigned long irq_flags,
  6127. struct scsi_host_template *sht)
  6128. {
  6129. int i, rc;
  6130. rc = ata_host_start(host);
  6131. if (rc)
  6132. return rc;
  6133. /* Special case for polling mode */
  6134. if (!irq) {
  6135. WARN_ON(irq_handler);
  6136. return ata_host_register(host, sht);
  6137. }
  6138. rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
  6139. dev_driver_string(host->dev), host);
  6140. if (rc)
  6141. return rc;
  6142. for (i = 0; i < host->n_ports; i++)
  6143. ata_port_desc(host->ports[i], "irq %d", irq);
  6144. rc = ata_host_register(host, sht);
  6145. /* if failed, just free the IRQ and leave ports alone */
  6146. if (rc)
  6147. devm_free_irq(host->dev, irq, host);
  6148. return rc;
  6149. }
  6150. /**
  6151. * ata_port_detach - Detach ATA port in prepration of device removal
  6152. * @ap: ATA port to be detached
  6153. *
  6154. * Detach all ATA devices and the associated SCSI devices of @ap;
  6155. * then, remove the associated SCSI host. @ap is guaranteed to
  6156. * be quiescent on return from this function.
  6157. *
  6158. * LOCKING:
  6159. * Kernel thread context (may sleep).
  6160. */
  6161. static void ata_port_detach(struct ata_port *ap)
  6162. {
  6163. unsigned long flags;
  6164. struct ata_link *link;
  6165. struct ata_device *dev;
  6166. if (!ap->ops->error_handler)
  6167. goto skip_eh;
  6168. /* tell EH we're leaving & flush EH */
  6169. spin_lock_irqsave(ap->lock, flags);
  6170. ap->pflags |= ATA_PFLAG_UNLOADING;
  6171. spin_unlock_irqrestore(ap->lock, flags);
  6172. ata_port_wait_eh(ap);
  6173. /* EH is now guaranteed to see UNLOADING, so no new device
  6174. * will be attached. Disable all existing devices.
  6175. */
  6176. spin_lock_irqsave(ap->lock, flags);
  6177. ata_port_for_each_link(link, ap) {
  6178. ata_link_for_each_dev(dev, link)
  6179. ata_dev_disable(dev);
  6180. }
  6181. spin_unlock_irqrestore(ap->lock, flags);
  6182. /* Final freeze & EH. All in-flight commands are aborted. EH
  6183. * will be skipped and retrials will be terminated with bad
  6184. * target.
  6185. */
  6186. spin_lock_irqsave(ap->lock, flags);
  6187. ata_port_freeze(ap); /* won't be thawed */
  6188. spin_unlock_irqrestore(ap->lock, flags);
  6189. ata_port_wait_eh(ap);
  6190. cancel_rearming_delayed_work(&ap->hotplug_task);
  6191. skip_eh:
  6192. /* remove the associated SCSI host */
  6193. scsi_remove_host(ap->scsi_host);
  6194. }
  6195. /**
  6196. * ata_host_detach - Detach all ports of an ATA host
  6197. * @host: Host to detach
  6198. *
  6199. * Detach all ports of @host.
  6200. *
  6201. * LOCKING:
  6202. * Kernel thread context (may sleep).
  6203. */
  6204. void ata_host_detach(struct ata_host *host)
  6205. {
  6206. int i;
  6207. for (i = 0; i < host->n_ports; i++)
  6208. ata_port_detach(host->ports[i]);
  6209. }
  6210. /**
  6211. * ata_std_ports - initialize ioaddr with standard port offsets.
  6212. * @ioaddr: IO address structure to be initialized
  6213. *
  6214. * Utility function which initializes data_addr, error_addr,
  6215. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  6216. * device_addr, status_addr, and command_addr to standard offsets
  6217. * relative to cmd_addr.
  6218. *
  6219. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  6220. */
  6221. void ata_std_ports(struct ata_ioports *ioaddr)
  6222. {
  6223. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  6224. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  6225. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  6226. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  6227. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  6228. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  6229. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  6230. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  6231. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  6232. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  6233. }
  6234. #ifdef CONFIG_PCI
  6235. /**
  6236. * ata_pci_remove_one - PCI layer callback for device removal
  6237. * @pdev: PCI device that was removed
  6238. *
  6239. * PCI layer indicates to libata via this hook that hot-unplug or
  6240. * module unload event has occurred. Detach all ports. Resource
  6241. * release is handled via devres.
  6242. *
  6243. * LOCKING:
  6244. * Inherited from PCI layer (may sleep).
  6245. */
  6246. void ata_pci_remove_one(struct pci_dev *pdev)
  6247. {
  6248. struct device *dev = &pdev->dev;
  6249. struct ata_host *host = dev_get_drvdata(dev);
  6250. ata_host_detach(host);
  6251. }
  6252. /* move to PCI subsystem */
  6253. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  6254. {
  6255. unsigned long tmp = 0;
  6256. switch (bits->width) {
  6257. case 1: {
  6258. u8 tmp8 = 0;
  6259. pci_read_config_byte(pdev, bits->reg, &tmp8);
  6260. tmp = tmp8;
  6261. break;
  6262. }
  6263. case 2: {
  6264. u16 tmp16 = 0;
  6265. pci_read_config_word(pdev, bits->reg, &tmp16);
  6266. tmp = tmp16;
  6267. break;
  6268. }
  6269. case 4: {
  6270. u32 tmp32 = 0;
  6271. pci_read_config_dword(pdev, bits->reg, &tmp32);
  6272. tmp = tmp32;
  6273. break;
  6274. }
  6275. default:
  6276. return -EINVAL;
  6277. }
  6278. tmp &= bits->mask;
  6279. return (tmp == bits->val) ? 1 : 0;
  6280. }
  6281. #ifdef CONFIG_PM
  6282. void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
  6283. {
  6284. pci_save_state(pdev);
  6285. pci_disable_device(pdev);
  6286. if (mesg.event == PM_EVENT_SUSPEND)
  6287. pci_set_power_state(pdev, PCI_D3hot);
  6288. }
  6289. int ata_pci_device_do_resume(struct pci_dev *pdev)
  6290. {
  6291. int rc;
  6292. pci_set_power_state(pdev, PCI_D0);
  6293. pci_restore_state(pdev);
  6294. rc = pcim_enable_device(pdev);
  6295. if (rc) {
  6296. dev_printk(KERN_ERR, &pdev->dev,
  6297. "failed to enable device after resume (%d)\n", rc);
  6298. return rc;
  6299. }
  6300. pci_set_master(pdev);
  6301. return 0;
  6302. }
  6303. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
  6304. {
  6305. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  6306. int rc = 0;
  6307. rc = ata_host_suspend(host, mesg);
  6308. if (rc)
  6309. return rc;
  6310. ata_pci_device_do_suspend(pdev, mesg);
  6311. return 0;
  6312. }
  6313. int ata_pci_device_resume(struct pci_dev *pdev)
  6314. {
  6315. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  6316. int rc;
  6317. rc = ata_pci_device_do_resume(pdev);
  6318. if (rc == 0)
  6319. ata_host_resume(host);
  6320. return rc;
  6321. }
  6322. #endif /* CONFIG_PM */
  6323. #endif /* CONFIG_PCI */
  6324. static int __init ata_init(void)
  6325. {
  6326. ata_probe_timeout *= HZ;
  6327. ata_wq = create_workqueue("ata");
  6328. if (!ata_wq)
  6329. return -ENOMEM;
  6330. ata_aux_wq = create_singlethread_workqueue("ata_aux");
  6331. if (!ata_aux_wq) {
  6332. destroy_workqueue(ata_wq);
  6333. return -ENOMEM;
  6334. }
  6335. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  6336. return 0;
  6337. }
  6338. static void __exit ata_exit(void)
  6339. {
  6340. destroy_workqueue(ata_wq);
  6341. destroy_workqueue(ata_aux_wq);
  6342. }
  6343. subsys_initcall(ata_init);
  6344. module_exit(ata_exit);
  6345. static unsigned long ratelimit_time;
  6346. static DEFINE_SPINLOCK(ata_ratelimit_lock);
  6347. int ata_ratelimit(void)
  6348. {
  6349. int rc;
  6350. unsigned long flags;
  6351. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  6352. if (time_after(jiffies, ratelimit_time)) {
  6353. rc = 1;
  6354. ratelimit_time = jiffies + (HZ/5);
  6355. } else
  6356. rc = 0;
  6357. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  6358. return rc;
  6359. }
  6360. /**
  6361. * ata_wait_register - wait until register value changes
  6362. * @reg: IO-mapped register
  6363. * @mask: Mask to apply to read register value
  6364. * @val: Wait condition
  6365. * @interval_msec: polling interval in milliseconds
  6366. * @timeout_msec: timeout in milliseconds
  6367. *
  6368. * Waiting for some bits of register to change is a common
  6369. * operation for ATA controllers. This function reads 32bit LE
  6370. * IO-mapped register @reg and tests for the following condition.
  6371. *
  6372. * (*@reg & mask) != val
  6373. *
  6374. * If the condition is met, it returns; otherwise, the process is
  6375. * repeated after @interval_msec until timeout.
  6376. *
  6377. * LOCKING:
  6378. * Kernel thread context (may sleep)
  6379. *
  6380. * RETURNS:
  6381. * The final register value.
  6382. */
  6383. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  6384. unsigned long interval_msec,
  6385. unsigned long timeout_msec)
  6386. {
  6387. unsigned long timeout;
  6388. u32 tmp;
  6389. tmp = ioread32(reg);
  6390. /* Calculate timeout _after_ the first read to make sure
  6391. * preceding writes reach the controller before starting to
  6392. * eat away the timeout.
  6393. */
  6394. timeout = jiffies + (timeout_msec * HZ) / 1000;
  6395. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  6396. msleep(interval_msec);
  6397. tmp = ioread32(reg);
  6398. }
  6399. return tmp;
  6400. }
  6401. /*
  6402. * Dummy port_ops
  6403. */
  6404. static void ata_dummy_noret(struct ata_port *ap) { }
  6405. static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
  6406. static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
  6407. static u8 ata_dummy_check_status(struct ata_port *ap)
  6408. {
  6409. return ATA_DRDY;
  6410. }
  6411. static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
  6412. {
  6413. return AC_ERR_SYSTEM;
  6414. }
  6415. const struct ata_port_operations ata_dummy_port_ops = {
  6416. .check_status = ata_dummy_check_status,
  6417. .check_altstatus = ata_dummy_check_status,
  6418. .dev_select = ata_noop_dev_select,
  6419. .qc_prep = ata_noop_qc_prep,
  6420. .qc_issue = ata_dummy_qc_issue,
  6421. .freeze = ata_dummy_noret,
  6422. .thaw = ata_dummy_noret,
  6423. .error_handler = ata_dummy_noret,
  6424. .post_internal_cmd = ata_dummy_qc_noret,
  6425. .irq_clear = ata_dummy_noret,
  6426. .port_start = ata_dummy_ret0,
  6427. .port_stop = ata_dummy_noret,
  6428. };
  6429. const struct ata_port_info ata_dummy_port_info = {
  6430. .port_ops = &ata_dummy_port_ops,
  6431. };
  6432. /*
  6433. * libata is essentially a library of internal helper functions for
  6434. * low-level ATA host controller drivers. As such, the API/ABI is
  6435. * likely to change as new drivers are added and updated.
  6436. * Do not depend on ABI/API stability.
  6437. */
  6438. EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
  6439. EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
  6440. EXPORT_SYMBOL_GPL(sata_deb_timing_long);
  6441. EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
  6442. EXPORT_SYMBOL_GPL(ata_dummy_port_info);
  6443. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  6444. EXPORT_SYMBOL_GPL(ata_std_ports);
  6445. EXPORT_SYMBOL_GPL(ata_host_init);
  6446. EXPORT_SYMBOL_GPL(ata_host_alloc);
  6447. EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
  6448. EXPORT_SYMBOL_GPL(ata_host_start);
  6449. EXPORT_SYMBOL_GPL(ata_host_register);
  6450. EXPORT_SYMBOL_GPL(ata_host_activate);
  6451. EXPORT_SYMBOL_GPL(ata_host_detach);
  6452. EXPORT_SYMBOL_GPL(ata_sg_init);
  6453. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  6454. EXPORT_SYMBOL_GPL(ata_hsm_move);
  6455. EXPORT_SYMBOL_GPL(ata_qc_complete);
  6456. EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
  6457. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  6458. EXPORT_SYMBOL_GPL(ata_tf_load);
  6459. EXPORT_SYMBOL_GPL(ata_tf_read);
  6460. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  6461. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  6462. EXPORT_SYMBOL_GPL(sata_print_link_status);
  6463. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  6464. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  6465. EXPORT_SYMBOL_GPL(ata_check_status);
  6466. EXPORT_SYMBOL_GPL(ata_altstatus);
  6467. EXPORT_SYMBOL_GPL(ata_exec_command);
  6468. EXPORT_SYMBOL_GPL(ata_port_start);
  6469. EXPORT_SYMBOL_GPL(ata_sff_port_start);
  6470. EXPORT_SYMBOL_GPL(ata_interrupt);
  6471. EXPORT_SYMBOL_GPL(ata_do_set_mode);
  6472. EXPORT_SYMBOL_GPL(ata_data_xfer);
  6473. EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
  6474. EXPORT_SYMBOL_GPL(ata_std_qc_defer);
  6475. EXPORT_SYMBOL_GPL(ata_qc_prep);
  6476. EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
  6477. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  6478. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  6479. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  6480. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  6481. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  6482. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  6483. EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
  6484. EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
  6485. EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
  6486. EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
  6487. EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
  6488. EXPORT_SYMBOL_GPL(ata_port_probe);
  6489. EXPORT_SYMBOL_GPL(ata_dev_disable);
  6490. EXPORT_SYMBOL_GPL(sata_set_spd);
  6491. EXPORT_SYMBOL_GPL(sata_link_debounce);
  6492. EXPORT_SYMBOL_GPL(sata_link_resume);
  6493. EXPORT_SYMBOL_GPL(ata_bus_reset);
  6494. EXPORT_SYMBOL_GPL(ata_std_prereset);
  6495. EXPORT_SYMBOL_GPL(ata_std_softreset);
  6496. EXPORT_SYMBOL_GPL(sata_link_hardreset);
  6497. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  6498. EXPORT_SYMBOL_GPL(ata_std_postreset);
  6499. EXPORT_SYMBOL_GPL(ata_dev_classify);
  6500. EXPORT_SYMBOL_GPL(ata_dev_pair);
  6501. EXPORT_SYMBOL_GPL(ata_port_disable);
  6502. EXPORT_SYMBOL_GPL(ata_ratelimit);
  6503. EXPORT_SYMBOL_GPL(ata_wait_register);
  6504. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  6505. EXPORT_SYMBOL_GPL(ata_wait_after_reset);
  6506. EXPORT_SYMBOL_GPL(ata_wait_ready);
  6507. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  6508. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  6509. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  6510. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  6511. EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
  6512. EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
  6513. EXPORT_SYMBOL_GPL(ata_host_intr);
  6514. EXPORT_SYMBOL_GPL(sata_scr_valid);
  6515. EXPORT_SYMBOL_GPL(sata_scr_read);
  6516. EXPORT_SYMBOL_GPL(sata_scr_write);
  6517. EXPORT_SYMBOL_GPL(sata_scr_write_flush);
  6518. EXPORT_SYMBOL_GPL(ata_link_online);
  6519. EXPORT_SYMBOL_GPL(ata_link_offline);
  6520. #ifdef CONFIG_PM
  6521. EXPORT_SYMBOL_GPL(ata_host_suspend);
  6522. EXPORT_SYMBOL_GPL(ata_host_resume);
  6523. #endif /* CONFIG_PM */
  6524. EXPORT_SYMBOL_GPL(ata_id_string);
  6525. EXPORT_SYMBOL_GPL(ata_id_c_string);
  6526. EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
  6527. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  6528. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  6529. EXPORT_SYMBOL_GPL(ata_timing_compute);
  6530. EXPORT_SYMBOL_GPL(ata_timing_merge);
  6531. #ifdef CONFIG_PCI
  6532. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  6533. EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
  6534. EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
  6535. EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
  6536. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  6537. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  6538. #ifdef CONFIG_PM
  6539. EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
  6540. EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
  6541. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  6542. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  6543. #endif /* CONFIG_PM */
  6544. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  6545. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  6546. #endif /* CONFIG_PCI */
  6547. EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
  6548. EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
  6549. EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
  6550. EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
  6551. EXPORT_SYMBOL_GPL(sata_pmp_do_eh);
  6552. EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
  6553. EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
  6554. EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
  6555. EXPORT_SYMBOL_GPL(ata_port_desc);
  6556. #ifdef CONFIG_PCI
  6557. EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
  6558. #endif /* CONFIG_PCI */
  6559. EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
  6560. EXPORT_SYMBOL_GPL(ata_link_abort);
  6561. EXPORT_SYMBOL_GPL(ata_port_abort);
  6562. EXPORT_SYMBOL_GPL(ata_port_freeze);
  6563. EXPORT_SYMBOL_GPL(sata_async_notification);
  6564. EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
  6565. EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
  6566. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  6567. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  6568. EXPORT_SYMBOL_GPL(ata_do_eh);
  6569. EXPORT_SYMBOL_GPL(ata_irq_on);
  6570. EXPORT_SYMBOL_GPL(ata_dev_try_classify);
  6571. EXPORT_SYMBOL_GPL(ata_cable_40wire);
  6572. EXPORT_SYMBOL_GPL(ata_cable_80wire);
  6573. EXPORT_SYMBOL_GPL(ata_cable_unknown);
  6574. EXPORT_SYMBOL_GPL(ata_cable_sata);