microcode_amd.c 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401
  1. /*
  2. * AMD CPU Microcode Update Driver for Linux
  3. * Copyright (C) 2008 Advanced Micro Devices Inc.
  4. *
  5. * Author: Peter Oruba <peter.oruba@amd.com>
  6. *
  7. * Based on work by:
  8. * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  9. *
  10. * This driver allows to upgrade microcode on AMD
  11. * family 0x10 and 0x11 processors.
  12. *
  13. * Licensed under the terms of the GNU General Public
  14. * License version 2. See file COPYING for details.
  15. */
  16. #include <linux/capability.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/sched.h>
  20. #include <linux/cpumask.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/vmalloc.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/fs.h>
  28. #include <linux/mutex.h>
  29. #include <linux/cpu.h>
  30. #include <linux/firmware.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/pci.h>
  33. #include <linux/pci_ids.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/msr.h>
  36. #include <asm/processor.h>
  37. #include <asm/microcode.h>
  38. MODULE_DESCRIPTION("AMD Microcode Update Driver");
  39. MODULE_AUTHOR("Peter Oruba");
  40. MODULE_LICENSE("GPL v2");
  41. #define UCODE_MAGIC 0x00414d44
  42. #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
  43. #define UCODE_UCODE_TYPE 0x00000001
  44. struct equiv_cpu_entry {
  45. unsigned int installed_cpu;
  46. unsigned int fixed_errata_mask;
  47. unsigned int fixed_errata_compare;
  48. unsigned int equiv_cpu;
  49. };
  50. struct microcode_header_amd {
  51. unsigned int data_code;
  52. unsigned int patch_id;
  53. unsigned char mc_patch_data_id[2];
  54. unsigned char mc_patch_data_len;
  55. unsigned char init_flag;
  56. unsigned int mc_patch_data_checksum;
  57. unsigned int nb_dev_id;
  58. unsigned int sb_dev_id;
  59. u16 processor_rev_id;
  60. unsigned char nb_rev_id;
  61. unsigned char sb_rev_id;
  62. unsigned char bios_api_rev;
  63. unsigned char reserved1[3];
  64. unsigned int match_reg[8];
  65. };
  66. struct microcode_amd {
  67. struct microcode_header_amd hdr;
  68. unsigned int mpb[0];
  69. };
  70. #define UCODE_MAX_SIZE 2048
  71. #define UCODE_CONTAINER_SECTION_HDR 8
  72. #define UCODE_CONTAINER_HEADER_SIZE 12
  73. /* serialize access to the physical write */
  74. static DEFINE_SPINLOCK(microcode_update_lock);
  75. static struct equiv_cpu_entry *equiv_cpu_table;
  76. static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
  77. {
  78. struct cpuinfo_x86 *c = &cpu_data(cpu);
  79. u32 dummy;
  80. memset(csig, 0, sizeof(*csig));
  81. if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
  82. printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n",
  83. cpu);
  84. return -1;
  85. }
  86. rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy);
  87. printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
  88. csig->rev);
  89. return 0;
  90. }
  91. static int get_matching_microcode(int cpu, void *mc, int rev)
  92. {
  93. struct microcode_header_amd *mc_header = mc;
  94. struct pci_dev *nb_pci_dev, *sb_pci_dev;
  95. unsigned int current_cpu_id;
  96. unsigned int equiv_cpu_id = 0x00;
  97. unsigned int i = 0;
  98. BUG_ON(equiv_cpu_table == NULL);
  99. current_cpu_id = cpuid_eax(0x00000001);
  100. while (equiv_cpu_table[i].installed_cpu != 0) {
  101. if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
  102. equiv_cpu_id = equiv_cpu_table[i].equiv_cpu & 0xffff;
  103. break;
  104. }
  105. i++;
  106. }
  107. if (!equiv_cpu_id) {
  108. printk(KERN_ERR "microcode: CPU%d cpu_id "
  109. "not found in equivalent cpu table\n", cpu);
  110. return 0;
  111. }
  112. if (mc_header->processor_rev_id != equiv_cpu_id) {
  113. printk(KERN_ERR "microcode: CPU%d patch does not match "
  114. "(processor_rev_id: %x, eqiv_cpu_id: %x)\n",
  115. cpu, mc_header->processor_rev_id, equiv_cpu_id);
  116. return 0;
  117. }
  118. /* ucode may be northbridge specific */
  119. if (mc_header->nb_dev_id) {
  120. nb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
  121. (mc_header->nb_dev_id & 0xff),
  122. NULL);
  123. if ((!nb_pci_dev) ||
  124. (mc_header->nb_rev_id != nb_pci_dev->revision)) {
  125. printk(KERN_ERR "microcode: CPU%d NB mismatch\n", cpu);
  126. pci_dev_put(nb_pci_dev);
  127. return 0;
  128. }
  129. pci_dev_put(nb_pci_dev);
  130. }
  131. /* ucode may be southbridge specific */
  132. if (mc_header->sb_dev_id) {
  133. sb_pci_dev = pci_get_device(PCI_VENDOR_ID_AMD,
  134. (mc_header->sb_dev_id & 0xff),
  135. NULL);
  136. if ((!sb_pci_dev) ||
  137. (mc_header->sb_rev_id != sb_pci_dev->revision)) {
  138. printk(KERN_ERR "microcode: CPU%d SB mismatch\n", cpu);
  139. pci_dev_put(sb_pci_dev);
  140. return 0;
  141. }
  142. pci_dev_put(sb_pci_dev);
  143. }
  144. if (mc_header->patch_id <= rev)
  145. return 0;
  146. return 1;
  147. }
  148. static void apply_microcode_amd(int cpu)
  149. {
  150. unsigned long flags;
  151. u32 rev, dummy;
  152. int cpu_num = raw_smp_processor_id();
  153. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  154. struct microcode_amd *mc_amd = uci->mc;
  155. /* We should bind the task to the CPU */
  156. BUG_ON(cpu_num != cpu);
  157. if (mc_amd == NULL)
  158. return;
  159. spin_lock_irqsave(&microcode_update_lock, flags);
  160. wrmsrl(MSR_AMD64_PATCH_LOADER, &mc_amd->hdr.data_code);
  161. /* get patch id after patching */
  162. rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
  163. spin_unlock_irqrestore(&microcode_update_lock, flags);
  164. /* check current patch id and patch's id for match */
  165. if (rev != mc_amd->hdr.patch_id) {
  166. printk(KERN_ERR "microcode: CPU%d update from revision "
  167. "0x%x to 0x%x failed\n", cpu_num,
  168. mc_amd->hdr.patch_id, rev);
  169. return;
  170. }
  171. printk(KERN_INFO "microcode: CPU%d updated from revision "
  172. "0x%x to 0x%x\n",
  173. cpu_num, uci->cpu_sig.rev, mc_amd->hdr.patch_id);
  174. uci->cpu_sig.rev = rev;
  175. }
  176. static int get_ucode_data(void *to, const u8 *from, size_t n)
  177. {
  178. memcpy(to, from, n);
  179. return 0;
  180. }
  181. static void *get_next_ucode(const u8 *buf, unsigned int size,
  182. unsigned int *mc_size)
  183. {
  184. unsigned int total_size;
  185. u8 section_hdr[UCODE_CONTAINER_SECTION_HDR];
  186. void *mc;
  187. if (get_ucode_data(section_hdr, buf, UCODE_CONTAINER_SECTION_HDR))
  188. return NULL;
  189. if (section_hdr[0] != UCODE_UCODE_TYPE) {
  190. printk(KERN_ERR "microcode: error! "
  191. "Wrong microcode payload type field\n");
  192. return NULL;
  193. }
  194. total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8));
  195. printk(KERN_INFO "microcode: size %u, total_size %u\n",
  196. size, total_size);
  197. if (total_size > size || total_size > UCODE_MAX_SIZE) {
  198. printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
  199. return NULL;
  200. }
  201. mc = vmalloc(UCODE_MAX_SIZE);
  202. if (mc) {
  203. memset(mc, 0, UCODE_MAX_SIZE);
  204. if (get_ucode_data(mc, buf + UCODE_CONTAINER_SECTION_HDR,
  205. total_size)) {
  206. vfree(mc);
  207. mc = NULL;
  208. } else
  209. *mc_size = total_size + UCODE_CONTAINER_SECTION_HDR;
  210. }
  211. return mc;
  212. }
  213. static int install_equiv_cpu_table(const u8 *buf)
  214. {
  215. u8 *container_hdr[UCODE_CONTAINER_HEADER_SIZE];
  216. unsigned int *buf_pos = (unsigned int *)container_hdr;
  217. unsigned long size;
  218. if (get_ucode_data(&container_hdr, buf, UCODE_CONTAINER_HEADER_SIZE))
  219. return 0;
  220. size = buf_pos[2];
  221. if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
  222. printk(KERN_ERR "microcode: error! "
  223. "Wrong microcode equivalent cpu table\n");
  224. return 0;
  225. }
  226. equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
  227. if (!equiv_cpu_table) {
  228. printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n");
  229. return 0;
  230. }
  231. buf += UCODE_CONTAINER_HEADER_SIZE;
  232. if (get_ucode_data(equiv_cpu_table, buf, size)) {
  233. vfree(equiv_cpu_table);
  234. return 0;
  235. }
  236. return size + UCODE_CONTAINER_HEADER_SIZE; /* add header length */
  237. }
  238. static void free_equiv_cpu_table(void)
  239. {
  240. if (equiv_cpu_table) {
  241. vfree(equiv_cpu_table);
  242. equiv_cpu_table = NULL;
  243. }
  244. }
  245. static int generic_load_microcode(int cpu, const u8 *data, size_t size)
  246. {
  247. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  248. const u8 *ucode_ptr = data;
  249. void *new_mc = NULL;
  250. void *mc;
  251. int new_rev = uci->cpu_sig.rev;
  252. unsigned int leftover;
  253. unsigned long offset;
  254. offset = install_equiv_cpu_table(ucode_ptr);
  255. if (!offset) {
  256. printk(KERN_ERR "microcode: installing equivalent cpu table failed\n");
  257. return -EINVAL;
  258. }
  259. ucode_ptr += offset;
  260. leftover = size - offset;
  261. while (leftover) {
  262. unsigned int uninitialized_var(mc_size);
  263. struct microcode_header_amd *mc_header;
  264. mc = get_next_ucode(ucode_ptr, leftover, &mc_size);
  265. if (!mc)
  266. break;
  267. mc_header = (struct microcode_header_amd *)mc;
  268. if (get_matching_microcode(cpu, mc, new_rev)) {
  269. if (new_mc)
  270. vfree(new_mc);
  271. new_rev = mc_header->patch_id;
  272. new_mc = mc;
  273. } else
  274. vfree(mc);
  275. ucode_ptr += mc_size;
  276. leftover -= mc_size;
  277. }
  278. if (new_mc) {
  279. if (!leftover) {
  280. if (uci->mc)
  281. vfree(uci->mc);
  282. uci->mc = new_mc;
  283. pr_debug("microcode: CPU%d found a matching microcode "
  284. "update with version 0x%x (current=0x%x)\n",
  285. cpu, new_rev, uci->cpu_sig.rev);
  286. } else
  287. vfree(new_mc);
  288. }
  289. free_equiv_cpu_table();
  290. return (int)leftover;
  291. }
  292. static int request_microcode_fw(int cpu, struct device *device)
  293. {
  294. const char *fw_name = "amd-ucode/microcode_amd.bin";
  295. const struct firmware *firmware;
  296. int ret;
  297. /* We should bind the task to the CPU */
  298. BUG_ON(cpu != raw_smp_processor_id());
  299. ret = request_firmware(&firmware, fw_name, device);
  300. if (ret) {
  301. printk(KERN_ERR "microcode: ucode data file %s load failed\n",
  302. fw_name);
  303. return ret;
  304. }
  305. ret = generic_load_microcode(cpu, firmware->data, firmware->size);
  306. release_firmware(firmware);
  307. return ret;
  308. }
  309. static int request_microcode_user(int cpu, const void __user *buf, size_t size)
  310. {
  311. printk(KERN_WARNING "microcode: AMD microcode update via "
  312. "/dev/cpu/microcode is not supported\n");
  313. return -1;
  314. }
  315. static void microcode_fini_cpu_amd(int cpu)
  316. {
  317. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  318. vfree(uci->mc);
  319. uci->mc = NULL;
  320. }
  321. static struct microcode_ops microcode_amd_ops = {
  322. .request_microcode_user = request_microcode_user,
  323. .request_microcode_fw = request_microcode_fw,
  324. .collect_cpu_info = collect_cpu_info_amd,
  325. .apply_microcode = apply_microcode_amd,
  326. .microcode_fini_cpu = microcode_fini_cpu_amd,
  327. };
  328. struct microcode_ops * __init init_amd_microcode(void)
  329. {
  330. return &microcode_amd_ops;
  331. }