hpsa.c 140 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x3241103C, "Smart Array P212", &SA5_access},
  106. {0x3243103C, "Smart Array P410", &SA5_access},
  107. {0x3245103C, "Smart Array P410i", &SA5_access},
  108. {0x3247103C, "Smart Array P411", &SA5_access},
  109. {0x3249103C, "Smart Array P812", &SA5_access},
  110. {0x324a103C, "Smart Array P712m", &SA5_access},
  111. {0x324b103C, "Smart Array P711m", &SA5_access},
  112. {0x3350103C, "Smart Array", &SA5_access},
  113. {0x3351103C, "Smart Array", &SA5_access},
  114. {0x3352103C, "Smart Array", &SA5_access},
  115. {0x3353103C, "Smart Array", &SA5_access},
  116. {0x3354103C, "Smart Array", &SA5_access},
  117. {0x3355103C, "Smart Array", &SA5_access},
  118. {0x3356103C, "Smart Array", &SA5_access},
  119. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  120. };
  121. static int number_of_controllers;
  122. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  123. static spinlock_t lockup_detector_lock;
  124. static struct task_struct *hpsa_lockup_detector;
  125. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  126. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  127. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  128. static void start_io(struct ctlr_info *h);
  129. #ifdef CONFIG_COMPAT
  130. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  131. #endif
  132. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  133. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  134. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  135. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  136. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  137. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  138. int cmd_type);
  139. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  140. static void hpsa_scan_start(struct Scsi_Host *);
  141. static int hpsa_scan_finished(struct Scsi_Host *sh,
  142. unsigned long elapsed_time);
  143. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  144. int qdepth, int reason);
  145. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  146. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  147. static int hpsa_slave_alloc(struct scsi_device *sdev);
  148. static void hpsa_slave_destroy(struct scsi_device *sdev);
  149. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  150. static int check_for_unit_attention(struct ctlr_info *h,
  151. struct CommandList *c);
  152. static void check_ioctl_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. /* performant mode helper functions */
  155. static void calc_bucket_map(int *bucket, int num_buckets,
  156. int nsgs, int *bucket_map);
  157. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  158. static inline u32 next_command(struct ctlr_info *h);
  159. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  160. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  161. u64 *cfg_offset);
  162. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  163. unsigned long *memory_bar);
  164. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  165. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  166. void __iomem *vaddr, int wait_for_ready);
  167. static inline void finish_cmd(struct CommandList *c);
  168. #define BOARD_NOT_READY 0
  169. #define BOARD_READY 1
  170. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  171. {
  172. unsigned long *priv = shost_priv(sdev->host);
  173. return (struct ctlr_info *) *priv;
  174. }
  175. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  176. {
  177. unsigned long *priv = shost_priv(sh);
  178. return (struct ctlr_info *) *priv;
  179. }
  180. static int check_for_unit_attention(struct ctlr_info *h,
  181. struct CommandList *c)
  182. {
  183. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  184. return 0;
  185. switch (c->err_info->SenseInfo[12]) {
  186. case STATE_CHANGED:
  187. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  188. "detected, command retried\n", h->ctlr);
  189. break;
  190. case LUN_FAILED:
  191. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  192. "detected, action required\n", h->ctlr);
  193. break;
  194. case REPORT_LUNS_CHANGED:
  195. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  196. "changed, action required\n", h->ctlr);
  197. /*
  198. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  199. * target (array) devices.
  200. */
  201. break;
  202. case POWER_OR_RESET:
  203. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  204. "or device reset detected\n", h->ctlr);
  205. break;
  206. case UNIT_ATTENTION_CLEARED:
  207. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  208. "cleared by another initiator\n", h->ctlr);
  209. break;
  210. default:
  211. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  212. "unit attention detected\n", h->ctlr);
  213. break;
  214. }
  215. return 1;
  216. }
  217. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  218. {
  219. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  220. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  221. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  222. return 0;
  223. dev_warn(&h->pdev->dev, HPSA "device busy");
  224. return 1;
  225. }
  226. static ssize_t host_store_rescan(struct device *dev,
  227. struct device_attribute *attr,
  228. const char *buf, size_t count)
  229. {
  230. struct ctlr_info *h;
  231. struct Scsi_Host *shost = class_to_shost(dev);
  232. h = shost_to_hba(shost);
  233. hpsa_scan_start(h->scsi_host);
  234. return count;
  235. }
  236. static ssize_t host_show_firmware_revision(struct device *dev,
  237. struct device_attribute *attr, char *buf)
  238. {
  239. struct ctlr_info *h;
  240. struct Scsi_Host *shost = class_to_shost(dev);
  241. unsigned char *fwrev;
  242. h = shost_to_hba(shost);
  243. if (!h->hba_inquiry_data)
  244. return 0;
  245. fwrev = &h->hba_inquiry_data[32];
  246. return snprintf(buf, 20, "%c%c%c%c\n",
  247. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  248. }
  249. static ssize_t host_show_commands_outstanding(struct device *dev,
  250. struct device_attribute *attr, char *buf)
  251. {
  252. struct Scsi_Host *shost = class_to_shost(dev);
  253. struct ctlr_info *h = shost_to_hba(shost);
  254. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  255. }
  256. static ssize_t host_show_transport_mode(struct device *dev,
  257. struct device_attribute *attr, char *buf)
  258. {
  259. struct ctlr_info *h;
  260. struct Scsi_Host *shost = class_to_shost(dev);
  261. h = shost_to_hba(shost);
  262. return snprintf(buf, 20, "%s\n",
  263. h->transMethod & CFGTBL_Trans_Performant ?
  264. "performant" : "simple");
  265. }
  266. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  267. static u32 unresettable_controller[] = {
  268. 0x324a103C, /* Smart Array P712m */
  269. 0x324b103C, /* SmartArray P711m */
  270. 0x3223103C, /* Smart Array P800 */
  271. 0x3234103C, /* Smart Array P400 */
  272. 0x3235103C, /* Smart Array P400i */
  273. 0x3211103C, /* Smart Array E200i */
  274. 0x3212103C, /* Smart Array E200 */
  275. 0x3213103C, /* Smart Array E200i */
  276. 0x3214103C, /* Smart Array E200i */
  277. 0x3215103C, /* Smart Array E200i */
  278. 0x3237103C, /* Smart Array E500 */
  279. 0x323D103C, /* Smart Array P700m */
  280. 0x40800E11, /* Smart Array 5i */
  281. 0x409C0E11, /* Smart Array 6400 */
  282. 0x409D0E11, /* Smart Array 6400 EM */
  283. 0x40700E11, /* Smart Array 5300 */
  284. 0x40820E11, /* Smart Array 532 */
  285. 0x40830E11, /* Smart Array 5312 */
  286. 0x409A0E11, /* Smart Array 641 */
  287. 0x409B0E11, /* Smart Array 642 */
  288. 0x40910E11, /* Smart Array 6i */
  289. };
  290. /* List of controllers which cannot even be soft reset */
  291. static u32 soft_unresettable_controller[] = {
  292. 0x40800E11, /* Smart Array 5i */
  293. 0x40700E11, /* Smart Array 5300 */
  294. 0x40820E11, /* Smart Array 532 */
  295. 0x40830E11, /* Smart Array 5312 */
  296. 0x409A0E11, /* Smart Array 641 */
  297. 0x409B0E11, /* Smart Array 642 */
  298. 0x40910E11, /* Smart Array 6i */
  299. /* Exclude 640x boards. These are two pci devices in one slot
  300. * which share a battery backed cache module. One controls the
  301. * cache, the other accesses the cache through the one that controls
  302. * it. If we reset the one controlling the cache, the other will
  303. * likely not be happy. Just forbid resetting this conjoined mess.
  304. * The 640x isn't really supported by hpsa anyway.
  305. */
  306. 0x409C0E11, /* Smart Array 6400 */
  307. 0x409D0E11, /* Smart Array 6400 EM */
  308. };
  309. static int ctlr_is_hard_resettable(u32 board_id)
  310. {
  311. int i;
  312. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  313. if (unresettable_controller[i] == board_id)
  314. return 0;
  315. return 1;
  316. }
  317. static int ctlr_is_soft_resettable(u32 board_id)
  318. {
  319. int i;
  320. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  321. if (soft_unresettable_controller[i] == board_id)
  322. return 0;
  323. return 1;
  324. }
  325. static int ctlr_is_resettable(u32 board_id)
  326. {
  327. return ctlr_is_hard_resettable(board_id) ||
  328. ctlr_is_soft_resettable(board_id);
  329. }
  330. static ssize_t host_show_resettable(struct device *dev,
  331. struct device_attribute *attr, char *buf)
  332. {
  333. struct ctlr_info *h;
  334. struct Scsi_Host *shost = class_to_shost(dev);
  335. h = shost_to_hba(shost);
  336. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  337. }
  338. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  339. {
  340. return (scsi3addr[3] & 0xC0) == 0x40;
  341. }
  342. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  343. "UNKNOWN"
  344. };
  345. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  346. static ssize_t raid_level_show(struct device *dev,
  347. struct device_attribute *attr, char *buf)
  348. {
  349. ssize_t l = 0;
  350. unsigned char rlevel;
  351. struct ctlr_info *h;
  352. struct scsi_device *sdev;
  353. struct hpsa_scsi_dev_t *hdev;
  354. unsigned long flags;
  355. sdev = to_scsi_device(dev);
  356. h = sdev_to_hba(sdev);
  357. spin_lock_irqsave(&h->lock, flags);
  358. hdev = sdev->hostdata;
  359. if (!hdev) {
  360. spin_unlock_irqrestore(&h->lock, flags);
  361. return -ENODEV;
  362. }
  363. /* Is this even a logical drive? */
  364. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  365. spin_unlock_irqrestore(&h->lock, flags);
  366. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  367. return l;
  368. }
  369. rlevel = hdev->raid_level;
  370. spin_unlock_irqrestore(&h->lock, flags);
  371. if (rlevel > RAID_UNKNOWN)
  372. rlevel = RAID_UNKNOWN;
  373. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  374. return l;
  375. }
  376. static ssize_t lunid_show(struct device *dev,
  377. struct device_attribute *attr, char *buf)
  378. {
  379. struct ctlr_info *h;
  380. struct scsi_device *sdev;
  381. struct hpsa_scsi_dev_t *hdev;
  382. unsigned long flags;
  383. unsigned char lunid[8];
  384. sdev = to_scsi_device(dev);
  385. h = sdev_to_hba(sdev);
  386. spin_lock_irqsave(&h->lock, flags);
  387. hdev = sdev->hostdata;
  388. if (!hdev) {
  389. spin_unlock_irqrestore(&h->lock, flags);
  390. return -ENODEV;
  391. }
  392. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  393. spin_unlock_irqrestore(&h->lock, flags);
  394. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  395. lunid[0], lunid[1], lunid[2], lunid[3],
  396. lunid[4], lunid[5], lunid[6], lunid[7]);
  397. }
  398. static ssize_t unique_id_show(struct device *dev,
  399. struct device_attribute *attr, char *buf)
  400. {
  401. struct ctlr_info *h;
  402. struct scsi_device *sdev;
  403. struct hpsa_scsi_dev_t *hdev;
  404. unsigned long flags;
  405. unsigned char sn[16];
  406. sdev = to_scsi_device(dev);
  407. h = sdev_to_hba(sdev);
  408. spin_lock_irqsave(&h->lock, flags);
  409. hdev = sdev->hostdata;
  410. if (!hdev) {
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. return -ENODEV;
  413. }
  414. memcpy(sn, hdev->device_id, sizeof(sn));
  415. spin_unlock_irqrestore(&h->lock, flags);
  416. return snprintf(buf, 16 * 2 + 2,
  417. "%02X%02X%02X%02X%02X%02X%02X%02X"
  418. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  419. sn[0], sn[1], sn[2], sn[3],
  420. sn[4], sn[5], sn[6], sn[7],
  421. sn[8], sn[9], sn[10], sn[11],
  422. sn[12], sn[13], sn[14], sn[15]);
  423. }
  424. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  425. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  426. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  427. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  428. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  429. host_show_firmware_revision, NULL);
  430. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  431. host_show_commands_outstanding, NULL);
  432. static DEVICE_ATTR(transport_mode, S_IRUGO,
  433. host_show_transport_mode, NULL);
  434. static DEVICE_ATTR(resettable, S_IRUGO,
  435. host_show_resettable, NULL);
  436. static struct device_attribute *hpsa_sdev_attrs[] = {
  437. &dev_attr_raid_level,
  438. &dev_attr_lunid,
  439. &dev_attr_unique_id,
  440. NULL,
  441. };
  442. static struct device_attribute *hpsa_shost_attrs[] = {
  443. &dev_attr_rescan,
  444. &dev_attr_firmware_revision,
  445. &dev_attr_commands_outstanding,
  446. &dev_attr_transport_mode,
  447. &dev_attr_resettable,
  448. NULL,
  449. };
  450. static struct scsi_host_template hpsa_driver_template = {
  451. .module = THIS_MODULE,
  452. .name = HPSA,
  453. .proc_name = HPSA,
  454. .queuecommand = hpsa_scsi_queue_command,
  455. .scan_start = hpsa_scan_start,
  456. .scan_finished = hpsa_scan_finished,
  457. .change_queue_depth = hpsa_change_queue_depth,
  458. .this_id = -1,
  459. .use_clustering = ENABLE_CLUSTERING,
  460. .eh_abort_handler = hpsa_eh_abort_handler,
  461. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  462. .ioctl = hpsa_ioctl,
  463. .slave_alloc = hpsa_slave_alloc,
  464. .slave_destroy = hpsa_slave_destroy,
  465. #ifdef CONFIG_COMPAT
  466. .compat_ioctl = hpsa_compat_ioctl,
  467. #endif
  468. .sdev_attrs = hpsa_sdev_attrs,
  469. .shost_attrs = hpsa_shost_attrs,
  470. .max_sectors = 8192,
  471. };
  472. /* Enqueuing and dequeuing functions for cmdlists. */
  473. static inline void addQ(struct list_head *list, struct CommandList *c)
  474. {
  475. list_add_tail(&c->list, list);
  476. }
  477. static inline u32 next_command(struct ctlr_info *h)
  478. {
  479. u32 a;
  480. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  481. return h->access.command_completed(h);
  482. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  483. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  484. (h->reply_pool_head)++;
  485. h->commands_outstanding--;
  486. } else {
  487. a = FIFO_EMPTY;
  488. }
  489. /* Check for wraparound */
  490. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  491. h->reply_pool_head = h->reply_pool;
  492. h->reply_pool_wraparound ^= 1;
  493. }
  494. return a;
  495. }
  496. /* set_performant_mode: Modify the tag for cciss performant
  497. * set bit 0 for pull model, bits 3-1 for block fetch
  498. * register number
  499. */
  500. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  501. {
  502. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  503. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  504. }
  505. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  506. struct CommandList *c)
  507. {
  508. unsigned long flags;
  509. set_performant_mode(h, c);
  510. spin_lock_irqsave(&h->lock, flags);
  511. addQ(&h->reqQ, c);
  512. h->Qdepth++;
  513. start_io(h);
  514. spin_unlock_irqrestore(&h->lock, flags);
  515. }
  516. static inline void removeQ(struct CommandList *c)
  517. {
  518. if (WARN_ON(list_empty(&c->list)))
  519. return;
  520. list_del_init(&c->list);
  521. }
  522. static inline int is_hba_lunid(unsigned char scsi3addr[])
  523. {
  524. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  525. }
  526. static inline int is_scsi_rev_5(struct ctlr_info *h)
  527. {
  528. if (!h->hba_inquiry_data)
  529. return 0;
  530. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  531. return 1;
  532. return 0;
  533. }
  534. static int hpsa_find_target_lun(struct ctlr_info *h,
  535. unsigned char scsi3addr[], int bus, int *target, int *lun)
  536. {
  537. /* finds an unused bus, target, lun for a new physical device
  538. * assumes h->devlock is held
  539. */
  540. int i, found = 0;
  541. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  542. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  543. for (i = 0; i < h->ndevices; i++) {
  544. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  545. __set_bit(h->dev[i]->target, lun_taken);
  546. }
  547. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  548. if (i < HPSA_MAX_DEVICES) {
  549. /* *bus = 1; */
  550. *target = i;
  551. *lun = 0;
  552. found = 1;
  553. }
  554. return !found;
  555. }
  556. /* Add an entry into h->dev[] array. */
  557. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  558. struct hpsa_scsi_dev_t *device,
  559. struct hpsa_scsi_dev_t *added[], int *nadded)
  560. {
  561. /* assumes h->devlock is held */
  562. int n = h->ndevices;
  563. int i;
  564. unsigned char addr1[8], addr2[8];
  565. struct hpsa_scsi_dev_t *sd;
  566. if (n >= HPSA_MAX_DEVICES) {
  567. dev_err(&h->pdev->dev, "too many devices, some will be "
  568. "inaccessible.\n");
  569. return -1;
  570. }
  571. /* physical devices do not have lun or target assigned until now. */
  572. if (device->lun != -1)
  573. /* Logical device, lun is already assigned. */
  574. goto lun_assigned;
  575. /* If this device a non-zero lun of a multi-lun device
  576. * byte 4 of the 8-byte LUN addr will contain the logical
  577. * unit no, zero otherise.
  578. */
  579. if (device->scsi3addr[4] == 0) {
  580. /* This is not a non-zero lun of a multi-lun device */
  581. if (hpsa_find_target_lun(h, device->scsi3addr,
  582. device->bus, &device->target, &device->lun) != 0)
  583. return -1;
  584. goto lun_assigned;
  585. }
  586. /* This is a non-zero lun of a multi-lun device.
  587. * Search through our list and find the device which
  588. * has the same 8 byte LUN address, excepting byte 4.
  589. * Assign the same bus and target for this new LUN.
  590. * Use the logical unit number from the firmware.
  591. */
  592. memcpy(addr1, device->scsi3addr, 8);
  593. addr1[4] = 0;
  594. for (i = 0; i < n; i++) {
  595. sd = h->dev[i];
  596. memcpy(addr2, sd->scsi3addr, 8);
  597. addr2[4] = 0;
  598. /* differ only in byte 4? */
  599. if (memcmp(addr1, addr2, 8) == 0) {
  600. device->bus = sd->bus;
  601. device->target = sd->target;
  602. device->lun = device->scsi3addr[4];
  603. break;
  604. }
  605. }
  606. if (device->lun == -1) {
  607. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  608. " suspect firmware bug or unsupported hardware "
  609. "configuration.\n");
  610. return -1;
  611. }
  612. lun_assigned:
  613. h->dev[n] = device;
  614. h->ndevices++;
  615. added[*nadded] = device;
  616. (*nadded)++;
  617. /* initially, (before registering with scsi layer) we don't
  618. * know our hostno and we don't want to print anything first
  619. * time anyway (the scsi layer's inquiries will show that info)
  620. */
  621. /* if (hostno != -1) */
  622. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  623. scsi_device_type(device->devtype), hostno,
  624. device->bus, device->target, device->lun);
  625. return 0;
  626. }
  627. /* Update an entry in h->dev[] array. */
  628. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  629. int entry, struct hpsa_scsi_dev_t *new_entry)
  630. {
  631. /* assumes h->devlock is held */
  632. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  633. /* Raid level changed. */
  634. h->dev[entry]->raid_level = new_entry->raid_level;
  635. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  636. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  637. new_entry->target, new_entry->lun);
  638. }
  639. /* Replace an entry from h->dev[] array. */
  640. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  641. int entry, struct hpsa_scsi_dev_t *new_entry,
  642. struct hpsa_scsi_dev_t *added[], int *nadded,
  643. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  644. {
  645. /* assumes h->devlock is held */
  646. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  647. removed[*nremoved] = h->dev[entry];
  648. (*nremoved)++;
  649. /*
  650. * New physical devices won't have target/lun assigned yet
  651. * so we need to preserve the values in the slot we are replacing.
  652. */
  653. if (new_entry->target == -1) {
  654. new_entry->target = h->dev[entry]->target;
  655. new_entry->lun = h->dev[entry]->lun;
  656. }
  657. h->dev[entry] = new_entry;
  658. added[*nadded] = new_entry;
  659. (*nadded)++;
  660. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  661. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  662. new_entry->target, new_entry->lun);
  663. }
  664. /* Remove an entry from h->dev[] array. */
  665. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  666. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  667. {
  668. /* assumes h->devlock is held */
  669. int i;
  670. struct hpsa_scsi_dev_t *sd;
  671. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  672. sd = h->dev[entry];
  673. removed[*nremoved] = h->dev[entry];
  674. (*nremoved)++;
  675. for (i = entry; i < h->ndevices-1; i++)
  676. h->dev[i] = h->dev[i+1];
  677. h->ndevices--;
  678. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  679. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  680. sd->lun);
  681. }
  682. #define SCSI3ADDR_EQ(a, b) ( \
  683. (a)[7] == (b)[7] && \
  684. (a)[6] == (b)[6] && \
  685. (a)[5] == (b)[5] && \
  686. (a)[4] == (b)[4] && \
  687. (a)[3] == (b)[3] && \
  688. (a)[2] == (b)[2] && \
  689. (a)[1] == (b)[1] && \
  690. (a)[0] == (b)[0])
  691. static void fixup_botched_add(struct ctlr_info *h,
  692. struct hpsa_scsi_dev_t *added)
  693. {
  694. /* called when scsi_add_device fails in order to re-adjust
  695. * h->dev[] to match the mid layer's view.
  696. */
  697. unsigned long flags;
  698. int i, j;
  699. spin_lock_irqsave(&h->lock, flags);
  700. for (i = 0; i < h->ndevices; i++) {
  701. if (h->dev[i] == added) {
  702. for (j = i; j < h->ndevices-1; j++)
  703. h->dev[j] = h->dev[j+1];
  704. h->ndevices--;
  705. break;
  706. }
  707. }
  708. spin_unlock_irqrestore(&h->lock, flags);
  709. kfree(added);
  710. }
  711. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  712. struct hpsa_scsi_dev_t *dev2)
  713. {
  714. /* we compare everything except lun and target as these
  715. * are not yet assigned. Compare parts likely
  716. * to differ first
  717. */
  718. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  719. sizeof(dev1->scsi3addr)) != 0)
  720. return 0;
  721. if (memcmp(dev1->device_id, dev2->device_id,
  722. sizeof(dev1->device_id)) != 0)
  723. return 0;
  724. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  725. return 0;
  726. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  727. return 0;
  728. if (dev1->devtype != dev2->devtype)
  729. return 0;
  730. if (dev1->bus != dev2->bus)
  731. return 0;
  732. return 1;
  733. }
  734. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  735. struct hpsa_scsi_dev_t *dev2)
  736. {
  737. /* Device attributes that can change, but don't mean
  738. * that the device is a different device, nor that the OS
  739. * needs to be told anything about the change.
  740. */
  741. if (dev1->raid_level != dev2->raid_level)
  742. return 1;
  743. return 0;
  744. }
  745. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  746. * and return needle location in *index. If scsi3addr matches, but not
  747. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  748. * location in *index.
  749. * In the case of a minor device attribute change, such as RAID level, just
  750. * return DEVICE_UPDATED, along with the updated device's location in index.
  751. * If needle not found, return DEVICE_NOT_FOUND.
  752. */
  753. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  754. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  755. int *index)
  756. {
  757. int i;
  758. #define DEVICE_NOT_FOUND 0
  759. #define DEVICE_CHANGED 1
  760. #define DEVICE_SAME 2
  761. #define DEVICE_UPDATED 3
  762. for (i = 0; i < haystack_size; i++) {
  763. if (haystack[i] == NULL) /* previously removed. */
  764. continue;
  765. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  766. *index = i;
  767. if (device_is_the_same(needle, haystack[i])) {
  768. if (device_updated(needle, haystack[i]))
  769. return DEVICE_UPDATED;
  770. return DEVICE_SAME;
  771. } else {
  772. return DEVICE_CHANGED;
  773. }
  774. }
  775. }
  776. *index = -1;
  777. return DEVICE_NOT_FOUND;
  778. }
  779. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  780. struct hpsa_scsi_dev_t *sd[], int nsds)
  781. {
  782. /* sd contains scsi3 addresses and devtypes, and inquiry
  783. * data. This function takes what's in sd to be the current
  784. * reality and updates h->dev[] to reflect that reality.
  785. */
  786. int i, entry, device_change, changes = 0;
  787. struct hpsa_scsi_dev_t *csd;
  788. unsigned long flags;
  789. struct hpsa_scsi_dev_t **added, **removed;
  790. int nadded, nremoved;
  791. struct Scsi_Host *sh = NULL;
  792. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  793. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  794. if (!added || !removed) {
  795. dev_warn(&h->pdev->dev, "out of memory in "
  796. "adjust_hpsa_scsi_table\n");
  797. goto free_and_out;
  798. }
  799. spin_lock_irqsave(&h->devlock, flags);
  800. /* find any devices in h->dev[] that are not in
  801. * sd[] and remove them from h->dev[], and for any
  802. * devices which have changed, remove the old device
  803. * info and add the new device info.
  804. * If minor device attributes change, just update
  805. * the existing device structure.
  806. */
  807. i = 0;
  808. nremoved = 0;
  809. nadded = 0;
  810. while (i < h->ndevices) {
  811. csd = h->dev[i];
  812. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  813. if (device_change == DEVICE_NOT_FOUND) {
  814. changes++;
  815. hpsa_scsi_remove_entry(h, hostno, i,
  816. removed, &nremoved);
  817. continue; /* remove ^^^, hence i not incremented */
  818. } else if (device_change == DEVICE_CHANGED) {
  819. changes++;
  820. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  821. added, &nadded, removed, &nremoved);
  822. /* Set it to NULL to prevent it from being freed
  823. * at the bottom of hpsa_update_scsi_devices()
  824. */
  825. sd[entry] = NULL;
  826. } else if (device_change == DEVICE_UPDATED) {
  827. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  828. }
  829. i++;
  830. }
  831. /* Now, make sure every device listed in sd[] is also
  832. * listed in h->dev[], adding them if they aren't found
  833. */
  834. for (i = 0; i < nsds; i++) {
  835. if (!sd[i]) /* if already added above. */
  836. continue;
  837. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  838. h->ndevices, &entry);
  839. if (device_change == DEVICE_NOT_FOUND) {
  840. changes++;
  841. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  842. added, &nadded) != 0)
  843. break;
  844. sd[i] = NULL; /* prevent from being freed later. */
  845. } else if (device_change == DEVICE_CHANGED) {
  846. /* should never happen... */
  847. changes++;
  848. dev_warn(&h->pdev->dev,
  849. "device unexpectedly changed.\n");
  850. /* but if it does happen, we just ignore that device */
  851. }
  852. }
  853. spin_unlock_irqrestore(&h->devlock, flags);
  854. /* Don't notify scsi mid layer of any changes the first time through
  855. * (or if there are no changes) scsi_scan_host will do it later the
  856. * first time through.
  857. */
  858. if (hostno == -1 || !changes)
  859. goto free_and_out;
  860. sh = h->scsi_host;
  861. /* Notify scsi mid layer of any removed devices */
  862. for (i = 0; i < nremoved; i++) {
  863. struct scsi_device *sdev =
  864. scsi_device_lookup(sh, removed[i]->bus,
  865. removed[i]->target, removed[i]->lun);
  866. if (sdev != NULL) {
  867. scsi_remove_device(sdev);
  868. scsi_device_put(sdev);
  869. } else {
  870. /* We don't expect to get here.
  871. * future cmds to this device will get selection
  872. * timeout as if the device was gone.
  873. */
  874. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  875. " for removal.", hostno, removed[i]->bus,
  876. removed[i]->target, removed[i]->lun);
  877. }
  878. kfree(removed[i]);
  879. removed[i] = NULL;
  880. }
  881. /* Notify scsi mid layer of any added devices */
  882. for (i = 0; i < nadded; i++) {
  883. if (scsi_add_device(sh, added[i]->bus,
  884. added[i]->target, added[i]->lun) == 0)
  885. continue;
  886. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  887. "device not added.\n", hostno, added[i]->bus,
  888. added[i]->target, added[i]->lun);
  889. /* now we have to remove it from h->dev,
  890. * since it didn't get added to scsi mid layer
  891. */
  892. fixup_botched_add(h, added[i]);
  893. }
  894. free_and_out:
  895. kfree(added);
  896. kfree(removed);
  897. }
  898. /*
  899. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  900. * Assume's h->devlock is held.
  901. */
  902. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  903. int bus, int target, int lun)
  904. {
  905. int i;
  906. struct hpsa_scsi_dev_t *sd;
  907. for (i = 0; i < h->ndevices; i++) {
  908. sd = h->dev[i];
  909. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  910. return sd;
  911. }
  912. return NULL;
  913. }
  914. /* link sdev->hostdata to our per-device structure. */
  915. static int hpsa_slave_alloc(struct scsi_device *sdev)
  916. {
  917. struct hpsa_scsi_dev_t *sd;
  918. unsigned long flags;
  919. struct ctlr_info *h;
  920. h = sdev_to_hba(sdev);
  921. spin_lock_irqsave(&h->devlock, flags);
  922. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  923. sdev_id(sdev), sdev->lun);
  924. if (sd != NULL)
  925. sdev->hostdata = sd;
  926. spin_unlock_irqrestore(&h->devlock, flags);
  927. return 0;
  928. }
  929. static void hpsa_slave_destroy(struct scsi_device *sdev)
  930. {
  931. /* nothing to do. */
  932. }
  933. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  934. {
  935. int i;
  936. if (!h->cmd_sg_list)
  937. return;
  938. for (i = 0; i < h->nr_cmds; i++) {
  939. kfree(h->cmd_sg_list[i]);
  940. h->cmd_sg_list[i] = NULL;
  941. }
  942. kfree(h->cmd_sg_list);
  943. h->cmd_sg_list = NULL;
  944. }
  945. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  946. {
  947. int i;
  948. if (h->chainsize <= 0)
  949. return 0;
  950. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  951. GFP_KERNEL);
  952. if (!h->cmd_sg_list)
  953. return -ENOMEM;
  954. for (i = 0; i < h->nr_cmds; i++) {
  955. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  956. h->chainsize, GFP_KERNEL);
  957. if (!h->cmd_sg_list[i])
  958. goto clean;
  959. }
  960. return 0;
  961. clean:
  962. hpsa_free_sg_chain_blocks(h);
  963. return -ENOMEM;
  964. }
  965. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  966. struct CommandList *c)
  967. {
  968. struct SGDescriptor *chain_sg, *chain_block;
  969. u64 temp64;
  970. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  971. chain_block = h->cmd_sg_list[c->cmdindex];
  972. chain_sg->Ext = HPSA_SG_CHAIN;
  973. chain_sg->Len = sizeof(*chain_sg) *
  974. (c->Header.SGTotal - h->max_cmd_sg_entries);
  975. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  976. PCI_DMA_TODEVICE);
  977. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  978. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  979. }
  980. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  981. struct CommandList *c)
  982. {
  983. struct SGDescriptor *chain_sg;
  984. union u64bit temp64;
  985. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  986. return;
  987. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  988. temp64.val32.lower = chain_sg->Addr.lower;
  989. temp64.val32.upper = chain_sg->Addr.upper;
  990. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  991. }
  992. static void complete_scsi_command(struct CommandList *cp)
  993. {
  994. struct scsi_cmnd *cmd;
  995. struct ctlr_info *h;
  996. struct ErrorInfo *ei;
  997. unsigned char sense_key;
  998. unsigned char asc; /* additional sense code */
  999. unsigned char ascq; /* additional sense code qualifier */
  1000. unsigned long sense_data_size;
  1001. ei = cp->err_info;
  1002. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1003. h = cp->h;
  1004. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1005. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1006. hpsa_unmap_sg_chain_block(h, cp);
  1007. cmd->result = (DID_OK << 16); /* host byte */
  1008. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1009. cmd->result |= ei->ScsiStatus;
  1010. /* copy the sense data whether we need to or not. */
  1011. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1012. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1013. else
  1014. sense_data_size = sizeof(ei->SenseInfo);
  1015. if (ei->SenseLen < sense_data_size)
  1016. sense_data_size = ei->SenseLen;
  1017. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1018. scsi_set_resid(cmd, ei->ResidualCnt);
  1019. if (ei->CommandStatus == 0) {
  1020. cmd->scsi_done(cmd);
  1021. cmd_free(h, cp);
  1022. return;
  1023. }
  1024. /* an error has occurred */
  1025. switch (ei->CommandStatus) {
  1026. case CMD_TARGET_STATUS:
  1027. if (ei->ScsiStatus) {
  1028. /* Get sense key */
  1029. sense_key = 0xf & ei->SenseInfo[2];
  1030. /* Get additional sense code */
  1031. asc = ei->SenseInfo[12];
  1032. /* Get addition sense code qualifier */
  1033. ascq = ei->SenseInfo[13];
  1034. }
  1035. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1036. if (check_for_unit_attention(h, cp)) {
  1037. cmd->result = DID_SOFT_ERROR << 16;
  1038. break;
  1039. }
  1040. if (sense_key == ILLEGAL_REQUEST) {
  1041. /*
  1042. * SCSI REPORT_LUNS is commonly unsupported on
  1043. * Smart Array. Suppress noisy complaint.
  1044. */
  1045. if (cp->Request.CDB[0] == REPORT_LUNS)
  1046. break;
  1047. /* If ASC/ASCQ indicate Logical Unit
  1048. * Not Supported condition,
  1049. */
  1050. if ((asc == 0x25) && (ascq == 0x0)) {
  1051. dev_warn(&h->pdev->dev, "cp %p "
  1052. "has check condition\n", cp);
  1053. break;
  1054. }
  1055. }
  1056. if (sense_key == NOT_READY) {
  1057. /* If Sense is Not Ready, Logical Unit
  1058. * Not ready, Manual Intervention
  1059. * required
  1060. */
  1061. if ((asc == 0x04) && (ascq == 0x03)) {
  1062. dev_warn(&h->pdev->dev, "cp %p "
  1063. "has check condition: unit "
  1064. "not ready, manual "
  1065. "intervention required\n", cp);
  1066. break;
  1067. }
  1068. }
  1069. if (sense_key == ABORTED_COMMAND) {
  1070. /* Aborted command is retryable */
  1071. dev_warn(&h->pdev->dev, "cp %p "
  1072. "has check condition: aborted command: "
  1073. "ASC: 0x%x, ASCQ: 0x%x\n",
  1074. cp, asc, ascq);
  1075. cmd->result = DID_SOFT_ERROR << 16;
  1076. break;
  1077. }
  1078. /* Must be some other type of check condition */
  1079. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1080. "unknown type: "
  1081. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1082. "Returning result: 0x%x, "
  1083. "cmd=[%02x %02x %02x %02x %02x "
  1084. "%02x %02x %02x %02x %02x %02x "
  1085. "%02x %02x %02x %02x %02x]\n",
  1086. cp, sense_key, asc, ascq,
  1087. cmd->result,
  1088. cmd->cmnd[0], cmd->cmnd[1],
  1089. cmd->cmnd[2], cmd->cmnd[3],
  1090. cmd->cmnd[4], cmd->cmnd[5],
  1091. cmd->cmnd[6], cmd->cmnd[7],
  1092. cmd->cmnd[8], cmd->cmnd[9],
  1093. cmd->cmnd[10], cmd->cmnd[11],
  1094. cmd->cmnd[12], cmd->cmnd[13],
  1095. cmd->cmnd[14], cmd->cmnd[15]);
  1096. break;
  1097. }
  1098. /* Problem was not a check condition
  1099. * Pass it up to the upper layers...
  1100. */
  1101. if (ei->ScsiStatus) {
  1102. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1103. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1104. "Returning result: 0x%x\n",
  1105. cp, ei->ScsiStatus,
  1106. sense_key, asc, ascq,
  1107. cmd->result);
  1108. } else { /* scsi status is zero??? How??? */
  1109. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1110. "Returning no connection.\n", cp),
  1111. /* Ordinarily, this case should never happen,
  1112. * but there is a bug in some released firmware
  1113. * revisions that allows it to happen if, for
  1114. * example, a 4100 backplane loses power and
  1115. * the tape drive is in it. We assume that
  1116. * it's a fatal error of some kind because we
  1117. * can't show that it wasn't. We will make it
  1118. * look like selection timeout since that is
  1119. * the most common reason for this to occur,
  1120. * and it's severe enough.
  1121. */
  1122. cmd->result = DID_NO_CONNECT << 16;
  1123. }
  1124. break;
  1125. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1126. break;
  1127. case CMD_DATA_OVERRUN:
  1128. dev_warn(&h->pdev->dev, "cp %p has"
  1129. " completed with data overrun "
  1130. "reported\n", cp);
  1131. break;
  1132. case CMD_INVALID: {
  1133. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1134. print_cmd(cp); */
  1135. /* We get CMD_INVALID if you address a non-existent device
  1136. * instead of a selection timeout (no response). You will
  1137. * see this if you yank out a drive, then try to access it.
  1138. * This is kind of a shame because it means that any other
  1139. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1140. * missing target. */
  1141. cmd->result = DID_NO_CONNECT << 16;
  1142. }
  1143. break;
  1144. case CMD_PROTOCOL_ERR:
  1145. dev_warn(&h->pdev->dev, "cp %p has "
  1146. "protocol error \n", cp);
  1147. break;
  1148. case CMD_HARDWARE_ERR:
  1149. cmd->result = DID_ERROR << 16;
  1150. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1151. break;
  1152. case CMD_CONNECTION_LOST:
  1153. cmd->result = DID_ERROR << 16;
  1154. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1155. break;
  1156. case CMD_ABORTED:
  1157. cmd->result = DID_ABORT << 16;
  1158. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1159. cp, ei->ScsiStatus);
  1160. break;
  1161. case CMD_ABORT_FAILED:
  1162. cmd->result = DID_ERROR << 16;
  1163. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1164. break;
  1165. case CMD_UNSOLICITED_ABORT:
  1166. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1167. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1168. "abort\n", cp);
  1169. break;
  1170. case CMD_TIMEOUT:
  1171. cmd->result = DID_TIME_OUT << 16;
  1172. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1173. break;
  1174. case CMD_UNABORTABLE:
  1175. cmd->result = DID_ERROR << 16;
  1176. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1177. break;
  1178. default:
  1179. cmd->result = DID_ERROR << 16;
  1180. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1181. cp, ei->CommandStatus);
  1182. }
  1183. cmd->scsi_done(cmd);
  1184. cmd_free(h, cp);
  1185. }
  1186. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1187. struct CommandList *c, int sg_used, int data_direction)
  1188. {
  1189. int i;
  1190. union u64bit addr64;
  1191. for (i = 0; i < sg_used; i++) {
  1192. addr64.val32.lower = c->SG[i].Addr.lower;
  1193. addr64.val32.upper = c->SG[i].Addr.upper;
  1194. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1195. data_direction);
  1196. }
  1197. }
  1198. static void hpsa_map_one(struct pci_dev *pdev,
  1199. struct CommandList *cp,
  1200. unsigned char *buf,
  1201. size_t buflen,
  1202. int data_direction)
  1203. {
  1204. u64 addr64;
  1205. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1206. cp->Header.SGList = 0;
  1207. cp->Header.SGTotal = 0;
  1208. return;
  1209. }
  1210. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1211. cp->SG[0].Addr.lower =
  1212. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1213. cp->SG[0].Addr.upper =
  1214. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1215. cp->SG[0].Len = buflen;
  1216. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1217. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1218. }
  1219. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1220. struct CommandList *c)
  1221. {
  1222. DECLARE_COMPLETION_ONSTACK(wait);
  1223. c->waiting = &wait;
  1224. enqueue_cmd_and_start_io(h, c);
  1225. wait_for_completion(&wait);
  1226. }
  1227. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1228. struct CommandList *c)
  1229. {
  1230. unsigned long flags;
  1231. /* If controller lockup detected, fake a hardware error. */
  1232. spin_lock_irqsave(&h->lock, flags);
  1233. if (unlikely(h->lockup_detected)) {
  1234. spin_unlock_irqrestore(&h->lock, flags);
  1235. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1236. } else {
  1237. spin_unlock_irqrestore(&h->lock, flags);
  1238. hpsa_scsi_do_simple_cmd_core(h, c);
  1239. }
  1240. }
  1241. #define MAX_DRIVER_CMD_RETRIES 25
  1242. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1243. struct CommandList *c, int data_direction)
  1244. {
  1245. int backoff_time = 10, retry_count = 0;
  1246. do {
  1247. memset(c->err_info, 0, sizeof(*c->err_info));
  1248. hpsa_scsi_do_simple_cmd_core(h, c);
  1249. retry_count++;
  1250. if (retry_count > 3) {
  1251. msleep(backoff_time);
  1252. if (backoff_time < 1000)
  1253. backoff_time *= 2;
  1254. }
  1255. } while ((check_for_unit_attention(h, c) ||
  1256. check_for_busy(h, c)) &&
  1257. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1258. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1259. }
  1260. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1261. {
  1262. struct ErrorInfo *ei;
  1263. struct device *d = &cp->h->pdev->dev;
  1264. ei = cp->err_info;
  1265. switch (ei->CommandStatus) {
  1266. case CMD_TARGET_STATUS:
  1267. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1268. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1269. ei->ScsiStatus);
  1270. if (ei->ScsiStatus == 0)
  1271. dev_warn(d, "SCSI status is abnormally zero. "
  1272. "(probably indicates selection timeout "
  1273. "reported incorrectly due to a known "
  1274. "firmware bug, circa July, 2001.)\n");
  1275. break;
  1276. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1277. dev_info(d, "UNDERRUN\n");
  1278. break;
  1279. case CMD_DATA_OVERRUN:
  1280. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1281. break;
  1282. case CMD_INVALID: {
  1283. /* controller unfortunately reports SCSI passthru's
  1284. * to non-existent targets as invalid commands.
  1285. */
  1286. dev_warn(d, "cp %p is reported invalid (probably means "
  1287. "target device no longer present)\n", cp);
  1288. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1289. print_cmd(cp); */
  1290. }
  1291. break;
  1292. case CMD_PROTOCOL_ERR:
  1293. dev_warn(d, "cp %p has protocol error \n", cp);
  1294. break;
  1295. case CMD_HARDWARE_ERR:
  1296. /* cmd->result = DID_ERROR << 16; */
  1297. dev_warn(d, "cp %p had hardware error\n", cp);
  1298. break;
  1299. case CMD_CONNECTION_LOST:
  1300. dev_warn(d, "cp %p had connection lost\n", cp);
  1301. break;
  1302. case CMD_ABORTED:
  1303. dev_warn(d, "cp %p was aborted\n", cp);
  1304. break;
  1305. case CMD_ABORT_FAILED:
  1306. dev_warn(d, "cp %p reports abort failed\n", cp);
  1307. break;
  1308. case CMD_UNSOLICITED_ABORT:
  1309. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1310. break;
  1311. case CMD_TIMEOUT:
  1312. dev_warn(d, "cp %p timed out\n", cp);
  1313. break;
  1314. case CMD_UNABORTABLE:
  1315. dev_warn(d, "Command unabortable\n");
  1316. break;
  1317. default:
  1318. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1319. ei->CommandStatus);
  1320. }
  1321. }
  1322. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1323. unsigned char page, unsigned char *buf,
  1324. unsigned char bufsize)
  1325. {
  1326. int rc = IO_OK;
  1327. struct CommandList *c;
  1328. struct ErrorInfo *ei;
  1329. c = cmd_special_alloc(h);
  1330. if (c == NULL) { /* trouble... */
  1331. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1332. return -ENOMEM;
  1333. }
  1334. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1335. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1336. ei = c->err_info;
  1337. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1338. hpsa_scsi_interpret_error(c);
  1339. rc = -1;
  1340. }
  1341. cmd_special_free(h, c);
  1342. return rc;
  1343. }
  1344. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1345. {
  1346. int rc = IO_OK;
  1347. struct CommandList *c;
  1348. struct ErrorInfo *ei;
  1349. c = cmd_special_alloc(h);
  1350. if (c == NULL) { /* trouble... */
  1351. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1352. return -ENOMEM;
  1353. }
  1354. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1355. hpsa_scsi_do_simple_cmd_core(h, c);
  1356. /* no unmap needed here because no data xfer. */
  1357. ei = c->err_info;
  1358. if (ei->CommandStatus != 0) {
  1359. hpsa_scsi_interpret_error(c);
  1360. rc = -1;
  1361. }
  1362. cmd_special_free(h, c);
  1363. return rc;
  1364. }
  1365. static void hpsa_get_raid_level(struct ctlr_info *h,
  1366. unsigned char *scsi3addr, unsigned char *raid_level)
  1367. {
  1368. int rc;
  1369. unsigned char *buf;
  1370. *raid_level = RAID_UNKNOWN;
  1371. buf = kzalloc(64, GFP_KERNEL);
  1372. if (!buf)
  1373. return;
  1374. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1375. if (rc == 0)
  1376. *raid_level = buf[8];
  1377. if (*raid_level > RAID_UNKNOWN)
  1378. *raid_level = RAID_UNKNOWN;
  1379. kfree(buf);
  1380. return;
  1381. }
  1382. /* Get the device id from inquiry page 0x83 */
  1383. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1384. unsigned char *device_id, int buflen)
  1385. {
  1386. int rc;
  1387. unsigned char *buf;
  1388. if (buflen > 16)
  1389. buflen = 16;
  1390. buf = kzalloc(64, GFP_KERNEL);
  1391. if (!buf)
  1392. return -1;
  1393. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1394. if (rc == 0)
  1395. memcpy(device_id, &buf[8], buflen);
  1396. kfree(buf);
  1397. return rc != 0;
  1398. }
  1399. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1400. struct ReportLUNdata *buf, int bufsize,
  1401. int extended_response)
  1402. {
  1403. int rc = IO_OK;
  1404. struct CommandList *c;
  1405. unsigned char scsi3addr[8];
  1406. struct ErrorInfo *ei;
  1407. c = cmd_special_alloc(h);
  1408. if (c == NULL) { /* trouble... */
  1409. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1410. return -1;
  1411. }
  1412. /* address the controller */
  1413. memset(scsi3addr, 0, sizeof(scsi3addr));
  1414. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1415. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1416. if (extended_response)
  1417. c->Request.CDB[1] = extended_response;
  1418. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1419. ei = c->err_info;
  1420. if (ei->CommandStatus != 0 &&
  1421. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1422. hpsa_scsi_interpret_error(c);
  1423. rc = -1;
  1424. }
  1425. cmd_special_free(h, c);
  1426. return rc;
  1427. }
  1428. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1429. struct ReportLUNdata *buf,
  1430. int bufsize, int extended_response)
  1431. {
  1432. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1433. }
  1434. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1435. struct ReportLUNdata *buf, int bufsize)
  1436. {
  1437. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1438. }
  1439. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1440. int bus, int target, int lun)
  1441. {
  1442. device->bus = bus;
  1443. device->target = target;
  1444. device->lun = lun;
  1445. }
  1446. static int hpsa_update_device_info(struct ctlr_info *h,
  1447. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1448. unsigned char *is_OBDR_device)
  1449. {
  1450. #define OBDR_SIG_OFFSET 43
  1451. #define OBDR_TAPE_SIG "$DR-10"
  1452. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1453. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1454. unsigned char *inq_buff;
  1455. unsigned char *obdr_sig;
  1456. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1457. if (!inq_buff)
  1458. goto bail_out;
  1459. /* Do an inquiry to the device to see what it is. */
  1460. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1461. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1462. /* Inquiry failed (msg printed already) */
  1463. dev_err(&h->pdev->dev,
  1464. "hpsa_update_device_info: inquiry failed\n");
  1465. goto bail_out;
  1466. }
  1467. this_device->devtype = (inq_buff[0] & 0x1f);
  1468. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1469. memcpy(this_device->vendor, &inq_buff[8],
  1470. sizeof(this_device->vendor));
  1471. memcpy(this_device->model, &inq_buff[16],
  1472. sizeof(this_device->model));
  1473. memset(this_device->device_id, 0,
  1474. sizeof(this_device->device_id));
  1475. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1476. sizeof(this_device->device_id));
  1477. if (this_device->devtype == TYPE_DISK &&
  1478. is_logical_dev_addr_mode(scsi3addr))
  1479. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1480. else
  1481. this_device->raid_level = RAID_UNKNOWN;
  1482. if (is_OBDR_device) {
  1483. /* See if this is a One-Button-Disaster-Recovery device
  1484. * by looking for "$DR-10" at offset 43 in inquiry data.
  1485. */
  1486. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1487. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1488. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1489. OBDR_SIG_LEN) == 0);
  1490. }
  1491. kfree(inq_buff);
  1492. return 0;
  1493. bail_out:
  1494. kfree(inq_buff);
  1495. return 1;
  1496. }
  1497. static unsigned char *ext_target_model[] = {
  1498. "MSA2012",
  1499. "MSA2024",
  1500. "MSA2312",
  1501. "MSA2324",
  1502. "P2000 G3 SAS",
  1503. NULL,
  1504. };
  1505. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1506. {
  1507. int i;
  1508. for (i = 0; ext_target_model[i]; i++)
  1509. if (strncmp(device->model, ext_target_model[i],
  1510. strlen(ext_target_model[i])) == 0)
  1511. return 1;
  1512. return 0;
  1513. }
  1514. /* Helper function to assign bus, target, lun mapping of devices.
  1515. * Puts non-external target logical volumes on bus 0, external target logical
  1516. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1517. * Logical drive target and lun are assigned at this time, but
  1518. * physical device lun and target assignment are deferred (assigned
  1519. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1520. */
  1521. static void figure_bus_target_lun(struct ctlr_info *h,
  1522. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1523. {
  1524. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1525. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1526. /* physical device, target and lun filled in later */
  1527. if (is_hba_lunid(lunaddrbytes))
  1528. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1529. else
  1530. /* defer target, lun assignment for physical devices */
  1531. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1532. return;
  1533. }
  1534. /* It's a logical device */
  1535. if (is_ext_target(h, device)) {
  1536. /* external target way, put logicals on bus 1
  1537. * and match target/lun numbers box
  1538. * reports, other smart array, bus 0, target 0, match lunid
  1539. */
  1540. hpsa_set_bus_target_lun(device,
  1541. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1542. return;
  1543. }
  1544. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1545. }
  1546. /*
  1547. * If there is no lun 0 on a target, linux won't find any devices.
  1548. * For the external targets (arrays), we have to manually detect the enclosure
  1549. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1550. * it for some reason. *tmpdevice is the target we're adding,
  1551. * this_device is a pointer into the current element of currentsd[]
  1552. * that we're building up in update_scsi_devices(), below.
  1553. * lunzerobits is a bitmap that tracks which targets already have a
  1554. * lun 0 assigned.
  1555. * Returns 1 if an enclosure was added, 0 if not.
  1556. */
  1557. static int add_ext_target_dev(struct ctlr_info *h,
  1558. struct hpsa_scsi_dev_t *tmpdevice,
  1559. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1560. unsigned long lunzerobits[], int *n_ext_target_devs)
  1561. {
  1562. unsigned char scsi3addr[8];
  1563. if (test_bit(tmpdevice->target, lunzerobits))
  1564. return 0; /* There is already a lun 0 on this target. */
  1565. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1566. return 0; /* It's the logical targets that may lack lun 0. */
  1567. if (!is_ext_target(h, tmpdevice))
  1568. return 0; /* Only external target devices have this problem. */
  1569. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1570. return 0;
  1571. memset(scsi3addr, 0, 8);
  1572. scsi3addr[3] = tmpdevice->target;
  1573. if (is_hba_lunid(scsi3addr))
  1574. return 0; /* Don't add the RAID controller here. */
  1575. if (is_scsi_rev_5(h))
  1576. return 0; /* p1210m doesn't need to do this. */
  1577. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1578. dev_warn(&h->pdev->dev, "Maximum number of external "
  1579. "target devices exceeded. Check your hardware "
  1580. "configuration.");
  1581. return 0;
  1582. }
  1583. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1584. return 0;
  1585. (*n_ext_target_devs)++;
  1586. hpsa_set_bus_target_lun(this_device,
  1587. tmpdevice->bus, tmpdevice->target, 0);
  1588. set_bit(tmpdevice->target, lunzerobits);
  1589. return 1;
  1590. }
  1591. /*
  1592. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1593. * logdev. The number of luns in physdev and logdev are returned in
  1594. * *nphysicals and *nlogicals, respectively.
  1595. * Returns 0 on success, -1 otherwise.
  1596. */
  1597. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1598. int reportlunsize,
  1599. struct ReportLUNdata *physdev, u32 *nphysicals,
  1600. struct ReportLUNdata *logdev, u32 *nlogicals)
  1601. {
  1602. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1603. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1604. return -1;
  1605. }
  1606. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1607. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1608. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1609. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1610. *nphysicals - HPSA_MAX_PHYS_LUN);
  1611. *nphysicals = HPSA_MAX_PHYS_LUN;
  1612. }
  1613. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1614. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1615. return -1;
  1616. }
  1617. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1618. /* Reject Logicals in excess of our max capability. */
  1619. if (*nlogicals > HPSA_MAX_LUN) {
  1620. dev_warn(&h->pdev->dev,
  1621. "maximum logical LUNs (%d) exceeded. "
  1622. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1623. *nlogicals - HPSA_MAX_LUN);
  1624. *nlogicals = HPSA_MAX_LUN;
  1625. }
  1626. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1627. dev_warn(&h->pdev->dev,
  1628. "maximum logical + physical LUNs (%d) exceeded. "
  1629. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1630. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1631. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1632. }
  1633. return 0;
  1634. }
  1635. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1636. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1637. struct ReportLUNdata *logdev_list)
  1638. {
  1639. /* Helper function, figure out where the LUN ID info is coming from
  1640. * given index i, lists of physical and logical devices, where in
  1641. * the list the raid controller is supposed to appear (first or last)
  1642. */
  1643. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1644. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1645. if (i == raid_ctlr_position)
  1646. return RAID_CTLR_LUNID;
  1647. if (i < logicals_start)
  1648. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1649. if (i < last_device)
  1650. return &logdev_list->LUN[i - nphysicals -
  1651. (raid_ctlr_position == 0)][0];
  1652. BUG();
  1653. return NULL;
  1654. }
  1655. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1656. {
  1657. /* the idea here is we could get notified
  1658. * that some devices have changed, so we do a report
  1659. * physical luns and report logical luns cmd, and adjust
  1660. * our list of devices accordingly.
  1661. *
  1662. * The scsi3addr's of devices won't change so long as the
  1663. * adapter is not reset. That means we can rescan and
  1664. * tell which devices we already know about, vs. new
  1665. * devices, vs. disappearing devices.
  1666. */
  1667. struct ReportLUNdata *physdev_list = NULL;
  1668. struct ReportLUNdata *logdev_list = NULL;
  1669. u32 nphysicals = 0;
  1670. u32 nlogicals = 0;
  1671. u32 ndev_allocated = 0;
  1672. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1673. int ncurrent = 0;
  1674. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1675. int i, n_ext_target_devs, ndevs_to_allocate;
  1676. int raid_ctlr_position;
  1677. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1678. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1679. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1680. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1681. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1682. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1683. dev_err(&h->pdev->dev, "out of memory\n");
  1684. goto out;
  1685. }
  1686. memset(lunzerobits, 0, sizeof(lunzerobits));
  1687. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1688. logdev_list, &nlogicals))
  1689. goto out;
  1690. /* We might see up to the maximum number of logical and physical disks
  1691. * plus external target devices, and a device for the local RAID
  1692. * controller.
  1693. */
  1694. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1695. /* Allocate the per device structures */
  1696. for (i = 0; i < ndevs_to_allocate; i++) {
  1697. if (i >= HPSA_MAX_DEVICES) {
  1698. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1699. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1700. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1701. break;
  1702. }
  1703. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1704. if (!currentsd[i]) {
  1705. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1706. __FILE__, __LINE__);
  1707. goto out;
  1708. }
  1709. ndev_allocated++;
  1710. }
  1711. if (unlikely(is_scsi_rev_5(h)))
  1712. raid_ctlr_position = 0;
  1713. else
  1714. raid_ctlr_position = nphysicals + nlogicals;
  1715. /* adjust our table of devices */
  1716. n_ext_target_devs = 0;
  1717. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1718. u8 *lunaddrbytes, is_OBDR = 0;
  1719. /* Figure out where the LUN ID info is coming from */
  1720. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1721. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1722. /* skip masked physical devices. */
  1723. if (lunaddrbytes[3] & 0xC0 &&
  1724. i < nphysicals + (raid_ctlr_position == 0))
  1725. continue;
  1726. /* Get device type, vendor, model, device id */
  1727. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1728. &is_OBDR))
  1729. continue; /* skip it if we can't talk to it. */
  1730. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1731. this_device = currentsd[ncurrent];
  1732. /*
  1733. * For external target devices, we have to insert a LUN 0 which
  1734. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1735. * is nonetheless an enclosure device there. We have to
  1736. * present that otherwise linux won't find anything if
  1737. * there is no lun 0.
  1738. */
  1739. if (add_ext_target_dev(h, tmpdevice, this_device,
  1740. lunaddrbytes, lunzerobits,
  1741. &n_ext_target_devs)) {
  1742. ncurrent++;
  1743. this_device = currentsd[ncurrent];
  1744. }
  1745. *this_device = *tmpdevice;
  1746. switch (this_device->devtype) {
  1747. case TYPE_ROM:
  1748. /* We don't *really* support actual CD-ROM devices,
  1749. * just "One Button Disaster Recovery" tape drive
  1750. * which temporarily pretends to be a CD-ROM drive.
  1751. * So we check that the device is really an OBDR tape
  1752. * device by checking for "$DR-10" in bytes 43-48 of
  1753. * the inquiry data.
  1754. */
  1755. if (is_OBDR)
  1756. ncurrent++;
  1757. break;
  1758. case TYPE_DISK:
  1759. if (i < nphysicals)
  1760. break;
  1761. ncurrent++;
  1762. break;
  1763. case TYPE_TAPE:
  1764. case TYPE_MEDIUM_CHANGER:
  1765. ncurrent++;
  1766. break;
  1767. case TYPE_RAID:
  1768. /* Only present the Smartarray HBA as a RAID controller.
  1769. * If it's a RAID controller other than the HBA itself
  1770. * (an external RAID controller, MSA500 or similar)
  1771. * don't present it.
  1772. */
  1773. if (!is_hba_lunid(lunaddrbytes))
  1774. break;
  1775. ncurrent++;
  1776. break;
  1777. default:
  1778. break;
  1779. }
  1780. if (ncurrent >= HPSA_MAX_DEVICES)
  1781. break;
  1782. }
  1783. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1784. out:
  1785. kfree(tmpdevice);
  1786. for (i = 0; i < ndev_allocated; i++)
  1787. kfree(currentsd[i]);
  1788. kfree(currentsd);
  1789. kfree(physdev_list);
  1790. kfree(logdev_list);
  1791. }
  1792. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1793. * dma mapping and fills in the scatter gather entries of the
  1794. * hpsa command, cp.
  1795. */
  1796. static int hpsa_scatter_gather(struct ctlr_info *h,
  1797. struct CommandList *cp,
  1798. struct scsi_cmnd *cmd)
  1799. {
  1800. unsigned int len;
  1801. struct scatterlist *sg;
  1802. u64 addr64;
  1803. int use_sg, i, sg_index, chained;
  1804. struct SGDescriptor *curr_sg;
  1805. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1806. use_sg = scsi_dma_map(cmd);
  1807. if (use_sg < 0)
  1808. return use_sg;
  1809. if (!use_sg)
  1810. goto sglist_finished;
  1811. curr_sg = cp->SG;
  1812. chained = 0;
  1813. sg_index = 0;
  1814. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1815. if (i == h->max_cmd_sg_entries - 1 &&
  1816. use_sg > h->max_cmd_sg_entries) {
  1817. chained = 1;
  1818. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1819. sg_index = 0;
  1820. }
  1821. addr64 = (u64) sg_dma_address(sg);
  1822. len = sg_dma_len(sg);
  1823. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1824. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1825. curr_sg->Len = len;
  1826. curr_sg->Ext = 0; /* we are not chaining */
  1827. curr_sg++;
  1828. }
  1829. if (use_sg + chained > h->maxSG)
  1830. h->maxSG = use_sg + chained;
  1831. if (chained) {
  1832. cp->Header.SGList = h->max_cmd_sg_entries;
  1833. cp->Header.SGTotal = (u16) (use_sg + 1);
  1834. hpsa_map_sg_chain_block(h, cp);
  1835. return 0;
  1836. }
  1837. sglist_finished:
  1838. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1839. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1840. return 0;
  1841. }
  1842. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1843. void (*done)(struct scsi_cmnd *))
  1844. {
  1845. struct ctlr_info *h;
  1846. struct hpsa_scsi_dev_t *dev;
  1847. unsigned char scsi3addr[8];
  1848. struct CommandList *c;
  1849. unsigned long flags;
  1850. /* Get the ptr to our adapter structure out of cmd->host. */
  1851. h = sdev_to_hba(cmd->device);
  1852. dev = cmd->device->hostdata;
  1853. if (!dev) {
  1854. cmd->result = DID_NO_CONNECT << 16;
  1855. done(cmd);
  1856. return 0;
  1857. }
  1858. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1859. spin_lock_irqsave(&h->lock, flags);
  1860. if (unlikely(h->lockup_detected)) {
  1861. spin_unlock_irqrestore(&h->lock, flags);
  1862. cmd->result = DID_ERROR << 16;
  1863. done(cmd);
  1864. return 0;
  1865. }
  1866. /* Need a lock as this is being allocated from the pool */
  1867. c = cmd_alloc(h);
  1868. spin_unlock_irqrestore(&h->lock, flags);
  1869. if (c == NULL) { /* trouble... */
  1870. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1871. return SCSI_MLQUEUE_HOST_BUSY;
  1872. }
  1873. /* Fill in the command list header */
  1874. cmd->scsi_done = done; /* save this for use by completion code */
  1875. /* save c in case we have to abort it */
  1876. cmd->host_scribble = (unsigned char *) c;
  1877. c->cmd_type = CMD_SCSI;
  1878. c->scsi_cmd = cmd;
  1879. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1880. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1881. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1882. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1883. /* Fill in the request block... */
  1884. c->Request.Timeout = 0;
  1885. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1886. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1887. c->Request.CDBLen = cmd->cmd_len;
  1888. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1889. c->Request.Type.Type = TYPE_CMD;
  1890. c->Request.Type.Attribute = ATTR_SIMPLE;
  1891. switch (cmd->sc_data_direction) {
  1892. case DMA_TO_DEVICE:
  1893. c->Request.Type.Direction = XFER_WRITE;
  1894. break;
  1895. case DMA_FROM_DEVICE:
  1896. c->Request.Type.Direction = XFER_READ;
  1897. break;
  1898. case DMA_NONE:
  1899. c->Request.Type.Direction = XFER_NONE;
  1900. break;
  1901. case DMA_BIDIRECTIONAL:
  1902. /* This can happen if a buggy application does a scsi passthru
  1903. * and sets both inlen and outlen to non-zero. ( see
  1904. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1905. */
  1906. c->Request.Type.Direction = XFER_RSVD;
  1907. /* This is technically wrong, and hpsa controllers should
  1908. * reject it with CMD_INVALID, which is the most correct
  1909. * response, but non-fibre backends appear to let it
  1910. * slide by, and give the same results as if this field
  1911. * were set correctly. Either way is acceptable for
  1912. * our purposes here.
  1913. */
  1914. break;
  1915. default:
  1916. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1917. cmd->sc_data_direction);
  1918. BUG();
  1919. break;
  1920. }
  1921. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1922. cmd_free(h, c);
  1923. return SCSI_MLQUEUE_HOST_BUSY;
  1924. }
  1925. enqueue_cmd_and_start_io(h, c);
  1926. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1927. return 0;
  1928. }
  1929. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1930. static void hpsa_scan_start(struct Scsi_Host *sh)
  1931. {
  1932. struct ctlr_info *h = shost_to_hba(sh);
  1933. unsigned long flags;
  1934. /* wait until any scan already in progress is finished. */
  1935. while (1) {
  1936. spin_lock_irqsave(&h->scan_lock, flags);
  1937. if (h->scan_finished)
  1938. break;
  1939. spin_unlock_irqrestore(&h->scan_lock, flags);
  1940. wait_event(h->scan_wait_queue, h->scan_finished);
  1941. /* Note: We don't need to worry about a race between this
  1942. * thread and driver unload because the midlayer will
  1943. * have incremented the reference count, so unload won't
  1944. * happen if we're in here.
  1945. */
  1946. }
  1947. h->scan_finished = 0; /* mark scan as in progress */
  1948. spin_unlock_irqrestore(&h->scan_lock, flags);
  1949. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1950. spin_lock_irqsave(&h->scan_lock, flags);
  1951. h->scan_finished = 1; /* mark scan as finished. */
  1952. wake_up_all(&h->scan_wait_queue);
  1953. spin_unlock_irqrestore(&h->scan_lock, flags);
  1954. }
  1955. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1956. unsigned long elapsed_time)
  1957. {
  1958. struct ctlr_info *h = shost_to_hba(sh);
  1959. unsigned long flags;
  1960. int finished;
  1961. spin_lock_irqsave(&h->scan_lock, flags);
  1962. finished = h->scan_finished;
  1963. spin_unlock_irqrestore(&h->scan_lock, flags);
  1964. return finished;
  1965. }
  1966. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1967. int qdepth, int reason)
  1968. {
  1969. struct ctlr_info *h = sdev_to_hba(sdev);
  1970. if (reason != SCSI_QDEPTH_DEFAULT)
  1971. return -ENOTSUPP;
  1972. if (qdepth < 1)
  1973. qdepth = 1;
  1974. else
  1975. if (qdepth > h->nr_cmds)
  1976. qdepth = h->nr_cmds;
  1977. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1978. return sdev->queue_depth;
  1979. }
  1980. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1981. {
  1982. /* we are being forcibly unloaded, and may not refuse. */
  1983. scsi_remove_host(h->scsi_host);
  1984. scsi_host_put(h->scsi_host);
  1985. h->scsi_host = NULL;
  1986. }
  1987. static int hpsa_register_scsi(struct ctlr_info *h)
  1988. {
  1989. struct Scsi_Host *sh;
  1990. int error;
  1991. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1992. if (sh == NULL)
  1993. goto fail;
  1994. sh->io_port = 0;
  1995. sh->n_io_port = 0;
  1996. sh->this_id = -1;
  1997. sh->max_channel = 3;
  1998. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1999. sh->max_lun = HPSA_MAX_LUN;
  2000. sh->max_id = HPSA_MAX_LUN;
  2001. sh->can_queue = h->nr_cmds;
  2002. sh->cmd_per_lun = h->nr_cmds;
  2003. sh->sg_tablesize = h->maxsgentries;
  2004. h->scsi_host = sh;
  2005. sh->hostdata[0] = (unsigned long) h;
  2006. sh->irq = h->intr[h->intr_mode];
  2007. sh->unique_id = sh->irq;
  2008. error = scsi_add_host(sh, &h->pdev->dev);
  2009. if (error)
  2010. goto fail_host_put;
  2011. scsi_scan_host(sh);
  2012. return 0;
  2013. fail_host_put:
  2014. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2015. " failed for controller %d\n", __func__, h->ctlr);
  2016. scsi_host_put(sh);
  2017. return error;
  2018. fail:
  2019. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2020. " failed for controller %d\n", __func__, h->ctlr);
  2021. return -ENOMEM;
  2022. }
  2023. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2024. unsigned char lunaddr[])
  2025. {
  2026. int rc = 0;
  2027. int count = 0;
  2028. int waittime = 1; /* seconds */
  2029. struct CommandList *c;
  2030. c = cmd_special_alloc(h);
  2031. if (!c) {
  2032. dev_warn(&h->pdev->dev, "out of memory in "
  2033. "wait_for_device_to_become_ready.\n");
  2034. return IO_ERROR;
  2035. }
  2036. /* Send test unit ready until device ready, or give up. */
  2037. while (count < HPSA_TUR_RETRY_LIMIT) {
  2038. /* Wait for a bit. do this first, because if we send
  2039. * the TUR right away, the reset will just abort it.
  2040. */
  2041. msleep(1000 * waittime);
  2042. count++;
  2043. /* Increase wait time with each try, up to a point. */
  2044. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2045. waittime = waittime * 2;
  2046. /* Send the Test Unit Ready */
  2047. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2048. hpsa_scsi_do_simple_cmd_core(h, c);
  2049. /* no unmap needed here because no data xfer. */
  2050. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2051. break;
  2052. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2053. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2054. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2055. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2056. break;
  2057. dev_warn(&h->pdev->dev, "waiting %d secs "
  2058. "for device to become ready.\n", waittime);
  2059. rc = 1; /* device not ready. */
  2060. }
  2061. if (rc)
  2062. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2063. else
  2064. dev_warn(&h->pdev->dev, "device is ready.\n");
  2065. cmd_special_free(h, c);
  2066. return rc;
  2067. }
  2068. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2069. * complaining. Doing a host- or bus-reset can't do anything good here.
  2070. */
  2071. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2072. {
  2073. int rc;
  2074. struct ctlr_info *h;
  2075. struct hpsa_scsi_dev_t *dev;
  2076. /* find the controller to which the command to be aborted was sent */
  2077. h = sdev_to_hba(scsicmd->device);
  2078. if (h == NULL) /* paranoia */
  2079. return FAILED;
  2080. dev = scsicmd->device->hostdata;
  2081. if (!dev) {
  2082. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2083. "device lookup failed.\n");
  2084. return FAILED;
  2085. }
  2086. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2087. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2088. /* send a reset to the SCSI LUN which the command was sent to */
  2089. rc = hpsa_send_reset(h, dev->scsi3addr);
  2090. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2091. return SUCCESS;
  2092. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2093. return FAILED;
  2094. }
  2095. static void swizzle_abort_tag(u8 *tag)
  2096. {
  2097. u8 original_tag[8];
  2098. memcpy(original_tag, tag, 8);
  2099. tag[0] = original_tag[3];
  2100. tag[1] = original_tag[2];
  2101. tag[2] = original_tag[1];
  2102. tag[3] = original_tag[0];
  2103. tag[4] = original_tag[7];
  2104. tag[5] = original_tag[6];
  2105. tag[6] = original_tag[5];
  2106. tag[7] = original_tag[4];
  2107. }
  2108. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2109. struct CommandList *abort, int swizzle)
  2110. {
  2111. int rc = IO_OK;
  2112. struct CommandList *c;
  2113. struct ErrorInfo *ei;
  2114. c = cmd_special_alloc(h);
  2115. if (c == NULL) { /* trouble... */
  2116. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2117. return -ENOMEM;
  2118. }
  2119. fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
  2120. if (swizzle)
  2121. swizzle_abort_tag(&c->Request.CDB[4]);
  2122. hpsa_scsi_do_simple_cmd_core(h, c);
  2123. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2124. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2125. /* no unmap needed here because no data xfer. */
  2126. ei = c->err_info;
  2127. switch (ei->CommandStatus) {
  2128. case CMD_SUCCESS:
  2129. break;
  2130. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2131. rc = -1;
  2132. break;
  2133. default:
  2134. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2135. __func__, abort->Header.Tag.upper,
  2136. abort->Header.Tag.lower);
  2137. hpsa_scsi_interpret_error(c);
  2138. rc = -1;
  2139. break;
  2140. }
  2141. cmd_special_free(h, c);
  2142. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2143. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2144. return rc;
  2145. }
  2146. /*
  2147. * hpsa_find_cmd_in_queue
  2148. *
  2149. * Used to determine whether a command (find) is still present
  2150. * in queue_head. Optionally excludes the last element of queue_head.
  2151. *
  2152. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2153. * not yet been submitted, and so can be aborted by the driver without
  2154. * sending an abort to the hardware.
  2155. *
  2156. * Returns pointer to command if found in queue, NULL otherwise.
  2157. */
  2158. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2159. struct scsi_cmnd *find, struct list_head *queue_head)
  2160. {
  2161. unsigned long flags;
  2162. struct CommandList *c = NULL; /* ptr into cmpQ */
  2163. if (!find)
  2164. return 0;
  2165. spin_lock_irqsave(&h->lock, flags);
  2166. list_for_each_entry(c, queue_head, list) {
  2167. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2168. continue;
  2169. if (c->scsi_cmd == find) {
  2170. spin_unlock_irqrestore(&h->lock, flags);
  2171. return c;
  2172. }
  2173. }
  2174. spin_unlock_irqrestore(&h->lock, flags);
  2175. return NULL;
  2176. }
  2177. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2178. u8 *tag, struct list_head *queue_head)
  2179. {
  2180. unsigned long flags;
  2181. struct CommandList *c;
  2182. spin_lock_irqsave(&h->lock, flags);
  2183. list_for_each_entry(c, queue_head, list) {
  2184. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2185. continue;
  2186. spin_unlock_irqrestore(&h->lock, flags);
  2187. return c;
  2188. }
  2189. spin_unlock_irqrestore(&h->lock, flags);
  2190. return NULL;
  2191. }
  2192. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2193. * tell which kind we're dealing with, so we send the abort both ways. There
  2194. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2195. * way we construct our tags but we check anyway in case the assumptions which
  2196. * make this true someday become false.
  2197. */
  2198. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2199. unsigned char *scsi3addr, struct CommandList *abort)
  2200. {
  2201. u8 swizzled_tag[8];
  2202. struct CommandList *c;
  2203. int rc = 0, rc2 = 0;
  2204. /* we do not expect to find the swizzled tag in our queue, but
  2205. * check anyway just to be sure the assumptions which make this
  2206. * the case haven't become wrong.
  2207. */
  2208. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2209. swizzle_abort_tag(swizzled_tag);
  2210. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2211. if (c != NULL) {
  2212. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2213. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2214. }
  2215. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2216. /* if the command is still in our queue, we can't conclude that it was
  2217. * aborted (it might have just completed normally) but in any case
  2218. * we don't need to try to abort it another way.
  2219. */
  2220. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2221. if (c)
  2222. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2223. return rc && rc2;
  2224. }
  2225. /* Send an abort for the specified command.
  2226. * If the device and controller support it,
  2227. * send a task abort request.
  2228. */
  2229. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2230. {
  2231. int i, rc;
  2232. struct ctlr_info *h;
  2233. struct hpsa_scsi_dev_t *dev;
  2234. struct CommandList *abort; /* pointer to command to be aborted */
  2235. struct CommandList *found;
  2236. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2237. char msg[256]; /* For debug messaging. */
  2238. int ml = 0;
  2239. /* Find the controller of the command to be aborted */
  2240. h = sdev_to_hba(sc->device);
  2241. if (WARN(h == NULL,
  2242. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2243. return FAILED;
  2244. /* Check that controller supports some kind of task abort */
  2245. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2246. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2247. return FAILED;
  2248. memset(msg, 0, sizeof(msg));
  2249. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2250. h->scsi_host->host_no, sc->device->channel,
  2251. sc->device->id, sc->device->lun);
  2252. /* Find the device of the command to be aborted */
  2253. dev = sc->device->hostdata;
  2254. if (!dev) {
  2255. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2256. msg);
  2257. return FAILED;
  2258. }
  2259. /* Get SCSI command to be aborted */
  2260. abort = (struct CommandList *) sc->host_scribble;
  2261. if (abort == NULL) {
  2262. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2263. msg);
  2264. return FAILED;
  2265. }
  2266. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2267. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2268. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2269. if (as != NULL)
  2270. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2271. as->cmnd[0], as->serial_number);
  2272. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2273. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2274. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2275. /* Search reqQ to See if command is queued but not submitted,
  2276. * if so, complete the command with aborted status and remove
  2277. * it from the reqQ.
  2278. */
  2279. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2280. if (found) {
  2281. found->err_info->CommandStatus = CMD_ABORTED;
  2282. finish_cmd(found);
  2283. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2284. msg);
  2285. return SUCCESS;
  2286. }
  2287. /* not in reqQ, if also not in cmpQ, must have already completed */
  2288. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2289. if (!found) {
  2290. dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
  2291. msg);
  2292. return SUCCESS;
  2293. }
  2294. /*
  2295. * Command is in flight, or possibly already completed
  2296. * by the firmware (but not to the scsi mid layer) but we can't
  2297. * distinguish which. Send the abort down.
  2298. */
  2299. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2300. if (rc != 0) {
  2301. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2302. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2303. h->scsi_host->host_no,
  2304. dev->bus, dev->target, dev->lun);
  2305. return FAILED;
  2306. }
  2307. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2308. /* If the abort(s) above completed and actually aborted the
  2309. * command, then the command to be aborted should already be
  2310. * completed. If not, wait around a bit more to see if they
  2311. * manage to complete normally.
  2312. */
  2313. #define ABORT_COMPLETE_WAIT_SECS 30
  2314. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2315. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2316. if (!found)
  2317. return SUCCESS;
  2318. msleep(100);
  2319. }
  2320. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2321. msg, ABORT_COMPLETE_WAIT_SECS);
  2322. return FAILED;
  2323. }
  2324. /*
  2325. * For operations that cannot sleep, a command block is allocated at init,
  2326. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2327. * which ones are free or in use. Lock must be held when calling this.
  2328. * cmd_free() is the complement.
  2329. */
  2330. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2331. {
  2332. struct CommandList *c;
  2333. int i;
  2334. union u64bit temp64;
  2335. dma_addr_t cmd_dma_handle, err_dma_handle;
  2336. do {
  2337. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2338. if (i == h->nr_cmds)
  2339. return NULL;
  2340. } while (test_and_set_bit
  2341. (i & (BITS_PER_LONG - 1),
  2342. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2343. c = h->cmd_pool + i;
  2344. memset(c, 0, sizeof(*c));
  2345. cmd_dma_handle = h->cmd_pool_dhandle
  2346. + i * sizeof(*c);
  2347. c->err_info = h->errinfo_pool + i;
  2348. memset(c->err_info, 0, sizeof(*c->err_info));
  2349. err_dma_handle = h->errinfo_pool_dhandle
  2350. + i * sizeof(*c->err_info);
  2351. h->nr_allocs++;
  2352. c->cmdindex = i;
  2353. INIT_LIST_HEAD(&c->list);
  2354. c->busaddr = (u32) cmd_dma_handle;
  2355. temp64.val = (u64) err_dma_handle;
  2356. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2357. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2358. c->ErrDesc.Len = sizeof(*c->err_info);
  2359. c->h = h;
  2360. return c;
  2361. }
  2362. /* For operations that can wait for kmalloc to possibly sleep,
  2363. * this routine can be called. Lock need not be held to call
  2364. * cmd_special_alloc. cmd_special_free() is the complement.
  2365. */
  2366. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2367. {
  2368. struct CommandList *c;
  2369. union u64bit temp64;
  2370. dma_addr_t cmd_dma_handle, err_dma_handle;
  2371. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2372. if (c == NULL)
  2373. return NULL;
  2374. memset(c, 0, sizeof(*c));
  2375. c->cmdindex = -1;
  2376. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2377. &err_dma_handle);
  2378. if (c->err_info == NULL) {
  2379. pci_free_consistent(h->pdev,
  2380. sizeof(*c), c, cmd_dma_handle);
  2381. return NULL;
  2382. }
  2383. memset(c->err_info, 0, sizeof(*c->err_info));
  2384. INIT_LIST_HEAD(&c->list);
  2385. c->busaddr = (u32) cmd_dma_handle;
  2386. temp64.val = (u64) err_dma_handle;
  2387. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2388. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2389. c->ErrDesc.Len = sizeof(*c->err_info);
  2390. c->h = h;
  2391. return c;
  2392. }
  2393. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2394. {
  2395. int i;
  2396. i = c - h->cmd_pool;
  2397. clear_bit(i & (BITS_PER_LONG - 1),
  2398. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2399. h->nr_frees++;
  2400. }
  2401. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2402. {
  2403. union u64bit temp64;
  2404. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2405. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2406. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2407. c->err_info, (dma_addr_t) temp64.val);
  2408. pci_free_consistent(h->pdev, sizeof(*c),
  2409. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2410. }
  2411. #ifdef CONFIG_COMPAT
  2412. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2413. {
  2414. IOCTL32_Command_struct __user *arg32 =
  2415. (IOCTL32_Command_struct __user *) arg;
  2416. IOCTL_Command_struct arg64;
  2417. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2418. int err;
  2419. u32 cp;
  2420. memset(&arg64, 0, sizeof(arg64));
  2421. err = 0;
  2422. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2423. sizeof(arg64.LUN_info));
  2424. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2425. sizeof(arg64.Request));
  2426. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2427. sizeof(arg64.error_info));
  2428. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2429. err |= get_user(cp, &arg32->buf);
  2430. arg64.buf = compat_ptr(cp);
  2431. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2432. if (err)
  2433. return -EFAULT;
  2434. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2435. if (err)
  2436. return err;
  2437. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2438. sizeof(arg32->error_info));
  2439. if (err)
  2440. return -EFAULT;
  2441. return err;
  2442. }
  2443. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2444. int cmd, void *arg)
  2445. {
  2446. BIG_IOCTL32_Command_struct __user *arg32 =
  2447. (BIG_IOCTL32_Command_struct __user *) arg;
  2448. BIG_IOCTL_Command_struct arg64;
  2449. BIG_IOCTL_Command_struct __user *p =
  2450. compat_alloc_user_space(sizeof(arg64));
  2451. int err;
  2452. u32 cp;
  2453. memset(&arg64, 0, sizeof(arg64));
  2454. err = 0;
  2455. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2456. sizeof(arg64.LUN_info));
  2457. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2458. sizeof(arg64.Request));
  2459. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2460. sizeof(arg64.error_info));
  2461. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2462. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2463. err |= get_user(cp, &arg32->buf);
  2464. arg64.buf = compat_ptr(cp);
  2465. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2466. if (err)
  2467. return -EFAULT;
  2468. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2469. if (err)
  2470. return err;
  2471. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2472. sizeof(arg32->error_info));
  2473. if (err)
  2474. return -EFAULT;
  2475. return err;
  2476. }
  2477. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2478. {
  2479. switch (cmd) {
  2480. case CCISS_GETPCIINFO:
  2481. case CCISS_GETINTINFO:
  2482. case CCISS_SETINTINFO:
  2483. case CCISS_GETNODENAME:
  2484. case CCISS_SETNODENAME:
  2485. case CCISS_GETHEARTBEAT:
  2486. case CCISS_GETBUSTYPES:
  2487. case CCISS_GETFIRMVER:
  2488. case CCISS_GETDRIVVER:
  2489. case CCISS_REVALIDVOLS:
  2490. case CCISS_DEREGDISK:
  2491. case CCISS_REGNEWDISK:
  2492. case CCISS_REGNEWD:
  2493. case CCISS_RESCANDISK:
  2494. case CCISS_GETLUNINFO:
  2495. return hpsa_ioctl(dev, cmd, arg);
  2496. case CCISS_PASSTHRU32:
  2497. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2498. case CCISS_BIG_PASSTHRU32:
  2499. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2500. default:
  2501. return -ENOIOCTLCMD;
  2502. }
  2503. }
  2504. #endif
  2505. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2506. {
  2507. struct hpsa_pci_info pciinfo;
  2508. if (!argp)
  2509. return -EINVAL;
  2510. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2511. pciinfo.bus = h->pdev->bus->number;
  2512. pciinfo.dev_fn = h->pdev->devfn;
  2513. pciinfo.board_id = h->board_id;
  2514. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2515. return -EFAULT;
  2516. return 0;
  2517. }
  2518. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2519. {
  2520. DriverVer_type DriverVer;
  2521. unsigned char vmaj, vmin, vsubmin;
  2522. int rc;
  2523. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2524. &vmaj, &vmin, &vsubmin);
  2525. if (rc != 3) {
  2526. dev_info(&h->pdev->dev, "driver version string '%s' "
  2527. "unrecognized.", HPSA_DRIVER_VERSION);
  2528. vmaj = 0;
  2529. vmin = 0;
  2530. vsubmin = 0;
  2531. }
  2532. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2533. if (!argp)
  2534. return -EINVAL;
  2535. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2536. return -EFAULT;
  2537. return 0;
  2538. }
  2539. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2540. {
  2541. IOCTL_Command_struct iocommand;
  2542. struct CommandList *c;
  2543. char *buff = NULL;
  2544. union u64bit temp64;
  2545. if (!argp)
  2546. return -EINVAL;
  2547. if (!capable(CAP_SYS_RAWIO))
  2548. return -EPERM;
  2549. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2550. return -EFAULT;
  2551. if ((iocommand.buf_size < 1) &&
  2552. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2553. return -EINVAL;
  2554. }
  2555. if (iocommand.buf_size > 0) {
  2556. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2557. if (buff == NULL)
  2558. return -EFAULT;
  2559. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2560. /* Copy the data into the buffer we created */
  2561. if (copy_from_user(buff, iocommand.buf,
  2562. iocommand.buf_size)) {
  2563. kfree(buff);
  2564. return -EFAULT;
  2565. }
  2566. } else {
  2567. memset(buff, 0, iocommand.buf_size);
  2568. }
  2569. }
  2570. c = cmd_special_alloc(h);
  2571. if (c == NULL) {
  2572. kfree(buff);
  2573. return -ENOMEM;
  2574. }
  2575. /* Fill in the command type */
  2576. c->cmd_type = CMD_IOCTL_PEND;
  2577. /* Fill in Command Header */
  2578. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2579. if (iocommand.buf_size > 0) { /* buffer to fill */
  2580. c->Header.SGList = 1;
  2581. c->Header.SGTotal = 1;
  2582. } else { /* no buffers to fill */
  2583. c->Header.SGList = 0;
  2584. c->Header.SGTotal = 0;
  2585. }
  2586. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2587. /* use the kernel address the cmd block for tag */
  2588. c->Header.Tag.lower = c->busaddr;
  2589. /* Fill in Request block */
  2590. memcpy(&c->Request, &iocommand.Request,
  2591. sizeof(c->Request));
  2592. /* Fill in the scatter gather information */
  2593. if (iocommand.buf_size > 0) {
  2594. temp64.val = pci_map_single(h->pdev, buff,
  2595. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2596. c->SG[0].Addr.lower = temp64.val32.lower;
  2597. c->SG[0].Addr.upper = temp64.val32.upper;
  2598. c->SG[0].Len = iocommand.buf_size;
  2599. c->SG[0].Ext = 0; /* we are not chaining*/
  2600. }
  2601. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2602. if (iocommand.buf_size > 0)
  2603. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2604. check_ioctl_unit_attention(h, c);
  2605. /* Copy the error information out */
  2606. memcpy(&iocommand.error_info, c->err_info,
  2607. sizeof(iocommand.error_info));
  2608. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2609. kfree(buff);
  2610. cmd_special_free(h, c);
  2611. return -EFAULT;
  2612. }
  2613. if (iocommand.Request.Type.Direction == XFER_READ &&
  2614. iocommand.buf_size > 0) {
  2615. /* Copy the data out of the buffer we created */
  2616. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2617. kfree(buff);
  2618. cmd_special_free(h, c);
  2619. return -EFAULT;
  2620. }
  2621. }
  2622. kfree(buff);
  2623. cmd_special_free(h, c);
  2624. return 0;
  2625. }
  2626. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2627. {
  2628. BIG_IOCTL_Command_struct *ioc;
  2629. struct CommandList *c;
  2630. unsigned char **buff = NULL;
  2631. int *buff_size = NULL;
  2632. union u64bit temp64;
  2633. BYTE sg_used = 0;
  2634. int status = 0;
  2635. int i;
  2636. u32 left;
  2637. u32 sz;
  2638. BYTE __user *data_ptr;
  2639. if (!argp)
  2640. return -EINVAL;
  2641. if (!capable(CAP_SYS_RAWIO))
  2642. return -EPERM;
  2643. ioc = (BIG_IOCTL_Command_struct *)
  2644. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2645. if (!ioc) {
  2646. status = -ENOMEM;
  2647. goto cleanup1;
  2648. }
  2649. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2650. status = -EFAULT;
  2651. goto cleanup1;
  2652. }
  2653. if ((ioc->buf_size < 1) &&
  2654. (ioc->Request.Type.Direction != XFER_NONE)) {
  2655. status = -EINVAL;
  2656. goto cleanup1;
  2657. }
  2658. /* Check kmalloc limits using all SGs */
  2659. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2660. status = -EINVAL;
  2661. goto cleanup1;
  2662. }
  2663. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2664. status = -EINVAL;
  2665. goto cleanup1;
  2666. }
  2667. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2668. if (!buff) {
  2669. status = -ENOMEM;
  2670. goto cleanup1;
  2671. }
  2672. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2673. if (!buff_size) {
  2674. status = -ENOMEM;
  2675. goto cleanup1;
  2676. }
  2677. left = ioc->buf_size;
  2678. data_ptr = ioc->buf;
  2679. while (left) {
  2680. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2681. buff_size[sg_used] = sz;
  2682. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2683. if (buff[sg_used] == NULL) {
  2684. status = -ENOMEM;
  2685. goto cleanup1;
  2686. }
  2687. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2688. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2689. status = -ENOMEM;
  2690. goto cleanup1;
  2691. }
  2692. } else
  2693. memset(buff[sg_used], 0, sz);
  2694. left -= sz;
  2695. data_ptr += sz;
  2696. sg_used++;
  2697. }
  2698. c = cmd_special_alloc(h);
  2699. if (c == NULL) {
  2700. status = -ENOMEM;
  2701. goto cleanup1;
  2702. }
  2703. c->cmd_type = CMD_IOCTL_PEND;
  2704. c->Header.ReplyQueue = 0;
  2705. c->Header.SGList = c->Header.SGTotal = sg_used;
  2706. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2707. c->Header.Tag.lower = c->busaddr;
  2708. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2709. if (ioc->buf_size > 0) {
  2710. int i;
  2711. for (i = 0; i < sg_used; i++) {
  2712. temp64.val = pci_map_single(h->pdev, buff[i],
  2713. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2714. c->SG[i].Addr.lower = temp64.val32.lower;
  2715. c->SG[i].Addr.upper = temp64.val32.upper;
  2716. c->SG[i].Len = buff_size[i];
  2717. /* we are not chaining */
  2718. c->SG[i].Ext = 0;
  2719. }
  2720. }
  2721. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2722. if (sg_used)
  2723. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2724. check_ioctl_unit_attention(h, c);
  2725. /* Copy the error information out */
  2726. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2727. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2728. cmd_special_free(h, c);
  2729. status = -EFAULT;
  2730. goto cleanup1;
  2731. }
  2732. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2733. /* Copy the data out of the buffer we created */
  2734. BYTE __user *ptr = ioc->buf;
  2735. for (i = 0; i < sg_used; i++) {
  2736. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2737. cmd_special_free(h, c);
  2738. status = -EFAULT;
  2739. goto cleanup1;
  2740. }
  2741. ptr += buff_size[i];
  2742. }
  2743. }
  2744. cmd_special_free(h, c);
  2745. status = 0;
  2746. cleanup1:
  2747. if (buff) {
  2748. for (i = 0; i < sg_used; i++)
  2749. kfree(buff[i]);
  2750. kfree(buff);
  2751. }
  2752. kfree(buff_size);
  2753. kfree(ioc);
  2754. return status;
  2755. }
  2756. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2757. struct CommandList *c)
  2758. {
  2759. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2760. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2761. (void) check_for_unit_attention(h, c);
  2762. }
  2763. /*
  2764. * ioctl
  2765. */
  2766. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2767. {
  2768. struct ctlr_info *h;
  2769. void __user *argp = (void __user *)arg;
  2770. h = sdev_to_hba(dev);
  2771. switch (cmd) {
  2772. case CCISS_DEREGDISK:
  2773. case CCISS_REGNEWDISK:
  2774. case CCISS_REGNEWD:
  2775. hpsa_scan_start(h->scsi_host);
  2776. return 0;
  2777. case CCISS_GETPCIINFO:
  2778. return hpsa_getpciinfo_ioctl(h, argp);
  2779. case CCISS_GETDRIVVER:
  2780. return hpsa_getdrivver_ioctl(h, argp);
  2781. case CCISS_PASSTHRU:
  2782. return hpsa_passthru_ioctl(h, argp);
  2783. case CCISS_BIG_PASSTHRU:
  2784. return hpsa_big_passthru_ioctl(h, argp);
  2785. default:
  2786. return -ENOTTY;
  2787. }
  2788. }
  2789. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2790. unsigned char *scsi3addr, u8 reset_type)
  2791. {
  2792. struct CommandList *c;
  2793. c = cmd_alloc(h);
  2794. if (!c)
  2795. return -ENOMEM;
  2796. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2797. RAID_CTLR_LUNID, TYPE_MSG);
  2798. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2799. c->waiting = NULL;
  2800. enqueue_cmd_and_start_io(h, c);
  2801. /* Don't wait for completion, the reset won't complete. Don't free
  2802. * the command either. This is the last command we will send before
  2803. * re-initializing everything, so it doesn't matter and won't leak.
  2804. */
  2805. return 0;
  2806. }
  2807. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2808. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2809. int cmd_type)
  2810. {
  2811. int pci_dir = XFER_NONE;
  2812. struct CommandList *a; /* for commands to be aborted */
  2813. c->cmd_type = CMD_IOCTL_PEND;
  2814. c->Header.ReplyQueue = 0;
  2815. if (buff != NULL && size > 0) {
  2816. c->Header.SGList = 1;
  2817. c->Header.SGTotal = 1;
  2818. } else {
  2819. c->Header.SGList = 0;
  2820. c->Header.SGTotal = 0;
  2821. }
  2822. c->Header.Tag.lower = c->busaddr;
  2823. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2824. c->Request.Type.Type = cmd_type;
  2825. if (cmd_type == TYPE_CMD) {
  2826. switch (cmd) {
  2827. case HPSA_INQUIRY:
  2828. /* are we trying to read a vital product page */
  2829. if (page_code != 0) {
  2830. c->Request.CDB[1] = 0x01;
  2831. c->Request.CDB[2] = page_code;
  2832. }
  2833. c->Request.CDBLen = 6;
  2834. c->Request.Type.Attribute = ATTR_SIMPLE;
  2835. c->Request.Type.Direction = XFER_READ;
  2836. c->Request.Timeout = 0;
  2837. c->Request.CDB[0] = HPSA_INQUIRY;
  2838. c->Request.CDB[4] = size & 0xFF;
  2839. break;
  2840. case HPSA_REPORT_LOG:
  2841. case HPSA_REPORT_PHYS:
  2842. /* Talking to controller so It's a physical command
  2843. mode = 00 target = 0. Nothing to write.
  2844. */
  2845. c->Request.CDBLen = 12;
  2846. c->Request.Type.Attribute = ATTR_SIMPLE;
  2847. c->Request.Type.Direction = XFER_READ;
  2848. c->Request.Timeout = 0;
  2849. c->Request.CDB[0] = cmd;
  2850. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2851. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2852. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2853. c->Request.CDB[9] = size & 0xFF;
  2854. break;
  2855. case HPSA_CACHE_FLUSH:
  2856. c->Request.CDBLen = 12;
  2857. c->Request.Type.Attribute = ATTR_SIMPLE;
  2858. c->Request.Type.Direction = XFER_WRITE;
  2859. c->Request.Timeout = 0;
  2860. c->Request.CDB[0] = BMIC_WRITE;
  2861. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2862. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2863. c->Request.CDB[8] = size & 0xFF;
  2864. break;
  2865. case TEST_UNIT_READY:
  2866. c->Request.CDBLen = 6;
  2867. c->Request.Type.Attribute = ATTR_SIMPLE;
  2868. c->Request.Type.Direction = XFER_NONE;
  2869. c->Request.Timeout = 0;
  2870. break;
  2871. default:
  2872. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2873. BUG();
  2874. return;
  2875. }
  2876. } else if (cmd_type == TYPE_MSG) {
  2877. switch (cmd) {
  2878. case HPSA_DEVICE_RESET_MSG:
  2879. c->Request.CDBLen = 16;
  2880. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2881. c->Request.Type.Attribute = ATTR_SIMPLE;
  2882. c->Request.Type.Direction = XFER_NONE;
  2883. c->Request.Timeout = 0; /* Don't time out */
  2884. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2885. c->Request.CDB[0] = cmd;
  2886. c->Request.CDB[1] = 0x03; /* Reset target above */
  2887. /* If bytes 4-7 are zero, it means reset the */
  2888. /* LunID device */
  2889. c->Request.CDB[4] = 0x00;
  2890. c->Request.CDB[5] = 0x00;
  2891. c->Request.CDB[6] = 0x00;
  2892. c->Request.CDB[7] = 0x00;
  2893. break;
  2894. case HPSA_ABORT_MSG:
  2895. a = buff; /* point to command to be aborted */
  2896. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  2897. a->Header.Tag.upper, a->Header.Tag.lower,
  2898. c->Header.Tag.upper, c->Header.Tag.lower);
  2899. c->Request.CDBLen = 16;
  2900. c->Request.Type.Type = TYPE_MSG;
  2901. c->Request.Type.Attribute = ATTR_SIMPLE;
  2902. c->Request.Type.Direction = XFER_WRITE;
  2903. c->Request.Timeout = 0; /* Don't time out */
  2904. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  2905. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  2906. c->Request.CDB[2] = 0x00; /* reserved */
  2907. c->Request.CDB[3] = 0x00; /* reserved */
  2908. /* Tag to abort goes in CDB[4]-CDB[11] */
  2909. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  2910. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  2911. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  2912. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  2913. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  2914. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  2915. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  2916. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  2917. c->Request.CDB[12] = 0x00; /* reserved */
  2918. c->Request.CDB[13] = 0x00; /* reserved */
  2919. c->Request.CDB[14] = 0x00; /* reserved */
  2920. c->Request.CDB[15] = 0x00; /* reserved */
  2921. break;
  2922. default:
  2923. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2924. cmd);
  2925. BUG();
  2926. }
  2927. } else {
  2928. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2929. BUG();
  2930. }
  2931. switch (c->Request.Type.Direction) {
  2932. case XFER_READ:
  2933. pci_dir = PCI_DMA_FROMDEVICE;
  2934. break;
  2935. case XFER_WRITE:
  2936. pci_dir = PCI_DMA_TODEVICE;
  2937. break;
  2938. case XFER_NONE:
  2939. pci_dir = PCI_DMA_NONE;
  2940. break;
  2941. default:
  2942. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2943. }
  2944. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2945. return;
  2946. }
  2947. /*
  2948. * Map (physical) PCI mem into (virtual) kernel space
  2949. */
  2950. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2951. {
  2952. ulong page_base = ((ulong) base) & PAGE_MASK;
  2953. ulong page_offs = ((ulong) base) - page_base;
  2954. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2955. return page_remapped ? (page_remapped + page_offs) : NULL;
  2956. }
  2957. /* Takes cmds off the submission queue and sends them to the hardware,
  2958. * then puts them on the queue of cmds waiting for completion.
  2959. */
  2960. static void start_io(struct ctlr_info *h)
  2961. {
  2962. struct CommandList *c;
  2963. while (!list_empty(&h->reqQ)) {
  2964. c = list_entry(h->reqQ.next, struct CommandList, list);
  2965. /* can't do anything if fifo is full */
  2966. if ((h->access.fifo_full(h))) {
  2967. dev_warn(&h->pdev->dev, "fifo full\n");
  2968. break;
  2969. }
  2970. /* Get the first entry from the Request Q */
  2971. removeQ(c);
  2972. h->Qdepth--;
  2973. /* Tell the controller execute command */
  2974. h->access.submit_command(h, c);
  2975. /* Put job onto the completed Q */
  2976. addQ(&h->cmpQ, c);
  2977. }
  2978. }
  2979. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2980. {
  2981. return h->access.command_completed(h);
  2982. }
  2983. static inline bool interrupt_pending(struct ctlr_info *h)
  2984. {
  2985. return h->access.intr_pending(h);
  2986. }
  2987. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2988. {
  2989. return (h->access.intr_pending(h) == 0) ||
  2990. (h->interrupts_enabled == 0);
  2991. }
  2992. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2993. u32 raw_tag)
  2994. {
  2995. if (unlikely(tag_index >= h->nr_cmds)) {
  2996. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2997. return 1;
  2998. }
  2999. return 0;
  3000. }
  3001. static inline void finish_cmd(struct CommandList *c)
  3002. {
  3003. removeQ(c);
  3004. if (likely(c->cmd_type == CMD_SCSI))
  3005. complete_scsi_command(c);
  3006. else if (c->cmd_type == CMD_IOCTL_PEND)
  3007. complete(c->waiting);
  3008. }
  3009. static inline u32 hpsa_tag_contains_index(u32 tag)
  3010. {
  3011. return tag & DIRECT_LOOKUP_BIT;
  3012. }
  3013. static inline u32 hpsa_tag_to_index(u32 tag)
  3014. {
  3015. return tag >> DIRECT_LOOKUP_SHIFT;
  3016. }
  3017. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3018. {
  3019. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3020. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3021. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3022. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3023. return tag & ~HPSA_PERF_ERROR_BITS;
  3024. }
  3025. /* process completion of an indexed ("direct lookup") command */
  3026. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  3027. u32 raw_tag)
  3028. {
  3029. u32 tag_index;
  3030. struct CommandList *c;
  3031. tag_index = hpsa_tag_to_index(raw_tag);
  3032. if (bad_tag(h, tag_index, raw_tag))
  3033. return next_command(h);
  3034. c = h->cmd_pool + tag_index;
  3035. finish_cmd(c);
  3036. return next_command(h);
  3037. }
  3038. /* process completion of a non-indexed command */
  3039. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  3040. u32 raw_tag)
  3041. {
  3042. u32 tag;
  3043. struct CommandList *c = NULL;
  3044. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3045. list_for_each_entry(c, &h->cmpQ, list) {
  3046. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3047. finish_cmd(c);
  3048. return next_command(h);
  3049. }
  3050. }
  3051. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3052. return next_command(h);
  3053. }
  3054. /* Some controllers, like p400, will give us one interrupt
  3055. * after a soft reset, even if we turned interrupts off.
  3056. * Only need to check for this in the hpsa_xxx_discard_completions
  3057. * functions.
  3058. */
  3059. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3060. {
  3061. if (likely(!reset_devices))
  3062. return 0;
  3063. if (likely(h->interrupts_enabled))
  3064. return 0;
  3065. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3066. "(known firmware bug.) Ignoring.\n");
  3067. return 1;
  3068. }
  3069. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  3070. {
  3071. struct ctlr_info *h = dev_id;
  3072. unsigned long flags;
  3073. u32 raw_tag;
  3074. if (ignore_bogus_interrupt(h))
  3075. return IRQ_NONE;
  3076. if (interrupt_not_for_us(h))
  3077. return IRQ_NONE;
  3078. spin_lock_irqsave(&h->lock, flags);
  3079. h->last_intr_timestamp = get_jiffies_64();
  3080. while (interrupt_pending(h)) {
  3081. raw_tag = get_next_completion(h);
  3082. while (raw_tag != FIFO_EMPTY)
  3083. raw_tag = next_command(h);
  3084. }
  3085. spin_unlock_irqrestore(&h->lock, flags);
  3086. return IRQ_HANDLED;
  3087. }
  3088. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  3089. {
  3090. struct ctlr_info *h = dev_id;
  3091. unsigned long flags;
  3092. u32 raw_tag;
  3093. if (ignore_bogus_interrupt(h))
  3094. return IRQ_NONE;
  3095. spin_lock_irqsave(&h->lock, flags);
  3096. h->last_intr_timestamp = get_jiffies_64();
  3097. raw_tag = get_next_completion(h);
  3098. while (raw_tag != FIFO_EMPTY)
  3099. raw_tag = next_command(h);
  3100. spin_unlock_irqrestore(&h->lock, flags);
  3101. return IRQ_HANDLED;
  3102. }
  3103. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  3104. {
  3105. struct ctlr_info *h = dev_id;
  3106. unsigned long flags;
  3107. u32 raw_tag;
  3108. if (interrupt_not_for_us(h))
  3109. return IRQ_NONE;
  3110. spin_lock_irqsave(&h->lock, flags);
  3111. h->last_intr_timestamp = get_jiffies_64();
  3112. while (interrupt_pending(h)) {
  3113. raw_tag = get_next_completion(h);
  3114. while (raw_tag != FIFO_EMPTY) {
  3115. if (hpsa_tag_contains_index(raw_tag))
  3116. raw_tag = process_indexed_cmd(h, raw_tag);
  3117. else
  3118. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3119. }
  3120. }
  3121. spin_unlock_irqrestore(&h->lock, flags);
  3122. return IRQ_HANDLED;
  3123. }
  3124. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  3125. {
  3126. struct ctlr_info *h = dev_id;
  3127. unsigned long flags;
  3128. u32 raw_tag;
  3129. spin_lock_irqsave(&h->lock, flags);
  3130. h->last_intr_timestamp = get_jiffies_64();
  3131. raw_tag = get_next_completion(h);
  3132. while (raw_tag != FIFO_EMPTY) {
  3133. if (hpsa_tag_contains_index(raw_tag))
  3134. raw_tag = process_indexed_cmd(h, raw_tag);
  3135. else
  3136. raw_tag = process_nonindexed_cmd(h, raw_tag);
  3137. }
  3138. spin_unlock_irqrestore(&h->lock, flags);
  3139. return IRQ_HANDLED;
  3140. }
  3141. /* Send a message CDB to the firmware. Careful, this only works
  3142. * in simple mode, not performant mode due to the tag lookup.
  3143. * We only ever use this immediately after a controller reset.
  3144. */
  3145. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3146. unsigned char type)
  3147. {
  3148. struct Command {
  3149. struct CommandListHeader CommandHeader;
  3150. struct RequestBlock Request;
  3151. struct ErrDescriptor ErrorDescriptor;
  3152. };
  3153. struct Command *cmd;
  3154. static const size_t cmd_sz = sizeof(*cmd) +
  3155. sizeof(cmd->ErrorDescriptor);
  3156. dma_addr_t paddr64;
  3157. uint32_t paddr32, tag;
  3158. void __iomem *vaddr;
  3159. int i, err;
  3160. vaddr = pci_ioremap_bar(pdev, 0);
  3161. if (vaddr == NULL)
  3162. return -ENOMEM;
  3163. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3164. * CCISS commands, so they must be allocated from the lower 4GiB of
  3165. * memory.
  3166. */
  3167. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3168. if (err) {
  3169. iounmap(vaddr);
  3170. return -ENOMEM;
  3171. }
  3172. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3173. if (cmd == NULL) {
  3174. iounmap(vaddr);
  3175. return -ENOMEM;
  3176. }
  3177. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3178. * although there's no guarantee, we assume that the address is at
  3179. * least 4-byte aligned (most likely, it's page-aligned).
  3180. */
  3181. paddr32 = paddr64;
  3182. cmd->CommandHeader.ReplyQueue = 0;
  3183. cmd->CommandHeader.SGList = 0;
  3184. cmd->CommandHeader.SGTotal = 0;
  3185. cmd->CommandHeader.Tag.lower = paddr32;
  3186. cmd->CommandHeader.Tag.upper = 0;
  3187. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3188. cmd->Request.CDBLen = 16;
  3189. cmd->Request.Type.Type = TYPE_MSG;
  3190. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3191. cmd->Request.Type.Direction = XFER_NONE;
  3192. cmd->Request.Timeout = 0; /* Don't time out */
  3193. cmd->Request.CDB[0] = opcode;
  3194. cmd->Request.CDB[1] = type;
  3195. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3196. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3197. cmd->ErrorDescriptor.Addr.upper = 0;
  3198. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3199. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3200. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3201. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3202. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3203. break;
  3204. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3205. }
  3206. iounmap(vaddr);
  3207. /* we leak the DMA buffer here ... no choice since the controller could
  3208. * still complete the command.
  3209. */
  3210. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3211. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3212. opcode, type);
  3213. return -ETIMEDOUT;
  3214. }
  3215. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3216. if (tag & HPSA_ERROR_BIT) {
  3217. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3218. opcode, type);
  3219. return -EIO;
  3220. }
  3221. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3222. opcode, type);
  3223. return 0;
  3224. }
  3225. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3226. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3227. void * __iomem vaddr, u32 use_doorbell)
  3228. {
  3229. u16 pmcsr;
  3230. int pos;
  3231. if (use_doorbell) {
  3232. /* For everything after the P600, the PCI power state method
  3233. * of resetting the controller doesn't work, so we have this
  3234. * other way using the doorbell register.
  3235. */
  3236. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3237. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3238. } else { /* Try to do it the PCI power state way */
  3239. /* Quoting from the Open CISS Specification: "The Power
  3240. * Management Control/Status Register (CSR) controls the power
  3241. * state of the device. The normal operating state is D0,
  3242. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3243. * the controller, place the interface device in D3 then to D0,
  3244. * this causes a secondary PCI reset which will reset the
  3245. * controller." */
  3246. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3247. if (pos == 0) {
  3248. dev_err(&pdev->dev,
  3249. "hpsa_reset_controller: "
  3250. "PCI PM not supported\n");
  3251. return -ENODEV;
  3252. }
  3253. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3254. /* enter the D3hot power management state */
  3255. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3256. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3257. pmcsr |= PCI_D3hot;
  3258. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3259. msleep(500);
  3260. /* enter the D0 power management state */
  3261. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3262. pmcsr |= PCI_D0;
  3263. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3264. /*
  3265. * The P600 requires a small delay when changing states.
  3266. * Otherwise we may think the board did not reset and we bail.
  3267. * This for kdump only and is particular to the P600.
  3268. */
  3269. msleep(500);
  3270. }
  3271. return 0;
  3272. }
  3273. static __devinit void init_driver_version(char *driver_version, int len)
  3274. {
  3275. memset(driver_version, 0, len);
  3276. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3277. }
  3278. static __devinit int write_driver_ver_to_cfgtable(
  3279. struct CfgTable __iomem *cfgtable)
  3280. {
  3281. char *driver_version;
  3282. int i, size = sizeof(cfgtable->driver_version);
  3283. driver_version = kmalloc(size, GFP_KERNEL);
  3284. if (!driver_version)
  3285. return -ENOMEM;
  3286. init_driver_version(driver_version, size);
  3287. for (i = 0; i < size; i++)
  3288. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3289. kfree(driver_version);
  3290. return 0;
  3291. }
  3292. static __devinit void read_driver_ver_from_cfgtable(
  3293. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3294. {
  3295. int i;
  3296. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3297. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3298. }
  3299. static __devinit int controller_reset_failed(
  3300. struct CfgTable __iomem *cfgtable)
  3301. {
  3302. char *driver_ver, *old_driver_ver;
  3303. int rc, size = sizeof(cfgtable->driver_version);
  3304. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3305. if (!old_driver_ver)
  3306. return -ENOMEM;
  3307. driver_ver = old_driver_ver + size;
  3308. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3309. * should have been changed, otherwise we know the reset failed.
  3310. */
  3311. init_driver_version(old_driver_ver, size);
  3312. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3313. rc = !memcmp(driver_ver, old_driver_ver, size);
  3314. kfree(old_driver_ver);
  3315. return rc;
  3316. }
  3317. /* This does a hard reset of the controller using PCI power management
  3318. * states or the using the doorbell register.
  3319. */
  3320. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3321. {
  3322. u64 cfg_offset;
  3323. u32 cfg_base_addr;
  3324. u64 cfg_base_addr_index;
  3325. void __iomem *vaddr;
  3326. unsigned long paddr;
  3327. u32 misc_fw_support;
  3328. int rc;
  3329. struct CfgTable __iomem *cfgtable;
  3330. u32 use_doorbell;
  3331. u32 board_id;
  3332. u16 command_register;
  3333. /* For controllers as old as the P600, this is very nearly
  3334. * the same thing as
  3335. *
  3336. * pci_save_state(pci_dev);
  3337. * pci_set_power_state(pci_dev, PCI_D3hot);
  3338. * pci_set_power_state(pci_dev, PCI_D0);
  3339. * pci_restore_state(pci_dev);
  3340. *
  3341. * For controllers newer than the P600, the pci power state
  3342. * method of resetting doesn't work so we have another way
  3343. * using the doorbell register.
  3344. */
  3345. rc = hpsa_lookup_board_id(pdev, &board_id);
  3346. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3347. dev_warn(&pdev->dev, "Not resetting device.\n");
  3348. return -ENODEV;
  3349. }
  3350. /* if controller is soft- but not hard resettable... */
  3351. if (!ctlr_is_hard_resettable(board_id))
  3352. return -ENOTSUPP; /* try soft reset later. */
  3353. /* Save the PCI command register */
  3354. pci_read_config_word(pdev, 4, &command_register);
  3355. /* Turn the board off. This is so that later pci_restore_state()
  3356. * won't turn the board on before the rest of config space is ready.
  3357. */
  3358. pci_disable_device(pdev);
  3359. pci_save_state(pdev);
  3360. /* find the first memory BAR, so we can find the cfg table */
  3361. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3362. if (rc)
  3363. return rc;
  3364. vaddr = remap_pci_mem(paddr, 0x250);
  3365. if (!vaddr)
  3366. return -ENOMEM;
  3367. /* find cfgtable in order to check if reset via doorbell is supported */
  3368. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3369. &cfg_base_addr_index, &cfg_offset);
  3370. if (rc)
  3371. goto unmap_vaddr;
  3372. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3373. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3374. if (!cfgtable) {
  3375. rc = -ENOMEM;
  3376. goto unmap_vaddr;
  3377. }
  3378. rc = write_driver_ver_to_cfgtable(cfgtable);
  3379. if (rc)
  3380. goto unmap_vaddr;
  3381. /* If reset via doorbell register is supported, use that.
  3382. * There are two such methods. Favor the newest method.
  3383. */
  3384. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3385. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3386. if (use_doorbell) {
  3387. use_doorbell = DOORBELL_CTLR_RESET2;
  3388. } else {
  3389. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3390. if (use_doorbell) {
  3391. dev_warn(&pdev->dev, "Soft reset not supported. "
  3392. "Firmware update is required.\n");
  3393. rc = -ENOTSUPP; /* try soft reset */
  3394. goto unmap_cfgtable;
  3395. }
  3396. }
  3397. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3398. if (rc)
  3399. goto unmap_cfgtable;
  3400. pci_restore_state(pdev);
  3401. rc = pci_enable_device(pdev);
  3402. if (rc) {
  3403. dev_warn(&pdev->dev, "failed to enable device.\n");
  3404. goto unmap_cfgtable;
  3405. }
  3406. pci_write_config_word(pdev, 4, command_register);
  3407. /* Some devices (notably the HP Smart Array 5i Controller)
  3408. need a little pause here */
  3409. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3410. /* Wait for board to become not ready, then ready. */
  3411. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3412. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3413. if (rc) {
  3414. dev_warn(&pdev->dev,
  3415. "failed waiting for board to reset."
  3416. " Will try soft reset.\n");
  3417. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3418. goto unmap_cfgtable;
  3419. }
  3420. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3421. if (rc) {
  3422. dev_warn(&pdev->dev,
  3423. "failed waiting for board to become ready "
  3424. "after hard reset\n");
  3425. goto unmap_cfgtable;
  3426. }
  3427. rc = controller_reset_failed(vaddr);
  3428. if (rc < 0)
  3429. goto unmap_cfgtable;
  3430. if (rc) {
  3431. dev_warn(&pdev->dev, "Unable to successfully reset "
  3432. "controller. Will try soft reset.\n");
  3433. rc = -ENOTSUPP;
  3434. } else {
  3435. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3436. }
  3437. unmap_cfgtable:
  3438. iounmap(cfgtable);
  3439. unmap_vaddr:
  3440. iounmap(vaddr);
  3441. return rc;
  3442. }
  3443. /*
  3444. * We cannot read the structure directly, for portability we must use
  3445. * the io functions.
  3446. * This is for debug only.
  3447. */
  3448. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3449. {
  3450. #ifdef HPSA_DEBUG
  3451. int i;
  3452. char temp_name[17];
  3453. dev_info(dev, "Controller Configuration information\n");
  3454. dev_info(dev, "------------------------------------\n");
  3455. for (i = 0; i < 4; i++)
  3456. temp_name[i] = readb(&(tb->Signature[i]));
  3457. temp_name[4] = '\0';
  3458. dev_info(dev, " Signature = %s\n", temp_name);
  3459. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3460. dev_info(dev, " Transport methods supported = 0x%x\n",
  3461. readl(&(tb->TransportSupport)));
  3462. dev_info(dev, " Transport methods active = 0x%x\n",
  3463. readl(&(tb->TransportActive)));
  3464. dev_info(dev, " Requested transport Method = 0x%x\n",
  3465. readl(&(tb->HostWrite.TransportRequest)));
  3466. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3467. readl(&(tb->HostWrite.CoalIntDelay)));
  3468. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3469. readl(&(tb->HostWrite.CoalIntCount)));
  3470. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3471. readl(&(tb->CmdsOutMax)));
  3472. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3473. for (i = 0; i < 16; i++)
  3474. temp_name[i] = readb(&(tb->ServerName[i]));
  3475. temp_name[16] = '\0';
  3476. dev_info(dev, " Server Name = %s\n", temp_name);
  3477. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3478. readl(&(tb->HeartBeat)));
  3479. #endif /* HPSA_DEBUG */
  3480. }
  3481. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3482. {
  3483. int i, offset, mem_type, bar_type;
  3484. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3485. return 0;
  3486. offset = 0;
  3487. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3488. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3489. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3490. offset += 4;
  3491. else {
  3492. mem_type = pci_resource_flags(pdev, i) &
  3493. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3494. switch (mem_type) {
  3495. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3496. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3497. offset += 4; /* 32 bit */
  3498. break;
  3499. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3500. offset += 8;
  3501. break;
  3502. default: /* reserved in PCI 2.2 */
  3503. dev_warn(&pdev->dev,
  3504. "base address is invalid\n");
  3505. return -1;
  3506. break;
  3507. }
  3508. }
  3509. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3510. return i + 1;
  3511. }
  3512. return -1;
  3513. }
  3514. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3515. * controllers that are capable. If not, we use IO-APIC mode.
  3516. */
  3517. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3518. {
  3519. #ifdef CONFIG_PCI_MSI
  3520. int err;
  3521. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3522. {0, 2}, {0, 3}
  3523. };
  3524. /* Some boards advertise MSI but don't really support it */
  3525. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3526. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3527. goto default_int_mode;
  3528. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3529. dev_info(&h->pdev->dev, "MSIX\n");
  3530. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3531. if (!err) {
  3532. h->intr[0] = hpsa_msix_entries[0].vector;
  3533. h->intr[1] = hpsa_msix_entries[1].vector;
  3534. h->intr[2] = hpsa_msix_entries[2].vector;
  3535. h->intr[3] = hpsa_msix_entries[3].vector;
  3536. h->msix_vector = 1;
  3537. return;
  3538. }
  3539. if (err > 0) {
  3540. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3541. "available\n", err);
  3542. goto default_int_mode;
  3543. } else {
  3544. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3545. err);
  3546. goto default_int_mode;
  3547. }
  3548. }
  3549. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3550. dev_info(&h->pdev->dev, "MSI\n");
  3551. if (!pci_enable_msi(h->pdev))
  3552. h->msi_vector = 1;
  3553. else
  3554. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3555. }
  3556. default_int_mode:
  3557. #endif /* CONFIG_PCI_MSI */
  3558. /* if we get here we're going to use the default interrupt mode */
  3559. h->intr[h->intr_mode] = h->pdev->irq;
  3560. }
  3561. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3562. {
  3563. int i;
  3564. u32 subsystem_vendor_id, subsystem_device_id;
  3565. subsystem_vendor_id = pdev->subsystem_vendor;
  3566. subsystem_device_id = pdev->subsystem_device;
  3567. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3568. subsystem_vendor_id;
  3569. for (i = 0; i < ARRAY_SIZE(products); i++)
  3570. if (*board_id == products[i].board_id)
  3571. return i;
  3572. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3573. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3574. !hpsa_allow_any) {
  3575. dev_warn(&pdev->dev, "unrecognized board ID: "
  3576. "0x%08x, ignoring.\n", *board_id);
  3577. return -ENODEV;
  3578. }
  3579. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3580. }
  3581. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3582. unsigned long *memory_bar)
  3583. {
  3584. int i;
  3585. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3586. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3587. /* addressing mode bits already removed */
  3588. *memory_bar = pci_resource_start(pdev, i);
  3589. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3590. *memory_bar);
  3591. return 0;
  3592. }
  3593. dev_warn(&pdev->dev, "no memory BAR found\n");
  3594. return -ENODEV;
  3595. }
  3596. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3597. void __iomem *vaddr, int wait_for_ready)
  3598. {
  3599. int i, iterations;
  3600. u32 scratchpad;
  3601. if (wait_for_ready)
  3602. iterations = HPSA_BOARD_READY_ITERATIONS;
  3603. else
  3604. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3605. for (i = 0; i < iterations; i++) {
  3606. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3607. if (wait_for_ready) {
  3608. if (scratchpad == HPSA_FIRMWARE_READY)
  3609. return 0;
  3610. } else {
  3611. if (scratchpad != HPSA_FIRMWARE_READY)
  3612. return 0;
  3613. }
  3614. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3615. }
  3616. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3617. return -ENODEV;
  3618. }
  3619. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3620. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3621. u64 *cfg_offset)
  3622. {
  3623. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3624. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3625. *cfg_base_addr &= (u32) 0x0000ffff;
  3626. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3627. if (*cfg_base_addr_index == -1) {
  3628. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3629. return -ENODEV;
  3630. }
  3631. return 0;
  3632. }
  3633. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3634. {
  3635. u64 cfg_offset;
  3636. u32 cfg_base_addr;
  3637. u64 cfg_base_addr_index;
  3638. u32 trans_offset;
  3639. int rc;
  3640. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3641. &cfg_base_addr_index, &cfg_offset);
  3642. if (rc)
  3643. return rc;
  3644. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3645. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3646. if (!h->cfgtable)
  3647. return -ENOMEM;
  3648. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3649. if (rc)
  3650. return rc;
  3651. /* Find performant mode table. */
  3652. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3653. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3654. cfg_base_addr_index)+cfg_offset+trans_offset,
  3655. sizeof(*h->transtable));
  3656. if (!h->transtable)
  3657. return -ENOMEM;
  3658. return 0;
  3659. }
  3660. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3661. {
  3662. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3663. /* Limit commands in memory limited kdump scenario. */
  3664. if (reset_devices && h->max_commands > 32)
  3665. h->max_commands = 32;
  3666. if (h->max_commands < 16) {
  3667. dev_warn(&h->pdev->dev, "Controller reports "
  3668. "max supported commands of %d, an obvious lie. "
  3669. "Using 16. Ensure that firmware is up to date.\n",
  3670. h->max_commands);
  3671. h->max_commands = 16;
  3672. }
  3673. }
  3674. /* Interrogate the hardware for some limits:
  3675. * max commands, max SG elements without chaining, and with chaining,
  3676. * SG chain block size, etc.
  3677. */
  3678. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3679. {
  3680. hpsa_get_max_perf_mode_cmds(h);
  3681. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3682. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3683. /*
  3684. * Limit in-command s/g elements to 32 save dma'able memory.
  3685. * Howvever spec says if 0, use 31
  3686. */
  3687. h->max_cmd_sg_entries = 31;
  3688. if (h->maxsgentries > 512) {
  3689. h->max_cmd_sg_entries = 32;
  3690. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3691. h->maxsgentries--; /* save one for chain pointer */
  3692. } else {
  3693. h->maxsgentries = 31; /* default to traditional values */
  3694. h->chainsize = 0;
  3695. }
  3696. /* Find out what task management functions are supported and cache */
  3697. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3698. }
  3699. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3700. {
  3701. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3702. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3703. return false;
  3704. }
  3705. return true;
  3706. }
  3707. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3708. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3709. {
  3710. #ifdef CONFIG_X86
  3711. u32 prefetch;
  3712. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3713. prefetch |= 0x100;
  3714. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3715. #endif
  3716. }
  3717. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3718. * in a prefetch beyond physical memory.
  3719. */
  3720. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3721. {
  3722. u32 dma_prefetch;
  3723. if (h->board_id != 0x3225103C)
  3724. return;
  3725. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3726. dma_prefetch |= 0x8000;
  3727. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3728. }
  3729. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3730. {
  3731. int i;
  3732. u32 doorbell_value;
  3733. unsigned long flags;
  3734. /* under certain very rare conditions, this can take awhile.
  3735. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3736. * as we enter this code.)
  3737. */
  3738. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3739. spin_lock_irqsave(&h->lock, flags);
  3740. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3741. spin_unlock_irqrestore(&h->lock, flags);
  3742. if (!(doorbell_value & CFGTBL_ChangeReq))
  3743. break;
  3744. /* delay and try again */
  3745. usleep_range(10000, 20000);
  3746. }
  3747. }
  3748. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3749. {
  3750. u32 trans_support;
  3751. trans_support = readl(&(h->cfgtable->TransportSupport));
  3752. if (!(trans_support & SIMPLE_MODE))
  3753. return -ENOTSUPP;
  3754. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3755. /* Update the field, and then ring the doorbell */
  3756. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3757. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3758. hpsa_wait_for_mode_change_ack(h);
  3759. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3760. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3761. dev_warn(&h->pdev->dev,
  3762. "unable to get board into simple mode\n");
  3763. return -ENODEV;
  3764. }
  3765. h->transMethod = CFGTBL_Trans_Simple;
  3766. return 0;
  3767. }
  3768. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3769. {
  3770. int prod_index, err;
  3771. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3772. if (prod_index < 0)
  3773. return -ENODEV;
  3774. h->product_name = products[prod_index].product_name;
  3775. h->access = *(products[prod_index].access);
  3776. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3777. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3778. err = pci_enable_device(h->pdev);
  3779. if (err) {
  3780. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3781. return err;
  3782. }
  3783. /* Enable bus mastering (pci_disable_device may disable this) */
  3784. pci_set_master(h->pdev);
  3785. err = pci_request_regions(h->pdev, HPSA);
  3786. if (err) {
  3787. dev_err(&h->pdev->dev,
  3788. "cannot obtain PCI resources, aborting\n");
  3789. return err;
  3790. }
  3791. hpsa_interrupt_mode(h);
  3792. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3793. if (err)
  3794. goto err_out_free_res;
  3795. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3796. if (!h->vaddr) {
  3797. err = -ENOMEM;
  3798. goto err_out_free_res;
  3799. }
  3800. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3801. if (err)
  3802. goto err_out_free_res;
  3803. err = hpsa_find_cfgtables(h);
  3804. if (err)
  3805. goto err_out_free_res;
  3806. hpsa_find_board_params(h);
  3807. if (!hpsa_CISS_signature_present(h)) {
  3808. err = -ENODEV;
  3809. goto err_out_free_res;
  3810. }
  3811. hpsa_enable_scsi_prefetch(h);
  3812. hpsa_p600_dma_prefetch_quirk(h);
  3813. err = hpsa_enter_simple_mode(h);
  3814. if (err)
  3815. goto err_out_free_res;
  3816. return 0;
  3817. err_out_free_res:
  3818. if (h->transtable)
  3819. iounmap(h->transtable);
  3820. if (h->cfgtable)
  3821. iounmap(h->cfgtable);
  3822. if (h->vaddr)
  3823. iounmap(h->vaddr);
  3824. pci_disable_device(h->pdev);
  3825. pci_release_regions(h->pdev);
  3826. return err;
  3827. }
  3828. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3829. {
  3830. int rc;
  3831. #define HBA_INQUIRY_BYTE_COUNT 64
  3832. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3833. if (!h->hba_inquiry_data)
  3834. return;
  3835. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3836. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3837. if (rc != 0) {
  3838. kfree(h->hba_inquiry_data);
  3839. h->hba_inquiry_data = NULL;
  3840. }
  3841. }
  3842. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3843. {
  3844. int rc, i;
  3845. if (!reset_devices)
  3846. return 0;
  3847. /* Reset the controller with a PCI power-cycle or via doorbell */
  3848. rc = hpsa_kdump_hard_reset_controller(pdev);
  3849. /* -ENOTSUPP here means we cannot reset the controller
  3850. * but it's already (and still) up and running in
  3851. * "performant mode". Or, it might be 640x, which can't reset
  3852. * due to concerns about shared bbwc between 6402/6404 pair.
  3853. */
  3854. if (rc == -ENOTSUPP)
  3855. return rc; /* just try to do the kdump anyhow. */
  3856. if (rc)
  3857. return -ENODEV;
  3858. /* Now try to get the controller to respond to a no-op */
  3859. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3860. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3861. if (hpsa_noop(pdev) == 0)
  3862. break;
  3863. else
  3864. dev_warn(&pdev->dev, "no-op failed%s\n",
  3865. (i < 11 ? "; re-trying" : ""));
  3866. }
  3867. return 0;
  3868. }
  3869. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3870. {
  3871. h->cmd_pool_bits = kzalloc(
  3872. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3873. sizeof(unsigned long), GFP_KERNEL);
  3874. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3875. h->nr_cmds * sizeof(*h->cmd_pool),
  3876. &(h->cmd_pool_dhandle));
  3877. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3878. h->nr_cmds * sizeof(*h->errinfo_pool),
  3879. &(h->errinfo_pool_dhandle));
  3880. if ((h->cmd_pool_bits == NULL)
  3881. || (h->cmd_pool == NULL)
  3882. || (h->errinfo_pool == NULL)) {
  3883. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3884. return -ENOMEM;
  3885. }
  3886. return 0;
  3887. }
  3888. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3889. {
  3890. kfree(h->cmd_pool_bits);
  3891. if (h->cmd_pool)
  3892. pci_free_consistent(h->pdev,
  3893. h->nr_cmds * sizeof(struct CommandList),
  3894. h->cmd_pool, h->cmd_pool_dhandle);
  3895. if (h->errinfo_pool)
  3896. pci_free_consistent(h->pdev,
  3897. h->nr_cmds * sizeof(struct ErrorInfo),
  3898. h->errinfo_pool,
  3899. h->errinfo_pool_dhandle);
  3900. }
  3901. static int hpsa_request_irq(struct ctlr_info *h,
  3902. irqreturn_t (*msixhandler)(int, void *),
  3903. irqreturn_t (*intxhandler)(int, void *))
  3904. {
  3905. int rc;
  3906. if (h->msix_vector || h->msi_vector)
  3907. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3908. 0, h->devname, h);
  3909. else
  3910. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3911. IRQF_SHARED, h->devname, h);
  3912. if (rc) {
  3913. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3914. h->intr[h->intr_mode], h->devname);
  3915. return -ENODEV;
  3916. }
  3917. return 0;
  3918. }
  3919. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3920. {
  3921. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3922. HPSA_RESET_TYPE_CONTROLLER)) {
  3923. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3924. return -EIO;
  3925. }
  3926. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3927. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3928. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3929. return -1;
  3930. }
  3931. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3932. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3933. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3934. "after soft reset.\n");
  3935. return -1;
  3936. }
  3937. return 0;
  3938. }
  3939. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3940. {
  3941. free_irq(h->intr[h->intr_mode], h);
  3942. #ifdef CONFIG_PCI_MSI
  3943. if (h->msix_vector)
  3944. pci_disable_msix(h->pdev);
  3945. else if (h->msi_vector)
  3946. pci_disable_msi(h->pdev);
  3947. #endif /* CONFIG_PCI_MSI */
  3948. hpsa_free_sg_chain_blocks(h);
  3949. hpsa_free_cmd_pool(h);
  3950. kfree(h->blockFetchTable);
  3951. pci_free_consistent(h->pdev, h->reply_pool_size,
  3952. h->reply_pool, h->reply_pool_dhandle);
  3953. if (h->vaddr)
  3954. iounmap(h->vaddr);
  3955. if (h->transtable)
  3956. iounmap(h->transtable);
  3957. if (h->cfgtable)
  3958. iounmap(h->cfgtable);
  3959. pci_release_regions(h->pdev);
  3960. kfree(h);
  3961. }
  3962. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  3963. {
  3964. assert_spin_locked(&lockup_detector_lock);
  3965. if (!hpsa_lockup_detector)
  3966. return;
  3967. if (h->lockup_detected)
  3968. return; /* already stopped the lockup detector */
  3969. list_del(&h->lockup_list);
  3970. }
  3971. /* Called when controller lockup detected. */
  3972. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  3973. {
  3974. struct CommandList *c = NULL;
  3975. assert_spin_locked(&h->lock);
  3976. /* Mark all outstanding commands as failed and complete them. */
  3977. while (!list_empty(list)) {
  3978. c = list_entry(list->next, struct CommandList, list);
  3979. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3980. finish_cmd(c);
  3981. }
  3982. }
  3983. static void controller_lockup_detected(struct ctlr_info *h)
  3984. {
  3985. unsigned long flags;
  3986. assert_spin_locked(&lockup_detector_lock);
  3987. remove_ctlr_from_lockup_detector_list(h);
  3988. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3989. spin_lock_irqsave(&h->lock, flags);
  3990. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  3991. spin_unlock_irqrestore(&h->lock, flags);
  3992. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  3993. h->lockup_detected);
  3994. pci_disable_device(h->pdev);
  3995. spin_lock_irqsave(&h->lock, flags);
  3996. fail_all_cmds_on_list(h, &h->cmpQ);
  3997. fail_all_cmds_on_list(h, &h->reqQ);
  3998. spin_unlock_irqrestore(&h->lock, flags);
  3999. }
  4000. #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
  4001. #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
  4002. static void detect_controller_lockup(struct ctlr_info *h)
  4003. {
  4004. u64 now;
  4005. u32 heartbeat;
  4006. unsigned long flags;
  4007. assert_spin_locked(&lockup_detector_lock);
  4008. now = get_jiffies_64();
  4009. /* If we've received an interrupt recently, we're ok. */
  4010. if (time_after64(h->last_intr_timestamp +
  4011. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  4012. return;
  4013. /*
  4014. * If we've already checked the heartbeat recently, we're ok.
  4015. * This could happen if someone sends us a signal. We
  4016. * otherwise don't care about signals in this thread.
  4017. */
  4018. if (time_after64(h->last_heartbeat_timestamp +
  4019. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  4020. return;
  4021. /* If heartbeat has not changed since we last looked, we're not ok. */
  4022. spin_lock_irqsave(&h->lock, flags);
  4023. heartbeat = readl(&h->cfgtable->HeartBeat);
  4024. spin_unlock_irqrestore(&h->lock, flags);
  4025. if (h->last_heartbeat == heartbeat) {
  4026. controller_lockup_detected(h);
  4027. return;
  4028. }
  4029. /* We're ok. */
  4030. h->last_heartbeat = heartbeat;
  4031. h->last_heartbeat_timestamp = now;
  4032. }
  4033. static int detect_controller_lockup_thread(void *notused)
  4034. {
  4035. struct ctlr_info *h;
  4036. unsigned long flags;
  4037. while (1) {
  4038. struct list_head *this, *tmp;
  4039. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4040. if (kthread_should_stop())
  4041. break;
  4042. spin_lock_irqsave(&lockup_detector_lock, flags);
  4043. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4044. h = list_entry(this, struct ctlr_info, lockup_list);
  4045. detect_controller_lockup(h);
  4046. }
  4047. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4048. }
  4049. return 0;
  4050. }
  4051. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4052. {
  4053. unsigned long flags;
  4054. spin_lock_irqsave(&lockup_detector_lock, flags);
  4055. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4056. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4057. }
  4058. static void start_controller_lockup_detector(struct ctlr_info *h)
  4059. {
  4060. /* Start the lockup detector thread if not already started */
  4061. if (!hpsa_lockup_detector) {
  4062. spin_lock_init(&lockup_detector_lock);
  4063. hpsa_lockup_detector =
  4064. kthread_run(detect_controller_lockup_thread,
  4065. NULL, HPSA);
  4066. }
  4067. if (!hpsa_lockup_detector) {
  4068. dev_warn(&h->pdev->dev,
  4069. "Could not start lockup detector thread\n");
  4070. return;
  4071. }
  4072. add_ctlr_to_lockup_detector_list(h);
  4073. }
  4074. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4075. {
  4076. unsigned long flags;
  4077. spin_lock_irqsave(&lockup_detector_lock, flags);
  4078. remove_ctlr_from_lockup_detector_list(h);
  4079. /* If the list of ctlr's to monitor is empty, stop the thread */
  4080. if (list_empty(&hpsa_ctlr_list)) {
  4081. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4082. kthread_stop(hpsa_lockup_detector);
  4083. spin_lock_irqsave(&lockup_detector_lock, flags);
  4084. hpsa_lockup_detector = NULL;
  4085. }
  4086. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4087. }
  4088. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  4089. const struct pci_device_id *ent)
  4090. {
  4091. int dac, rc;
  4092. struct ctlr_info *h;
  4093. int try_soft_reset = 0;
  4094. unsigned long flags;
  4095. if (number_of_controllers == 0)
  4096. printk(KERN_INFO DRIVER_NAME "\n");
  4097. rc = hpsa_init_reset_devices(pdev);
  4098. if (rc) {
  4099. if (rc != -ENOTSUPP)
  4100. return rc;
  4101. /* If the reset fails in a particular way (it has no way to do
  4102. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4103. * a soft reset once we get the controller configured up to the
  4104. * point that it can accept a command.
  4105. */
  4106. try_soft_reset = 1;
  4107. rc = 0;
  4108. }
  4109. reinit_after_soft_reset:
  4110. /* Command structures must be aligned on a 32-byte boundary because
  4111. * the 5 lower bits of the address are used by the hardware. and by
  4112. * the driver. See comments in hpsa.h for more info.
  4113. */
  4114. #define COMMANDLIST_ALIGNMENT 32
  4115. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4116. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4117. if (!h)
  4118. return -ENOMEM;
  4119. h->pdev = pdev;
  4120. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4121. INIT_LIST_HEAD(&h->cmpQ);
  4122. INIT_LIST_HEAD(&h->reqQ);
  4123. spin_lock_init(&h->lock);
  4124. spin_lock_init(&h->scan_lock);
  4125. rc = hpsa_pci_init(h);
  4126. if (rc != 0)
  4127. goto clean1;
  4128. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4129. h->ctlr = number_of_controllers;
  4130. number_of_controllers++;
  4131. /* configure PCI DMA stuff */
  4132. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4133. if (rc == 0) {
  4134. dac = 1;
  4135. } else {
  4136. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4137. if (rc == 0) {
  4138. dac = 0;
  4139. } else {
  4140. dev_err(&pdev->dev, "no suitable DMA available\n");
  4141. goto clean1;
  4142. }
  4143. }
  4144. /* make sure the board interrupts are off */
  4145. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4146. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4147. goto clean2;
  4148. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4149. h->devname, pdev->device,
  4150. h->intr[h->intr_mode], dac ? "" : " not");
  4151. if (hpsa_allocate_cmd_pool(h))
  4152. goto clean4;
  4153. if (hpsa_allocate_sg_chain_blocks(h))
  4154. goto clean4;
  4155. init_waitqueue_head(&h->scan_wait_queue);
  4156. h->scan_finished = 1; /* no scan currently in progress */
  4157. pci_set_drvdata(pdev, h);
  4158. h->ndevices = 0;
  4159. h->scsi_host = NULL;
  4160. spin_lock_init(&h->devlock);
  4161. hpsa_put_ctlr_into_performant_mode(h);
  4162. /* At this point, the controller is ready to take commands.
  4163. * Now, if reset_devices and the hard reset didn't work, try
  4164. * the soft reset and see if that works.
  4165. */
  4166. if (try_soft_reset) {
  4167. /* This is kind of gross. We may or may not get a completion
  4168. * from the soft reset command, and if we do, then the value
  4169. * from the fifo may or may not be valid. So, we wait 10 secs
  4170. * after the reset throwing away any completions we get during
  4171. * that time. Unregister the interrupt handler and register
  4172. * fake ones to scoop up any residual completions.
  4173. */
  4174. spin_lock_irqsave(&h->lock, flags);
  4175. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4176. spin_unlock_irqrestore(&h->lock, flags);
  4177. free_irq(h->intr[h->intr_mode], h);
  4178. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4179. hpsa_intx_discard_completions);
  4180. if (rc) {
  4181. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4182. "soft reset.\n");
  4183. goto clean4;
  4184. }
  4185. rc = hpsa_kdump_soft_reset(h);
  4186. if (rc)
  4187. /* Neither hard nor soft reset worked, we're hosed. */
  4188. goto clean4;
  4189. dev_info(&h->pdev->dev, "Board READY.\n");
  4190. dev_info(&h->pdev->dev,
  4191. "Waiting for stale completions to drain.\n");
  4192. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4193. msleep(10000);
  4194. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4195. rc = controller_reset_failed(h->cfgtable);
  4196. if (rc)
  4197. dev_info(&h->pdev->dev,
  4198. "Soft reset appears to have failed.\n");
  4199. /* since the controller's reset, we have to go back and re-init
  4200. * everything. Easiest to just forget what we've done and do it
  4201. * all over again.
  4202. */
  4203. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4204. try_soft_reset = 0;
  4205. if (rc)
  4206. /* don't go to clean4, we already unallocated */
  4207. return -ENODEV;
  4208. goto reinit_after_soft_reset;
  4209. }
  4210. /* Turn the interrupts on so we can service requests */
  4211. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4212. hpsa_hba_inquiry(h);
  4213. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4214. start_controller_lockup_detector(h);
  4215. return 1;
  4216. clean4:
  4217. hpsa_free_sg_chain_blocks(h);
  4218. hpsa_free_cmd_pool(h);
  4219. free_irq(h->intr[h->intr_mode], h);
  4220. clean2:
  4221. clean1:
  4222. kfree(h);
  4223. return rc;
  4224. }
  4225. static void hpsa_flush_cache(struct ctlr_info *h)
  4226. {
  4227. char *flush_buf;
  4228. struct CommandList *c;
  4229. flush_buf = kzalloc(4, GFP_KERNEL);
  4230. if (!flush_buf)
  4231. return;
  4232. c = cmd_special_alloc(h);
  4233. if (!c) {
  4234. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4235. goto out_of_memory;
  4236. }
  4237. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4238. RAID_CTLR_LUNID, TYPE_CMD);
  4239. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4240. if (c->err_info->CommandStatus != 0)
  4241. dev_warn(&h->pdev->dev,
  4242. "error flushing cache on controller\n");
  4243. cmd_special_free(h, c);
  4244. out_of_memory:
  4245. kfree(flush_buf);
  4246. }
  4247. static void hpsa_shutdown(struct pci_dev *pdev)
  4248. {
  4249. struct ctlr_info *h;
  4250. h = pci_get_drvdata(pdev);
  4251. /* Turn board interrupts off and send the flush cache command
  4252. * sendcmd will turn off interrupt, and send the flush...
  4253. * To write all data in the battery backed cache to disks
  4254. */
  4255. hpsa_flush_cache(h);
  4256. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4257. free_irq(h->intr[h->intr_mode], h);
  4258. #ifdef CONFIG_PCI_MSI
  4259. if (h->msix_vector)
  4260. pci_disable_msix(h->pdev);
  4261. else if (h->msi_vector)
  4262. pci_disable_msi(h->pdev);
  4263. #endif /* CONFIG_PCI_MSI */
  4264. }
  4265. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4266. {
  4267. int i;
  4268. for (i = 0; i < h->ndevices; i++)
  4269. kfree(h->dev[i]);
  4270. }
  4271. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4272. {
  4273. struct ctlr_info *h;
  4274. if (pci_get_drvdata(pdev) == NULL) {
  4275. dev_err(&pdev->dev, "unable to remove device\n");
  4276. return;
  4277. }
  4278. h = pci_get_drvdata(pdev);
  4279. stop_controller_lockup_detector(h);
  4280. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4281. hpsa_shutdown(pdev);
  4282. iounmap(h->vaddr);
  4283. iounmap(h->transtable);
  4284. iounmap(h->cfgtable);
  4285. hpsa_free_device_info(h);
  4286. hpsa_free_sg_chain_blocks(h);
  4287. pci_free_consistent(h->pdev,
  4288. h->nr_cmds * sizeof(struct CommandList),
  4289. h->cmd_pool, h->cmd_pool_dhandle);
  4290. pci_free_consistent(h->pdev,
  4291. h->nr_cmds * sizeof(struct ErrorInfo),
  4292. h->errinfo_pool, h->errinfo_pool_dhandle);
  4293. pci_free_consistent(h->pdev, h->reply_pool_size,
  4294. h->reply_pool, h->reply_pool_dhandle);
  4295. kfree(h->cmd_pool_bits);
  4296. kfree(h->blockFetchTable);
  4297. kfree(h->hba_inquiry_data);
  4298. pci_disable_device(pdev);
  4299. pci_release_regions(pdev);
  4300. pci_set_drvdata(pdev, NULL);
  4301. kfree(h);
  4302. }
  4303. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4304. __attribute__((unused)) pm_message_t state)
  4305. {
  4306. return -ENOSYS;
  4307. }
  4308. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4309. {
  4310. return -ENOSYS;
  4311. }
  4312. static struct pci_driver hpsa_pci_driver = {
  4313. .name = HPSA,
  4314. .probe = hpsa_init_one,
  4315. .remove = __devexit_p(hpsa_remove_one),
  4316. .id_table = hpsa_pci_device_id, /* id_table */
  4317. .shutdown = hpsa_shutdown,
  4318. .suspend = hpsa_suspend,
  4319. .resume = hpsa_resume,
  4320. };
  4321. /* Fill in bucket_map[], given nsgs (the max number of
  4322. * scatter gather elements supported) and bucket[],
  4323. * which is an array of 8 integers. The bucket[] array
  4324. * contains 8 different DMA transfer sizes (in 16
  4325. * byte increments) which the controller uses to fetch
  4326. * commands. This function fills in bucket_map[], which
  4327. * maps a given number of scatter gather elements to one of
  4328. * the 8 DMA transfer sizes. The point of it is to allow the
  4329. * controller to only do as much DMA as needed to fetch the
  4330. * command, with the DMA transfer size encoded in the lower
  4331. * bits of the command address.
  4332. */
  4333. static void calc_bucket_map(int bucket[], int num_buckets,
  4334. int nsgs, int *bucket_map)
  4335. {
  4336. int i, j, b, size;
  4337. /* even a command with 0 SGs requires 4 blocks */
  4338. #define MINIMUM_TRANSFER_BLOCKS 4
  4339. #define NUM_BUCKETS 8
  4340. /* Note, bucket_map must have nsgs+1 entries. */
  4341. for (i = 0; i <= nsgs; i++) {
  4342. /* Compute size of a command with i SG entries */
  4343. size = i + MINIMUM_TRANSFER_BLOCKS;
  4344. b = num_buckets; /* Assume the biggest bucket */
  4345. /* Find the bucket that is just big enough */
  4346. for (j = 0; j < 8; j++) {
  4347. if (bucket[j] >= size) {
  4348. b = j;
  4349. break;
  4350. }
  4351. }
  4352. /* for a command with i SG entries, use bucket b. */
  4353. bucket_map[i] = b;
  4354. }
  4355. }
  4356. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4357. u32 use_short_tags)
  4358. {
  4359. int i;
  4360. unsigned long register_value;
  4361. /* This is a bit complicated. There are 8 registers on
  4362. * the controller which we write to to tell it 8 different
  4363. * sizes of commands which there may be. It's a way of
  4364. * reducing the DMA done to fetch each command. Encoded into
  4365. * each command's tag are 3 bits which communicate to the controller
  4366. * which of the eight sizes that command fits within. The size of
  4367. * each command depends on how many scatter gather entries there are.
  4368. * Each SG entry requires 16 bytes. The eight registers are programmed
  4369. * with the number of 16-byte blocks a command of that size requires.
  4370. * The smallest command possible requires 5 such 16 byte blocks.
  4371. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4372. * blocks. Note, this only extends to the SG entries contained
  4373. * within the command block, and does not extend to chained blocks
  4374. * of SG elements. bft[] contains the eight values we write to
  4375. * the registers. They are not evenly distributed, but have more
  4376. * sizes for small commands, and fewer sizes for larger commands.
  4377. */
  4378. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4379. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4380. /* 5 = 1 s/g entry or 4k
  4381. * 6 = 2 s/g entry or 8k
  4382. * 8 = 4 s/g entry or 16k
  4383. * 10 = 6 s/g entry or 24k
  4384. */
  4385. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  4386. /* Controller spec: zero out this buffer. */
  4387. memset(h->reply_pool, 0, h->reply_pool_size);
  4388. h->reply_pool_head = h->reply_pool;
  4389. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4390. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4391. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4392. for (i = 0; i < 8; i++)
  4393. writel(bft[i], &h->transtable->BlockFetch[i]);
  4394. /* size of controller ring buffer */
  4395. writel(h->max_commands, &h->transtable->RepQSize);
  4396. writel(1, &h->transtable->RepQCount);
  4397. writel(0, &h->transtable->RepQCtrAddrLow32);
  4398. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4399. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  4400. writel(0, &h->transtable->RepQAddr0High32);
  4401. writel(CFGTBL_Trans_Performant | use_short_tags,
  4402. &(h->cfgtable->HostWrite.TransportRequest));
  4403. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4404. hpsa_wait_for_mode_change_ack(h);
  4405. register_value = readl(&(h->cfgtable->TransportActive));
  4406. if (!(register_value & CFGTBL_Trans_Performant)) {
  4407. dev_warn(&h->pdev->dev, "unable to get board into"
  4408. " performant mode\n");
  4409. return;
  4410. }
  4411. /* Change the access methods to the performant access methods */
  4412. h->access = SA5_performant_access;
  4413. h->transMethod = CFGTBL_Trans_Performant;
  4414. }
  4415. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4416. {
  4417. u32 trans_support;
  4418. if (hpsa_simple_mode)
  4419. return;
  4420. trans_support = readl(&(h->cfgtable->TransportSupport));
  4421. if (!(trans_support & PERFORMANT_MODE))
  4422. return;
  4423. hpsa_get_max_perf_mode_cmds(h);
  4424. /* Performant mode ring buffer and supporting data structures */
  4425. h->reply_pool_size = h->max_commands * sizeof(u64);
  4426. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4427. &(h->reply_pool_dhandle));
  4428. /* Need a block fetch table for performant mode */
  4429. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4430. sizeof(u32)), GFP_KERNEL);
  4431. if ((h->reply_pool == NULL)
  4432. || (h->blockFetchTable == NULL))
  4433. goto clean_up;
  4434. hpsa_enter_performant_mode(h,
  4435. trans_support & CFGTBL_Trans_use_short_tags);
  4436. return;
  4437. clean_up:
  4438. if (h->reply_pool)
  4439. pci_free_consistent(h->pdev, h->reply_pool_size,
  4440. h->reply_pool, h->reply_pool_dhandle);
  4441. kfree(h->blockFetchTable);
  4442. }
  4443. /*
  4444. * This is it. Register the PCI driver information for the cards we control
  4445. * the OS will call our registered routines when it finds one of our cards.
  4446. */
  4447. static int __init hpsa_init(void)
  4448. {
  4449. return pci_register_driver(&hpsa_pci_driver);
  4450. }
  4451. static void __exit hpsa_cleanup(void)
  4452. {
  4453. pci_unregister_driver(&hpsa_pci_driver);
  4454. }
  4455. module_init(hpsa_init);
  4456. module_exit(hpsa_cleanup);