events.c 35 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528
  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info
  80. {
  81. struct list_head list;
  82. enum xen_irq_type type; /* type */
  83. unsigned irq;
  84. unsigned short evtchn; /* event channel */
  85. unsigned short cpu; /* cpu bound */
  86. union {
  87. unsigned short virq;
  88. enum ipi_vector ipi;
  89. struct {
  90. unsigned short pirq;
  91. unsigned short gsi;
  92. unsigned char vector;
  93. unsigned char flags;
  94. } pirq;
  95. } u;
  96. };
  97. #define PIRQ_NEEDS_EOI (1 << 0)
  98. #define PIRQ_SHAREABLE (1 << 1)
  99. static int *evtchn_to_irq;
  100. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  101. cpu_evtchn_mask);
  102. /* Xen will never allocate port zero for any purpose. */
  103. #define VALID_EVTCHN(chn) ((chn) != 0)
  104. static struct irq_chip xen_dynamic_chip;
  105. static struct irq_chip xen_percpu_chip;
  106. static struct irq_chip xen_pirq_chip;
  107. /* Get info for IRQ */
  108. static struct irq_info *info_for_irq(unsigned irq)
  109. {
  110. return get_irq_data(irq);
  111. }
  112. /* Constructors for packed IRQ information. */
  113. static void xen_irq_info_common_init(struct irq_info *info,
  114. unsigned irq,
  115. enum xen_irq_type type,
  116. unsigned short evtchn,
  117. unsigned short cpu)
  118. {
  119. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  120. info->type = type;
  121. info->irq = irq;
  122. info->evtchn = evtchn;
  123. info->cpu = cpu;
  124. evtchn_to_irq[evtchn] = irq;
  125. }
  126. static void xen_irq_info_evtchn_init(unsigned irq,
  127. unsigned short evtchn)
  128. {
  129. struct irq_info *info = info_for_irq(irq);
  130. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  131. }
  132. static void xen_irq_info_ipi_init(unsigned cpu,
  133. unsigned irq,
  134. unsigned short evtchn,
  135. enum ipi_vector ipi)
  136. {
  137. struct irq_info *info = info_for_irq(irq);
  138. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  139. info->u.ipi = ipi;
  140. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  141. }
  142. static void xen_irq_info_virq_init(unsigned cpu,
  143. unsigned irq,
  144. unsigned short evtchn,
  145. unsigned short virq)
  146. {
  147. struct irq_info *info = info_for_irq(irq);
  148. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  149. info->u.virq = virq;
  150. per_cpu(virq_to_irq, cpu)[virq] = irq;
  151. }
  152. static void xen_irq_info_pirq_init(unsigned irq,
  153. unsigned short evtchn,
  154. unsigned short pirq,
  155. unsigned short gsi,
  156. unsigned short vector,
  157. unsigned char flags)
  158. {
  159. struct irq_info *info = info_for_irq(irq);
  160. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  161. info->u.pirq.pirq = pirq;
  162. info->u.pirq.gsi = gsi;
  163. info->u.pirq.vector = vector;
  164. info->u.pirq.flags = flags;
  165. }
  166. /*
  167. * Accessors for packed IRQ information.
  168. */
  169. static unsigned int evtchn_from_irq(unsigned irq)
  170. {
  171. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  172. return 0;
  173. return info_for_irq(irq)->evtchn;
  174. }
  175. unsigned irq_from_evtchn(unsigned int evtchn)
  176. {
  177. return evtchn_to_irq[evtchn];
  178. }
  179. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  180. static enum ipi_vector ipi_from_irq(unsigned irq)
  181. {
  182. struct irq_info *info = info_for_irq(irq);
  183. BUG_ON(info == NULL);
  184. BUG_ON(info->type != IRQT_IPI);
  185. return info->u.ipi;
  186. }
  187. static unsigned virq_from_irq(unsigned irq)
  188. {
  189. struct irq_info *info = info_for_irq(irq);
  190. BUG_ON(info == NULL);
  191. BUG_ON(info->type != IRQT_VIRQ);
  192. return info->u.virq;
  193. }
  194. static unsigned pirq_from_irq(unsigned irq)
  195. {
  196. struct irq_info *info = info_for_irq(irq);
  197. BUG_ON(info == NULL);
  198. BUG_ON(info->type != IRQT_PIRQ);
  199. return info->u.pirq.pirq;
  200. }
  201. static enum xen_irq_type type_from_irq(unsigned irq)
  202. {
  203. return info_for_irq(irq)->type;
  204. }
  205. static unsigned cpu_from_irq(unsigned irq)
  206. {
  207. return info_for_irq(irq)->cpu;
  208. }
  209. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  210. {
  211. int irq = evtchn_to_irq[evtchn];
  212. unsigned ret = 0;
  213. if (irq != -1)
  214. ret = cpu_from_irq(irq);
  215. return ret;
  216. }
  217. static bool pirq_needs_eoi(unsigned irq)
  218. {
  219. struct irq_info *info = info_for_irq(irq);
  220. BUG_ON(info->type != IRQT_PIRQ);
  221. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  222. }
  223. static inline unsigned long active_evtchns(unsigned int cpu,
  224. struct shared_info *sh,
  225. unsigned int idx)
  226. {
  227. return (sh->evtchn_pending[idx] &
  228. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  229. ~sh->evtchn_mask[idx]);
  230. }
  231. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  232. {
  233. int irq = evtchn_to_irq[chn];
  234. BUG_ON(irq == -1);
  235. #ifdef CONFIG_SMP
  236. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  237. #endif
  238. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  239. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  240. info_for_irq(irq)->cpu = cpu;
  241. }
  242. static void init_evtchn_cpu_bindings(void)
  243. {
  244. int i;
  245. #ifdef CONFIG_SMP
  246. struct irq_info *info;
  247. /* By default all event channels notify CPU#0. */
  248. list_for_each_entry(info, &xen_irq_list_head, list) {
  249. struct irq_desc *desc = irq_to_desc(info->irq);
  250. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  251. }
  252. #endif
  253. for_each_possible_cpu(i)
  254. memset(per_cpu(cpu_evtchn_mask, i),
  255. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  256. }
  257. static inline void clear_evtchn(int port)
  258. {
  259. struct shared_info *s = HYPERVISOR_shared_info;
  260. sync_clear_bit(port, &s->evtchn_pending[0]);
  261. }
  262. static inline void set_evtchn(int port)
  263. {
  264. struct shared_info *s = HYPERVISOR_shared_info;
  265. sync_set_bit(port, &s->evtchn_pending[0]);
  266. }
  267. static inline int test_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. return sync_test_bit(port, &s->evtchn_pending[0]);
  271. }
  272. /**
  273. * notify_remote_via_irq - send event to remote end of event channel via irq
  274. * @irq: irq of event channel to send event to
  275. *
  276. * Unlike notify_remote_via_evtchn(), this is safe to use across
  277. * save/restore. Notifications on a broken connection are silently
  278. * dropped.
  279. */
  280. void notify_remote_via_irq(int irq)
  281. {
  282. int evtchn = evtchn_from_irq(irq);
  283. if (VALID_EVTCHN(evtchn))
  284. notify_remote_via_evtchn(evtchn);
  285. }
  286. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  287. static void mask_evtchn(int port)
  288. {
  289. struct shared_info *s = HYPERVISOR_shared_info;
  290. sync_set_bit(port, &s->evtchn_mask[0]);
  291. }
  292. static void unmask_evtchn(int port)
  293. {
  294. struct shared_info *s = HYPERVISOR_shared_info;
  295. unsigned int cpu = get_cpu();
  296. BUG_ON(!irqs_disabled());
  297. /* Slow path (hypercall) if this is a non-local port. */
  298. if (unlikely(cpu != cpu_from_evtchn(port))) {
  299. struct evtchn_unmask unmask = { .port = port };
  300. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  301. } else {
  302. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  303. sync_clear_bit(port, &s->evtchn_mask[0]);
  304. /*
  305. * The following is basically the equivalent of
  306. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  307. * the interrupt edge' if the channel is masked.
  308. */
  309. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  310. !sync_test_and_set_bit(port / BITS_PER_LONG,
  311. &vcpu_info->evtchn_pending_sel))
  312. vcpu_info->evtchn_upcall_pending = 1;
  313. }
  314. put_cpu();
  315. }
  316. static void xen_irq_init(unsigned irq)
  317. {
  318. struct irq_info *info;
  319. struct irq_desc *desc = irq_to_desc(irq);
  320. /* By default all event channels notify CPU#0. */
  321. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  322. info = kzalloc(sizeof(*info), GFP_KERNEL);
  323. if (info == NULL)
  324. panic("Unable to allocate metadata for IRQ%d\n", irq);
  325. info->type = IRQT_UNBOUND;
  326. set_irq_data(irq, info);
  327. list_add_tail(&info->list, &xen_irq_list_head);
  328. }
  329. static int xen_allocate_irq_dynamic(void)
  330. {
  331. int first = 0;
  332. int irq;
  333. #ifdef CONFIG_X86_IO_APIC
  334. /*
  335. * For an HVM guest or domain 0 which see "real" (emulated or
  336. * actual repectively) GSIs we allocate dynamic IRQs
  337. * e.g. those corresponding to event channels or MSIs
  338. * etc. from the range above those "real" GSIs to avoid
  339. * collisions.
  340. */
  341. if (xen_initial_domain() || xen_hvm_domain())
  342. first = get_nr_irqs_gsi();
  343. #endif
  344. irq = irq_alloc_desc_from(first, -1);
  345. if (irq < 0)
  346. panic("No available IRQ to bind to: increase nr_irqs!\n");
  347. xen_irq_init(irq);
  348. return irq;
  349. }
  350. static int xen_allocate_irq_gsi(unsigned gsi)
  351. {
  352. int irq;
  353. /*
  354. * A PV guest has no concept of a GSI (since it has no ACPI
  355. * nor access to/knowledge of the physical APICs). Therefore
  356. * all IRQs are dynamically allocated from the entire IRQ
  357. * space.
  358. */
  359. if (xen_pv_domain() && !xen_initial_domain())
  360. return xen_allocate_irq_dynamic();
  361. /* Legacy IRQ descriptors are already allocated by the arch. */
  362. if (gsi < NR_IRQS_LEGACY)
  363. irq = gsi;
  364. else
  365. irq = irq_alloc_desc_at(gsi, -1);
  366. if (irq < 0)
  367. panic("Unable to allocate to IRQ%d (%d)\n", gsi, irq);
  368. xen_irq_init(irq);
  369. return irq;
  370. }
  371. static void xen_free_irq(unsigned irq)
  372. {
  373. struct irq_info *info = get_irq_data(irq);
  374. list_del(&info->list);
  375. set_irq_data(irq, NULL);
  376. kfree(info);
  377. /* Legacy IRQ descriptors are managed by the arch. */
  378. if (irq < NR_IRQS_LEGACY)
  379. return;
  380. irq_free_desc(irq);
  381. }
  382. static void pirq_unmask_notify(int irq)
  383. {
  384. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  385. if (unlikely(pirq_needs_eoi(irq))) {
  386. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  387. WARN_ON(rc);
  388. }
  389. }
  390. static void pirq_query_unmask(int irq)
  391. {
  392. struct physdev_irq_status_query irq_status;
  393. struct irq_info *info = info_for_irq(irq);
  394. BUG_ON(info->type != IRQT_PIRQ);
  395. irq_status.irq = pirq_from_irq(irq);
  396. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  397. irq_status.flags = 0;
  398. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  399. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  400. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  401. }
  402. static bool probing_irq(int irq)
  403. {
  404. struct irq_desc *desc = irq_to_desc(irq);
  405. return desc && desc->action == NULL;
  406. }
  407. static unsigned int __startup_pirq(unsigned int irq)
  408. {
  409. struct evtchn_bind_pirq bind_pirq;
  410. struct irq_info *info = info_for_irq(irq);
  411. int evtchn = evtchn_from_irq(irq);
  412. int rc;
  413. BUG_ON(info->type != IRQT_PIRQ);
  414. if (VALID_EVTCHN(evtchn))
  415. goto out;
  416. bind_pirq.pirq = pirq_from_irq(irq);
  417. /* NB. We are happy to share unless we are probing. */
  418. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  419. BIND_PIRQ__WILL_SHARE : 0;
  420. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  421. if (rc != 0) {
  422. if (!probing_irq(irq))
  423. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  424. irq);
  425. return 0;
  426. }
  427. evtchn = bind_pirq.port;
  428. pirq_query_unmask(irq);
  429. evtchn_to_irq[evtchn] = irq;
  430. bind_evtchn_to_cpu(evtchn, 0);
  431. info->evtchn = evtchn;
  432. out:
  433. unmask_evtchn(evtchn);
  434. pirq_unmask_notify(irq);
  435. return 0;
  436. }
  437. static unsigned int startup_pirq(struct irq_data *data)
  438. {
  439. return __startup_pirq(data->irq);
  440. }
  441. static void shutdown_pirq(struct irq_data *data)
  442. {
  443. struct evtchn_close close;
  444. unsigned int irq = data->irq;
  445. struct irq_info *info = info_for_irq(irq);
  446. int evtchn = evtchn_from_irq(irq);
  447. BUG_ON(info->type != IRQT_PIRQ);
  448. if (!VALID_EVTCHN(evtchn))
  449. return;
  450. mask_evtchn(evtchn);
  451. close.port = evtchn;
  452. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  453. BUG();
  454. bind_evtchn_to_cpu(evtchn, 0);
  455. evtchn_to_irq[evtchn] = -1;
  456. info->evtchn = 0;
  457. }
  458. static void enable_pirq(struct irq_data *data)
  459. {
  460. startup_pirq(data);
  461. }
  462. static void disable_pirq(struct irq_data *data)
  463. {
  464. }
  465. static void ack_pirq(struct irq_data *data)
  466. {
  467. int evtchn = evtchn_from_irq(data->irq);
  468. move_native_irq(data->irq);
  469. if (VALID_EVTCHN(evtchn)) {
  470. mask_evtchn(evtchn);
  471. clear_evtchn(evtchn);
  472. }
  473. }
  474. static int find_irq_by_gsi(unsigned gsi)
  475. {
  476. struct irq_info *info;
  477. list_for_each_entry(info, &xen_irq_list_head, list) {
  478. if (info->type != IRQT_PIRQ)
  479. continue;
  480. if (info->u.pirq.gsi == gsi)
  481. return info->irq;
  482. }
  483. return -1;
  484. }
  485. int xen_allocate_pirq_gsi(unsigned gsi)
  486. {
  487. return gsi;
  488. }
  489. /*
  490. * Do not make any assumptions regarding the relationship between the
  491. * IRQ number returned here and the Xen pirq argument.
  492. *
  493. * Note: We don't assign an event channel until the irq actually started
  494. * up. Return an existing irq if we've already got one for the gsi.
  495. */
  496. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  497. unsigned pirq, int shareable, char *name)
  498. {
  499. int irq = -1;
  500. struct physdev_irq irq_op;
  501. spin_lock(&irq_mapping_update_lock);
  502. irq = find_irq_by_gsi(gsi);
  503. if (irq != -1) {
  504. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  505. irq, gsi);
  506. goto out; /* XXX need refcount? */
  507. }
  508. irq = xen_allocate_irq_gsi(gsi);
  509. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  510. handle_level_irq, name);
  511. irq_op.irq = irq;
  512. irq_op.vector = 0;
  513. /* Only the privileged domain can do this. For non-priv, the pcifront
  514. * driver provides a PCI bus that does the call to do exactly
  515. * this in the priv domain. */
  516. if (xen_initial_domain() &&
  517. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  518. xen_free_irq(irq);
  519. irq = -ENOSPC;
  520. goto out;
  521. }
  522. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector,
  523. shareable ? PIRQ_SHAREABLE : 0);
  524. out:
  525. spin_unlock(&irq_mapping_update_lock);
  526. return irq;
  527. }
  528. #ifdef CONFIG_PCI_MSI
  529. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  530. {
  531. int rc;
  532. struct physdev_get_free_pirq op_get_free_pirq;
  533. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  534. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  535. WARN_ONCE(rc == -ENOSYS,
  536. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  537. return rc ? -1 : op_get_free_pirq.pirq;
  538. }
  539. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  540. int pirq, int vector, const char *name)
  541. {
  542. int irq, ret;
  543. spin_lock(&irq_mapping_update_lock);
  544. irq = xen_allocate_irq_dynamic();
  545. if (irq == -1)
  546. goto out;
  547. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  548. handle_level_irq, name);
  549. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, 0);
  550. ret = set_irq_msi(irq, msidesc);
  551. if (ret < 0)
  552. goto error_irq;
  553. out:
  554. spin_unlock(&irq_mapping_update_lock);
  555. return irq;
  556. error_irq:
  557. spin_unlock(&irq_mapping_update_lock);
  558. xen_free_irq(irq);
  559. return -1;
  560. }
  561. #endif
  562. int xen_destroy_irq(int irq)
  563. {
  564. struct irq_desc *desc;
  565. struct physdev_unmap_pirq unmap_irq;
  566. struct irq_info *info = info_for_irq(irq);
  567. int rc = -ENOENT;
  568. spin_lock(&irq_mapping_update_lock);
  569. desc = irq_to_desc(irq);
  570. if (!desc)
  571. goto out;
  572. if (xen_initial_domain()) {
  573. unmap_irq.pirq = info->u.pirq.pirq;
  574. unmap_irq.domid = DOMID_SELF;
  575. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  576. if (rc) {
  577. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  578. goto out;
  579. }
  580. }
  581. xen_free_irq(irq);
  582. out:
  583. spin_unlock(&irq_mapping_update_lock);
  584. return rc;
  585. }
  586. int xen_irq_from_pirq(unsigned pirq)
  587. {
  588. int irq;
  589. struct irq_info *info;
  590. spin_lock(&irq_mapping_update_lock);
  591. list_for_each_entry(info, &xen_irq_list_head, list) {
  592. if (info == NULL || info->type != IRQT_PIRQ)
  593. continue;
  594. irq = info->irq;
  595. if (info->u.pirq.pirq == pirq)
  596. goto out;
  597. }
  598. irq = -1;
  599. out:
  600. spin_lock(&irq_mapping_update_lock);
  601. return irq;
  602. }
  603. int bind_evtchn_to_irq(unsigned int evtchn)
  604. {
  605. int irq;
  606. spin_lock(&irq_mapping_update_lock);
  607. irq = evtchn_to_irq[evtchn];
  608. if (irq == -1) {
  609. irq = xen_allocate_irq_dynamic();
  610. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  611. handle_fasteoi_irq, "event");
  612. xen_irq_info_evtchn_init(irq, evtchn);
  613. }
  614. spin_unlock(&irq_mapping_update_lock);
  615. return irq;
  616. }
  617. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  618. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  619. {
  620. struct evtchn_bind_ipi bind_ipi;
  621. int evtchn, irq;
  622. spin_lock(&irq_mapping_update_lock);
  623. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  624. if (irq == -1) {
  625. irq = xen_allocate_irq_dynamic();
  626. if (irq < 0)
  627. goto out;
  628. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  629. handle_percpu_irq, "ipi");
  630. bind_ipi.vcpu = cpu;
  631. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  632. &bind_ipi) != 0)
  633. BUG();
  634. evtchn = bind_ipi.port;
  635. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  636. bind_evtchn_to_cpu(evtchn, cpu);
  637. }
  638. out:
  639. spin_unlock(&irq_mapping_update_lock);
  640. return irq;
  641. }
  642. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  643. {
  644. struct evtchn_bind_virq bind_virq;
  645. int evtchn, irq;
  646. spin_lock(&irq_mapping_update_lock);
  647. irq = per_cpu(virq_to_irq, cpu)[virq];
  648. if (irq == -1) {
  649. irq = xen_allocate_irq_dynamic();
  650. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  651. handle_percpu_irq, "virq");
  652. bind_virq.virq = virq;
  653. bind_virq.vcpu = cpu;
  654. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  655. &bind_virq) != 0)
  656. BUG();
  657. evtchn = bind_virq.port;
  658. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  659. bind_evtchn_to_cpu(evtchn, cpu);
  660. }
  661. spin_unlock(&irq_mapping_update_lock);
  662. return irq;
  663. }
  664. static void unbind_from_irq(unsigned int irq)
  665. {
  666. struct evtchn_close close;
  667. int evtchn = evtchn_from_irq(irq);
  668. spin_lock(&irq_mapping_update_lock);
  669. if (VALID_EVTCHN(evtchn)) {
  670. close.port = evtchn;
  671. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  672. BUG();
  673. switch (type_from_irq(irq)) {
  674. case IRQT_VIRQ:
  675. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  676. [virq_from_irq(irq)] = -1;
  677. break;
  678. case IRQT_IPI:
  679. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  680. [ipi_from_irq(irq)] = -1;
  681. break;
  682. default:
  683. break;
  684. }
  685. /* Closed ports are implicitly re-bound to VCPU0. */
  686. bind_evtchn_to_cpu(evtchn, 0);
  687. evtchn_to_irq[evtchn] = -1;
  688. }
  689. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  690. xen_free_irq(irq);
  691. spin_unlock(&irq_mapping_update_lock);
  692. }
  693. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  694. irq_handler_t handler,
  695. unsigned long irqflags,
  696. const char *devname, void *dev_id)
  697. {
  698. unsigned int irq;
  699. int retval;
  700. irq = bind_evtchn_to_irq(evtchn);
  701. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  702. if (retval != 0) {
  703. unbind_from_irq(irq);
  704. return retval;
  705. }
  706. return irq;
  707. }
  708. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  709. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  710. irq_handler_t handler,
  711. unsigned long irqflags, const char *devname, void *dev_id)
  712. {
  713. unsigned int irq;
  714. int retval;
  715. irq = bind_virq_to_irq(virq, cpu);
  716. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  717. if (retval != 0) {
  718. unbind_from_irq(irq);
  719. return retval;
  720. }
  721. return irq;
  722. }
  723. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  724. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  725. unsigned int cpu,
  726. irq_handler_t handler,
  727. unsigned long irqflags,
  728. const char *devname,
  729. void *dev_id)
  730. {
  731. int irq, retval;
  732. irq = bind_ipi_to_irq(ipi, cpu);
  733. if (irq < 0)
  734. return irq;
  735. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
  736. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  737. if (retval != 0) {
  738. unbind_from_irq(irq);
  739. return retval;
  740. }
  741. return irq;
  742. }
  743. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  744. {
  745. free_irq(irq, dev_id);
  746. unbind_from_irq(irq);
  747. }
  748. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  749. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  750. {
  751. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  752. BUG_ON(irq < 0);
  753. notify_remote_via_irq(irq);
  754. }
  755. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  756. {
  757. struct shared_info *sh = HYPERVISOR_shared_info;
  758. int cpu = smp_processor_id();
  759. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  760. int i;
  761. unsigned long flags;
  762. static DEFINE_SPINLOCK(debug_lock);
  763. struct vcpu_info *v;
  764. spin_lock_irqsave(&debug_lock, flags);
  765. printk("\nvcpu %d\n ", cpu);
  766. for_each_online_cpu(i) {
  767. int pending;
  768. v = per_cpu(xen_vcpu, i);
  769. pending = (get_irq_regs() && i == cpu)
  770. ? xen_irqs_disabled(get_irq_regs())
  771. : v->evtchn_upcall_mask;
  772. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  773. pending, v->evtchn_upcall_pending,
  774. (int)(sizeof(v->evtchn_pending_sel)*2),
  775. v->evtchn_pending_sel);
  776. }
  777. v = per_cpu(xen_vcpu, cpu);
  778. printk("\npending:\n ");
  779. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  780. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  781. sh->evtchn_pending[i],
  782. i % 8 == 0 ? "\n " : " ");
  783. printk("\nglobal mask:\n ");
  784. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  785. printk("%0*lx%s",
  786. (int)(sizeof(sh->evtchn_mask[0])*2),
  787. sh->evtchn_mask[i],
  788. i % 8 == 0 ? "\n " : " ");
  789. printk("\nglobally unmasked:\n ");
  790. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  791. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  792. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  793. i % 8 == 0 ? "\n " : " ");
  794. printk("\nlocal cpu%d mask:\n ", cpu);
  795. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  796. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  797. cpu_evtchn[i],
  798. i % 8 == 0 ? "\n " : " ");
  799. printk("\nlocally unmasked:\n ");
  800. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  801. unsigned long pending = sh->evtchn_pending[i]
  802. & ~sh->evtchn_mask[i]
  803. & cpu_evtchn[i];
  804. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  805. pending, i % 8 == 0 ? "\n " : " ");
  806. }
  807. printk("\npending list:\n");
  808. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  809. if (sync_test_bit(i, sh->evtchn_pending)) {
  810. int word_idx = i / BITS_PER_LONG;
  811. printk(" %d: event %d -> irq %d%s%s%s\n",
  812. cpu_from_evtchn(i), i,
  813. evtchn_to_irq[i],
  814. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  815. ? "" : " l2-clear",
  816. !sync_test_bit(i, sh->evtchn_mask)
  817. ? "" : " globally-masked",
  818. sync_test_bit(i, cpu_evtchn)
  819. ? "" : " locally-masked");
  820. }
  821. }
  822. spin_unlock_irqrestore(&debug_lock, flags);
  823. return IRQ_HANDLED;
  824. }
  825. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  826. /*
  827. * Search the CPUs pending events bitmasks. For each one found, map
  828. * the event number to an irq, and feed it into do_IRQ() for
  829. * handling.
  830. *
  831. * Xen uses a two-level bitmap to speed searching. The first level is
  832. * a bitset of words which contain pending event bits. The second
  833. * level is a bitset of pending events themselves.
  834. */
  835. static void __xen_evtchn_do_upcall(void)
  836. {
  837. int cpu = get_cpu();
  838. struct shared_info *s = HYPERVISOR_shared_info;
  839. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  840. unsigned count;
  841. do {
  842. unsigned long pending_words;
  843. vcpu_info->evtchn_upcall_pending = 0;
  844. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  845. goto out;
  846. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  847. /* Clear master flag /before/ clearing selector flag. */
  848. wmb();
  849. #endif
  850. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  851. while (pending_words != 0) {
  852. unsigned long pending_bits;
  853. int word_idx = __ffs(pending_words);
  854. pending_words &= ~(1UL << word_idx);
  855. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  856. int bit_idx = __ffs(pending_bits);
  857. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  858. int irq = evtchn_to_irq[port];
  859. struct irq_desc *desc;
  860. mask_evtchn(port);
  861. clear_evtchn(port);
  862. if (irq != -1) {
  863. desc = irq_to_desc(irq);
  864. if (desc)
  865. generic_handle_irq_desc(irq, desc);
  866. }
  867. }
  868. }
  869. BUG_ON(!irqs_disabled());
  870. count = __this_cpu_read(xed_nesting_count);
  871. __this_cpu_write(xed_nesting_count, 0);
  872. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  873. out:
  874. put_cpu();
  875. }
  876. void xen_evtchn_do_upcall(struct pt_regs *regs)
  877. {
  878. struct pt_regs *old_regs = set_irq_regs(regs);
  879. exit_idle();
  880. irq_enter();
  881. __xen_evtchn_do_upcall();
  882. irq_exit();
  883. set_irq_regs(old_regs);
  884. }
  885. void xen_hvm_evtchn_do_upcall(void)
  886. {
  887. __xen_evtchn_do_upcall();
  888. }
  889. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  890. /* Rebind a new event channel to an existing irq. */
  891. void rebind_evtchn_irq(int evtchn, int irq)
  892. {
  893. struct irq_info *info = info_for_irq(irq);
  894. /* Make sure the irq is masked, since the new event channel
  895. will also be masked. */
  896. disable_irq(irq);
  897. spin_lock(&irq_mapping_update_lock);
  898. /* After resume the irq<->evtchn mappings are all cleared out */
  899. BUG_ON(evtchn_to_irq[evtchn] != -1);
  900. /* Expect irq to have been bound before,
  901. so there should be a proper type */
  902. BUG_ON(info->type == IRQT_UNBOUND);
  903. xen_irq_info_evtchn_init(irq, evtchn);
  904. spin_unlock(&irq_mapping_update_lock);
  905. /* new event channels are always bound to cpu 0 */
  906. irq_set_affinity(irq, cpumask_of(0));
  907. /* Unmask the event channel. */
  908. enable_irq(irq);
  909. }
  910. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  911. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  912. {
  913. struct evtchn_bind_vcpu bind_vcpu;
  914. int evtchn = evtchn_from_irq(irq);
  915. if (!VALID_EVTCHN(evtchn))
  916. return -1;
  917. /*
  918. * Events delivered via platform PCI interrupts are always
  919. * routed to vcpu 0 and hence cannot be rebound.
  920. */
  921. if (xen_hvm_domain() && !xen_have_vector_callback)
  922. return -1;
  923. /* Send future instances of this interrupt to other vcpu. */
  924. bind_vcpu.port = evtchn;
  925. bind_vcpu.vcpu = tcpu;
  926. /*
  927. * If this fails, it usually just indicates that we're dealing with a
  928. * virq or IPI channel, which don't actually need to be rebound. Ignore
  929. * it, but don't do the xenlinux-level rebind in that case.
  930. */
  931. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  932. bind_evtchn_to_cpu(evtchn, tcpu);
  933. return 0;
  934. }
  935. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  936. bool force)
  937. {
  938. unsigned tcpu = cpumask_first(dest);
  939. return rebind_irq_to_cpu(data->irq, tcpu);
  940. }
  941. int resend_irq_on_evtchn(unsigned int irq)
  942. {
  943. int masked, evtchn = evtchn_from_irq(irq);
  944. struct shared_info *s = HYPERVISOR_shared_info;
  945. if (!VALID_EVTCHN(evtchn))
  946. return 1;
  947. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  948. sync_set_bit(evtchn, s->evtchn_pending);
  949. if (!masked)
  950. unmask_evtchn(evtchn);
  951. return 1;
  952. }
  953. static void enable_dynirq(struct irq_data *data)
  954. {
  955. int evtchn = evtchn_from_irq(data->irq);
  956. if (VALID_EVTCHN(evtchn))
  957. unmask_evtchn(evtchn);
  958. }
  959. static void disable_dynirq(struct irq_data *data)
  960. {
  961. int evtchn = evtchn_from_irq(data->irq);
  962. if (VALID_EVTCHN(evtchn))
  963. mask_evtchn(evtchn);
  964. }
  965. static void ack_dynirq(struct irq_data *data)
  966. {
  967. int evtchn = evtchn_from_irq(data->irq);
  968. move_masked_irq(data->irq);
  969. if (VALID_EVTCHN(evtchn))
  970. unmask_evtchn(evtchn);
  971. }
  972. static int retrigger_dynirq(struct irq_data *data)
  973. {
  974. int evtchn = evtchn_from_irq(data->irq);
  975. struct shared_info *sh = HYPERVISOR_shared_info;
  976. int ret = 0;
  977. if (VALID_EVTCHN(evtchn)) {
  978. int masked;
  979. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  980. sync_set_bit(evtchn, sh->evtchn_pending);
  981. if (!masked)
  982. unmask_evtchn(evtchn);
  983. ret = 1;
  984. }
  985. return ret;
  986. }
  987. static void restore_pirqs(void)
  988. {
  989. int pirq, rc, irq, gsi;
  990. struct physdev_map_pirq map_irq;
  991. struct irq_info *info;
  992. list_for_each_entry(info, &xen_irq_list_head, list) {
  993. if (info->type != IRQT_PIRQ)
  994. continue;
  995. pirq = info->u.pirq.pirq;
  996. gsi = info->u.pirq.gsi;
  997. irq = info->irq;
  998. /* save/restore of PT devices doesn't work, so at this point the
  999. * only devices present are GSI based emulated devices */
  1000. if (!gsi)
  1001. continue;
  1002. map_irq.domid = DOMID_SELF;
  1003. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1004. map_irq.index = gsi;
  1005. map_irq.pirq = pirq;
  1006. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1007. if (rc) {
  1008. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1009. gsi, irq, pirq, rc);
  1010. xen_free_irq(irq);
  1011. continue;
  1012. }
  1013. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1014. __startup_pirq(irq);
  1015. }
  1016. }
  1017. static void restore_cpu_virqs(unsigned int cpu)
  1018. {
  1019. struct evtchn_bind_virq bind_virq;
  1020. int virq, irq, evtchn;
  1021. for (virq = 0; virq < NR_VIRQS; virq++) {
  1022. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1023. continue;
  1024. BUG_ON(virq_from_irq(irq) != virq);
  1025. /* Get a new binding from Xen. */
  1026. bind_virq.virq = virq;
  1027. bind_virq.vcpu = cpu;
  1028. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1029. &bind_virq) != 0)
  1030. BUG();
  1031. evtchn = bind_virq.port;
  1032. /* Record the new mapping. */
  1033. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1034. bind_evtchn_to_cpu(evtchn, cpu);
  1035. }
  1036. }
  1037. static void restore_cpu_ipis(unsigned int cpu)
  1038. {
  1039. struct evtchn_bind_ipi bind_ipi;
  1040. int ipi, irq, evtchn;
  1041. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1042. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1043. continue;
  1044. BUG_ON(ipi_from_irq(irq) != ipi);
  1045. /* Get a new binding from Xen. */
  1046. bind_ipi.vcpu = cpu;
  1047. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1048. &bind_ipi) != 0)
  1049. BUG();
  1050. evtchn = bind_ipi.port;
  1051. /* Record the new mapping. */
  1052. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1053. bind_evtchn_to_cpu(evtchn, cpu);
  1054. }
  1055. }
  1056. /* Clear an irq's pending state, in preparation for polling on it */
  1057. void xen_clear_irq_pending(int irq)
  1058. {
  1059. int evtchn = evtchn_from_irq(irq);
  1060. if (VALID_EVTCHN(evtchn))
  1061. clear_evtchn(evtchn);
  1062. }
  1063. EXPORT_SYMBOL(xen_clear_irq_pending);
  1064. void xen_set_irq_pending(int irq)
  1065. {
  1066. int evtchn = evtchn_from_irq(irq);
  1067. if (VALID_EVTCHN(evtchn))
  1068. set_evtchn(evtchn);
  1069. }
  1070. bool xen_test_irq_pending(int irq)
  1071. {
  1072. int evtchn = evtchn_from_irq(irq);
  1073. bool ret = false;
  1074. if (VALID_EVTCHN(evtchn))
  1075. ret = test_evtchn(evtchn);
  1076. return ret;
  1077. }
  1078. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1079. * the irq will be disabled so it won't deliver an interrupt. */
  1080. void xen_poll_irq_timeout(int irq, u64 timeout)
  1081. {
  1082. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1083. if (VALID_EVTCHN(evtchn)) {
  1084. struct sched_poll poll;
  1085. poll.nr_ports = 1;
  1086. poll.timeout = timeout;
  1087. set_xen_guest_handle(poll.ports, &evtchn);
  1088. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1089. BUG();
  1090. }
  1091. }
  1092. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1093. /* Poll waiting for an irq to become pending. In the usual case, the
  1094. * irq will be disabled so it won't deliver an interrupt. */
  1095. void xen_poll_irq(int irq)
  1096. {
  1097. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1098. }
  1099. void xen_irq_resume(void)
  1100. {
  1101. unsigned int cpu, evtchn;
  1102. struct irq_info *info;
  1103. init_evtchn_cpu_bindings();
  1104. /* New event-channel space is not 'live' yet. */
  1105. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1106. mask_evtchn(evtchn);
  1107. /* No IRQ <-> event-channel mappings. */
  1108. list_for_each_entry(info, &xen_irq_list_head, list)
  1109. info->evtchn = 0; /* zap event-channel binding */
  1110. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1111. evtchn_to_irq[evtchn] = -1;
  1112. for_each_possible_cpu(cpu) {
  1113. restore_cpu_virqs(cpu);
  1114. restore_cpu_ipis(cpu);
  1115. }
  1116. restore_pirqs();
  1117. }
  1118. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1119. .name = "xen-dyn",
  1120. .irq_disable = disable_dynirq,
  1121. .irq_mask = disable_dynirq,
  1122. .irq_unmask = enable_dynirq,
  1123. .irq_eoi = ack_dynirq,
  1124. .irq_set_affinity = set_affinity_irq,
  1125. .irq_retrigger = retrigger_dynirq,
  1126. };
  1127. static struct irq_chip xen_pirq_chip __read_mostly = {
  1128. .name = "xen-pirq",
  1129. .irq_startup = startup_pirq,
  1130. .irq_shutdown = shutdown_pirq,
  1131. .irq_enable = enable_pirq,
  1132. .irq_unmask = enable_pirq,
  1133. .irq_disable = disable_pirq,
  1134. .irq_mask = disable_pirq,
  1135. .irq_ack = ack_pirq,
  1136. .irq_set_affinity = set_affinity_irq,
  1137. .irq_retrigger = retrigger_dynirq,
  1138. };
  1139. static struct irq_chip xen_percpu_chip __read_mostly = {
  1140. .name = "xen-percpu",
  1141. .irq_disable = disable_dynirq,
  1142. .irq_mask = disable_dynirq,
  1143. .irq_unmask = enable_dynirq,
  1144. .irq_ack = ack_dynirq,
  1145. };
  1146. int xen_set_callback_via(uint64_t via)
  1147. {
  1148. struct xen_hvm_param a;
  1149. a.domid = DOMID_SELF;
  1150. a.index = HVM_PARAM_CALLBACK_IRQ;
  1151. a.value = via;
  1152. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1153. }
  1154. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1155. #ifdef CONFIG_XEN_PVHVM
  1156. /* Vector callbacks are better than PCI interrupts to receive event
  1157. * channel notifications because we can receive vector callbacks on any
  1158. * vcpu and we don't need PCI support or APIC interactions. */
  1159. void xen_callback_vector(void)
  1160. {
  1161. int rc;
  1162. uint64_t callback_via;
  1163. if (xen_have_vector_callback) {
  1164. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1165. rc = xen_set_callback_via(callback_via);
  1166. if (rc) {
  1167. printk(KERN_ERR "Request for Xen HVM callback vector"
  1168. " failed.\n");
  1169. xen_have_vector_callback = 0;
  1170. return;
  1171. }
  1172. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1173. "enabled\n");
  1174. /* in the restore case the vector has already been allocated */
  1175. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1176. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1177. }
  1178. }
  1179. #else
  1180. void xen_callback_vector(void) {}
  1181. #endif
  1182. void __init xen_init_IRQ(void)
  1183. {
  1184. int i;
  1185. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1186. GFP_KERNEL);
  1187. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1188. evtchn_to_irq[i] = -1;
  1189. init_evtchn_cpu_bindings();
  1190. /* No event channels are 'live' right now. */
  1191. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1192. mask_evtchn(i);
  1193. if (xen_hvm_domain()) {
  1194. xen_callback_vector();
  1195. native_init_IRQ();
  1196. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1197. * __acpi_register_gsi can point at the right function */
  1198. pci_xen_hvm_init();
  1199. } else {
  1200. irq_ctx_init(smp_processor_id());
  1201. if (xen_initial_domain())
  1202. xen_setup_pirqs();
  1203. }
  1204. }