mpt2sas_base.c 114 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
  63. static int max_queue_depth = -1;
  64. module_param(max_queue_depth, int, 0);
  65. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  66. static int max_sgl_entries = -1;
  67. module_param(max_sgl_entries, int, 0);
  68. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  69. static int msix_disable = -1;
  70. module_param(msix_disable, int, 0);
  71. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  72. static int missing_delay[2] = {-1, -1};
  73. module_param_array(missing_delay, int, NULL, 0);
  74. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  75. /* diag_buffer_enable is bitwise
  76. * bit 0 set = TRACE
  77. * bit 1 set = SNAPSHOT
  78. * bit 2 set = EXTENDED
  79. *
  80. * Either bit can be set, or both
  81. */
  82. static int diag_buffer_enable;
  83. module_param(diag_buffer_enable, int, 0);
  84. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  85. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  86. int mpt2sas_fwfault_debug;
  87. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  88. "and halt firmware - (default=0)");
  89. static int disable_discovery = -1;
  90. module_param(disable_discovery, int, 0);
  91. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  92. /**
  93. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  94. *
  95. */
  96. static int
  97. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  98. {
  99. int ret = param_set_int(val, kp);
  100. struct MPT2SAS_ADAPTER *ioc;
  101. if (ret)
  102. return ret;
  103. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  104. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  105. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  106. return 0;
  107. }
  108. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  109. param_get_int, &mpt2sas_fwfault_debug, 0644);
  110. /**
  111. * _base_fault_reset_work - workq handling ioc fault conditions
  112. * @work: input argument, used to derive ioc
  113. * Context: sleep.
  114. *
  115. * Return nothing.
  116. */
  117. static void
  118. _base_fault_reset_work(struct work_struct *work)
  119. {
  120. struct MPT2SAS_ADAPTER *ioc =
  121. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  122. unsigned long flags;
  123. u32 doorbell;
  124. int rc;
  125. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  126. if (ioc->shost_recovery)
  127. goto rearm_timer;
  128. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  129. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  130. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  131. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  132. FORCE_BIG_HAMMER);
  133. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  134. __func__, (rc == 0) ? "success" : "failed");
  135. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  136. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  137. mpt2sas_base_fault_info(ioc, doorbell &
  138. MPI2_DOORBELL_DATA_MASK);
  139. }
  140. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  141. rearm_timer:
  142. if (ioc->fault_reset_work_q)
  143. queue_delayed_work(ioc->fault_reset_work_q,
  144. &ioc->fault_reset_work,
  145. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  146. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  147. }
  148. /**
  149. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  150. * @ioc: per adapter object
  151. * Context: sleep.
  152. *
  153. * Return nothing.
  154. */
  155. void
  156. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  157. {
  158. unsigned long flags;
  159. if (ioc->fault_reset_work_q)
  160. return;
  161. /* initialize fault polling */
  162. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  163. snprintf(ioc->fault_reset_work_q_name,
  164. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  165. ioc->fault_reset_work_q =
  166. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  167. if (!ioc->fault_reset_work_q) {
  168. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  169. ioc->name, __func__, __LINE__);
  170. return;
  171. }
  172. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  173. if (ioc->fault_reset_work_q)
  174. queue_delayed_work(ioc->fault_reset_work_q,
  175. &ioc->fault_reset_work,
  176. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  177. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  178. }
  179. /**
  180. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  181. * @ioc: per adapter object
  182. * Context: sleep.
  183. *
  184. * Return nothing.
  185. */
  186. void
  187. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  188. {
  189. unsigned long flags;
  190. struct workqueue_struct *wq;
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. wq = ioc->fault_reset_work_q;
  193. ioc->fault_reset_work_q = NULL;
  194. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  195. if (wq) {
  196. if (!cancel_delayed_work(&ioc->fault_reset_work))
  197. flush_workqueue(wq);
  198. destroy_workqueue(wq);
  199. }
  200. }
  201. /**
  202. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  203. * @ioc: per adapter object
  204. * @fault_code: fault code
  205. *
  206. * Return nothing.
  207. */
  208. void
  209. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  210. {
  211. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  212. ioc->name, fault_code);
  213. }
  214. /**
  215. * mpt2sas_halt_firmware - halt's mpt controller firmware
  216. * @ioc: per adapter object
  217. *
  218. * For debugging timeout related issues. Writing 0xCOFFEE00
  219. * to the doorbell register will halt controller firmware. With
  220. * the purpose to stop both driver and firmware, the enduser can
  221. * obtain a ring buffer from controller UART.
  222. */
  223. void
  224. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  225. {
  226. u32 doorbell;
  227. if (!ioc->fwfault_debug)
  228. return;
  229. dump_stack();
  230. doorbell = readl(&ioc->chip->Doorbell);
  231. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  232. mpt2sas_base_fault_info(ioc , doorbell);
  233. else {
  234. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  235. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  236. "timeout\n", ioc->name);
  237. }
  238. panic("panic in %s\n", __func__);
  239. }
  240. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  241. /**
  242. * _base_sas_ioc_info - verbose translation of the ioc status
  243. * @ioc: per adapter object
  244. * @mpi_reply: reply mf payload returned from firmware
  245. * @request_hdr: request mf
  246. *
  247. * Return nothing.
  248. */
  249. static void
  250. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  251. MPI2RequestHeader_t *request_hdr)
  252. {
  253. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  254. MPI2_IOCSTATUS_MASK;
  255. char *desc = NULL;
  256. u16 frame_sz;
  257. char *func_str = NULL;
  258. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  259. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  260. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  261. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  262. return;
  263. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  264. return;
  265. switch (ioc_status) {
  266. /****************************************************************************
  267. * Common IOCStatus values for all replies
  268. ****************************************************************************/
  269. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  270. desc = "invalid function";
  271. break;
  272. case MPI2_IOCSTATUS_BUSY:
  273. desc = "busy";
  274. break;
  275. case MPI2_IOCSTATUS_INVALID_SGL:
  276. desc = "invalid sgl";
  277. break;
  278. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  279. desc = "internal error";
  280. break;
  281. case MPI2_IOCSTATUS_INVALID_VPID:
  282. desc = "invalid vpid";
  283. break;
  284. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  285. desc = "insufficient resources";
  286. break;
  287. case MPI2_IOCSTATUS_INVALID_FIELD:
  288. desc = "invalid field";
  289. break;
  290. case MPI2_IOCSTATUS_INVALID_STATE:
  291. desc = "invalid state";
  292. break;
  293. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  294. desc = "op state not supported";
  295. break;
  296. /****************************************************************************
  297. * Config IOCStatus values
  298. ****************************************************************************/
  299. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  300. desc = "config invalid action";
  301. break;
  302. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  303. desc = "config invalid type";
  304. break;
  305. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  306. desc = "config invalid page";
  307. break;
  308. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  309. desc = "config invalid data";
  310. break;
  311. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  312. desc = "config no defaults";
  313. break;
  314. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  315. desc = "config cant commit";
  316. break;
  317. /****************************************************************************
  318. * SCSI IO Reply
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  321. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  322. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  323. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  324. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  325. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  326. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  327. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  328. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  329. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  330. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  331. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  332. break;
  333. /****************************************************************************
  334. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  335. ****************************************************************************/
  336. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  337. desc = "eedp guard error";
  338. break;
  339. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  340. desc = "eedp ref tag error";
  341. break;
  342. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  343. desc = "eedp app tag error";
  344. break;
  345. /****************************************************************************
  346. * SCSI Target values
  347. ****************************************************************************/
  348. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  349. desc = "target invalid io index";
  350. break;
  351. case MPI2_IOCSTATUS_TARGET_ABORTED:
  352. desc = "target aborted";
  353. break;
  354. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  355. desc = "target no conn retryable";
  356. break;
  357. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  358. desc = "target no connection";
  359. break;
  360. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  361. desc = "target xfer count mismatch";
  362. break;
  363. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  364. desc = "target data offset error";
  365. break;
  366. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  367. desc = "target too much write data";
  368. break;
  369. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  370. desc = "target iu too short";
  371. break;
  372. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  373. desc = "target ack nak timeout";
  374. break;
  375. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  376. desc = "target nak received";
  377. break;
  378. /****************************************************************************
  379. * Serial Attached SCSI values
  380. ****************************************************************************/
  381. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  382. desc = "smp request failed";
  383. break;
  384. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  385. desc = "smp data overrun";
  386. break;
  387. /****************************************************************************
  388. * Diagnostic Buffer Post / Diagnostic Release values
  389. ****************************************************************************/
  390. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  391. desc = "diagnostic released";
  392. break;
  393. default:
  394. break;
  395. }
  396. if (!desc)
  397. return;
  398. switch (request_hdr->Function) {
  399. case MPI2_FUNCTION_CONFIG:
  400. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  401. func_str = "config_page";
  402. break;
  403. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  404. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  405. func_str = "task_mgmt";
  406. break;
  407. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  408. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  409. func_str = "sas_iounit_ctl";
  410. break;
  411. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  412. frame_sz = sizeof(Mpi2SepRequest_t);
  413. func_str = "enclosure";
  414. break;
  415. case MPI2_FUNCTION_IOC_INIT:
  416. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  417. func_str = "ioc_init";
  418. break;
  419. case MPI2_FUNCTION_PORT_ENABLE:
  420. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  421. func_str = "port_enable";
  422. break;
  423. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  424. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  425. func_str = "smp_passthru";
  426. break;
  427. default:
  428. frame_sz = 32;
  429. func_str = "unknown";
  430. break;
  431. }
  432. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  433. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  434. _debug_dump_mf(request_hdr, frame_sz/4);
  435. }
  436. /**
  437. * _base_display_event_data - verbose translation of firmware asyn events
  438. * @ioc: per adapter object
  439. * @mpi_reply: reply mf payload returned from firmware
  440. *
  441. * Return nothing.
  442. */
  443. static void
  444. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  445. Mpi2EventNotificationReply_t *mpi_reply)
  446. {
  447. char *desc = NULL;
  448. u16 event;
  449. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  450. return;
  451. event = le16_to_cpu(mpi_reply->Event);
  452. switch (event) {
  453. case MPI2_EVENT_LOG_DATA:
  454. desc = "Log Data";
  455. break;
  456. case MPI2_EVENT_STATE_CHANGE:
  457. desc = "Status Change";
  458. break;
  459. case MPI2_EVENT_HARD_RESET_RECEIVED:
  460. desc = "Hard Reset Received";
  461. break;
  462. case MPI2_EVENT_EVENT_CHANGE:
  463. desc = "Event Change";
  464. break;
  465. case MPI2_EVENT_TASK_SET_FULL:
  466. desc = "Task Set Full";
  467. break;
  468. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  469. desc = "Device Status Change";
  470. break;
  471. case MPI2_EVENT_IR_OPERATION_STATUS:
  472. desc = "IR Operation Status";
  473. break;
  474. case MPI2_EVENT_SAS_DISCOVERY:
  475. {
  476. Mpi2EventDataSasDiscovery_t *event_data =
  477. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  478. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  479. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  480. "start" : "stop");
  481. if (event_data->DiscoveryStatus)
  482. printk("discovery_status(0x%08x)",
  483. le32_to_cpu(event_data->DiscoveryStatus));
  484. printk("\n");
  485. return;
  486. }
  487. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  488. desc = "SAS Broadcast Primitive";
  489. break;
  490. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  491. desc = "SAS Init Device Status Change";
  492. break;
  493. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  494. desc = "SAS Init Table Overflow";
  495. break;
  496. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  497. desc = "SAS Topology Change List";
  498. break;
  499. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  500. desc = "SAS Enclosure Device Status Change";
  501. break;
  502. case MPI2_EVENT_IR_VOLUME:
  503. desc = "IR Volume";
  504. break;
  505. case MPI2_EVENT_IR_PHYSICAL_DISK:
  506. desc = "IR Physical Disk";
  507. break;
  508. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  509. desc = "IR Configuration Change List";
  510. break;
  511. case MPI2_EVENT_LOG_ENTRY_ADDED:
  512. desc = "Log Entry Added";
  513. break;
  514. }
  515. if (!desc)
  516. return;
  517. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  518. }
  519. #endif
  520. /**
  521. * _base_sas_log_info - verbose translation of firmware log info
  522. * @ioc: per adapter object
  523. * @log_info: log info
  524. *
  525. * Return nothing.
  526. */
  527. static void
  528. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  529. {
  530. union loginfo_type {
  531. u32 loginfo;
  532. struct {
  533. u32 subcode:16;
  534. u32 code:8;
  535. u32 originator:4;
  536. u32 bus_type:4;
  537. } dw;
  538. };
  539. union loginfo_type sas_loginfo;
  540. char *originator_str = NULL;
  541. sas_loginfo.loginfo = log_info;
  542. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  543. return;
  544. /* each nexus loss loginfo */
  545. if (log_info == 0x31170000)
  546. return;
  547. /* eat the loginfos associated with task aborts */
  548. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  549. 0x31140000 || log_info == 0x31130000))
  550. return;
  551. switch (sas_loginfo.dw.originator) {
  552. case 0:
  553. originator_str = "IOP";
  554. break;
  555. case 1:
  556. originator_str = "PL";
  557. break;
  558. case 2:
  559. originator_str = "IR";
  560. break;
  561. }
  562. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  563. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  564. originator_str, sas_loginfo.dw.code,
  565. sas_loginfo.dw.subcode);
  566. }
  567. /**
  568. * _base_display_reply_info -
  569. * @ioc: per adapter object
  570. * @smid: system request message index
  571. * @msix_index: MSIX table index supplied by the OS
  572. * @reply: reply message frame(lower 32bit addr)
  573. *
  574. * Return nothing.
  575. */
  576. static void
  577. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  578. u32 reply)
  579. {
  580. MPI2DefaultReply_t *mpi_reply;
  581. u16 ioc_status;
  582. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  583. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  584. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  585. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  586. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  587. _base_sas_ioc_info(ioc , mpi_reply,
  588. mpt2sas_base_get_msg_frame(ioc, smid));
  589. }
  590. #endif
  591. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  592. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  593. }
  594. /**
  595. * mpt2sas_base_done - base internal command completion routine
  596. * @ioc: per adapter object
  597. * @smid: system request message index
  598. * @msix_index: MSIX table index supplied by the OS
  599. * @reply: reply message frame(lower 32bit addr)
  600. *
  601. * Return 1 meaning mf should be freed from _base_interrupt
  602. * 0 means the mf is freed from this function.
  603. */
  604. u8
  605. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  606. u32 reply)
  607. {
  608. MPI2DefaultReply_t *mpi_reply;
  609. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  610. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  611. return 1;
  612. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  613. return 1;
  614. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  615. if (mpi_reply) {
  616. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  617. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  618. }
  619. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  620. complete(&ioc->base_cmds.done);
  621. return 1;
  622. }
  623. /**
  624. * _base_async_event - main callback handler for firmware asyn events
  625. * @ioc: per adapter object
  626. * @msix_index: MSIX table index supplied by the OS
  627. * @reply: reply message frame(lower 32bit addr)
  628. *
  629. * Return 1 meaning mf should be freed from _base_interrupt
  630. * 0 means the mf is freed from this function.
  631. */
  632. static u8
  633. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  634. {
  635. Mpi2EventNotificationReply_t *mpi_reply;
  636. Mpi2EventAckRequest_t *ack_request;
  637. u16 smid;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. if (!mpi_reply)
  640. return 1;
  641. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  642. return 1;
  643. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  644. _base_display_event_data(ioc, mpi_reply);
  645. #endif
  646. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  647. goto out;
  648. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  649. if (!smid) {
  650. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  651. ioc->name, __func__);
  652. goto out;
  653. }
  654. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  655. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  656. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  657. ack_request->Event = mpi_reply->Event;
  658. ack_request->EventContext = mpi_reply->EventContext;
  659. ack_request->VF_ID = 0; /* TODO */
  660. ack_request->VP_ID = 0;
  661. mpt2sas_base_put_smid_default(ioc, smid);
  662. out:
  663. /* scsih callback handler */
  664. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  665. /* ctl callback handler */
  666. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  667. return 1;
  668. }
  669. /**
  670. * _base_get_cb_idx - obtain the callback index
  671. * @ioc: per adapter object
  672. * @smid: system request message index
  673. *
  674. * Return callback index.
  675. */
  676. static u8
  677. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  678. {
  679. int i;
  680. u8 cb_idx = 0xFF;
  681. if (smid >= ioc->hi_priority_smid) {
  682. if (smid < ioc->internal_smid) {
  683. i = smid - ioc->hi_priority_smid;
  684. cb_idx = ioc->hpr_lookup[i].cb_idx;
  685. } else if (smid <= ioc->hba_queue_depth) {
  686. i = smid - ioc->internal_smid;
  687. cb_idx = ioc->internal_lookup[i].cb_idx;
  688. }
  689. } else {
  690. i = smid - 1;
  691. cb_idx = ioc->scsi_lookup[i].cb_idx;
  692. }
  693. return cb_idx;
  694. }
  695. /**
  696. * _base_mask_interrupts - disable interrupts
  697. * @ioc: per adapter object
  698. *
  699. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  700. *
  701. * Return nothing.
  702. */
  703. static void
  704. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  705. {
  706. u32 him_register;
  707. ioc->mask_interrupts = 1;
  708. him_register = readl(&ioc->chip->HostInterruptMask);
  709. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  710. writel(him_register, &ioc->chip->HostInterruptMask);
  711. readl(&ioc->chip->HostInterruptMask);
  712. }
  713. /**
  714. * _base_unmask_interrupts - enable interrupts
  715. * @ioc: per adapter object
  716. *
  717. * Enabling only Reply Interrupts
  718. *
  719. * Return nothing.
  720. */
  721. static void
  722. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  723. {
  724. u32 him_register;
  725. him_register = readl(&ioc->chip->HostInterruptMask);
  726. him_register &= ~MPI2_HIM_RIM;
  727. writel(him_register, &ioc->chip->HostInterruptMask);
  728. ioc->mask_interrupts = 0;
  729. }
  730. union reply_descriptor {
  731. u64 word;
  732. struct {
  733. u32 low;
  734. u32 high;
  735. } u;
  736. };
  737. /**
  738. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  739. * @irq: irq number (not used)
  740. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  741. * @r: pt_regs pointer (not used)
  742. *
  743. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  744. */
  745. static irqreturn_t
  746. _base_interrupt(int irq, void *bus_id)
  747. {
  748. union reply_descriptor rd;
  749. u32 completed_cmds;
  750. u8 request_desript_type;
  751. u16 smid;
  752. u8 cb_idx;
  753. u32 reply;
  754. u8 msix_index;
  755. struct MPT2SAS_ADAPTER *ioc = bus_id;
  756. Mpi2ReplyDescriptorsUnion_t *rpf;
  757. u8 rc;
  758. if (ioc->mask_interrupts)
  759. return IRQ_NONE;
  760. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  761. request_desript_type = rpf->Default.ReplyFlags
  762. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  763. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  764. return IRQ_NONE;
  765. completed_cmds = 0;
  766. cb_idx = 0xFF;
  767. do {
  768. rd.word = rpf->Words;
  769. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  770. goto out;
  771. reply = 0;
  772. cb_idx = 0xFF;
  773. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  774. msix_index = rpf->Default.MSIxIndex;
  775. if (request_desript_type ==
  776. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  777. reply = le32_to_cpu
  778. (rpf->AddressReply.ReplyFrameAddress);
  779. if (reply > ioc->reply_dma_max_address ||
  780. reply < ioc->reply_dma_min_address)
  781. reply = 0;
  782. } else if (request_desript_type ==
  783. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  784. goto next;
  785. else if (request_desript_type ==
  786. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  787. goto next;
  788. if (smid)
  789. cb_idx = _base_get_cb_idx(ioc, smid);
  790. if (smid && cb_idx != 0xFF) {
  791. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  792. reply);
  793. if (reply)
  794. _base_display_reply_info(ioc, smid, msix_index,
  795. reply);
  796. if (rc)
  797. mpt2sas_base_free_smid(ioc, smid);
  798. }
  799. if (!smid)
  800. _base_async_event(ioc, msix_index, reply);
  801. /* reply free queue handling */
  802. if (reply) {
  803. ioc->reply_free_host_index =
  804. (ioc->reply_free_host_index ==
  805. (ioc->reply_free_queue_depth - 1)) ?
  806. 0 : ioc->reply_free_host_index + 1;
  807. ioc->reply_free[ioc->reply_free_host_index] =
  808. cpu_to_le32(reply);
  809. wmb();
  810. writel(ioc->reply_free_host_index,
  811. &ioc->chip->ReplyFreeHostIndex);
  812. }
  813. next:
  814. rpf->Words = ULLONG_MAX;
  815. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  816. (ioc->reply_post_queue_depth - 1)) ? 0 :
  817. ioc->reply_post_host_index + 1;
  818. request_desript_type =
  819. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  820. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  821. completed_cmds++;
  822. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  823. goto out;
  824. if (!ioc->reply_post_host_index)
  825. rpf = ioc->reply_post_free;
  826. else
  827. rpf++;
  828. } while (1);
  829. out:
  830. if (!completed_cmds)
  831. return IRQ_NONE;
  832. wmb();
  833. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  834. return IRQ_HANDLED;
  835. }
  836. /**
  837. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  838. * @cb_idx: callback index
  839. *
  840. * Return nothing.
  841. */
  842. void
  843. mpt2sas_base_release_callback_handler(u8 cb_idx)
  844. {
  845. mpt_callbacks[cb_idx] = NULL;
  846. }
  847. /**
  848. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  849. * @cb_func: callback function
  850. *
  851. * Returns cb_func.
  852. */
  853. u8
  854. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  855. {
  856. u8 cb_idx;
  857. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  858. if (mpt_callbacks[cb_idx] == NULL)
  859. break;
  860. mpt_callbacks[cb_idx] = cb_func;
  861. return cb_idx;
  862. }
  863. /**
  864. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  865. *
  866. * Return nothing.
  867. */
  868. void
  869. mpt2sas_base_initialize_callback_handler(void)
  870. {
  871. u8 cb_idx;
  872. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  873. mpt2sas_base_release_callback_handler(cb_idx);
  874. }
  875. /**
  876. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  877. * @ioc: per adapter object
  878. * @paddr: virtual address for SGE
  879. *
  880. * Create a zero length scatter gather entry to insure the IOCs hardware has
  881. * something to use if the target device goes brain dead and tries
  882. * to send data even when none is asked for.
  883. *
  884. * Return nothing.
  885. */
  886. void
  887. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  888. {
  889. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  890. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  891. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  892. MPI2_SGE_FLAGS_SHIFT);
  893. ioc->base_add_sg_single(paddr, flags_length, -1);
  894. }
  895. /**
  896. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  897. * @paddr: virtual address for SGE
  898. * @flags_length: SGE flags and data transfer length
  899. * @dma_addr: Physical address
  900. *
  901. * Return nothing.
  902. */
  903. static void
  904. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  905. {
  906. Mpi2SGESimple32_t *sgel = paddr;
  907. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  908. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  909. sgel->FlagsLength = cpu_to_le32(flags_length);
  910. sgel->Address = cpu_to_le32(dma_addr);
  911. }
  912. /**
  913. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  914. * @paddr: virtual address for SGE
  915. * @flags_length: SGE flags and data transfer length
  916. * @dma_addr: Physical address
  917. *
  918. * Return nothing.
  919. */
  920. static void
  921. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  922. {
  923. Mpi2SGESimple64_t *sgel = paddr;
  924. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  925. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  926. sgel->FlagsLength = cpu_to_le32(flags_length);
  927. sgel->Address = cpu_to_le64(dma_addr);
  928. }
  929. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  930. /**
  931. * _base_config_dma_addressing - set dma addressing
  932. * @ioc: per adapter object
  933. * @pdev: PCI device struct
  934. *
  935. * Returns 0 for success, non-zero for failure.
  936. */
  937. static int
  938. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  939. {
  940. struct sysinfo s;
  941. char *desc = NULL;
  942. if (sizeof(dma_addr_t) > 4) {
  943. const uint64_t required_mask =
  944. dma_get_required_mask(&pdev->dev);
  945. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  946. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  947. DMA_BIT_MASK(64))) {
  948. ioc->base_add_sg_single = &_base_add_sg_single_64;
  949. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  950. desc = "64";
  951. goto out;
  952. }
  953. }
  954. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  955. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  956. ioc->base_add_sg_single = &_base_add_sg_single_32;
  957. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  958. desc = "32";
  959. } else
  960. return -ENODEV;
  961. out:
  962. si_meminfo(&s);
  963. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  964. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  965. return 0;
  966. }
  967. /**
  968. * _base_save_msix_table - backup msix vector table
  969. * @ioc: per adapter object
  970. *
  971. * This address an errata where diag reset clears out the table
  972. */
  973. static void
  974. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  975. {
  976. int i;
  977. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  978. return;
  979. for (i = 0; i < ioc->msix_vector_count; i++)
  980. ioc->msix_table_backup[i] = ioc->msix_table[i];
  981. }
  982. /**
  983. * _base_restore_msix_table - this restores the msix vector table
  984. * @ioc: per adapter object
  985. *
  986. */
  987. static void
  988. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  989. {
  990. int i;
  991. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  992. return;
  993. for (i = 0; i < ioc->msix_vector_count; i++)
  994. ioc->msix_table[i] = ioc->msix_table_backup[i];
  995. }
  996. /**
  997. * _base_check_enable_msix - checks MSIX capabable.
  998. * @ioc: per adapter object
  999. *
  1000. * Check to see if card is capable of MSIX, and set number
  1001. * of avaliable msix vectors
  1002. */
  1003. static int
  1004. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1005. {
  1006. int base;
  1007. u16 message_control;
  1008. u32 msix_table_offset;
  1009. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1010. if (!base) {
  1011. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1012. "supported\n", ioc->name));
  1013. return -EINVAL;
  1014. }
  1015. /* get msix vector count */
  1016. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1017. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1018. /* get msix table */
  1019. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1020. msix_table_offset &= 0xFFFFFFF8;
  1021. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1022. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1023. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1024. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1025. return 0;
  1026. }
  1027. /**
  1028. * _base_disable_msix - disables msix
  1029. * @ioc: per adapter object
  1030. *
  1031. */
  1032. static void
  1033. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1034. {
  1035. if (ioc->msix_enable) {
  1036. pci_disable_msix(ioc->pdev);
  1037. kfree(ioc->msix_table_backup);
  1038. ioc->msix_table_backup = NULL;
  1039. ioc->msix_enable = 0;
  1040. }
  1041. }
  1042. /**
  1043. * _base_enable_msix - enables msix, failback to io_apic
  1044. * @ioc: per adapter object
  1045. *
  1046. */
  1047. static int
  1048. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1049. {
  1050. struct msix_entry entries;
  1051. int r;
  1052. u8 try_msix = 0;
  1053. if (msix_disable == -1 || msix_disable == 0)
  1054. try_msix = 1;
  1055. if (!try_msix)
  1056. goto try_ioapic;
  1057. if (_base_check_enable_msix(ioc) != 0)
  1058. goto try_ioapic;
  1059. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1060. sizeof(u32), GFP_KERNEL);
  1061. if (!ioc->msix_table_backup) {
  1062. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1063. "msix_table_backup failed!!!\n", ioc->name));
  1064. goto try_ioapic;
  1065. }
  1066. memset(&entries, 0, sizeof(struct msix_entry));
  1067. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1068. if (r) {
  1069. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1070. "failed (r=%d) !!!\n", ioc->name, r));
  1071. goto try_ioapic;
  1072. }
  1073. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1074. ioc->name, ioc);
  1075. if (r) {
  1076. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1077. "interrupt %d !!!\n", ioc->name, entries.vector));
  1078. pci_disable_msix(ioc->pdev);
  1079. goto try_ioapic;
  1080. }
  1081. ioc->pci_irq = entries.vector;
  1082. ioc->msix_enable = 1;
  1083. return 0;
  1084. /* failback to io_apic interrupt routing */
  1085. try_ioapic:
  1086. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1087. ioc->name, ioc);
  1088. if (r) {
  1089. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1090. ioc->name, ioc->pdev->irq);
  1091. r = -EBUSY;
  1092. goto out_fail;
  1093. }
  1094. ioc->pci_irq = ioc->pdev->irq;
  1095. return 0;
  1096. out_fail:
  1097. return r;
  1098. }
  1099. /**
  1100. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1101. * @ioc: per adapter object
  1102. *
  1103. * Returns 0 for success, non-zero for failure.
  1104. */
  1105. int
  1106. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1107. {
  1108. struct pci_dev *pdev = ioc->pdev;
  1109. u32 memap_sz;
  1110. u32 pio_sz;
  1111. int i, r = 0;
  1112. u64 pio_chip = 0;
  1113. u64 chip_phys = 0;
  1114. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1115. ioc->name, __func__));
  1116. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1117. if (pci_enable_device_mem(pdev)) {
  1118. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1119. "failed\n", ioc->name);
  1120. return -ENODEV;
  1121. }
  1122. if (pci_request_selected_regions(pdev, ioc->bars,
  1123. MPT2SAS_DRIVER_NAME)) {
  1124. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1125. "failed\n", ioc->name);
  1126. r = -ENODEV;
  1127. goto out_fail;
  1128. }
  1129. /* AER (Advanced Error Reporting) hooks */
  1130. pci_enable_pcie_error_reporting(pdev);
  1131. pci_set_master(pdev);
  1132. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1133. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1134. ioc->name, pci_name(pdev));
  1135. r = -ENODEV;
  1136. goto out_fail;
  1137. }
  1138. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1139. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1140. if (pio_sz)
  1141. continue;
  1142. pio_chip = (u64)pci_resource_start(pdev, i);
  1143. pio_sz = pci_resource_len(pdev, i);
  1144. } else {
  1145. if (memap_sz)
  1146. continue;
  1147. /* verify memory resource is valid before using */
  1148. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1149. ioc->chip_phys = pci_resource_start(pdev, i);
  1150. chip_phys = (u64)ioc->chip_phys;
  1151. memap_sz = pci_resource_len(pdev, i);
  1152. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1153. if (ioc->chip == NULL) {
  1154. printk(MPT2SAS_ERR_FMT "unable to map "
  1155. "adapter memory!\n", ioc->name);
  1156. r = -EINVAL;
  1157. goto out_fail;
  1158. }
  1159. }
  1160. }
  1161. }
  1162. _base_mask_interrupts(ioc);
  1163. r = _base_enable_msix(ioc);
  1164. if (r)
  1165. goto out_fail;
  1166. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1167. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1168. "IO-APIC enabled"), ioc->pci_irq);
  1169. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1170. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1171. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1172. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1173. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1174. pci_save_state(pdev);
  1175. return 0;
  1176. out_fail:
  1177. if (ioc->chip_phys)
  1178. iounmap(ioc->chip);
  1179. ioc->chip_phys = 0;
  1180. ioc->pci_irq = -1;
  1181. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1182. pci_disable_pcie_error_reporting(pdev);
  1183. pci_disable_device(pdev);
  1184. return r;
  1185. }
  1186. /**
  1187. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1188. * @ioc: per adapter object
  1189. * @smid: system request message index(smid zero is invalid)
  1190. *
  1191. * Returns virt pointer to message frame.
  1192. */
  1193. void *
  1194. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1195. {
  1196. return (void *)(ioc->request + (smid * ioc->request_sz));
  1197. }
  1198. /**
  1199. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1200. * @ioc: per adapter object
  1201. * @smid: system request message index
  1202. *
  1203. * Returns virt pointer to sense buffer.
  1204. */
  1205. void *
  1206. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1207. {
  1208. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1209. }
  1210. /**
  1211. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1212. * @ioc: per adapter object
  1213. * @smid: system request message index
  1214. *
  1215. * Returns phys pointer to the low 32bit address of the sense buffer.
  1216. */
  1217. __le32
  1218. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1219. {
  1220. return cpu_to_le32(ioc->sense_dma +
  1221. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1222. }
  1223. /**
  1224. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1225. * @ioc: per adapter object
  1226. * @phys_addr: lower 32 physical addr of the reply
  1227. *
  1228. * Converts 32bit lower physical addr into a virt address.
  1229. */
  1230. void *
  1231. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1232. {
  1233. if (!phys_addr)
  1234. return NULL;
  1235. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1236. }
  1237. /**
  1238. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1239. * @ioc: per adapter object
  1240. * @cb_idx: callback index
  1241. *
  1242. * Returns smid (zero is invalid)
  1243. */
  1244. u16
  1245. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1246. {
  1247. unsigned long flags;
  1248. struct request_tracker *request;
  1249. u16 smid;
  1250. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1251. if (list_empty(&ioc->internal_free_list)) {
  1252. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1253. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1254. ioc->name, __func__);
  1255. return 0;
  1256. }
  1257. request = list_entry(ioc->internal_free_list.next,
  1258. struct request_tracker, tracker_list);
  1259. request->cb_idx = cb_idx;
  1260. smid = request->smid;
  1261. list_del(&request->tracker_list);
  1262. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1263. return smid;
  1264. }
  1265. /**
  1266. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1267. * @ioc: per adapter object
  1268. * @cb_idx: callback index
  1269. * @scmd: pointer to scsi command object
  1270. *
  1271. * Returns smid (zero is invalid)
  1272. */
  1273. u16
  1274. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1275. struct scsi_cmnd *scmd)
  1276. {
  1277. unsigned long flags;
  1278. struct request_tracker *request;
  1279. u16 smid;
  1280. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1281. if (list_empty(&ioc->free_list)) {
  1282. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1283. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1284. ioc->name, __func__);
  1285. return 0;
  1286. }
  1287. request = list_entry(ioc->free_list.next,
  1288. struct request_tracker, tracker_list);
  1289. request->scmd = scmd;
  1290. request->cb_idx = cb_idx;
  1291. smid = request->smid;
  1292. list_del(&request->tracker_list);
  1293. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1294. return smid;
  1295. }
  1296. /**
  1297. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1298. * @ioc: per adapter object
  1299. * @cb_idx: callback index
  1300. *
  1301. * Returns smid (zero is invalid)
  1302. */
  1303. u16
  1304. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1305. {
  1306. unsigned long flags;
  1307. struct request_tracker *request;
  1308. u16 smid;
  1309. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1310. if (list_empty(&ioc->hpr_free_list)) {
  1311. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1312. return 0;
  1313. }
  1314. request = list_entry(ioc->hpr_free_list.next,
  1315. struct request_tracker, tracker_list);
  1316. request->cb_idx = cb_idx;
  1317. smid = request->smid;
  1318. list_del(&request->tracker_list);
  1319. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1320. return smid;
  1321. }
  1322. /**
  1323. * mpt2sas_base_free_smid - put smid back on free_list
  1324. * @ioc: per adapter object
  1325. * @smid: system request message index
  1326. *
  1327. * Return nothing.
  1328. */
  1329. void
  1330. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1331. {
  1332. unsigned long flags;
  1333. int i;
  1334. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1335. if (smid >= ioc->hi_priority_smid) {
  1336. if (smid < ioc->internal_smid) {
  1337. /* hi-priority */
  1338. i = smid - ioc->hi_priority_smid;
  1339. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1340. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1341. &ioc->hpr_free_list);
  1342. } else {
  1343. /* internal queue */
  1344. i = smid - ioc->internal_smid;
  1345. ioc->internal_lookup[i].cb_idx = 0xFF;
  1346. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1347. &ioc->internal_free_list);
  1348. }
  1349. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1350. return;
  1351. }
  1352. /* scsiio queue */
  1353. i = smid - 1;
  1354. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1355. ioc->scsi_lookup[i].scmd = NULL;
  1356. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1357. &ioc->free_list);
  1358. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1359. /*
  1360. * See _wait_for_commands_to_complete() call with regards to this code.
  1361. */
  1362. if (ioc->shost_recovery && ioc->pending_io_count) {
  1363. if (ioc->pending_io_count == 1)
  1364. wake_up(&ioc->reset_wq);
  1365. ioc->pending_io_count--;
  1366. }
  1367. }
  1368. /**
  1369. * _base_writeq - 64 bit write to MMIO
  1370. * @ioc: per adapter object
  1371. * @b: data payload
  1372. * @addr: address in MMIO space
  1373. * @writeq_lock: spin lock
  1374. *
  1375. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1376. * care of 32 bit environment where its not quarenteed to send the entire word
  1377. * in one transfer.
  1378. */
  1379. #ifndef writeq
  1380. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1381. spinlock_t *writeq_lock)
  1382. {
  1383. unsigned long flags;
  1384. __u64 data_out = cpu_to_le64(b);
  1385. spin_lock_irqsave(writeq_lock, flags);
  1386. writel((u32)(data_out), addr);
  1387. writel((u32)(data_out >> 32), (addr + 4));
  1388. spin_unlock_irqrestore(writeq_lock, flags);
  1389. }
  1390. #else
  1391. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1392. spinlock_t *writeq_lock)
  1393. {
  1394. writeq(cpu_to_le64(b), addr);
  1395. }
  1396. #endif
  1397. /**
  1398. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1399. * @ioc: per adapter object
  1400. * @smid: system request message index
  1401. * @handle: device handle
  1402. *
  1403. * Return nothing.
  1404. */
  1405. void
  1406. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1407. {
  1408. Mpi2RequestDescriptorUnion_t descriptor;
  1409. u64 *request = (u64 *)&descriptor;
  1410. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1411. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1412. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1413. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1414. descriptor.SCSIIO.LMID = 0;
  1415. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1416. &ioc->scsi_lookup_lock);
  1417. }
  1418. /**
  1419. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1420. * @ioc: per adapter object
  1421. * @smid: system request message index
  1422. *
  1423. * Return nothing.
  1424. */
  1425. void
  1426. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1427. {
  1428. Mpi2RequestDescriptorUnion_t descriptor;
  1429. u64 *request = (u64 *)&descriptor;
  1430. descriptor.HighPriority.RequestFlags =
  1431. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1432. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1433. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1434. descriptor.HighPriority.LMID = 0;
  1435. descriptor.HighPriority.Reserved1 = 0;
  1436. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1437. &ioc->scsi_lookup_lock);
  1438. }
  1439. /**
  1440. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1441. * @ioc: per adapter object
  1442. * @smid: system request message index
  1443. *
  1444. * Return nothing.
  1445. */
  1446. void
  1447. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1448. {
  1449. Mpi2RequestDescriptorUnion_t descriptor;
  1450. u64 *request = (u64 *)&descriptor;
  1451. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1452. descriptor.Default.MSIxIndex = 0; /* TODO */
  1453. descriptor.Default.SMID = cpu_to_le16(smid);
  1454. descriptor.Default.LMID = 0;
  1455. descriptor.Default.DescriptorTypeDependent = 0;
  1456. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1457. &ioc->scsi_lookup_lock);
  1458. }
  1459. /**
  1460. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1461. * @ioc: per adapter object
  1462. * @smid: system request message index
  1463. * @io_index: value used to track the IO
  1464. *
  1465. * Return nothing.
  1466. */
  1467. void
  1468. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1469. u16 io_index)
  1470. {
  1471. Mpi2RequestDescriptorUnion_t descriptor;
  1472. u64 *request = (u64 *)&descriptor;
  1473. descriptor.SCSITarget.RequestFlags =
  1474. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1475. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1476. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1477. descriptor.SCSITarget.LMID = 0;
  1478. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1479. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1480. &ioc->scsi_lookup_lock);
  1481. }
  1482. /**
  1483. * _base_display_dell_branding - Disply branding string
  1484. * @ioc: per adapter object
  1485. *
  1486. * Return nothing.
  1487. */
  1488. static void
  1489. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1490. {
  1491. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1492. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1493. return;
  1494. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1495. switch (ioc->pdev->subsystem_device) {
  1496. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1497. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1498. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1499. break;
  1500. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1501. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1502. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1503. break;
  1504. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1505. strncpy(dell_branding,
  1506. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1507. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1508. break;
  1509. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1510. strncpy(dell_branding,
  1511. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1512. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1513. break;
  1514. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1515. strncpy(dell_branding,
  1516. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1517. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1518. break;
  1519. case MPT2SAS_DELL_PERC_H200_SSDID:
  1520. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1521. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1522. break;
  1523. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1524. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1525. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1526. break;
  1527. default:
  1528. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1529. break;
  1530. }
  1531. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1532. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1533. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1534. ioc->pdev->subsystem_device);
  1535. }
  1536. /**
  1537. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1538. * @ioc: per adapter object
  1539. *
  1540. * Return nothing.
  1541. */
  1542. static void
  1543. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1544. {
  1545. int i = 0;
  1546. char desc[16];
  1547. u8 revision;
  1548. u32 iounit_pg1_flags;
  1549. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1550. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1551. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1552. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1553. ioc->name, desc,
  1554. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1555. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1556. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1557. ioc->facts.FWVersion.Word & 0x000000FF,
  1558. revision,
  1559. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1560. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1561. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1562. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1563. _base_display_dell_branding(ioc);
  1564. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1565. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1566. printk("Initiator");
  1567. i++;
  1568. }
  1569. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1570. printk("%sTarget", i ? "," : "");
  1571. i++;
  1572. }
  1573. i = 0;
  1574. printk("), ");
  1575. printk("Capabilities=(");
  1576. if (ioc->facts.IOCCapabilities &
  1577. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1578. printk("Raid");
  1579. i++;
  1580. }
  1581. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1582. printk("%sTLR", i ? "," : "");
  1583. i++;
  1584. }
  1585. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1586. printk("%sMulticast", i ? "," : "");
  1587. i++;
  1588. }
  1589. if (ioc->facts.IOCCapabilities &
  1590. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1591. printk("%sBIDI Target", i ? "," : "");
  1592. i++;
  1593. }
  1594. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1595. printk("%sEEDP", i ? "," : "");
  1596. i++;
  1597. }
  1598. if (ioc->facts.IOCCapabilities &
  1599. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1600. printk("%sSnapshot Buffer", i ? "," : "");
  1601. i++;
  1602. }
  1603. if (ioc->facts.IOCCapabilities &
  1604. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1605. printk("%sDiag Trace Buffer", i ? "," : "");
  1606. i++;
  1607. }
  1608. if (ioc->facts.IOCCapabilities &
  1609. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1610. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1611. i++;
  1612. }
  1613. if (ioc->facts.IOCCapabilities &
  1614. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1615. printk("%sTask Set Full", i ? "," : "");
  1616. i++;
  1617. }
  1618. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1619. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1620. printk("%sNCQ", i ? "," : "");
  1621. i++;
  1622. }
  1623. printk(")\n");
  1624. }
  1625. /**
  1626. * _base_update_missing_delay - change the missing delay timers
  1627. * @ioc: per adapter object
  1628. * @device_missing_delay: amount of time till device is reported missing
  1629. * @io_missing_delay: interval IO is returned when there is a missing device
  1630. *
  1631. * Return nothing.
  1632. *
  1633. * Passed on the command line, this function will modify the device missing
  1634. * delay, as well as the io missing delay. This should be called at driver
  1635. * load time.
  1636. */
  1637. static void
  1638. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1639. u16 device_missing_delay, u8 io_missing_delay)
  1640. {
  1641. u16 dmd, dmd_new, dmd_orignal;
  1642. u8 io_missing_delay_original;
  1643. u16 sz;
  1644. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1645. Mpi2ConfigReply_t mpi_reply;
  1646. u8 num_phys = 0;
  1647. u16 ioc_status;
  1648. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1649. if (!num_phys)
  1650. return;
  1651. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1652. sizeof(Mpi2SasIOUnit1PhyData_t));
  1653. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1654. if (!sas_iounit_pg1) {
  1655. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1656. ioc->name, __FILE__, __LINE__, __func__);
  1657. goto out;
  1658. }
  1659. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1660. sas_iounit_pg1, sz))) {
  1661. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1662. ioc->name, __FILE__, __LINE__, __func__);
  1663. goto out;
  1664. }
  1665. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1666. MPI2_IOCSTATUS_MASK;
  1667. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1668. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1669. ioc->name, __FILE__, __LINE__, __func__);
  1670. goto out;
  1671. }
  1672. /* device missing delay */
  1673. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1674. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1675. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1676. else
  1677. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1678. dmd_orignal = dmd;
  1679. if (device_missing_delay > 0x7F) {
  1680. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1681. device_missing_delay;
  1682. dmd = dmd / 16;
  1683. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1684. } else
  1685. dmd = device_missing_delay;
  1686. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1687. /* io missing delay */
  1688. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1689. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1690. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1691. sz)) {
  1692. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1693. dmd_new = (dmd &
  1694. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1695. else
  1696. dmd_new =
  1697. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1698. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1699. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1700. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1701. "new(%d)\n", ioc->name, io_missing_delay_original,
  1702. io_missing_delay);
  1703. ioc->device_missing_delay = dmd_new;
  1704. ioc->io_missing_delay = io_missing_delay;
  1705. }
  1706. out:
  1707. kfree(sas_iounit_pg1);
  1708. }
  1709. /**
  1710. * _base_static_config_pages - static start of day config pages
  1711. * @ioc: per adapter object
  1712. *
  1713. * Return nothing.
  1714. */
  1715. static void
  1716. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1717. {
  1718. Mpi2ConfigReply_t mpi_reply;
  1719. u32 iounit_pg1_flags;
  1720. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1721. if (ioc->ir_firmware)
  1722. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1723. &ioc->manu_pg10);
  1724. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1725. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1726. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1727. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1728. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1729. _base_display_ioc_capabilities(ioc);
  1730. /*
  1731. * Enable task_set_full handling in iounit_pg1 when the
  1732. * facts capabilities indicate that its supported.
  1733. */
  1734. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1735. if ((ioc->facts.IOCCapabilities &
  1736. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1737. iounit_pg1_flags &=
  1738. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1739. else
  1740. iounit_pg1_flags |=
  1741. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1742. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1743. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1744. }
  1745. /**
  1746. * _base_release_memory_pools - release memory
  1747. * @ioc: per adapter object
  1748. *
  1749. * Free memory allocated from _base_allocate_memory_pools.
  1750. *
  1751. * Return nothing.
  1752. */
  1753. static void
  1754. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1755. {
  1756. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1757. __func__));
  1758. if (ioc->request) {
  1759. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1760. ioc->request, ioc->request_dma);
  1761. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1762. ": free\n", ioc->name, ioc->request));
  1763. ioc->request = NULL;
  1764. }
  1765. if (ioc->sense) {
  1766. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1767. if (ioc->sense_dma_pool)
  1768. pci_pool_destroy(ioc->sense_dma_pool);
  1769. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1770. ": free\n", ioc->name, ioc->sense));
  1771. ioc->sense = NULL;
  1772. }
  1773. if (ioc->reply) {
  1774. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1775. if (ioc->reply_dma_pool)
  1776. pci_pool_destroy(ioc->reply_dma_pool);
  1777. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1778. ": free\n", ioc->name, ioc->reply));
  1779. ioc->reply = NULL;
  1780. }
  1781. if (ioc->reply_free) {
  1782. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1783. ioc->reply_free_dma);
  1784. if (ioc->reply_free_dma_pool)
  1785. pci_pool_destroy(ioc->reply_free_dma_pool);
  1786. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1787. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1788. ioc->reply_free = NULL;
  1789. }
  1790. if (ioc->reply_post_free) {
  1791. pci_pool_free(ioc->reply_post_free_dma_pool,
  1792. ioc->reply_post_free, ioc->reply_post_free_dma);
  1793. if (ioc->reply_post_free_dma_pool)
  1794. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1795. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1796. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1797. ioc->reply_post_free));
  1798. ioc->reply_post_free = NULL;
  1799. }
  1800. if (ioc->config_page) {
  1801. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1802. "config_page(0x%p): free\n", ioc->name,
  1803. ioc->config_page));
  1804. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1805. ioc->config_page, ioc->config_page_dma);
  1806. }
  1807. if (ioc->scsi_lookup) {
  1808. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1809. ioc->scsi_lookup = NULL;
  1810. }
  1811. kfree(ioc->hpr_lookup);
  1812. kfree(ioc->internal_lookup);
  1813. }
  1814. /**
  1815. * _base_allocate_memory_pools - allocate start of day memory pools
  1816. * @ioc: per adapter object
  1817. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1818. *
  1819. * Returns 0 success, anything else error
  1820. */
  1821. static int
  1822. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1823. {
  1824. Mpi2IOCFactsReply_t *facts;
  1825. u32 queue_size, queue_diff;
  1826. u16 max_sge_elements;
  1827. u16 num_of_reply_frames;
  1828. u16 chains_needed_per_io;
  1829. u32 sz, total_sz;
  1830. u32 retry_sz;
  1831. u16 max_request_credit;
  1832. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1833. __func__));
  1834. retry_sz = 0;
  1835. facts = &ioc->facts;
  1836. /* command line tunables for max sgl entries */
  1837. if (max_sgl_entries != -1) {
  1838. ioc->shost->sg_tablesize = (max_sgl_entries <
  1839. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1840. MPT2SAS_SG_DEPTH;
  1841. } else {
  1842. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1843. }
  1844. /* command line tunables for max controller queue depth */
  1845. if (max_queue_depth != -1) {
  1846. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1847. ? max_queue_depth : facts->RequestCredit;
  1848. } else {
  1849. max_request_credit = (facts->RequestCredit >
  1850. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1851. facts->RequestCredit;
  1852. }
  1853. ioc->hba_queue_depth = max_request_credit;
  1854. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1855. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1856. /* request frame size */
  1857. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1858. /* reply frame size */
  1859. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1860. retry_allocation:
  1861. total_sz = 0;
  1862. /* calculate number of sg elements left over in the 1st frame */
  1863. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1864. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1865. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1866. /* now do the same for a chain buffer */
  1867. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1868. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1869. ioc->chain_offset_value_for_main_message =
  1870. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1871. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1872. /*
  1873. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1874. */
  1875. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1876. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1877. + 1;
  1878. if (chains_needed_per_io > facts->MaxChainDepth) {
  1879. chains_needed_per_io = facts->MaxChainDepth;
  1880. ioc->shost->sg_tablesize = min_t(u16,
  1881. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1882. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1883. }
  1884. ioc->chains_needed_per_io = chains_needed_per_io;
  1885. /* reply free queue sizing - taking into account for events */
  1886. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1887. /* number of replies frames can't be a multiple of 16 */
  1888. /* decrease number of reply frames by 1 */
  1889. if (!(num_of_reply_frames % 16))
  1890. num_of_reply_frames--;
  1891. /* calculate number of reply free queue entries
  1892. * (must be multiple of 16)
  1893. */
  1894. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1895. queue_size = num_of_reply_frames;
  1896. queue_size += 16 - (queue_size % 16);
  1897. ioc->reply_free_queue_depth = queue_size;
  1898. /* reply descriptor post queue sizing */
  1899. /* this size should be the number of request frames + number of reply
  1900. * frames
  1901. */
  1902. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1903. /* round up to 16 byte boundary */
  1904. if (queue_size % 16)
  1905. queue_size += 16 - (queue_size % 16);
  1906. /* check against IOC maximum reply post queue depth */
  1907. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1908. queue_diff = queue_size -
  1909. facts->MaxReplyDescriptorPostQueueDepth;
  1910. /* round queue_diff up to multiple of 16 */
  1911. if (queue_diff % 16)
  1912. queue_diff += 16 - (queue_diff % 16);
  1913. /* adjust hba_queue_depth, reply_free_queue_depth,
  1914. * and queue_size
  1915. */
  1916. ioc->hba_queue_depth -= queue_diff;
  1917. ioc->reply_free_queue_depth -= queue_diff;
  1918. queue_size -= queue_diff;
  1919. }
  1920. ioc->reply_post_queue_depth = queue_size;
  1921. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1922. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1923. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1924. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1925. ioc->chains_needed_per_io));
  1926. ioc->scsiio_depth = ioc->hba_queue_depth -
  1927. ioc->hi_priority_depth - ioc->internal_depth;
  1928. /* set the scsi host can_queue depth
  1929. * with some internal commands that could be outstanding
  1930. */
  1931. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1932. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1933. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1934. /* contiguous pool for request and chains, 16 byte align, one extra "
  1935. * "frame for smid=0
  1936. */
  1937. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1938. sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1939. /* hi-priority queue */
  1940. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1941. /* internal queue */
  1942. sz += (ioc->internal_depth * ioc->request_sz);
  1943. ioc->request_dma_sz = sz;
  1944. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1945. if (!ioc->request) {
  1946. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1947. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1948. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1949. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1950. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1951. goto out;
  1952. retry_sz += 64;
  1953. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1954. goto retry_allocation;
  1955. }
  1956. if (retry_sz)
  1957. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1958. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1959. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1960. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1961. /* hi-priority queue */
  1962. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1963. ioc->request_sz);
  1964. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1965. ioc->request_sz);
  1966. /* internal queue */
  1967. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1968. ioc->request_sz);
  1969. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1970. ioc->request_sz);
  1971. ioc->chain = ioc->internal + (ioc->internal_depth *
  1972. ioc->request_sz);
  1973. ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
  1974. ioc->request_sz);
  1975. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1976. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1977. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1978. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1979. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1980. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1981. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1982. ioc->request_sz))/1024));
  1983. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1984. ioc->name, (unsigned long long) ioc->request_dma));
  1985. total_sz += sz;
  1986. sz = ioc->scsiio_depth * sizeof(struct request_tracker);
  1987. ioc->scsi_lookup_pages = get_order(sz);
  1988. ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
  1989. GFP_KERNEL, ioc->scsi_lookup_pages);
  1990. if (!ioc->scsi_lookup) {
  1991. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  1992. "sz(%d)\n", ioc->name, (int)sz);
  1993. goto out;
  1994. }
  1995. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  1996. "depth(%d)\n", ioc->name, ioc->request,
  1997. ioc->scsiio_depth));
  1998. /* initialize hi-priority queue smid's */
  1999. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2000. sizeof(struct request_tracker), GFP_KERNEL);
  2001. if (!ioc->hpr_lookup) {
  2002. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2003. ioc->name);
  2004. goto out;
  2005. }
  2006. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2007. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2008. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2009. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2010. /* initialize internal queue smid's */
  2011. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2012. sizeof(struct request_tracker), GFP_KERNEL);
  2013. if (!ioc->internal_lookup) {
  2014. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2015. ioc->name);
  2016. goto out;
  2017. }
  2018. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2019. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2020. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2021. ioc->internal_depth, ioc->internal_smid));
  2022. /* sense buffers, 4 byte align */
  2023. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2024. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2025. 0);
  2026. if (!ioc->sense_dma_pool) {
  2027. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2028. ioc->name);
  2029. goto out;
  2030. }
  2031. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2032. &ioc->sense_dma);
  2033. if (!ioc->sense) {
  2034. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2035. ioc->name);
  2036. goto out;
  2037. }
  2038. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2039. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2040. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2041. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2042. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2043. ioc->name, (unsigned long long)ioc->sense_dma));
  2044. total_sz += sz;
  2045. /* reply pool, 4 byte align */
  2046. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2047. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2048. 0);
  2049. if (!ioc->reply_dma_pool) {
  2050. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2051. ioc->name);
  2052. goto out;
  2053. }
  2054. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2055. &ioc->reply_dma);
  2056. if (!ioc->reply) {
  2057. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2058. ioc->name);
  2059. goto out;
  2060. }
  2061. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2062. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2063. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2064. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2065. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2066. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2067. ioc->name, (unsigned long long)ioc->reply_dma));
  2068. total_sz += sz;
  2069. /* reply free queue, 16 byte align */
  2070. sz = ioc->reply_free_queue_depth * 4;
  2071. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2072. ioc->pdev, sz, 16, 0);
  2073. if (!ioc->reply_free_dma_pool) {
  2074. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2075. "failed\n", ioc->name);
  2076. goto out;
  2077. }
  2078. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2079. &ioc->reply_free_dma);
  2080. if (!ioc->reply_free) {
  2081. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2082. "failed\n", ioc->name);
  2083. goto out;
  2084. }
  2085. memset(ioc->reply_free, 0, sz);
  2086. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2087. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2088. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2089. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2090. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2091. total_sz += sz;
  2092. /* reply post queue, 16 byte align */
  2093. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2094. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2095. ioc->pdev, sz, 16, 0);
  2096. if (!ioc->reply_post_free_dma_pool) {
  2097. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2098. "failed\n", ioc->name);
  2099. goto out;
  2100. }
  2101. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2102. GFP_KERNEL, &ioc->reply_post_free_dma);
  2103. if (!ioc->reply_post_free) {
  2104. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2105. "failed\n", ioc->name);
  2106. goto out;
  2107. }
  2108. memset(ioc->reply_post_free, 0, sz);
  2109. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2110. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2111. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2112. sz/1024));
  2113. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2114. "(0x%llx)\n", ioc->name, (unsigned long long)
  2115. ioc->reply_post_free_dma));
  2116. total_sz += sz;
  2117. ioc->config_page_sz = 512;
  2118. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2119. ioc->config_page_sz, &ioc->config_page_dma);
  2120. if (!ioc->config_page) {
  2121. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2122. "failed\n", ioc->name);
  2123. goto out;
  2124. }
  2125. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2126. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2127. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2128. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2129. total_sz += ioc->config_page_sz;
  2130. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2131. ioc->name, total_sz/1024);
  2132. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2133. "Max Controller Queue Depth(%d)\n",
  2134. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2135. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2136. ioc->name, ioc->shost->sg_tablesize);
  2137. return 0;
  2138. out:
  2139. _base_release_memory_pools(ioc);
  2140. return -ENOMEM;
  2141. }
  2142. /**
  2143. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2144. * @ioc: Pointer to MPT_ADAPTER structure
  2145. * @cooked: Request raw or cooked IOC state
  2146. *
  2147. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2148. * Doorbell bits in MPI_IOC_STATE_MASK.
  2149. */
  2150. u32
  2151. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2152. {
  2153. u32 s, sc;
  2154. s = readl(&ioc->chip->Doorbell);
  2155. sc = s & MPI2_IOC_STATE_MASK;
  2156. return cooked ? sc : s;
  2157. }
  2158. /**
  2159. * _base_wait_on_iocstate - waiting on a particular ioc state
  2160. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2161. * @timeout: timeout in second
  2162. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2163. *
  2164. * Returns 0 for success, non-zero for failure.
  2165. */
  2166. static int
  2167. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2168. int sleep_flag)
  2169. {
  2170. u32 count, cntdn;
  2171. u32 current_state;
  2172. count = 0;
  2173. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2174. do {
  2175. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2176. if (current_state == ioc_state)
  2177. return 0;
  2178. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2179. break;
  2180. if (sleep_flag == CAN_SLEEP)
  2181. msleep(1);
  2182. else
  2183. udelay(500);
  2184. count++;
  2185. } while (--cntdn);
  2186. return current_state;
  2187. }
  2188. /**
  2189. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2190. * a write to the doorbell)
  2191. * @ioc: per adapter object
  2192. * @timeout: timeout in second
  2193. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2194. *
  2195. * Returns 0 for success, non-zero for failure.
  2196. *
  2197. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2198. */
  2199. static int
  2200. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2201. int sleep_flag)
  2202. {
  2203. u32 cntdn, count;
  2204. u32 int_status;
  2205. count = 0;
  2206. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2207. do {
  2208. int_status = readl(&ioc->chip->HostInterruptStatus);
  2209. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2210. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2211. "successfull count(%d), timeout(%d)\n", ioc->name,
  2212. __func__, count, timeout));
  2213. return 0;
  2214. }
  2215. if (sleep_flag == CAN_SLEEP)
  2216. msleep(1);
  2217. else
  2218. udelay(500);
  2219. count++;
  2220. } while (--cntdn);
  2221. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2222. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2223. return -EFAULT;
  2224. }
  2225. /**
  2226. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2227. * @ioc: per adapter object
  2228. * @timeout: timeout in second
  2229. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2230. *
  2231. * Returns 0 for success, non-zero for failure.
  2232. *
  2233. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2234. * doorbell.
  2235. */
  2236. static int
  2237. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2238. int sleep_flag)
  2239. {
  2240. u32 cntdn, count;
  2241. u32 int_status;
  2242. u32 doorbell;
  2243. count = 0;
  2244. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2245. do {
  2246. int_status = readl(&ioc->chip->HostInterruptStatus);
  2247. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2248. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2249. "successfull count(%d), timeout(%d)\n", ioc->name,
  2250. __func__, count, timeout));
  2251. return 0;
  2252. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2253. doorbell = readl(&ioc->chip->Doorbell);
  2254. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2255. MPI2_IOC_STATE_FAULT) {
  2256. mpt2sas_base_fault_info(ioc , doorbell);
  2257. return -EFAULT;
  2258. }
  2259. } else if (int_status == 0xFFFFFFFF)
  2260. goto out;
  2261. if (sleep_flag == CAN_SLEEP)
  2262. msleep(1);
  2263. else
  2264. udelay(500);
  2265. count++;
  2266. } while (--cntdn);
  2267. out:
  2268. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2269. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2270. return -EFAULT;
  2271. }
  2272. /**
  2273. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2274. * @ioc: per adapter object
  2275. * @timeout: timeout in second
  2276. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2277. *
  2278. * Returns 0 for success, non-zero for failure.
  2279. *
  2280. */
  2281. static int
  2282. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2283. int sleep_flag)
  2284. {
  2285. u32 cntdn, count;
  2286. u32 doorbell_reg;
  2287. count = 0;
  2288. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2289. do {
  2290. doorbell_reg = readl(&ioc->chip->Doorbell);
  2291. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2292. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2293. "successfull count(%d), timeout(%d)\n", ioc->name,
  2294. __func__, count, timeout));
  2295. return 0;
  2296. }
  2297. if (sleep_flag == CAN_SLEEP)
  2298. msleep(1);
  2299. else
  2300. udelay(500);
  2301. count++;
  2302. } while (--cntdn);
  2303. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2304. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2305. return -EFAULT;
  2306. }
  2307. /**
  2308. * _base_send_ioc_reset - send doorbell reset
  2309. * @ioc: per adapter object
  2310. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2311. * @timeout: timeout in second
  2312. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2313. *
  2314. * Returns 0 for success, non-zero for failure.
  2315. */
  2316. static int
  2317. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2318. int sleep_flag)
  2319. {
  2320. u32 ioc_state;
  2321. int r = 0;
  2322. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2323. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2324. ioc->name, __func__);
  2325. return -EFAULT;
  2326. }
  2327. if (!(ioc->facts.IOCCapabilities &
  2328. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2329. return -EFAULT;
  2330. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2331. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2332. &ioc->chip->Doorbell);
  2333. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2334. r = -EFAULT;
  2335. goto out;
  2336. }
  2337. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2338. timeout, sleep_flag);
  2339. if (ioc_state) {
  2340. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2341. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2342. r = -EFAULT;
  2343. goto out;
  2344. }
  2345. out:
  2346. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2347. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2348. return r;
  2349. }
  2350. /**
  2351. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2352. * @ioc: per adapter object
  2353. * @request_bytes: request length
  2354. * @request: pointer having request payload
  2355. * @reply_bytes: reply length
  2356. * @reply: pointer to reply payload
  2357. * @timeout: timeout in second
  2358. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2359. *
  2360. * Returns 0 for success, non-zero for failure.
  2361. */
  2362. static int
  2363. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2364. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2365. {
  2366. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2367. int i;
  2368. u8 failed;
  2369. u16 dummy;
  2370. u32 *mfp;
  2371. /* make sure doorbell is not in use */
  2372. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2373. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2374. " (line=%d)\n", ioc->name, __LINE__);
  2375. return -EFAULT;
  2376. }
  2377. /* clear pending doorbell interrupts from previous state changes */
  2378. if (readl(&ioc->chip->HostInterruptStatus) &
  2379. MPI2_HIS_IOC2SYS_DB_STATUS)
  2380. writel(0, &ioc->chip->HostInterruptStatus);
  2381. /* send message to ioc */
  2382. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2383. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2384. &ioc->chip->Doorbell);
  2385. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2386. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2387. "int failed (line=%d)\n", ioc->name, __LINE__);
  2388. return -EFAULT;
  2389. }
  2390. writel(0, &ioc->chip->HostInterruptStatus);
  2391. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2392. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2393. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2394. return -EFAULT;
  2395. }
  2396. /* send message 32-bits at a time */
  2397. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2398. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2399. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2400. failed = 1;
  2401. }
  2402. if (failed) {
  2403. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2404. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2405. return -EFAULT;
  2406. }
  2407. /* now wait for the reply */
  2408. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2409. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2410. "int failed (line=%d)\n", ioc->name, __LINE__);
  2411. return -EFAULT;
  2412. }
  2413. /* read the first two 16-bits, it gives the total length of the reply */
  2414. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2415. & MPI2_DOORBELL_DATA_MASK);
  2416. writel(0, &ioc->chip->HostInterruptStatus);
  2417. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2418. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2419. "int failed (line=%d)\n", ioc->name, __LINE__);
  2420. return -EFAULT;
  2421. }
  2422. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2423. & MPI2_DOORBELL_DATA_MASK);
  2424. writel(0, &ioc->chip->HostInterruptStatus);
  2425. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2426. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2427. printk(MPT2SAS_ERR_FMT "doorbell "
  2428. "handshake int failed (line=%d)\n", ioc->name,
  2429. __LINE__);
  2430. return -EFAULT;
  2431. }
  2432. if (i >= reply_bytes/2) /* overflow case */
  2433. dummy = readl(&ioc->chip->Doorbell);
  2434. else
  2435. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2436. & MPI2_DOORBELL_DATA_MASK);
  2437. writel(0, &ioc->chip->HostInterruptStatus);
  2438. }
  2439. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2440. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2441. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2442. " (line=%d)\n", ioc->name, __LINE__));
  2443. }
  2444. writel(0, &ioc->chip->HostInterruptStatus);
  2445. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2446. mfp = (u32 *)reply;
  2447. printk(KERN_INFO "\toffset:data\n");
  2448. for (i = 0; i < reply_bytes/4; i++)
  2449. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2450. le32_to_cpu(mfp[i]));
  2451. }
  2452. return 0;
  2453. }
  2454. /**
  2455. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2456. * @ioc: per adapter object
  2457. * @mpi_reply: the reply payload from FW
  2458. * @mpi_request: the request payload sent to FW
  2459. *
  2460. * The SAS IO Unit Control Request message allows the host to perform low-level
  2461. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2462. * to obtain the IOC assigned device handles for a device if it has other
  2463. * identifying information about the device, in addition allows the host to
  2464. * remove IOC resources associated with the device.
  2465. *
  2466. * Returns 0 for success, non-zero for failure.
  2467. */
  2468. int
  2469. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2470. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2471. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2472. {
  2473. u16 smid;
  2474. u32 ioc_state;
  2475. unsigned long timeleft;
  2476. u8 issue_reset;
  2477. int rc;
  2478. void *request;
  2479. u16 wait_state_count;
  2480. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2481. __func__));
  2482. mutex_lock(&ioc->base_cmds.mutex);
  2483. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2484. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2485. ioc->name, __func__);
  2486. rc = -EAGAIN;
  2487. goto out;
  2488. }
  2489. wait_state_count = 0;
  2490. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2491. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2492. if (wait_state_count++ == 10) {
  2493. printk(MPT2SAS_ERR_FMT
  2494. "%s: failed due to ioc not operational\n",
  2495. ioc->name, __func__);
  2496. rc = -EFAULT;
  2497. goto out;
  2498. }
  2499. ssleep(1);
  2500. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2501. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2502. "operational state(count=%d)\n", ioc->name,
  2503. __func__, wait_state_count);
  2504. }
  2505. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2506. if (!smid) {
  2507. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2508. ioc->name, __func__);
  2509. rc = -EAGAIN;
  2510. goto out;
  2511. }
  2512. rc = 0;
  2513. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2514. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2515. ioc->base_cmds.smid = smid;
  2516. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2517. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2518. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2519. ioc->ioc_link_reset_in_progress = 1;
  2520. mpt2sas_base_put_smid_default(ioc, smid);
  2521. init_completion(&ioc->base_cmds.done);
  2522. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2523. msecs_to_jiffies(10000));
  2524. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2525. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2526. ioc->ioc_link_reset_in_progress)
  2527. ioc->ioc_link_reset_in_progress = 0;
  2528. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2529. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2530. ioc->name, __func__);
  2531. _debug_dump_mf(mpi_request,
  2532. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2533. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2534. issue_reset = 1;
  2535. goto issue_host_reset;
  2536. }
  2537. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2538. memcpy(mpi_reply, ioc->base_cmds.reply,
  2539. sizeof(Mpi2SasIoUnitControlReply_t));
  2540. else
  2541. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2542. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2543. goto out;
  2544. issue_host_reset:
  2545. if (issue_reset)
  2546. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2547. FORCE_BIG_HAMMER);
  2548. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2549. rc = -EFAULT;
  2550. out:
  2551. mutex_unlock(&ioc->base_cmds.mutex);
  2552. return rc;
  2553. }
  2554. /**
  2555. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2556. * @ioc: per adapter object
  2557. * @mpi_reply: the reply payload from FW
  2558. * @mpi_request: the request payload sent to FW
  2559. *
  2560. * The SCSI Enclosure Processor request message causes the IOC to
  2561. * communicate with SES devices to control LED status signals.
  2562. *
  2563. * Returns 0 for success, non-zero for failure.
  2564. */
  2565. int
  2566. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2567. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2568. {
  2569. u16 smid;
  2570. u32 ioc_state;
  2571. unsigned long timeleft;
  2572. u8 issue_reset;
  2573. int rc;
  2574. void *request;
  2575. u16 wait_state_count;
  2576. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2577. __func__));
  2578. mutex_lock(&ioc->base_cmds.mutex);
  2579. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2580. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2581. ioc->name, __func__);
  2582. rc = -EAGAIN;
  2583. goto out;
  2584. }
  2585. wait_state_count = 0;
  2586. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2587. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2588. if (wait_state_count++ == 10) {
  2589. printk(MPT2SAS_ERR_FMT
  2590. "%s: failed due to ioc not operational\n",
  2591. ioc->name, __func__);
  2592. rc = -EFAULT;
  2593. goto out;
  2594. }
  2595. ssleep(1);
  2596. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2597. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2598. "operational state(count=%d)\n", ioc->name,
  2599. __func__, wait_state_count);
  2600. }
  2601. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2602. if (!smid) {
  2603. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2604. ioc->name, __func__);
  2605. rc = -EAGAIN;
  2606. goto out;
  2607. }
  2608. rc = 0;
  2609. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2610. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2611. ioc->base_cmds.smid = smid;
  2612. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2613. mpt2sas_base_put_smid_default(ioc, smid);
  2614. init_completion(&ioc->base_cmds.done);
  2615. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2616. msecs_to_jiffies(10000));
  2617. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2618. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2619. ioc->name, __func__);
  2620. _debug_dump_mf(mpi_request,
  2621. sizeof(Mpi2SepRequest_t)/4);
  2622. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2623. issue_reset = 1;
  2624. goto issue_host_reset;
  2625. }
  2626. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2627. memcpy(mpi_reply, ioc->base_cmds.reply,
  2628. sizeof(Mpi2SepReply_t));
  2629. else
  2630. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2631. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2632. goto out;
  2633. issue_host_reset:
  2634. if (issue_reset)
  2635. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2636. FORCE_BIG_HAMMER);
  2637. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2638. rc = -EFAULT;
  2639. out:
  2640. mutex_unlock(&ioc->base_cmds.mutex);
  2641. return rc;
  2642. }
  2643. /**
  2644. * _base_get_port_facts - obtain port facts reply and save in ioc
  2645. * @ioc: per adapter object
  2646. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2647. *
  2648. * Returns 0 for success, non-zero for failure.
  2649. */
  2650. static int
  2651. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2652. {
  2653. Mpi2PortFactsRequest_t mpi_request;
  2654. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2655. int mpi_reply_sz, mpi_request_sz, r;
  2656. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2657. __func__));
  2658. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2659. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2660. memset(&mpi_request, 0, mpi_request_sz);
  2661. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2662. mpi_request.PortNumber = port;
  2663. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2664. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2665. if (r != 0) {
  2666. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2667. ioc->name, __func__, r);
  2668. return r;
  2669. }
  2670. pfacts = &ioc->pfacts[port];
  2671. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2672. pfacts->PortNumber = mpi_reply.PortNumber;
  2673. pfacts->VP_ID = mpi_reply.VP_ID;
  2674. pfacts->VF_ID = mpi_reply.VF_ID;
  2675. pfacts->MaxPostedCmdBuffers =
  2676. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2677. return 0;
  2678. }
  2679. /**
  2680. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2681. * @ioc: per adapter object
  2682. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2683. *
  2684. * Returns 0 for success, non-zero for failure.
  2685. */
  2686. static int
  2687. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2688. {
  2689. Mpi2IOCFactsRequest_t mpi_request;
  2690. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2691. int mpi_reply_sz, mpi_request_sz, r;
  2692. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2693. __func__));
  2694. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2695. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2696. memset(&mpi_request, 0, mpi_request_sz);
  2697. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2698. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2699. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2700. if (r != 0) {
  2701. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2702. ioc->name, __func__, r);
  2703. return r;
  2704. }
  2705. facts = &ioc->facts;
  2706. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2707. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2708. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2709. facts->VP_ID = mpi_reply.VP_ID;
  2710. facts->VF_ID = mpi_reply.VF_ID;
  2711. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2712. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2713. facts->WhoInit = mpi_reply.WhoInit;
  2714. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2715. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2716. facts->MaxReplyDescriptorPostQueueDepth =
  2717. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2718. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2719. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2720. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2721. ioc->ir_firmware = 1;
  2722. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2723. facts->IOCRequestFrameSize =
  2724. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2725. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2726. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2727. ioc->shost->max_id = -1;
  2728. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2729. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2730. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2731. facts->HighPriorityCredit =
  2732. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2733. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2734. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2735. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2736. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2737. facts->MaxChainDepth));
  2738. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2739. "reply frame size(%d)\n", ioc->name,
  2740. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2741. return 0;
  2742. }
  2743. /**
  2744. * _base_send_ioc_init - send ioc_init to firmware
  2745. * @ioc: per adapter object
  2746. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2747. *
  2748. * Returns 0 for success, non-zero for failure.
  2749. */
  2750. static int
  2751. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2752. {
  2753. Mpi2IOCInitRequest_t mpi_request;
  2754. Mpi2IOCInitReply_t mpi_reply;
  2755. int r;
  2756. struct timeval current_time;
  2757. u16 ioc_status;
  2758. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2759. __func__));
  2760. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2761. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2762. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2763. mpi_request.VF_ID = 0; /* TODO */
  2764. mpi_request.VP_ID = 0;
  2765. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2766. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2767. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2768. * removed and made reserved. For those with older firmware will need
  2769. * this fix. It was decided that the Reply and Request frame sizes are
  2770. * the same.
  2771. */
  2772. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2773. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2774. /* mpi_request.SystemReplyFrameSize =
  2775. * cpu_to_le16(ioc->reply_sz);
  2776. */
  2777. }
  2778. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2779. mpi_request.ReplyDescriptorPostQueueDepth =
  2780. cpu_to_le16(ioc->reply_post_queue_depth);
  2781. mpi_request.ReplyFreeQueueDepth =
  2782. cpu_to_le16(ioc->reply_free_queue_depth);
  2783. #if BITS_PER_LONG > 32
  2784. mpi_request.SenseBufferAddressHigh =
  2785. cpu_to_le32(ioc->sense_dma >> 32);
  2786. mpi_request.SystemReplyAddressHigh =
  2787. cpu_to_le32(ioc->reply_dma >> 32);
  2788. mpi_request.SystemRequestFrameBaseAddress =
  2789. cpu_to_le64(ioc->request_dma);
  2790. mpi_request.ReplyFreeQueueAddress =
  2791. cpu_to_le64(ioc->reply_free_dma);
  2792. mpi_request.ReplyDescriptorPostQueueAddress =
  2793. cpu_to_le64(ioc->reply_post_free_dma);
  2794. #else
  2795. mpi_request.SystemRequestFrameBaseAddress =
  2796. cpu_to_le32(ioc->request_dma);
  2797. mpi_request.ReplyFreeQueueAddress =
  2798. cpu_to_le32(ioc->reply_free_dma);
  2799. mpi_request.ReplyDescriptorPostQueueAddress =
  2800. cpu_to_le32(ioc->reply_post_free_dma);
  2801. #endif
  2802. /* This time stamp specifies number of milliseconds
  2803. * since epoch ~ midnight January 1, 1970.
  2804. */
  2805. do_gettimeofday(&current_time);
  2806. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2807. (current_time.tv_usec / 1000));
  2808. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2809. u32 *mfp;
  2810. int i;
  2811. mfp = (u32 *)&mpi_request;
  2812. printk(KERN_INFO "\toffset:data\n");
  2813. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2814. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2815. le32_to_cpu(mfp[i]));
  2816. }
  2817. r = _base_handshake_req_reply_wait(ioc,
  2818. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2819. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2820. sleep_flag);
  2821. if (r != 0) {
  2822. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2823. ioc->name, __func__, r);
  2824. return r;
  2825. }
  2826. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2827. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2828. mpi_reply.IOCLogInfo) {
  2829. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2830. r = -EIO;
  2831. }
  2832. return 0;
  2833. }
  2834. /**
  2835. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2836. * @ioc: per adapter object
  2837. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2838. *
  2839. * Returns 0 for success, non-zero for failure.
  2840. */
  2841. static int
  2842. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2843. {
  2844. Mpi2PortEnableRequest_t *mpi_request;
  2845. u32 ioc_state;
  2846. unsigned long timeleft;
  2847. int r = 0;
  2848. u16 smid;
  2849. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2850. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2851. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2852. ioc->name, __func__);
  2853. return -EAGAIN;
  2854. }
  2855. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2856. if (!smid) {
  2857. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2858. ioc->name, __func__);
  2859. return -EAGAIN;
  2860. }
  2861. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2862. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2863. ioc->base_cmds.smid = smid;
  2864. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2865. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2866. mpi_request->VF_ID = 0; /* TODO */
  2867. mpi_request->VP_ID = 0;
  2868. mpt2sas_base_put_smid_default(ioc, smid);
  2869. init_completion(&ioc->base_cmds.done);
  2870. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2871. 300*HZ);
  2872. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2873. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2874. ioc->name, __func__);
  2875. _debug_dump_mf(mpi_request,
  2876. sizeof(Mpi2PortEnableRequest_t)/4);
  2877. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2878. r = -EFAULT;
  2879. else
  2880. r = -ETIME;
  2881. goto out;
  2882. } else
  2883. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2884. ioc->name, __func__));
  2885. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2886. 60, sleep_flag);
  2887. if (ioc_state) {
  2888. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2889. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2890. r = -EFAULT;
  2891. }
  2892. out:
  2893. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2894. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2895. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2896. return r;
  2897. }
  2898. /**
  2899. * _base_unmask_events - turn on notification for this event
  2900. * @ioc: per adapter object
  2901. * @event: firmware event
  2902. *
  2903. * The mask is stored in ioc->event_masks.
  2904. */
  2905. static void
  2906. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2907. {
  2908. u32 desired_event;
  2909. if (event >= 128)
  2910. return;
  2911. desired_event = (1 << (event % 32));
  2912. if (event < 32)
  2913. ioc->event_masks[0] &= ~desired_event;
  2914. else if (event < 64)
  2915. ioc->event_masks[1] &= ~desired_event;
  2916. else if (event < 96)
  2917. ioc->event_masks[2] &= ~desired_event;
  2918. else if (event < 128)
  2919. ioc->event_masks[3] &= ~desired_event;
  2920. }
  2921. /**
  2922. * _base_event_notification - send event notification
  2923. * @ioc: per adapter object
  2924. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2925. *
  2926. * Returns 0 for success, non-zero for failure.
  2927. */
  2928. static int
  2929. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2930. {
  2931. Mpi2EventNotificationRequest_t *mpi_request;
  2932. unsigned long timeleft;
  2933. u16 smid;
  2934. int r = 0;
  2935. int i;
  2936. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2937. __func__));
  2938. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2939. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2940. ioc->name, __func__);
  2941. return -EAGAIN;
  2942. }
  2943. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2944. if (!smid) {
  2945. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2946. ioc->name, __func__);
  2947. return -EAGAIN;
  2948. }
  2949. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2950. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2951. ioc->base_cmds.smid = smid;
  2952. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2953. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2954. mpi_request->VF_ID = 0; /* TODO */
  2955. mpi_request->VP_ID = 0;
  2956. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2957. mpi_request->EventMasks[i] =
  2958. cpu_to_le32(ioc->event_masks[i]);
  2959. mpt2sas_base_put_smid_default(ioc, smid);
  2960. init_completion(&ioc->base_cmds.done);
  2961. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2962. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2963. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2964. ioc->name, __func__);
  2965. _debug_dump_mf(mpi_request,
  2966. sizeof(Mpi2EventNotificationRequest_t)/4);
  2967. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2968. r = -EFAULT;
  2969. else
  2970. r = -ETIME;
  2971. } else
  2972. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2973. ioc->name, __func__));
  2974. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2975. return r;
  2976. }
  2977. /**
  2978. * mpt2sas_base_validate_event_type - validating event types
  2979. * @ioc: per adapter object
  2980. * @event: firmware event
  2981. *
  2982. * This will turn on firmware event notification when application
  2983. * ask for that event. We don't mask events that are already enabled.
  2984. */
  2985. void
  2986. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2987. {
  2988. int i, j;
  2989. u32 event_mask, desired_event;
  2990. u8 send_update_to_fw;
  2991. for (i = 0, send_update_to_fw = 0; i <
  2992. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2993. event_mask = ~event_type[i];
  2994. desired_event = 1;
  2995. for (j = 0; j < 32; j++) {
  2996. if (!(event_mask & desired_event) &&
  2997. (ioc->event_masks[i] & desired_event)) {
  2998. ioc->event_masks[i] &= ~desired_event;
  2999. send_update_to_fw = 1;
  3000. }
  3001. desired_event = (desired_event << 1);
  3002. }
  3003. }
  3004. if (!send_update_to_fw)
  3005. return;
  3006. mutex_lock(&ioc->base_cmds.mutex);
  3007. _base_event_notification(ioc, CAN_SLEEP);
  3008. mutex_unlock(&ioc->base_cmds.mutex);
  3009. }
  3010. /**
  3011. * _base_diag_reset - the "big hammer" start of day reset
  3012. * @ioc: per adapter object
  3013. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3014. *
  3015. * Returns 0 for success, non-zero for failure.
  3016. */
  3017. static int
  3018. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3019. {
  3020. u32 host_diagnostic;
  3021. u32 ioc_state;
  3022. u32 count;
  3023. u32 hcb_size;
  3024. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3025. _base_save_msix_table(ioc);
  3026. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3027. ioc->name));
  3028. count = 0;
  3029. do {
  3030. /* Write magic sequence to WriteSequence register
  3031. * Loop until in diagnostic mode
  3032. */
  3033. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3034. "sequence\n", ioc->name));
  3035. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3036. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3037. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3038. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3039. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3040. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3041. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3042. /* wait 100 msec */
  3043. if (sleep_flag == CAN_SLEEP)
  3044. msleep(100);
  3045. else
  3046. mdelay(100);
  3047. if (count++ > 20)
  3048. goto out;
  3049. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3050. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3051. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3052. ioc->name, count, host_diagnostic));
  3053. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3054. hcb_size = readl(&ioc->chip->HCBSize);
  3055. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3056. ioc->name));
  3057. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3058. &ioc->chip->HostDiagnostic);
  3059. /* don't access any registers for 50 milliseconds */
  3060. msleep(50);
  3061. /* 300 second max wait */
  3062. for (count = 0; count < 3000000 ; count++) {
  3063. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3064. if (host_diagnostic == 0xFFFFFFFF)
  3065. goto out;
  3066. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3067. break;
  3068. /* wait 100 msec */
  3069. if (sleep_flag == CAN_SLEEP)
  3070. msleep(1);
  3071. else
  3072. mdelay(1);
  3073. }
  3074. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3075. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3076. "assuming the HCB Address points to good F/W\n",
  3077. ioc->name));
  3078. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3079. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3080. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3081. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3082. "re-enable the HCDW\n", ioc->name));
  3083. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3084. &ioc->chip->HCBSize);
  3085. }
  3086. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3087. ioc->name));
  3088. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3089. &ioc->chip->HostDiagnostic);
  3090. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3091. "diagnostic register\n", ioc->name));
  3092. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3093. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3094. "READY state\n", ioc->name));
  3095. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3096. sleep_flag);
  3097. if (ioc_state) {
  3098. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3099. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3100. goto out;
  3101. }
  3102. _base_restore_msix_table(ioc);
  3103. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3104. return 0;
  3105. out:
  3106. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3107. return -EFAULT;
  3108. }
  3109. /**
  3110. * _base_make_ioc_ready - put controller in READY state
  3111. * @ioc: per adapter object
  3112. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3113. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3114. *
  3115. * Returns 0 for success, non-zero for failure.
  3116. */
  3117. static int
  3118. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3119. enum reset_type type)
  3120. {
  3121. u32 ioc_state;
  3122. int rc;
  3123. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3124. __func__));
  3125. if (ioc->pci_error_recovery)
  3126. return 0;
  3127. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3128. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3129. ioc->name, __func__, ioc_state));
  3130. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3131. return 0;
  3132. if (ioc_state & MPI2_DOORBELL_USED) {
  3133. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3134. "active!\n", ioc->name));
  3135. goto issue_diag_reset;
  3136. }
  3137. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3138. mpt2sas_base_fault_info(ioc, ioc_state &
  3139. MPI2_DOORBELL_DATA_MASK);
  3140. goto issue_diag_reset;
  3141. }
  3142. if (type == FORCE_BIG_HAMMER)
  3143. goto issue_diag_reset;
  3144. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3145. if (!(_base_send_ioc_reset(ioc,
  3146. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3147. ioc->ioc_reset_count++;
  3148. return 0;
  3149. }
  3150. issue_diag_reset:
  3151. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3152. ioc->ioc_reset_count++;
  3153. return rc;
  3154. }
  3155. /**
  3156. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3157. * @ioc: per adapter object
  3158. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3159. *
  3160. * Returns 0 for success, non-zero for failure.
  3161. */
  3162. static int
  3163. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3164. {
  3165. int r, i;
  3166. unsigned long flags;
  3167. u32 reply_address;
  3168. u16 smid;
  3169. struct _tr_list *delayed_tr, *delayed_tr_next;
  3170. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3171. __func__));
  3172. /* clean the delayed target reset list */
  3173. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3174. &ioc->delayed_tr_list, list) {
  3175. list_del(&delayed_tr->list);
  3176. kfree(delayed_tr);
  3177. }
  3178. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3179. &ioc->delayed_tr_volume_list, list) {
  3180. list_del(&delayed_tr->list);
  3181. kfree(delayed_tr);
  3182. }
  3183. /* initialize the scsi lookup free list */
  3184. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3185. INIT_LIST_HEAD(&ioc->free_list);
  3186. smid = 1;
  3187. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3188. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3189. ioc->scsi_lookup[i].smid = smid;
  3190. ioc->scsi_lookup[i].scmd = NULL;
  3191. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3192. &ioc->free_list);
  3193. }
  3194. /* hi-priority queue */
  3195. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3196. smid = ioc->hi_priority_smid;
  3197. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3198. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3199. ioc->hpr_lookup[i].smid = smid;
  3200. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3201. &ioc->hpr_free_list);
  3202. }
  3203. /* internal queue */
  3204. INIT_LIST_HEAD(&ioc->internal_free_list);
  3205. smid = ioc->internal_smid;
  3206. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3207. ioc->internal_lookup[i].cb_idx = 0xFF;
  3208. ioc->internal_lookup[i].smid = smid;
  3209. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3210. &ioc->internal_free_list);
  3211. }
  3212. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3213. /* initialize Reply Free Queue */
  3214. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3215. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3216. ioc->reply_sz)
  3217. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3218. /* initialize Reply Post Free Queue */
  3219. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3220. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3221. r = _base_send_ioc_init(ioc, sleep_flag);
  3222. if (r)
  3223. return r;
  3224. /* initialize the index's */
  3225. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3226. ioc->reply_post_host_index = 0;
  3227. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3228. writel(0, &ioc->chip->ReplyPostHostIndex);
  3229. _base_unmask_interrupts(ioc);
  3230. r = _base_event_notification(ioc, sleep_flag);
  3231. if (r)
  3232. return r;
  3233. if (sleep_flag == CAN_SLEEP)
  3234. _base_static_config_pages(ioc);
  3235. if (ioc->wait_for_port_enable_to_complete) {
  3236. if (diag_buffer_enable != 0)
  3237. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3238. if (disable_discovery > 0)
  3239. return r;
  3240. }
  3241. r = _base_send_port_enable(ioc, sleep_flag);
  3242. if (r)
  3243. return r;
  3244. return r;
  3245. }
  3246. /**
  3247. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3248. * @ioc: per adapter object
  3249. *
  3250. * Return nothing.
  3251. */
  3252. void
  3253. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3254. {
  3255. struct pci_dev *pdev = ioc->pdev;
  3256. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3257. __func__));
  3258. _base_mask_interrupts(ioc);
  3259. ioc->shost_recovery = 1;
  3260. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3261. ioc->shost_recovery = 0;
  3262. if (ioc->pci_irq) {
  3263. synchronize_irq(pdev->irq);
  3264. free_irq(ioc->pci_irq, ioc);
  3265. }
  3266. _base_disable_msix(ioc);
  3267. if (ioc->chip_phys)
  3268. iounmap(ioc->chip);
  3269. ioc->pci_irq = -1;
  3270. ioc->chip_phys = 0;
  3271. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3272. pci_disable_pcie_error_reporting(pdev);
  3273. pci_disable_device(pdev);
  3274. return;
  3275. }
  3276. /**
  3277. * mpt2sas_base_attach - attach controller instance
  3278. * @ioc: per adapter object
  3279. *
  3280. * Returns 0 for success, non-zero for failure.
  3281. */
  3282. int
  3283. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3284. {
  3285. int r, i;
  3286. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3287. __func__));
  3288. r = mpt2sas_base_map_resources(ioc);
  3289. if (r)
  3290. return r;
  3291. pci_set_drvdata(ioc->pdev, ioc->shost);
  3292. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3293. if (r)
  3294. goto out_free_resources;
  3295. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3296. if (r)
  3297. goto out_free_resources;
  3298. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3299. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3300. if (!ioc->pfacts) {
  3301. r = -ENOMEM;
  3302. goto out_free_resources;
  3303. }
  3304. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3305. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3306. if (r)
  3307. goto out_free_resources;
  3308. }
  3309. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3310. if (r)
  3311. goto out_free_resources;
  3312. init_waitqueue_head(&ioc->reset_wq);
  3313. /* allocate memory pd handle bitmask list */
  3314. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3315. if (ioc->facts.MaxDevHandle % 8)
  3316. ioc->pd_handles_sz++;
  3317. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3318. GFP_KERNEL);
  3319. if (!ioc->pd_handles) {
  3320. r = -ENOMEM;
  3321. goto out_free_resources;
  3322. }
  3323. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3324. /* base internal command bits */
  3325. mutex_init(&ioc->base_cmds.mutex);
  3326. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3327. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3328. /* transport internal command bits */
  3329. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3330. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3331. mutex_init(&ioc->transport_cmds.mutex);
  3332. /* scsih internal command bits */
  3333. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3334. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3335. mutex_init(&ioc->scsih_cmds.mutex);
  3336. /* task management internal command bits */
  3337. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3338. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3339. mutex_init(&ioc->tm_cmds.mutex);
  3340. /* config page internal command bits */
  3341. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3342. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3343. mutex_init(&ioc->config_cmds.mutex);
  3344. /* ctl module internal command bits */
  3345. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3346. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3347. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3348. mutex_init(&ioc->ctl_cmds.mutex);
  3349. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3350. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3351. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3352. !ioc->ctl_cmds.sense) {
  3353. r = -ENOMEM;
  3354. goto out_free_resources;
  3355. }
  3356. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3357. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3358. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3359. r = -ENOMEM;
  3360. goto out_free_resources;
  3361. }
  3362. init_completion(&ioc->shost_recovery_done);
  3363. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3364. ioc->event_masks[i] = -1;
  3365. /* here we enable the events we care about */
  3366. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3367. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3368. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3369. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3370. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3371. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3372. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3373. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3374. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3375. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  3376. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3377. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3378. if (r)
  3379. goto out_free_resources;
  3380. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3381. _base_update_missing_delay(ioc, missing_delay[0],
  3382. missing_delay[1]);
  3383. mpt2sas_base_start_watchdog(ioc);
  3384. return 0;
  3385. out_free_resources:
  3386. ioc->remove_host = 1;
  3387. mpt2sas_base_free_resources(ioc);
  3388. _base_release_memory_pools(ioc);
  3389. pci_set_drvdata(ioc->pdev, NULL);
  3390. kfree(ioc->pd_handles);
  3391. kfree(ioc->tm_cmds.reply);
  3392. kfree(ioc->transport_cmds.reply);
  3393. kfree(ioc->scsih_cmds.reply);
  3394. kfree(ioc->config_cmds.reply);
  3395. kfree(ioc->base_cmds.reply);
  3396. kfree(ioc->ctl_cmds.reply);
  3397. kfree(ioc->ctl_cmds.sense);
  3398. kfree(ioc->pfacts);
  3399. ioc->ctl_cmds.reply = NULL;
  3400. ioc->base_cmds.reply = NULL;
  3401. ioc->tm_cmds.reply = NULL;
  3402. ioc->scsih_cmds.reply = NULL;
  3403. ioc->transport_cmds.reply = NULL;
  3404. ioc->config_cmds.reply = NULL;
  3405. ioc->pfacts = NULL;
  3406. return r;
  3407. }
  3408. /**
  3409. * mpt2sas_base_detach - remove controller instance
  3410. * @ioc: per adapter object
  3411. *
  3412. * Return nothing.
  3413. */
  3414. void
  3415. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3416. {
  3417. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3418. __func__));
  3419. mpt2sas_base_stop_watchdog(ioc);
  3420. mpt2sas_base_free_resources(ioc);
  3421. _base_release_memory_pools(ioc);
  3422. pci_set_drvdata(ioc->pdev, NULL);
  3423. kfree(ioc->pd_handles);
  3424. kfree(ioc->pfacts);
  3425. kfree(ioc->ctl_cmds.reply);
  3426. kfree(ioc->ctl_cmds.sense);
  3427. kfree(ioc->base_cmds.reply);
  3428. kfree(ioc->tm_cmds.reply);
  3429. kfree(ioc->transport_cmds.reply);
  3430. kfree(ioc->scsih_cmds.reply);
  3431. kfree(ioc->config_cmds.reply);
  3432. }
  3433. /**
  3434. * _base_reset_handler - reset callback handler (for base)
  3435. * @ioc: per adapter object
  3436. * @reset_phase: phase
  3437. *
  3438. * The handler for doing any required cleanup or initialization.
  3439. *
  3440. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3441. * MPT2_IOC_DONE_RESET
  3442. *
  3443. * Return nothing.
  3444. */
  3445. static void
  3446. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3447. {
  3448. switch (reset_phase) {
  3449. case MPT2_IOC_PRE_RESET:
  3450. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3451. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3452. break;
  3453. case MPT2_IOC_AFTER_RESET:
  3454. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3455. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3456. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3457. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3458. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3459. complete(&ioc->transport_cmds.done);
  3460. }
  3461. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3462. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3463. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3464. complete(&ioc->base_cmds.done);
  3465. }
  3466. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3467. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3468. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3469. ioc->config_cmds.smid = USHRT_MAX;
  3470. complete(&ioc->config_cmds.done);
  3471. }
  3472. break;
  3473. case MPT2_IOC_DONE_RESET:
  3474. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3475. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3476. break;
  3477. }
  3478. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3479. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3480. }
  3481. /**
  3482. * _wait_for_commands_to_complete - reset controller
  3483. * @ioc: Pointer to MPT_ADAPTER structure
  3484. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3485. *
  3486. * This function waiting(3s) for all pending commands to complete
  3487. * prior to putting controller in reset.
  3488. */
  3489. static void
  3490. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3491. {
  3492. u32 ioc_state;
  3493. unsigned long flags;
  3494. u16 i;
  3495. ioc->pending_io_count = 0;
  3496. if (sleep_flag != CAN_SLEEP)
  3497. return;
  3498. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3499. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3500. return;
  3501. /* pending command count */
  3502. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3503. for (i = 0; i < ioc->scsiio_depth; i++)
  3504. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3505. ioc->pending_io_count++;
  3506. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3507. if (!ioc->pending_io_count)
  3508. return;
  3509. /* wait for pending commands to complete */
  3510. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3511. }
  3512. /**
  3513. * mpt2sas_base_hard_reset_handler - reset controller
  3514. * @ioc: Pointer to MPT_ADAPTER structure
  3515. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3516. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3517. *
  3518. * Returns 0 for success, non-zero for failure.
  3519. */
  3520. int
  3521. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3522. enum reset_type type)
  3523. {
  3524. int r;
  3525. unsigned long flags;
  3526. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3527. __func__));
  3528. if (ioc->pci_error_recovery) {
  3529. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3530. ioc->name, __func__);
  3531. r = 0;
  3532. goto out;
  3533. }
  3534. if (mpt2sas_fwfault_debug)
  3535. mpt2sas_halt_firmware(ioc);
  3536. /* TODO - What we really should be doing is pulling
  3537. * out all the code associated with NO_SLEEP; its never used.
  3538. * That is legacy code from mpt fusion driver, ported over.
  3539. * I will leave this BUG_ON here for now till its been resolved.
  3540. */
  3541. BUG_ON(sleep_flag == NO_SLEEP);
  3542. /* wait for an active reset in progress to complete */
  3543. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3544. do {
  3545. ssleep(1);
  3546. } while (ioc->shost_recovery == 1);
  3547. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3548. __func__));
  3549. return ioc->ioc_reset_in_progress_status;
  3550. }
  3551. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3552. ioc->shost_recovery = 1;
  3553. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3554. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3555. _wait_for_commands_to_complete(ioc, sleep_flag);
  3556. _base_mask_interrupts(ioc);
  3557. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3558. if (r)
  3559. goto out;
  3560. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3561. r = _base_make_ioc_operational(ioc, sleep_flag);
  3562. if (!r)
  3563. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3564. out:
  3565. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3566. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3567. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3568. ioc->ioc_reset_in_progress_status = r;
  3569. ioc->shost_recovery = 0;
  3570. complete(&ioc->shost_recovery_done);
  3571. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3572. mutex_unlock(&ioc->reset_in_progress_mutex);
  3573. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3574. __func__));
  3575. return r;
  3576. }